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authorDavid Wu2016-03-16 01:44:15 +0800
committerJonathan Cameron2016-03-20 10:27:25 +0000
commitae549a72212c94c757fa3ecbcaa986cc9d2e2b96 (patch)
treefbf605da1034efed1f382b44057c51022df65571 /drivers/iio/adc/rockchip_saradc.c
parent722fc31663d506d668e6a3bea4e9dca8ab957d3a (diff)
iio: adc: rockchip_saradc: add saradc support for rk3399
The ADC is a 6-channel signal-ended 10-bit Successive Approximation Register (SAR) A/D Converter. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Diffstat (limited to 'drivers/iio/adc/rockchip_saradc.c')
-rw-r--r--drivers/iio/adc/rockchip_saradc.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c
index 9c311c1e1ac7..f9ad6c2d6821 100644
--- a/drivers/iio/adc/rockchip_saradc.c
+++ b/drivers/iio/adc/rockchip_saradc.c
@@ -159,6 +159,22 @@ static const struct rockchip_saradc_data rk3066_tsadc_data = {
.clk_rate = 50000,
};
+static const struct iio_chan_spec rockchip_rk3399_saradc_iio_channels[] = {
+ ADC_CHANNEL(0, "adc0"),
+ ADC_CHANNEL(1, "adc1"),
+ ADC_CHANNEL(2, "adc2"),
+ ADC_CHANNEL(3, "adc3"),
+ ADC_CHANNEL(4, "adc4"),
+ ADC_CHANNEL(5, "adc5"),
+};
+
+static const struct rockchip_saradc_data rk3399_saradc_data = {
+ .num_bits = 10,
+ .channels = rockchip_rk3399_saradc_iio_channels,
+ .num_channels = ARRAY_SIZE(rockchip_rk3399_saradc_iio_channels),
+ .clk_rate = 1000000,
+};
+
static const struct of_device_id rockchip_saradc_match[] = {
{
.compatible = "rockchip,saradc",
@@ -166,6 +182,9 @@ static const struct of_device_id rockchip_saradc_match[] = {
}, {
.compatible = "rockchip,rk3066-tsadc",
.data = &rk3066_tsadc_data,
+ }, {
+ .compatible = "rockchip,rk3399-saradc",
+ .data = &rk3399_saradc_data,
},
{},
};