diff options
| author | Paul Kocialkowski | 2024-09-06 23:17:24 +0200 |
|---|---|---|
| committer | Paul Kocialkowski | 2024-09-06 23:17:24 +0200 |
| commit | 7d5c9f31a2d28e932ddeee750da7af442906c65b (patch) | |
| tree | db2c8f052c7e394cb9c76a312ca3a4603d580426 /drivers/staging/media/sunxi/cedrus/cedrus_hw.c | |
| parent | 5acc2f557495298391ee585237dfe2fd69b5024e (diff) | |
media: cedrus: Add decoder reset before each runsunxi/cedrus/jpeg-nv16
This reset is internal to the video engine and clears registers for
all decode engines (regardless of which one is currently selected).
It might also reset some internal logic states.
Introduce this for overall safety in case of side-effets caused by
consecutive use of an engine(e.g. when not clearing some registers).
Signed-off-by: Paul Kocialkowski <paulk@sys-base.io>
Diffstat (limited to 'drivers/staging/media/sunxi/cedrus/cedrus_hw.c')
| -rw-r--r-- | drivers/staging/media/sunxi/cedrus/cedrus_hw.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c index 17e91bb5c26a..735437480706 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c @@ -31,6 +31,21 @@ #include "cedrus_hw.h" #include "cedrus_regs.h" +void cedrus_engine_reset(struct cedrus_dev *dev) +{ + u32 reg, flags; + int ret; + + /* Wait for the cache and memory access to idle. */ + flags = VE_RESET_SYNC_IDLE | VE_RESET_CACHE_SYNC_IDLE; + readl_poll_timeout_atomic(dev->base + VE_RESET, reg, + (reg & flags) == flags, 1, 100); + + /* Reset anyway if busy for 100 ms. */ + cedrus_write(dev, VE_RESET, reg | VE_RESET_DECODER); + cedrus_write(dev, VE_RESET, reg); +} + int cedrus_engine_enable(struct cedrus_ctx *ctx) { u32 reg = 0; |