diff options
| -rw-r--r-- | drivers/staging/media/sunxi/cedrus/cedrus_hw.c | 12 | ||||
| -rw-r--r-- | drivers/staging/media/sunxi/cedrus/cedrus_regs.h | 9 |
2 files changed, 16 insertions, 5 deletions
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c index 32af0e96e762..582b6cb796ea 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c @@ -88,15 +88,21 @@ void cedrus_dst_format_set(struct cedrus_dev *dev, case V4L2_PIX_FMT_NV12: chroma_size = ALIGN(width, 16) * ALIGN(height, 16) / 2; - reg = VE_PRIMARY_OUT_FMT_NV12; + reg = VE_PRIMARY_OUT_FMT_NV12 | VE_SECONDARY_OUT_FMT_EXT_NV12; cedrus_write(dev, VE_PRIMARY_OUT_FMT, reg); reg = chroma_size / 2; cedrus_write(dev, VE_PRIMARY_CHROMA_BUF_LEN, reg); - reg = VE_PRIMARY_FB_LINE_STRIDE_LUMA(ALIGN(width, 16)) | - VE_PRIMARY_FB_LINE_STRIDE_CHROMA(ALIGN(width, 16) / 2); + reg = VE_CHROMA_BUF_LEN_SDRT(chroma_size / 2) | + VE_CHROMA_WIDTH_ALIGN_8 | + VE_SECONDARY_OUT_FMT_EXT; + cedrus_write(dev, VE_CHROMA_BUF_LEN, reg); + + reg = VE_FB_LINE_STRIDE_LUMA(ALIGN(width, 16)) | + VE_FB_LINE_STRIDE_CHROMA(ALIGN(width, 16) / 2); cedrus_write(dev, VE_PRIMARY_FB_LINE_STRIDE, reg); + cedrus_write(dev, VE_SECONDARY_FB_LINE_STRIDE, reg); break; case V4L2_PIX_FMT_NV12_32L32: diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h index 05e6cbc548ab..3acc05e0fb54 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h +++ b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h @@ -59,9 +59,10 @@ #define VE_INTRAPRED_DRAM_BUF_ADDR 0x58 #define VE_PRIMARY_CHROMA_BUF_LEN 0xc4 #define VE_PRIMARY_FB_LINE_STRIDE 0xc8 +#define VE_SECONDARY_FB_LINE_STRIDE 0xcc -#define VE_PRIMARY_FB_LINE_STRIDE_CHROMA(s) SHIFT_AND_MASK_BITS(s, 31, 16) -#define VE_PRIMARY_FB_LINE_STRIDE_LUMA(s) SHIFT_AND_MASK_BITS(s, 15, 0) +#define VE_FB_LINE_STRIDE_CHROMA(s) SHIFT_AND_MASK_BITS(s, 31, 16) +#define VE_FB_LINE_STRIDE_LUMA(s) SHIFT_AND_MASK_BITS(s, 15, 0) #define VE_CHROMA_BUF_LEN 0xe8 @@ -69,6 +70,10 @@ #define VE_SECONDARY_OUT_FMT_EXT (0x01 << 30) #define VE_SECONDARY_OUT_FMT_YU12 (0x02 << 30) #define VE_SECONDARY_OUT_FMT_YV12 (0x03 << 30) +#define VE_CHROMA_WIDTH_ALIGN_16 (0x00 << 29) +#define VE_CHROMA_WIDTH_ALIGN_8 (0x01 << 29) +#define VE_LUMA_WIDTH_ALIGN_16 (0x00 << 28) +#define VE_LUMA_WIDTH_ALIGN_32 (0x01 << 28) #define VE_CHROMA_BUF_LEN_SDRT(l) SHIFT_AND_MASK_BITS(l, 27, 0) #define VE_PRIMARY_OUT_FMT 0xec |