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path: root/drivers/phy/xilinx
AgeCommit message (Expand)Author
2022-01-27phy: xilinx: zynqmp: Fix bus width setting for SGMIIRobert Hancock
2021-08-18phy: xilinx: zynqmp: skip PHY initialization and PLL lock for USBPiyush Mehta
2021-03-31phy: zynqmp: Handle the clock enable/disable properlyManish Narani
2021-02-06phy: zynqmp: Simplify code by using dev_err_probe()Michal Simek
2020-07-01phy: zynqmp: Fix unused-function compiler warningTobias Klauser
2020-06-29phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit TransceiverAnurag Kumar Vulisha