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authorJonas Karlman2023-04-18 16:46:23 +0000
committerKever Yang2023-04-21 15:16:01 +0800
commit7774b7929961ec5b69cec95a0acc51d10e7564ed (patch)
tree37230c10772535fe4b979b011ff8fc71f7e3b59d
parentf89167bb74086fddc95290a6171e4dd9953b34c2 (diff)
mmc: sdhci: Fix HISPD bit handling for MMC HS 52MHz mode
Set High Speed Enable bit for MMC High Speed (52MHz) mode. Fixes: f12341a95295 ("mmc: sdhci: Fix HISPD bit handling") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
-rw-r--r--drivers/mmc/sdhci.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index c6b250b9a1b..1389c18533f 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -682,6 +682,7 @@ static int sdhci_set_ios(struct mmc *mmc)
if (!no_hispd_bit) {
if (mmc->selected_mode == MMC_HS ||
mmc->selected_mode == SD_HS ||
+ mmc->selected_mode == MMC_HS_52 ||
mmc->selected_mode == MMC_DDR_52 ||
mmc->selected_mode == MMC_HS_200 ||
mmc->selected_mode == MMC_HS_400 ||