diff options
author | Jonas Karlman | 2024-02-17 00:22:40 +0000 |
---|---|---|
committer | Kever Yang | 2024-03-14 11:40:48 +0800 |
commit | a37a3ddd515b751e495a488cbbdd4afaf32e7d30 (patch) | |
tree | da72d6e8621697a805d58a0c9daf3839747afa1a | |
parent | c60b835be28a9d6d7a03a64b42a922c08e62530d (diff) |
rockchip: rk3328-rock64: Enable boot from SPI NOR flash
Add Kconfig options to enable support for booting from SPI NOR flash on
Pine64 Rock64.
The generated bootable u-boot-rockchip-spi.bin can be written to 0x0 of
SPI NOR flash. The FIT image is loaded from 0x60000, same as on RK35xx
boards.
=> sf probe
SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
=> load mmc 1:1 10000000 u-boot-rockchip-spi.bin
1359872 bytes read in 65 ms (20 MiB/s)
=> sf update ${fileaddr} 0 ${filesize}
device 0 offset 0x0, size 0x14c000
1118208 bytes written, 241664 bytes skipped in 8.516s, speed 163516 B/s
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
-rw-r--r-- | arch/arm/dts/rk3328-rock64-u-boot.dtsi | 16 | ||||
-rw-r--r-- | configs/rock64-rk3328_defconfig | 9 |
2 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi index 9de645d8d7a..85426495c3d 100644 --- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi +++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi @@ -39,6 +39,22 @@ }; }; +&spi0m2_clk { + bootph-pre-ram; +}; + +&spi0m2_cs0 { + bootph-pre-ram; +}; + +&spi0m2_rx { + bootph-pre-ram; +}; + +&spi0m2_tx { + bootph-pre-ram; +}; + &vcc_sd { bootph-pre-ram; }; diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index feda8701428..0c640d7eaad 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64" CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_ROCKCHIP_SPI_IMAGE=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x600000 @@ -20,6 +21,8 @@ CONFIG_SPL_STACK=0x400000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set @@ -41,6 +44,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_POWER=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y @@ -78,7 +83,11 @@ CONFIG_MISC=y CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_XTX=y CONFIG_PHY_REALTEK=y CONFIG_DM_ETH_PHY=y CONFIG_PHY_GIGE=y |