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authorPaul Kocialkowski2015-02-23 16:07:55 +0100
committerPaul Kocialkowski2015-07-15 15:07:27 +0200
commit50ec010f68791336eeded8c6eae6e43faf9e9bb5 (patch)
tree601c18008e76f50b6589577881b1a4703c458049
parent9f252ec7c7003c8cc95bc470c8820f67fc8f6e36 (diff)
WIP: some TWL work
-rw-r--r--board/lge/sniper/sniper.c37
1 files changed, 37 insertions, 0 deletions
diff --git a/board/lge/sniper/sniper.c b/board/lge/sniper/sniper.c
index 6b0f1a5a323..a3e42fcf22d 100644
--- a/board/lge/sniper/sniper.c
+++ b/board/lge/sniper/sniper.c
@@ -422,6 +422,43 @@ int misc_init_r(void)
musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
#endif
+ u8 val;
+
+ val = twl4030_i2c_write_u8(TWL4030_CHIP_INTBR,
+ twl4030_i2c_read_u8(TWL4030_CHIP_INTBR, TWL4030_BASEADD_INTBR + 0x0c, &val);
+ val |= 0x80 | 0x10;
+ twl4030_i2c_write_u8(TWL4030_CHIP_INTBR, TWL4030_BASEADD_INTBR + 0x0c, val);
+
+ // turn adc on
+ twl4030_i2c_write_u8(TWL4030_CHIP_MADC, TWL4030_BASEADD_MADC, 0x01);
+
+
+#if 0
+ /* turning adc_on */
+ ret = twl4030_i2c_write_u8(TWL4030_CHIP_MADC, MADC_ON,
+ REG_CTRL1);
+ if (ret)
+ return ret;
+
+#define REG_SW1SELECT_MSB 0x07
+
+ /* setting MDC channel 9 to trigger by SW1 */
+ ret = clear_n_set(TWL4030_CHIP_MADC, 0, SW1_CH9_SEL,
+ REG_SW1SELECT_MSB);
+
+/* LGE_CHANGE_S [skykrkrk@lge.com] 2009-11-12, for PCB Version ADC */
+#ifdef CONFIG_SNIPER
+#define SW1_CH5_SEL 0x20
+#define REG_SW1SELECT_LSB 0x06
+ ret = clear_n_set(TWL4030_CHIP_MADC, 0, SW1_CH5_SEL, REG_SW1SELECT_LSB);
+#endif /* CONFIG_SNIPER */
+/* LGE_CHANGE_E [skykrkrk@lge.com] 2009-11-12, for PCB Version ADC */
+/* LGE_CHANGE_S [taehwan.kim@lge.com] 2010-05-01, for Battery detect */
+#define SW1_CH2_SEL 0x04
+ ret = clear_n_set(TWL4030_CHIP_MADC, 0, SW1_CH2_SEL, REG_SW1SELECT_LSB);
+/* LGE_CHANGE_E [taehwan.kim@lge.com] 2010-05-01, for Battery detect */
+#endif
+
/*
for dss, look at LCD_RESET_N: