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authorT Karthik Reddy2020-05-14 07:49:36 -0600
committerMichal Simek2020-06-24 13:11:08 +0200
commit33d3f8e57754f9b498fa7c14408f2bc20be43900 (patch)
tree1ec95dc0d8eaf878a5f4307ad48f82fa7f2e8662
parentf44bd3bcfd91cd7b1be709c9cfb0824e6a71b9b0 (diff)
arm64: xilinx: Print fpga error value in hex
Fpga returns error value when fails, error status should be printed in hex format. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-rw-r--r--drivers/fpga/versalpl.c2
-rw-r--r--drivers/fpga/zynqmppl.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/fpga/versalpl.c b/drivers/fpga/versalpl.c
index b96519e1a46..8e2ef4f0da9 100644
--- a/drivers/fpga/versalpl.c
+++ b/drivers/fpga/versalpl.c
@@ -45,7 +45,7 @@ static int versal_load(xilinx_desc *desc, const void *buf, size_t bsize,
ret = xilinx_pm_request(VERSAL_PM_LOAD_PDI, VERSAL_PM_PDI_TYPE, buf_lo,
buf_hi, 0, ret_payload);
if (ret)
- puts("PL FPGA LOAD fail\n");
+ printf("PL FPGA LOAD failed with err: 0x%08x\n", ret);
return ret;
}
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 2ac4e389521..5b103cfeaf1 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -239,7 +239,7 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
buf_hi, (u32)bsize, 0, ret_payload);
if (ret)
- puts("PL FPGA LOAD fail\n");
+ printf("PL FPGA LOAD failed with err: 0x%08x\n", ret);
return ret;
}