bcm968360bg: add initial support

This add the initial support of the broadcom reference
board bcm968360bg with a bcm68360 SoC.

This board has 512 MB of RAM, 256 MB of flash (nand),
2 USB port, 1 UART, and 4 ethernet ports.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

9 files changed, 352 insertions, 0 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 94a649f933c..9608f54804d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1834,6 +1834,7 @@ source "board/armltd/vexpress64/Kconfig"
 source "board/broadcom/bcm23550_w1d/Kconfig"
 source "board/broadcom/bcm28155_ap/Kconfig"
 source "board/broadcom/bcm963158/Kconfig"
+source "board/broadcom/bcm968360bg/Kconfig"
 source "board/broadcom/bcm968580xref/Kconfig"
 source "board/broadcom/bcmcygnus/Kconfig"
 source "board/broadcom/bcmnsp/Kconfig"
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 38d0c2a92c3..b48b05fd247 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -859,6 +859,9 @@ dtb-$(CONFIG_ARCH_BCM283X) += \
 dtb-$(CONFIG_ARCH_BCM63158) += \
 	bcm963158.dtb
 
+dtb-$(CONFIG_ARCH_BCM68360) += \
+	bcm968360bg.dtb
+
 dtb-$(CONFIG_ARCH_BCM6858) += \
 	bcm968580xref.dtb
 
diff --git a/arch/arm/dts/bcm968360bg.dts b/arch/arm/dts/bcm968360bg.dts
new file mode 100644
index 00000000000..c060294cc92
--- /dev/null
+++ b/arch/arm/dts/bcm968360bg.dts
@@ -0,0 +1,168 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Philippe Reynes <philippe.reynes@softathome.com>
+ */
+
+/dts-v1/;
+
+#include "bcm68360.dtsi"
+
+/ {
+	model = "Broadcom bcm68360bg";
+	compatible = "broadcom,bcm68360bg", "brcm,bcm68360";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x20000000>;
+	};
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&gpio2 {
+	status = "okay";
+};
+
+&gpio3 {
+	status = "okay";
+};
+
+&gpio4 {
+	status = "okay";
+};
+
+&gpio5 {
+	status = "okay";
+};
+
+&gpio6 {
+	status = "okay";
+};
+
+&gpio7 {
+	status = "okay";
+};
+
+&nand {
+	status = "okay";
+	write-protect = <0>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	nandcs@0 {
+		compatible = "brcm,nandcs";
+		reg = <0>;
+		nand-ecc-strength = <4>;
+		nand-ecc-step-size = <512>;
+		brcm,nand-oob-sector-size = <16>;
+	};
+};
+
+&leds {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+	brcm,serial-led-en-pol;
+	brcm,serial-led-data-ppol;
+
+	led@0 {
+		reg = <0>;
+		label = "red:alarm";
+	};
+
+	led@1 {
+		reg = <1>;
+		label = "green:wan";
+	};
+
+	led@2 {
+		reg = <2>;
+		label = "green:wps";
+	};
+
+	led@12 {
+		reg = <12>;
+		label = "orange:enet5.1";
+	};
+
+	led@13 {
+		reg = <13>;
+		label = "green:enet5.2";
+	};
+
+	led@14 {
+		reg = <14>;
+		label = "orange:enet5.2";
+	};
+
+	led@15 {
+		reg = <15>;
+		label = "green:enet5.1";
+	};
+
+	led@16 {
+		reg = <16>;
+		label = "green:usb1";
+	};
+
+	led@17 {
+		reg = <17>;
+		label = "green:voip1";
+	};
+
+	led@18 {
+		reg = <18>;
+		label = "green:voip2";
+	};
+
+	led@19 {
+		reg = <19>;
+		label = "green:enet6";
+	};
+
+	led@20 {
+		reg = <20>;
+		label = "orange:enet6";
+	};
+
+	led@21 {
+		reg = <21>;
+		label = "green:inet";
+	};
+
+	led@22 {
+		reg = <22>;
+		label = "green:usb2";
+	};
+};
+
+&hsspi {
+	status = "okay";
+
+	flash: mt25@0 {
+		compatible = "jedec,spi-nor";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0>;
+		spi-max-frequency = <25000000>;
+	};
+};
diff --git a/board/broadcom/bcm968360bg/Kconfig b/board/broadcom/bcm968360bg/Kconfig
new file mode 100644
index 00000000000..dd372f126ae
--- /dev/null
+++ b/board/broadcom/bcm968360bg/Kconfig
@@ -0,0 +1,17 @@
+if ARCH_BCM68360
+
+config SYS_VENDOR
+	default "broadcom"
+
+config SYS_BOARD
+	default "bcm968360bg"
+
+config SYS_CONFIG_NAME
+	default "broadcom_bcm968360bg"
+
+endif
+
+config TARGET_BCM968360BG
+	bool "Support Broadcom bcm968360bg"
+	depends on ARCH_BCM68360
+	select ARM64
diff --git a/board/broadcom/bcm968360bg/MAINTAINERS b/board/broadcom/bcm968360bg/MAINTAINERS
new file mode 100644
index 00000000000..cfcbbc51f8e
--- /dev/null
+++ b/board/broadcom/bcm968360bg/MAINTAINERS
@@ -0,0 +1,6 @@
+BCM968360BG BOARD
+M:	Philippe Reynes <philippe.reynes@softathome.com>
+S:	Maintained
+F:	board/broadcom/bcm968360bg
+F:	include/configs/broadcom_bcm968360bg.h
+F:	configs/bcm968360bg_ram_defconfig
diff --git a/board/broadcom/bcm968360bg/Makefile b/board/broadcom/bcm968360bg/Makefile
new file mode 100644
index 00000000000..d099c1cf356
--- /dev/null
+++ b/board/broadcom/bcm968360bg/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-y	+= bcm968360bg.o
diff --git a/board/broadcom/bcm968360bg/bcm968360bg.c b/board/broadcom/bcm968360bg/bcm968360bg.c
new file mode 100644
index 00000000000..a5fbc1d297c
--- /dev/null
+++ b/board/broadcom/bcm968360bg/bcm968360bg.c
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Philippe Reynes <philippe.reynes@softathome.com>
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <linux/io.h>
+
+#ifdef CONFIG_ARM64
+#include <asm/armv8/mmu.h>
+
+static struct mm_region broadcom_bcm968360bg_mem_map[] = {
+	{
+		/* RAM */
+		.virt = 0x00000000UL,
+		.phys = 0x00000000UL,
+		.size = 8UL * SZ_1G,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		/* SoC */
+		.virt = 0x80000000UL,
+		.phys = 0x80000000UL,
+		.size = 0xff80000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* List terminator */
+		0,
+	}
+};
+
+struct mm_region *mem_map = broadcom_bcm968360bg_mem_map;
+#endif
+
+int board_init(void)
+{
+	return 0;
+}
+
+int dram_init(void)
+{
+	if (fdtdec_setup_mem_size_base() != 0)
+		printf("fdtdec_setup_mem_size_base() has failed\n");
+
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	fdtdec_setup_memory_banksize();
+
+	return 0;
+}
+
+int print_cpuinfo(void)
+{
+	return 0;
+}
diff --git a/configs/bcm968360bg_ram_defconfig b/configs/bcm968360bg_ram_defconfig
new file mode 100644
index 00000000000..4a4c1fd1c74
--- /dev/null
+++ b/configs/bcm968360bg_ram_defconfig
@@ -0,0 +1,53 @@
+CONFIG_ARM=y
+CONFIG_ARCH_BCM68360=y
+CONFIG_SYS_TEXT_BASE=0x10000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_TARGET_BCM968360BG=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
+CONFIG_DOS_PARTITION=y
+CONFIG_ISO_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_DEFAULT_DEVICE_TREE="bcm968360bg"
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_NET is not set
+CONFIG_BLK=y
+CONFIG_CLK=y
+CONFIG_DM_GPIO=y
+CONFIG_BCM6345_GPIO=y
+CONFIG_LED=y
+CONFIG_LED_BCM6858=y
+CONFIG_LED_BLINK=y
+# CONFIG_MMC is not set
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_NAND_BRCMNAND=y
+CONFIG_NAND_BRCMNAND_68360=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPECIFY_CONSOLE_INDEX=y
+CONFIG_CONS_INDEX=0
+CONFIG_DM_SERIAL=y
+CONFIG_SERIAL_SEARCH_ALL=y
+CONFIG_BCM6345_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_BCM63XX_HSSPI=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_WATCHDOG=y
+CONFIG_WDT_BCM6345=y
diff --git a/include/configs/broadcom_bcm968360bg.h b/include/configs/broadcom_bcm968360bg.h
new file mode 100644
index 00000000000..77690ff40f7
--- /dev/null
+++ b/include/configs/broadcom_bcm968360bg.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2020 Philippe Reynes <philippe.reynes@softathome.com>
+ */
+
+#include <linux/sizes.h>
+
+/*
+ * common
+ */
+
+/* UART */
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, \
+					  230400, 500000, 1500000 }
+/* Memory usage */
+#define CONFIG_SYS_MAXARGS		24
+#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)
+
+/*
+ * 6858
+ */
+
+/* RAM */
+#define CONFIG_SYS_SDRAM_BASE		0x00000000
+
+/* U-Boot */
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + SZ_16M)
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#ifdef CONFIG_MTD_RAW_NAND
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_SELF_INIT
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+#endif /* CONFIG_MTD_RAW_NAND */
+
+/*
+ * 968360bg
+ */