diff options
author | Vikas Manocha | 2016-02-05 10:43:01 -0800 |
---|---|---|
committer | Tom Rini | 2017-03-17 14:15:11 -0400 |
commit | c62c1b3c24408bdc48fba92d1ed6011e3a053beb (patch) | |
tree | f77958e604fa2a6868d54958b7876c80cf637b2f | |
parent | 431afb4ef9fe89e5350b5d497be4c5f8d270393e (diff) |
arm: use common instructions applicable to armv7m & other arm archs
This patch cleans the code by using instructions allowed for armv7m as well as
other Arm archs.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
-rw-r--r-- | arch/arm/lib/crt0.S | 25 |
1 files changed, 7 insertions, 18 deletions
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S index 8415f77e1b1..2c4867ab7f4 100644 --- a/arch/arm/lib/crt0.S +++ b/arch/arm/lib/crt0.S @@ -71,18 +71,12 @@ ENTRY(_main) */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK) - ldr sp, =(CONFIG_SPL_STACK) + ldr r0, =(CONFIG_SPL_STACK) #else - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + ldr r0, =(CONFIG_SYS_INIT_SP_ADDR) #endif -#if defined(CONFIG_CPU_V7M) /* v7M forbids using SP as BIC destination */ - mov r3, sp - bic r3, r3, #7 - mov sp, r3 -#else - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ -#endif - mov r0, sp + bic r0, r0, #7 /* 8-byte alignment for ABI compliance */ + mov sp, r0 bl board_init_f_alloc_reserve mov sp, r0 /* set up gd here, outside any C code */ @@ -100,14 +94,9 @@ ENTRY(_main) * 'here' but relocated. */ - ldr sp, [r9, #GD_START_ADDR_SP] /* sp = gd->start_addr_sp */ -#if defined(CONFIG_CPU_V7M) /* v7M forbids using SP as BIC destination */ - mov r3, sp - bic r3, r3, #7 - mov sp, r3 -#else - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ -#endif + ldr r0, [r9, #GD_START_ADDR_SP] /* sp = gd->start_addr_sp */ + bic r0, r0, #7 /* 8-byte alignment for ABI compliance */ + mov sp, r0 ldr r9, [r9, #GD_BD] /* r9 = gd->bd */ sub r9, r9, #GD_SIZE /* new GD is below bd */ |