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authorYangbo Lu2019-11-12 19:28:38 +0800
committerPeng Fan2019-11-27 16:55:56 +0800
commitd3eb317ea50ef763a5a1ef5ff4e2bc19498542d1 (patch)
tree1e93247139eff9a521651669e8183f274383f105
parentd9114e2b73552be7f9035c7567ea14febefa0dce (diff)
arm: drop eSDHC clock getting in mxc_get_clock() for layerscape
Although layerscape platforms reuse mxc_get_clock() of i.MX platforms, eSDHC clock getting do not have to use it. It uses global data gd->arch.sdhc_clk directly in fsl_esdhc driver. Even there are more than one eSDHC controllers on SoC, they use same reference clock. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
-rw-r--r--arch/arm/cpu/armv7/ls102xa/clock.c2
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c15
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c15
-rw-r--r--arch/arm/include/asm/arch-fsl-layerscape/clock.h2
-rw-r--r--arch/arm/include/asm/arch-ls102xa/clock.h1
5 files changed, 0 insertions, 35 deletions
diff --git a/arch/arm/cpu/armv7/ls102xa/clock.c b/arch/arm/cpu/armv7/ls102xa/clock.c
index 30c7b37f1a9..7a1053cebb4 100644
--- a/arch/arm/cpu/armv7/ls102xa/clock.c
+++ b/arch/arm/cpu/armv7/ls102xa/clock.c
@@ -109,8 +109,6 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
switch (clk) {
case MXC_I2C_CLK:
return get_bus_freq(0) / 2;
- case MXC_ESDHC_CLK:
- return get_bus_freq(0);
case MXC_DSPI_CLK:
return get_bus_freq(0) / 2;
case MXC_UART_CLK:
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
index df4df9aca79..6d82cfeb58e 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
@@ -227,16 +227,6 @@ ulong get_ddr_freq(ulong dummy)
return gd->mem_clk;
}
-#ifdef CONFIG_FSL_ESDHC
-int get_sdhc_freq(ulong dummy)
-{
- if (!gd->arch.sdhc_clk)
- get_clocks();
-
- return gd->arch.sdhc_clk;
-}
-#endif
-
int get_serial_clock(void)
{
return get_bus_freq(0) / CONFIG_SYS_FSL_DUART_CLK_DIV;
@@ -264,11 +254,6 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
switch (clk) {
case MXC_I2C_CLK:
return get_i2c_freq(0);
-#if defined(CONFIG_FSL_ESDHC)
- case MXC_ESDHC_CLK:
- case MXC_ESDHC2_CLK:
- return get_sdhc_freq(0);
-#endif
case MXC_DSPI_CLK:
return get_dspi_freq(0);
#ifdef CONFIG_FSL_LPUART
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
index bbd550b0365..ede96742aad 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
@@ -236,16 +236,6 @@ int get_dspi_freq(ulong dummy)
return get_bus_freq(0) / CONFIG_SYS_FSL_DSPI_CLK_DIV;
}
-#ifdef CONFIG_FSL_ESDHC
-int get_sdhc_freq(ulong dummy)
-{
- if (!gd->arch.sdhc_clk)
- get_clocks();
-
- return gd->arch.sdhc_clk;
-}
-#endif
-
int get_serial_clock(void)
{
return get_bus_freq(0) / CONFIG_SYS_FSL_DUART_CLK_DIV;
@@ -256,11 +246,6 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
switch (clk) {
case MXC_I2C_CLK:
return get_i2c_freq(0);
-#if defined(CONFIG_FSL_ESDHC)
- case MXC_ESDHC_CLK:
- case MXC_ESDHC2_CLK:
- return get_sdhc_freq(0);
-#endif
case MXC_DSPI_CLK:
return get_dspi_freq(0);
default:
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/clock.h b/arch/arm/include/asm/arch-fsl-layerscape/clock.h
index b37a08d2653..95d6156476f 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/clock.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/clock.h
@@ -14,8 +14,6 @@ enum mxc_clock {
MXC_ARM_CLK = 0,
MXC_BUS_CLK,
MXC_UART_CLK,
- MXC_ESDHC_CLK,
- MXC_ESDHC2_CLK,
MXC_I2C_CLK,
MXC_DSPI_CLK,
};
diff --git a/arch/arm/include/asm/arch-ls102xa/clock.h b/arch/arm/include/asm/arch-ls102xa/clock.h
index bf67df561a0..e66e57f7598 100644
--- a/arch/arm/include/asm/arch-ls102xa/clock.h
+++ b/arch/arm/include/asm/arch-ls102xa/clock.h
@@ -12,7 +12,6 @@
enum mxc_clock {
MXC_ARM_CLK = 0,
MXC_UART_CLK,
- MXC_ESDHC_CLK,
MXC_I2C_CLK,
MXC_DSPI_CLK,
};