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authorPeng Fan2017-08-08 13:34:52 +0800
committerStefano Babic2017-08-16 11:50:51 +0200
commit11d94319c32cc8590db2f1e186d19f32e652436c (patch)
tree981b4452bda4ee2da6286e8226cd26e893a20a68 /arch/arm/cpu
parent91435cd40d3060d74fe59a7847b666cd24eecf78 (diff)
arm: Implement workaround for Cortex-A9 errata 845369
Under very rare timing circumstances, transitioning into streaming mode might create a data corruption. Present on Two or more processors or 1 core with ACP, all revisions. This erratum can be worked round by setting bit[22] of the undocumented Diagnostic Control Register to 1. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/armv7/start.S6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index f06fd28940e..7b84a7a0f16 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -187,6 +187,12 @@ ENTRY(cpu_init_cp15)
mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
#endif
+#ifdef CONFIG_ARM_ERRATA_845369
+ mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
+ orr r0, r0, #1 << 22 @ set bit #22
+ mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
+#endif
+
mov r5, lr @ Store my Caller
mrc p15, 0, r1, c0, c0, 0 @ r1 has Read Main ID Register (MIDR)
mov r3, r1, lsr #20 @ get variant field