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authorR Sricharan2013-03-04 20:04:45 +0000
committerAlbert ARIBAUD2013-03-28 09:10:58 +0100
commitde63ac278cbaaa387da3efaf0b21b819c2b0c496 (patch)
tree0fd5fac28bf5733062dee5a14881508569f4d709 /arch/arm/lib
parent96fdbec2f96c9e11758c8742409069eeef841722 (diff)
ARM: mmu: Set domain permissions to client access
The 'XN' execute never bit is set in the pagetables. This will prevent speculative prefetches to non executable regions. But the domain permissions are set as master in the DACR register. So the pagetable attribute for 'XN' is not effective. Change the permissions to client. This fixes lot of speculative prefetch aborts seen on OMAP5 secure devices. Signed-off-by: R Sricharan <r.sricharan@ti.com> Tested-by: Vincent Stehle <v-stehle@ti.com> Cc: Vincent Stehle <v-stehle@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Diffstat (limited to 'arch/arm/lib')
-rw-r--r--arch/arm/lib/cache-cp15.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 6ecbedfed96..4abe1cf061a 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -36,6 +36,10 @@ void __arm_init_before_mmu(void)
void arm_init_before_mmu(void)
__attribute__((weak, alias("__arm_init_before_mmu")));
+__weak void arm_init_domains(void)
+{
+}
+
static void cp_delay (void)
{
volatile int i;
@@ -117,6 +121,9 @@ static inline void mmu_setup(void)
/* Set the access control to all-supervisor */
asm volatile("mcr p15, 0, %0, c3, c0, 0"
: : "r" (~0));
+
+ arm_init_domains();
+
/* and enable the mmu */
reg = get_cr(); /* get control reg. */
cp_delay();