diff options
| author | Michal Simek | 2021-10-15 14:48:20 +0200 |
|---|---|---|
| committer | Michal Simek | 2021-10-21 08:52:30 +0200 |
| commit | 599becb0ae6a8a52db74c2922f0c8ea601d7b003 (patch) | |
| tree | c9aa15607f4d718abecc9d72a42e9f612b09dd8b /arch/arm | |
| parent | d2d14383bae4732c11b68c14aa33cf7b9f3bf40c (diff) | |
arm64: zynqmp: Fix sgmii clock input freq for p-a2197
Input frequency for sgmii is 125MHz on all Xilinx designs.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/87153c59cc526f5955b3bff3db11027b5848c042.1634302099.git.michal.simek@xilinx.com
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/dts/zynqmp-p-a2197-00-revA.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts index c893aaaafd8..5d21795de9d 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts @@ -46,7 +46,7 @@ si5332_1: si5332_1 { /* clk0_sgmii - u142 */ compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <33333333>; /* FIXME */ + clock-frequency = <125000000>; }; si5332_2: si5332_2 { /* clk1_usb - u142 */ |