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authorRick Chen2019-04-30 13:49:35 +0800
committerAndes2019-05-09 16:46:46 +0800
commitf9281b8905d50d1f284df92f53534ffb8d2558a8 (patch)
tree83505bfad6d301945a8e3e4d740fc0c8e3712a83 /arch/riscv/cpu/start.S
parente7e47f6391d13bd7e6d5dd705c548d0260a88c55 (diff)
riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled
This patch will fix prior_stage_fdt_address write failure problem, when AE350 boots from flash. When AE350 boots from flash, prior_stage_fdt_address will be flash address, we shall avoid it to be written. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Diffstat (limited to 'arch/riscv/cpu/start.S')
-rw-r--r--arch/riscv/cpu/start.S2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 3402d09a054..60ac8c621e4 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -111,8 +111,10 @@ call_board_init_f_0:
bnez tp, secondary_hart_loop
#endif
+#ifdef CONFIG_OF_PRIOR_STAGE
la t0, prior_stage_fdt_address
SREG s1, 0(t0)
+#endif
jal board_init_f_init_reserve