diff options
author | Masahiro Yamada | 2017-05-12 22:49:02 +0900 |
---|---|---|
committer | Masahiro Yamada | 2017-05-17 21:50:31 +0900 |
commit | 45f41c134baf5ff1bbf59d33027f6c79884fa4d9 (patch) | |
tree | 1bad533a1d01e3c6fc2d384c46b8e67794b3b333 /arch | |
parent | 8d3064d9a93a14fdec9e6963766ed77cf3f826a1 (diff) |
ARM: uniphier: add weird workaround code for LD20
When booting from ARM Trusted Firmware, U-Boot runs in EL1-NS.
The boot flow is as follows:
BL1 -> BL2 -> BL31 -> BL33 (i.e. U-Boot)
This boot sequence works fine for LD11 SoC (Cortex-A53), but LD20
SoC (Cortex-A72) hangs in U-Boot. The solution I found is to
read sctlr_el1 and write back the value as-is. This should be
no effect, but surprisingly fixes the problem for LD20 to boot.
I do not know why.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-uniphier/arm64/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/mach-uniphier/arm64/lowlevel_init.S | 14 |
2 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/arm64/Makefile b/arch/arm/mach-uniphier/arm64/Makefile index eb34c207ce0..06072f23bd8 100644 --- a/arch/arm/mach-uniphier/arm64/Makefile +++ b/arch/arm/mach-uniphier/arm64/Makefile @@ -9,5 +9,7 @@ obj-y += mem_map.o ifdef CONFIG_ARMV8_MULTIENTRY obj-y += smp.o smp_kick_cpus.o obj-$(CONFIG_ARCH_UNIPHIER_LD20) += arm-cci500.o +else +obj-$(CONFIG_ARCH_UNIPHIER_LD20) += lowlevel_init.o endif endif diff --git a/arch/arm/mach-uniphier/arm64/lowlevel_init.S b/arch/arm/mach-uniphier/arm64/lowlevel_init.S new file mode 100644 index 00000000000..e52db1d7fc3 --- /dev/null +++ b/arch/arm/mach-uniphier/arm64/lowlevel_init.S @@ -0,0 +1,14 @@ +/* + * Copyright (C) 2017 Socionext Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/linkage.h> + +ENTRY(lowlevel_init) + /* LD20 needs the following code to boot. I do not know why. */ + mrs x0, sctlr_el1 + msr sctlr_el1, x0 + ret +ENDPROC(lowlevel_init) |