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authorTom Rini2020-07-07 12:55:57 -0400
committerTom Rini2020-07-07 12:55:57 -0400
commitc4df37bfa916d6516d67dde6ef9d1b18b36041d3 (patch)
tree983277a53c1643566863e8ae73950a931dc661b5 /arch
parentf8ddd8cbb513cefcdd4beeff0cd25ba8f97a5860 (diff)
parent59dab842f98f9144bce1e535ef9df6f0e1a25e03 (diff)
Merge tag 'u-boot-atmel-2020.10-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
First set of u-boot-atmel features for 2020.10 cycle
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/dts/sama5d3.dtsi12
-rw-r--r--arch/arm/dts/sama5d4.dtsi12
3 files changed, 13 insertions, 12 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index fb1e38de0c4..760e9013645 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -532,6 +532,7 @@ choice
config ARCH_AT91
bool "Atmel AT91"
select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
+ select SPL_SEPARATE_BSS if SPL
config TARGET_EDB93XX
bool "Support edb93xx"
diff --git a/arch/arm/dts/sama5d3.dtsi b/arch/arm/dts/sama5d3.dtsi
index 7db66c5d503..6ed218eaad3 100644
--- a/arch/arm/dts/sama5d3.dtsi
+++ b/arch/arm/dts/sama5d3.dtsi
@@ -1447,37 +1447,37 @@
atmel,nb-banks = <2>;
};
- ep10: endpoint@10 {
+ ep10: endpoint@a {
reg = <10>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <2>;
};
- ep11: endpoint@11 {
+ ep11: endpoint@b {
reg = <11>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <2>;
};
- ep12: endpoint@12 {
+ ep12: endpoint@c {
reg = <12>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <2>;
};
- ep13: endpoint@13 {
+ ep13: endpoint@d {
reg = <13>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <2>;
};
- ep14: endpoint@14 {
+ ep14: endpoint@e {
reg = <14>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <2>;
};
- ep15: endpoint@15 {
+ ep15: endpoint@f {
reg = <15>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <2>;
diff --git a/arch/arm/dts/sama5d4.dtsi b/arch/arm/dts/sama5d4.dtsi
index 8875d7ba769..e1df24cdbea 100644
--- a/arch/arm/dts/sama5d4.dtsi
+++ b/arch/arm/dts/sama5d4.dtsi
@@ -212,42 +212,42 @@
atmel,can-isoc;
};
- ep10: endpoint@10 {
+ ep10: endpoint@a {
reg = <10>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <2>;
atmel,can-isoc;
};
- ep11: endpoint@11 {
+ ep11: endpoint@b {
reg = <11>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <2>;
atmel,can-isoc;
};
- ep12: endpoint@12 {
+ ep12: endpoint@c {
reg = <12>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <2>;
atmel,can-isoc;
};
- ep13: endpoint@13 {
+ ep13: endpoint@d {
reg = <13>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <2>;
atmel,can-isoc;
};
- ep14: endpoint@14 {
+ ep14: endpoint@e {
reg = <14>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <2>;
atmel,can-isoc;
};
- ep15: endpoint@15 {
+ ep15: endpoint@f {
reg = <15>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <2>;