diff options
| author | Rayagonda Kokatanur | 2020-07-15 22:49:04 +0530 |
|---|---|---|
| committer | Tom Rini | 2020-07-29 10:37:11 -0400 |
| commit | c8b98482d8b320be73f9eb8b8794f09dcb5044bd (patch) | |
| tree | feccb9a8b8d128992a249135dfc16495949da60a /arch | |
| parent | 3edecba78413c46ccafedfb111f28eafbaf527d1 (diff) | |
board: ns3: define ddr memory layout
Add both DRAM banks memory information and
the corresponding MMU page table mappings.
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/ns3-board.dts | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/dts/ns3-board.dts b/arch/arm/dts/ns3-board.dts index 54e56879a5f..4e0966a1323 100644 --- a/arch/arm/dts/ns3-board.dts +++ b/arch/arm/dts/ns3-board.dts @@ -5,6 +5,29 @@ /dts-v1/; +#include <dt-bindings/memory/bcm-ns3-mc.h> + +/* + * Single mem reserve region which includes the following: + * Components name Start Addr Size + * ------------------------------------------------ + * GIC LPI tables 0x8ad7_0000 0x0009_0000 + * Nitro FW 0x8ae0_0000 0x0020_0000 + * Nitro Crash dump 0x8b00_0000 0x0200_0000 + * OPTEE OS 0x8d00_0000 0x0200_0000 + * BL31 services 0x8f00_0000 0x0010_0000 + * Tmon 0x8f10_0000 0x0000_1000 + * LPM/reserved 0x8f10_1000 0x0000_1000 + * ATF to Bl33 info 0x8f10_2000 0x0000_1000 + * ATF error logs 0x8f10_3000 0x0001_0000 + * Error log parser 0x8f11_3000 0x0010_0000 + */ + +/memreserve/ BCM_NS3_MEM_RSVE_START BCM_NS3_MEM_RSVE_END; + +/* CRMU page tables */ +/memreserve/ BCM_NS3_CRMU_PGT_START BCM_NS3_CRMU_PGT_SIZE; + #include "ns3.dtsi" / { |