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authorJean-Christophe PLAGNIOL-VILLARD2009-04-05 13:06:31 +0200
committerJean-Christophe PLAGNIOL-VILLARD2009-04-05 13:06:31 +0200
commitb3acb6cd4059dfb29a5e99095d802717f53ff784 (patch)
tree0578103fde893d08e5b6127db4df18833ae3d075 /board/armltd
parent677e62f43235de9a1701204d7bcea0fb3d233fa1 (diff)
arm: clean cache management
unify arm cache management except for non standard cache as ARM7TDMI Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/armltd')
-rwxr-xr-xboard/armltd/integratorap/split_by_variant.sh18
1 files changed, 15 insertions, 3 deletions
diff --git a/board/armltd/integratorap/split_by_variant.sh b/board/armltd/integratorap/split_by_variant.sh
index 51dc53f1bd6..2c9fe2e5192 100755
--- a/board/armltd/integratorap/split_by_variant.sh
+++ b/board/armltd/integratorap/split_by_variant.sh
@@ -84,8 +84,8 @@ else
esac
fi
-if [ "$cpu" = "arm_intcm" ]
-then
+case "$cpu" in
+ arm_intcm)
echo "/* Core module undefined/not ported */" >> tmp.fil
echo "#define CONFIG_ARM_INTCM 1" >> tmp.fil
echo -n "#undef CONFIG_CM_MULTIPLE_SSRAM" >> tmp.fil
@@ -102,7 +102,19 @@ then
echo "initialization reg */" >> tmp.fil
echo -n "#undef CONFIG_CM_TCRAM " >> tmp.fil
echo " /* CM may not have TCRAM */" >> tmp.fil
-fi
+ echo -n " /* May not be processor " >> tmp.fil
+ echo "without cache support */" >> tmp.fil
+ echo "#define CONFIG_SYS_NO_ICACHE 1" >> tmp.fil
+ echo "#define CONFIG_SYS_NO_DCACHE 1" >> tmp.fil
+ ;;
+
+ arm720t)
+ echo -n " /* May not be processor " >> tmp.fil
+ echo "without cache support */" >> tmp.fil
+ echo "#define CONFIG_SYS_NO_ICACHE 1" >> tmp.fil
+ echo "#define CONFIG_SYS_NO_DCACHE 1" >> tmp.fil
+ ;;
+esac
mkdir -p ${obj}include
mkdir -p ${obj}board/armltd/integratorap