diff options
| author | Marek Vasut | 2023-03-06 15:53:53 +0100 |
|---|---|---|
| committer | Stefano Babic | 2023-03-30 13:51:33 +0200 |
| commit | 599474120a089924aaa502b701600b2fe4b6270c (patch) | |
| tree | 39700fc6ed88f636f901847b6c163ddc64065d04 /board/engicam | |
| parent | c7ea9612df0f89613a37ebe44ee2f48afc3493d3 (diff) | |
arm64: imx8mp: Drop EQoS GPR[1] board workaround
The EQoS interface mode is now configured in common board_interface_eth_init()
and called by EQoS MAC driver when appropriate. Drop the board side duplicates
if the same functionality.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'board/engicam')
| -rw-r--r-- | board/engicam/imx8mp/icore_mx8mp.c | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/board/engicam/imx8mp/icore_mx8mp.c b/board/engicam/imx8mp/icore_mx8mp.c index 500080c7cff..5f820cc8dd7 100644 --- a/board/engicam/imx8mp/icore_mx8mp.c +++ b/board/engicam/imx8mp/icore_mx8mp.c @@ -34,19 +34,6 @@ static void setup_fec(void) setbits_le32(&gpr->gpr[1], BIT(22)); } -static int setup_eqos(void) -{ - struct iomuxc_gpr_base_regs *gpr = - (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; - - /* set INTF as RGMII, enable RGMII TXC clock */ - clrsetbits_le32(&gpr->gpr[1], - IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK, BIT(16)); - setbits_le32(&gpr->gpr[1], BIT(19) | BIT(21)); - - return set_clk_eqos(ENET_125MHZ); -} - #if CONFIG_IS_ENABLED(NET) int board_phy_config(struct phy_device *phydev) { @@ -61,9 +48,6 @@ int board_init(void) if (IS_ENABLED(CONFIG_FEC_MXC)) setup_fec(); - if (IS_ENABLED(CONFIG_DWC_ETH_QOS)) - setup_eqos(); - return 0; } |