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authorNick Hawkins2022-06-08 16:21:37 -0500
committerTom Rini2022-06-22 21:30:05 -0400
commite7ea0a2ba3ec6bc9392270aa97e4d3f8a196d91a (patch)
treec004dcd48f2bce4442652257fc3ade875c29f5f6 /board/hpe/gxp
parent4f689b3d86be92625ec0593779590ab5ccfd8171 (diff)
board: hpe: gxp: add HPE GXP soc support
Add basic support for the HPE GXP SoC. Reset the EHCI controller at boot. Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
Diffstat (limited to 'board/hpe/gxp')
-rw-r--r--board/hpe/gxp/Kconfig46
-rw-r--r--board/hpe/gxp/Makefile1
-rw-r--r--board/hpe/gxp/gxp_board.c75
3 files changed, 122 insertions, 0 deletions
diff --git a/board/hpe/gxp/Kconfig b/board/hpe/gxp/Kconfig
new file mode 100644
index 00000000000..5b154a3f6e5
--- /dev/null
+++ b/board/hpe/gxp/Kconfig
@@ -0,0 +1,46 @@
+choice
+ prompt "SoC select"
+
+config TARGET_GXP
+ bool "GXP"
+ select DM
+ select SOC_GXP
+ imply CMD_DM
+
+config TARGET_GXP2
+ bool "GXP2"
+ select DM
+ select SOC_GXP
+ select GXP_ECC
+ imply CMD_DM
+
+endchoice
+
+choice
+ prompt "GXP VROM size"
+ default GXP_VROM_64MB
+ optional
+
+config GXP_VROM_64MB
+ bool "64MB"
+
+config GXP_VROM_32MB
+ bool "32MB"
+endchoice
+
+config GXP_ECC
+ bool "Enable memory ECC protected"
+ help
+ Use half of memory to enable ECC protected
+
+config SYS_BOARD
+ default "gxp"
+
+config SYS_VENDOR
+ default "hpe"
+
+config SYS_CONFIG_NAME
+ default "gxp"
+
+config SYS_TEXT_BASE
+ default 0x50000000
diff --git a/board/hpe/gxp/Makefile b/board/hpe/gxp/Makefile
new file mode 100644
index 00000000000..775d6bf8497
--- /dev/null
+++ b/board/hpe/gxp/Makefile
@@ -0,0 +1 @@
+obj-y += gxp_board.o
diff --git a/board/hpe/gxp/gxp_board.c b/board/hpe/gxp/gxp_board.c
new file mode 100644
index 00000000000..d94d9b8a19e
--- /dev/null
+++ b/board/hpe/gxp/gxp_board.c
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * GXP timer driver
+ *
+ * (C) Copyright 2022 Hewlett Packard Enterprise Development LP.
+ * Author: Nick Hawkins <nick.hawkins@hpe.com>
+ * Author: Jean-Marie Verdun <verdun@hpe.com>
+ */
+
+#include <linux/sizes.h>
+#include <asm/io.h>
+#include <dm.h>
+#include <dm/uclass.h>
+#include <ram.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define ECHI_CMD 0xcefe0010
+
+int board_init(void)
+{
+ writel(0x00080002, ECHI_CMD);
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ if (IS_ENABLED(CONFIG_TARGET_GXP)) {
+ if (IS_ENABLED(CONFIG_GXP_ECC)) {
+ /* 0x0f800000 */
+ gd->ram_size = SZ_128M + SZ_64M + SZ_32M + SZ_16M + SZ_8M;
+ } else {
+ /* 0x1f000000 */
+ gd->ram_size = SZ_256M + SZ_128M + SZ_64M + SZ_32M + SZ_16M;
+ }
+
+ if (IS_ENABLED(CONFIG_GXP_VROM_64MB)) {
+ if (IS_ENABLED(CONFIG_GXP_ECC)) {
+ /* 0x0c000000 */
+ gd->ram_size = SZ_128M + SZ_64M;
+ } else {
+ /* 0x18000000 */
+ gd->ram_size = SZ_256M + SZ_128M;
+ }
+ }
+
+ if (IS_ENABLED(CONFIG_GXP_VROM_32MB)) {
+ if (IS_ENABLED(CONFIG_GXP_ECC)) {
+ /* 0x0e000000 */
+ gd->ram_size = SZ_128M + SZ_64M + SZ_32M;
+ } else {
+ /* 0x1c000000 */
+ gd->ram_size = SZ_256M + SZ_128M + SZ_64M;
+ }
+ }
+ }
+
+ if (IS_ENABLED(CONFIG_TARGET_GXP2)) {
+ /* 0x1b200000 */
+ gd->ram_size = SZ_256M + SZ_128M + SZ_32M + SZ_16M + SZ_2M;
+ if (IS_ENABLED(CONFIG_GXP_VROM_64MB)) {
+ /* 0x14000000 */
+ gd->ram_size = SZ_256M + SZ_64M;
+ }
+
+ if (IS_ENABLED(CONFIG_GXP_VROM_32MB)) {
+ /* 0x18000000 */
+ gd->ram_size = SZ_256M + SZ_128M;
+ }
+ }
+
+ return 0;
+}
+