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authorBin Meng2016-02-01 01:40:48 -0800
committerBin Meng2016-02-05 12:47:21 +0800
commit2b7ff26115ed638e7edbbacffc3d50a521c9f3ee (patch)
tree8720c46a9e8805bc23ff32746f511460be487fd7 /board/intel
parent3ddc1c7bd36addc0789c50edf71e45258a2b8901 (diff)
x86: Drop asm/arch/gpio.h
asm/arch/gpio.h is not needed anymore as we get the GPIO base from PCH driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'board/intel')
-rw-r--r--board/intel/galileo/galileo.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/board/intel/galileo/galileo.c b/board/intel/galileo/galileo.c
index c1087acb690..212c9702d3a 100644
--- a/board/intel/galileo/galileo.c
+++ b/board/intel/galileo/galileo.c
@@ -7,7 +7,6 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/device.h>
-#include <asm/arch/gpio.h>
#include <asm/arch/quark.h>
int board_early_init_f(void)
@@ -30,7 +29,7 @@ void board_assert_perst(void)
u32 base, port, val;
/* retrieve the GPIO IO base */
- qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, PCI_CFG_GPIOBASE, &base);
+ qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base);
base = (base & 0xffff) & ~0x7f;
/* enable the pin */
@@ -57,7 +56,7 @@ void board_deassert_perst(void)
u32 base, port, val;
/* retrieve the GPIO IO base */
- qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, PCI_CFG_GPIOBASE, &base);
+ qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base);
base = (base & 0xffff) & ~0x7f;
/* pull it up (de-assert) */