diff options
| author | Marek Vasut | 2018-04-12 15:48:54 +0200 |
|---|---|---|
| committer | Marek Vasut | 2018-04-13 23:41:45 +0200 |
| commit | 68b83cb76bae38e88cd460ccfb7ee5862d58947f (patch) | |
| tree | 09e09569eb50b9f414722c2e00b7838d97a1bd1c /board/renesas | |
| parent | 27d7f04a472b33c85f880013dbc64ed2660064df (diff) | |
ARM: rmobile: Fix LBSC programming offset on M2 Porter
The offset of CSWCRx starts at 0x30, fix this.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'board/renesas')
| -rw-r--r-- | board/renesas/porter/porter_spl.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/board/renesas/porter/porter_spl.c b/board/renesas/porter/porter_spl.c index f711aa9c356..4b4dd4d4aa5 100644 --- a/board/renesas/porter/porter_spl.c +++ b/board/renesas/porter/porter_spl.c @@ -169,8 +169,8 @@ static void tpl_init_lbsc(void) static const struct reg_config lbsc_config[] = { { 0x00, 0x00000020 }, { 0x08, 0x00002020 }, - { 0x10, 0x2a103320 }, - { 0x18, 0xff70ff70 }, + { 0x30, 0x2a103320 }, + { 0x38, 0xff70ff70 }, }; static const u16 lbsc_offs[] = { |