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authorPeng Fan2022-06-11 20:20:59 +0800
committerStefano Babic2022-06-14 21:33:13 +0200
commitbb9e14cfd0e8adc3e8a5a5d112cd7a4ca5c39472 (patch)
tree341d1aaed9b61fbfa31c0cb14ab2952af6d1f128 /board/variscite
parent64d118b27f96aed81c2922e20d2b5db9e32a465f (diff)
imx: imx8mn_var_som: enable DM_SERIAL
Enable CONFIG_DM_SERIAL. uart and its pinmux was already marked with u-boot,dm-spl. Move preloader_console_init after spl_init to make sure driver model work. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
Diffstat (limited to 'board/variscite')
-rw-r--r--board/variscite/imx8mn_var_som/spl.c11
1 files changed, 2 insertions, 9 deletions
diff --git a/board/variscite/imx8mn_var_som/spl.c b/board/variscite/imx8mn_var_som/spl.c
index 32703c5f0b3..1a8b64fc0a9 100644
--- a/board/variscite/imx8mn_var_som/spl.c
+++ b/board/variscite/imx8mn_var_som/spl.c
@@ -40,14 +40,8 @@ void spl_board_init(void)
puts("Failed to find clock node. Check device tree\n");
}
-#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
-static const iomux_v3_cfg_t uart_pads[] = {
- IMX8MN_PAD_UART4_RXD__UART4_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
- IMX8MN_PAD_UART4_TXD__UART4_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
static const iomux_v3_cfg_t wdog_pads[] = {
IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
};
@@ -59,7 +53,6 @@ int board_early_init_f(void)
imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
set_wdog_reset(wdog);
- imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
init_uart_clk(3);
return 0;
@@ -78,14 +71,14 @@ void board_init_f(ulong dummy)
timer_init();
- preloader_console_init();
-
ret = spl_init();
if (ret) {
debug("spl_init() failed: %d\n", ret);
hang();
}
+ preloader_console_init();
+
/* DDR initialization */
spl_dram_init();