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authorMichal Simek2016-04-01 15:55:47 +0200
committerMichal Simek2016-04-13 18:29:05 +0200
commit658b3a563983281b6617f57b6bf2aee2c92a2101 (patch)
treede966a4e43f7abf05ecadd4cea33005035f6a706 /board/xilinx
parentaa5b52f56c9fcafb485c930319a36f68692af30d (diff)
ARM64: zynqmp: Make DDR detection code work on 32bit system
Define u64 types to be usable on 32bit system because of 64bit address and size cells and 32bit shifts in the code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'board/xilinx')
-rw-r--r--board/xilinx/zynqmp/zynqmp.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 087578cb6b9..529476b0826 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -63,8 +63,8 @@ static phys_size_t fdt_get_reg(const void *fdt, int nodeoffset, void *buf,
int address_cells = fdt_address_cells(fdt, parent_offset);
int size_cells = fdt_size_cells(fdt, parent_offset);
char *p = buf;
- phys_addr_t val;
- phys_size_t vals;
+ u64 val;
+ u64 vals;
debug("%s: addr_cells=%x, size_cell=%x, buf=%p, cell=%p\n",
__func__, address_cells, size_cells, buf, cell);
@@ -166,7 +166,7 @@ int dram_init(void)
gd->ram_size = fdt_get_reg(blob, node, &tmp, cell, len / FDT_REG_SIZE);
- debug("%s: Initial DRAM size %llx\n", __func__, gd->ram_size);
+ debug("%s: Initial DRAM size %llx\n", __func__, (u64)gd->ram_size);
return 0;
}