global: Migrate CONFIG_SYS_MPC8* symbols to the CFG_SYS namespace

Migrate all of COFIG_SYS_MPC* to the CFG_SYS namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>

28 files changed, 56 insertions, 56 deletions

diff --git a/board/freescale/common/fsl_chain_of_trust.c b/board/freescale/common/fsl_chain_of_trust.c
index ad723534402..3bd570a29c9 100644
--- a/board/freescale/common/fsl_chain_of_trust.c
+++ b/board/freescale/common/fsl_chain_of_trust.c
@@ -28,7 +28,7 @@
 #endif
 
 #if defined(CONFIG_MPC85xx)
-#define CONFIG_DCFG_ADDR	CONFIG_SYS_MPC85xx_GUTS_ADDR
+#define CONFIG_DCFG_ADDR	CFG_SYS_MPC85xx_GUTS_ADDR
 #else
 #define CONFIG_DCFG_ADDR	CONFIG_SYS_FSL_GUTS_ADDR
 #endif
diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c
index 7a23d8f4c7c..bc1b855aaed 100644
--- a/board/freescale/common/fsl_validate.c
+++ b/board/freescale/common/fsl_validate.c
@@ -83,7 +83,7 @@ static u32 check_ie(struct fsl_secboot_img_priv *img)
 
 int get_csf_base_addr(u32 *csf_addr, u32 *flash_base_addr)
 {
-	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	struct ccsr_gur __iomem *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 	u32 csf_hdr_addr = in_be32(&gur->scratchrw[0]);
 	u32 csf_flash_offset = csf_hdr_addr & ~(CONFIG_SYS_PBI_FLASH_BASE);
 	u32 flash_addr, addr;
diff --git a/board/freescale/common/mpc85xx_sleep.c b/board/freescale/common/mpc85xx_sleep.c
index d2bb173c183..71922aab4ef 100644
--- a/board/freescale/common/mpc85xx_sleep.c
+++ b/board/freescale/common/mpc85xx_sleep.c
@@ -24,7 +24,7 @@ void __weak board_sleep_prepare(void)
 
 bool is_warm_boot(void)
 {
-	struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+	struct ccsr_gur __iomem *gur = (void *)CFG_SYS_MPC85xx_GUTS_ADDR;
 
 	if (in_be32(&gur->scrtsr[0]) & DCFG_CCSR_CRSTSR_WDRFR)
 		return 1;
@@ -46,7 +46,7 @@ static void dp_ddr_restore(void)
 {
 	u64 *src, *dst;
 	int i;
-	struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG;
+	struct ccsr_scfg __iomem *scfg = (void *)CFG_SYS_MPC85xx_SCFG;
 
 	/* get the address of ddr date from SPARECR3 */
 	src = (u64 *)(in_be32(&scfg->sparecr[2]) + DDR_BUFF_LEN - 8);
@@ -80,7 +80,7 @@ int fsl_dp_resume(void)
 {
 	u32 start_addr;
 	void (*kernel_resume)(void);
-	struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG;
+	struct ccsr_scfg __iomem *scfg = (void *)CFG_SYS_MPC85xx_SCFG;
 
 	if (!is_warm_boot())
 		return 0;
diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
index d2c9bbbfe99..3f5f33ebafb 100644
--- a/board/freescale/common/vid.c
+++ b/board/freescale/common/vid.c
@@ -542,7 +542,7 @@ int adjust_vdd(ulong vdd_override)
 	struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
 #else
 	ccsr_gur_t __iomem *gur =
-		(void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+		(void __iomem *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 #endif
 	u8 vid;
 	u32 fusesr;
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c
index 8886d8be335..e4c951feb5a 100644
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -33,8 +33,8 @@ void local_bus_init(void);
 
 int checkboard (void)
 {
-	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-	volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
+	volatile ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
+	volatile ccsr_local_ecm_t *ecm = (void *)(CFG_SYS_MPC85xx_ECM_ADDR);
 
 	/* PCI slot in USER bits CSR[6:7] by convention. */
 	uint pci_slot = get_pci_slot ();
@@ -68,7 +68,7 @@ int checkboard (void)
 void
 local_bus_init(void)
 {
-	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	volatile ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 	volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
 
 	uint clkdiv;
diff --git a/board/freescale/p1010rdb/p1010rdb.c b/board/freescale/p1010rdb/p1010rdb.c
index c796330f191..c39df462e3b 100644
--- a/board/freescale/p1010rdb/p1010rdb.c
+++ b/board/freescale/p1010rdb/p1010rdb.c
@@ -82,7 +82,7 @@ struct cpld_data {
 
 int board_early_init_f(void)
 {
-	ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
+	ccsr_gpio_t *pgpio = (void *)(CFG_SYS_MPC85xx_GPIO_ADDR);
 	struct fsl_ifc ifc = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
 	/* Clock configuration to access CPLD using IFC(GPCM) */
 	setbits_be32(&ifc.gregs->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT);
@@ -131,7 +131,7 @@ int board_early_init_r(void)
 
 int config_board_mux(int ctrl_type)
 {
-	ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	ccsr_gur_t __iomem *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 	u8 tmp;
 
 #if CONFIG_IS_ENABLED(DM_I2C)
@@ -668,7 +668,7 @@ void board_reset(void)
 
 int misc_init_r(void)
 {
-	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 
 	if (hwconfig_subarg_cmp("fsl_p1010mux", "tdm_can", "can")) {
 		clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_CAN1_TDM |
diff --git a/board/freescale/p1010rdb/spl.c b/board/freescale/p1010rdb/spl.c
index 88695002deb..0db11f4c5f7 100644
--- a/board/freescale/p1010rdb/spl.c
+++ b/board/freescale/p1010rdb/spl.c
@@ -28,7 +28,7 @@ phys_size_t get_effective_memsize(void)
 void board_init_f(ulong bootflag)
 {
 	u32 plat_ratio;
-	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+	ccsr_gur_t *gur = (void *)CFG_SYS_MPC85xx_GUTS_ADDR;
 	struct fsl_ifc ifc = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
 
 	console_init_f();
diff --git a/board/freescale/p1010rdb/spl_minimal.c b/board/freescale/p1010rdb/spl_minimal.c
index a956c5af5b0..a262d5ca4af 100644
--- a/board/freescale/p1010rdb/spl_minimal.c
+++ b/board/freescale/p1010rdb/spl_minimal.c
@@ -20,7 +20,7 @@ DECLARE_GLOBAL_DATA_PTR;
 void board_init_f(ulong bootflag)
 {
 	u32 plat_ratio;
-	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+	ccsr_gur_t *gur = (void *)CFG_SYS_MPC85xx_GUTS_ADDR;
 
 #if defined(CONFIG_SYS_NAND_BR_PRELIM) && defined(CONFIG_SYS_NAND_OR_PRELIM)
 	set_lbc_br(0, CONFIG_SYS_NAND_BR_PRELIM);
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index b301491ef81..2999c85d0ae 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -149,7 +149,7 @@ void board_cpld_init(void)
 void board_gpio_init(void)
 {
 #ifdef CONFIG_QE
-	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 	par_io_t *par_io = (par_io_t *) &(gur->qe_par_io);
 
 	/* Enable VSC7385 switch */
@@ -159,7 +159,7 @@ void board_gpio_init(void)
 	setbits_be32(&par_io[GPIO_SLIC_PORT].cpdat, GPIO_SLIC_DATA);
 #else
 
-	ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
+	ccsr_gpio_t *pgpio = (void *)(CFG_SYS_MPC85xx_GPIO_ADDR);
 
 	/*
 	 * GPIO10 DDR Reset, open drain
@@ -197,7 +197,7 @@ void board_gpio_init(void)
 
 int board_early_init_f(void)
 {
-	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 
 	setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SDHC_CD);
 #ifndef SDHC_WP_IS_GPIO
@@ -227,7 +227,7 @@ int board_early_init_f(void)
 int checkboard(void)
 {
 	struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
-	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 	u8 in, out, invert, io_config, val;
 	int bus_num = CONFIG_SYS_SPD_BUS_NUM;
 
@@ -370,7 +370,7 @@ int board_eth_init(struct bd_info *bis)
 	struct fsl_pq_mdio_info mdio_info;
 	struct tsec_info_struct tsec_info[4];
 	ccsr_gur_t *gur __attribute__((unused)) =
-		(void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+		(void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 	int num = 0;
 
 #ifdef CONFIG_TSEC1
@@ -418,7 +418,7 @@ int board_eth_init(struct bd_info *bis)
 static void fix_max6370_watchdog(void *blob)
 {
 	int off = fdt_node_offset_by_compatible(blob, -1, "maxim,max6370");
-	ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
+	ccsr_gpio_t *pgpio = (void *)(CFG_SYS_MPC85xx_GPIO_ADDR);
 	u32 gpioval = in_be32(&pgpio->gpdat);
 
 	/*
diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c
index eda84bf2b1f..e7d4428d7c2 100644
--- a/board/freescale/p1_p2_rdb_pc/spl.c
+++ b/board/freescale/p1_p2_rdb_pc/spl.c
@@ -29,7 +29,7 @@ phys_size_t get_effective_memsize(void)
 void board_init_f(ulong bootflag)
 {
 	u32 plat_ratio, bus_clk;
-	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+	ccsr_gur_t *gur = (void *)CFG_SYS_MPC85xx_GUTS_ADDR;
 
 	/*
 	 * Call board_early_init_f() as early as possible as it workarounds
diff --git a/board/freescale/p1_p2_rdb_pc/spl_minimal.c b/board/freescale/p1_p2_rdb_pc/spl_minimal.c
index 72beeadf55c..e467c7adc19 100644
--- a/board/freescale/p1_p2_rdb_pc/spl_minimal.c
+++ b/board/freescale/p1_p2_rdb_pc/spl_minimal.c
@@ -19,7 +19,7 @@ DECLARE_GLOBAL_DATA_PTR;
 void board_init_f(ulong bootflag)
 {
 	u32 plat_ratio;
-	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+	ccsr_gur_t *gur = (void *)CFG_SYS_MPC85xx_GUTS_ADDR;
 
 #if defined(CONFIG_SYS_NAND_BR_PRELIM) && defined(CONFIG_SYS_NAND_OR_PRELIM)
 	set_lbc_br(0, CONFIG_SYS_NAND_BR_PRELIM);
diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c
index 2a84e9bdf55..859ffc4935c 100644
--- a/board/freescale/p2041rdb/p2041rdb.c
+++ b/board/freescale/p2041rdb/p2041rdb.c
@@ -66,7 +66,7 @@ int checkboard(void)
 
 int board_early_init_f(void)
 {
-	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 
 	/* board only uses the DDR_MCK0/1, so disable the DDR_MCK2/3 */
 	setbits_be32(&gur->ddrclkdr, 0x000f000f);
@@ -81,7 +81,7 @@ int board_early_init_f(void)
 
 void board_config_lanes_mux(void)
 {
-	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+	ccsr_gur_t *gur = (void *)CFG_SYS_MPC85xx_GUTS_ADDR;
 	int srds_prtcl = (in_be32(&gur->rcwsr[4]) &
 				FSL_CORENET_RCWSR4_SRDS_PRTCL) >> 26;
 
diff --git a/board/freescale/t102xrdb/eth_t102xrdb.c b/board/freescale/t102xrdb/eth_t102xrdb.c
index 4f04d2ee06d..be42efa5c76 100644
--- a/board/freescale/t102xrdb/eth_t102xrdb.c
+++ b/board/freescale/t102xrdb/eth_t102xrdb.c
@@ -33,7 +33,7 @@ int board_eth_init(struct bd_info *bis)
 	struct memac_mdio_info dtsec_mdio_info;
 	struct memac_mdio_info tgec_mdio_info;
 	struct mii_dev *dev;
-	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 	u32 srds_s1;
 
 	srds_s1 = in_be32(&gur->rcwsr[4]) &
diff --git a/board/freescale/t102xrdb/spl.c b/board/freescale/t102xrdb/spl.c
index af15da5427c..3ba94fecaa2 100644
--- a/board/freescale/t102xrdb/spl.c
+++ b/board/freescale/t102xrdb/spl.c
@@ -29,7 +29,7 @@ phys_size_t get_effective_memsize(void)
 #define GPIO1_SD_SEL 0x00020000
 int board_mmc_getcd(struct mmc *mmc)
 {
-	ccsr_gpio_t __iomem *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
+	ccsr_gpio_t __iomem *pgpio = (void *)(CFG_SYS_MPC85xx_GPIO_ADDR);
 	u32 val = in_be32(&pgpio->gpdat);
 
 	/* GPIO1_14, 0: eMMC, 1: SD */
@@ -40,7 +40,7 @@ int board_mmc_getcd(struct mmc *mmc)
 
 int board_mmc_getwp(struct mmc *mmc)
 {
-	ccsr_gpio_t __iomem *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
+	ccsr_gpio_t __iomem *pgpio = (void *)(CFG_SYS_MPC85xx_GPIO_ADDR);
 	u32 val = in_be32(&pgpio->gpdat);
 
 	val &= GPIO1_SD_SEL;
@@ -52,7 +52,7 @@ int board_mmc_getwp(struct mmc *mmc)
 void board_init_f(ulong bootflag)
 {
 	u32 plat_ratio, sys_clk, ccb_clk;
-	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+	ccsr_gur_t *gur = (void *)CFG_SYS_MPC85xx_GUTS_ADDR;
 
 	/* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
 	memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
diff --git a/board/freescale/t102xrdb/t102xrdb.c b/board/freescale/t102xrdb/t102xrdb.c
index 539a5c73444..f777f5a2fe7 100644
--- a/board/freescale/t102xrdb/t102xrdb.c
+++ b/board/freescale/t102xrdb/t102xrdb.c
@@ -49,7 +49,7 @@ int checkboard(void)
 {
 	struct cpu_type *cpu = gd->arch.cpu;
 	static const char *freq[3] = {"100.00MHZ", "125.00MHz", "156.25MHZ"};
-	ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	ccsr_gur_t __iomem *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 	u32 srds_s1;
 
 	srds_s1 = in_be32(&gur->rcwsr[4]) & FSL_CORENET2_RCWSR4_SRDS1_PRTCL;
@@ -99,7 +99,7 @@ int checkboard(void)
 #ifdef CONFIG_TARGET_T1024RDB
 static void board_mux_lane(void)
 {
-	ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	ccsr_gur_t __iomem *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 	u32 srds_prtcl_s1;
 	u8 reg = CPLD_READ(misc_ctl_status);
 
@@ -222,7 +222,7 @@ static void fdt_enable_nor(void *blob)
 
 int board_mmc_getcd(struct mmc *mmc)
 {
-	ccsr_gpio_t __iomem *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
+	ccsr_gpio_t __iomem *pgpio = (void *)(CFG_SYS_MPC85xx_GPIO_ADDR);
 	u32 val = in_be32(&pgpio->gpdat);
 
 	/* GPIO1_14, 0: eMMC, 1: SD/MMC */
@@ -233,7 +233,7 @@ int board_mmc_getcd(struct mmc *mmc)
 
 int board_mmc_getwp(struct mmc *mmc)
 {
-	ccsr_gpio_t __iomem *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
+	ccsr_gpio_t __iomem *pgpio = (void *)(CFG_SYS_MPC85xx_GPIO_ADDR);
 	u32 val = in_be32(&pgpio->gpdat);
 
 	val &= GPIO1_SD_SEL;
@@ -243,8 +243,8 @@ int board_mmc_getwp(struct mmc *mmc)
 
 static u32 t1023rdb_ctrl(u32 ctrl_type)
 {
-	ccsr_gpio_t __iomem *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
-	ccsr_gur_t __iomem  *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	ccsr_gpio_t __iomem *pgpio = (void *)(CFG_SYS_MPC85xx_GPIO_ADDR);
+	ccsr_gur_t __iomem  *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 	u32 val;
 	u8 tmp;
 	int bus_num = I2C_PCA6408_BUS_NUM;
@@ -274,7 +274,7 @@ static u32 t1023rdb_ctrl(u32 ctrl_type)
 		setbits_be32(&pgpio->gpdir, GPIO1_SD_SEL);
 		break;
 	case GPIO3_GET_VERSION:
-		pgpio = (ccsr_gpio_t *)(CONFIG_SYS_MPC85xx_GPIO_ADDR
+		pgpio = (ccsr_gpio_t *)(CFG_SYS_MPC85xx_GPIO_ADDR
 			 + GPIO3_OFFSET);
 		val = in_be32(&pgpio->gpdat);
 		val = ((val & GPIO3_BRD_VER_MASK) >> 26) & 0x3;
@@ -323,7 +323,7 @@ static u32 t1023rdb_ctrl(u32 ctrl_type)
 		setbits_be32(&pgpio->gpdir, GPIO1_SD_SEL);
 		break;
 	case GPIO3_GET_VERSION:
-		pgpio = (ccsr_gpio_t *)(CONFIG_SYS_MPC85xx_GPIO_ADDR
+		pgpio = (ccsr_gpio_t *)(CFG_SYS_MPC85xx_GPIO_ADDR
 			 + GPIO3_OFFSET);
 		val = in_be32(&pgpio->gpdat);
 		val = ((val & GPIO3_BRD_VER_MASK) >> 26) & 0x3;
diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c
index 3ae5d722aab..bb6641b88a9 100644
--- a/board/freescale/t104xrdb/eth.c
+++ b/board/freescale/t104xrdb/eth.c
@@ -142,7 +142,7 @@ int board_eth_init(struct bd_info *bis)
 	if (serdes_get_first_lane(FSL_SRDS_1, SGMII_FM1_DTSEC2) < 0) {
 		/* Enable L2 On MAC2 using SCFG */
 		struct ccsr_scfg *scfg = (struct ccsr_scfg *)
-				CONFIG_SYS_MPC85xx_SCFG;
+				CFG_SYS_MPC85xx_SCFG;
 
 		out_be32(&scfg->esgmiiselcr, in_be32(&scfg->esgmiiselcr) |
 			 (0x80000000));
diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c
index dfaff1a9165..c7fb4272c63 100644
--- a/board/freescale/t104xrdb/spl.c
+++ b/board/freescale/t104xrdb/spl.c
@@ -33,7 +33,7 @@ void board_init_f(ulong bootflag)
 	u32 porsr1, pinctl;
 	u32 svr = get_svr();
 #endif
-	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+	ccsr_gur_t *gur = (void *)CFG_SYS_MPC85xx_GUTS_ADDR;
 
 #if defined(CONFIG_SPL_NAND_BOOT) && defined(CONFIG_A008044_WORKAROUND)
 	if (IS_SVR_REV(svr, 1, 0)) {
diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c
index 780043483df..7d3fd291a01 100644
--- a/board/freescale/t104xrdb/t104xrdb.c
+++ b/board/freescale/t104xrdb/t104xrdb.c
@@ -93,7 +93,7 @@ int board_early_init_r(void)
 
 int misc_init_r(void)
 {
-	ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	ccsr_gur_t __iomem *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 	u32 srds_s1;
 
 	srds_s1 = in_be32(&gur->rcwsr[4]) >> 24;
diff --git a/board/freescale/t208xqds/eth_t208xqds.c b/board/freescale/t208xqds/eth_t208xqds.c
index 2d7fc8bdda2..dd1c35fa201 100644
--- a/board/freescale/t208xqds/eth_t208xqds.c
+++ b/board/freescale/t208xqds/eth_t208xqds.c
@@ -189,7 +189,7 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
 	const char *phyconn;
 	int off;
 
-	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 #ifdef CONFIG_TARGET_T2080QDS
 	serdes_corenet_t *srds_regs =
 		(void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
@@ -413,7 +413,7 @@ void fdt_fixup_board_enet(void *fdt)
  */
 static void initialize_lane_to_slot(void)
 {
-	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 	u32 srds_s1 = in_be32(&gur->rcwsr[4]) &
 				FSL_CORENET2_RCWSR4_SRDS1_PRTCL;
 
@@ -459,7 +459,7 @@ int board_eth_init(struct bd_info *bis)
 	int i, idx, lane, slot, interface;
 	struct memac_mdio_info dtsec_mdio_info;
 	struct memac_mdio_info tgec_mdio_info;
-	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 	u32 rcwsr13 = in_be32(&gur->rcwsr[13]);
 	u32 srds_s1;
 
diff --git a/board/freescale/t208xqds/spl.c b/board/freescale/t208xqds/spl.c
index e934a3ca6f7..8b68329b986 100644
--- a/board/freescale/t208xqds/spl.c
+++ b/board/freescale/t208xqds/spl.c
@@ -67,7 +67,7 @@ unsigned long get_board_ddr_clk(void)
 void board_init_f(ulong bootflag)
 {
 	u32 plat_ratio, sys_clk, ccb_clk;
-	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+	ccsr_gur_t *gur = (void *)CFG_SYS_MPC85xx_GUTS_ADDR;
 
 	/* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
 	memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
diff --git a/board/freescale/t208xqds/t208xqds.c b/board/freescale/t208xqds/t208xqds.c
index 1da3a714f27..82710cf897b 100644
--- a/board/freescale/t208xqds/t208xqds.c
+++ b/board/freescale/t208xqds/t208xqds.c
@@ -88,7 +88,7 @@ int i2c_multiplexer_select_vid_channel(u8 channel)
 
 int brd_mux_lane_to_slot(void)
 {
-	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 	u32 srds_prtcl_s1;
 
 	srds_prtcl_s1 = in_be32(&gur->rcwsr[4]) &
diff --git a/board/freescale/t208xrdb/spl.c b/board/freescale/t208xrdb/spl.c
index 60fe084bbb2..3f9b1faa853 100644
--- a/board/freescale/t208xrdb/spl.c
+++ b/board/freescale/t208xrdb/spl.c
@@ -27,7 +27,7 @@ phys_size_t get_effective_memsize(void)
 void board_init_f(ulong bootflag)
 {
 	u32 plat_ratio, sys_clk, ccb_clk;
-	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+	ccsr_gur_t *gur = (void *)CFG_SYS_MPC85xx_GUTS_ADDR;
 
 	/* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
 	memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
diff --git a/board/freescale/t4rdb/eth.c b/board/freescale/t4rdb/eth.c
index 34ffaa6aeb5..4041b3d9ac4 100644
--- a/board/freescale/t4rdb/eth.c
+++ b/board/freescale/t4rdb/eth.c
@@ -43,7 +43,7 @@ int board_eth_init(struct bd_info *bis)
 	struct memac_mdio_info dtsec_mdio_info;
 	struct memac_mdio_info tgec_mdio_info;
 	struct mii_dev *dev;
-	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 	u32 srds_prtcl_s1, srds_prtcl_s2;
 
 	srds_prtcl_s1 = in_be32(&gur->rcwsr[4]) &
diff --git a/board/freescale/t4rdb/spl.c b/board/freescale/t4rdb/spl.c
index c7d5de35d58..72d3b80b19b 100644
--- a/board/freescale/t4rdb/spl.c
+++ b/board/freescale/t4rdb/spl.c
@@ -33,7 +33,7 @@ phys_size_t get_effective_memsize(void)
 void board_init_f(ulong bootflag)
 {
 	u32 plat_ratio, sys_clk, ccb_clk;
-	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+	ccsr_gur_t *gur = (void *)CFG_SYS_MPC85xx_GUTS_ADDR;
 
 	/* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
 	memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
diff --git a/board/keymile/kmcent2/kmcent2.c b/board/keymile/kmcent2/kmcent2.c
index 44865384f65..758bd5b79ba 100644
--- a/board/keymile/kmcent2/kmcent2.c
+++ b/board/keymile/kmcent2/kmcent2.c
@@ -45,7 +45,7 @@ int checkboard(void)
 int board_early_init_f(void)
 {
 	struct fsl_ifc ifc = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
-	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 	bool cpuwd_flag = false;
 
 	/* board specific IFC configuration: increased bus turnaround time */
@@ -221,8 +221,8 @@ EVENT_SPY(EVT_MISC_INIT_F, kmcent2_misc_init_f);
 int misc_init_r(void)
 {
 	serdes_corenet_t *regs = (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
-	struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_MPC85xx_SCFG;
-	ccsr_gur_t __iomem *gur = (ccsr_gur_t __iomem *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+	struct ccsr_scfg *scfg = (struct ccsr_scfg *)CFG_SYS_MPC85xx_SCFG;
+	ccsr_gur_t __iomem *gur = (ccsr_gur_t __iomem *)CFG_SYS_MPC85xx_GUTS_ADDR;
 
 	/* check SERDES bank 0 reference clock */
 	u32 actual = in_be32(&regs->bank[USED_SRDS_BANK].pllcr0);
diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index 33b72614d76..eaba87542e7 100644
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -35,7 +35,7 @@ ulong flash_get_size (ulong base, int banknum);
 
 int checkboard (void)
 {
-	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	volatile ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 	char buf[64];
 	int f;
 	int i = env_get_f("serial#", buf, sizeof(buf));
@@ -139,7 +139,7 @@ int misc_init_r (void)
 void local_bus_init (void)
 {
 	volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
-	volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
+	volatile ccsr_local_ecm_t *ecm = (void *)(CFG_SYS_MPC85xx_ECM_ADDR);
 	sys_info_t sysinfo;
 	uint clkdiv;
 	uint lbc_mhz;
@@ -175,7 +175,7 @@ void local_bus_init (void)
 #ifdef CONFIG_BOARD_EARLY_INIT_R
 int board_early_init_r (void)
 {
-	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	volatile ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 
 	/* set and reset the GPIO pin 2 which will reset the W83782G chip */
 	out_8((unsigned char*)&gur->gpoutdr, 0x3F );
diff --git a/board/xes/common/fsl_8xxx_clk.c b/board/xes/common/fsl_8xxx_clk.c
index 20e88d43604..c36b2afd50e 100644
--- a/board/xes/common/fsl_8xxx_clk.c
+++ b/board/xes/common/fsl_8xxx_clk.c
@@ -13,7 +13,7 @@
 unsigned long get_board_sys_clk(void)
 {
 #if defined(CONFIG_MPC85xx)
-	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	volatile ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 #elif defined(CONFIG_MPC86xx)
 	immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
 	volatile ccsr_gur_t *gur = &immap->im_gur;
@@ -36,7 +36,7 @@ unsigned long get_board_sys_clk(void)
  */
 unsigned long get_board_ddr_clk(void)
 {
-	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	volatile ccsr_gur_t *gur = (void *)(CFG_SYS_MPC85xx_GUTS_ADDR);
 	u32 ddr_ratio = (in_be32(&gur->porpllsr) & 0x00003e00) >> 9;
 
 	if (ddr_ratio == 0x7)
diff --git a/board/xes/common/fsl_8xxx_misc.c b/board/xes/common/fsl_8xxx_misc.c
index b26810338f8..9d921032eaf 100644
--- a/board/xes/common/fsl_8xxx_misc.c
+++ b/board/xes/common/fsl_8xxx_misc.c
@@ -28,7 +28,7 @@ int board_flash_wp_on(void)
 uint get_board_derivative(void)
 {
 #if defined(CONFIG_MPC85xx)
-       volatile ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+       volatile ccsr_gur_t *gur = (void *)CFG_SYS_MPC85xx_GUTS_ADDR;
 #elif defined(CONFIG_MPC86xx)
        volatile immap_t *immap = (immap_t *)CONFIG_SYS_CCSRBAR;
        volatile ccsr_gur_t *gur = &immap->im_gur;