diff options
| author | Marek Vasut | 2019-11-26 09:39:09 +0100 |
|---|---|---|
| committer | Stefano Babic | 2019-12-06 13:57:42 +0100 |
| commit | 5b97abab5540c6c611573523739a3226b8aaf31f (patch) | |
| tree | 0378d706dc6eec608a44db7373ae3aec6e295d0e /board | |
| parent | 7d84f4469f1e3956e8adf4c201df1b5fec435916 (diff) | |
ARM: imx: vining2000: Enable DDR DRAM calibration
Enable DRAM calibration in SPL to improve behavior of the board
in edge conditions of the thermal envelope of the board and make
it even more stable.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'board')
| -rw-r--r-- | board/softing/vining_2000/vining_2000.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/board/softing/vining_2000/vining_2000.c b/board/softing/vining_2000/vining_2000.c index 9ac17f78e73..c6aee4ee2b0 100644 --- a/board/softing/vining_2000/vining_2000.c +++ b/board/softing/vining_2000/vining_2000.c @@ -587,6 +587,11 @@ static void vining2000_spl_dram_init(void) mx6sx_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs); mx6_dram_cfg(&sysinfo, &mx6_mmcd_calib, &mem_ddr); + + /* Perform DDR DRAM calibration */ + udelay(100); + mmdc_do_write_level_calibration(&sysinfo); + mmdc_do_dqs_calibration(&sysinfo); } void board_init_f(ulong dummy) |