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authorTom Rini2019-10-09 16:22:03 -0400
committerTom Rini2019-10-09 16:22:03 -0400
commit44fb0d6c9f5147a41c710032869e5e01b3c9e310 (patch)
treef0c7932d0a8a688095e95f7d1de17be4f7d3af0b /cmd/Kconfig
parent548aefa5b9e5c31681e0a8bd78e96b66eedd1137 (diff)
parentbcaa0e3302e384ad65c352b385678acdf3f20c0a (diff)
Merge tag 'xilinx-for-v2020.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx/FPGA changes for v2020.01 FPGA: - Enable fpga loading on Versal - Minor fix Microblaze: - Fix LMB configurations to support initrds - Some other cleanups Zynq: - Minor config/dt changes - Add distro boot support for usb1 and mmc1 - Remove Xilinx private boot commands and use only distro boot ZynqMP: - Kconfig cleanups, defconfig updates - Update some dt files - Add firmware driver for talking to PMUFW - Extend distro boot support for jtag - Add new IDs - Add system controller configurations - Convert code to talk firmware via mailbox or SMCs Versal: - Add board_late_init() - Add run time DT memory setup - Add DFU support - Extend distro boot support for jtag and dfu - Add clock driver - Tune mini configurations Xilinx: - Improve documentation (boot scripts, dt binding) - Enable run time initrd_high calculation - Define default SYS_PROMPT - Add zynq/zynqmp virtual defconfig Drivers: - Add Xilinx mailbox driver for talking to firmware - Clean zynq_gem for Versal - Move ZYNQ_HISPD_BROKEN to Kconfig - Wire genphy_init() in phy.c - Add Xilinx gii2rgmii bridge - Cleanup zynq_sdhci - dwc3 fix - zynq_gpio fix - axi_emac fix Others: - apalis-tk1 - clean config file
Diffstat (limited to 'cmd/Kconfig')
-rw-r--r--cmd/Kconfig2
1 files changed, 2 insertions, 0 deletions
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 8e55b34c961..07060c63a7e 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -48,6 +48,8 @@ config SYS_LONGHELP
config SYS_PROMPT
string "Shell prompt"
+ default "Zynq> " if ARCH_ZYNQ
+ default "ZynqMP> " if ARCH_ZYNQMP
default "=> "
help
This string is displayed in the command line to the left of the