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authorKever Yang2019-10-23 10:08:53 +0800
committerKever Yang2019-11-10 20:40:20 +0800
commitae2500f89a8de636a2a23187010fa57f44ac3bd3 (patch)
treec940f64052b4f2cc4872d6bac58e9bba74aa16d0 /configs/evb-rk3328_defconfig
parent5ce94c74a6b59922d4280573f2438e4f5f9b29a8 (diff)
rockchip: rk3328: defconfig: no need to reserve IRAM for SPL
We use to reserve IRAM to avoid the SPL text overlap with ATF M0 code, and when we introduce the TPL, the SPL space is in DRAM, we reserve space to avoid SPL text overlap with ATF bl31. Now we decide to move ATF entry point to 0x40000 instead of 0x1000, so that the SPL can have 0x4000 as code size and no need to reserve space or relocate before loading ATF. The mainline ATF has update since: 0aad563c rockchip: Update BL31_BASE to 0x40000 Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'configs/evb-rk3328_defconfig')
-rw-r--r--configs/evb-rk3328_defconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index f161c40ae76..a4405a6a9dd 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_ROCKCHIP_RK3328=y
CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x40000
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y