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authorLukas Auer2019-08-21 21:14:49 +0200
committerAndes2019-08-26 16:07:42 +0800
commite456a81935aafcecc8e53a7cd35efe9267781041 (patch)
tree2c9bdd38f2a56acfce3580257fecaf8a692651ca /configs/qemu-riscv64_spl_defconfig
parent109f82bea906478807d831978dc680d3ef992f17 (diff)
riscv: qemu: add SPL configuration
Add two new configurations (qemu-riscv{32,64}_spl_defconfig) with SPL enabled for RISC-V QEMU. QEMU does not require SPL to run U-Boot. The configurations are meant to help the development of SPL on RISC-V. The configurations enable RAM as the only SPL boot device. Images must be loaded at address 0x80200000. In the default boot flow, U-Boot SPL starts in machine mode, loads the OpenSBI FW_DYNAMIC firmware and U-Boot proper from the supplied FIT image, and starts OpenSBI. U-Boot proper is then started in supervisor mode by OpenSBI. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'configs/qemu-riscv64_spl_defconfig')
-rw-r--r--configs/qemu-riscv64_spl_defconfig12
1 files changed, 12 insertions, 0 deletions
diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig
new file mode 100644
index 00000000000..a3f5e29d588
--- /dev/null
+++ b/configs/qemu-riscv64_spl_defconfig
@@ -0,0 +1,12 @@
+CONFIG_RISCV=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SPL=y
+CONFIG_TARGET_QEMU_VIRT=y
+CONFIG_ARCH_RV64I=y
+CONFIG_RISCV_SMODE=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_CMD_MII is not set
+CONFIG_OF_PRIOR_STAGE=y