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author | Marek Vasut | 2018-08-18 16:00:31 +0200 |
---|---|---|
committer | Marek Vasut | 2018-08-24 12:05:20 +0200 |
commit | 331c37221057e6a1291b6e14d9f033a7a90051f1 (patch) | |
tree | 8c3e682027c195195aa513165d1bef60ed5a1e2a /configs/socfpga_arria10_defconfig | |
parent | cca9af63a32220e0a270ac62fa9c46a0ed4ca0ce (diff) |
ARM: socfpga: Convert Arria10 to timer framework
Switch the Arria10 from ad-hoc hardcoded timer to timer framework
and the DW APB timer driver. This allows the A10 to extract timer
information, like timer rate, from clock framework and thus DT
instead of having it hardcoded in U-Boot configuration files.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'configs/socfpga_arria10_defconfig')
-rw-r--r-- | configs/socfpga_arria10_defconfig | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index 4b0d47489aa..a5040355476 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -39,4 +39,7 @@ CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SPI=y +CONFIG_TIMER=y +CONFIG_SPL_TIMER=y +CONFIG_DESIGNWARE_APB_TIMER=y CONFIG_USE_TINY_PRINTF=y |