diff options
author | Holger Brunck | 2020-02-19 19:55:14 +0100 |
---|---|---|
committer | Marek Vasut | 2020-03-03 22:11:36 +0100 |
commit | 468ba8d00b5af7828302e297736ae23d4873cfb0 (patch) | |
tree | 1a60a77e307bbd56fb4733807d3c8a2586f80508 /configs/socfpga_secu1_defconfig | |
parent | 85f748ad953e92e62831bff24bfd2260ef23325c (diff) |
ARM: socfpga: Add initial support for the ABB SECU board
Add initial support for the ABB SECU board, which is an ArriaV-based
SoCFPGA system with ethernet and booting from Denali NAND.
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Diffstat (limited to 'configs/socfpga_secu1_defconfig')
-rw-r--r-- | configs/socfpga_secu1_defconfig | 84 |
1 files changed, 84 insertions, 0 deletions
diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig new file mode 100644 index 00000000000..230959ec865 --- /dev/null +++ b/configs/socfpga_secu1_defconfig @@ -0,0 +1,84 @@ +CONFIG_ARM=y +CONFIG_ARCH_SOCFPGA=y +CONFIG_SYS_MALLOC_F_LEN=0x800 +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x100000 +CONFIG_DM_GPIO=y +# CONFIG_SPL_MMC_SUPPORT is not set +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_TARGET_SOCFPGA_ARRIA5_SECU1=y +CONFIG_ENV_OFFSET_REDUND=0x120000 +# CONFIG_SPL_LIBDISK_SUPPORT is not set +# CONFIG_SPL_SPI_SUPPORT is not set +CONFIG_SPL_TEXT_BASE=0xFFFF0000 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_BUILD_TARGET="u-boot-with-nand-spl.sfp" +CONFIG_FIT=y +# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y +CONFIG_DEFAULT_FDT_FILE="socfpga_arria5_secu1.dtb" +CONFIG_VERSION_VARIABLE=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_CMD_ASKENV=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_EEPROM=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_NAND_TRIMFFS=y +CONFIG_CMD_SPI=y +CONFIG_CMD_WDT=y +CONFIG_CMD_CACHE=y +CONFIG_MTDIDS_DEFAULT="nand0=denali-nand" +CONFIG_MTDPARTS_DEFAULT="mtdparts=denali-nand:512k(nand.4spl),512k(nand.uboot),128k(nand.env1),128k(nand.env2),0x1000000(nand.rec),0x3ee40000(nand.ubi),0x80000@0x3ff80000(nand.bbt)" +CONFIG_CMD_UBI=y +# CONFIG_CMD_UBIFS is not set +# CONFIG_ISO_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_secu1" +CONFIG_ENV_IS_IN_NAND=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_SPL_DM_SEQ_ALIAS=y +# CONFIG_SPL_BLK is not set +CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_DM_I2C_GPIO=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x50 +CONFIG_SYS_EEPROM_SIZE=1024 +CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 +CONFIG_DM_MMC=y +CONFIG_MMC_DW=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_SYS_NAND_USE_FLASH_BBT=y +CONFIG_NAND_DENALI_DT=y +CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=2 +CONFIG_SPL_NAND_DENALI=y +# CONFIG_DM_SPI_FLASH is not set +CONFIG_MTD_UBI_FASTMAP=y +CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 +CONFIG_MV88E6352_SWITCH=y +CONFIG_PHY_FIXED=y +CONFIG_DM_ETH=y +CONFIG_PHY_GIGE=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y +CONFIG_DM_RESET=y +CONFIG_SPI=y +CONFIG_SPI_MEM=y +CONFIG_DESIGNWARE_SPI=y +CONFIG_DESIGNWARE_WATCHDOG=y +CONFIG_WDT=y +# CONFIG_GZIP is not set |