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authorChia-Wei Wang2022-06-01 16:21:15 +0800
committerTom Rini2022-06-22 21:30:05 -0400
commit442a69c143759648f571e3784c7b3bc5be7ed595 (patch)
tree6fcd92761efaaf80d656bfd867237e145941ad42 /configs
parent478c00718df842271fe0636031603bfcef420837 (diff)
configs: ast2600: Move SPL bss section to DRAM space
The commit b583348ca8c8 ("image: fit: Align hash output buffers") places the hash output buffer at the .bss section. However, AST2600 by default executes SPL in the NOR flash XIP way. This results in the hash output cannot be written to the buffer as it is located at the R/X only region. We need to move the .bss section out of the SPL body to the DRAM space, where hash output can be written to. This patch includes: - Define the .bss section base and size - A new SPL linker script is added with a separate .bss region specified - Enable CONFIG_SPL_SEPARATE_BSS kconfig option Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Neal Liu <neal_liu@aspeedtech.com>
Diffstat (limited to 'configs')
-rw-r--r--configs/evb-ast2600_defconfig6
1 files changed, 5 insertions, 1 deletions
diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig
index bfd0a5f2b10..a91a53da4fc 100644
--- a/configs/evb-ast2600_defconfig
+++ b/configs/evb-ast2600_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_SPL_SYS_THUMB_BUILD=y
+CONFIG_SPL_LDSCRIPT="arch/arm/mach-aspeed/ast2600/u-boot-spl.lds"
CONFIG_ARCH_ASPEED=y
CONFIG_SYS_TEXT_BASE=0x80000000
CONFIG_SYS_MALLOC_LEN=0x2000000
@@ -32,10 +33,13 @@ CONFIG_BOOTCOMMAND="run bootspi"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
-CONFIG_SPL_NO_BSS_LIMIT=y
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x83000000
+CONFIG_SPL_BSS_MAX_SIZE=0x1000000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000000
+CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_FIT_IMAGE_TINY=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_RAM_SUPPORT=y