diff options
| author | wdenk | 2004-08-01 22:48:16 +0000 |
|---|---|---|
| committer | wdenk | 2004-08-01 22:48:16 +0000 |
| commit | 281e00a3be453a169d854f824a460359d10f92bb (patch) | |
| tree | 43dab398f1d6f601bb44df108427f7e0c611d68d /cpu/mpc824x | |
| parent | cfca5e604d5692f081cc1a9185ca5dc6dc77599d (diff) | |
* Code cleanup
* Patch by Sascha Hauer, 28 Jun:
- add generic support for Motorola i.MX architecture
- add support for mx1ads, mx1fs2 and scb9328 boards
* Patches by Marc Leeman, 23 Jul 2004:
- Add define for the PCI/Memory Buffer Configuration Register
- corrected comments in cpu/mpc824x/cpu_init.c
* Add support for multiple serial interfaces
(for example to allow modem dial-in / dial-out)
Diffstat (limited to 'cpu/mpc824x')
| -rw-r--r-- | cpu/mpc824x/cpu_init.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/cpu/mpc824x/cpu_init.c b/cpu/mpc824x/cpu_init.c index 08f5c4ab13a..d0c7a3bcabc 100644 --- a/cpu/mpc824x/cpu_init.c +++ b/cpu/mpc824x/cpu_init.c @@ -108,7 +108,7 @@ cpu_init_f (void) CONFIG_READ_BYTE(PCMBCR,val); /* in order not to corrupt data which is being read over the PCI bus - * with the PPC as master, we need to reduce the number of PCMRBs to 1, + * with the PPC as slave, we need to reduce the number of PCMRBs to 1, * 4.11 in the processor user manual * */ @@ -117,6 +117,10 @@ cpu_init_f (void) #else CONFIG_WRITE_BYTE(PCMBCR,(val|0x80)); /* 2 PCMRBs */ CONFIG_WRITE_BYTE(PCMBCR,(val|0x40)); /* 3 PCMRBs */ + /* default, 4 PCMRBs are used, so don't change the + * register is this is _really_ what you want: data + * corruption with no performance gain + */ #endif #endif |