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authorYork Sun2013-09-30 14:20:51 -0700
committerYork Sun2013-11-25 11:43:46 -0800
commit9ac4ffbde1a5015c9929ee8578d3811b716e2fd3 (patch)
treeaf5bb5560a3ffc9a170b8829617785db73ad2bb8 /drivers/ddr/fsl/main.c
parent9a17eb5b7e7ba528c278a9677c38d7ae722d93ec (diff)
Driver/DDR: Add Freescale DDR driver for ARM
Make PowerPC specific code conditional so ARM SoCs can reuse this driver. Add DDR3 driver for ARM. Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'drivers/ddr/fsl/main.c')
-rw-r--r--drivers/ddr/fsl/main.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c
index c1cdbdf9551..b4988e194cf 100644
--- a/drivers/ddr/fsl/main.c
+++ b/drivers/ddr/fsl/main.c
@@ -15,16 +15,18 @@
#include <common.h>
#include <i2c.h>
#include <fsl_ddr_sdram.h>
-#include <asm/fsl_law.h>
-
#include <fsl_ddr.h>
+#ifdef CONFIG_PPC
+#include <asm/fsl_law.h>
+
void fsl_ddr_set_lawbar(
const common_timing_params_t *memctl_common_params,
unsigned int memctl_interleaved,
unsigned int ctrl_num);
-void fsl_ddr_set_intl3r(const unsigned int granule_size);
+#endif
+void fsl_ddr_set_intl3r(const unsigned int granule_size);
#if defined(SPD_EEPROM_ADDRESS) || \
defined(SPD_EEPROM_ADDRESS1) || defined(SPD_EEPROM_ADDRESS2) || \
defined(SPD_EEPROM_ADDRESS3) || defined(SPD_EEPROM_ADDRESS4)
@@ -549,7 +551,9 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step,
phys_size_t fsl_ddr_sdram(void)
{
unsigned int i;
+#ifdef CONFIG_PPC
unsigned int law_memctl = LAW_TRGT_IF_DDR_1;
+#endif
unsigned long long total_memory;
fsl_ddr_info_t info;
int deassert_reset;
@@ -621,6 +625,7 @@ phys_size_t fsl_ddr_sdram(void)
}
}
+#ifdef CONFIG_PPC
/* program LAWs */
for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
if (info.memctl_opts[i].memctl_interleaving) {
@@ -681,6 +686,7 @@ phys_size_t fsl_ddr_sdram(void)
law_memctl, i);
}
}
+#endif
debug("total_memory by %s = %llu\n", __func__, total_memory);