Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx

Fix ccsr_ddr structure to avoid using typedef. Combine DDR2 and DDR3
structure for 83xx, 85xx and 86xx.

Signed-off-by: York Sun <yorksun@freescale.com>

6 files changed, 14 insertions, 8 deletions

diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c
index aed4569cb4e..5f3ea59b8d5 100644
--- a/drivers/ddr/fsl/ctrl_regs.c
+++ b/drivers/ddr/fsl/ctrl_regs.c
@@ -14,13 +14,14 @@
 #include <fsl_ddr_sdram.h>
 
 #include <fsl_ddr.h>
+#include <fsl_immap.h>
 #include <asm/io.h>
 
 #define _DDR_ADDR CONFIG_SYS_FSL_DDR_ADDR
 
 static u32 fsl_ddr_get_version(void)
 {
-	ccsr_ddr_t *ddr;
+	struct ccsr_ddr __iomem *ddr;
 	u32 ver_major_minor_errata;
 
 	ddr = (void *)_DDR_ADDR;
diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
index ff7d979d6aa..8dd4a9136cf 100644
--- a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
@@ -18,7 +18,8 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
 			     unsigned int ctrl_num, int step)
 {
 	unsigned int i;
-	volatile ccsr_ddr_t *ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR;
+	struct ccsr_ddr __iomem *ddr =
+		(struct ccsr_ddr __iomem *)CONFIG_SYS_FSL_DDR_ADDR;
 
 	if (ctrl_num != 0) {
 		printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num);
@@ -73,7 +74,8 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
 void
 ddr_enable_ecc(unsigned int dram_size)
 {
-	volatile ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_FSL_DDR_ADDR);
+	struct ccsr_ddr __iomem *ddr =
+		(struct ccsr_ddr __iomem *)(CONFIG_SYS_FSL_DDR_ADDR);
 
 	dma_meminit(CONFIG_MEM_INIT_VALUE, dram_size);
 
diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen2.c b/drivers/ddr/fsl/mpc85xx_ddr_gen2.c
index c22dea5c240..988b4a49410 100644
--- a/drivers/ddr/fsl/mpc85xx_ddr_gen2.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen2.c
@@ -19,7 +19,8 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
 			     unsigned int ctrl_num, int step)
 {
 	unsigned int i;
-	ccsr_ddr_t *ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR;
+	struct ccsr_ddr __iomem *ddr =
+		(struct ccsr_ddr __iomem *)CONFIG_SYS_FSL_DDR_ADDR;
 
 #if defined(CONFIG_SYS_FSL_ERRATUM_NMG_DDR120) && defined(CONFIG_MPC85xx)
 	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
index 7b4e8ec93d3..9f041330940 100644
--- a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
@@ -29,7 +29,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
 			     unsigned int ctrl_num, int step)
 {
 	unsigned int i, bus_width;
-	volatile ccsr_ddr_t *ddr;
+	struct ccsr_ddr __iomem *ddr;
 	u32 temp_sdram_cfg;
 	u32 total_gb_size_per_controller;
 	int timeout;
diff --git a/drivers/ddr/fsl/mpc86xx_ddr.c b/drivers/ddr/fsl/mpc86xx_ddr.c
index caffbaf0194..4551ed87db7 100644
--- a/drivers/ddr/fsl/mpc86xx_ddr.c
+++ b/drivers/ddr/fsl/mpc86xx_ddr.c
@@ -18,7 +18,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
 			     unsigned int ctrl_num, int step)
 {
 	unsigned int i;
-	volatile ccsr_ddr_t *ddr;
+	struct ccsr_ddr __iomem *ddr;
 
 	switch (ctrl_num) {
 	case 0:
@@ -58,7 +58,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
 	out_be32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2);
 	out_be32(&ddr->sdram_mode, regs->ddr_sdram_mode);
 	out_be32(&ddr->sdram_mode_2, regs->ddr_sdram_mode_2);
-	out_be32(&ddr->sdram_mode_cntl, regs->ddr_sdram_md_cntl);
+	out_be32(&ddr->sdram_md_cntl, regs->ddr_sdram_md_cntl);
 	out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval);
 	out_be32(&ddr->sdram_data_init, regs->ddr_data_init);
 	out_be32(&ddr->sdram_clk_cntl, regs->ddr_sdram_clk_cntl);
diff --git a/drivers/ddr/fsl/util.c b/drivers/ddr/fsl/util.c
index 45a7bcc0803..5d6b3625104 100644
--- a/drivers/ddr/fsl/util.c
+++ b/drivers/ddr/fsl/util.c
@@ -11,6 +11,7 @@
 #include <div64.h>
 
 #include <fsl_ddr.h>
+#include <fsl_immap.h>
 #include <asm/io.h>
 
 /* To avoid 64-bit full-divides, we factor this here */
@@ -134,7 +135,8 @@ u32 fsl_ddr_get_intl3r(void)
 
 void board_add_ram_info(int use_default)
 {
-	ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_FSL_DDR_ADDR);
+	struct ccsr_ddr __iomem *ddr =
+		(struct ccsr_ddr __iomem *)(CONFIG_SYS_FSL_DDR_ADDR);
 
 #if	defined(CONFIG_E6500) && (CONFIG_NUM_DDR_CONTROLLERS == 3)
 	u32 *mcintl3r = (void *) (CONFIG_SYS_IMMR + 0x18004);