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authorJohn Keeping2022-09-15 18:56:56 +0100
committerJaehoon Chung2022-10-24 18:02:41 +0900
commit7ff2f30b63947ffe4e707bbe4b94143e947fce35 (patch)
treef2d31cb0ff3a3fdefc553f31758ad1cf96e18660 /drivers/mmc
parent359c176de550be54805e762d296a9fec3dc24d63 (diff)
mmc: dwmmc: only clear handled interrupts
Unconditionally clearing DTO when RXDR is set leads to spurious timeouts in FIFO mode transfers if events occur in the following order: mask = dwmci_readl(host, DWMCI_RINTSTS); // Hardware asserts DWMCI_INTMSK_DTO here dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_DTO); if (mask & DWMCI_INTMSK_DTO) { // Unreachable as DTO is cleared without being handled! return 0; } Only clear interrupts that we have seen and are handling so that DTO is not missed. Signed-off-by: John Keeping <john@metanate.com> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (Rock PI 4B) Tested-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/dw_mmc.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 4232c5eb8c3..5085a3b491d 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -168,7 +168,8 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
if (data->flags == MMC_DATA_READ &&
(mask & (DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO))) {
dwmci_writel(host, DWMCI_RINTSTS,
- DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO);
+ mask & (DWMCI_INTMSK_RXDR |
+ DWMCI_INTMSK_DTO));
while (size) {
ret = dwmci_fifo_ready(host,
DWMCI_FIFO_EMPTY,