diff options
| author | Jonas Karlman | 2024-04-10 14:30:50 +0000 |
|---|---|---|
| committer | Kever Yang | 2024-04-26 15:47:05 +0800 |
| commit | e82d4edf46c5743a56ba6e825b89769ab3dc03e4 (patch) | |
| tree | 7ff65e8ca5d48a01e93d70ea0ed03a527e164109 /drivers/mmc | |
| parent | d03bb9a3332a0c3a83cf2ec8baaf43fe44f14bd4 (diff) | |
mmc: rockchip_sdhci: Fix 4 blocks PIO mode read limit for RK35xx
The commit 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks
read in a single command") introduced a limit of number of blocks to
read to fix a Data End Bit Error on RK3568 and RK3588. This had a side
affect of significant slowing down reading FIT from eMMC.
After the commit 6de9d7b2f13c ("rockchip: rk35xx: Enable eMMC HS200 mode
by default") the limit of number of blocks to read workaround is no
longer necessary and at HS200+ a Data End Bit Error is no longer
happening using PIO mode.
Change this limitation to allow reading more than 4 blocks with a single
CMD18 command in PIO mode at HS200+ speed, keep using the 4 blocks
limitation when loadig FIT from eMMC at lower speed than HS200.
Fixes: 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks read in a single command")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/rockchip_sdhci.c | 26 |
1 files changed, 16 insertions, 10 deletions
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c index 706fb123579..c889c7bc985 100644 --- a/drivers/mmc/rockchip_sdhci.c +++ b/drivers/mmc/rockchip_sdhci.c @@ -391,6 +391,8 @@ static int rk3568_sdhci_config_dll(struct sdhci_host *host, u32 clock, bool enab static int rk3568_sdhci_set_ios_post(struct sdhci_host *host) { struct mmc *mmc = host->mmc; + struct rockchip_sdhc_plat *plat = dev_get_plat(mmc->dev); + struct mmc_config *cfg = &plat->cfg; u32 reg; reg = sdhci_readw(host, SDHCI_HOST_CONTROL2); @@ -437,6 +439,20 @@ static int rk3568_sdhci_set_ios_post(struct sdhci_host *host) sdhci_writew(host, reg, DWCMSHC_EMMC_EMMC_CTRL); + /* + * Reading more than 4 blocks with a single CMD18 command in PIO mode + * triggers Data End Bit Error using a slower mode than HS200. Limit to + * reading max 4 blocks in one command when using PIO mode. + */ + if (!(host->flags & USE_DMA)) { + if (mmc->selected_mode == MMC_HS_200 || + mmc->selected_mode == MMC_HS_400 || + mmc->selected_mode == MMC_HS_400_ES) + cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; + else + cfg->b_max = 4; + } + return 0; } @@ -598,16 +614,6 @@ static int rockchip_sdhci_probe(struct udevice *dev) dev_read_bool(dev, "u-boot,spl-fifo-mode")) host->flags &= ~USE_DMA; - /* - * Reading more than 4 blocks with a single CMD18 command in PIO mode - * triggers Data End Bit Error on RK3568 and RK3588. Limit to reading - * max 4 blocks in one command when using PIO mode. - */ - if (!(host->flags & USE_DMA) && - (device_is_compatible(dev, "rockchip,rk3568-dwcmshc") || - device_is_compatible(dev, "rockchip,rk3588-dwcmshc"))) - cfg->b_max = 4; - return sdhci_probe(dev); } |