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authorStefan Herbrechtsmeier2017-01-17 16:27:25 +0100
committerMichal Simek2017-02-17 10:22:46 +0100
commiteff55c55c738c44c8ae61d9735626fe2cc2dab9f (patch)
treed7f0cb37b4ef02b7392f389dc974ebfac1309d61 /drivers/net/zynq_gem.c
parenta259243e9d5895e03348cad98b82524e61cd47e8 (diff)
net: zynq: Add clk framework support to zynq ethernet driver
If available use the clock framework to set the tx clock rate of the zynq ethernet controller. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/net/zynq_gem.c')
-rw-r--r--drivers/net/zynq_gem.c22
1 files changed, 15 insertions, 7 deletions
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index d3c33e801d6..36397fe0538 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -181,7 +181,7 @@ struct zynq_gem_priv {
struct phy_device *phydev;
int phy_of_handle;
struct mii_dev *bus;
-#ifdef CONFIG_CLK_ZYNQMP
+#if defined(CONFIG_CLK) || defined(CONFIG_SPL_CLK)
struct clk clk;
#endif
};
@@ -456,13 +456,21 @@ static int zynq_gem_init(struct udevice *dev)
break;
}
-#ifndef CONFIG_CLK_ZYNQMP
+#if defined(CONFIG_CLK) || defined(CONFIG_SPL_CLK)
+ ret = clk_set_rate(&priv->clk, clk_rate);
+ if (IS_ERR_VALUE(ret) && ret != (unsigned long)-ENOSYS) {
+ dev_err(dev, "failed to set tx clock rate\n");
+ return ret;
+ }
+
+ ret = clk_enable(&priv->clk);
+ if (ret && ret != -ENOSYS) {
+ dev_err(dev, "failed to enable tx clock\n");
+ return ret;
+ }
+#else
zynq_slcr_gem_clk_setup((ulong)priv->iobase !=
ZYNQ_GEM_BASEADDR0, clk_rate);
-#else
- ret = clk_set_rate(&priv->clk, clk_rate);
- if (IS_ERR_VALUE(ret))
- return -1;
#endif
setbits_le32(&regs->nwctrl, ZYNQ_GEM_NWCTRL_RXEN_MASK |
@@ -636,7 +644,7 @@ static int zynq_gem_probe(struct udevice *dev)
priv->tx_bd = (struct emac_bd *)bd_space;
priv->rx_bd = (struct emac_bd *)((ulong)bd_space + BD_SEPRN_SPACE);
-#ifdef CONFIG_CLK_ZYNQMP
+#if defined(CONFIG_CLK) || defined(CONFIG_SPL_CLK)
ret = clk_get_by_name(dev, "tx_clk", &priv->clk);
if (ret < 0) {
dev_err(dev, "failed to get clock\n");