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authorStefan Roese2017-04-24 18:45:25 +0300
committerStefan Roese2017-05-09 13:38:18 +0200
commitd37f020e6fe4af64dea7108652319e05e0d3279c (patch)
tree4cea7bc37cbbfbd85e4c2e7134977b7bba145cdb /drivers/phy
parent6ecc0b1cdfcb41e567aca53824ba36e50f658273 (diff)
fix: phy: marvell: cp110: fix the KR/SFI line 4 selector
This patch fixes the following: 1. KR/SFI on lane #4 mux selector is 0x2 and not 0x1 2. Comment typo Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/phy')
-rw-r--r--drivers/phy/marvell/comphy_cp110.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/phy/marvell/comphy_cp110.c b/drivers/phy/marvell/comphy_cp110.c
index 499aa683684..e90a9136c36 100644
--- a/drivers/phy/marvell/comphy_cp110.c
+++ b/drivers/phy/marvell/comphy_cp110.c
@@ -49,7 +49,7 @@ struct comphy_mux_data cp110_comphy_phy_mux_data[] = {
{PHY_TYPE_SFI, 0x1}, {PHY_TYPE_XAUI1, 0x1},
{PHY_TYPE_RXAUI1, 0x1}, {PHY_TYPE_SATA1, 0x4} } },
{7, {{PHY_TYPE_UNCONNECTED, 0x0}, {PHY_TYPE_SGMII0, 0x2}, /* Lane 4 */
- {PHY_TYPE_XAUI0, 0x1}, {PHY_TYPE_RXAUI0, 0x1}, {PHY_TYPE_SFI, 0x1},
+ {PHY_TYPE_XAUI0, 0x1}, {PHY_TYPE_RXAUI0, 0x1}, {PHY_TYPE_SFI, 0x2},
{PHY_TYPE_SGMII2, 0x1}, {PHY_TYPE_XAUI2, 0x1} } },
{6, {{PHY_TYPE_UNCONNECTED, 0x0}, {PHY_TYPE_XAUI1, 0x1}, /* Lane 5 */
{PHY_TYPE_RXAUI1, 0x1}, {PHY_TYPE_SGMII3, 0x1},
@@ -1718,7 +1718,7 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg,
}
if (ret == 0) {
/*
- * If interface wans't initialiuzed, set the lane to
+ * If interface wans't initialized, set the lane to
* PHY_TYPE_UNCONNECTED state.
*/
ptr_comphy_map->type = PHY_TYPE_UNCONNECTED;