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authorHeiko Schocher2020-02-06 09:48:16 +0100
committerHeiko Schocher2020-09-17 06:09:53 +0200
commit6e31c62a175ca24f74b89a684c82cbb4bf423f16 (patch)
tree4f131f11de72bf8bc982c553a134c0b561614beb /drivers/qe
parent5990b059516c233bf845ad510decd6a44ba9864b (diff)
net, qe: add DM support for QE UEC ethernet
add DM/DTS support for the UEC ethernet on QUICC Engine Block. Signed-off-by: Heiko Schocher <hs@denx.de> Patch-cc: Mario Six <mario.six@gdsys.cc> Patch-cc: Qiang Zhao <qiang.zhao@nxp.com> Patch-cc: Holger Brunck <holger.brunck@hitachi-powergrids.com> Patch-cc: Madalin Bucur <madalin.bucur@oss.nxp.com> Series-changes: 3 - revert: commit "3374264df97b" ("drivers: net: qe: deselect QE when DM_ETH is enabled") as now qe works with DM and DM_ETH support. - fix mailaddress from Holger Series-changes: 2 - add comments from Qiang Zhao: - add device node documentation - I did not drop the dm_qe_uec_phy.c and use drivers/net/fsl_mdio.c because using drivers/net/fsl_mdio.c leads in none existent udevice mdio@3320 instead boards with DM ETH support should use now this driver. - remove RFC tag Commit-notes: - I let the old none DM based implementation in code so boards should work with old implementation. This Code should be removed if all boards are converted to DM/DTS. - add the DM based qe uec driver under drivers/net/qe - Therefore copied the files uccf.c uccf.h uec.h from drivers/qe. So there are a lot of Codingstyle problems currently. I fix them in next version if this RFC patch is OK or it needs some changes. - The dm based driver code is now under drivers/net/qe/dm_qe_uec.c Used a lot of functions from drivers/qe/uec.c - seperated the PHY specific code into seperate file drivers/net/qe/dm_qe_uec_phy.c END
Diffstat (limited to 'drivers/qe')
-rw-r--r--drivers/qe/Kconfig2
-rw-r--r--drivers/qe/uccf.c2
-rw-r--r--drivers/qe/uec.c2
-rw-r--r--drivers/qe/uec_phy.c3
4 files changed, 8 insertions, 1 deletions
diff --git a/drivers/qe/Kconfig b/drivers/qe/Kconfig
index 44c9f010bdf..864b36b8225 100644
--- a/drivers/qe/Kconfig
+++ b/drivers/qe/Kconfig
@@ -3,7 +3,7 @@
#
config QE
bool "Enable support for QUICC Engine"
- depends on PPC && !DM_ETH
+ depends on PPC
default y if ARCH_T1040 || ARCH_T1042 || ARCH_T1024 || ARCH_P1021 \
|| ARCH_P1025
help
diff --git a/drivers/qe/uccf.c b/drivers/qe/uccf.c
index 306f1ea1db6..d5d734439cf 100644
--- a/drivers/qe/uccf.c
+++ b/drivers/qe/uccf.c
@@ -14,6 +14,7 @@
#include "uccf.h"
#include <fsl_qe.h>
+#if !defined(CONFIG_DM_ETH)
void ucc_fast_transmit_on_demand(struct ucc_fast_priv *uccf)
{
out_be16(&uccf->uf_regs->utodr, UCC_FAST_TOD);
@@ -505,3 +506,4 @@ int ucc_fast_init(struct ucc_fast_inf *uf_info,
*uccf_ret = uccf;
return 0;
}
+#endif
diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c
index cfd5397044c..5da971ddc0a 100644
--- a/drivers/qe/uec.c
+++ b/drivers/qe/uec.c
@@ -20,6 +20,7 @@
#include <fsl_qe.h>
#include <phy.h>
+#if !defined(CONFIG_DM_ETH)
/* Default UTBIPAR SMI address */
#ifndef CONFIG_UTBIPAR_INIT_TBIPA
#define CONFIG_UTBIPAR_INIT_TBIPA 0x1F
@@ -1432,3 +1433,4 @@ int uec_standard_init(struct bd_info *bis)
{
return uec_eth_init(bis, uec_info, ARRAY_SIZE(uec_info));
}
+#endif
diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c
index b5ca5f76f9e..9d429c832f4 100644
--- a/drivers/qe/uec_phy.c
+++ b/drivers/qe/uec_phy.c
@@ -23,6 +23,8 @@
#include <fsl_qe.h>
#include <phy.h>
+#if !defined(CONFIG_DM_ETH)
+
#define ugphy_printk(format, arg...) \
printf(format "\n", ## arg)
@@ -925,3 +927,4 @@ void change_phy_interface_mode(struct eth_device *dev,
marvell_phy_interface_mode(dev, type, speed);
#endif
}
+#endif