diff options
| author | Patrice Chotard | 2017-09-27 15:44:51 +0200 |
|---|---|---|
| committer | Tom Rini | 2017-10-08 16:19:56 -0400 |
| commit | 2a7ecc536019066f77ff7b6e24cb3194ee0f65c0 (patch) | |
| tree | db56364189fb5b9e7922ce677f75642162b47121 /drivers/serial | |
| parent | 60a996bacb74052f7e3966a875dfdebee036d446 (diff) | |
serial: stm32x7: add fifo support for STM32H7
Add fifo mode support for rx and tx.
As only STM32H7 supports this feature, add has_fifo flag
to uart configuration to use fifo only when possible.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'drivers/serial')
| -rw-r--r-- | drivers/serial/serial_stm32x7.c | 6 | ||||
| -rw-r--r-- | drivers/serial/serial_stm32x7.h | 12 |
2 files changed, 15 insertions, 3 deletions
diff --git a/drivers/serial/serial_stm32x7.c b/drivers/serial/serial_stm32x7.c index 81a230860da..19697e31e74 100644 --- a/drivers/serial/serial_stm32x7.c +++ b/drivers/serial/serial_stm32x7.c @@ -117,6 +117,8 @@ static int stm32_serial_probe(struct udevice *dev) BIT(uart_enable_bit)); if (plat->uart_info->has_overrun_disable) setbits_le32(base + CR3_OFFSET(stm32f4), USART_CR3_OVRDIS); + if (plat->uart_info->has_fifo) + setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit)); @@ -125,8 +127,8 @@ static int stm32_serial_probe(struct udevice *dev) #if CONFIG_IS_ENABLED(OF_CONTROL) static const struct udevice_id stm32_serial_id[] = { - { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32x7_info}, - { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32x7_info}, + { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info}, + { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info}, {} }; diff --git a/drivers/serial/serial_stm32x7.h b/drivers/serial/serial_stm32x7.h index 4c6b7d4206d..ed8a3eeb2cb 100644 --- a/drivers/serial/serial_stm32x7.h +++ b/drivers/serial/serial_stm32x7.h @@ -24,12 +24,21 @@ struct stm32_uart_info { u8 uart_enable_bit; /* UART_CR1_UE */ bool stm32f4; /* true for STM32F4, false otherwise */ bool has_overrun_disable; + bool has_fifo; }; -struct stm32_uart_info stm32x7_info = { +struct stm32_uart_info stm32f7_info = { .uart_enable_bit = 0, .stm32f4 = false, .has_overrun_disable = true, + .has_fifo = false, +}; + +struct stm32_uart_info stm32h7_info = { + .uart_enable_bit = 0, + .stm32f4 = false, + .has_overrun_disable = true, + .has_fifo = true, }; /* Information about a serial port */ @@ -39,6 +48,7 @@ struct stm32x7_serial_platdata { unsigned long int clock_rate; }; +#define USART_CR1_FIFOEN BIT(29) #define USART_CR1_OVER8 BIT(15) #define USART_CR1_TE BIT(3) #define USART_CR1_RE BIT(2) |