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author | Marek Vasut | 2014-09-16 19:54:32 +0200 |
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committer | Marek Vasut | 2014-10-06 17:46:49 +0200 |
commit | 036ba54f5b713f60c17c4a28e4ad4d59fa913db9 (patch) | |
tree | 1bcb035b90add59f032b9e6843e7a3a112d234b3 /drivers | |
parent | 44428ab6abbba58aa90b982d4d41b39cbcbec966 (diff) |
arm: socfpga: clock: Sync with reference code
Add the missing pieces from the reference clock code from Altera. This
puts the code on par with the Altera U-Boot fork for all but the SDRAM
self-refresh bits, which are not part of this patch.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
Diffstat (limited to 'drivers')
0 files changed, 0 insertions, 0 deletions