diff options
| author | Cyril Chemparathy | 2012-07-24 12:22:16 +0000 |
|---|---|---|
| committer | Albert ARIBAUD | 2012-09-01 14:58:10 +0200 |
| commit | 2b62997ce931494da3f5836899a91ae3909a0c0c (patch) | |
| tree | bd3d1e81944fad0446b83690e0309e4f05338990 /include/cpsw.h | |
| parent | 2c30c1848742af9ae880870794c7e93660c31e52 (diff) | |
cpsw: add driver for cpsw ethernet device
CPSW is an on-chip ethernet switch that is found on various SoCs from Texas
Instruments. This patch adds a simple driver (based on the Linux driver) for
this hardware module.
This patch also adds support to clean and flush dcache during packet send
and receive.
Changes by Sandhya: Added support to clean and flush dcache during packet
send/receive and added timeouts.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
[Ilya: Cleaned cache handling, some style cleanup, some small
fixes, use of internal RAM for descriptors]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
Diffstat (limited to 'include/cpsw.h')
| -rw-r--r-- | include/cpsw.h | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/include/cpsw.h b/include/cpsw.h new file mode 100644 index 00000000000..296b0e557f3 --- /dev/null +++ b/include/cpsw.h @@ -0,0 +1,51 @@ +/* + * CPSW Ethernet Switch Driver + * + * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _CPSW_H_ +#define _CPSW_H_ + +struct cpsw_slave_data { + u32 slave_reg_ofs; + u32 sliver_reg_ofs; + int phy_id; + int phy_if; +}; + +enum { + CPSW_CTRL_VERSION_1 = 0, + CPSW_CTRL_VERSION_2 /* am33xx like devices */ +}; + +struct cpsw_platform_data { + u32 mdio_base; + u32 cpsw_base; + int mdio_div; + int channels; /* number of cpdma channels (symmetric) */ + u32 cpdma_reg_ofs; /* cpdma register offset */ + int slaves; /* number of slave cpgmac ports */ + u32 ale_reg_ofs; /* address lookup engine reg offset */ + int ale_entries; /* ale table size */ + u32 host_port_reg_ofs; /* cpdma host port registers */ + u32 hw_stats_reg_ofs; /* cpsw hw stats counters */ + u32 mac_control; + struct cpsw_slave_data *slave_data; + void (*control)(int enabled); + u32 host_port_num; + u8 version; +}; + +int cpsw_register(struct cpsw_platform_data *data); + +#endif /* _CPSW_H_ */ |