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authorShengzhou Liu2016-11-21 11:36:48 +0800
committerYork Sun2016-12-05 08:31:45 -0800
commit02fb2761576be8096ebf1b3f961a2cdb21b422ae (patch)
tree70cd556e7498ef63f2d51519958cfc2994c73950 /include/fsl_ddr.h
parent5a17b8b5dab8973089b7400d05f8503d56f29370 (diff)
fsl/ddr: Add erratum_a009942_check_cpo and clean related erratum
- add additional function erratum_a009942_check_cpo to check if the board needs tuning CPO calibration for optimal setting. - move ERRATUM_A009942(with revision to check cpo_sample option) from fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts. - move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c - remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> [YS: Replaced CONFIG_QEMU_E500 with CONFIG_ARCH_QEMU_E500] Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include/fsl_ddr.h')
-rw-r--r--include/fsl_ddr.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h
index 3351acdd7ae..0c3be0e2e02 100644
--- a/include/fsl_ddr.h
+++ b/include/fsl_ddr.h
@@ -138,4 +138,6 @@ int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
void update_spd_address(unsigned int ctrl_num,
unsigned int slot,
unsigned int *addr);
+
+void erratum_a009942_check_cpo(void);
#endif