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authorÁlvaro Fernández Rojas2017-05-16 18:46:58 +0200
committerDaniel Schwierzeck2017-05-31 14:49:55 +0200
commit07661e7f5080a76e62c2b1a4b103ce23b293fbb6 (patch)
tree58126441db2e7bb8c74fed3fd0d8e71df8cee63c /include
parent05fc9e686ad4f7e529a51cb7e58b0d1f9774df41 (diff)
MIPS: add support for Broadcom MIPS BCM6338 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include')
-rw-r--r--include/configs/bmips_bcm6338.h30
-rw-r--r--include/dt-bindings/clock/bcm6338-clock.h19
-rw-r--r--include/dt-bindings/reset/bcm6338-reset.h22
3 files changed, 71 insertions, 0 deletions
diff --git a/include/configs/bmips_bcm6338.h b/include/configs/bmips_bcm6338.h
new file mode 100644
index 00000000000..52d72c87e51
--- /dev/null
+++ b/include/configs/bmips_bcm6338.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_BCM6338_H
+#define __CONFIG_BMIPS_BCM6338_H
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ 120000000
+
+/* RAM */
+#define CONFIG_NR_DRAM_BANKS 1
+#define CONFIG_SYS_SDRAM_BASE 0x80000000
+
+/* U-Boot */
+#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#if defined(CONFIG_BMIPS_BOOT_RAM)
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_INIT_SP_OFFSET 0x2000
+#endif
+
+#define CONFIG_SYS_FLASH_BASE 0xbfc00000
+#define CONFIG_SYS_FLASH_EMPTY_INFO
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
+
+#endif /* __CONFIG_BMIPS_BCM6338_H */
diff --git a/include/dt-bindings/clock/bcm6338-clock.h b/include/dt-bindings/clock/bcm6338-clock.h
new file mode 100644
index 00000000000..3439c10062b
--- /dev/null
+++ b/include/dt-bindings/clock/bcm6338-clock.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_BCM6338_H
+#define __DT_BINDINGS_CLOCK_BCM6338_H
+
+#define BCM6338_CLK_ADSL 0
+#define BCM6338_CLK_MPI 1
+#define BCM6338_CLK_SDRAM 2
+#define BCM6338_CLK_ENET 4
+#define BCM6338_CLK_SAR 5
+#define BCM6338_CLK_SPI 9
+
+#endif /* __DT_BINDINGS_CLOCK_BCM6338_H */
diff --git a/include/dt-bindings/reset/bcm6338-reset.h b/include/dt-bindings/reset/bcm6338-reset.h
new file mode 100644
index 00000000000..17a5e121e8b
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6338-reset.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6338_H
+#define __DT_BINDINGS_RESET_BCM6338_H
+
+#define BCM6338_RST_SPI 0
+#define BCM6338_RST_ENET 2
+#define BCM6338_RST_USBH 3
+#define BCM6338_RST_USBS 4
+#define BCM6338_RST_ADSL 5
+#define BCM6338_RST_DMAMEM 6
+#define BCM6338_RST_SAR 7
+#define BCM6338_RST_ACLC 8
+#define BCM6338_RST_ADSL_MIPS 10
+
+#endif /* __DT_BINDINGS_RESET_BCM6338_H */