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authorJagan Teki2020-05-06 13:20:25 +0530
committerMarek Vasut2020-05-12 09:27:14 +0200
commit73ca0140e124fddd2f12535215a4e5a6f4339c6f (patch)
treee7779bdb0532ba68bcdd12abb3fe4fe60211646e /include
parent2a38d2239d0bb4d128b00886bf097ab247a0b1a7 (diff)
usb: dwc3: add dis_del_phy_power_chg_quirk
Add a quirk to clear the GUSB3PIPECTL.DELAYP1TRANS bit, which specifies whether disable delay PHY power change from P0 to P1/P2/P3 when link state changing from U0 to U1/U2/U3 respectively. Reference from below Linux commit, commit <00fe081dc3a3> ("usb: dwc3: add dis_del_phy_power_chg_quirk") Cc: Marek Vasut <marex@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'include')
-rw-r--r--include/dwc3-uboot.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dwc3-uboot.h b/include/dwc3-uboot.h
index ce835fd1b2b..ecae34bf069 100644
--- a/include/dwc3-uboot.h
+++ b/include/dwc3-uboot.h
@@ -33,6 +33,7 @@ struct dwc3_device {
unsigned rx_detect_poll_quirk;
unsigned dis_u3_susphy_quirk;
unsigned dis_u2_susphy_quirk;
+ unsigned dis_del_phy_power_chg_quirk;
unsigned tx_de_emphasis_quirk;
unsigned tx_de_emphasis;
int index;