diff options
| -rw-r--r-- | arch/arm/dts/rk3288-u-boot.dtsi | 5 | ||||
| -rw-r--r-- | arch/arm/dts/rk3288.dtsi | 17 |
2 files changed, 16 insertions, 6 deletions
diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi index 18941621530..19206988845 100644 --- a/arch/arm/dts/rk3288-u-boot.dtsi +++ b/arch/arm/dts/rk3288-u-boot.dtsi @@ -91,6 +91,11 @@ bootph-all; }; +&edp { + clocks = <&cru SCLK_EDP>, <&cru SCLK_EDP_24M>, <&cru PCLK_EDP_CTRL>; + clock-names = "clk_edp", "clk_edp_24m", "pclk_edp"; +}; + &gpio7 { bootph-all; }; diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi index f06d1f5bcc0..9f924466542 100644 --- a/arch/arm/dts/rk3288.dtsi +++ b/arch/arm/dts/rk3288.dtsi @@ -1177,19 +1177,24 @@ }; edp: dp@ff970000 { - compatible = "rockchip,rk3288-edp"; + compatible = "rockchip,rk3288-dp"; reg = <0xff970000 0x4000>; interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_EDP>, <&cru SCLK_EDP_24M>, <&cru PCLK_EDP_CTRL>; - clock-names = "clk_edp", "clk_edp_24m", "pclk_edp"; + clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>; + clock-names = "dp", "pclk"; + phys = <&edp_phy>; + phy-names = "dp"; + power-domains = <&power RK3288_PD_VIO>; resets = <&cru SRST_EDP>; - reset-names = "edp"; + reset-names = "dp"; rockchip,grf = <&grf>; - power-domains = <&power RK3288_PD_VIO>; status = "disabled"; ports { - edp_in: port { + #address-cells = <1>; + #size-cells = <0>; + edp_in: port@0 { + reg = <0>; #address-cells = <1>; #size-cells = <0>; edp_in_vopb: endpoint@0 { |