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-rw-r--r--arch/ppc/cpu/ppc4xx/start.S2
-rw-r--r--include/configs/katmai.h1
-rw-r--r--include/configs/yucca.h1
3 files changed, 3 insertions, 1 deletions
diff --git a/arch/ppc/cpu/ppc4xx/start.S b/arch/ppc/cpu/ppc4xx/start.S
index 927c88c78f2..c739deb9b46 100644
--- a/arch/ppc/cpu/ppc4xx/start.S
+++ b/arch/ppc/cpu/ppc4xx/start.S
@@ -475,7 +475,7 @@ tlbnxt: addi r4,r4,1 /* Next TLB */
/*----------------------------------------------------------------*/
/* TLB entry setup -- step thru tlbtab */
/*----------------------------------------------------------------*/
-#if defined(CONFIG_440SPE)
+#if defined(CONFIG_440SPE_REVA)
/*----------------------------------------------------------------*/
/* We have different TLB tables for revA and rev B of 440SPe */
/*----------------------------------------------------------------*/
diff --git a/include/configs/katmai.h b/include/configs/katmai.h
index c013ac4b3cd..fb8ccae71bf 100644
--- a/include/configs/katmai.h
+++ b/include/configs/katmai.h
@@ -37,6 +37,7 @@
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_440SPE 1 /* Specifc SPe support */
+#define CONFIG_440SPE_REVA 1 /* Support old Rev A. */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
#define CONFIG_SYS_4xx_RESET_TYPE 0x2 /* use chip reset on this board */
diff --git a/include/configs/yucca.h b/include/configs/yucca.h
index 42f880785e7..0b4dfb8e73f 100644
--- a/include/configs/yucca.h
+++ b/include/configs/yucca.h
@@ -37,6 +37,7 @@
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_440SPE 1 /* Specifc SPe support */
+#define CONFIG_440SPE_REVA 1 /* Support old Rev A. */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
#define EXTCLK_33_33 33333333