diff options
827 files changed, 25765 insertions, 24599 deletions
diff --git a/.gitignore b/.gitignore index be137040a2c..37f71c275c3 100644 --- a/.gitignore +++ b/.gitignore @@ -10,6 +10,7 @@ *.a *.asn1.[ch] *.bin +*.bin[_.]* *.cfgout *.cover *.dtb @@ -17,23 +18,27 @@ *.dtb.S *.elf *.exe +*.fit *.gcda *.gcno *.i *.img +*.itb *.lex.c *.lst +*.map *.mod.c *.mbx *.o *.o.* *.order *.patch +*.pem *.s *.su *.swp *.tab.[ch] - +*.ti-* # Build tree /build* @@ -67,6 +72,7 @@ fit-dtb.blob* /Test* /capsule.*.efi-capsule /capsule*.map +/keep-syms-lto.* # # Generated include files @@ -15,6 +15,7 @@ # Proper Name <proper@email.xx> <commit@email.xx> # Proper Name <proper@email.xx> Commit Name <commit@email.xx> +AKASHI Takahiro <akashi.tkhro@gmail.com> <takahiro.akashi@linaro.org> Alexander Graf <agraf@csgraf.de> <agraf@suse.de> Allen Martin <amartin@nvidia.com> Amanda Baze <amanda.baze@amd.com> <nicole.baze@xilinx.com> diff --git a/MAINTAINERS b/MAINTAINERS index 0462ade4ac6..921ce05755a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -603,11 +603,9 @@ ARM SNAPDRAGON M: Caleb Connolly <caleb.connolly@linaro.org> M: Neil Armstrong <neil.armstrong@linaro.org> R: Sumit Garg <sumit.garg@linaro.org> +L: u-boot-qcom@groups.io S: Maintained -F: arch/arm/dts/msm8*.dtsi -F: arch/arm/dts/pm8???.dtsi -F: arch/arm/dts/pms405.dtsi -F: arch/arm/dts/sdm845.dtsi +T: git https://source.denx.de/u-boot/custodians/u-boot-snapdragon.git F: drivers/*/*/pm8???-* F: drivers/gpio/msm_gpio.c F: drivers/mmc/msm_sdhci.c @@ -1642,9 +1640,18 @@ M: Jens Wiklander <jens.wiklander@linaro.org> M: Ilias Apalodimas <ilias.apalodimas@linaro.org> T: git https://source.denx.de/u-boot/custodians/u-boot-tpm.git S: Maintained +F: cmd/optee* +F: doc/README.tee +F: doc/device-tree-bindings/firmware/linaro,optee-tz.txt +F: drivers/firmware/scmi/optee_agent.c F: drivers/tee/ +F: include/sandboxtee.h F: include/tee.h F: include/tee/ +F: include/test/optee.h +F: test/dm/tee.c +F: test/optee/ +F: test/py/tests/test_optee_rpmb.py TEE-lib M: Bryan O'Donoghue <bryan.odonoghue@linaro.org> @@ -1,9 +1,9 @@ # SPDX-License-Identifier: GPL-2.0+ VERSION = 2024 -PATCHLEVEL = 04 +PATCHLEVEL = 07 SUBLEVEL = -EXTRAVERSION = +EXTRAVERSION = -rc1 NAME = # *DOCUMENTATION* @@ -717,7 +717,7 @@ KBUILD_CFLAGS += -O2 endif ifdef CONFIG_CC_OPTIMIZE_FOR_DEBUG -KBUILD_CFLAGS += -Og -Wno-maybe-uninitialized +KBUILD_CFLAGS += -Og # Avoid false positives -Wmaybe-uninitialized # https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78394 KBUILD_CFLAGS += -Wno-maybe-uninitialized diff --git a/arch/arc/lib/Makefile b/arch/arc/lib/Makefile index bde1c3d8af3..0eb44bcf33d 100644 --- a/arch/arc/lib/Makefile +++ b/arch/arc/lib/Makefile @@ -12,6 +12,6 @@ obj-y += reset.o obj-y += ints_low.o obj-y += init_helpers.o -obj-$(CONFIG_BOOTM) += bootm.o +obj-$(CONFIG_CMD_BOOTM) += bootm.o lib-$(CONFIG_USE_PRIVATE_LIBGCC) += _millicodethunk.o libgcc2.o diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 23ee25269a2..93e12d8d533 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -762,10 +762,8 @@ config ARCH_IPQ40XX select DM_SERIAL select DM_RESET select GPIO_EXTRA_HEADER - select MSM_SMEM select PINCTRL select CLK - select SMEM select OF_CONTROL select CLK_QCOM_IPQ4019 select PINCTRL_QCOM_IPQ4019 @@ -1022,7 +1020,7 @@ config ARCH_APPLE select USB imply CMD_DM imply CMD_GPT - imply DISTRO_DEFAULTS + imply BOOTSTD_FULL imply OF_HAS_PRIOR_STAGE config ARCH_OWL @@ -1068,6 +1066,7 @@ config ARCH_RENESAS imply BOARD_EARLY_INIT_F imply CMD_DM imply FAT_WRITE + imply OF_UPSTREAM imply SYS_THUMB_BUILD imply ARCH_MISC_INIT if DISPLAY_CPUINFO @@ -1088,7 +1087,8 @@ config ARCH_SNAPDRAGON select BOARD_LATE_INIT select OF_BOARD select SAVE_PREV_BL_FDT_ADDR - select LINUX_KERNEL_IMAGE_HEADER + select LINUX_KERNEL_IMAGE_HEADER if !ENABLE_ARM_SOC_BOOT0_HOOK + imply OF_UPSTREAM imply CMD_DM config ARCH_SOCFPGA @@ -1344,7 +1344,7 @@ config ARCH_ZYNQMP config ARCH_TEGRA bool "NVIDIA Tegra" select GPIO_EXTRA_HEADER - imply DISTRO_DEFAULTS + imply BOOTSTD_DEFAULTS imply FAT_WRITE imply SPL_TIMER if SPL diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c index 1541dfb3ec4..b1bb29bcaf5 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c @@ -258,7 +258,7 @@ int setup_serdes_volt(u32 svdd) /* Wait for SVDD to stabilize */ udelay(100); - /* For each PLL that’s not disabled via RCW */ + /* For each PLL that's not disabled via RCW */ #ifdef CONFIG_SYS_FSL_SRDS_1 cfg_tmp = (cfg_rcw5 >> 22) & 0x3; for (i = 0; i < 2 && !(cfg_tmp & (0x1 << (1 - i))); i++) { diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c index c0efc341afc..fbd5fd7d433 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c @@ -483,7 +483,7 @@ int setup_serdes_volt(u32 svdd) ret = -1; } - /* For each PLL that’s not disabled via RCW enable the SERDES */ + /* For each PLL that's not disabled via RCW enable the SERDES */ #ifdef CONFIG_SYS_FSL_SRDS_1 cfg_tmp = cfg_rcwsrds1 & 0x3; do_serdes_enable(cfg_tmp, serdes1_base); diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 08dfbdd557b..90b08f6dfa8 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -167,8 +167,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \ rk3568-rock-3a.dtb dtb-$(CONFIG_ROCKCHIP_RK3588) += \ - rk3588s-coolpi-4b.dts \ - rk3588-coolpi-cm5-evb.dts \ + rk3588s-coolpi-4b.dtb \ + rk3588-coolpi-cm5-evb.dtb \ rk3588-edgeble-neu6a-io.dtb \ rk3588-edgeble-neu6b-io.dtb \ rk3588-evb1-v10.dtb \ @@ -180,6 +180,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3588) += \ rk3588-quartzpro64.dtb \ rk3588s-rock-5a.dtb \ rk3588-rock-5b.dtb \ + rk3588-toybrick-x0.dtb \ rk3588-turing-rk1.dtb dtb-$(CONFIG_ROCKCHIP_RV1108) += \ @@ -572,12 +573,6 @@ dtb-$(CONFIG_TARGET_SL28) += fsl-ls1028a-kontron-sl28.dtb \ dtb-$(CONFIG_TARGET_TEN64) += fsl-ls1088a-ten64.dtb -dtb-$(CONFIG_ARCH_SNAPDRAGON) += apq8016-sbc.dtb \ - apq8096-db820c.dtb \ - sdm845-db845c.dtb \ - sdm845-samsung-starqltechn.dtb \ - qcs404-evb-4000.dtb - dtb-$(CONFIG_TARGET_STEMMY) += ste-ux500-samsung-stemmy.dtb dtb-$(CONFIG_STM32F4) += stm32f429-disco.dtb \ @@ -1047,7 +1042,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \ imx8mq-librem5-r4.dtb dtb-$(CONFIG_ARCH_IMX9) += \ - imx93-11x11-evk.dtb \ imx93-var-som-symphony.dtb \ imx93-phyboard-segin.dtb @@ -1056,41 +1050,41 @@ dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \ imxrt1170-evk.dtb \ dtb-$(CONFIG_RCAR_GEN2) += \ - r8a7790-lager-u-boot.dtb \ - r8a7790-stout-u-boot.dtb \ - r8a7791-koelsch-u-boot.dtb \ - r8a7791-porter-u-boot.dtb \ - r8a7792-blanche-u-boot.dtb \ - r8a7793-gose-u-boot.dtb \ - r8a7794-alt-u-boot.dtb \ - r8a7794-silk-u-boot.dtb + r8a7790-lager.dtb \ + r8a7790-stout.dtb \ + r8a7791-koelsch.dtb \ + r8a7791-porter.dtb \ + r8a7792-blanche.dtb \ + r8a7793-gose.dtb \ + r8a7794-alt.dtb \ + r8a7794-silk.dtb dtb-$(CONFIG_RCAR_GEN3) += \ r8a774a1-beacon-rzg2m-kit.dtb \ r8a774b1-beacon-rzg2n-kit.dtb \ r8a774e1-beacon-rzg2h-kit.dtb \ - r8a774a1-hihope-rzg2m-u-boot.dtb \ - r8a774b1-hihope-rzg2n-u-boot.dtb \ - r8a774c0-ek874-u-boot.dtb \ - r8a774e1-hihope-rzg2h-u-boot.dtb \ - r8a77950-ulcb-u-boot.dtb \ - r8a77950-salvator-x-u-boot.dtb \ - r8a77960-ulcb-u-boot.dtb \ - r8a77960-salvator-x-u-boot.dtb \ - r8a77965-ulcb-u-boot.dtb \ - r8a77965-salvator-x-u-boot.dtb \ - r8a77970-eagle-u-boot.dtb \ - r8a77970-v3msk-u-boot.dtb \ - r8a77980-condor-u-boot.dtb \ - r8a77980-v3hsk-u-boot.dtb \ - r8a77990-ebisu-u-boot.dtb \ - r8a77995-draak-u-boot.dtb + r8a774a1-hihope-rzg2m.dtb \ + r8a774b1-hihope-rzg2n.dtb \ + r8a774c0-ek874.dtb \ + r8a774e1-hihope-rzg2h.dtb \ + r8a77951-ulcb.dtb \ + r8a77951-salvator-x.dtb \ + r8a77960-ulcb.dtb \ + r8a77960-salvator-x.dtb \ + r8a77965-ulcb.dtb \ + r8a77965-salvator-x.dtb \ + r8a77970-eagle.dtb \ + r8a77970-v3msk.dtb \ + r8a77980-condor.dtb \ + r8a77980-v3hsk.dtb \ + r8a77990-ebisu.dtb \ + r8a77995-draak.dtb dtb-$(CONFIG_RCAR_GEN4) += \ - r8a779a0-falcon-u-boot.dtb \ - r8a779f0-spider-u-boot.dtb \ - r8a779g0-white-hawk-u-boot.dtb \ - r8a779h0-gray-hawk-u-boot.dtb + r8a779a0-falcon.dtb \ + r8a779f0-spider.dtb \ + r8a779g0-white-hawk.dtb \ + r8a779h0-gray-hawk.dtb dtb-$(CONFIG_TARGET_RZG2L) += \ r9a07g044l2-smarc.dts @@ -1100,7 +1094,7 @@ DTC_FLAGS += -R 4 -p 0x1000 endif dtb-$(CONFIG_RZA1) += \ - r7s72100-gr-peach-u-boot.dtb + r7s72100-gr-peach.dtb dtb-$(CONFIG_ARCH_KEYSTONE) += keystone-k2hk-evm.dtb \ keystone-k2l-evm.dtb \ @@ -1326,7 +1320,9 @@ dtb-$(CONFIG_SOC_K3_AM654) += \ k3-am6548-iot2050-advanced-pg2.dtb \ k3-am6548-iot2050-advanced-m2.dtb \ k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dtbo \ - k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dtbo + k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dtbo \ + k3-am654-icssg2.dtbo + dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \ k3-j721e-r5-common-proc-board.dtb \ k3-j7200-common-proc-board.dtb \ diff --git a/arch/arm/dts/apq8016-sbc.dts b/arch/arm/dts/apq8016-schneider-hmibsc.dts index 9ffad7d1f2b..75c6137e5a1 100644 --- a/arch/arm/dts/apq8016-sbc.dts +++ b/arch/arm/dts/apq8016-schneider-hmibsc.dts @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2024, Linaro Ltd. */ /dts-v1/; @@ -14,50 +15,25 @@ #include <dt-bindings/sound/apq8016-lpass.h> / { - model = "Qualcomm Technologies, Inc. APQ 8016 SBC"; - compatible = "qcom,apq8016-sbc", "qcom,apq8016"; + model = "Schneider Electric HMIBSC Board"; + compatible = "schneider,apq8016-hmibsc", "qcom,apq8016"; aliases { - mmc0 = &sdhc_1; /* eMMC */ - mmc1 = &sdhc_2; /* SD card */ - serial0 = &blsp_uart2; - serial1 = &blsp_uart1; - usid0 = &pm8916_0; - i2c0 = &blsp_i2c2; i2c1 = &blsp_i2c6; i2c3 = &blsp_i2c4; + i2c4 = &blsp_i2c3; + mmc0 = &sdhc_1; /* eMMC */ + mmc1 = &sdhc_2; /* SD card */ + serial0 = &blsp_uart1; + serial1 = &blsp_uart2; spi0 = &blsp_spi5; - spi1 = &blsp_spi3; + usid0 = &pm8916_0; }; chosen { stdout-path = "serial0"; }; - reserved-memory { - ramoops@bff00000 { - compatible = "ramoops"; - reg = <0x0 0xbff00000 0x0 0x100000>; - - record-size = <0x20000>; - console-size = <0x20000>; - ftrace-size = <0x20000>; - }; - }; - - usb2513 { - compatible = "smsc,usb3503"; - reset-gpios = <&pm8916_gpios 3 GPIO_ACTIVE_LOW>; - initial-mode = <1>; - }; - - usb_id: usb-id { - compatible = "linux,extcon-usb-gpio"; - id-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&usb_id_default>; - }; - hdmi-out { compatible = "hdmi-connector"; type = "a"; @@ -72,9 +48,8 @@ gpio-keys { compatible = "gpio-keys"; autorepeat; - - pinctrl-names = "default"; pinctrl-0 = <&msm_key_volp_n_default>; + pinctrl-names = "default"; button { label = "Volume Up"; @@ -84,51 +59,11 @@ }; leds { - pinctrl-names = "default"; - pinctrl-0 = <&tlmm_leds>, - <&pm8916_gpios_leds>, - <&pm8916_mpps_leds>; - compatible = "gpio-leds"; + pinctrl-0 = <&pm8916_mpps_leds>; + pinctrl-names = "default"; - led@1 { - label = "apq8016-sbc:green:user1"; - function = LED_FUNCTION_HEARTBEAT; - color = <LED_COLOR_ID_GREEN>; - gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - default-state = "off"; - }; - - led@2 { - label = "apq8016-sbc:green:user2"; - function = LED_FUNCTION_DISK_ACTIVITY; - color = <LED_COLOR_ID_GREEN>; - gpios = <&tlmm 120 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "mmc0"; - default-state = "off"; - }; - - led@3 { - label = "apq8016-sbc:green:user3"; - function = LED_FUNCTION_DISK_ACTIVITY; - color = <LED_COLOR_ID_GREEN>; - gpios = <&pm8916_gpios 1 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "mmc1"; - default-state = "off"; - }; - - led@4 { - label = "apq8016-sbc:green:user4"; - color = <LED_COLOR_ID_GREEN>; - gpios = <&pm8916_gpios 2 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "none"; - panic-indicator; - default-state = "off"; - }; - - led@5 { - label = "apq8016-sbc:yellow:wlan"; + led-1 { function = LED_FUNCTION_WLAN; color = <LED_COLOR_ID_YELLOW>; gpios = <&pm8916_mpps 2 GPIO_ACTIVE_HIGH>; @@ -136,8 +71,7 @@ default-state = "off"; }; - led@6 { - label = "apq8016-sbc:blue:bt"; + led-2 { function = LED_FUNCTION_BLUETOOTH; color = <LED_COLOR_ID_BLUE>; gpios = <&pm8916_mpps 3 GPIO_ACTIVE_HIGH>; @@ -145,30 +79,56 @@ default-state = "off"; }; }; + + memory@80000000 { + reg = <0 0x80000000 0 0x40000000>; + }; + + reserved-memory { + ramoops@bff00000 { + compatible = "ramoops"; + reg = <0x0 0xbff00000 0x0 0x100000>; + record-size = <0x20000>; + console-size = <0x20000>; + ftrace-size = <0x20000>; + ecc-size = <16>; + }; + }; + + usb-hub { + compatible = "smsc,usb3503"; + reset-gpios = <&pm8916_gpios 1 GPIO_ACTIVE_LOW>; + initial-mode = <1>; + }; + + usb_id: usb-id { + compatible = "linux,extcon-usb-gpio"; + id-gpios = <&tlmm 110 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&usb_id_default>; + pinctrl-names = "default"; + }; }; -&blsp_i2c2 { - /* On Low speed expansion: LS-I2C0 */ +&blsp_i2c3 { status = "okay"; + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; }; &blsp_i2c4 { - /* On High speed expansion: HS-I2C2 */ status = "okay"; adv_bridge: bridge@39 { - status = "okay"; - compatible = "adi,adv7533"; reg = <0x39>; - - interrupt-parent = <&tlmm>; - interrupts = <31 IRQ_TYPE_EDGE_FALLING>; + interrupts-extended = <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; adi,dsi-lanes = <4>; clocks = <&rpmcc RPM_SMD_BB_CLK2>; clock-names = "cec"; - pd-gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>; avdd-supply = <&pm8916_l6>; @@ -178,10 +138,10 @@ v1p2-supply = <&pm8916_l6>; v3p3-supply = <&pm8916_l17>; - pinctrl-names = "default","sleep"; pinctrl-0 = <&adv7533_int_active &adv7533_switch_active>; pinctrl-1 = <&adv7533_int_suspend &adv7533_switch_suspend>; - #sound-dai-cells = <1>; + pinctrl-names = "default","sleep"; + #sound-dai-cells = <0>; ports { #address-cells = <1>; @@ -205,35 +165,37 @@ }; &blsp_i2c6 { - /* On Low speed expansion: LS-I2C1 */ status = "okay"; -}; -&blsp_spi3 { - /* On High speed expansion: HS-SPI1 */ - status = "okay"; + rtc@30 { + compatible = "sii,s35390a"; + reg = <0x30>; + }; + + eeprom@50 { + compatible = "atmel,24c256"; + reg = <0x50>; + }; }; &blsp_spi5 { - /* On Low speed expansion: LS-SPI0 */ + cs-gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; status = "okay"; + + tpm@0 { + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; + reg = <0>; + spi-max-frequency = <500000>; + }; }; &blsp_uart1 { + label = "UART0"; status = "okay"; - label = "LS-UART0"; }; &blsp_uart2 { - status = "okay"; - label = "LS-UART1"; -}; - -&camss { - status = "okay"; -}; - -&gpu { + label = "UART1"; status = "okay"; }; @@ -241,14 +203,6 @@ status = "okay"; }; -&lpass_codec { - status = "okay"; -}; - -&mba_mem { - status = "okay"; -}; - &mdss { status = "okay"; }; @@ -258,51 +212,70 @@ remote-endpoint = <&adv7533_in>; }; -&mpss { +&pm8916_codec { + qcom,mbhc-vthreshold-low = <75 150 237 450 500>; + qcom,mbhc-vthreshold-high = <75 150 237 450 500>; status = "okay"; - - firmware-name = "qcom/apq8016/mba.mbn", "qcom/apq8016/modem.mbn"; }; -&mpss_mem { - status = "okay"; - reg = <0x0 0x86800000 0x0 0x2b00000>; +&pm8916_gpios { + gpio-line-names = + "USB_HUB_RESET_N_PM", + "USB_SW_SEL_PM", + "NC", + "NC"; + + usb_hub_reset_pm: usb-hub-reset-pm-state { + pins = "gpio1"; + function = PMIC_GPIO_FUNC_NORMAL; + input-disable; + output-high; + }; + + usb_hub_reset_pm_device: usb-hub-reset-pm-device-state { + pins = "gpio1"; + function = PMIC_GPIO_FUNC_NORMAL; + input-disable; + output-low; + }; + + usb_sw_sel_pm: usb-sw-sel-pm-state { + pins = "gpio2"; + function = PMIC_GPIO_FUNC_NORMAL; + power-source = <PM8916_GPIO_VPH>; + input-disable; + output-high; + }; + + usb_sw_sel_pm_device: usb-sw-sel-pm-device-state { + pins = "gpio2"; + function = PMIC_GPIO_FUNC_NORMAL; + power-source = <PM8916_GPIO_VPH>; + input-disable; + output-low; + }; }; -&pm8916_codec { - status = "okay"; - qcom,mbhc-vthreshold-low = <75 150 237 450 500>; - qcom,mbhc-vthreshold-high = <75 150 237 450 500>; +&pm8916_mpps { + gpio-line-names = + "NC", + "WLAN_LED_CTRL", + "BT_LED_CTRL", + "NC"; + + pm8916_mpps_leds: pm8916-mpps-state { + pins = "mpp2", "mpp3"; + function = "digital"; + output-low; + }; }; &pm8916_resin { + linux,code = <KEY_POWER>; status = "okay"; - linux,code = <KEY_VOLUMEDOWN>; }; &pm8916_rpm_regulators { - /* - * The 96Boards specification expects a 1.8V power rail on the low-speed - * expansion connector that is able to provide at least 0.18W / 100 mA. - * L15/L16 are connected in parallel to provide 55 mA each. A minimum load - * must be specified to ensure the regulators are not put in LPM where they - * would only provide 5 mA. - */ - pm8916_l15: l15 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-system-load = <50000>; - regulator-allow-set-load; - regulator-always-on; - }; - pm8916_l16: l16 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-system-load = <50000>; - regulator-allow-set-load; - regulator-always-on; - }; - pm8916_l17: l17 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; @@ -314,25 +287,22 @@ }; &sdhc_2 { - status = "okay"; - - pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc2_default &sdc2_cd_default>; pinctrl-1 = <&sdc2_sleep &sdc2_cd_default>; - + pinctrl-names = "default", "sleep"; cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; + status = "okay"; }; &sound { - status = "okay"; - pinctrl-0 = <&cdc_pdm_default &sec_mi2s_default>; pinctrl-1 = <&cdc_pdm_sleep &sec_mi2s_sleep>; pinctrl-names = "default", "sleep"; - model = "DB410c"; + model = "HMIBSC"; audio-routing = "AMIC2", "MIC BIAS Internal2", "AMIC3", "MIC BIAS External1"; + status = "okay"; quaternary-dai-link { link-name = "ADV7533"; @@ -365,258 +335,13 @@ }; }; -&usb { - status = "okay"; - extcon = <&usb_id>, <&usb_id>; - - pinctrl-names = "default", "device"; - pinctrl-0 = <&usb_sw_sel_pm &usb_hub_reset_pm>; - pinctrl-1 = <&usb_sw_sel_pm_device &usb_hub_reset_pm_device>; -}; - -&usb_hs_phy { - extcon = <&usb_id>; -}; - -&venus { - status = "okay"; -}; - -&venus_mem { - status = "okay"; -}; - -&wcnss { - status = "okay"; - firmware-name = "qcom/apq8016/wcnss.mbn"; -}; - -&wcnss_ctrl { - firmware-name = "qcom/apq8016/WCNSS_qcom_wlan_nv_sbc.bin"; -}; - -&wcnss_iris { - compatible = "qcom,wcn3620"; -}; - -&wcnss_mem { - status = "okay"; -}; - -/* Enable CoreSight */ -&cti0 { status = "okay"; }; -&cti1 { status = "okay"; }; -&cti12 { status = "okay"; }; -&cti13 { status = "okay"; }; -&cti14 { status = "okay"; }; -&cti15 { status = "okay"; }; -&debug0 { status = "okay"; }; -&debug1 { status = "okay"; }; -&debug2 { status = "okay"; }; -&debug3 { status = "okay"; }; -&etf { status = "okay"; }; -&etm0 { status = "okay"; }; -&etm1 { status = "okay"; }; -&etm2 { status = "okay"; }; -&etm3 { status = "okay"; }; -&etr { status = "okay"; }; -&funnel0 { status = "okay"; }; -&funnel1 { status = "okay"; }; -&replicator { status = "okay"; }; -&stm { status = "okay"; }; -&tpiu { status = "okay"; }; - -/* - * 2mA drive strength is not enough when connecting multiple - * I2C devices with different pull up resistors. - */ -&blsp_i2c2_default { - drive-strength = <16>; -}; - -&blsp_i2c4_default { - drive-strength = <16>; -}; - -&blsp_i2c6_default { - drive-strength = <16>; -}; - -/* - * GPIO name legend: proper name = the GPIO line is used as GPIO - * NC = not connected (pin out but not routed from the chip to - * anything the board) - * "[PER]" = pin is muxed for [peripheral] (not GPIO) - * LSEC = Low Speed External Connector - * HSEC = High Speed External Connector - * - * Line names are taken from the schematic "DragonBoard410c" - * dated monday, august 31, 2015. Page 5 in particular. - * - * For the lines routed to the external connectors the - * lines are named after the 96Boards CE Specification 1.0, - * Appendix "Expansion Connector Signal Description". - * - * When the 96Board naming of a line and the schematic name of - * the same line are in conflict, the 96Board specification - * takes precedence, which means that the external UART on the - * LSEC is named UART0 while the schematic and SoC names this - * UART3. This is only for the informational lines i.e. "[FOO]", - * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only - * ones actually used for GPIO. - */ - &tlmm { - gpio-line-names = - "[UART0_TX]", /* GPIO_0, LSEC pin 5 */ - "[UART0_RX]", /* GPIO_1, LSEC pin 7 */ - "[UART0_CTS_N]", /* GPIO_2, LSEC pin 3 */ - "[UART0_RTS_N]", /* GPIO_3, LSEC pin 9 */ - "[UART1_TX]", /* GPIO_4, LSEC pin 11 */ - "[UART1_RX]", /* GPIO_5, LSEC pin 13 */ - "[I2C0_SDA]", /* GPIO_8, LSEC pin 17 */ - "[I2C0_SCL]", /* GPIO_7, LSEC pin 15 */ - "[SPI1_DOUT]", /* SPI1_MOSI, HSEC pin 1 */ - "[SPI1_DIN]", /* SPI1_MISO, HSEC pin 11 */ - "[SPI1_CS]", /* SPI1_CS_N, HSEC pin 7 */ - "[SPI1_SCLK]", /* SPI1_CLK, HSEC pin 9 */ - "GPIO-B", /* LS_EXP_GPIO_B, LSEC pin 24 */ - "GPIO-C", /* LS_EXP_GPIO_C, LSEC pin 25 */ - "[I2C3_SDA]", /* HSEC pin 38 */ - "[I2C3_SCL]", /* HSEC pin 36 */ - "[SPI0_MOSI]", /* LSEC pin 14 */ - "[SPI0_MISO]", /* LSEC pin 10 */ - "[SPI0_CS_N]", /* LSEC pin 12 */ - "[SPI0_CLK]", /* LSEC pin 8 */ - "HDMI_HPD_N", /* GPIO 20 */ - "USR_LED_1_CTRL", - "[I2C1_SDA]", /* GPIO_22, LSEC pin 21 */ - "[I2C1_SCL]", /* GPIO_23, LSEC pin 19 */ - "GPIO-G", /* LS_EXP_GPIO_G, LSEC pin 29 */ - "GPIO-H", /* LS_EXP_GPIO_H, LSEC pin 30 */ - "[CSI0_MCLK]", /* HSEC pin 15 */ - "[CSI1_MCLK]", /* HSEC pin 17 */ - "GPIO-K", /* LS_EXP_GPIO_K, LSEC pin 33 */ - "[I2C2_SDA]", /* HSEC pin 34 */ - "[I2C2_SCL]", /* HSEC pin 32 */ - "DSI2HDMI_INT_N", - "DSI_SW_SEL_APQ", - "GPIO-L", /* LS_EXP_GPIO_L, LSEC pin 34 */ - "GPIO-J", /* LS_EXP_GPIO_J, LSEC pin 32 */ - "GPIO-I", /* LS_EXP_GPIO_I, LSEC pin 31 */ - "GPIO-A", /* LS_EXP_GPIO_A, LSEC pin 23 */ - "FORCED_USB_BOOT", - "SD_CARD_DET_N", - "[WCSS_BT_SSBI]", - "[WCSS_WLAN_DATA_2]", /* GPIO 40 */ - "[WCSS_WLAN_DATA_1]", - "[WCSS_WLAN_DATA_0]", - "[WCSS_WLAN_SET]", - "[WCSS_WLAN_CLK]", - "[WCSS_FM_SSBI]", - "[WCSS_FM_SDI]", - "[WCSS_BT_DAT_CTL]", - "[WCSS_BT_DAT_STB]", - "NC", - "NC", /* GPIO 50 */ - "NC", - "NC", - "NC", - "NC", - "NC", - "NC", - "NC", - "NC", - "NC", - "NC", /* GPIO 60 */ - "NC", - "NC", - "[CDC_PDM0_CLK]", - "[CDC_PDM0_SYNC]", - "[CDC_PDM0_TX0]", - "[CDC_PDM0_RX0]", - "[CDC_PDM0_RX1]", - "[CDC_PDM0_RX2]", - "GPIO-D", /* LS_EXP_GPIO_D, LSEC pin 26 */ - "NC", /* GPIO 70 */ - "NC", - "NC", - "NC", - "NC", /* GPIO 74 */ - "NC", - "NC", - "NC", - "NC", - "NC", - "BOOT_CONFIG_0", /* GPIO 80 */ - "BOOT_CONFIG_1", - "BOOT_CONFIG_2", - "BOOT_CONFIG_3", - "NC", - "NC", - "BOOT_CONFIG_5", - "NC", - "NC", - "NC", - "NC", /* GPIO 90 */ - "NC", - "NC", - "NC", - "NC", - "NC", - "NC", - "NC", - "NC", - "NC", - "NC", /* GPIO 100 */ - "NC", - "NC", - "NC", - "SSBI_GPS", - "NC", - "NC", - "KEY_VOLP_N", - "NC", - "NC", - "[LS_EXP_MI2S_WS]", /* GPIO 110 */ - "NC", - "NC", - "[LS_EXP_MI2S_SCK]", - "[LS_EXP_MI2S_DATA0]", - "GPIO-E", /* LS_EXP_GPIO_E, LSEC pin 27 */ - "NC", - "[DSI2HDMI_MI2S_WS]", - "[DSI2HDMI_MI2S_SCK]", - "[DSI2HDMI_MI2S_DATA0]", - "USR_LED_2_CTRL", /* GPIO 120 */ - "SB_HS_ID"; - - sdc2_cd_default: sdc2-cd-default-state { - pins = "gpio38"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - tlmm_leds: tlmm-leds-state { - pins = "gpio21", "gpio120"; - function = "gpio"; - - output-low; - }; - - usb_id_default: usb-id-default-state { - pins = "gpio121"; - function = "gpio"; - - drive-strength = <8>; - bias-pull-up; - }; + pinctrl-0 = <&uart1_mux0_rs232_high &uart1_mux1_rs232_low>; + pinctrl-names = "default"; adv7533_int_active: adv533-int-active-state { pins = "gpio31"; function = "gpio"; - drive-strength = <16>; bias-disable; }; @@ -624,7 +349,6 @@ adv7533_int_suspend: adv7533-int-suspend-state { pins = "gpio31"; function = "gpio"; - drive-strength = <2>; bias-disable; }; @@ -632,7 +356,6 @@ adv7533_switch_active: adv7533-switch-active-state { pins = "gpio32"; function = "gpio"; - drive-strength = <16>; bias-disable; }; @@ -640,7 +363,6 @@ adv7533_switch_suspend: adv7533-switch-suspend-state { pins = "gpio32"; function = "gpio"; - drive-strength = <2>; bias-disable; }; @@ -648,82 +370,122 @@ msm_key_volp_n_default: msm-key-volp-n-default-state { pins = "gpio107"; function = "gpio"; - drive-strength = <8>; bias-pull-up; }; -}; -&pm8916_gpios { - gpio-line-names = - "USR_LED_3_CTRL", - "USR_LED_4_CTRL", - "USB_HUB_RESET_N_PM", - "USB_SW_SEL_PM"; - - usb_hub_reset_pm: usb-hub-reset-pm-state { - pins = "gpio3"; - function = PMIC_GPIO_FUNC_NORMAL; + sdc2_cd_default: sdc2-cd-default-state { + pins = "gpio38"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; - input-disable; + /* + * UART1 being the debug console supports various modes of + * operation (RS-232/485/422) controlled via GPIOs configured + * mux as follows: + * + * gpio100 gpio99 UART mode + * 0 0 loopback + * 0 1 RS-232 + * 1 0 RS-485 + * 1 1 RS-422 + * + * The default mode configured here is RS-232 mode. + */ + uart1_mux0_rs232_high: uart1-mux0-rs232-state { + bootph-all; + pins = "gpio99"; + function = "gpio"; + drive-strength = <16>; + bias-disable; output-high; }; - usb_hub_reset_pm_device: usb-hub-reset-pm-device-state { - pins = "gpio3"; - function = PMIC_GPIO_FUNC_NORMAL; - + uart1_mux1_rs232_low: uart1-mux1-rs232-state { + bootph-all; + pins = "gpio100"; + function = "gpio"; + drive-strength = <16>; + bias-disable; output-low; }; - usb_sw_sel_pm: usb-sw-sel-pm-state { - pins = "gpio4"; - function = PMIC_GPIO_FUNC_NORMAL; - - power-source = <PM8916_GPIO_VPH>; - input-disable; - output-high; + usb_id_default: usb-id-default-state { + pins = "gpio110"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; }; +}; - usb_sw_sel_pm_device: usb-sw-sel-pm-device-state { - pins = "gpio4"; - function = PMIC_GPIO_FUNC_NORMAL; +&usb { + extcon = <&usb_id>, <&usb_id>; + pinctrl-0 = <&usb_sw_sel_pm &usb_hub_reset_pm>; + pinctrl-1 = <&usb_sw_sel_pm_device &usb_hub_reset_pm_device>; + pinctrl-names = "default", "device"; + status = "okay"; +}; - power-source = <PM8916_GPIO_VPH>; - input-disable; - output-low; - }; +&usb_hs_phy { + extcon = <&usb_id>; +}; - pm8916_gpios_leds: pm8916-gpios-leds-state { - pins = "gpio1", "gpio2"; - function = PMIC_GPIO_FUNC_NORMAL; +&wcnss { + firmware-name = "qcom/apq8016/wcnss.mbn"; + status = "okay"; +}; - output-low; - }; +&wcnss_ctrl { + firmware-name = "qcom/apq8016/WCNSS_qcom_wlan_nv_sbc.bin"; }; -&pm8916_mpps { - gpio-line-names = - "VDD_PX_BIAS", - "WLAN_LED_CTRL", - "BT_LED_CTRL", - "GPIO-F"; /* LS_EXP_GPIO_F, LSEC pin 28 */ +&wcnss_iris { + compatible = "qcom,wcn3620"; +}; - pinctrl-names = "default"; - pinctrl-0 = <&ls_exp_gpio_f>; +&wcnss_mem { + status = "okay"; +}; - ls_exp_gpio_f: pm8916-mpp4-state { - pins = "mpp4"; - function = "digital"; +/* PINCTRL - additions to nodes defined in msm8916.dtsi */ - output-low; - power-source = <PM8916_MPP_L5>; /* 1.8V */ - }; +/* + * 2mA drive strength is not enough when connecting multiple + * I2C devices with different pull up resistors. + */ +&blsp_i2c4_default { + drive-strength = <16>; +}; - pm8916_mpps_leds: pm8916-mpps-state { - pins = "mpp2", "mpp3"; - function = "digital"; +&blsp_i2c6_default { + drive-strength = <16>; +}; - output-low; - }; +&blsp_uart1_default { + bootph-all; }; + +/* Enable CoreSight */ +&cti0 { status = "okay"; }; +&cti1 { status = "okay"; }; +&cti12 { status = "okay"; }; +&cti13 { status = "okay"; }; +&cti14 { status = "okay"; }; +&cti15 { status = "okay"; }; +&debug0 { status = "okay"; }; +&debug1 { status = "okay"; }; +&debug2 { status = "okay"; }; +&debug3 { status = "okay"; }; +&etf { status = "okay"; }; +&etm0 { status = "okay"; }; +&etm1 { status = "okay"; }; +&etm2 { status = "okay"; }; +&etm3 { status = "okay"; }; +&etr { status = "okay"; }; +&funnel0 { status = "okay"; }; +&funnel1 { status = "okay"; }; +&replicator { status = "okay"; }; +&stm { status = "okay"; }; +&tpiu { status = "okay"; }; diff --git a/arch/arm/dts/apq8096-db820c.dts b/arch/arm/dts/apq8096-db820c.dts deleted file mode 100644 index e8148b3d6c5..00000000000 --- a/arch/arm/dts/apq8096-db820c.dts +++ /dev/null @@ -1,1137 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved. - */ - -/dts-v1/; - -#include "msm8996.dtsi" -#include "pm8994.dtsi" -#include "pmi8994.dtsi" -#include <dt-bindings/input/input.h> -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/leds/common.h> -#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> -#include <dt-bindings/sound/qcom,q6afe.h> -#include <dt-bindings/sound/qcom,q6asm.h> -#include <dt-bindings/sound/qcom,wcd9335.h> - -/* - * GPIO name legend: proper name = the GPIO line is used as GPIO - * NC = not connected (pin out but not routed from the chip to - * anything the board) - * "[PER]" = pin is muxed for [peripheral] (not GPIO) - * LSEC = Low Speed External Connector - * P HSEC = Primary High Speed External Connector - * S HSEC = Secondary High Speed External Connector - * J14 = Camera Connector - * TP = Test Points - * - * Line names are taken from the schematic "DragonBoard 820c", - * drawing no: LM25-P2751-1 - * - * For the lines routed to the external connectors the - * lines are named after the 96Boards CE Specification 1.0, - * Appendix "Expansion Connector Signal Description". - * - * When the 96Board naming of a line and the schematic name of - * the same line are in conflict, the 96Board specification - * takes precedence, which means that the external UART on the - * LSEC is named UART0 while the schematic and SoC names this - * UART3. This is only for the informational lines i.e. "[FOO]", - * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only - * ones actually used for GPIO. - */ - -/ { - model = "Qualcomm Technologies, Inc. DB820c"; - compatible = "arrow,apq8096-db820c", "qcom,apq8096-sbc", "qcom,apq8096"; - - aliases { - serial0 = &blsp2_uart2; - serial1 = &blsp2_uart3; - serial2 = &blsp1_uart2; - i2c0 = &blsp1_i2c3; - i2c1 = &blsp2_i2c1; - i2c2 = &blsp2_i2c1; - spi0 = &blsp1_spi1; - spi1 = &blsp2_spi6; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - div1_mclk: divclk1 { - compatible = "gpio-gate-clock"; - pinctrl-0 = <&audio_mclk>; - pinctrl-names = "default"; - clocks = <&rpmcc RPM_SMD_DIV_CLK1>; - #clock-cells = <0>; - enable-gpios = <&pm8994_gpios 15 0>; - }; - - divclk4: divclk4 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - clock-output-names = "divclk4"; - - pinctrl-names = "default"; - pinctrl-0 = <&divclk4_pin_a>; - }; - - gpio-keys { - compatible = "gpio-keys"; - autorepeat; - - pinctrl-names = "default"; - pinctrl-0 = <&volume_up_gpio>; - - button { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - gpios = <&pm8994_gpios 2 GPIO_ACTIVE_LOW>; - }; - }; - - usb2_id: usb2-id { - compatible = "linux,extcon-usb-gpio"; - id-gpios = <&pmi8994_gpios 6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&usb2_vbus_det_gpio>; - }; - - usb3_id: usb3-id { - compatible = "linux,extcon-usb-gpio"; - id-gpios = <&pm8994_gpios 22 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&usb3_vbus_det_gpio>; - }; - - vph_pwr: vph-pwr-regulator { - compatible = "regulator-fixed"; - regulator-name = "vph_pwr"; - regulator-always-on; - regulator-boot-on; - - regulator-min-microvolt = <3700000>; - regulator-max-microvolt = <3700000>; - }; - - wlan_en: wlan-en-1-8v { - pinctrl-names = "default"; - pinctrl-0 = <&wlan_en_gpios>; - compatible = "regulator-fixed"; - regulator-name = "wlan-en-regulator"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - gpio = <&pm8994_gpios 8 0>; - - /* WLAN card specific delay */ - startup-delay-us = <70000>; - enable-active-high; - }; -}; - -&blsp1_i2c3 { - /* On Low speed expansion: LS-I2C0 */ - status = "okay"; -}; - -&blsp1_spi1 { - /* On Low speed expansion */ - status = "okay"; -}; - -&blsp1_uart2 { - label = "BT-UART"; - status = "okay"; - - bluetooth { - compatible = "qcom,qca6174-bt"; - - /* bt_disable_n gpio */ - enable-gpios = <&pm8994_gpios 19 GPIO_ACTIVE_HIGH>; - - clocks = <&divclk4>; - }; -}; - -&adsp_pil { - status = "okay"; - firmware-name = "qcom/apq8096/adsp.mbn"; -}; - -&blsp2_i2c1 { - /* On High speed expansion: HS-I2C2 */ - status = "okay"; -}; - -&blsp2_i2c1 { - /* On Low speed expansion: LS-I2C1 */ - status = "okay"; -}; - -&blsp2_spi6 { - /* On High speed expansion */ - status = "okay"; -}; - -&blsp2_uart2 { - label = "LS-UART1"; - status = "okay"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp2_uart2_2pins_default>; - pinctrl-1 = <&blsp2_uart2_2pins_sleep>; -}; - -&blsp2_uart3 { - label = "LS-UART0"; - status = "disabled"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp2_uart3_4pins_default>; - pinctrl-1 = <&blsp2_uart3_4pins_sleep>; -}; - -&camss { - vdda-supply = <&vreg_l2a_1p25>; -}; - -&gpu { - status = "okay"; -}; - -&hsusb_phy1 { - status = "okay"; - - vdd-supply = <&vreg_l28a_0p925>; - vdda-pll-supply = <&vreg_l12a_1p8>; - vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; -}; - -&hsusb_phy2 { - status = "okay"; - - vdd-supply = <&vreg_l28a_0p925>; - vdda-pll-supply = <&vreg_l12a_1p8>; - vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; -}; - -&mdp { - status = "okay"; -}; - -&mdss { - status = "okay"; -}; - -&mdss_hdmi { - status = "okay"; - - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&hdmi_hpd_active &hdmi_ddc_active>; - pinctrl-1 = <&hdmi_hpd_suspend &hdmi_ddc_suspend>; - - core-vdda-supply = <&vreg_l12a_1p8>; - core-vcc-supply = <&vreg_s4a_1p8>; -}; - -&mdss_hdmi_phy { - status = "okay"; - - vddio-supply = <&vreg_l12a_1p8>; - vcca-supply = <&vreg_l28a_0p925>; - #phy-cells = <0>; -}; - -&mmcc { - vdd-gfx-supply = <&vdd_gfx>; -}; - -&mss_pil { - status = "okay"; - pll-supply = <&vreg_l12a_1p8>; - firmware-name = "qcom/apq8096/mba.mbn", "qcom/apq8096/modem.mbn"; -}; - -&pm8994_resin { - status = "okay"; - linux,code = <KEY_VOLUMEDOWN>; -}; - -&tlmm { - gpio-line-names = - "[SPI0_DOUT]", /* GPIO_0, BLSP1_SPI_MOSI, LSEC pin 14 */ - "[SPI0_DIN]", /* GPIO_1, BLSP1_SPI_MISO, LSEC pin 10 */ - "[SPI0_CS]", /* GPIO_2, BLSP1_SPI_CS_N, LSEC pin 12 */ - "[SPI0_SCLK]", /* GPIO_3, BLSP1_SPI_CLK, LSEC pin 8 */ - "[UART1_TxD]", /* GPIO_4, BLSP8_UART_TX, LSEC pin 11 */ - "[UART1_RxD]", /* GPIO_5, BLSP8_UART_RX, LSEC pin 13 */ - "[I2C1_SDA]", /* GPIO_6, BLSP8_I2C_SDA, LSEC pin 21 */ - "[I2C1_SCL]", /* GPIO_7, BLSP8_I2C_SCL, LSEC pin 19 */ - "GPIO-H", /* GPIO_8, LCD0_RESET_N, LSEC pin 30 */ - "TP93", /* GPIO_9 */ - "GPIO-G", /* GPIO_10, MDP_VSYNC_P, LSEC pin 29 */ - "[MDP_VSYNC_S]", /* GPIO_11, S HSEC pin 55 */ - "NC", /* GPIO_12 */ - "[CSI0_MCLK]", /* GPIO_13, CAM_MCLK0, P HSEC pin 15 */ - "[CAM_MCLK1]", /* GPIO_14, J14 pin 11 */ - "[CSI1_MCLK]", /* GPIO_15, CAM_MCLK2, P HSEC pin 17 */ - "TP99", /* GPIO_16 */ - "[I2C2_SDA]", /* GPIO_17, CCI_I2C_SDA0, P HSEC pin 34 */ - "[I2C2_SCL]", /* GPIO_18, CCI_I2C_SCL0, P HSEC pin 32 */ - "[CCI_I2C_SDA1]", /* GPIO_19, S HSEC pin 38 */ - "[CCI_I2C_SCL1]", /* GPIO_20, S HSEC pin 36 */ - "FLASH_STROBE_EN", /* GPIO_21, S HSEC pin 5 */ - "FLASH_STROBE_TRIG", /* GPIO_22, S HSEC pin 1 */ - "GPIO-K", /* GPIO_23, CAM2_RST_N, LSEC pin 33 */ - "GPIO-D", /* GPIO_24, LSEC pin 26 */ - "GPIO-I", /* GPIO_25, CAM0_RST_N, LSEC pin 31 */ - "GPIO-J", /* GPIO_26, CAM0_STANDBY_N, LSEC pin 32 */ - "BLSP6_I2C_SDA", /* GPIO_27 */ - "BLSP6_I2C_SCL", /* GPIO_28 */ - "GPIO-B", /* GPIO_29, TS0_RESET_N, LSEC pin 24 */ - "GPIO30", /* GPIO_30, S HSEC pin 4 */ - "HDMI_CEC", /* GPIO_31 */ - "HDMI_DDC_CLOCK", /* GPIO_32 */ - "HDMI_DDC_DATA", /* GPIO_33 */ - "HDMI_HOT_PLUG_DETECT", /* GPIO_34 */ - "PCIE0_RST_N", /* GPIO_35 */ - "PCIE0_CLKREQ_N", /* GPIO_36 */ - "PCIE0_WAKE", /* GPIO_37 */ - "SD_CARD_DET_N", /* GPIO_38 */ - "TSIF1_SYNC", /* GPIO_39, S HSEC pin 48 */ - "W_DISABLE_N", /* GPIO_40 */ - "[BLSP9_UART_TX]", /* GPIO_41 */ - "[BLSP9_UART_RX]", /* GPIO_42 */ - "[BLSP2_UART_CTS_N]", /* GPIO_43 */ - "[BLSP2_UART_RFR_N]", /* GPIO_44 */ - "[BLSP3_UART_TX]", /* GPIO_45 */ - "[BLSP3_UART_RX]", /* GPIO_46 */ - "[I2C0_SDA]", /* GPIO_47, LS_I2C0_SDA, LSEC pin 17 */ - "[I2C0_SCL]", /* GPIO_48, LS_I2C0_SCL, LSEC pin 15 */ - "[UART0_TxD]", /* GPIO_49, BLSP9_UART_TX, LSEC pin 5 */ - "[UART0_RxD]", /* GPIO_50, BLSP9_UART_RX, LSEC pin 7 */ - "[UART0_CTS]", /* GPIO_51, BLSP9_UART_CTS_N, LSEC pin 3 */ - "[UART0_RTS]", /* GPIO_52, BLSP9_UART_RFR_N, LSEC pin 9 */ - "[CODEC_INT1_N]", /* GPIO_53 */ - "[CODEC_INT2_N]", /* GPIO_54 */ - "[BLSP7_I2C_SDA]", /* GPIO_55 */ - "[BLSP7_I2C_SCL]", /* GPIO_56 */ - "MI2S_MCLK", /* GPIO_57, S HSEC pin 3 */ - "[PCM_CLK]", /* GPIO_58, QUA_MI2S_SCK, LSEC pin 18 */ - "[PCM_FS]", /* GPIO_59, QUA_MI2S_WS, LSEC pin 16 */ - "[PCM_DO]", /* GPIO_60, QUA_MI2S_DATA0, LSEC pin 20 */ - "[PCM_DI]", /* GPIO_61, QUA_MI2S_DATA1, LSEC pin 22 */ - "GPIO-E", /* GPIO_62, LSEC pin 27 */ - "TP87", /* GPIO_63 */ - "[CODEC_RST_N]", /* GPIO_64 */ - "[PCM1_CLK]", /* GPIO_65 */ - "[PCM1_SYNC]", /* GPIO_66 */ - "[PCM1_DIN]", /* GPIO_67 */ - "[PCM1_DOUT]", /* GPIO_68 */ - "AUDIO_REF_CLK", /* GPIO_69 */ - "SLIMBUS_CLK", /* GPIO_70 */ - "SLIMBUS_DATA0", /* GPIO_71 */ - "SLIMBUS_DATA1", /* GPIO_72 */ - "NC", /* GPIO_73 */ - "NC", /* GPIO_74 */ - "NC", /* GPIO_75 */ - "NC", /* GPIO_76 */ - "TP94", /* GPIO_77 */ - "NC", /* GPIO_78 */ - "TP95", /* GPIO_79 */ - "GPIO-A", /* GPIO_80, MEMS_RESET_N, LSEC pin 23 */ - "TP88", /* GPIO_81 */ - "TP89", /* GPIO_82 */ - "TP90", /* GPIO_83 */ - "TP91", /* GPIO_84 */ - "[SD_DAT0]", /* GPIO_85, BLSP12_SPI_MOSI, P HSEC pin 1 */ - "[SD_CMD]", /* GPIO_86, BLSP12_SPI_MISO, P HSEC pin 11 */ - "[SD_DAT3]", /* GPIO_87, BLSP12_SPI_CS_N, P HSEC pin 7 */ - "[SD_SCLK]", /* GPIO_88, BLSP12_SPI_CLK, P HSEC pin 9 */ - "TSIF1_CLK", /* GPIO_89, S HSEC pin 42 */ - "TSIF1_EN", /* GPIO_90, S HSEC pin 46 */ - "TSIF1_DATA", /* GPIO_91, S HSEC pin 44 */ - "NC", /* GPIO_92 */ - "TSIF2_CLK", /* GPIO_93, S HSEC pin 52 */ - "TSIF2_EN", /* GPIO_94, S HSEC pin 56 */ - "TSIF2_DATA", /* GPIO_95, S HSEC pin 54 */ - "TSIF2_SYNC", /* GPIO_96, S HSEC pin 58 */ - "NC", /* GPIO_97 */ - "CAM1_STANDBY_N", /* GPIO_98 */ - "NC", /* GPIO_99 */ - "NC", /* GPIO_100 */ - "[LCD1_RESET_N]", /* GPIO_101, S HSEC pin 51 */ - "BOOT_CONFIG1", /* GPIO_102 */ - "USB_HUB_RESET", /* GPIO_103 */ - "CAM1_RST_N", /* GPIO_104 */ - "NC", /* GPIO_105 */ - "NC", /* GPIO_106 */ - "NC", /* GPIO_107 */ - "NC", /* GPIO_108 */ - "NC", /* GPIO_109 */ - "NC", /* GPIO_110 */ - "NC", /* GPIO_111 */ - "NC", /* GPIO_112 */ - "PMI8994_BUA", /* GPIO_113 */ - "PCIE2_RST_N", /* GPIO_114 */ - "PCIE2_CLKREQ_N", /* GPIO_115 */ - "PCIE2_WAKE", /* GPIO_116 */ - "SSC_IRQ_0", /* GPIO_117 */ - "SSC_IRQ_1", /* GPIO_118 */ - "SSC_IRQ_2", /* GPIO_119 */ - "NC", /* GPIO_120 */ - "GPIO121", /* GPIO_121, S HSEC pin 2 */ - "NC", /* GPIO_122 */ - "SSC_IRQ_6", /* GPIO_123 */ - "SSC_IRQ_7", /* GPIO_124 */ - "GPIO-C", /* GPIO_125, TS_INT0, LSEC pin 25 */ - "BOOT_CONFIG5", /* GPIO_126 */ - "NC", /* GPIO_127 */ - "NC", /* GPIO_128 */ - "BOOT_CONFIG7", /* GPIO_129 */ - "PCIE1_RST_N", /* GPIO_130 */ - "PCIE1_CLKREQ_N", /* GPIO_131 */ - "PCIE1_WAKE", /* GPIO_132 */ - "GPIO-L", /* GPIO_133, CAM2_STANDBY_N, LSEC pin 34 */ - "NC", /* GPIO_134 */ - "NC", /* GPIO_135 */ - "BOOT_CONFIG8", /* GPIO_136 */ - "NC", /* GPIO_137 */ - "NC", /* GPIO_138 */ - "GPS_SSBI2", /* GPIO_139 */ - "GPS_SSBI1", /* GPIO_140 */ - "NC", /* GPIO_141 */ - "NC", /* GPIO_142 */ - "NC", /* GPIO_143 */ - "BOOT_CONFIG6", /* GPIO_144 */ - "NC", /* GPIO_145 */ - "NC", /* GPIO_146 */ - "NC", /* GPIO_147 */ - "NC", /* GPIO_148 */ - "NC"; /* GPIO_149 */ - - sdc2_cd_on: sdc2-cd-on-state { - pins = "gpio38"; - function = "gpio"; - bias-pull-up; - drive-strength = <16>; - }; - - sdc2_cd_off: sdc2-cd-off-state { - pins = "gpio38"; - function = "gpio"; - bias-pull-up; - drive-strength = <2>; - }; - - hdmi_hpd_active: hdmi-hpd-active-state { - pins = "gpio34"; - function = "hdmi_hot"; - bias-pull-down; - drive-strength = <16>; - }; - - hdmi_hpd_suspend: hdmi-hpd-suspend-state { - pins = "gpio34"; - function = "hdmi_hot"; - bias-pull-down; - drive-strength = <2>; - }; - - hdmi_ddc_active: hdmi-ddc-active-state { - pins = "gpio32", "gpio33"; - function = "hdmi_ddc"; - drive-strength = <2>; - bias-pull-up; - }; - - hdmi_ddc_suspend: hdmi-ddc-suspend-state { - pins = "gpio32", "gpio33"; - function = "hdmi_ddc"; - drive-strength = <2>; - bias-pull-down; - }; -}; - -&pcie0 { - status = "okay"; - perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; - vddpe-3v3-supply = <&wlan_en>; - vdda-supply = <&vreg_l28a_0p925>; -}; - -&pcie1 { - status = "okay"; - perst-gpios = <&tlmm 130 GPIO_ACTIVE_LOW>; - vdda-supply = <&vreg_l28a_0p925>; -}; - -&pcie2 { - status = "okay"; - perst-gpios = <&tlmm 114 GPIO_ACTIVE_LOW>; - vdda-supply = <&vreg_l28a_0p925>; -}; - -&pcie_phy { - status = "okay"; - - vdda-phy-supply = <&vreg_l28a_0p925>; - vdda-pll-supply = <&vreg_l12a_1p8>; -}; - -&pm8994_gpios { - gpio-line-names = - "NC", - "KEY_VOLP_N", - "NC", - "BL1_PWM", - "GPIO-F", /* BL0_PWM, LSEC pin 28 */ - "BL1_EN", - "NC", - "WLAN_EN", - "NC", - "NC", - "NC", - "NC", - "NC", - "NC", - "DIVCLK1", - "DIVCLK2", - "DIVCLK3", - "DIVCLK4", - "BT_EN", - "PMIC_SLB", - "PMIC_BUA", - "USB_VBUS_DET"; - - pinctrl-names = "default"; - pinctrl-0 = <&ls_exp_gpio_f &bt_en_gpios>; - - ls_exp_gpio_f: pm8994-gpio5-state { - pinconf { - pins = "gpio5"; - function = PMIC_GPIO_FUNC_NORMAL; - output-low; - power-source = <PM8994_GPIO_S4>; /* 1.8V */ - }; - }; - - bt_en_gpios: bt-en-pios-state { - pinconf { - pins = "gpio19"; - function = PMIC_GPIO_FUNC_NORMAL; - output-low; - power-source = <PM8994_GPIO_S4>; /* 1.8V */ - qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; - bias-pull-down; - }; - }; - - wlan_en_gpios: wlan-en-gpios-state { - pinconf { - pins = "gpio8"; - function = PMIC_GPIO_FUNC_NORMAL; - output-low; - power-source = <PM8994_GPIO_S4>; /* 1.8V */ - qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; - bias-pull-down; - }; - }; - - audio_mclk: clk-div1-state { - pinconf { - pins = "gpio15"; - function = "func1"; - power-source = <PM8994_GPIO_S4>; /* 1.8V */ - }; - }; - - volume_up_gpio: pm8996-gpio2-state { - pinconf { - pins = "gpio2"; - function = "normal"; - input-enable; - drive-push-pull; - bias-pull-up; - qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; - power-source = <PM8994_GPIO_S4>; /* 1.8V */ - }; - }; - - divclk4_pin_a: divclk4-state { - pinconf { - pins = "gpio18"; - function = PMIC_GPIO_FUNC_FUNC2; - - bias-disable; - power-source = <PM8994_GPIO_S4>; - }; - }; - - usb3_vbus_det_gpio: pm8996-gpio22-state { - pinconf { - pins = "gpio22"; - function = PMIC_GPIO_FUNC_NORMAL; - input-enable; - bias-pull-down; - qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; - power-source = <PM8994_GPIO_S4>; /* 1.8V */ - }; - }; -}; - -&pm8994_mpps { - gpio-line-names = - "VDDPX_BIAS", - "WIFI_LED", - "NC", - "BT_LED", - "PM_MPP05", - "PM_MPP06", - "PM_MPP07", - "NC"; -}; - -&pm8994_spmi_regulators { - qcom,saw-reg = <&saw3>; - vdd_s11-supply = <&vph_pwr>; - - s9 { - qcom,saw-slave; - }; - s10 { - qcom,saw-slave; - }; - s11 { - qcom,saw-leader; - regulator-name = "VDD_APCC"; - regulator-always-on; - regulator-min-microvolt = <980000>; - regulator-max-microvolt = <980000>; - }; -}; - -&pmi8994_gpios { - gpio-line-names = - "NC", - "SPKR_AMP_EN1", - "SPKR_AMP_EN2", - "TP61", - "NC", - "USB2_VBUS_DET", - "NC", - "NC", - "NC", - "NC"; - - usb2_vbus_det_gpio: pmi8996-gpio6-state { - pinconf { - pins = "gpio6"; - function = PMIC_GPIO_FUNC_NORMAL; - input-enable; - bias-pull-down; - qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; - power-source = <PM8994_GPIO_S4>; /* 1.8V */ - }; - }; -}; - -&pmi8994_lpg { - qcom,power-source = <1>; - - pinctrl-names = "default"; - pinctrl-0 = <&pmi8994_mpp2_userled4>; - - qcom,dtest = <0 0>, - <0 0>, - <0 0>, - <4 1>; - - status = "okay"; - - led@1 { - reg = <1>; - color = <LED_COLOR_ID_GREEN>; - function = LED_FUNCTION_HEARTBEAT; - function-enumerator = <1>; - - linux,default-trigger = "heartbeat"; - default-state = "on"; - }; - - led@2 { - reg = <2>; - color = <LED_COLOR_ID_GREEN>; - function = LED_FUNCTION_HEARTBEAT; - function-enumerator = <0>; - }; - - led@3 { - reg = <3>; - color = <LED_COLOR_ID_GREEN>; - function = LED_FUNCTION_HEARTBEAT; - function-enumerator = <2>; - }; - - led@4 { - reg = <4>; - color = <LED_COLOR_ID_GREEN>; - function = LED_FUNCTION_HEARTBEAT; - function-enumerator = <3>; - }; -}; - -&pmi8994_mpps { - pmi8994_mpp2_userled4: mpp2-userled4-state { - pins = "mpp2"; - function = "sink"; - - output-low; - qcom,dtest = <4>; - }; -}; - -&pmi8994_spmi_regulators { - vdd_s2-supply = <&vph_pwr>; - - vdd_gfx: s2 { - regulator-name = "VDD_GFX"; - regulator-min-microvolt = <980000>; - regulator-max-microvolt = <980000>; - }; -}; - -&rpm_requests { - regulators-0 { - compatible = "qcom,rpm-pm8994-regulators"; - - vdd_s1-supply = <&vph_pwr>; - vdd_s2-supply = <&vph_pwr>; - vdd_s3-supply = <&vph_pwr>; - vdd_s4-supply = <&vph_pwr>; - vdd_s5-supply = <&vph_pwr>; - vdd_s6-supply = <&vph_pwr>; - vdd_s7-supply = <&vph_pwr>; - vdd_s8-supply = <&vph_pwr>; - vdd_s9-supply = <&vph_pwr>; - vdd_s10-supply = <&vph_pwr>; - vdd_s11-supply = <&vph_pwr>; - vdd_s12-supply = <&vph_pwr>; - vdd_l1-supply = <&vreg_s1b_1p025>; - vdd_l2_l26_l28-supply = <&vreg_s3a_1p3>; - vdd_l3_l11-supply = <&vreg_s3a_1p3>; - vdd_l4_l27_l31-supply = <&vreg_s3a_1p3>; - vdd_l5_l7-supply = <&vreg_s5a_2p15>; - vdd_l6_l12_l32-supply = <&vreg_s5a_2p15>; - vdd_l8_l16_l30-supply = <&vph_pwr>; - vdd_l9_l10_l18_l22-supply = <&vph_pwr_bbyp>; - vdd_l13_l19_l23_l24-supply = <&vph_pwr_bbyp>; - vdd_l14_l15-supply = <&vreg_s5a_2p15>; - vdd_l17_l29-supply = <&vph_pwr_bbyp>; - vdd_l20_l21-supply = <&vph_pwr_bbyp>; - vdd_l25-supply = <&vreg_s3a_1p3>; - vdd_lvs1_2-supply = <&vreg_s4a_1p8>; - - vreg_s3a_1p3: s3 { - regulator-name = "vreg_s3a_1p3"; - regulator-min-microvolt = <1300000>; - regulator-max-microvolt = <1300000>; - }; - - /** - * 1.8v required on LS expansion - * for mezzanine boards - */ - vreg_s4a_1p8: s4 { - regulator-name = "vreg_s4a_1p8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - vreg_s5a_2p15: s5 { - regulator-name = "vreg_s5a_2p15"; - regulator-min-microvolt = <2150000>; - regulator-max-microvolt = <2150000>; - }; - vreg_s7a_1p0: s7 { - regulator-name = "vreg_s7a_1p0"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <800000>; - }; - - vreg_l1a_1p0: l1 { - regulator-name = "vreg_l1a_1p0"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - }; - vreg_l2a_1p25: l2 { - regulator-name = "vreg_l2a_1p25"; - regulator-min-microvolt = <1250000>; - regulator-max-microvolt = <1250000>; - }; - vreg_l3a_0p875: l3 { - regulator-name = "vreg_l3a_0p875"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - }; - vreg_l4a_1p225: l4 { - regulator-name = "vreg_l4a_1p225"; - regulator-min-microvolt = <1225000>; - regulator-max-microvolt = <1225000>; - }; - vreg_l6a_1p2: l6 { - regulator-name = "vreg_l6a_1p2"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - }; - vreg_l8a_1p8: l8 { - regulator-name = "vreg_l8a_1p8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - vreg_l9a_1p8: l9 { - regulator-name = "vreg_l9a_1p8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - vreg_l10a_1p8: l10 { - regulator-name = "vreg_l10a_1p8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - vreg_l11a_1p15: l11 { - regulator-name = "vreg_l11a_1p15"; - regulator-min-microvolt = <1150000>; - regulator-max-microvolt = <1150000>; - }; - vreg_l12a_1p8: l12 { - regulator-name = "vreg_l12a_1p8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - vreg_l13a_2p95: l13 { - regulator-name = "vreg_l13a_2p95"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2950000>; - }; - vreg_l14a_1p8: l14 { - regulator-name = "vreg_l14a_1p8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - vreg_l15a_1p8: l15 { - regulator-name = "vreg_l15a_1p8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - vreg_l16a_2p7: l16 { - regulator-name = "vreg_l16a_2p7"; - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <2700000>; - }; - vreg_l17a_2p8: l17 { - regulator-name = "vreg_l17a_2p8"; - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; - }; - vreg_l18a_2p85: l18 { - regulator-name = "vreg_l18a_2p85"; - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <2900000>; - }; - vreg_l19a_2p8: l19 { - regulator-name = "vreg_l19a_2p8"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - }; - vreg_l20a_2p95: l20 { - regulator-name = "vreg_l20a_2p95"; - regulator-min-microvolt = <2950000>; - regulator-max-microvolt = <2950000>; - regulator-allow-set-load; - }; - vreg_l21a_2p95: l21 { - regulator-name = "vreg_l21a_2p95"; - regulator-min-microvolt = <2950000>; - regulator-max-microvolt = <2950000>; - regulator-allow-set-load; - regulator-system-load = <200000>; - }; - vreg_l22a_3p0: l22 { - regulator-name = "vreg_l22a_3p0"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - vreg_l23a_2p8: l23 { - regulator-name = "vreg_l23a_2p8"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - }; - vreg_l24a_3p075: l24 { - regulator-name = "vreg_l24a_3p075"; - regulator-min-microvolt = <3075000>; - regulator-max-microvolt = <3075000>; - }; - vreg_l25a_1p2: l25 { - regulator-name = "vreg_l25a_1p2"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-allow-set-load; - }; - vreg_l26a_0p8: l27 { - regulator-name = "vreg_l26a_0p8"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - }; - vreg_l28a_0p925: l28 { - regulator-name = "vreg_l28a_0p925"; - regulator-min-microvolt = <925000>; - regulator-max-microvolt = <925000>; - regulator-allow-set-load; - }; - vreg_l29a_2p8: l29 { - regulator-name = "vreg_l29a_2p8"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - }; - vreg_l30a_1p8: l30 { - regulator-name = "vreg_l30a_1p8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - vreg_l32a_1p8: l32 { - regulator-name = "vreg_l32a_1p8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - vreg_lvs1a_1p8: lvs1 { - regulator-name = "vreg_lvs1a_1p8"; - }; - - vreg_lvs2a_1p8: lvs2 { - regulator-name = "vreg_lvs2a_1p8"; - }; - }; - - regulators-1 { - compatible = "qcom,rpm-pmi8994-regulators"; - - vdd_s1-supply = <&vph_pwr>; - vdd_s2-supply = <&vph_pwr>; - vdd_s3-supply = <&vph_pwr>; - vdd_bst_byp-supply = <&vph_pwr>; - - vph_pwr_bbyp: boost-bypass { - regulator-name = "vph_pwr_bbyp"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - vreg_s1b_1p025: s1 { - regulator-name = "vreg_s1b_1p025"; - regulator-min-microvolt = <1025000>; - regulator-max-microvolt = <1025000>; - }; - }; -}; - -&sdhc2 { - /* External SD card */ - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sdc2_state_on &sdc2_cd_on>; - pinctrl-1 = <&sdc2_state_off &sdc2_cd_off>; - cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; - vmmc-supply = <&vreg_l21a_2p95>; - vqmmc-supply = <&vreg_l13a_2p95>; - status = "okay"; -}; - -&q6asmdai { - dai@0 { - reg = <0>; - }; - - dai@1 { - reg = <1>; - }; - - dai@2 { - reg = <2>; - }; -}; - -&slim_msm { - status = "okay"; - - slim@1 { - reg = <1>; - #address-cells = <2>; - #size-cells = <0>; - - tasha_ifd: tas-ifd@0,0 { - compatible = "slim217,1a0"; - reg = <0 0>; - }; - - wcd9335: codec@1,0 { - compatible = "slim217,1a0"; - reg = <1 0>; - - clock-names = "mclk", "slimbus"; - clocks = <&div1_mclk>, - <&rpmcc RPM_SMD_BB_CLK1>; - interrupt-parent = <&tlmm>; - interrupts = <54 IRQ_TYPE_LEVEL_HIGH>, - <53 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "intr1", "intr2"; - interrupt-controller; - #interrupt-cells = <1>; - - pinctrl-0 = <&cdc_reset_active &wcd_intr_default>; - pinctrl-names = "default"; - - reset-gpios = <&tlmm 64 GPIO_ACTIVE_LOW>; - slim-ifc-dev = <&tasha_ifd>; - - #sound-dai-cells = <1>; - - vdd-buck-supply = <&vreg_s4a_1p8>; - vdd-buck-sido-supply = <&vreg_s4a_1p8>; - vdd-tx-supply = <&vreg_s4a_1p8>; - vdd-rx-supply = <&vreg_s4a_1p8>; - vdd-io-supply = <&vreg_s4a_1p8>; - }; - }; -}; - -&sound { - compatible = "qcom,apq8096-sndcard"; - model = "DB820c"; - audio-routing = "RX_BIAS", "MCLK", - "MM_DL1", "MultiMedia1 Playback", - "MM_DL2", "MultiMedia2 Playback", - "MultiMedia3 Capture", "MM_UL3"; - - mm1-dai-link { - link-name = "MultiMedia1"; - cpu { - sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; - }; - }; - - mm2-dai-link { - link-name = "MultiMedia2"; - cpu { - sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; - }; - }; - - mm3-dai-link { - link-name = "MultiMedia3"; - cpu { - sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; - }; - }; - - hdmi-dai-link { - link-name = "HDMI"; - cpu { - sound-dai = <&q6afedai HDMI_RX>; - }; - - platform { - sound-dai = <&q6routing>; - }; - - codec { - sound-dai = <&mdss_hdmi 0>; - }; - }; - - slim-dai-link { - link-name = "SLIM Playback"; - cpu { - sound-dai = <&q6afedai SLIMBUS_6_RX>; - }; - - platform { - sound-dai = <&q6routing>; - }; - - codec { - sound-dai = <&wcd9335 AIF4_PB>; - }; - }; - - slimcap-dai-link { - link-name = "SLIM Capture"; - cpu { - sound-dai = <&q6afedai SLIMBUS_0_TX>; - }; - - platform { - sound-dai = <&q6routing>; - }; - - codec { - sound-dai = <&wcd9335 AIF1_CAP>; - }; - }; -}; - -&ufsphy { - status = "okay"; - - vdda-phy-supply = <&vreg_l28a_0p925>; - vdda-pll-supply = <&vreg_l12a_1p8>; -}; - -&ufshc { - status = "okay"; - - vcc-supply = <&vreg_l20a_2p95>; - vccq-supply = <&vreg_l25a_1p2>; - vccq2-supply = <&vreg_s4a_1p8>; - vdd-hba-supply = <&vreg_l25a_1p2>; - - vcc-max-microamp = <600000>; - vccq-max-microamp = <450000>; - vccq2-max-microamp = <450000>; -}; - -&usb2 { - status = "okay"; - extcon = <&usb2_id>; -}; - -&usb2_dwc3 { - extcon = <&usb2_id>; - dr_mode = "otg"; - maximum-speed = "high-speed"; -}; - -&usb3 { - status = "okay"; - extcon = <&usb3_id>; -}; - -&usb3_dwc3 { - extcon = <&usb3_id>; - dr_mode = "otg"; -}; - -&usb3phy { - status = "okay"; - - vdda-phy-supply = <&vreg_l28a_0p925>; - vdda-pll-supply = <&vreg_l12a_1p8>; -}; - -&venus { - status = "okay"; -}; diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts deleted file mode 100644 index 7cd29ab970d..00000000000 --- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts +++ /dev/null @@ -1,59 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Device Tree file for the Kontron SMARC-sAL28 board. - * - * This is for the network variant 1 which has one ethernet port. It is - * different than the base variant, which also has one port, but here the - * port is connected via RGMII. This port is not TSN aware. - * None of the four SerDes lanes are used by the module, instead they are - * all led out to the carrier for customer use. - * - * Copyright (C) 2021 Michael Walle <michael@walle.cc> - * - */ - -/dts-v1/; -#include "fsl-ls1028a-kontron-sl28.dts" -#include <dt-bindings/net/qca-ar803x.h> - -/ { - model = "Kontron SMARC-sAL28 (4 Lanes)"; - compatible = "kontron,sl28-var1", "kontron,sl28", "fsl,ls1028a"; -}; - -&enetc_mdio_pf3 { - /* Delete unused phy node */ - /delete-node/ ethernet-phy@5; - - phy0: ethernet-phy@4 { - reg = <0x4>; - eee-broken-1000t; - eee-broken-100tx; - qca,clk-out-frequency = <125000000>; - qca,clk-out-strength = <AR803X_STRENGTH_FULL>; - qca,keep-pll-enabled; - vddio-supply = <&vddio>; - - vddio: vddio-regulator { - regulator-name = "VDDIO"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - vddh: vddh-regulator { - regulator-name = "VDDH"; - }; - }; -}; - -&enetc_port0 { - status = "disabled"; - /* Delete the phy-handle to the old phy0 label */ - /delete-property/ phy-handle; -}; - -&enetc_port1 { - phy-handle = <&phy0>; - phy-mode = "rgmii-id"; - status = "okay"; -}; diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2.dts deleted file mode 100644 index 330e34f933a..00000000000 --- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2.dts +++ /dev/null @@ -1,65 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Device Tree file for the Kontron SMARC-sAL28 board. - * - * This is for the network variant 2 which has two ethernet ports. These - * ports are connected to the internal switch. - * - * Copyright (C) 2021 Michael Walle <michael@walle.cc> - * - */ - -/dts-v1/; -#include "fsl-ls1028a-kontron-sl28.dts" - -/ { - model = "Kontron SMARC-sAL28 (TSN-on-module)"; - compatible = "kontron,sl28-var2", "kontron,sl28", "fsl,ls1028a"; -}; - -&enetc_mdio_pf3 { - phy1: ethernet-phy@4 { - reg = <0x4>; - eee-broken-1000t; - eee-broken-100tx; - }; -}; - -&enetc_port0 { - status = "disabled"; - /* - * In the base device tree the PHY at address 5 was assigned for - * this port. On this module this PHY is connected to a switch - * port instead. Therefore, delete the phy-handle property here. - */ - /delete-property/ phy-handle; -}; - -&enetc_port2 { - status = "okay"; -}; - -&mscc_felix { - status = "okay"; -}; - -&mscc_felix_port0 { - label = "swp0"; - managed = "in-band-status"; - phy-handle = <&phy0>; - phy-mode = "sgmii"; - status = "okay"; -}; - -&mscc_felix_port1 { - label = "swp1"; - managed = "in-band-status"; - phy-handle = <&phy1>; - phy-mode = "sgmii"; - status = "okay"; -}; - -&mscc_felix_port4 { - ethernet = <&enetc_port2>; - status = "okay"; -}; diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var3.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var3.dts deleted file mode 100644 index 0c8b2af41a6..00000000000 --- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var3.dts +++ /dev/null @@ -1,15 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Device Tree file for the Kontron SMARC-sAL28 board. - * - * Copyright (C) 2019 Michael Walle <michael@walle.cc> - * - */ - -/dts-v1/; -#include "fsl-ls1028a-kontron-sl28.dts" - -/ { - model = "Kontron SMARC-sAL28 (Single PHY)"; - compatible = "kontron,sl28-var3", "kontron,sl28", "fsl,ls1028a"; -}; diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts deleted file mode 100644 index 9b5e92fb753..00000000000 --- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts +++ /dev/null @@ -1,47 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Device Tree file for the Kontron SMARC-sAL28 board. - * - * This is for the network variant 4 which has two ethernet ports. It - * extends the base and provides one more port connected via RGMII. - * - * Copyright (C) 2021 Michael Walle <michael@walle.cc> - * - */ - -/dts-v1/; -#include "fsl-ls1028a-kontron-sl28.dts" -#include <dt-bindings/net/qca-ar803x.h> - -/ { - model = "Kontron SMARC-sAL28 (Dual PHY)"; - compatible = "kontron,sl28-var4", "kontron,sl28", "fsl,ls1028a"; -}; - -&enetc_mdio_pf3 { - phy1: ethernet-phy@4 { - reg = <0x4>; - eee-broken-1000t; - eee-broken-100tx; - qca,clk-out-frequency = <125000000>; - qca,clk-out-strength = <AR803X_STRENGTH_FULL>; - qca,keep-pll-enabled; - vddio-supply = <&vddio>; - - vddio: vddio-regulator { - regulator-name = "VDDIO"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - vddh: vddh-regulator { - regulator-name = "VDDH"; - }; - }; -}; - -&enetc_port1 { - phy-handle = <&phy1>; - phy-mode = "rgmii-id"; - status = "okay"; -}; diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28.dts deleted file mode 100644 index ab713b4949b..00000000000 --- a/arch/arm/dts/fsl-ls1028a-kontron-sl28.dts +++ /dev/null @@ -1,308 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Device Tree file for the Kontron SMARC-sAL28 board. - * - * Copyright (C) 2021 Michael Walle <michael@walle.cc> - * - */ - -/dts-v1/; -#include "fsl-ls1028a.dtsi" -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> - -/ { - model = "Kontron SMARC-sAL28"; - compatible = "kontron,sl28", "fsl,ls1028a"; - - aliases { - crypto = &crypto; - serial0 = &duart0; - serial1 = &duart1; - serial2 = &lpuart1; - spi0 = &fspi; - spi1 = &dspi2; - mmc0 = &esdhc1; - mmc1 = &esdhc; - rtc0 = &rtc; - rtc1 = &ftm_alarm0; - }; - - buttons0 { - compatible = "gpio-keys"; - - power-button { - interrupts-extended = <&sl28cpld_intc - 4 IRQ_TYPE_EDGE_BOTH>; - linux,code = <KEY_POWER>; - label = "Power"; - }; - - sleep-button { - interrupts-extended = <&sl28cpld_intc - 5 IRQ_TYPE_EDGE_BOTH>; - linux,code = <KEY_SLEEP>; - label = "Sleep"; - }; - }; - - buttons1 { - compatible = "gpio-keys-polled"; - poll-interval = <200>; - - lid-switch { - linux,input-type = <EV_SW>; - linux,code = <SW_LID>; - gpios = <&sl28cpld_gpio3 4 GPIO_ACTIVE_LOW>; - label = "Lid"; - }; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&can0 { - status = "okay"; -}; - -&dspi2 { - status = "okay"; -}; - -&duart0 { - status = "okay"; -}; - -&duart1 { - status = "okay"; -}; - -&enetc_mdio_pf3 { - phy0: ethernet-phy@5 { - reg = <0x5>; - eee-broken-1000t; - eee-broken-100tx; - }; -}; - -&enetc_port0 { - phy-handle = <&phy0>; - phy-mode = "sgmii"; - managed = "in-band-status"; - status = "okay"; -}; - -&esdhc { - sd-uhs-sdr104; - sd-uhs-sdr50; - sd-uhs-sdr25; - sd-uhs-sdr12; - status = "okay"; -}; - -&esdhc1 { - mmc-hs200-1_8v; - mmc-hs400-1_8v; - bus-width = <8>; - status = "okay"; -}; - -&fspi { - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - m25p,fast-read; - spi-max-frequency = <133000000>; - reg = <0>; - /* The following setting enables 1-1-2 (CMD-ADDR-DATA) mode */ - spi-rx-bus-width = <2>; /* 2 SPI Rx lines */ - spi-tx-bus-width = <1>; /* 1 SPI Tx line */ - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - reg = <0x000000 0x010000>; - label = "rcw"; - read-only; - }; - - partition@10000 { - reg = <0x010000 0x1d0000>; - label = "failsafe bootloader"; - read-only; - }; - - partition@200000 { - reg = <0x200000 0x010000>; - label = "configuration store"; - }; - - partition@210000 { - reg = <0x210000 0x1d0000>; - label = "bootloader"; - }; - - partition@3e0000 { - reg = <0x3e0000 0x020000>; - label = "bootloader environment"; - }; - }; - }; -}; - -&gpio1 { - gpio-line-names = - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "TDO", "TCK", - "", "", "", "", "", "", "", ""; -}; - -&gpio2 { - gpio-line-names = - "", "", "", "", "", "", "TMS", "TDI", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", ""; -}; - -&i2c0 { - status = "okay"; - - rtc: rtc@32 { - compatible = "microcrystal,rv8803"; - reg = <0x32>; - }; - - sl28cpld@4a { - compatible = "kontron,sl28cpld"; - reg = <0x4a>; - #address-cells = <1>; - #size-cells = <0>; - - watchdog@4 { - compatible = "kontron,sl28cpld-wdt"; - reg = <0x4>; - kontron,assert-wdt-timeout-pin; - }; - - hwmon@b { - compatible = "kontron,sl28cpld-fan"; - reg = <0xb>; - }; - - sl28cpld_pwm0: pwm@c { - compatible = "kontron,sl28cpld-pwm"; - reg = <0xc>; - #pwm-cells = <2>; - }; - - sl28cpld_pwm1: pwm@e { - compatible = "kontron,sl28cpld-pwm"; - reg = <0xe>; - #pwm-cells = <2>; - }; - - sl28cpld_gpio0: gpio@10 { - compatible = "kontron,sl28cpld-gpio"; - reg = <0x10>; - interrupts-extended = <&gpio2 6 - IRQ_TYPE_EDGE_FALLING>; - - gpio-controller; - #gpio-cells = <2>; - gpio-line-names = - "GPIO0_CAM0_PWR_N", "GPIO1_CAM1_PWR_N", - "GPIO2_CAM0_RST_N", "GPIO3_CAM1_RST_N", - "GPIO4_HDA_RST_N", "GPIO5_PWM_OUT", - "GPIO6_TACHIN", "GPIO7"; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - sl28cpld_gpio1: gpio@15 { - compatible = "kontron,sl28cpld-gpio"; - reg = <0x15>; - interrupts-extended = <&gpio2 6 - IRQ_TYPE_EDGE_FALLING>; - - gpio-controller; - #gpio-cells = <2>; - gpio-line-names = - "GPIO8", "GPIO9", "GPIO10", "GPIO11", - "", "", "", ""; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - sl28cpld_gpio2: gpio@1a { - compatible = "kontron,sl28cpld-gpo"; - reg = <0x1a>; - - gpio-controller; - #gpio-cells = <2>; - gpio-line-names = - "LCD0 voltage enable", - "LCD0 backlight enable", - "eMMC reset", "LVDS bridge reset", - "LVDS bridge power-down", - "SDIO power enable", - "", ""; - }; - - sl28cpld_gpio3: gpio@1b { - compatible = "kontron,sl28cpld-gpi"; - reg = <0x1b>; - - gpio-controller; - #gpio-cells = <2>; - gpio-line-names = - "Power button", "Force recovery", "Sleep", - "Battery low", "Lid state", "Charging", - "Charger present", ""; - }; - - sl28cpld_intc: interrupt-controller@1c { - compatible = "kontron,sl28cpld-intc"; - reg = <0x1c>; - interrupts-extended = <&gpio2 6 - IRQ_TYPE_EDGE_FALLING>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - eeprom@50 { - compatible = "atmel,24c32"; - reg = <0x50>; - pagesize = <32>; - }; -}; - -&i2c3 { - status = "okay"; -}; - -&i2c4 { - status = "okay"; - - eeprom@50 { - compatible = "atmel,24c32"; - reg = <0x50>; - pagesize = <32>; - }; -}; - -&lpuart1 { - status = "okay"; -}; diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi index 06f2f73a03f..6ab8f66256e 100644 --- a/arch/arm/dts/imx8mm-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-u-boot.dtsi @@ -5,7 +5,6 @@ / { binman: binman { - multiple-images; }; #ifdef CONFIG_OPTEE @@ -43,56 +42,61 @@ }; &binman { - u-boot-spl-ddr { - align = <4>; - align-size = <4>; - filename = "u-boot-spl-ddr.bin"; - pad-byte = <0xff>; - - u-boot-spl { - align-end = <4>; - filename = "u-boot-spl.bin"; - }; + filename = "flash.bin"; + section { + pad-byte = <0x00>; - ddr-1d-imem-fw { - filename = "lpddr4_pmu_train_1d_imem.bin"; - align-end = <4>; +#ifdef CONFIG_FSPI_CONF_HEADER + fspi_conf_block { + filename = CONFIG_FSPI_CONF_FILE; type = "blob-ext"; + size = <0x1000>; }; +#endif - ddr-1d-dmem-fw { - filename = "lpddr4_pmu_train_1d_dmem.bin"; - align-end = <4>; - type = "blob-ext"; - }; + nxp-imx8mimage { + filename = "u-boot-spl-mkimage.bin"; + nxp,boot-from = "sd"; + nxp,rom-version = <1>; + nxp,loader-address = <CONFIG_SPL_TEXT_BASE>; + args; /* Needed by mkimage etype superclass */ - ddr-2d-imem-fw { - filename = "lpddr4_pmu_train_2d_imem.bin"; - align-end = <4>; - type = "blob-ext"; - }; + section { + align = <4>; + align-size = <4>; + filename = "u-boot-spl-ddr.bin"; + pad-byte = <0xff>; - ddr-2d-dmem-fw { - filename = "lpddr4_pmu_train_2d_dmem.bin"; - align-end = <4>; - type = "blob-ext"; - }; - }; + u-boot-spl { + align-end = <4>; + filename = "u-boot-spl.bin"; + }; - spl { - filename = "spl.bin"; + ddr-1d-imem-fw { + filename = "lpddr4_pmu_train_1d_imem.bin"; + align-end = <4>; + type = "blob-ext"; + }; - mkimage { - args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000"; + ddr-1d-dmem-fw { + filename = "lpddr4_pmu_train_1d_dmem.bin"; + align-end = <4>; + type = "blob-ext"; + }; - blob { - filename = "u-boot-spl-ddr.bin"; + ddr-2d-imem-fw { + filename = "lpddr4_pmu_train_2d_imem.bin"; + align-end = <4>; + type = "blob-ext"; + }; + + ddr-2d-dmem-fw { + filename = "lpddr4_pmu_train_2d_dmem.bin"; + align-end = <4>; + type = "blob-ext"; + }; }; }; - }; - - itb { - filename = "u-boot.itb"; fit { description = "Configuration to load ATF before U-Boot"; @@ -101,6 +105,11 @@ #endif fit,fdt-list = "of-list"; #address-cells = <1>; +#ifdef CONFIG_FSPI_CONF_HEADER + offset = <0x58C00>; +#else + offset = <0x57c00>; +#endif images { uboot { @@ -166,43 +175,6 @@ }; }; }; - - imx-boot { - filename = "flash.bin"; - pad-byte = <0x00>; - -#ifdef CONFIG_FSPI_CONF_HEADER - fspi_conf_block { - filename = CONFIG_FSPI_CONF_FILE; - type = "blob-ext"; - size = <0x1000>; - }; - - spl { - filename = "spl.bin"; - offset = <0x1000>; - type = "blob-ext"; - }; - - binman_uboot: uboot { - filename = "u-boot.itb"; - offset = <0x58C00>; - type = "blob-ext"; - }; -#else - spl { - filename = "spl.bin"; - offset = <0x0>; - type = "blob-ext"; - }; - - binman_uboot: uboot { - filename = "u-boot.itb"; - offset = <0x57c00>; - type = "blob-ext"; - }; -#endif - }; }; &clk { diff --git a/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi index 38db56059d6..90183aff8bc 100644 --- a/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi @@ -35,8 +35,12 @@ bootph-pre-ram; }; -&binman_uboot { - offset = <0x5fc00>; +&binman { + section { + fit { + offset = <0x5fc00>; + }; + }; }; &gpio1 { @@ -60,6 +64,11 @@ ctrl-sleep-moci-hog { bootph-pre-ram; + gpio-hog; + output-high; + gpios = <1 GPIO_ACTIVE_HIGH>; + line-name = "CTRL_SLEEP_MOCI#"; + }; }; diff --git a/arch/arm/dts/imx8mn-u-boot.dtsi b/arch/arm/dts/imx8mn-u-boot.dtsi index 96b1a1bc802..ba9967dbe4a 100644 --- a/arch/arm/dts/imx8mn-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-u-boot.dtsi @@ -5,7 +5,6 @@ / { binman: binman { - multiple-images; }; #ifdef CONFIG_OPTEE @@ -92,78 +91,83 @@ }; &binman { - u-boot-spl-ddr { - filename = "u-boot-spl-ddr.bin"; - pad-byte = <0xff>; - align-size = <4>; - align = <4>; - - u-boot-spl { - align-end = <4>; - filename = "u-boot-spl.bin"; + filename = "flash.bin"; + section { + pad-byte = <0x00>; + +#ifdef CONFIG_FSPI_CONF_HEADER + fspi_conf_block { + filename = CONFIG_FSPI_CONF_FILE; + type = "blob-ext"; + offset = <0x400>; }; +#endif - ddr-1d-imem-fw { + nxp-imx8mimage { + filename = "u-boot-spl-mkimage.bin"; + nxp,boot-from = "sd"; + nxp,rom-version = <2>; + nxp,loader-address = <CONFIG_SPL_TEXT_BASE>; + args; /* Needed by mkimage etype superclass */ + + section { + filename = "u-boot-spl-ddr.bin"; + pad-byte = <0xff>; + align-size = <4>; + align = <4>; + + u-boot-spl { + align-end = <4>; + filename = "u-boot-spl.bin"; + }; + + ddr-1d-imem-fw { #ifdef CONFIG_IMX8M_LPDDR4 - filename = "lpddr4_pmu_train_1d_imem.bin"; + filename = "lpddr4_pmu_train_1d_imem.bin"; #elif CONFIG_IMX8M_DDR4 - filename = "ddr4_imem_1d_201810.bin"; + filename = "ddr4_imem_1d_201810.bin"; #else - filename = "ddr3_imem_1d.bin"; + filename = "ddr3_imem_1d.bin"; #endif - type = "blob-ext"; - align-end = <4>; - }; + type = "blob-ext"; + align-end = <4>; + }; - ddr-1d-dmem-fw { + ddr-1d-dmem-fw { #ifdef CONFIG_IMX8M_LPDDR4 - filename = "lpddr4_pmu_train_1d_dmem.bin"; + filename = "lpddr4_pmu_train_1d_dmem.bin"; #elif CONFIG_IMX8M_DDR4 - filename = "ddr4_dmem_1d_201810.bin"; + filename = "ddr4_dmem_1d_201810.bin"; #else - filename = "ddr3_dmem_1d.bin"; + filename = "ddr3_dmem_1d.bin"; #endif - type = "blob-ext"; - align-end = <4>; - }; + type = "blob-ext"; + align-end = <4>; + }; #if defined(CONFIG_IMX8M_LPDDR4) || defined(CONFIG_IMX8M_DDR4) - ddr-2d-imem-fw { + ddr-2d-imem-fw { #ifdef CONFIG_IMX8M_LPDDR4 - filename = "lpddr4_pmu_train_2d_imem.bin"; + filename = "lpddr4_pmu_train_2d_imem.bin"; #else - filename = "ddr4_imem_2d_201810.bin"; + filename = "ddr4_imem_2d_201810.bin"; #endif - type = "blob-ext"; - align-end = <4>; - }; + type = "blob-ext"; + align-end = <4>; + }; - ddr-2d-dmem-fw { + ddr-2d-dmem-fw { #ifdef CONFIG_IMX8M_LPDDR4 - filename = "lpddr4_pmu_train_2d_dmem.bin"; + filename = "lpddr4_pmu_train_2d_dmem.bin"; #else - filename = "ddr4_dmem_2d_201810.bin"; + filename = "ddr4_dmem_2d_201810.bin"; #endif - type = "blob-ext"; - align-end = <4>; - }; + type = "blob-ext"; + align-end = <4>; + }; #endif - }; - - spl { - filename = "spl.bin"; - - mkimage { - args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x912000"; - - blob { - filename = "u-boot-spl-ddr.bin"; }; }; - }; - - itb { - filename = "u-boot.itb"; fit { description = "Configuration to load ATF before U-Boot"; @@ -172,6 +176,11 @@ #endif fit,fdt-list = "of-list"; #address-cells = <1>; +#ifdef CONFIG_FSPI_CONF_HEADER + offset = <0x59000>; +#else + offset = <0x58000>; +#endif images { uboot { @@ -237,42 +246,4 @@ }; }; }; - - imx-boot { - filename = "flash.bin"; - pad-byte = <0x00>; - -#ifdef CONFIG_FSPI_CONF_HEADER - fspi_conf_block { - filename = CONFIG_FSPI_CONF_FILE; - type = "blob-ext"; - offset = <0x400>; - }; - - spl { - filename = "spl.bin"; - offset = <0x1000>; - type = "blob-ext"; - }; - - binman_uboot: uboot { - filename = "u-boot.itb"; - offset = <0x59000>; - type = "blob-ext"; - }; -#else - - spl { - offset = <0x0>; - filename = "spl.bin"; - type = "blob-ext"; - }; - - binman_uboot: uboot { - offset = <0x58000>; - filename = "u-boot.itb"; - type = "blob-ext"; - }; -#endif - }; }; diff --git a/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi b/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi index 040f333c52d..b0b99d51856 100644 --- a/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi @@ -4,3 +4,15 @@ */ #include "imx8mp-dhcom-u-boot.dtsi" + +/ { + clk_pcie100: clk-pcie100 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + }; +}; + +&pcie_phy { + clocks = <&clk_pcie100>; +}; diff --git a/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi b/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi index b05be57e71b..cb37e28f28f 100644 --- a/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi @@ -136,7 +136,7 @@ }; &binman { - itb { + section { fit { images { fdt-dto-imx8mp-dhcom-som-overlay-eth1xfast { diff --git a/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi b/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi index 22171bd344e..aff5dcf615d 100644 --- a/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi @@ -136,7 +136,7 @@ }; &binman { - itb { + section { fit { images { fip { diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi index 4fadcaea509..c4c1a177102 100644 --- a/arch/arm/dts/imx8mp-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-u-boot.dtsi @@ -6,7 +6,6 @@ / { binman: binman { - multiple-images; }; #ifdef CONFIG_OPTEE @@ -83,55 +82,52 @@ #endif &binman { - u-boot-spl-ddr { - filename = "u-boot-spl-ddr.bin"; - pad-byte = <0xff>; - align-size = <4>; - align = <4>; - - u-boot-spl { - align-end = <4>; - }; + filename = "flash.bin"; + section { + pad-byte = <0x00>; - ddr-1d-imem-fw { - filename = "lpddr4_pmu_train_1d_imem_202006.bin"; - type = "blob-ext"; - align-end = <4>; - }; + nxp-imx8mimage { + filename = "u-boot-spl-mkimage.bin"; + nxp,boot-from = "sd"; + nxp,rom-version = <2>; + nxp,loader-address = <CONFIG_SPL_TEXT_BASE>; + args; /* Needed by mkimage etype superclass */ - ddr-1d-dmem-fw { - filename = "lpddr4_pmu_train_1d_dmem_202006.bin"; - type = "blob-ext"; - align-end = <4>; - }; + section { + filename = "u-boot-spl-ddr.bin"; + pad-byte = <0xff>; + align-size = <4>; + align = <4>; - ddr-2d-imem-fw { - filename = "lpddr4_pmu_train_2d_imem_202006.bin"; - type = "blob-ext"; - align-end = <4>; - }; + u-boot-spl { + align-end = <4>; + }; - ddr-2d-dmem-fw { - filename = "lpddr4_pmu_train_2d_dmem_202006.bin"; - type = "blob-ext"; - align-end = <4>; - }; - }; + ddr-1d-imem-fw { + filename = "lpddr4_pmu_train_1d_imem_202006.bin"; + type = "blob-ext"; + align-end = <4>; + }; - spl { - filename = "spl.bin"; + ddr-1d-dmem-fw { + filename = "lpddr4_pmu_train_1d_dmem_202006.bin"; + type = "blob-ext"; + align-end = <4>; + }; - mkimage { - args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x920000"; + ddr-2d-imem-fw { + filename = "lpddr4_pmu_train_2d_imem_202006.bin"; + type = "blob-ext"; + align-end = <4>; + }; - blob { - filename = "u-boot-spl-ddr.bin"; + ddr-2d-dmem-fw { + filename = "lpddr4_pmu_train_2d_dmem_202006.bin"; + type = "blob-ext"; + align-end = <4>; + }; }; }; - }; - - itb { - filename = "u-boot.itb"; fit { description = "Configuration to load ATF before U-Boot"; @@ -140,6 +136,7 @@ #endif fit,fdt-list = "of-list"; #address-cells = <1>; + offset = <0x58000>; images { uboot { @@ -195,21 +192,4 @@ }; }; }; - - imx-boot { - filename = "flash.bin"; - pad-byte = <0x00>; - - spl { - filename = "spl.bin"; - offset = <0x0>; - type = "blob-ext"; - }; - - binman_uboot: uboot { - filename = "u-boot.itb"; - offset = <0x58000>; - type = "blob-ext"; - }; - }; }; diff --git a/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi index 03f211d5f7d..7b45a87450b 100644 --- a/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi @@ -58,6 +58,10 @@ ctrl-sleep-moci-hog { bootph-pre-ram; + gpio-hog; + output-high; + gpios = <29 GPIO_ACTIVE_HIGH>; + line-name = "CTRL_SLEEP_MOCI#"; }; }; diff --git a/arch/arm/dts/imx8mq-cm-u-boot.dtsi b/arch/arm/dts/imx8mq-cm-u-boot.dtsi index e23998f5aba..819501337e9 100644 --- a/arch/arm/dts/imx8mq-cm-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-cm-u-boot.dtsi @@ -3,11 +3,7 @@ * Copyright 2019 NXP */ -/ { - binman: binman { - multiple-images; - }; -}; +#include "imx8mq-u-boot.dtsi" &pinctrl_uart1 { bootph-pre-ram; @@ -16,108 +12,3 @@ &uart1 { bootph-pre-ram; }; - -&binman { - u-boot-spl-ddr { - filename = "u-boot-spl-ddr.bin"; - pad-byte = <0xff>; - align-size = <4>; - align = <4>; - - u-boot-spl { - align-end = <4>; - }; - - ddr-1d-imem-fw { - filename = "lpddr4_pmu_train_1d_imem.bin"; - type = "blob-ext"; - align-end = <4>; - }; - - ddr-1d-dmem-fw { - filename = "lpddr4_pmu_train_1d_dmem.bin"; - type = "blob-ext"; - align-end = <4>; - }; - - ddr-2d-imem-fw { - filename = "lpddr4_pmu_train_2d_imem.bin"; - type = "blob-ext"; - align-end = <4>; - }; - - ddr-2d-dmem-fw { - filename = "lpddr4_pmu_train_2d_dmem.bin"; - type = "blob-ext"; - align-end = <4>; - }; - }; - - flash { - mkimage { - args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000"; - - blob { - filename = "u-boot-spl-ddr.bin"; - }; - }; - }; - - itb { - filename = "u-boot.itb"; - - fit { - description = "Configuration to load ATF before U-Boot"; - #address-cells = <1>; - fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>; - - images { - uboot { - description = "U-Boot (64-bit)"; - type = "standalone"; - arch = "arm64"; - compression = "none"; - load = <CONFIG_TEXT_BASE>; - - uboot_blob: blob-ext { - filename = "u-boot-nodtb.bin"; - }; - }; - - atf { - description = "ARM Trusted Firmware"; - type = "firmware"; - arch = "arm64"; - compression = "none"; - load = <0x910000>; - entry = <0x910000>; - - atf_blob: blob-ext { - filename = "bl31.bin"; - }; - }; - - fdt { - description = "NAME"; - type = "flat_dt"; - compression = "none"; - - uboot_fdt_blob: blob-ext { - filename = "u-boot.dtb"; - }; - }; - }; - - configurations { - default = "conf"; - - conf { - description = "NAME"; - firmware = "uboot"; - loadables = "atf"; - fdt = "fdt"; - }; - }; - }; - }; -}; diff --git a/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi b/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi index e3341a46d63..1a4568dac65 100644 --- a/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi @@ -11,14 +11,13 @@ }; &binman { - /delete-node/ signed-hdmi; - - signed-hdmi { - filename = "signed_hdmi.bin"; - - signed-dp-imx8m { - filename = "signed_dp_imx8m.bin"; - type = "blob-ext"; + section { + nxp-imx8mimage { + section { + signed-hdmi-imx8m { + filename = "signed_dp_imx8m.bin"; + }; + }; }; }; }; diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi index 90b2274754b..48dbe94f0c4 100644 --- a/arch/arm/dts/imx8mq-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-u-boot.dtsi @@ -5,7 +5,6 @@ / { binman: binman { - multiple-images; }; }; @@ -35,65 +34,58 @@ }; &binman { - u-boot-spl-ddr { - align = <4>; - align-size = <4>; - filename = "u-boot-spl-ddr.bin"; - pad-byte = <0xff>; - - u-boot-spl { - align-end = <4>; - filename = "u-boot-spl.bin"; - }; + filename = "flash.bin"; + section { + pad-byte = <0x00>; - ddr-1d-imem-fw { - filename = "lpddr4_pmu_train_1d_imem.bin"; - align-end = <4>; - type = "blob-ext"; - }; + nxp-imx8mimage { + filename = "u-boot-spl-mkimage.bin"; + nxp,boot-from = "sd"; + nxp,rom-version = <1>; + nxp,loader-address = <CONFIG_SPL_TEXT_BASE>; + args; /* Needed by mkimage etype superclass */ - ddr-1d-dmem-fw { - filename = "lpddr4_pmu_train_1d_dmem.bin"; - align-end = <4>; - type = "blob-ext"; - }; - - ddr-2d-imem-fw { - filename = "lpddr4_pmu_train_2d_imem.bin"; - align-end = <4>; - type = "blob-ext"; - }; + section { + align = <4>; + align-size = <4>; + filename = "u-boot-spl-ddr.bin"; + pad-byte = <0xff>; - ddr-2d-dmem-fw { - filename = "lpddr4_pmu_train_2d_dmem.bin"; - align-end = <4>; - type = "blob-ext"; - }; - }; + u-boot-spl { + align-end = <4>; + filename = "u-boot-spl.bin"; + }; - signed-hdmi { - filename = "signed_hdmi.bin"; + ddr-1d-imem-fw { + filename = "lpddr4_pmu_train_1d_imem.bin"; + align-end = <4>; + type = "blob-ext"; + }; - signed-hdmi-imx8m { - filename = "signed_hdmi_imx8m.bin"; - type = "blob-ext"; - }; - }; + ddr-1d-dmem-fw { + filename = "lpddr4_pmu_train_1d_dmem.bin"; + align-end = <4>; + type = "blob-ext"; + }; - spl { - filename = "spl.bin"; + ddr-2d-imem-fw { + filename = "lpddr4_pmu_train_2d_imem.bin"; + align-end = <4>; + type = "blob-ext"; + }; - mkimage { - args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000"; + ddr-2d-dmem-fw { + filename = "lpddr4_pmu_train_2d_dmem.bin"; + align-end = <4>; + type = "blob-ext"; + }; - blob { - filename = "u-boot-spl-ddr.bin"; + signed-hdmi-imx8m { + filename = "signed_hdmi_imx8m.bin"; + type = "blob-ext"; + }; }; }; - }; - - itb { - filename = "u-boot.itb"; fit { description = "Configuration to load ATF before U-Boot"; @@ -158,21 +150,4 @@ }; }; }; - - imx-boot { - filename = "flash.bin"; - pad-byte = <0x00>; - - spl { - filename = "spl.bin"; - offset = <0x0>; - type = "blob-ext"; - }; - - binman_uboot: uboot { - filename = "u-boot.itb"; - offset = <0x57c00>; - type = "blob-ext"; - }; - }; }; diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi index a99ba99bfb4..408e601bc90 100644 --- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi +++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi @@ -26,6 +26,111 @@ bootph-pre-ram; }; +&lpi2c2 { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_lpi2c2>; + pinctrl-1 = <&pinctrl_lpi2c2>; + status = "okay"; + + pmic@25 { + compatible = "nxp,pca9451a"; + reg = <0x25>; + interrupt-parent = <&pcal6524>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + + regulators { + buck1: BUCK1 { + regulator-name = "BUCK1"; + regulator-min-microvolt = <650000>; + regulator-max-microvolt = <2237500>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <3125>; + }; + + buck2: BUCK2 { + regulator-name = "BUCK2"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <2187500>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <3125>; + }; + + buck4: BUCK4{ + regulator-name = "BUCK4"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <3400000>; + regulator-boot-on; + regulator-always-on; + }; + + buck5: BUCK5{ + regulator-name = "BUCK5"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <3400000>; + regulator-boot-on; + regulator-always-on; + }; + + buck6: BUCK6 { + regulator-name = "BUCK6"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <3400000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo1: LDO1 { + regulator-name = "LDO1"; + regulator-min-microvolt = <1600000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo4: LDO4 { + regulator-name = "LDO4"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo5: LDO5 { + regulator-name = "LDO5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + + pcal6524: gpio@22 { + compatible = "nxp,pcal6524"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcal6524>; + reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gpio3>; + interrupts = <27 IRQ_TYPE_LEVEL_LOW>; + }; + + adp5585gpio: gpio@34 { + compatible = "adp5585"; + reg = <0x34>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + &aips1 { bootph-pre-ram; bootph-all; @@ -44,6 +149,19 @@ &iomuxc { bootph-pre-ram; bootph-some-ram; + + pinctrl_lpi2c2: lpi2c2grp { + fsl,pins = < + MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e + MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e + >; + }; + + pinctrl_pcal6524: pcal6524grp { + fsl,pins = < + MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e + >; + }; }; ®_usdhc2_vmmc { diff --git a/arch/arm/dts/imx93-11x11-evk.dts b/arch/arm/dts/imx93-11x11-evk.dts deleted file mode 100644 index 4322cc3e11b..00000000000 --- a/arch/arm/dts/imx93-11x11-evk.dts +++ /dev/null @@ -1,322 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright 2022 NXP - */ - -/dts-v1/; - -#include "imx93.dtsi" - -/ { - model = "NXP i.MX93 11X11 EVK board"; - compatible = "fsl,imx93-11x11-evk", "fsl,imx93"; - - chosen { - stdout-path = &lpuart1; - }; - - reg_vref_1v8: regulator-adc-vref { - compatible = "regulator-fixed"; - regulator-name = "vref_1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - reg_usdhc2_vmmc: regulator-usdhc2 { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; - regulator-name = "VSD_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; -}; - -&adc1 { - vref-supply = <®_vref_1v8>; - status = "okay"; -}; - -&mu1 { - status = "okay"; -}; - -&mu2 { - status = "okay"; -}; - -&eqos { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_eqos>; - phy-mode = "rgmii-id"; - phy-handle = <ðphy1>; - status = "okay"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - clock-frequency = <5000000>; - - ethphy1: ethernet-phy@1 { - reg = <1>; - eee-broken-1000t; - }; - }; -}; - -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fec>; - phy-mode = "rgmii-id"; - phy-handle = <ðphy2>; - fsl,magic-packet; - status = "okay"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - clock-frequency = <5000000>; - - ethphy2: ethernet-phy@2 { - reg = <2>; - eee-broken-1000t; - }; - }; -}; - -&lpi2c2 { - #address-cells = <1>; - #size-cells = <0>; - clock-frequency = <400000>; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&pinctrl_lpi2c2>; - pinctrl-1 = <&pinctrl_lpi2c2>; - status = "okay"; - - pmic@25 { - compatible = "nxp,pca9451a"; - reg = <0x25>; - interrupt-parent = <&pcal6524>; - interrupts = <11 IRQ_TYPE_LEVEL_LOW>; - - regulators { - buck1: BUCK1 { - regulator-name = "BUCK1"; - regulator-min-microvolt = <650000>; - regulator-max-microvolt = <2237500>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <3125>; - }; - - buck2: BUCK2 { - regulator-name = "BUCK2"; - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <2187500>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <3125>; - }; - - buck4: BUCK4{ - regulator-name = "BUCK4"; - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <3400000>; - regulator-boot-on; - regulator-always-on; - }; - - buck5: BUCK5{ - regulator-name = "BUCK5"; - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <3400000>; - regulator-boot-on; - regulator-always-on; - }; - - buck6: BUCK6 { - regulator-name = "BUCK6"; - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <3400000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo1: LDO1 { - regulator-name = "LDO1"; - regulator-min-microvolt = <1600000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo4: LDO4 { - regulator-name = "LDO4"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo5: LDO5 { - regulator-name = "LDO5"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - }; - }; - - pcal6524: gpio@22 { - compatible = "nxp,pcal6524"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pcal6524>; - reg = <0x22>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupt-parent = <&gpio3>; - interrupts = <27 IRQ_TYPE_LEVEL_LOW>; - }; - - adp5585gpio: gpio@34 { - compatible = "adp5585"; - reg = <0x34>; - gpio-controller; - #gpio-cells = <2>; - }; -}; - -&lpuart1 { /* console */ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - status = "okay"; -}; - -&usdhc1 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc1>; - pinctrl-1 = <&pinctrl_usdhc1>; - pinctrl-2 = <&pinctrl_usdhc1>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&usdhc2 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>; - vmmc-supply = <®_usdhc2_vmmc>; - bus-width = <4>; - status = "okay"; - no-sdio; - no-mmc; -}; - -&iomuxc { - pinctrl_lpi2c2: lpi2c2grp { - fsl,pins = < - MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e - MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e - >; - }; - - pinctrl_pcal6524: pcal6524grp { - fsl,pins = < - MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e - >; - }; - - pinctrl_eqos: eqosgrp { - fsl,pins = < - MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x57e - MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x57e - MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e - MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e - MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e - MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e - MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x5fe - MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e - MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x57e - MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x57e - MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x57e - MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x57e - MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x5fe - MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e - >; - }; - - pinctrl_fec: fecgrp { - fsl,pins = < - MX93_PAD_ENET2_MDC__ENET1_MDC 0x57e - MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x57e - MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e - MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e - MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e - MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e - MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x5fe - MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e - MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x57e - MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x57e - MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x57e - MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x57e - MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x5fe - MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e - >; - }; - - pinctrl_uart1: uart1grp { - fsl,pins = < - MX93_PAD_UART1_RXD__LPUART1_RX 0x31e - MX93_PAD_UART1_TXD__LPUART1_TX 0x31e - >; - }; - - pinctrl_usdhc1: usdhc1grp { - fsl,pins = < - MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe - MX93_PAD_SD1_CMD__USDHC1_CMD 0x13fe - MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x13fe - MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x13fe - MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x13fe - MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x13fe - MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x13fe - MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x13fe - MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x13fe - MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x13fe - MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe - >; - }; - - pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { - fsl,pins = < - MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e - >; - }; - - pinctrl_usdhc2_gpio: usdhc2gpiogrp { - fsl,pins = < - MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e - >; - }; - - pinctrl_usdhc2: usdhc2grp { - fsl,pins = < - MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe - MX93_PAD_SD2_CMD__USDHC2_CMD 0x13fe - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe - MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e - >; - }; -}; diff --git a/arch/arm/dts/imx93-u-boot.dtsi b/arch/arm/dts/imx93-u-boot.dtsi index 40e17bbc5ae..289aba17584 100644 --- a/arch/arm/dts/imx93-u-boot.dtsi +++ b/arch/arm/dts/imx93-u-boot.dtsi @@ -86,3 +86,18 @@ }; }; }; + +&tmu { + compatible = "fsl,imx93-tmu"; + reg = <0x44482000 0x1000>; + clocks = <&clk IMX93_CLK_TMC_GATE>; + little-endian; + fsl,tmu-calibration = <0x0000000e 0x800000da + 0x00000029 0x800000e9 + 0x00000056 0x80000102 + 0x000000a2 0x8000012a + 0x00000116 0x80000166 + 0x00000195 0x800001a7 + 0x000001b2 0x800001b6>; + #thermal-sensor-cells = <1>; +}; diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi b/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi index 6f5845024f2..a9b86b61e53 100644 --- a/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi +++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi @@ -150,12 +150,107 @@ filename = "ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f"; }; }; + + tifsstub-hs { + filename = "tifsstub.bin_hs"; + ti-secure-rom { + content = <&tifsstub_hs_cert>; + core = "secure"; + load = <0x40000>; + sw-rev = <CONFIG_K3_X509_SWRV>; + keyfile = "custMpk.pem"; + countersign; + tifsstub; + }; + tifsstub_hs_cert: tifsstub-hs-cert.bin { + filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-cert.bin"; + type = "blob-ext"; + optional; + }; + tifsstub_hs_enc: tifsstub-hs-enc.bin { + filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-enc.bin"; + type = "blob-ext"; + optional; + }; + }; + + tifsstub-fs { + filename = "tifsstub.bin_fs"; + tifsstub_fs_cert: tifsstub-fs-cert.bin { + filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-cert.bin"; + type = "blob-ext"; + optional; + }; + tifsstub_fs_enc: tifsstub-fs-enc.bin { + filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-enc.bin"; + type = "blob-ext"; + optional; + }; + + }; + + tifsstub-gp { + filename = "tifsstub.bin_gp"; + ti-secure-rom { + content = <&tifsstub_gp>; + core = "secure"; + load = <0x60000>; + sw-rev = <CONFIG_K3_X509_SWRV>; + keyfile = "ti-degenerate-key.pem"; + tifsstub; + }; + tifsstub_gp: tifsstub-gp.bin { + filename = "ti-sysfw/ti-fs-stub-firmware-am62x-gp.bin"; + type = "blob-ext"; + optional; + }; + }; + ti-spl { insert-template = <&ti_spl_template>; fit { images { + tifsstub-hs { + description = "TIFSSTUB"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-hs"; + load = <0x9dc00000>; + entry = <0x9dc00000>; + blob-ext { + filename = "tifsstub.bin_hs"; + }; + }; + + tifsstub-fs { + description = "TIFSSTUB"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-fs"; + load = <0x9dc00000>; + entry = <0x9dc00000>; + blob-ext { + filename = "tifsstub.bin_fs"; + }; + }; + + tifsstub-gp { + description = "TIFSSTUB"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-gp"; + load = <0x9dc00000>; + entry = <0x9dc00000>; + blob-ext { + filename = "tifsstub.bin_gp"; + }; + }; + dm { ti-secure { content = <&dm>; @@ -187,7 +282,8 @@ conf-0 { description = "k3-am625-verdin-wifi-dev"; firmware = "atf"; - loadables = "tee", "dm", "spl"; + loadables = "tee", "tifsstub-hs", "tifsstub-fs", + "tifsstub-gp", "dm", "spl"; fdt = "fdt-0"; }; }; @@ -243,6 +339,45 @@ fit { images { + tifsstub-hs { + description = "tifsstub"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-hs"; + load = <0x9dc00000>; + entry = <0x9dc00000>; + blob-ext { + filename = "tifsstub.bin_hs"; + }; + }; + + tifsstub-fs { + description = "tifsstub"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-fs"; + load = <0x9dc00000>; + entry = <0x9dc00000>; + blob-ext { + filename = "tifsstub.bin_fs"; + }; + }; + + tifsstub-gp { + description = "tifsstub"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "tifsstub-gp"; + load = <0x9dc00000>; + entry = <0x9dc00000>; + blob-ext { + filename = "tifsstub.bin_gp"; + }; + }; + dm { ti-dm { filename = "ti-dm.bin"; @@ -266,7 +401,8 @@ conf-0 { description = "k3-am625-verdin-wifi-dev"; firmware = "atf"; - loadables = "tee", "dm", "spl"; + loadables = "tee", "tifsstub-hs", "tifsstub-fs", + "tifsstub-gp", "dm", "spl"; fdt = "fdt-0"; }; }; diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi index 7fe7ae41543..9ecb3052740 100644 --- a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi +++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi @@ -91,6 +91,14 @@ &main_gpio0 { bootph-all; + + ctrl-sleep-moci-hog { + bootph-all; + gpio-hog; + gpios = <31 GPIO_ACTIVE_HIGH>; + line-name = "CTRL_SLEEP_MOCI#"; + output-high; + }; }; /* On-module I2C - PMIC_I2C */ @@ -165,10 +173,6 @@ status = "disabled"; }; -&verdin_ctrl_sleep_moci { - bootph-all; -}; - /* Verdin UART_2 */ &wkup_uart0 { bootph-all; diff --git a/arch/arm/dts/k3-am654-icssg2.dtso b/arch/arm/dts/k3-am654-icssg2.dtso new file mode 100644 index 00000000000..faefa2febcf --- /dev/null +++ b/arch/arm/dts/k3-am654-icssg2.dtso @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0 +/** + * DT overlay for enabling ICSSG2 on AM654 EVM + * + * Copyright (C) 2018-2023 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/net/ti-dp83867.h> +#include "k3-pinctrl.h" + +&{/} { + aliases { + ethernet1 = "/icssg2-eth/ethernet-ports/port@0"; + ethernet2 = "/icssg2-eth/ethernet-ports/port@1"; + }; + + /* Ethernet node on PRU-ICSSG2 */ + icssg2_eth: icssg2-eth { + compatible = "ti,am654-icssg-prueth"; + pinctrl-names = "default"; + pinctrl-0 = <&icssg2_rgmii_pins_default>; + sram = <&msmc_ram>; + ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>, + <&pru2_1>, <&rtu2_1>, <&tx_pru2_1>; + firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf", + "ti-pruss/am65x-sr2-rtu0-prueth-fw.elf", + "ti-pruss/am65x-sr2-txpru0-prueth-fw.elf", + "ti-pruss/am65x-sr2-pru1-prueth-fw.elf", + "ti-pruss/am65x-sr2-rtu1-prueth-fw.elf", + "ti-pruss/am65x-sr2-txpru1-prueth-fw.elf"; + + ti,pruss-gp-mux-sel = <2>, /* MII mode */ + <2>, + <2>, + <2>, /* MII mode */ + <2>, + <2>; + + ti,mii-g-rt = <&icssg2_mii_g_rt>; + ti,mii-rt = <&icssg2_mii_rt>; + ti,iep = <&icssg2_iep0>, <&icssg2_iep1>; + + interrupt-parent = <&icssg2_intc>; + interrupts = <24 0 2>, <25 1 3>; + interrupt-names = "tx_ts0", "tx_ts1"; + + dmas = <&main_udmap 0xc300>, /* egress slice 0 */ + <&main_udmap 0xc301>, /* egress slice 0 */ + <&main_udmap 0xc302>, /* egress slice 0 */ + <&main_udmap 0xc303>, /* egress slice 0 */ + <&main_udmap 0xc304>, /* egress slice 1 */ + <&main_udmap 0xc305>, /* egress slice 1 */ + <&main_udmap 0xc306>, /* egress slice 1 */ + <&main_udmap 0xc307>, /* egress slice 1 */ + <&main_udmap 0x4300>, /* ingress slice 0 */ + <&main_udmap 0x4301>; /* ingress slice 1 */ + + dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3", + "tx1-0", "tx1-1", "tx1-2", "tx1-3", + "rx0", "rx1"; + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + icssg2_emac0: port@0 { + reg = <0>; + phy-handle = <&icssg2_phy0>; + phy-mode = "rgmii-id"; + ti,syscon-rgmii-delay = <&scm_conf 0x4120>; + /* Filled in by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + }; + icssg2_emac1: port@1 { + reg = <1>; + phy-handle = <&icssg2_phy1>; + phy-mode = "rgmii-id"; + ti,syscon-rgmii-delay = <&scm_conf 0x4124>; + /* Filled in by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + }; + }; + }; +}; + +&main_pmx0 { + + icssg2_mdio_pins_default: icssg2-mdio-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0094, PIN_INPUT, 2) /* (AC19) PRG2_PRU0_GPO7.PRG2_MDIO0_MDIO */ + AM65X_IOPAD(0x00c8, PIN_OUTPUT, 2) /* (AE15) PRG2_PRU1_GPO7.PRG2_MDIO0_MDC */ + >; + }; + + icssg2_rgmii_pins_default: icssg2-rgmii-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x00ac, PIN_INPUT, 2) /* (AH15) PRG2_PRU1_GPO0.PRG2_RGMII2_RD0 */ + AM65X_IOPAD(0x00b0, PIN_INPUT, 2) /* (AC16) PRG2_PRU1_GPO1.PRG2_RGMII2_RD1 */ + AM65X_IOPAD(0x00b4, PIN_INPUT, 2) /* (AD17) PRG2_PRU1_GPO2.PRG2_RGMII2_RD2 */ + AM65X_IOPAD(0x00b8, PIN_INPUT, 2) /* (AH14) PRG2_PRU1_GPO3.PRG2_RGMII2_RD3 */ + AM65X_IOPAD(0x00cc, PIN_OUTPUT, 2) /* (AD15) PRG2_PRU1_GPO8.PRG2_RGMII2_TD0 */ + AM65X_IOPAD(0x00d0, PIN_OUTPUT, 2) /* (AF14) PRG2_PRU1_GPO9.PRG2_RGMII2_TD1 */ + AM65X_IOPAD(0x00d4, PIN_OUTPUT, 2) /* (AC15) PRG2_PRU1_GPO10.PRG2_RGMII2_TD2 */ + AM65X_IOPAD(0x00d8, PIN_OUTPUT, 2) /* (AD14) PRG2_PRU1_GPO11.PRG2_RGMII2_TD3 */ + AM65X_IOPAD(0x00dc, PIN_INPUT, 2) /* (AE14) PRG2_PRU1_GPO16.PRG2_RGMII2_TXC */ + AM65X_IOPAD(0x00c4, PIN_OUTPUT, 2) /* (AC17) PRG2_PRU1_GPO6.PRG2_RGMII2_TX_CTL */ + AM65X_IOPAD(0x00c0, PIN_INPUT, 2) /* (AG15) PRG2_PRU1_GPO5.PRG2_RGMII2_RXC */ + AM65X_IOPAD(0x00bc, PIN_INPUT, 2) /* (AG14) PRG2_PRU1_GPO4.PRG2_RGMII2_RX_CTL */ + + AM65X_IOPAD(0x0078, PIN_INPUT, 2) /* (AF18) PRG2_PRU0_GPO0.PRG2_RGMII1_RD0 */ + AM65X_IOPAD(0x007c, PIN_INPUT, 2) /* (AE18) PRG2_PRU0_GPO1.PRG2_RGMII1_RD1 */ + AM65X_IOPAD(0x0080, PIN_INPUT, 2) /* (AH17) PRG2_PRU0_GPO2.PRG2_RGMII1_RD2 */ + AM65X_IOPAD(0x0084, PIN_INPUT, 2) /* (AG18) PRG2_PRU0_GPO3.PRG2_RGMII1_RD3 */ + AM65X_IOPAD(0x0098, PIN_OUTPUT, 2) /* (AH16) PRG2_PRU0_GPO8.PRG2_RGMII1_TD0 */ + AM65X_IOPAD(0x009c, PIN_OUTPUT, 2) /* (AG16) PRG2_PRU0_GPO9.PRG2_RGMII1_TD1 */ + AM65X_IOPAD(0x00a0, PIN_OUTPUT, 2) /* (AF16) PRG2_PRU0_GPO10.PRG2_RGMII1_TD2 */ + AM65X_IOPAD(0x00a4, PIN_OUTPUT, 2) /* (AE16) PRG2_PRU0_GPO11.PRG2_RGMII1_TD3 */ + AM65X_IOPAD(0x00a8, PIN_INPUT, 2) /* (AD16) PRG2_PRU0_GPO16.PRG2_RGMII1_TXC */ + AM65X_IOPAD(0x0090, PIN_OUTPUT, 2) /* (AE17) PRG2_PRU0_GPO6.PRG2_RGMII1_TX_CTL */ + AM65X_IOPAD(0x008c, PIN_INPUT, 2) /* (AF17) PRG2_PRU0_GPO5.PRG2_RGMII1_RXC */ + AM65X_IOPAD(0x0088, PIN_INPUT, 2) /* (AG17) PRG2_PRU0_GPO4.PRG2_RGMII1_RX_CTL */ + >; + }; +}; + +&icssg2_mdio { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&icssg2_mdio_pins_default>; + #address-cells = <1>; + #size-cells = <0>; + + icssg2_phy0: ethernet-phy@0 { + reg = <0>; + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; + }; + + icssg2_phy1: ethernet-phy@3 { + reg = <3>; + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; + }; +}; diff --git a/arch/arm/dts/k3-am65x-binman.dtsi b/arch/arm/dts/k3-am65x-binman.dtsi index 8cc24da1f3f..d0cd4889cde 100644 --- a/arch/arm/dts/k3-am65x-binman.dtsi +++ b/arch/arm/dts/k3-am65x-binman.dtsi @@ -98,6 +98,8 @@ #define SPL_AM654_EVM_DTB "spl/dts/k3-am654-base-board.dtb" #define AM654_EVM_DTB "u-boot.dtb" +#define AM654_EVM_ICSSG2_DTBO "arch/arm/dts/k3-am654-icssg2.dtbo" + &binman { ti-spl { insert-template = <&ti_spl_template>; @@ -124,6 +126,20 @@ filename = SPL_AM654_EVM_DTB; }; }; + + fdt-1 { + description = "k3-am654-icssg2 overlay"; + type = "flat_dt"; + arch = "arm"; + compression = "none"; + ti-secure { + content = <&spl_am65x_evm_icssg2_dtb>; + keyfile = "custMpk.pem"; + }; + spl_am65x_evm_icssg2_dtb: blob-ext { + filename = AM654_EVM_ICSSG2_DTBO; + }; + }; }; configurations { @@ -133,7 +149,7 @@ description = "k3-am654-base-board"; firmware = "atf"; loadables = "tee", "dm", "spl"; - fdt = "fdt-0"; + fdt = "fdt-0", "fdt-1"; }; }; }; @@ -168,6 +184,24 @@ }; }; + fdt-1 { + description = "k3-am654-icssg2 overlay"; + type = "flat_dt"; + arch = "arm"; + compression = "none"; + ti-secure { + content = <&am65x_evm_icssg2_dtb>; + keyfile = "custMpk.pem"; + + }; + am65x_evm_icssg2_dtb: blob-ext { + filename = AM654_EVM_ICSSG2_DTBO; + }; + hash { + algo = "crc32"; + }; + }; + }; configurations { @@ -177,7 +211,7 @@ description = "k3-am654-base-board"; firmware = "uboot"; loadables = "uboot"; - fdt = "fdt-0"; + fdt = "fdt-0", "fdt-1"; }; }; }; @@ -205,6 +239,16 @@ filename = SPL_AM654_EVM_DTB; }; }; + + fdt-1 { + description = "k3-am654-icssg2 overlay"; + type = "flat_dt"; + arch = "arm"; + compression = "none"; + blob { + filename = AM654_EVM_ICSSG2_DTBO; + }; + }; }; configurations { @@ -214,7 +258,7 @@ description = "k3-am654-base-board"; firmware = "atf"; loadables = "tee", "dm", "spl"; - fdt = "fdt-0"; + fdt = "fdt-0", "fdt-1"; }; }; }; @@ -243,6 +287,19 @@ algo = "crc32"; }; }; + + fdt-1 { + description = "k3-am654-icssg2"; + type = "flat_dt"; + arch = "arm"; + compression = "none"; + blob { + filename = AM654_EVM_ICSSG2_DTBO; + }; + hash { + algo = "crc32"; + }; + }; }; configurations { @@ -252,7 +309,7 @@ description = "k3-am654-base-board"; firmware = "uboot"; loadables = "uboot"; - fdt = "fdt-0"; + fdt = "fdt-0", "fdt-1"; }; }; }; diff --git a/arch/arm/dts/msm8916-pm8916.dtsi b/arch/arm/dts/msm8916-pm8916.dtsi deleted file mode 100644 index b1a7eafbee3..00000000000 --- a/arch/arm/dts/msm8916-pm8916.dtsi +++ /dev/null @@ -1,157 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * msm8916-pm8916.dtsi describes common properties (e.g. regulator connections) - * that apply to most devices that make use of the MSM8916 SoC and PM8916 PMIC. - * Many regulators have a fixed purpose in the original reference design and - * were rarely re-used for different purposes. Devices that deviate from the - * typical reference design should not make use of this include and instead add - * the necessary properties in the board-specific device tree. - */ - -#include "msm8916.dtsi" -#include "pm8916.dtsi" - -&camss { - vdda-supply = <&pm8916_l2>; -}; - -&mdss_dsi0 { - vdda-supply = <&pm8916_l2>; - vddio-supply = <&pm8916_l6>; -}; - -&mdss_dsi0_phy { - vddio-supply = <&pm8916_l6>; -}; - -&mpss { - pll-supply = <&pm8916_l7>; -}; - -&pm8916_codec { - vdd-cdc-io-supply = <&pm8916_l5>; - vdd-cdc-tx-rx-cx-supply = <&pm8916_l5>; - vdd-micbias-supply = <&pm8916_l13>; -}; - -&sdhc_1 { - vmmc-supply = <&pm8916_l8>; - vqmmc-supply = <&pm8916_l5>; -}; - -&sdhc_2 { - vmmc-supply = <&pm8916_l11>; - vqmmc-supply = <&pm8916_l12>; -}; - -&usb_hs_phy { - v1p8-supply = <&pm8916_l7>; - v3p3-supply = <&pm8916_l13>; -}; - -&wcnss { - vddpx-supply = <&pm8916_l7>; -}; - -&wcnss_iris { - vddxo-supply = <&pm8916_l7>; - vddrfa-supply = <&pm8916_s3>; - vddpa-supply = <&pm8916_l9>; - vdddig-supply = <&pm8916_l5>; -}; - -&rpm_requests { - pm8916_rpm_regulators: regulators { - compatible = "qcom,rpm-pm8916-regulators"; - vdd_l1_l2_l3-supply = <&pm8916_s3>; - vdd_l4_l5_l6-supply = <&pm8916_s4>; - vdd_l7-supply = <&pm8916_s4>; - - /* pm8916_s1 is managed by rpmpd (MSM8916_VDDCX) */ - - pm8916_s3: s3 { - regulator-min-microvolt = <1250000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; /* Needed for L2 */ - }; - - pm8916_s4: s4 { - regulator-min-microvolt = <1850000>; - regulator-max-microvolt = <2150000>; - regulator-always-on; /* Needed for L5/L7 */ - }; - - /* - * Some of the regulators are unused or managed by another - * processor (e.g. the modem). We should still define nodes for - * them to ensure the vote from the application processor can be - * dropped in case the regulators are already on during boot. - * - * The labels for these nodes are omitted on purpose because - * boards should configure a proper voltage before using them. - */ - l1 {}; - - pm8916_l2: l2 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; /* Needed for LPDDR RAM */ - }; - - /* pm8916_l3 is managed by rpmpd (MSM8916_VDDMX) */ - - l4 {}; - - pm8916_l5: l5 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; /* Needed for most digital I/O */ - }; - - pm8916_l6: l6 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - pm8916_l7: l7 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; /* Needed for CPU PLL */ - }; - - pm8916_l8: l8 { - regulator-min-microvolt = <2900000>; - regulator-max-microvolt = <2900000>; - }; - - pm8916_l9: l9 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - l10 {}; - - pm8916_l11: l11 { - regulator-min-microvolt = <2950000>; - regulator-max-microvolt = <2950000>; - regulator-allow-set-load; - regulator-system-load = <200000>; - }; - - pm8916_l12: l12 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2950000>; - }; - - pm8916_l13: l13 { - regulator-min-microvolt = <3075000>; - regulator-max-microvolt = <3075000>; - }; - - l14 {}; - l15 {}; - l16 {}; - l17 {}; - l18 {}; - }; -}; diff --git a/arch/arm/dts/msm8916.dtsi b/arch/arm/dts/msm8916.dtsi deleted file mode 100644 index 4f799b536a9..00000000000 --- a/arch/arm/dts/msm8916.dtsi +++ /dev/null @@ -1,2702 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. - */ - -#include <dt-bindings/arm/coresight-cti-dt.h> -#include <dt-bindings/clock/qcom,gcc-msm8916.h> -#include <dt-bindings/clock/qcom,rpmcc.h> -#include <dt-bindings/interconnect/qcom,msm8916.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/power/qcom-rpmpd.h> -#include <dt-bindings/reset/qcom,gcc-msm8916.h> -#include <dt-bindings/thermal/thermal.h> - -/ { - interrupt-parent = <&intc>; - - #address-cells = <2>; - #size-cells = <2>; - - chosen { }; - - memory@80000000 { - device_type = "memory"; - /* We expect the bootloader to fill in the reg */ - reg = <0 0x80000000 0 0>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - tz-apps@86000000 { - reg = <0x0 0x86000000 0x0 0x300000>; - no-map; - }; - - smem@86300000 { - compatible = "qcom,smem"; - reg = <0x0 0x86300000 0x0 0x100000>; - no-map; - - hwlocks = <&tcsr_mutex 3>; - qcom,rpm-msg-ram = <&rpm_msg_ram>; - }; - - hypervisor@86400000 { - reg = <0x0 0x86400000 0x0 0x100000>; - no-map; - }; - - tz@86500000 { - reg = <0x0 0x86500000 0x0 0x180000>; - no-map; - }; - - reserved@86680000 { - reg = <0x0 0x86680000 0x0 0x80000>; - no-map; - }; - - rmtfs@86700000 { - compatible = "qcom,rmtfs-mem"; - reg = <0x0 0x86700000 0x0 0xe0000>; - no-map; - - qcom,client-id = <1>; - }; - - rfsa@867e0000 { - reg = <0x0 0x867e0000 0x0 0x20000>; - no-map; - }; - - mpss_mem: mpss@86800000 { - /* - * The memory region for the mpss firmware is generally - * relocatable and could be allocated dynamically. - * However, many firmware versions tend to fail when - * loaded to some special addresses, so it is hard to - * define reliable alloc-ranges. - * - * alignment = <0x0 0x400000>; - * alloc-ranges = <0x0 0x86800000 0x0 0x8000000>; - */ - reg = <0x0 0x86800000 0x0 0>; /* size is device-specific */ - no-map; - status = "disabled"; - }; - - wcnss_mem: wcnss { - size = <0x0 0x600000>; - alignment = <0x0 0x100000>; - alloc-ranges = <0x0 0x86800000 0x0 0x8000000>; - no-map; - status = "disabled"; - }; - - venus_mem: venus { - size = <0x0 0x500000>; - alignment = <0x0 0x100000>; - alloc-ranges = <0x0 0x86800000 0x0 0x8000000>; - no-map; - status = "disabled"; - }; - - mba_mem: mba { - size = <0x0 0x100000>; - alignment = <0x0 0x100000>; - alloc-ranges = <0x0 0x86800000 0x0 0x8000000>; - no-map; - status = "disabled"; - }; - }; - - clocks { - xo_board: xo-board { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <19200000>; - }; - - sleep_clk: sleep-clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - }; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - CPU0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0>; - next-level-cache = <&L2_0>; - enable-method = "psci"; - clocks = <&apcs>; - operating-points-v2 = <&cpu_opp_table>; - #cooling-cells = <2>; - power-domains = <&CPU_PD0>; - power-domain-names = "psci"; - qcom,acc = <&cpu0_acc>; - qcom,saw = <&cpu0_saw>; - }; - - CPU1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x1>; - next-level-cache = <&L2_0>; - enable-method = "psci"; - clocks = <&apcs>; - operating-points-v2 = <&cpu_opp_table>; - #cooling-cells = <2>; - power-domains = <&CPU_PD1>; - power-domain-names = "psci"; - qcom,acc = <&cpu1_acc>; - qcom,saw = <&cpu1_saw>; - }; - - CPU2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x2>; - next-level-cache = <&L2_0>; - enable-method = "psci"; - clocks = <&apcs>; - operating-points-v2 = <&cpu_opp_table>; - #cooling-cells = <2>; - power-domains = <&CPU_PD2>; - power-domain-names = "psci"; - qcom,acc = <&cpu2_acc>; - qcom,saw = <&cpu2_saw>; - }; - - CPU3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x3>; - next-level-cache = <&L2_0>; - enable-method = "psci"; - clocks = <&apcs>; - operating-points-v2 = <&cpu_opp_table>; - #cooling-cells = <2>; - power-domains = <&CPU_PD3>; - power-domain-names = "psci"; - qcom,acc = <&cpu3_acc>; - qcom,saw = <&cpu3_saw>; - }; - - L2_0: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-unified; - }; - - idle-states { - entry-method = "psci"; - - CPU_SLEEP_0: cpu-sleep-0 { - compatible = "arm,idle-state"; - idle-state-name = "standalone-power-collapse"; - arm,psci-suspend-param = <0x40000002>; - entry-latency-us = <130>; - exit-latency-us = <150>; - min-residency-us = <2000>; - local-timer-stop; - }; - }; - - domain-idle-states { - - CLUSTER_RET: cluster-retention { - compatible = "domain-idle-state"; - arm,psci-suspend-param = <0x41000012>; - entry-latency-us = <500>; - exit-latency-us = <500>; - min-residency-us = <2000>; - }; - - CLUSTER_PWRDN: cluster-gdhs { - compatible = "domain-idle-state"; - arm,psci-suspend-param = <0x41000032>; - entry-latency-us = <2000>; - exit-latency-us = <2000>; - min-residency-us = <6000>; - }; - }; - }; - - cpu_opp_table: opp-table-cpu { - compatible = "operating-points-v2"; - opp-shared; - - opp-200000000 { - opp-hz = /bits/ 64 <200000000>; - }; - opp-400000000 { - opp-hz = /bits/ 64 <400000000>; - }; - opp-800000000 { - opp-hz = /bits/ 64 <800000000>; - }; - opp-998400000 { - opp-hz = /bits/ 64 <998400000>; - }; - }; - - firmware { - scm: scm { - compatible = "qcom,scm-msm8916", "qcom,scm"; - clocks = <&gcc GCC_CRYPTO_CLK>, - <&gcc GCC_CRYPTO_AXI_CLK>, - <&gcc GCC_CRYPTO_AHB_CLK>; - clock-names = "core", "bus", "iface"; - #reset-cells = <1>; - - qcom,dload-mode = <&tcsr 0x6100>; - }; - }; - - pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - - CPU_PD0: power-domain-cpu0 { - #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&CPU_SLEEP_0>; - }; - - CPU_PD1: power-domain-cpu1 { - #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&CPU_SLEEP_0>; - }; - - CPU_PD2: power-domain-cpu2 { - #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&CPU_SLEEP_0>; - }; - - CPU_PD3: power-domain-cpu3 { - #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&CPU_SLEEP_0>; - }; - - CLUSTER_PD: power-domain-cluster { - #power-domain-cells = <0>; - domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; - }; - }; - - rpm: remoteproc { - compatible = "qcom,msm8916-rpm-proc", "qcom,rpm-proc"; - - smd-edge { - interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>; - qcom,ipc = <&apcs 8 0>; - qcom,smd-edge = <15>; - - rpm_requests: rpm-requests { - compatible = "qcom,rpm-msm8916"; - qcom,smd-channels = "rpm_requests"; - - rpmcc: clock-controller { - compatible = "qcom,rpmcc-msm8916", "qcom,rpmcc"; - #clock-cells = <1>; - clocks = <&xo_board>; - clock-names = "xo"; - }; - - rpmpd: power-controller { - compatible = "qcom,msm8916-rpmpd"; - #power-domain-cells = <1>; - operating-points-v2 = <&rpmpd_opp_table>; - - rpmpd_opp_table: opp-table { - compatible = "operating-points-v2"; - - rpmpd_opp_ret: opp1 { - opp-level = <1>; - }; - rpmpd_opp_svs_krait: opp2 { - opp-level = <2>; - }; - rpmpd_opp_svs_soc: opp3 { - opp-level = <3>; - }; - rpmpd_opp_nom: opp4 { - opp-level = <4>; - }; - rpmpd_opp_turbo: opp5 { - opp-level = <5>; - }; - rpmpd_opp_super_turbo: opp6 { - opp-level = <6>; - }; - }; - }; - }; - }; - }; - - smp2p-hexagon { - compatible = "qcom,smp2p"; - qcom,smem = <435>, <428>; - - interrupts = <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>; - - qcom,ipc = <&apcs 8 14>; - - qcom,local-pid = <0>; - qcom,remote-pid = <1>; - - hexagon_smp2p_out: master-kernel { - qcom,entry-name = "master-kernel"; - - #qcom,smem-state-cells = <1>; - }; - - hexagon_smp2p_in: slave-kernel { - qcom,entry-name = "slave-kernel"; - - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - smp2p-wcnss { - compatible = "qcom,smp2p"; - qcom,smem = <451>, <431>; - - interrupts = <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>; - - qcom,ipc = <&apcs 8 18>; - - qcom,local-pid = <0>; - qcom,remote-pid = <4>; - - wcnss_smp2p_out: master-kernel { - qcom,entry-name = "master-kernel"; - - #qcom,smem-state-cells = <1>; - }; - - wcnss_smp2p_in: slave-kernel { - qcom,entry-name = "slave-kernel"; - - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - smsm { - compatible = "qcom,smsm"; - - #address-cells = <1>; - #size-cells = <0>; - - qcom,ipc-1 = <&apcs 8 13>; - qcom,ipc-3 = <&apcs 8 19>; - - apps_smsm: apps@0 { - reg = <0>; - - #qcom,smem-state-cells = <1>; - }; - - hexagon_smsm: hexagon@1 { - reg = <1>; - interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - wcnss_smsm: wcnss@6 { - reg = <6>; - interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - soc: soc@0 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0 0xffffffff>; - compatible = "simple-bus"; - - rng@22000 { - compatible = "qcom,prng"; - reg = <0x00022000 0x200>; - clocks = <&gcc GCC_PRNG_AHB_CLK>; - clock-names = "core"; - }; - - restart@4ab000 { - compatible = "qcom,pshold"; - reg = <0x004ab000 0x4>; - }; - - qfprom: qfprom@5c000 { - compatible = "qcom,msm8916-qfprom", "qcom,qfprom"; - reg = <0x0005c000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - - tsens_base1: base1@d0 { - reg = <0xd0 0x1>; - bits = <0 7>; - }; - - tsens_s0_p1: s0-p1@d0 { - reg = <0xd0 0x2>; - bits = <7 5>; - }; - - tsens_s0_p2: s0-p2@d1 { - reg = <0xd1 0x2>; - bits = <4 5>; - }; - - tsens_s1_p1: s1-p1@d2 { - reg = <0xd2 0x1>; - bits = <1 5>; - }; - tsens_s1_p2: s1-p2@d2 { - reg = <0xd2 0x2>; - bits = <6 5>; - }; - tsens_s2_p1: s2-p1@d3 { - reg = <0xd3 0x1>; - bits = <3 5>; - }; - - tsens_s2_p2: s2-p2@d4 { - reg = <0xd4 0x1>; - bits = <0 5>; - }; - - // no tsens with hw_id 3 - - tsens_s4_p1: s4-p1@d4 { - reg = <0xd4 0x2>; - bits = <5 5>; - }; - - tsens_s4_p2: s4-p2@d5 { - reg = <0xd5 0x1>; - bits = <2 5>; - }; - - tsens_s5_p1: s5-p1@d5 { - reg = <0xd5 0x2>; - bits = <7 5>; - }; - - tsens_s5_p2: s5-p2@d6 { - reg = <0xd6 0x2>; - bits = <4 5>; - }; - - tsens_base2: base2@d7 { - reg = <0xd7 0x1>; - bits = <1 7>; - }; - - tsens_mode: mode@ef { - reg = <0xef 0x1>; - bits = <5 3>; - }; - }; - - rpm_msg_ram: sram@60000 { - compatible = "qcom,rpm-msg-ram"; - reg = <0x00060000 0x8000>; - }; - - sram@290000 { - compatible = "qcom,msm8916-rpm-stats"; - reg = <0x00290000 0x10000>; - }; - - bimc: interconnect@400000 { - compatible = "qcom,msm8916-bimc"; - reg = <0x00400000 0x62000>; - #interconnect-cells = <1>; - clock-names = "bus", "bus_a"; - clocks = <&rpmcc RPM_SMD_BIMC_CLK>, - <&rpmcc RPM_SMD_BIMC_A_CLK>; - }; - - tsens: thermal-sensor@4a9000 { - compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1"; - reg = <0x004a9000 0x1000>, /* TM */ - <0x004a8000 0x1000>; /* SROT */ - - // no hw_id 3 - nvmem-cells = <&tsens_mode>, - <&tsens_base1>, <&tsens_base2>, - <&tsens_s0_p1>, <&tsens_s0_p2>, - <&tsens_s1_p1>, <&tsens_s1_p2>, - <&tsens_s2_p1>, <&tsens_s2_p2>, - <&tsens_s4_p1>, <&tsens_s4_p2>, - <&tsens_s5_p1>, <&tsens_s5_p2>; - nvmem-cell-names = "mode", - "base1", "base2", - "s0_p1", "s0_p2", - "s1_p1", "s1_p2", - "s2_p1", "s2_p2", - "s4_p1", "s4_p2", - "s5_p1", "s5_p2"; - #qcom,sensors = <5>; - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "uplow"; - #thermal-sensor-cells = <1>; - }; - - pcnoc: interconnect@500000 { - compatible = "qcom,msm8916-pcnoc"; - reg = <0x00500000 0x11000>; - #interconnect-cells = <1>; - clock-names = "bus", "bus_a"; - clocks = <&rpmcc RPM_SMD_PCNOC_CLK>, - <&rpmcc RPM_SMD_PCNOC_A_CLK>; - }; - - snoc: interconnect@580000 { - compatible = "qcom,msm8916-snoc"; - reg = <0x00580000 0x14000>; - #interconnect-cells = <1>; - clock-names = "bus", "bus_a"; - clocks = <&rpmcc RPM_SMD_SNOC_CLK>, - <&rpmcc RPM_SMD_SNOC_A_CLK>; - }; - - stm: stm@802000 { - compatible = "arm,coresight-stm", "arm,primecell"; - reg = <0x00802000 0x1000>, - <0x09280000 0x180000>; - reg-names = "stm-base", "stm-stimulus-base"; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - status = "disabled"; - - out-ports { - port { - stm_out: endpoint { - remote-endpoint = <&funnel0_in7>; - }; - }; - }; - }; - - /* System CTIs */ - /* CTI 0 - TMC connections */ - cti0: cti@810000 { - compatible = "arm,coresight-cti", "arm,primecell"; - reg = <0x00810000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>; - clock-names = "apb_pclk"; - - status = "disabled"; - }; - - /* CTI 1 - TPIU connections */ - cti1: cti@811000 { - compatible = "arm,coresight-cti", "arm,primecell"; - reg = <0x00811000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>; - clock-names = "apb_pclk"; - - status = "disabled"; - }; - - /* CTIs 2-11 - no information - not instantiated */ - - tpiu: tpiu@820000 { - compatible = "arm,coresight-tpiu", "arm,primecell"; - reg = <0x00820000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - status = "disabled"; - - in-ports { - port { - tpiu_in: endpoint { - remote-endpoint = <&replicator_out1>; - }; - }; - }; - }; - - funnel0: funnel@821000 { - compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; - reg = <0x00821000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - status = "disabled"; - - in-ports { - #address-cells = <1>; - #size-cells = <0>; - - /* - * Not described input ports: - * 0 - connected to Resource and Power Manger CPU ETM - * 1 - not-connected - * 2 - connected to Modem CPU ETM - * 3 - not-connected - * 5 - not-connected - * 6 - connected trought funnel to Wireless CPU ETM - * 7 - connected to STM component - */ - - port@4 { - reg = <4>; - funnel0_in4: endpoint { - remote-endpoint = <&funnel1_out>; - }; - }; - - port@7 { - reg = <7>; - funnel0_in7: endpoint { - remote-endpoint = <&stm_out>; - }; - }; - }; - - out-ports { - port { - funnel0_out: endpoint { - remote-endpoint = <&etf_in>; - }; - }; - }; - }; - - replicator: replicator@824000 { - compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; - reg = <0x00824000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - status = "disabled"; - - out-ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - replicator_out0: endpoint { - remote-endpoint = <&etr_in>; - }; - }; - port@1 { - reg = <1>; - replicator_out1: endpoint { - remote-endpoint = <&tpiu_in>; - }; - }; - }; - - in-ports { - port { - replicator_in: endpoint { - remote-endpoint = <&etf_out>; - }; - }; - }; - }; - - etf: etf@825000 { - compatible = "arm,coresight-tmc", "arm,primecell"; - reg = <0x00825000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - status = "disabled"; - - in-ports { - port { - etf_in: endpoint { - remote-endpoint = <&funnel0_out>; - }; - }; - }; - - out-ports { - port { - etf_out: endpoint { - remote-endpoint = <&replicator_in>; - }; - }; - }; - }; - - etr: etr@826000 { - compatible = "arm,coresight-tmc", "arm,primecell"; - reg = <0x00826000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - status = "disabled"; - - in-ports { - port { - etr_in: endpoint { - remote-endpoint = <&replicator_out0>; - }; - }; - }; - }; - - funnel1: funnel@841000 { /* APSS funnel only 4 inputs are used */ - compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; - reg = <0x00841000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - status = "disabled"; - - in-ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - funnel1_in0: endpoint { - remote-endpoint = <&etm0_out>; - }; - }; - port@1 { - reg = <1>; - funnel1_in1: endpoint { - remote-endpoint = <&etm1_out>; - }; - }; - port@2 { - reg = <2>; - funnel1_in2: endpoint { - remote-endpoint = <&etm2_out>; - }; - }; - port@3 { - reg = <3>; - funnel1_in3: endpoint { - remote-endpoint = <&etm3_out>; - }; - }; - }; - - out-ports { - port { - funnel1_out: endpoint { - remote-endpoint = <&funnel0_in4>; - }; - }; - }; - }; - - debug0: debug@850000 { - compatible = "arm,coresight-cpu-debug", "arm,primecell"; - reg = <0x00850000 0x1000>; - clocks = <&rpmcc RPM_QDSS_CLK>; - clock-names = "apb_pclk"; - cpu = <&CPU0>; - status = "disabled"; - }; - - debug1: debug@852000 { - compatible = "arm,coresight-cpu-debug", "arm,primecell"; - reg = <0x00852000 0x1000>; - clocks = <&rpmcc RPM_QDSS_CLK>; - clock-names = "apb_pclk"; - cpu = <&CPU1>; - status = "disabled"; - }; - - debug2: debug@854000 { - compatible = "arm,coresight-cpu-debug", "arm,primecell"; - reg = <0x00854000 0x1000>; - clocks = <&rpmcc RPM_QDSS_CLK>; - clock-names = "apb_pclk"; - cpu = <&CPU2>; - status = "disabled"; - }; - - debug3: debug@856000 { - compatible = "arm,coresight-cpu-debug", "arm,primecell"; - reg = <0x00856000 0x1000>; - clocks = <&rpmcc RPM_QDSS_CLK>; - clock-names = "apb_pclk"; - cpu = <&CPU3>; - status = "disabled"; - }; - - /* Core CTIs; CTIs 12-15 */ - /* CTI - CPU-0 */ - cti12: cti@858000 { - compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", - "arm,primecell"; - reg = <0x00858000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>; - clock-names = "apb_pclk"; - - cpu = <&CPU0>; - arm,cs-dev-assoc = <&etm0>; - - status = "disabled"; - }; - - /* CTI - CPU-1 */ - cti13: cti@859000 { - compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", - "arm,primecell"; - reg = <0x00859000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>; - clock-names = "apb_pclk"; - - cpu = <&CPU1>; - arm,cs-dev-assoc = <&etm1>; - - status = "disabled"; - }; - - /* CTI - CPU-2 */ - cti14: cti@85a000 { - compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", - "arm,primecell"; - reg = <0x0085a000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>; - clock-names = "apb_pclk"; - - cpu = <&CPU2>; - arm,cs-dev-assoc = <&etm2>; - - status = "disabled"; - }; - - /* CTI - CPU-3 */ - cti15: cti@85b000 { - compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", - "arm,primecell"; - reg = <0x0085b000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>; - clock-names = "apb_pclk"; - - cpu = <&CPU3>; - arm,cs-dev-assoc = <&etm3>; - - status = "disabled"; - }; - - etm0: etm@85c000 { - compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0x0085c000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - arm,coresight-loses-context-with-cpu; - - cpu = <&CPU0>; - - status = "disabled"; - - out-ports { - port { - etm0_out: endpoint { - remote-endpoint = <&funnel1_in0>; - }; - }; - }; - }; - - etm1: etm@85d000 { - compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0x0085d000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - arm,coresight-loses-context-with-cpu; - - cpu = <&CPU1>; - - status = "disabled"; - - out-ports { - port { - etm1_out: endpoint { - remote-endpoint = <&funnel1_in1>; - }; - }; - }; - }; - - etm2: etm@85e000 { - compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0x0085e000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - arm,coresight-loses-context-with-cpu; - - cpu = <&CPU2>; - - status = "disabled"; - - out-ports { - port { - etm2_out: endpoint { - remote-endpoint = <&funnel1_in2>; - }; - }; - }; - }; - - etm3: etm@85f000 { - compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0x0085f000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - arm,coresight-loses-context-with-cpu; - - cpu = <&CPU3>; - - status = "disabled"; - - out-ports { - port { - etm3_out: endpoint { - remote-endpoint = <&funnel1_in3>; - }; - }; - }; - }; - - tlmm: pinctrl@1000000 { - compatible = "qcom,msm8916-pinctrl"; - reg = <0x01000000 0x300000>; - interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - gpio-ranges = <&tlmm 0 0 122>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - - blsp_i2c1_default: blsp-i2c1-default-state { - pins = "gpio2", "gpio3"; - function = "blsp_i2c1"; - drive-strength = <2>; - bias-disable; - }; - - blsp_i2c1_sleep: blsp-i2c1-sleep-state { - pins = "gpio2", "gpio3"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - blsp_i2c2_default: blsp-i2c2-default-state { - pins = "gpio6", "gpio7"; - function = "blsp_i2c2"; - drive-strength = <2>; - bias-disable; - }; - - blsp_i2c2_sleep: blsp-i2c2-sleep-state { - pins = "gpio6", "gpio7"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - blsp_i2c3_default: blsp-i2c3-default-state { - pins = "gpio10", "gpio11"; - function = "blsp_i2c3"; - drive-strength = <2>; - bias-disable; - }; - - blsp_i2c3_sleep: blsp-i2c3-sleep-state { - pins = "gpio10", "gpio11"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - blsp_i2c4_default: blsp-i2c4-default-state { - pins = "gpio14", "gpio15"; - function = "blsp_i2c4"; - drive-strength = <2>; - bias-disable; - }; - - blsp_i2c4_sleep: blsp-i2c4-sleep-state { - pins = "gpio14", "gpio15"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - blsp_i2c5_default: blsp-i2c5-default-state { - pins = "gpio18", "gpio19"; - function = "blsp_i2c5"; - drive-strength = <2>; - bias-disable; - }; - - blsp_i2c5_sleep: blsp-i2c5-sleep-state { - pins = "gpio18", "gpio19"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - blsp_i2c6_default: blsp-i2c6-default-state { - pins = "gpio22", "gpio23"; - function = "blsp_i2c6"; - drive-strength = <2>; - bias-disable; - }; - - blsp_i2c6_sleep: blsp-i2c6-sleep-state { - pins = "gpio22", "gpio23"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - blsp_spi1_default: blsp-spi1-default-state { - spi-pins { - pins = "gpio0", "gpio1", "gpio3"; - function = "blsp_spi1"; - drive-strength = <12>; - bias-disable; - }; - cs-pins { - pins = "gpio2"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - output-high; - }; - }; - - blsp_spi1_sleep: blsp-spi1-sleep-state { - pins = "gpio0", "gpio1", "gpio2", "gpio3"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - blsp_spi2_default: blsp-spi2-default-state { - spi-pins { - pins = "gpio4", "gpio5", "gpio7"; - function = "blsp_spi2"; - drive-strength = <12>; - bias-disable; - }; - cs-pins { - pins = "gpio6"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - output-high; - }; - }; - - blsp_spi2_sleep: blsp-spi2-sleep-state { - pins = "gpio4", "gpio5", "gpio6", "gpio7"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - blsp_spi3_default: blsp-spi3-default-state { - spi-pins { - pins = "gpio8", "gpio9", "gpio11"; - function = "blsp_spi3"; - drive-strength = <12>; - bias-disable; - }; - cs-pins { - pins = "gpio10"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - output-high; - }; - }; - - blsp_spi3_sleep: blsp-spi3-sleep-state { - pins = "gpio8", "gpio9", "gpio10", "gpio11"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - blsp_spi4_default: blsp-spi4-default-state { - spi-pins { - pins = "gpio12", "gpio13", "gpio15"; - function = "blsp_spi4"; - drive-strength = <12>; - bias-disable; - }; - cs-pins { - pins = "gpio14"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - output-high; - }; - }; - - blsp_spi4_sleep: blsp-spi4-sleep-state { - pins = "gpio12", "gpio13", "gpio14", "gpio15"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - blsp_spi5_default: blsp-spi5-default-state { - spi-pins { - pins = "gpio16", "gpio17", "gpio19"; - function = "blsp_spi5"; - drive-strength = <12>; - bias-disable; - }; - cs-pins { - pins = "gpio18"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - output-high; - }; - }; - - blsp_spi5_sleep: blsp-spi5-sleep-state { - pins = "gpio16", "gpio17", "gpio18", "gpio19"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - blsp_spi6_default: blsp-spi6-default-state { - spi-pins { - pins = "gpio20", "gpio21", "gpio23"; - function = "blsp_spi6"; - drive-strength = <12>; - bias-disable; - }; - cs-pins { - pins = "gpio22"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - output-high; - }; - }; - - blsp_spi6_sleep: blsp-spi6-sleep-state { - pins = "gpio20", "gpio21", "gpio22", "gpio23"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - blsp_uart1_default: blsp-uart1-default-state { - /* TX, RX, CTS_N, RTS_N */ - pins = "gpio0", "gpio1", "gpio2", "gpio3"; - function = "blsp_uart1"; - drive-strength = <16>; - bias-disable; - }; - - blsp_uart1_sleep: blsp-uart1-sleep-state { - pins = "gpio0", "gpio1", "gpio2", "gpio3"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - blsp_uart2_default: blsp-uart2-default-state { - pins = "gpio4", "gpio5"; - function = "blsp_uart2"; - drive-strength = <16>; - bias-disable; - }; - - blsp_uart2_sleep: blsp-uart2-sleep-state { - pins = "gpio4", "gpio5"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - camera_front_default: camera-front-default-state { - pwdn-pins { - pins = "gpio33"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - }; - rst-pins { - pins = "gpio28"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - }; - mclk1-pins { - pins = "gpio27"; - function = "cam_mclk1"; - drive-strength = <16>; - bias-disable; - }; - }; - - camera_rear_default: camera-rear-default-state { - pwdn-pins { - pins = "gpio34"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - }; - rst-pins { - pins = "gpio35"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - }; - mclk0-pins { - pins = "gpio26"; - function = "cam_mclk0"; - drive-strength = <16>; - bias-disable; - }; - }; - - cci0_default: cci0-default-state { - pins = "gpio29", "gpio30"; - function = "cci_i2c"; - drive-strength = <16>; - bias-disable; - }; - - cdc_dmic_default: cdc-dmic-default-state { - clk-pins { - pins = "gpio0"; - function = "dmic0_clk"; - drive-strength = <8>; - }; - data-pins { - pins = "gpio1"; - function = "dmic0_data"; - drive-strength = <8>; - }; - }; - - cdc_dmic_sleep: cdc-dmic-sleep-state { - clk-pins { - pins = "gpio0"; - function = "dmic0_clk"; - drive-strength = <2>; - bias-disable; - }; - data-pins { - pins = "gpio1"; - function = "dmic0_data"; - drive-strength = <2>; - bias-disable; - }; - }; - - cdc_pdm_default: cdc-pdm-default-state { - pins = "gpio63", "gpio64", "gpio65", "gpio66", - "gpio67", "gpio68"; - function = "cdc_pdm0"; - drive-strength = <8>; - bias-disable; - }; - - cdc_pdm_sleep: cdc-pdm-sleep-state { - pins = "gpio63", "gpio64", "gpio65", "gpio66", - "gpio67", "gpio68"; - function = "cdc_pdm0"; - drive-strength = <2>; - bias-pull-down; - }; - - pri_mi2s_default: mi2s-pri-default-state { - pins = "gpio113", "gpio114", "gpio115", "gpio116"; - function = "pri_mi2s"; - drive-strength = <8>; - bias-disable; - }; - - pri_mi2s_sleep: mi2s-pri-sleep-state { - pins = "gpio113", "gpio114", "gpio115", "gpio116"; - function = "pri_mi2s"; - drive-strength = <2>; - bias-disable; - }; - - pri_mi2s_mclk_default: mi2s-pri-mclk-default-state { - pins = "gpio116"; - function = "pri_mi2s"; - drive-strength = <8>; - bias-disable; - }; - - pri_mi2s_mclk_sleep: mi2s-pri-mclk-sleep-state { - pins = "gpio116"; - function = "pri_mi2s"; - drive-strength = <2>; - bias-disable; - }; - - pri_mi2s_ws_default: mi2s-pri-ws-default-state { - pins = "gpio110"; - function = "pri_mi2s_ws"; - drive-strength = <8>; - bias-disable; - }; - - pri_mi2s_ws_sleep: mi2s-pri-ws-sleep-state { - pins = "gpio110"; - function = "pri_mi2s_ws"; - drive-strength = <2>; - bias-disable; - }; - - sec_mi2s_default: mi2s-sec-default-state { - pins = "gpio112", "gpio117", "gpio118", "gpio119"; - function = "sec_mi2s"; - drive-strength = <8>; - bias-disable; - }; - - sec_mi2s_sleep: mi2s-sec-sleep-state { - pins = "gpio112", "gpio117", "gpio118", "gpio119"; - function = "sec_mi2s"; - drive-strength = <2>; - bias-disable; - }; - - sdc1_default: sdc1-default-state { - clk-pins { - pins = "sdc1_clk"; - bias-disable; - drive-strength = <16>; - }; - cmd-pins { - pins = "sdc1_cmd"; - bias-pull-up; - drive-strength = <10>; - }; - data-pins { - pins = "sdc1_data"; - bias-pull-up; - drive-strength = <10>; - }; - }; - - sdc1_sleep: sdc1-sleep-state { - clk-pins { - pins = "sdc1_clk"; - bias-disable; - drive-strength = <2>; - }; - cmd-pins { - pins = "sdc1_cmd"; - bias-pull-up; - drive-strength = <2>; - }; - data-pins { - pins = "sdc1_data"; - bias-pull-up; - drive-strength = <2>; - }; - }; - - sdc2_default: sdc2-default-state { - clk-pins { - pins = "sdc2_clk"; - bias-disable; - drive-strength = <16>; - }; - cmd-pins { - pins = "sdc2_cmd"; - bias-pull-up; - drive-strength = <10>; - }; - data-pins { - pins = "sdc2_data"; - bias-pull-up; - drive-strength = <10>; - }; - }; - - sdc2_sleep: sdc2-sleep-state { - clk-pins { - pins = "sdc2_clk"; - bias-disable; - drive-strength = <2>; - }; - cmd-pins { - pins = "sdc2_cmd"; - bias-pull-up; - drive-strength = <2>; - }; - data-pins { - pins = "sdc2_data"; - bias-pull-up; - drive-strength = <2>; - }; - }; - - wcss_wlan_default: wcss-wlan-default-state { - pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44"; - function = "wcss_wlan"; - drive-strength = <6>; - bias-pull-up; - }; - }; - - gcc: clock-controller@1800000 { - compatible = "qcom,gcc-msm8916"; - #clock-cells = <1>; - #reset-cells = <1>; - #power-domain-cells = <1>; - reg = <0x01800000 0x80000>; - clocks = <&xo_board>, - <&sleep_clk>, - <&mdss_dsi0_phy 1>, - <&mdss_dsi0_phy 0>, - <0>, - <0>, - <0>; - clock-names = "xo", - "sleep_clk", - "dsi0pll", - "dsi0pllbyte", - "ext_mclk", - "ext_pri_i2s", - "ext_sec_i2s"; - }; - - tcsr_mutex: hwlock@1905000 { - compatible = "qcom,tcsr-mutex"; - reg = <0x01905000 0x20000>; - #hwlock-cells = <1>; - }; - - tcsr: syscon@1937000 { - compatible = "qcom,tcsr-msm8916", "syscon"; - reg = <0x01937000 0x30000>; - }; - - mdss: display-subsystem@1a00000 { - status = "disabled"; - compatible = "qcom,mdss"; - reg = <0x01a00000 0x1000>, - <0x01ac8000 0x3000>; - reg-names = "mdss_phys", "vbif_phys"; - - power-domains = <&gcc MDSS_GDSC>; - - clocks = <&gcc GCC_MDSS_AHB_CLK>, - <&gcc GCC_MDSS_AXI_CLK>, - <&gcc GCC_MDSS_VSYNC_CLK>; - clock-names = "iface", - "bus", - "vsync"; - - interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; - - interrupt-controller; - #interrupt-cells = <1>; - - #address-cells = <1>; - #size-cells = <1>; - ranges; - - mdss_mdp: display-controller@1a01000 { - compatible = "qcom,msm8916-mdp5", "qcom,mdp5"; - reg = <0x01a01000 0x89000>; - reg-names = "mdp_phys"; - - interrupt-parent = <&mdss>; - interrupts = <0>; - - clocks = <&gcc GCC_MDSS_AHB_CLK>, - <&gcc GCC_MDSS_AXI_CLK>, - <&gcc GCC_MDSS_MDP_CLK>, - <&gcc GCC_MDSS_VSYNC_CLK>; - clock-names = "iface", - "bus", - "core", - "vsync"; - - iommus = <&apps_iommu 4>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - mdss_mdp_intf1_out: endpoint { - remote-endpoint = <&mdss_dsi0_in>; - }; - }; - }; - }; - - mdss_dsi0: dsi@1a98000 { - compatible = "qcom,msm8916-dsi-ctrl", - "qcom,mdss-dsi-ctrl"; - reg = <0x01a98000 0x25c>; - reg-names = "dsi_ctrl"; - - interrupt-parent = <&mdss>; - interrupts = <4>; - - assigned-clocks = <&gcc BYTE0_CLK_SRC>, - <&gcc PCLK0_CLK_SRC>; - assigned-clock-parents = <&mdss_dsi0_phy 0>, - <&mdss_dsi0_phy 1>; - - clocks = <&gcc GCC_MDSS_MDP_CLK>, - <&gcc GCC_MDSS_AHB_CLK>, - <&gcc GCC_MDSS_AXI_CLK>, - <&gcc GCC_MDSS_BYTE0_CLK>, - <&gcc GCC_MDSS_PCLK0_CLK>, - <&gcc GCC_MDSS_ESC0_CLK>; - clock-names = "mdp_core", - "iface", - "bus", - "byte", - "pixel", - "core"; - phys = <&mdss_dsi0_phy>; - - #address-cells = <1>; - #size-cells = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - mdss_dsi0_in: endpoint { - remote-endpoint = <&mdss_mdp_intf1_out>; - }; - }; - - port@1 { - reg = <1>; - mdss_dsi0_out: endpoint { - }; - }; - }; - }; - - mdss_dsi0_phy: phy@1a98300 { - compatible = "qcom,dsi-phy-28nm-lp"; - reg = <0x01a98300 0xd4>, - <0x01a98500 0x280>, - <0x01a98780 0x30>; - reg-names = "dsi_pll", - "dsi_phy", - "dsi_phy_regulator"; - - #clock-cells = <1>; - #phy-cells = <0>; - - clocks = <&gcc GCC_MDSS_AHB_CLK>, - <&xo_board>; - clock-names = "iface", "ref"; - }; - }; - - camss: camss@1b0ac00 { - compatible = "qcom,msm8916-camss"; - reg = <0x01b0ac00 0x200>, - <0x01b00030 0x4>, - <0x01b0b000 0x200>, - <0x01b00038 0x4>, - <0x01b08000 0x100>, - <0x01b08400 0x100>, - <0x01b0a000 0x500>, - <0x01b00020 0x10>, - <0x01b10000 0x1000>; - reg-names = "csiphy0", - "csiphy0_clk_mux", - "csiphy1", - "csiphy1_clk_mux", - "csid0", - "csid1", - "ispif", - "csi_clk_mux", - "vfe0"; - interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "csiphy0", - "csiphy1", - "csid0", - "csid1", - "ispif", - "vfe0"; - power-domains = <&gcc VFE_GDSC>; - clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, - <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, - <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, - <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, - <&gcc GCC_CAMSS_CSI0_AHB_CLK>, - <&gcc GCC_CAMSS_CSI0_CLK>, - <&gcc GCC_CAMSS_CSI0PHY_CLK>, - <&gcc GCC_CAMSS_CSI0PIX_CLK>, - <&gcc GCC_CAMSS_CSI0RDI_CLK>, - <&gcc GCC_CAMSS_CSI1_AHB_CLK>, - <&gcc GCC_CAMSS_CSI1_CLK>, - <&gcc GCC_CAMSS_CSI1PHY_CLK>, - <&gcc GCC_CAMSS_CSI1PIX_CLK>, - <&gcc GCC_CAMSS_CSI1RDI_CLK>, - <&gcc GCC_CAMSS_AHB_CLK>, - <&gcc GCC_CAMSS_VFE0_CLK>, - <&gcc GCC_CAMSS_CSI_VFE0_CLK>, - <&gcc GCC_CAMSS_VFE_AHB_CLK>, - <&gcc GCC_CAMSS_VFE_AXI_CLK>; - clock-names = "top_ahb", - "ispif_ahb", - "csiphy0_timer", - "csiphy1_timer", - "csi0_ahb", - "csi0", - "csi0_phy", - "csi0_pix", - "csi0_rdi", - "csi1_ahb", - "csi1", - "csi1_phy", - "csi1_pix", - "csi1_rdi", - "ahb", - "vfe0", - "csi_vfe0", - "vfe_ahb", - "vfe_axi"; - iommus = <&apps_iommu 3>; - status = "disabled"; - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - reg = <1>; - }; - }; - }; - - cci: cci@1b0c000 { - compatible = "qcom,msm8916-cci", "qcom,msm8226-cci"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x01b0c000 0x1000>; - interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>; - clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, - <&gcc GCC_CAMSS_CCI_AHB_CLK>, - <&gcc GCC_CAMSS_CCI_CLK>, - <&gcc GCC_CAMSS_AHB_CLK>; - clock-names = "camss_top_ahb", "cci_ahb", - "cci", "camss_ahb"; - assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>, - <&gcc GCC_CAMSS_CCI_CLK>; - assigned-clock-rates = <80000000>, <19200000>; - pinctrl-names = "default"; - pinctrl-0 = <&cci0_default>; - status = "disabled"; - - cci_i2c0: i2c-bus@0 { - reg = <0>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - gpu: gpu@1c00000 { - compatible = "qcom,adreno-306.0", "qcom,adreno"; - reg = <0x01c00000 0x20000>; - reg-names = "kgsl_3d0_reg_memory"; - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "kgsl_3d0_irq"; - clock-names = - "core", - "iface", - "mem", - "mem_iface", - "alt_mem_iface", - "gfx3d"; - clocks = - <&gcc GCC_OXILI_GFX3D_CLK>, - <&gcc GCC_OXILI_AHB_CLK>, - <&gcc GCC_OXILI_GMEM_CLK>, - <&gcc GCC_BIMC_GFX_CLK>, - <&gcc GCC_BIMC_GPU_CLK>, - <&gcc GFX3D_CLK_SRC>; - power-domains = <&gcc OXILI_GDSC>; - operating-points-v2 = <&gpu_opp_table>; - iommus = <&gpu_iommu 1>, <&gpu_iommu 2>; - status = "disabled"; - - gpu_opp_table: opp-table { - compatible = "operating-points-v2"; - - opp-400000000 { - opp-hz = /bits/ 64 <400000000>; - }; - opp-19200000 { - opp-hz = /bits/ 64 <19200000>; - }; - }; - }; - - venus: video-codec@1d00000 { - compatible = "qcom,msm8916-venus"; - reg = <0x01d00000 0xff000>; - interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&gcc VENUS_GDSC>; - clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>, - <&gcc GCC_VENUS0_AHB_CLK>, - <&gcc GCC_VENUS0_AXI_CLK>; - clock-names = "core", "iface", "bus"; - iommus = <&apps_iommu 5>; - memory-region = <&venus_mem>; - status = "disabled"; - - video-decoder { - compatible = "venus-decoder"; - }; - - video-encoder { - compatible = "venus-encoder"; - }; - }; - - apps_iommu: iommu@1ef0000 { - #address-cells = <1>; - #size-cells = <1>; - #iommu-cells = <1>; - compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1"; - ranges = <0 0x01e20000 0x20000>; - reg = <0x01ef0000 0x3000>; - clocks = <&gcc GCC_SMMU_CFG_CLK>, - <&gcc GCC_APSS_TCU_CLK>; - clock-names = "iface", "bus"; - qcom,iommu-secure-id = <17>; - - /* VFE */ - iommu-ctx@3000 { - compatible = "qcom,msm-iommu-v1-sec"; - reg = <0x3000 0x1000>; - interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; - }; - - /* MDP_0 */ - iommu-ctx@4000 { - compatible = "qcom,msm-iommu-v1-ns"; - reg = <0x4000 0x1000>; - interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; - }; - - /* VENUS_NS */ - iommu-ctx@5000 { - compatible = "qcom,msm-iommu-v1-sec"; - reg = <0x5000 0x1000>; - interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - - gpu_iommu: iommu@1f08000 { - #address-cells = <1>; - #size-cells = <1>; - #iommu-cells = <1>; - compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1"; - ranges = <0 0x01f08000 0x10000>; - clocks = <&gcc GCC_SMMU_CFG_CLK>, - <&gcc GCC_GFX_TCU_CLK>; - clock-names = "iface", "bus"; - qcom,iommu-secure-id = <18>; - - /* GFX3D_USER */ - iommu-ctx@1000 { - compatible = "qcom,msm-iommu-v1-ns"; - reg = <0x1000 0x1000>; - interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; - }; - - /* GFX3D_PRIV */ - iommu-ctx@2000 { - compatible = "qcom,msm-iommu-v1-ns"; - reg = <0x2000 0x1000>; - interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - - spmi_bus: spmi@200f000 { - compatible = "qcom,spmi-pmic-arb"; - reg = <0x0200f000 0x001000>, - <0x02400000 0x400000>, - <0x02c00000 0x400000>, - <0x03800000 0x200000>, - <0x0200a000 0x002100>; - reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; - interrupt-names = "periph_irq"; - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; - qcom,ee = <0>; - qcom,channel = <0>; - #address-cells = <2>; - #size-cells = <0>; - interrupt-controller; - #interrupt-cells = <4>; - }; - - bam_dmux_dma: dma-controller@4044000 { - compatible = "qcom,bam-v1.7.0"; - reg = <0x04044000 0x19000>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; - #dma-cells = <1>; - qcom,ee = <0>; - - num-channels = <6>; - qcom,num-ees = <1>; - qcom,powered-remotely; - - status = "disabled"; - }; - - mpss: remoteproc@4080000 { - compatible = "qcom,msm8916-mss-pil"; - reg = <0x04080000 0x100>, - <0x04020000 0x040>; - - reg-names = "qdsp6", "rmb"; - - interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>, - <&hexagon_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, - <&hexagon_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, - <&hexagon_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, - <&hexagon_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", - "handover", "stop-ack"; - - power-domains = <&rpmpd MSM8916_VDDCX>, - <&rpmpd MSM8916_VDDMX>; - power-domain-names = "cx", "mx"; - - clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, - <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>, - <&gcc GCC_BOOT_ROM_AHB_CLK>, - <&xo_board>; - clock-names = "iface", "bus", "mem", "xo"; - - qcom,smem-states = <&hexagon_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - resets = <&scm 0>; - reset-names = "mss_restart"; - - qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>; - - status = "disabled"; - - mba { - memory-region = <&mba_mem>; - }; - - mpss { - memory-region = <&mpss_mem>; - }; - - bam_dmux: bam-dmux { - compatible = "qcom,bam-dmux"; - - interrupt-parent = <&hexagon_smsm>; - interrupts = <1 IRQ_TYPE_EDGE_BOTH>, <11 IRQ_TYPE_EDGE_BOTH>; - interrupt-names = "pc", "pc-ack"; - - qcom,smem-states = <&apps_smsm 1>, <&apps_smsm 11>; - qcom,smem-state-names = "pc", "pc-ack"; - - dmas = <&bam_dmux_dma 4>, <&bam_dmux_dma 5>; - dma-names = "tx", "rx"; - - status = "disabled"; - }; - - smd-edge { - interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>; - - qcom,smd-edge = <0>; - qcom,ipc = <&apcs 8 12>; - qcom,remote-pid = <1>; - - label = "hexagon"; - - fastrpc { - compatible = "qcom,fastrpc"; - qcom,smd-channels = "fastrpcsmd-apps-dsp"; - label = "adsp"; - qcom,non-secure-domain; - - #address-cells = <1>; - #size-cells = <0>; - - cb@1 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <1>; - }; - }; - }; - }; - - sound: sound@7702000 { - status = "disabled"; - compatible = "qcom,apq8016-sbc-sndcard"; - reg = <0x07702000 0x4>, <0x07702004 0x4>; - reg-names = "mic-iomux", "spkr-iomux"; - }; - - lpass: audio-controller@7708000 { - status = "disabled"; - compatible = "qcom,apq8016-lpass-cpu"; - - /* - * Note: Unlike the name would suggest, the SEC_I2S_CLK - * is actually only used by Tertiary MI2S while - * Primary/Secondary MI2S both use the PRI_I2S_CLK. - */ - clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>, - <&gcc GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK>, - <&gcc GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK>, - <&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>, - <&gcc GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK>, - <&gcc GCC_ULTAUDIO_PCNOC_MPORT_CLK>, - <&gcc GCC_ULTAUDIO_PCNOC_SWAY_CLK>; - - clock-names = "ahbix-clk", - "mi2s-bit-clk0", - "mi2s-bit-clk1", - "mi2s-bit-clk2", - "mi2s-bit-clk3", - "pcnoc-mport-clk", - "pcnoc-sway-clk"; - #sound-dai-cells = <1>; - - interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "lpass-irq-lpaif"; - reg = <0x07708000 0x10000>; - reg-names = "lpass-lpaif"; - - #address-cells = <1>; - #size-cells = <0>; - }; - - lpass_codec: audio-codec@771c000 { - compatible = "qcom,msm8916-wcd-digital-codec"; - reg = <0x0771c000 0x400>; - clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>, - <&gcc GCC_CODEC_DIGCODEC_CLK>; - clock-names = "ahbix-clk", "mclk"; - #sound-dai-cells = <1>; - status = "disabled"; - }; - - sdhc_1: mmc@7824900 { - compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4"; - reg = <0x07824900 0x11c>, <0x07824000 0x800>; - reg-names = "hc", "core"; - - interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "hc_irq", "pwr_irq"; - clocks = <&gcc GCC_SDCC1_AHB_CLK>, - <&gcc GCC_SDCC1_APPS_CLK>, - <&xo_board>; - clock-names = "iface", "core", "xo"; - pinctrl-0 = <&sdc1_default>; - pinctrl-1 = <&sdc1_sleep>; - pinctrl-names = "default", "sleep"; - mmc-ddr-1_8v; - bus-width = <8>; - non-removable; - status = "disabled"; - }; - - sdhc_2: mmc@7864900 { - compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4"; - reg = <0x07864900 0x11c>, <0x07864000 0x800>; - reg-names = "hc", "core"; - - interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "hc_irq", "pwr_irq"; - clocks = <&gcc GCC_SDCC2_AHB_CLK>, - <&gcc GCC_SDCC2_APPS_CLK>, - <&xo_board>; - clock-names = "iface", "core", "xo"; - pinctrl-0 = <&sdc2_default>; - pinctrl-1 = <&sdc2_sleep>; - pinctrl-names = "default", "sleep"; - bus-width = <4>; - status = "disabled"; - }; - - blsp_dma: dma-controller@7884000 { - compatible = "qcom,bam-v1.7.0"; - reg = <0x07884000 0x23000>; - interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "bam_clk"; - #dma-cells = <1>; - qcom,ee = <0>; - }; - - blsp_uart1: serial@78af000 { - compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0x078af000 0x200>; - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp_dma 0>, <&blsp_dma 1>; - dma-names = "tx", "rx"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp_uart1_default>; - pinctrl-1 = <&blsp_uart1_sleep>; - status = "disabled"; - }; - - blsp_uart2: serial@78b0000 { - compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0x078b0000 0x200>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp_dma 2>, <&blsp_dma 3>; - dma-names = "tx", "rx"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp_uart2_default>; - pinctrl-1 = <&blsp_uart2_sleep>; - status = "disabled"; - }; - - blsp_i2c1: i2c@78b5000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x078b5000 0x500>; - interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp_dma 4>, <&blsp_dma 5>; - dma-names = "tx", "rx"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp_i2c1_default>; - pinctrl-1 = <&blsp_i2c1_sleep>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp_spi1: spi@78b5000 { - compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x078b5000 0x500>; - interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp_dma 4>, <&blsp_dma 5>; - dma-names = "tx", "rx"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp_spi1_default>; - pinctrl-1 = <&blsp_spi1_sleep>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp_i2c2: i2c@78b6000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x078b6000 0x500>; - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp_dma 6>, <&blsp_dma 7>; - dma-names = "tx", "rx"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp_i2c2_default>; - pinctrl-1 = <&blsp_i2c2_sleep>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp_spi2: spi@78b6000 { - compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x078b6000 0x500>; - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp_dma 6>, <&blsp_dma 7>; - dma-names = "tx", "rx"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp_spi2_default>; - pinctrl-1 = <&blsp_spi2_sleep>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp_i2c3: i2c@78b7000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x078b7000 0x500>; - interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp_dma 8>, <&blsp_dma 9>; - dma-names = "tx", "rx"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp_i2c3_default>; - pinctrl-1 = <&blsp_i2c3_sleep>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp_spi3: spi@78b7000 { - compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x078b7000 0x500>; - interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp_dma 8>, <&blsp_dma 9>; - dma-names = "tx", "rx"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp_spi3_default>; - pinctrl-1 = <&blsp_spi3_sleep>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp_i2c4: i2c@78b8000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x078b8000 0x500>; - interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp_dma 10>, <&blsp_dma 11>; - dma-names = "tx", "rx"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp_i2c4_default>; - pinctrl-1 = <&blsp_i2c4_sleep>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp_spi4: spi@78b8000 { - compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x078b8000 0x500>; - interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp_dma 10>, <&blsp_dma 11>; - dma-names = "tx", "rx"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp_spi4_default>; - pinctrl-1 = <&blsp_spi4_sleep>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp_i2c5: i2c@78b9000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x078b9000 0x500>; - interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp_dma 12>, <&blsp_dma 13>; - dma-names = "tx", "rx"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp_i2c5_default>; - pinctrl-1 = <&blsp_i2c5_sleep>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp_spi5: spi@78b9000 { - compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x078b9000 0x500>; - interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP5_SPI_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp_dma 12>, <&blsp_dma 13>; - dma-names = "tx", "rx"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp_spi5_default>; - pinctrl-1 = <&blsp_spi5_sleep>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp_i2c6: i2c@78ba000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x078ba000 0x500>; - interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp_dma 14>, <&blsp_dma 15>; - dma-names = "tx", "rx"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp_i2c6_default>; - pinctrl-1 = <&blsp_i2c6_sleep>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp_spi6: spi@78ba000 { - compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x078ba000 0x500>; - interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP6_SPI_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp_dma 14>, <&blsp_dma 15>; - dma-names = "tx", "rx"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp_spi6_default>; - pinctrl-1 = <&blsp_spi6_sleep>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - usb: usb@78d9000 { - compatible = "qcom,ci-hdrc"; - reg = <0x078d9000 0x200>, - <0x078d9200 0x200>; - interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_USB_HS_AHB_CLK>, - <&gcc GCC_USB_HS_SYSTEM_CLK>; - clock-names = "iface", "core"; - assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>; - assigned-clock-rates = <80000000>; - resets = <&gcc GCC_USB_HS_BCR>; - reset-names = "core"; - phy_type = "ulpi"; - dr_mode = "otg"; - hnp-disable; - srp-disable; - adp-disable; - ahb-burst-config = <0>; - phy-names = "usb-phy"; - phys = <&usb_hs_phy>; - status = "disabled"; - #reset-cells = <1>; - - ulpi { - usb_hs_phy: phy { - compatible = "qcom,usb-hs-phy-msm8916", - "qcom,usb-hs-phy"; - #phy-cells = <0>; - clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>; - clock-names = "ref", "sleep"; - resets = <&gcc GCC_USB2A_PHY_BCR>, <&usb 0>; - reset-names = "phy", "por"; - qcom,init-seq = /bits/ 8 <0x0 0x44>, - <0x1 0x6b>, - <0x2 0x24>, - <0x3 0x13>; - }; - }; - }; - - wcnss: remoteproc@a204000 { - compatible = "qcom,pronto-v2-pil", "qcom,pronto"; - reg = <0x0a204000 0x2000>, <0x0a202000 0x1000>, <0x0a21b000 0x3000>; - reg-names = "ccu", "dxe", "pmu"; - - memory-region = <&wcnss_mem>; - - interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>, - <&wcnss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, - <&wcnss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, - <&wcnss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, - <&wcnss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; - - power-domains = <&rpmpd MSM8916_VDDCX>, - <&rpmpd MSM8916_VDDMX>; - power-domain-names = "cx", "mx"; - - qcom,smem-states = <&wcnss_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - pinctrl-names = "default"; - pinctrl-0 = <&wcss_wlan_default>; - - status = "disabled"; - - wcnss_iris: iris { - /* Separate chip, compatible is board-specific */ - clocks = <&rpmcc RPM_SMD_RF_CLK2>; - clock-names = "xo"; - }; - - smd-edge { - interrupts = <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>; - - qcom,ipc = <&apcs 8 17>; - qcom,smd-edge = <6>; - qcom,remote-pid = <4>; - - label = "pronto"; - - wcnss_ctrl: wcnss { - compatible = "qcom,wcnss"; - qcom,smd-channels = "WCNSS_CTRL"; - - qcom,mmio = <&wcnss>; - - wcnss_bt: bluetooth { - compatible = "qcom,wcnss-bt"; - }; - - wcnss_wifi: wifi { - compatible = "qcom,wcnss-wlan"; - - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "tx", "rx"; - - qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>; - qcom,smem-state-names = "tx-enable", "tx-rings-empty"; - }; - }; - }; - }; - - intc: interrupt-controller@b000000 { - compatible = "qcom,msm-qgic2"; - interrupt-controller; - #interrupt-cells = <3>; - reg = <0x0b000000 0x1000>, <0x0b002000 0x2000>, - <0x0b001000 0x1000>, <0x0b004000 0x2000>; - interrupts = <GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; - }; - - apcs: mailbox@b011000 { - compatible = "qcom,msm8916-apcs-kpss-global", "syscon"; - reg = <0x0b011000 0x1000>; - #mbox-cells = <1>; - clocks = <&a53pll>, <&gcc GPLL0_VOTE>; - clock-names = "pll", "aux"; - #clock-cells = <0>; - }; - - a53pll: clock@b016000 { - compatible = "qcom,msm8916-a53pll"; - reg = <0x0b016000 0x40>; - #clock-cells = <0>; - clocks = <&xo_board>; - clock-names = "xo"; - }; - - timer@b020000 { - #address-cells = <1>; - #size-cells = <1>; - ranges; - compatible = "arm,armv7-timer-mem"; - reg = <0x0b020000 0x1000>; - clock-frequency = <19200000>; - - frame@b021000 { - frame-number = <0>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b021000 0x1000>, - <0x0b022000 0x1000>; - }; - - frame@b023000 { - frame-number = <1>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b023000 0x1000>; - status = "disabled"; - }; - - frame@b024000 { - frame-number = <2>; - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b024000 0x1000>; - status = "disabled"; - }; - - frame@b025000 { - frame-number = <3>; - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b025000 0x1000>; - status = "disabled"; - }; - - frame@b026000 { - frame-number = <4>; - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b026000 0x1000>; - status = "disabled"; - }; - - frame@b027000 { - frame-number = <5>; - interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b027000 0x1000>; - status = "disabled"; - }; - - frame@b028000 { - frame-number = <6>; - interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b028000 0x1000>; - status = "disabled"; - }; - }; - - cpu0_acc: power-manager@b088000 { - compatible = "qcom,msm8916-acc"; - reg = <0x0b088000 0x1000>; - status = "reserved"; /* Controlled by PSCI firmware */ - }; - - cpu0_saw: power-manager@b089000 { - compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2"; - reg = <0x0b089000 0x1000>; - status = "reserved"; /* Controlled by PSCI firmware */ - }; - - cpu1_acc: power-manager@b098000 { - compatible = "qcom,msm8916-acc"; - reg = <0x0b098000 0x1000>; - status = "reserved"; /* Controlled by PSCI firmware */ - }; - - cpu1_saw: power-manager@b099000 { - compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2"; - reg = <0x0b099000 0x1000>; - status = "reserved"; /* Controlled by PSCI firmware */ - }; - - cpu2_acc: power-manager@b0a8000 { - compatible = "qcom,msm8916-acc"; - reg = <0x0b0a8000 0x1000>; - status = "reserved"; /* Controlled by PSCI firmware */ - }; - - cpu2_saw: power-manager@b0a9000 { - compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2"; - reg = <0x0b0a9000 0x1000>; - status = "reserved"; /* Controlled by PSCI firmware */ - }; - - cpu3_acc: power-manager@b0b8000 { - compatible = "qcom,msm8916-acc"; - reg = <0x0b0b8000 0x1000>; - status = "reserved"; /* Controlled by PSCI firmware */ - }; - - cpu3_saw: power-manager@b0b9000 { - compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2"; - reg = <0x0b0b9000 0x1000>; - status = "reserved"; /* Controlled by PSCI firmware */ - }; - }; - - thermal-zones { - cpu0-1-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens 5>; - - trips { - cpu0_1_alert0: trip-point0 { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu0_1_crit: cpu-crit { - temperature = <110000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu0_1_alert0>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - - cpu2-3-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens 4>; - - trips { - cpu2_3_alert0: trip-point0 { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu2_3_crit: cpu-crit { - temperature = <110000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu2_3_alert0>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - - gpu-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens 2>; - - trips { - gpu_alert0: trip-point0 { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; - }; - gpu_crit: gpu-crit { - temperature = <95000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - }; - - camera-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens 1>; - - trips { - cam_alert0: trip-point0 { - temperature = <75000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - modem-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens 0>; - - trips { - modem_alert0: trip-point0 { - temperature = <85000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; - }; -}; diff --git a/arch/arm/dts/msm8996.dtsi b/arch/arm/dts/msm8996.dtsi deleted file mode 100644 index 6ba9da9e6a8..00000000000 --- a/arch/arm/dts/msm8996.dtsi +++ /dev/null @@ -1,3884 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. - */ - -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/clock/qcom,gcc-msm8996.h> -#include <dt-bindings/clock/qcom,mmcc-msm8996.h> -#include <dt-bindings/clock/qcom,rpmcc.h> -#include <dt-bindings/interconnect/qcom,msm8996.h> -#include <dt-bindings/interconnect/qcom,msm8996-cbf.h> -#include <dt-bindings/firmware/qcom,scm.h> -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/power/qcom-rpmpd.h> -#include <dt-bindings/soc/qcom,apr.h> -#include <dt-bindings/thermal/thermal.h> - -/ { - interrupt-parent = <&intc>; - - #address-cells = <2>; - #size-cells = <2>; - - chosen { }; - - clocks { - xo_board: xo-board { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <19200000>; - clock-output-names = "xo_board"; - }; - - sleep_clk: sleep-clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32764>; - clock-output-names = "sleep_clk"; - }; - }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - CPU0: cpu@0 { - device_type = "cpu"; - compatible = "qcom,kryo"; - reg = <0x0 0x0>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - capacity-dmips-mhz = <1024>; - clocks = <&kryocc 0>; - interconnects = <&cbf MASTER_CBF_M4M &cbf SLAVE_CBF_M4M>; - operating-points-v2 = <&cluster0_opp>; - #cooling-cells = <2>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-unified; - }; - }; - - CPU1: cpu@1 { - device_type = "cpu"; - compatible = "qcom,kryo"; - reg = <0x0 0x1>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - capacity-dmips-mhz = <1024>; - clocks = <&kryocc 0>; - interconnects = <&cbf MASTER_CBF_M4M &cbf SLAVE_CBF_M4M>; - operating-points-v2 = <&cluster0_opp>; - #cooling-cells = <2>; - next-level-cache = <&L2_0>; - }; - - CPU2: cpu@100 { - device_type = "cpu"; - compatible = "qcom,kryo"; - reg = <0x0 0x100>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - capacity-dmips-mhz = <1024>; - clocks = <&kryocc 1>; - interconnects = <&cbf MASTER_CBF_M4M &cbf SLAVE_CBF_M4M>; - operating-points-v2 = <&cluster1_opp>; - #cooling-cells = <2>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-unified; - }; - }; - - CPU3: cpu@101 { - device_type = "cpu"; - compatible = "qcom,kryo"; - reg = <0x0 0x101>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - capacity-dmips-mhz = <1024>; - clocks = <&kryocc 1>; - interconnects = <&cbf MASTER_CBF_M4M &cbf SLAVE_CBF_M4M>; - operating-points-v2 = <&cluster1_opp>; - #cooling-cells = <2>; - next-level-cache = <&L2_1>; - }; - - cpu-map { - cluster0 { - core0 { - cpu = <&CPU0>; - }; - - core1 { - cpu = <&CPU1>; - }; - }; - - cluster1 { - core0 { - cpu = <&CPU2>; - }; - - core1 { - cpu = <&CPU3>; - }; - }; - }; - - idle-states { - entry-method = "psci"; - - CPU_SLEEP_0: cpu-sleep-0 { - compatible = "arm,idle-state"; - idle-state-name = "standalone-power-collapse"; - arm,psci-suspend-param = <0x00000004>; - entry-latency-us = <130>; - exit-latency-us = <80>; - min-residency-us = <300>; - }; - }; - }; - - cluster0_opp: opp-table-cluster0 { - compatible = "operating-points-v2-kryo-cpu"; - nvmem-cells = <&speedbin_efuse>; - opp-shared; - - /* Nominal fmax for now */ - opp-307200000 { - opp-hz = /bits/ 64 <307200000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <307200>; - }; - opp-422400000 { - opp-hz = /bits/ 64 <422400000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <307200>; - }; - opp-480000000 { - opp-hz = /bits/ 64 <480000000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <307200>; - }; - opp-556800000 { - opp-hz = /bits/ 64 <556800000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <307200>; - }; - opp-652800000 { - opp-hz = /bits/ 64 <652800000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <384000>; - }; - opp-729600000 { - opp-hz = /bits/ 64 <729600000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <460800>; - }; - opp-844800000 { - opp-hz = /bits/ 64 <844800000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <537600>; - }; - opp-960000000 { - opp-hz = /bits/ 64 <960000000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <672000>; - }; - opp-1036800000 { - opp-hz = /bits/ 64 <1036800000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <672000>; - }; - opp-1113600000 { - opp-hz = /bits/ 64 <1113600000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <825600>; - }; - opp-1190400000 { - opp-hz = /bits/ 64 <1190400000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <825600>; - }; - opp-1228800000 { - opp-hz = /bits/ 64 <1228800000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <902400>; - }; - opp-1324800000 { - opp-hz = /bits/ 64 <1324800000>; - opp-supported-hw = <0xd>; - clock-latency-ns = <200000>; - opp-peak-kBps = <1056000>; - }; - opp-1363200000 { - opp-hz = /bits/ 64 <1363200000>; - opp-supported-hw = <0x2>; - clock-latency-ns = <200000>; - opp-peak-kBps = <1132800>; - }; - opp-1401600000 { - opp-hz = /bits/ 64 <1401600000>; - opp-supported-hw = <0xd>; - clock-latency-ns = <200000>; - opp-peak-kBps = <1132800>; - }; - opp-1478400000 { - opp-hz = /bits/ 64 <1478400000>; - opp-supported-hw = <0x9>; - clock-latency-ns = <200000>; - opp-peak-kBps = <1190400>; - }; - opp-1497600000 { - opp-hz = /bits/ 64 <1497600000>; - opp-supported-hw = <0x04>; - clock-latency-ns = <200000>; - opp-peak-kBps = <1305600>; - }; - opp-1593600000 { - opp-hz = /bits/ 64 <1593600000>; - opp-supported-hw = <0x9>; - clock-latency-ns = <200000>; - opp-peak-kBps = <1382400>; - }; - }; - - cluster1_opp: opp-table-cluster1 { - compatible = "operating-points-v2-kryo-cpu"; - nvmem-cells = <&speedbin_efuse>; - opp-shared; - - /* Nominal fmax for now */ - opp-307200000 { - opp-hz = /bits/ 64 <307200000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <307200>; - }; - opp-403200000 { - opp-hz = /bits/ 64 <403200000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <307200>; - }; - opp-480000000 { - opp-hz = /bits/ 64 <480000000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <307200>; - }; - opp-556800000 { - opp-hz = /bits/ 64 <556800000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <307200>; - }; - opp-652800000 { - opp-hz = /bits/ 64 <652800000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <307200>; - }; - opp-729600000 { - opp-hz = /bits/ 64 <729600000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <307200>; - }; - opp-806400000 { - opp-hz = /bits/ 64 <806400000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <384000>; - }; - opp-883200000 { - opp-hz = /bits/ 64 <883200000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <460800>; - }; - opp-940800000 { - opp-hz = /bits/ 64 <940800000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <537600>; - }; - opp-1036800000 { - opp-hz = /bits/ 64 <1036800000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <595200>; - }; - opp-1113600000 { - opp-hz = /bits/ 64 <1113600000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <672000>; - }; - opp-1190400000 { - opp-hz = /bits/ 64 <1190400000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <672000>; - }; - opp-1248000000 { - opp-hz = /bits/ 64 <1248000000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <748800>; - }; - opp-1324800000 { - opp-hz = /bits/ 64 <1324800000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <825600>; - }; - opp-1401600000 { - opp-hz = /bits/ 64 <1401600000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <902400>; - }; - opp-1478400000 { - opp-hz = /bits/ 64 <1478400000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <979200>; - }; - opp-1555200000 { - opp-hz = /bits/ 64 <1555200000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <1056000>; - }; - opp-1632000000 { - opp-hz = /bits/ 64 <1632000000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <1190400>; - }; - opp-1708800000 { - opp-hz = /bits/ 64 <1708800000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <1228800>; - }; - opp-1785600000 { - opp-hz = /bits/ 64 <1785600000>; - opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - opp-peak-kBps = <1305600>; - }; - opp-1804800000 { - opp-hz = /bits/ 64 <1804800000>; - opp-supported-hw = <0xe>; - clock-latency-ns = <200000>; - opp-peak-kBps = <1305600>; - }; - opp-1824000000 { - opp-hz = /bits/ 64 <1824000000>; - opp-supported-hw = <0x1>; - clock-latency-ns = <200000>; - opp-peak-kBps = <1382400>; - }; - opp-1900800000 { - opp-hz = /bits/ 64 <1900800000>; - opp-supported-hw = <0x4>; - clock-latency-ns = <200000>; - opp-peak-kBps = <1305600>; - }; - opp-1920000000 { - opp-hz = /bits/ 64 <1920000000>; - opp-supported-hw = <0x1>; - clock-latency-ns = <200000>; - opp-peak-kBps = <1459200>; - }; - opp-1996800000 { - opp-hz = /bits/ 64 <1996800000>; - opp-supported-hw = <0x1>; - clock-latency-ns = <200000>; - opp-peak-kBps = <1593600>; - }; - opp-2073600000 { - opp-hz = /bits/ 64 <2073600000>; - opp-supported-hw = <0x1>; - clock-latency-ns = <200000>; - opp-peak-kBps = <1593600>; - }; - opp-2150400000 { - opp-hz = /bits/ 64 <2150400000>; - opp-supported-hw = <0x1>; - clock-latency-ns = <200000>; - opp-peak-kBps = <1593600>; - }; - }; - - firmware { - scm { - compatible = "qcom,scm-msm8996", "qcom,scm"; - qcom,dload-mode = <&tcsr_2 0x13000>; - }; - }; - - memory@80000000 { - device_type = "memory"; - /* We expect the bootloader to fill in the reg */ - reg = <0x0 0x80000000 0x0 0x0>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - rpm: remoteproc { - compatible = "qcom,msm8996-rpm-proc", "qcom,rpm-proc"; - - glink-edge { - compatible = "qcom,glink-rpm"; - interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>; - qcom,rpm-msg-ram = <&rpm_msg_ram>; - mboxes = <&apcs_glb 0>; - - rpm_requests: rpm-requests { - compatible = "qcom,rpm-msm8996"; - qcom,glink-channels = "rpm_requests"; - - rpmcc: clock-controller { - compatible = "qcom,rpmcc-msm8996", "qcom,rpmcc"; - #clock-cells = <1>; - clocks = <&xo_board>; - clock-names = "xo"; - }; - - rpmpd: power-controller { - compatible = "qcom,msm8996-rpmpd"; - #power-domain-cells = <1>; - operating-points-v2 = <&rpmpd_opp_table>; - - rpmpd_opp_table: opp-table { - compatible = "operating-points-v2"; - - rpmpd_opp1: opp1 { - opp-level = <1>; - }; - - rpmpd_opp2: opp2 { - opp-level = <2>; - }; - - rpmpd_opp3: opp3 { - opp-level = <3>; - }; - - rpmpd_opp4: opp4 { - opp-level = <4>; - }; - - rpmpd_opp5: opp5 { - opp-level = <5>; - }; - - rpmpd_opp6: opp6 { - opp-level = <6>; - }; - }; - }; - }; - }; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - hyp_mem: memory@85800000 { - reg = <0x0 0x85800000 0x0 0x600000>; - no-map; - }; - - xbl_mem: memory@85e00000 { - reg = <0x0 0x85e00000 0x0 0x200000>; - no-map; - }; - - smem_mem: smem-mem@86000000 { - reg = <0x0 0x86000000 0x0 0x200000>; - no-map; - }; - - tz_mem: memory@86200000 { - reg = <0x0 0x86200000 0x0 0x2600000>; - no-map; - }; - - rmtfs_mem: rmtfs { - compatible = "qcom,rmtfs-mem"; - - size = <0x0 0x200000>; - alloc-ranges = <0x0 0xa0000000 0x0 0x2000000>; - no-map; - - qcom,client-id = <1>; - qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; - }; - - mpss_mem: mpss@88800000 { - reg = <0x0 0x88800000 0x0 0x6200000>; - no-map; - }; - - adsp_mem: adsp@8ea00000 { - reg = <0x0 0x8ea00000 0x0 0x1b00000>; - no-map; - }; - - slpi_mem: slpi@90500000 { - reg = <0x0 0x90500000 0x0 0xa00000>; - no-map; - }; - - gpu_mem: gpu@90f00000 { - compatible = "shared-dma-pool"; - reg = <0x0 0x90f00000 0x0 0x100000>; - no-map; - }; - - venus_mem: venus@91000000 { - reg = <0x0 0x91000000 0x0 0x500000>; - no-map; - }; - - mba_mem: mba@91500000 { - reg = <0x0 0x91500000 0x0 0x200000>; - no-map; - }; - - mdata_mem: mpss-metadata { - alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>; - size = <0x0 0x4000>; - no-map; - }; - }; - - smem { - compatible = "qcom,smem"; - memory-region = <&smem_mem>; - hwlocks = <&tcsr_mutex 3>; - }; - - smp2p-adsp { - compatible = "qcom,smp2p"; - qcom,smem = <443>, <429>; - - interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>; - - mboxes = <&apcs_glb 10>; - - qcom,local-pid = <0>; - qcom,remote-pid = <2>; - - adsp_smp2p_out: master-kernel { - qcom,entry-name = "master-kernel"; - #qcom,smem-state-cells = <1>; - }; - - adsp_smp2p_in: slave-kernel { - qcom,entry-name = "slave-kernel"; - - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - smp2p-mpss { - compatible = "qcom,smp2p"; - qcom,smem = <435>, <428>; - - interrupts = <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>; - - mboxes = <&apcs_glb 14>; - - qcom,local-pid = <0>; - qcom,remote-pid = <1>; - - mpss_smp2p_out: master-kernel { - qcom,entry-name = "master-kernel"; - #qcom,smem-state-cells = <1>; - }; - - mpss_smp2p_in: slave-kernel { - qcom,entry-name = "slave-kernel"; - - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - smp2p-slpi { - compatible = "qcom,smp2p"; - qcom,smem = <481>, <430>; - - interrupts = <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>; - - mboxes = <&apcs_glb 26>; - - qcom,local-pid = <0>; - qcom,remote-pid = <3>; - - slpi_smp2p_out: master-kernel { - qcom,entry-name = "master-kernel"; - #qcom,smem-state-cells = <1>; - }; - - slpi_smp2p_in: slave-kernel { - qcom,entry-name = "slave-kernel"; - - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - soc: soc@0 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0 0xffffffff>; - compatible = "simple-bus"; - - pcie_phy: phy-wrapper@34000 { - compatible = "qcom,msm8996-qmp-pcie-phy"; - reg = <0x00034000 0x488>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x00034000 0x4000>; - - clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, - <&gcc GCC_PCIE_PHY_CFG_AHB_CLK>, - <&gcc GCC_PCIE_CLKREF_CLK>; - clock-names = "aux", "cfg_ahb", "ref"; - - resets = <&gcc GCC_PCIE_PHY_BCR>, - <&gcc GCC_PCIE_PHY_COM_BCR>, - <&gcc GCC_PCIE_PHY_COM_NOCSR_BCR>; - reset-names = "phy", "common", "cfg"; - - status = "disabled"; - - pciephy_0: phy@1000 { - reg = <0x1000 0x130>, - <0x1200 0x200>, - <0x1400 0x1dc>; - - clocks = <&gcc GCC_PCIE_0_PIPE_CLK>; - clock-names = "pipe0"; - resets = <&gcc GCC_PCIE_0_PHY_BCR>; - reset-names = "lane0"; - - #clock-cells = <0>; - clock-output-names = "pcie_0_pipe_clk_src"; - - #phy-cells = <0>; - }; - - pciephy_1: phy@2000 { - reg = <0x2000 0x130>, - <0x2200 0x200>, - <0x2400 0x1dc>; - - clocks = <&gcc GCC_PCIE_1_PIPE_CLK>; - clock-names = "pipe1"; - resets = <&gcc GCC_PCIE_1_PHY_BCR>; - reset-names = "lane1"; - - #clock-cells = <0>; - clock-output-names = "pcie_1_pipe_clk_src"; - - #phy-cells = <0>; - }; - - pciephy_2: phy@3000 { - reg = <0x3000 0x130>, - <0x3200 0x200>, - <0x3400 0x1dc>; - - clocks = <&gcc GCC_PCIE_2_PIPE_CLK>; - clock-names = "pipe2"; - resets = <&gcc GCC_PCIE_2_PHY_BCR>; - reset-names = "lane2"; - - #clock-cells = <0>; - clock-output-names = "pcie_2_pipe_clk_src"; - - #phy-cells = <0>; - }; - }; - - rpm_msg_ram: sram@68000 { - compatible = "qcom,rpm-msg-ram"; - reg = <0x00068000 0x6000>; - }; - - qfprom@74000 { - compatible = "qcom,msm8996-qfprom", "qcom,qfprom"; - reg = <0x00074000 0x8ff>; - #address-cells = <1>; - #size-cells = <1>; - - qusb2p_hstx_trim: hstx_trim@24e { - reg = <0x24e 0x2>; - bits = <5 4>; - }; - - qusb2s_hstx_trim: hstx_trim@24f { - reg = <0x24f 0x1>; - bits = <1 4>; - }; - - speedbin_efuse: speedbin@133 { - reg = <0x133 0x1>; - bits = <5 3>; - }; - }; - - rng: rng@83000 { - compatible = "qcom,prng-ee"; - reg = <0x00083000 0x1000>; - clocks = <&gcc GCC_PRNG_AHB_CLK>; - clock-names = "core"; - }; - - gcc: clock-controller@300000 { - compatible = "qcom,gcc-msm8996"; - #clock-cells = <1>; - #reset-cells = <1>; - #power-domain-cells = <1>; - reg = <0x00300000 0x90000>; - - clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, - <&rpmcc RPM_SMD_LN_BB_CLK>, - <&sleep_clk>, - <&pciephy_0>, - <&pciephy_1>, - <&pciephy_2>, - <&ssusb_phy_0>, - <&ufsphy_lane 0>, - <&ufsphy_lane 1>, - <&ufsphy_lane 2>; - clock-names = "cxo", - "cxo2", - "sleep_clk", - "pcie_0_pipe_clk_src", - "pcie_1_pipe_clk_src", - "pcie_2_pipe_clk_src", - "usb3_phy_pipe_clk_src", - "ufs_rx_symbol_0_clk_src", - "ufs_rx_symbol_1_clk_src", - "ufs_tx_symbol_0_clk_src"; - }; - - bimc: interconnect@408000 { - compatible = "qcom,msm8996-bimc"; - reg = <0x00408000 0x5a000>; - #interconnect-cells = <1>; - clock-names = "bus", "bus_a"; - clocks = <&rpmcc RPM_SMD_BIMC_CLK>, - <&rpmcc RPM_SMD_BIMC_A_CLK>; - }; - - tsens0: thermal-sensor@4a9000 { - compatible = "qcom,msm8996-tsens", "qcom,tsens-v2"; - reg = <0x004a9000 0x1000>, /* TM */ - <0x004a8000 0x1000>; /* SROT */ - #qcom,sensors = <13>; - interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "uplow", "critical"; - #thermal-sensor-cells = <1>; - }; - - tsens1: thermal-sensor@4ad000 { - compatible = "qcom,msm8996-tsens", "qcom,tsens-v2"; - reg = <0x004ad000 0x1000>, /* TM */ - <0x004ac000 0x1000>; /* SROT */ - #qcom,sensors = <8>; - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "uplow", "critical"; - #thermal-sensor-cells = <1>; - }; - - cryptobam: dma-controller@644000 { - compatible = "qcom,bam-v1.7.0"; - reg = <0x00644000 0x24000>; - interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_CE1_CLK>; - clock-names = "bam_clk"; - #dma-cells = <1>; - qcom,ee = <0>; - qcom,controlled-remotely; - }; - - crypto: crypto@67a000 { - compatible = "qcom,crypto-v5.4"; - reg = <0x0067a000 0x6000>; - clocks = <&gcc GCC_CE1_AHB_CLK>, - <&gcc GCC_CE1_AXI_CLK>, - <&gcc GCC_CE1_CLK>; - clock-names = "iface", "bus", "core"; - dmas = <&cryptobam 6>, <&cryptobam 7>; - dma-names = "rx", "tx"; - }; - - cnoc: interconnect@500000 { - compatible = "qcom,msm8996-cnoc"; - reg = <0x00500000 0x1000>; - #interconnect-cells = <1>; - clock-names = "bus", "bus_a"; - clocks = <&rpmcc RPM_SMD_CNOC_CLK>, - <&rpmcc RPM_SMD_CNOC_A_CLK>; - }; - - snoc: interconnect@524000 { - compatible = "qcom,msm8996-snoc"; - reg = <0x00524000 0x1c000>; - #interconnect-cells = <1>; - clock-names = "bus", "bus_a"; - clocks = <&rpmcc RPM_SMD_SNOC_CLK>, - <&rpmcc RPM_SMD_SNOC_A_CLK>; - }; - - a0noc: interconnect@543000 { - compatible = "qcom,msm8996-a0noc"; - reg = <0x00543000 0x6000>; - #interconnect-cells = <1>; - clock-names = "aggre0_snoc_axi", - "aggre0_cnoc_ahb", - "aggre0_noc_mpu_cfg"; - clocks = <&gcc GCC_AGGRE0_SNOC_AXI_CLK>, - <&gcc GCC_AGGRE0_CNOC_AHB_CLK>, - <&gcc GCC_AGGRE0_NOC_MPU_CFG_AHB_CLK>; - power-domains = <&gcc AGGRE0_NOC_GDSC>; - }; - - a1noc: interconnect@562000 { - compatible = "qcom,msm8996-a1noc"; - reg = <0x00562000 0x5000>; - #interconnect-cells = <1>; - clock-names = "bus", "bus_a"; - clocks = <&rpmcc RPM_SMD_AGGR1_NOC_CLK>, - <&rpmcc RPM_SMD_AGGR1_NOC_A_CLK>; - }; - - a2noc: interconnect@583000 { - compatible = "qcom,msm8996-a2noc"; - reg = <0x00583000 0x7000>; - #interconnect-cells = <1>; - clock-names = "bus", "bus_a", "aggre2_ufs_axi", "ufs_axi"; - clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>, - <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>, - <&gcc GCC_AGGRE2_UFS_AXI_CLK>, - <&gcc GCC_UFS_AXI_CLK>; - }; - - mnoc: interconnect@5a4000 { - compatible = "qcom,msm8996-mnoc"; - reg = <0x005a4000 0x1c000>; - #interconnect-cells = <1>; - clock-names = "bus", "bus_a", "iface"; - clocks = <&rpmcc RPM_SMD_MMAXI_CLK>, - <&rpmcc RPM_SMD_MMAXI_A_CLK>, - <&mmcc AHB_CLK_SRC>; - }; - - pnoc: interconnect@5c0000 { - compatible = "qcom,msm8996-pnoc"; - reg = <0x005c0000 0x3000>; - #interconnect-cells = <1>; - clock-names = "bus", "bus_a"; - clocks = <&rpmcc RPM_SMD_PCNOC_CLK>, - <&rpmcc RPM_SMD_PCNOC_A_CLK>; - }; - - tcsr_mutex: hwlock@740000 { - compatible = "qcom,tcsr-mutex"; - reg = <0x00740000 0x20000>; - #hwlock-cells = <1>; - }; - - tcsr_1: syscon@760000 { - compatible = "qcom,tcsr-msm8996", "syscon"; - reg = <0x00760000 0x20000>; - }; - - tcsr_2: syscon@7a0000 { - compatible = "qcom,tcsr-msm8996", "syscon"; - reg = <0x007a0000 0x18000>; - }; - - mmcc: clock-controller@8c0000 { - compatible = "qcom,mmcc-msm8996"; - #clock-cells = <1>; - #reset-cells = <1>; - #power-domain-cells = <1>; - reg = <0x008c0000 0x40000>; - clocks = <&xo_board>, - <&gcc GPLL0>, - <&gcc GCC_MMSS_NOC_CFG_AHB_CLK>, - <&mdss_dsi0_phy 1>, - <&mdss_dsi0_phy 0>, - <&mdss_dsi1_phy 1>, - <&mdss_dsi1_phy 0>, - <&mdss_hdmi_phy>; - clock-names = "xo", - "gpll0", - "gcc_mmss_noc_cfg_ahb_clk", - "dsi0pll", - "dsi0pllbyte", - "dsi1pll", - "dsi1pllbyte", - "hdmipll"; - assigned-clocks = <&mmcc MMPLL9_PLL>, - <&mmcc MMPLL1_PLL>, - <&mmcc MMPLL3_PLL>, - <&mmcc MMPLL4_PLL>, - <&mmcc MMPLL5_PLL>; - assigned-clock-rates = <624000000>, - <810000000>, - <980000000>, - <960000000>, - <825000000>; - }; - - mdss: display-subsystem@900000 { - compatible = "qcom,mdss"; - - reg = <0x00900000 0x1000>, - <0x009b0000 0x1040>, - <0x009b8000 0x1040>; - reg-names = "mdss_phys", - "vbif_phys", - "vbif_nrt_phys"; - - power-domains = <&mmcc MDSS_GDSC>; - interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; - - interrupt-controller; - #interrupt-cells = <1>; - - clocks = <&mmcc MDSS_AHB_CLK>, - <&mmcc MDSS_MDP_CLK>; - clock-names = "iface", "core"; - - #address-cells = <1>; - #size-cells = <1>; - ranges; - - status = "disabled"; - - mdp: display-controller@901000 { - compatible = "qcom,msm8996-mdp5", "qcom,mdp5"; - reg = <0x00901000 0x90000>; - reg-names = "mdp_phys"; - - interrupt-parent = <&mdss>; - interrupts = <0>; - - clocks = <&mmcc MDSS_AHB_CLK>, - <&mmcc MDSS_AXI_CLK>, - <&mmcc MDSS_MDP_CLK>, - <&mmcc SMMU_MDP_AXI_CLK>, - <&mmcc MDSS_VSYNC_CLK>; - clock-names = "iface", - "bus", - "core", - "iommu", - "vsync"; - - iommus = <&mdp_smmu 0>; - - assigned-clocks = <&mmcc MDSS_MDP_CLK>, - <&mmcc MDSS_VSYNC_CLK>; - assigned-clock-rates = <300000000>, - <19200000>; - - interconnects = <&mnoc MASTER_MDP_PORT0 &bimc SLAVE_EBI_CH0>, - <&mnoc MASTER_MDP_PORT1 &bimc SLAVE_EBI_CH0>, - <&mnoc MASTER_ROTATOR &bimc SLAVE_EBI_CH0>; - interconnect-names = "mdp0-mem", "mdp1-mem", "rotator-mem"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - mdp5_intf3_out: endpoint { - remote-endpoint = <&mdss_hdmi_in>; - }; - }; - - port@1 { - reg = <1>; - mdp5_intf1_out: endpoint { - remote-endpoint = <&mdss_dsi0_in>; - }; - }; - - port@2 { - reg = <2>; - mdp5_intf2_out: endpoint { - remote-endpoint = <&mdss_dsi1_in>; - }; - }; - }; - }; - - mdss_dsi0: dsi@994000 { - compatible = "qcom,msm8996-dsi-ctrl", - "qcom,mdss-dsi-ctrl"; - reg = <0x00994000 0x400>; - reg-names = "dsi_ctrl"; - - interrupt-parent = <&mdss>; - interrupts = <4>; - - clocks = <&mmcc MDSS_MDP_CLK>, - <&mmcc MDSS_BYTE0_CLK>, - <&mmcc MDSS_AHB_CLK>, - <&mmcc MDSS_AXI_CLK>, - <&mmcc MMSS_MISC_AHB_CLK>, - <&mmcc MDSS_PCLK0_CLK>, - <&mmcc MDSS_ESC0_CLK>; - clock-names = "mdp_core", - "byte", - "iface", - "bus", - "core_mmss", - "pixel", - "core"; - assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>; - assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>; - - phys = <&mdss_dsi0_phy>; - status = "disabled"; - - #address-cells = <1>; - #size-cells = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - mdss_dsi0_in: endpoint { - remote-endpoint = <&mdp5_intf1_out>; - }; - }; - - port@1 { - reg = <1>; - mdss_dsi0_out: endpoint { - }; - }; - }; - }; - - mdss_dsi0_phy: phy@994400 { - compatible = "qcom,dsi-phy-14nm"; - reg = <0x00994400 0x100>, - <0x00994500 0x300>, - <0x00994800 0x188>; - reg-names = "dsi_phy", - "dsi_phy_lane", - "dsi_pll"; - - #clock-cells = <1>; - #phy-cells = <0>; - - clocks = <&mmcc MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>; - clock-names = "iface", "ref"; - status = "disabled"; - }; - - mdss_dsi1: dsi@996000 { - compatible = "qcom,msm8996-dsi-ctrl", - "qcom,mdss-dsi-ctrl"; - reg = <0x00996000 0x400>; - reg-names = "dsi_ctrl"; - - interrupt-parent = <&mdss>; - interrupts = <5>; - - clocks = <&mmcc MDSS_MDP_CLK>, - <&mmcc MDSS_BYTE1_CLK>, - <&mmcc MDSS_AHB_CLK>, - <&mmcc MDSS_AXI_CLK>, - <&mmcc MMSS_MISC_AHB_CLK>, - <&mmcc MDSS_PCLK1_CLK>, - <&mmcc MDSS_ESC1_CLK>; - clock-names = "mdp_core", - "byte", - "iface", - "bus", - "core_mmss", - "pixel", - "core"; - assigned-clocks = <&mmcc BYTE1_CLK_SRC>, <&mmcc PCLK1_CLK_SRC>; - assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>; - - phys = <&mdss_dsi1_phy>; - status = "disabled"; - - #address-cells = <1>; - #size-cells = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - mdss_dsi1_in: endpoint { - remote-endpoint = <&mdp5_intf2_out>; - }; - }; - - port@1 { - reg = <1>; - mdss_dsi1_out: endpoint { - }; - }; - }; - }; - - mdss_dsi1_phy: phy@996400 { - compatible = "qcom,dsi-phy-14nm"; - reg = <0x00996400 0x100>, - <0x00996500 0x300>, - <0x00996800 0x188>; - reg-names = "dsi_phy", - "dsi_phy_lane", - "dsi_pll"; - - #clock-cells = <1>; - #phy-cells = <0>; - - clocks = <&mmcc MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>; - clock-names = "iface", "ref"; - status = "disabled"; - }; - - mdss_hdmi: hdmi-tx@9a0000 { - compatible = "qcom,hdmi-tx-8996"; - reg = <0x009a0000 0x50c>, - <0x00070000 0x6158>, - <0x009e0000 0xfff>; - reg-names = "core_physical", - "qfprom_physical", - "hdcp_physical"; - - interrupt-parent = <&mdss>; - interrupts = <8>; - - clocks = <&mmcc MDSS_MDP_CLK>, - <&mmcc MDSS_AHB_CLK>, - <&mmcc MDSS_HDMI_CLK>, - <&mmcc MDSS_HDMI_AHB_CLK>, - <&mmcc MDSS_EXTPCLK_CLK>; - clock-names = - "mdp_core", - "iface", - "core", - "alt_iface", - "extp"; - - phys = <&mdss_hdmi_phy>; - #sound-dai-cells = <1>; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - mdss_hdmi_in: endpoint { - remote-endpoint = <&mdp5_intf3_out>; - }; - }; - }; - }; - - mdss_hdmi_phy: phy@9a0600 { - #phy-cells = <0>; - compatible = "qcom,hdmi-phy-8996"; - reg = <0x009a0600 0x1c4>, - <0x009a0a00 0x124>, - <0x009a0c00 0x124>, - <0x009a0e00 0x124>, - <0x009a1000 0x124>, - <0x009a1200 0x0c8>; - reg-names = "hdmi_pll", - "hdmi_tx_l0", - "hdmi_tx_l1", - "hdmi_tx_l2", - "hdmi_tx_l3", - "hdmi_phy"; - - clocks = <&mmcc MDSS_AHB_CLK>, - <&gcc GCC_HDMI_CLKREF_CLK>, - <&xo_board>; - clock-names = "iface", - "ref", - "xo"; - - #clock-cells = <0>; - - status = "disabled"; - }; - }; - - gpu: gpu@b00000 { - compatible = "qcom,adreno-530.2", "qcom,adreno"; - - reg = <0x00b00000 0x3f000>; - reg-names = "kgsl_3d0_reg_memory"; - - interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>; - - clocks = <&mmcc GPU_GX_GFX3D_CLK>, - <&mmcc GPU_AHB_CLK>, - <&mmcc GPU_GX_RBBMTIMER_CLK>, - <&gcc GCC_BIMC_GFX_CLK>, - <&gcc GCC_MMSS_BIMC_GFX_CLK>; - - clock-names = "core", - "iface", - "rbbmtimer", - "mem", - "mem_iface"; - - interconnects = <&bimc MASTER_GRAPHICS_3D &bimc SLAVE_EBI_CH0>; - interconnect-names = "gfx-mem"; - - power-domains = <&mmcc GPU_GX_GDSC>; - iommus = <&adreno_smmu 0>; - - nvmem-cells = <&speedbin_efuse>; - nvmem-cell-names = "speed_bin"; - - operating-points-v2 = <&gpu_opp_table>; - - status = "disabled"; - - #cooling-cells = <2>; - - gpu_opp_table: opp-table { - compatible = "operating-points-v2"; - - /* - * 624Mhz is only available on speed bins 0 and 3. - * 560Mhz is only available on speed bins 0, 2 and 3. - * All the rest are available on all bins of the hardware. - */ - opp-624000000 { - opp-hz = /bits/ 64 <624000000>; - opp-supported-hw = <0x09>; - }; - opp-560000000 { - opp-hz = /bits/ 64 <560000000>; - opp-supported-hw = <0x0d>; - }; - opp-510000000 { - opp-hz = /bits/ 64 <510000000>; - opp-supported-hw = <0xff>; - }; - opp-401800000 { - opp-hz = /bits/ 64 <401800000>; - opp-supported-hw = <0xff>; - }; - opp-315000000 { - opp-hz = /bits/ 64 <315000000>; - opp-supported-hw = <0xff>; - }; - opp-214000000 { - opp-hz = /bits/ 64 <214000000>; - opp-supported-hw = <0xff>; - }; - opp-133000000 { - opp-hz = /bits/ 64 <133000000>; - opp-supported-hw = <0xff>; - }; - }; - - zap-shader { - memory-region = <&gpu_mem>; - }; - }; - - tlmm: pinctrl@1010000 { - compatible = "qcom,msm8996-pinctrl"; - reg = <0x01010000 0x300000>; - interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - gpio-ranges = <&tlmm 0 0 150>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - - blsp1_spi1_default: blsp1-spi1-default-state { - spi-pins { - pins = "gpio0", "gpio1", "gpio3"; - function = "blsp_spi1"; - drive-strength = <12>; - bias-disable; - }; - - cs-pins { - pins = "gpio2"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - output-high; - }; - }; - - blsp1_spi1_sleep: blsp1-spi1-sleep-state { - pins = "gpio0", "gpio1", "gpio2", "gpio3"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - blsp2_uart2_2pins_default: blsp2-uart2-2pins-state { - pins = "gpio4", "gpio5"; - function = "blsp_uart8"; - drive-strength = <16>; - bias-disable; - }; - - blsp2_uart2_2pins_sleep: blsp2-uart2-2pins-sleep-state { - pins = "gpio4", "gpio5"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - blsp2_i2c2_default: blsp2-i2c2-state { - pins = "gpio6", "gpio7"; - function = "blsp_i2c8"; - drive-strength = <16>; - bias-disable; - }; - - blsp2_i2c2_sleep: blsp2-i2c2-sleep-state { - pins = "gpio6", "gpio7"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - blsp1_i2c6_default: blsp1-i2c6-state { - pins = "gpio27", "gpio28"; - function = "blsp_i2c6"; - drive-strength = <16>; - bias-disable; - }; - - blsp1_i2c6_sleep: blsp1-i2c6-sleep-state { - pins = "gpio27", "gpio28"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - - cci0_default: cci0-default-state { - pins = "gpio17", "gpio18"; - function = "cci_i2c"; - drive-strength = <16>; - bias-disable; - }; - - camera0_state_on: - camera_rear_default: camera-rear-default-state { - camera0_mclk: mclk0-pins { - pins = "gpio13"; - function = "cam_mclk"; - drive-strength = <16>; - bias-disable; - }; - - camera0_rst: rst-pins { - pins = "gpio25"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - }; - - camera0_pwdn: pwdn-pins { - pins = "gpio26"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - }; - }; - - cci1_default: cci1-default-state { - pins = "gpio19", "gpio20"; - function = "cci_i2c"; - drive-strength = <16>; - bias-disable; - }; - - camera1_state_on: - camera_board_default: camera-board-default-state { - mclk1-pins { - pins = "gpio14"; - function = "cam_mclk"; - drive-strength = <16>; - bias-disable; - }; - - pwdn-pins { - pins = "gpio98"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - }; - - rst-pins { - pins = "gpio104"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - }; - }; - - camera2_state_on: - camera_front_default: camera-front-default-state { - camera2_mclk: mclk2-pins { - pins = "gpio15"; - function = "cam_mclk"; - drive-strength = <16>; - bias-disable; - }; - - camera2_rst: rst-pins { - pins = "gpio23"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - }; - - pwdn-pins { - pins = "gpio133"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - }; - }; - - pcie0_state_on: pcie0-state-on-state { - perst-pins { - pins = "gpio35"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - clkreq-pins { - pins = "gpio36"; - function = "pci_e0"; - drive-strength = <2>; - bias-pull-up; - }; - - wake-pins { - pins = "gpio37"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - pcie0_state_off: pcie0-state-off-state { - perst-pins { - pins = "gpio35"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - clkreq-pins { - pins = "gpio36"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - wake-pins { - pins = "gpio37"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - }; - - blsp1_uart2_default: blsp1-uart2-default-state { - pins = "gpio41", "gpio42", "gpio43", "gpio44"; - function = "blsp_uart2"; - drive-strength = <16>; - bias-disable; - }; - - blsp1_uart2_sleep: blsp1-uart2-sleep-state { - pins = "gpio41", "gpio42", "gpio43", "gpio44"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - blsp1_i2c3_default: blsp1-i2c3-default-state { - pins = "gpio47", "gpio48"; - function = "blsp_i2c3"; - drive-strength = <16>; - bias-disable; - }; - - blsp1_i2c3_sleep: blsp1-i2c3-sleep-state { - pins = "gpio47", "gpio48"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - blsp2_uart3_4pins_default: blsp2-uart3-4pins-state { - pins = "gpio49", "gpio50", "gpio51", "gpio52"; - function = "blsp_uart9"; - drive-strength = <16>; - bias-disable; - }; - - blsp2_uart3_4pins_sleep: blsp2-uart3-4pins-sleep-state { - pins = "gpio49", "gpio50", "gpio51", "gpio52"; - function = "blsp_uart9"; - drive-strength = <2>; - bias-disable; - }; - - blsp2_i2c3_default: blsp2-i2c3-state-state { - pins = "gpio51", "gpio52"; - function = "blsp_i2c9"; - drive-strength = <16>; - bias-disable; - }; - - blsp2_i2c3_sleep: blsp2-i2c3-sleep-state { - pins = "gpio51", "gpio52"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - wcd_intr_default: wcd-intr-default-state { - pins = "gpio54"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - blsp2_i2c1_default: blsp2-i2c1-state { - pins = "gpio55", "gpio56"; - function = "blsp_i2c7"; - drive-strength = <16>; - bias-disable; - }; - - blsp2_i2c1_sleep: blsp2-i2c1-sleep-state { - pins = "gpio55", "gpio56"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - blsp2_i2c5_default: blsp2-i2c5-state { - pins = "gpio60", "gpio61"; - function = "blsp_i2c11"; - drive-strength = <2>; - bias-disable; - }; - - /* Sleep state for BLSP2_I2C5 is missing.. */ - - cdc_reset_active: cdc-reset-active-state { - pins = "gpio64"; - function = "gpio"; - drive-strength = <16>; - bias-pull-down; - output-high; - }; - - cdc_reset_sleep: cdc-reset-sleep-state { - pins = "gpio64"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - output-low; - }; - - blsp2_spi6_default: blsp2-spi6-default-state { - spi-pins { - pins = "gpio85", "gpio86", "gpio88"; - function = "blsp_spi12"; - drive-strength = <12>; - bias-disable; - }; - - cs-pins { - pins = "gpio87"; - function = "gpio"; - drive-strength = <16>; - bias-disable; - output-high; - }; - }; - - blsp2_spi6_sleep: blsp2-spi6-sleep-state { - pins = "gpio85", "gpio86", "gpio87", "gpio88"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - blsp2_i2c6_default: blsp2-i2c6-state { - pins = "gpio87", "gpio88"; - function = "blsp_i2c12"; - drive-strength = <16>; - bias-disable; - }; - - blsp2_i2c6_sleep: blsp2-i2c6-sleep-state { - pins = "gpio87", "gpio88"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - pcie1_state_on: pcie1-on-state { - perst-pins { - pins = "gpio130"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - clkreq-pins { - pins = "gpio131"; - function = "pci_e1"; - drive-strength = <2>; - bias-pull-up; - }; - - wake-pins { - pins = "gpio132"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - }; - - pcie1_state_off: pcie1-off-state { - /* Perst is missing? */ - clkreq-pins { - pins = "gpio131"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - wake-pins { - pins = "gpio132"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - }; - - pcie2_state_on: pcie2-on-state { - perst-pins { - pins = "gpio114"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - clkreq-pins { - pins = "gpio115"; - function = "pci_e2"; - drive-strength = <2>; - bias-pull-up; - }; - - wake-pins { - pins = "gpio116"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - }; - - pcie2_state_off: pcie2-off-state { - /* Perst is missing? */ - clkreq-pins { - pins = "gpio115"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - - wake-pins { - pins = "gpio116"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - }; - }; - - sdc1_state_on: sdc1-on-state { - clk-pins { - pins = "sdc1_clk"; - bias-disable; - drive-strength = <16>; - }; - - cmd-pins { - pins = "sdc1_cmd"; - bias-pull-up; - drive-strength = <10>; - }; - - data-pins { - pins = "sdc1_data"; - bias-pull-up; - drive-strength = <10>; - }; - - rclk-pins { - pins = "sdc1_rclk"; - bias-pull-down; - }; - }; - - sdc1_state_off: sdc1-off-state { - clk-pins { - pins = "sdc1_clk"; - bias-disable; - drive-strength = <2>; - }; - - cmd-pins { - pins = "sdc1_cmd"; - bias-pull-up; - drive-strength = <2>; - }; - - data-pins { - pins = "sdc1_data"; - bias-pull-up; - drive-strength = <2>; - }; - - rclk-pins { - pins = "sdc1_rclk"; - bias-pull-down; - }; - }; - - sdc2_state_on: sdc2-on-state { - clk-pins { - pins = "sdc2_clk"; - bias-disable; - drive-strength = <16>; - }; - - cmd-pins { - pins = "sdc2_cmd"; - bias-pull-up; - drive-strength = <10>; - }; - - data-pins { - pins = "sdc2_data"; - bias-pull-up; - drive-strength = <10>; - }; - }; - - sdc2_state_off: sdc2-off-state { - clk-pins { - pins = "sdc2_clk"; - bias-disable; - drive-strength = <2>; - }; - - cmd-pins { - pins = "sdc2_cmd"; - bias-pull-up; - drive-strength = <2>; - }; - - data-pins { - pins = "sdc2_data"; - bias-pull-up; - drive-strength = <2>; - }; - }; - }; - - sram@290000 { - compatible = "qcom,rpm-stats"; - reg = <0x00290000 0x10000>; - }; - - spmi_bus: spmi@400f000 { - compatible = "qcom,spmi-pmic-arb"; - reg = <0x0400f000 0x1000>, - <0x04400000 0x800000>, - <0x04c00000 0x800000>, - <0x05800000 0x200000>, - <0x0400a000 0x002100>; - reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; - interrupt-names = "periph_irq"; - interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>; - qcom,ee = <0>; - qcom,channel = <0>; - #address-cells = <2>; - #size-cells = <0>; - interrupt-controller; - #interrupt-cells = <4>; - }; - - bus@0 { - power-domains = <&gcc AGGRE0_NOC_GDSC>; - compatible = "simple-pm-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0xffffffff>; - - pcie0: pcie@600000 { - compatible = "qcom,pcie-msm8996"; - status = "disabled"; - power-domains = <&gcc PCIE0_GDSC>; - bus-range = <0x00 0xff>; - num-lanes = <1>; - - reg = <0x00600000 0x2000>, - <0x0c000000 0xf1d>, - <0x0c000f20 0xa8>, - <0x0c100000 0x100000>; - reg-names = "parf", "dbi", "elbi","config"; - - phys = <&pciephy_0>; - phy-names = "pciephy"; - - #address-cells = <3>; - #size-cells = <2>; - ranges = <0x01000000 0x0 0x00000000 0x0c200000 0x0 0x100000>, - <0x02000000 0x0 0x0c300000 0x0c300000 0x0 0xd00000>; - - device_type = "pci"; - - interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "msi"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ - <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ - <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ - <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ - - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&pcie0_state_on>; - pinctrl-1 = <&pcie0_state_off>; - - linux,pci-domain = <0>; - - clocks = <&gcc GCC_PCIE_0_PIPE_CLK>, - <&gcc GCC_PCIE_0_AUX_CLK>, - <&gcc GCC_PCIE_0_CFG_AHB_CLK>, - <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, - <&gcc GCC_PCIE_0_SLV_AXI_CLK>; - - clock-names = "pipe", - "aux", - "cfg", - "bus_master", - "bus_slave"; - }; - - pcie1: pcie@608000 { - compatible = "qcom,pcie-msm8996"; - power-domains = <&gcc PCIE1_GDSC>; - bus-range = <0x00 0xff>; - num-lanes = <1>; - - status = "disabled"; - - reg = <0x00608000 0x2000>, - <0x0d000000 0xf1d>, - <0x0d000f20 0xa8>, - <0x0d100000 0x100000>; - - reg-names = "parf", "dbi", "elbi","config"; - - phys = <&pciephy_1>; - phy-names = "pciephy"; - - #address-cells = <3>; - #size-cells = <2>; - ranges = <0x01000000 0x0 0x00000000 0x0d200000 0x0 0x100000>, - <0x02000000 0x0 0x0d300000 0x0d300000 0x0 0xd00000>; - - device_type = "pci"; - - interrupts = <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "msi"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc 0 272 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ - <0 0 0 2 &intc 0 273 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ - <0 0 0 3 &intc 0 274 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ - <0 0 0 4 &intc 0 275 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ - - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&pcie1_state_on>; - pinctrl-1 = <&pcie1_state_off>; - - linux,pci-domain = <1>; - - clocks = <&gcc GCC_PCIE_1_PIPE_CLK>, - <&gcc GCC_PCIE_1_AUX_CLK>, - <&gcc GCC_PCIE_1_CFG_AHB_CLK>, - <&gcc GCC_PCIE_1_MSTR_AXI_CLK>, - <&gcc GCC_PCIE_1_SLV_AXI_CLK>; - - clock-names = "pipe", - "aux", - "cfg", - "bus_master", - "bus_slave"; - }; - - pcie2: pcie@610000 { - compatible = "qcom,pcie-msm8996"; - power-domains = <&gcc PCIE2_GDSC>; - bus-range = <0x00 0xff>; - num-lanes = <1>; - status = "disabled"; - reg = <0x00610000 0x2000>, - <0x0e000000 0xf1d>, - <0x0e000f20 0xa8>, - <0x0e100000 0x100000>; - - reg-names = "parf", "dbi", "elbi","config"; - - phys = <&pciephy_2>; - phy-names = "pciephy"; - - #address-cells = <3>; - #size-cells = <2>; - ranges = <0x01000000 0x0 0x00000000 0x0e200000 0x0 0x100000>, - <0x02000000 0x0 0x0e300000 0x0e300000 0x0 0x1d00000>; - - device_type = "pci"; - - interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "msi"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ - <0 0 0 2 &intc 0 143 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ - <0 0 0 3 &intc 0 144 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ - <0 0 0 4 &intc 0 145 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ - - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&pcie2_state_on>; - pinctrl-1 = <&pcie2_state_off>; - - linux,pci-domain = <2>; - clocks = <&gcc GCC_PCIE_2_PIPE_CLK>, - <&gcc GCC_PCIE_2_AUX_CLK>, - <&gcc GCC_PCIE_2_CFG_AHB_CLK>, - <&gcc GCC_PCIE_2_MSTR_AXI_CLK>, - <&gcc GCC_PCIE_2_SLV_AXI_CLK>; - - clock-names = "pipe", - "aux", - "cfg", - "bus_master", - "bus_slave"; - }; - }; - - ufshc: ufshc@624000 { - compatible = "qcom,msm8996-ufshc", "qcom,ufshc", - "jedec,ufs-2.0"; - reg = <0x00624000 0x2500>; - interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; - - phys = <&ufsphy_lane>; - phy-names = "ufsphy"; - - power-domains = <&gcc UFS_GDSC>; - - clock-names = - "core_clk_src", - "core_clk", - "bus_clk", - "bus_aggr_clk", - "iface_clk", - "core_clk_unipro_src", - "core_clk_unipro", - "core_clk_ice", - "ref_clk", - "tx_lane0_sync_clk", - "rx_lane0_sync_clk"; - clocks = - <&gcc UFS_AXI_CLK_SRC>, - <&gcc GCC_UFS_AXI_CLK>, - <&gcc GCC_SYS_NOC_UFS_AXI_CLK>, - <&gcc GCC_AGGRE2_UFS_AXI_CLK>, - <&gcc GCC_UFS_AHB_CLK>, - <&gcc UFS_ICE_CORE_CLK_SRC>, - <&gcc GCC_UFS_UNIPRO_CORE_CLK>, - <&gcc GCC_UFS_ICE_CORE_CLK>, - <&rpmcc RPM_SMD_LN_BB_CLK>, - <&gcc GCC_UFS_TX_SYMBOL_0_CLK>, - <&gcc GCC_UFS_RX_SYMBOL_0_CLK>; - freq-table-hz = - <100000000 200000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>, - <150000000 300000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>, - <0 0>; - - interconnects = <&a2noc MASTER_UFS &bimc SLAVE_EBI_CH0>, - <&bimc MASTER_AMPSS_M0 &cnoc SLAVE_UFS_CFG>; - interconnect-names = "ufs-ddr", "cpu-ufs"; - - lanes-per-direction = <1>; - #reset-cells = <1>; - status = "disabled"; - }; - - ufsphy: phy@627000 { - compatible = "qcom,msm8996-qmp-ufs-phy"; - reg = <0x00627000 0x1c4>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - clocks = <&gcc GCC_UFS_CLKREF_CLK>; - clock-names = "ref"; - - resets = <&ufshc 0>; - reset-names = "ufsphy"; - status = "disabled"; - - ufsphy_lane: phy@627400 { - reg = <0x627400 0x12c>, - <0x627600 0x200>, - <0x627c00 0x1b4>; - #clock-cells = <1>; - #phy-cells = <0>; - }; - }; - - camss: camss@a34000 { - compatible = "qcom,msm8996-camss"; - reg = <0x00a34000 0x1000>, - <0x00a00030 0x4>, - <0x00a35000 0x1000>, - <0x00a00038 0x4>, - <0x00a36000 0x1000>, - <0x00a00040 0x4>, - <0x00a30000 0x100>, - <0x00a30400 0x100>, - <0x00a30800 0x100>, - <0x00a30c00 0x100>, - <0x00a31000 0x500>, - <0x00a00020 0x10>, - <0x00a10000 0x1000>, - <0x00a14000 0x1000>; - reg-names = "csiphy0", - "csiphy0_clk_mux", - "csiphy1", - "csiphy1_clk_mux", - "csiphy2", - "csiphy2_clk_mux", - "csid0", - "csid1", - "csid2", - "csid3", - "ispif", - "csi_clk_mux", - "vfe0", - "vfe1"; - interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 297 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 298 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 299 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 309 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 314 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "csiphy0", - "csiphy1", - "csiphy2", - "csid0", - "csid1", - "csid2", - "csid3", - "ispif", - "vfe0", - "vfe1"; - power-domains = <&mmcc VFE0_GDSC>, - <&mmcc VFE1_GDSC>; - clocks = <&mmcc CAMSS_TOP_AHB_CLK>, - <&mmcc CAMSS_ISPIF_AHB_CLK>, - <&mmcc CAMSS_CSI0PHYTIMER_CLK>, - <&mmcc CAMSS_CSI1PHYTIMER_CLK>, - <&mmcc CAMSS_CSI2PHYTIMER_CLK>, - <&mmcc CAMSS_CSI0_AHB_CLK>, - <&mmcc CAMSS_CSI0_CLK>, - <&mmcc CAMSS_CSI0PHY_CLK>, - <&mmcc CAMSS_CSI0PIX_CLK>, - <&mmcc CAMSS_CSI0RDI_CLK>, - <&mmcc CAMSS_CSI1_AHB_CLK>, - <&mmcc CAMSS_CSI1_CLK>, - <&mmcc CAMSS_CSI1PHY_CLK>, - <&mmcc CAMSS_CSI1PIX_CLK>, - <&mmcc CAMSS_CSI1RDI_CLK>, - <&mmcc CAMSS_CSI2_AHB_CLK>, - <&mmcc CAMSS_CSI2_CLK>, - <&mmcc CAMSS_CSI2PHY_CLK>, - <&mmcc CAMSS_CSI2PIX_CLK>, - <&mmcc CAMSS_CSI2RDI_CLK>, - <&mmcc CAMSS_CSI3_AHB_CLK>, - <&mmcc CAMSS_CSI3_CLK>, - <&mmcc CAMSS_CSI3PHY_CLK>, - <&mmcc CAMSS_CSI3PIX_CLK>, - <&mmcc CAMSS_CSI3RDI_CLK>, - <&mmcc CAMSS_AHB_CLK>, - <&mmcc CAMSS_VFE0_CLK>, - <&mmcc CAMSS_CSI_VFE0_CLK>, - <&mmcc CAMSS_VFE0_AHB_CLK>, - <&mmcc CAMSS_VFE0_STREAM_CLK>, - <&mmcc CAMSS_VFE1_CLK>, - <&mmcc CAMSS_CSI_VFE1_CLK>, - <&mmcc CAMSS_VFE1_AHB_CLK>, - <&mmcc CAMSS_VFE1_STREAM_CLK>, - <&mmcc CAMSS_VFE_AHB_CLK>, - <&mmcc CAMSS_VFE_AXI_CLK>; - clock-names = "top_ahb", - "ispif_ahb", - "csiphy0_timer", - "csiphy1_timer", - "csiphy2_timer", - "csi0_ahb", - "csi0", - "csi0_phy", - "csi0_pix", - "csi0_rdi", - "csi1_ahb", - "csi1", - "csi1_phy", - "csi1_pix", - "csi1_rdi", - "csi2_ahb", - "csi2", - "csi2_phy", - "csi2_pix", - "csi2_rdi", - "csi3_ahb", - "csi3", - "csi3_phy", - "csi3_pix", - "csi3_rdi", - "ahb", - "vfe0", - "csi_vfe0", - "vfe0_ahb", - "vfe0_stream", - "vfe1", - "csi_vfe1", - "vfe1_ahb", - "vfe1_stream", - "vfe_ahb", - "vfe_axi"; - iommus = <&vfe_smmu 0>, - <&vfe_smmu 1>, - <&vfe_smmu 2>, - <&vfe_smmu 3>; - status = "disabled"; - ports { - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - cci: cci@a0c000 { - compatible = "qcom,msm8996-cci"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xa0c000 0x1000>; - interrupts = <GIC_SPI 295 IRQ_TYPE_EDGE_RISING>; - power-domains = <&mmcc CAMSS_GDSC>; - clocks = <&mmcc CAMSS_TOP_AHB_CLK>, - <&mmcc CAMSS_CCI_AHB_CLK>, - <&mmcc CAMSS_CCI_CLK>, - <&mmcc CAMSS_AHB_CLK>; - clock-names = "camss_top_ahb", - "cci_ahb", - "cci", - "camss_ahb"; - assigned-clocks = <&mmcc CAMSS_CCI_AHB_CLK>, - <&mmcc CAMSS_CCI_CLK>; - assigned-clock-rates = <80000000>, <37500000>; - pinctrl-names = "default"; - pinctrl-0 = <&cci0_default &cci1_default>; - status = "disabled"; - - cci_i2c0: i2c-bus@0 { - reg = <0>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; - }; - - cci_i2c1: i2c-bus@1 { - reg = <1>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - adreno_smmu: iommu@b40000 { - compatible = "qcom,msm8996-smmu-v2", "qcom,adreno-smmu", "qcom,smmu-v2"; - reg = <0x00b40000 0x10000>; - - #global-interrupts = <1>; - interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - - clocks = <&gcc GCC_MMSS_BIMC_GFX_CLK>, - <&mmcc GPU_AHB_CLK>; - clock-names = "bus", "iface"; - - power-domains = <&mmcc GPU_GDSC>; - }; - - venus: video-codec@c00000 { - compatible = "qcom,msm8996-venus"; - reg = <0x00c00000 0xff000>; - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&mmcc VENUS_GDSC>; - clocks = <&mmcc VIDEO_CORE_CLK>, - <&mmcc VIDEO_AHB_CLK>, - <&mmcc VIDEO_AXI_CLK>, - <&mmcc VIDEO_MAXI_CLK>; - clock-names = "core", "iface", "bus", "mbus"; - interconnects = <&mnoc MASTER_VIDEO_P0 &bimc SLAVE_EBI_CH0>, - <&bimc MASTER_AMPSS_M0 &mnoc SLAVE_VENUS_CFG>; - interconnect-names = "video-mem", "cpu-cfg"; - iommus = <&venus_smmu 0x00>, - <&venus_smmu 0x01>, - <&venus_smmu 0x0a>, - <&venus_smmu 0x07>, - <&venus_smmu 0x0e>, - <&venus_smmu 0x0f>, - <&venus_smmu 0x08>, - <&venus_smmu 0x09>, - <&venus_smmu 0x0b>, - <&venus_smmu 0x0c>, - <&venus_smmu 0x0d>, - <&venus_smmu 0x10>, - <&venus_smmu 0x11>, - <&venus_smmu 0x21>, - <&venus_smmu 0x28>, - <&venus_smmu 0x29>, - <&venus_smmu 0x2b>, - <&venus_smmu 0x2c>, - <&venus_smmu 0x2d>, - <&venus_smmu 0x31>; - memory-region = <&venus_mem>; - status = "disabled"; - - video-decoder { - compatible = "venus-decoder"; - clocks = <&mmcc VIDEO_SUBCORE0_CLK>; - clock-names = "core"; - power-domains = <&mmcc VENUS_CORE0_GDSC>; - }; - - video-encoder { - compatible = "venus-encoder"; - clocks = <&mmcc VIDEO_SUBCORE1_CLK>; - clock-names = "core"; - power-domains = <&mmcc VENUS_CORE1_GDSC>; - }; - }; - - mdp_smmu: iommu@d00000 { - compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2"; - reg = <0x00d00000 0x10000>; - - #global-interrupts = <1>; - interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - clocks = <&mmcc SMMU_MDP_AXI_CLK>, - <&mmcc SMMU_MDP_AHB_CLK>; - clock-names = "bus", "iface"; - - power-domains = <&mmcc MDSS_GDSC>; - }; - - venus_smmu: iommu@d40000 { - compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2"; - reg = <0x00d40000 0x20000>; - #global-interrupts = <1>; - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&mmcc MMAGIC_VIDEO_GDSC>; - clocks = <&mmcc SMMU_VIDEO_AXI_CLK>, - <&mmcc SMMU_VIDEO_AHB_CLK>; - clock-names = "bus", "iface"; - #iommu-cells = <1>; - status = "okay"; - }; - - vfe_smmu: iommu@da0000 { - compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2"; - reg = <0x00da0000 0x10000>; - - #global-interrupts = <1>; - interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&mmcc MMAGIC_CAMSS_GDSC>; - clocks = <&mmcc SMMU_VFE_AXI_CLK>, - <&mmcc SMMU_VFE_AHB_CLK>; - clock-names = "bus", "iface"; - #iommu-cells = <1>; - }; - - lpass_q6_smmu: iommu@1600000 { - compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2"; - reg = <0x01600000 0x20000>; - #iommu-cells = <1>; - power-domains = <&gcc HLOS1_VOTE_LPASS_CORE_GDSC>; - - #global-interrupts = <1>; - interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>; - - clocks = <&gcc GCC_HLOS1_VOTE_LPASS_ADSP_SMMU_CLK>, - <&gcc GCC_HLOS1_VOTE_LPASS_CORE_SMMU_CLK>; - clock-names = "bus", "iface"; - }; - - slpi_pil: remoteproc@1c00000 { - compatible = "qcom,msm8996-slpi-pil"; - reg = <0x01c00000 0x4000>; - - interrupts-extended = <&intc 0 390 IRQ_TYPE_EDGE_RISING>, - <&slpi_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, - <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, - <&slpi_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, - <&slpi_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", - "fatal", - "ready", - "handover", - "stop-ack"; - - clocks = <&xo_board>, - <&rpmcc RPM_SMD_AGGR2_NOC_CLK>; - clock-names = "xo", "aggre2"; - - memory-region = <&slpi_mem>; - - qcom,smem-states = <&slpi_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - power-domains = <&rpmpd MSM8996_VDDSSCX>; - power-domain-names = "ssc_cx"; - - status = "disabled"; - - smd-edge { - interrupts = <GIC_SPI 176 IRQ_TYPE_EDGE_RISING>; - - label = "dsps"; - mboxes = <&apcs_glb 25>; - qcom,smd-edge = <3>; - qcom,remote-pid = <3>; - }; - }; - - mss_pil: remoteproc@2080000 { - compatible = "qcom,msm8996-mss-pil"; - reg = <0x2080000 0x100>, - <0x2180000 0x020>; - reg-names = "qdsp6", "rmb"; - - interrupts-extended = <&intc 0 448 IRQ_TYPE_EDGE_RISING>, - <&mpss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, - <&mpss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, - <&mpss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, - <&mpss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, - <&mpss_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", - "handover", "stop-ack", - "shutdown-ack"; - - clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, - <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>, - <&gcc GCC_BOOT_ROM_AHB_CLK>, - <&xo_board>, - <&gcc GCC_MSS_GPLL0_DIV_CLK>, - <&gcc GCC_MSS_SNOC_AXI_CLK>, - <&gcc GCC_MSS_MNOC_BIMC_AXI_CLK>, - <&rpmcc RPM_SMD_PCNOC_CLK>, - <&rpmcc RPM_SMD_QDSS_CLK>; - clock-names = "iface", "bus", "mem", "xo", "gpll0_mss", - "snoc_axi", "mnoc_axi", "pnoc", "qdss"; - - resets = <&gcc GCC_MSS_RESTART>; - reset-names = "mss_restart"; - - power-domains = <&rpmpd MSM8996_VDDCX>, - <&rpmpd MSM8996_VDDMX>; - power-domain-names = "cx", "mx"; - - qcom,smem-states = <&mpss_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - qcom,halt-regs = <&tcsr_1 0x3000 0x5000 0x4000>; - - status = "disabled"; - - mba { - memory-region = <&mba_mem>; - }; - - mpss { - memory-region = <&mpss_mem>; - }; - - metadata { - memory-region = <&mdata_mem>; - }; - - smd-edge { - interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; - - label = "mpss"; - mboxes = <&apcs_glb 12>; - qcom,smd-edge = <0>; - qcom,remote-pid = <1>; - }; - }; - - stm@3002000 { - compatible = "arm,coresight-stm", "arm,primecell"; - reg = <0x3002000 0x1000>, - <0x8280000 0x180000>; - reg-names = "stm-base", "stm-stimulus-base"; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - out-ports { - port { - stm_out: endpoint { - remote-endpoint = - <&funnel0_in>; - }; - }; - }; - }; - - tpiu@3020000 { - compatible = "arm,coresight-tpiu", "arm,primecell"; - reg = <0x3020000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - in-ports { - port { - tpiu_in: endpoint { - remote-endpoint = - <&replicator_out1>; - }; - }; - }; - }; - - funnel@3021000 { - compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; - reg = <0x3021000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - in-ports { - #address-cells = <1>; - #size-cells = <0>; - - port@7 { - reg = <7>; - funnel0_in: endpoint { - remote-endpoint = - <&stm_out>; - }; - }; - }; - - out-ports { - port { - funnel0_out: endpoint { - remote-endpoint = - <&merge_funnel_in0>; - }; - }; - }; - }; - - funnel@3022000 { - compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; - reg = <0x3022000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - in-ports { - #address-cells = <1>; - #size-cells = <0>; - - port@6 { - reg = <6>; - funnel1_in: endpoint { - remote-endpoint = - <&apss_merge_funnel_out>; - }; - }; - }; - - out-ports { - port { - funnel1_out: endpoint { - remote-endpoint = - <&merge_funnel_in1>; - }; - }; - }; - }; - - funnel@3023000 { - compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; - reg = <0x3023000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - - out-ports { - port { - funnel2_out: endpoint { - remote-endpoint = - <&merge_funnel_in2>; - }; - }; - }; - }; - - funnel@3025000 { - compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; - reg = <0x3025000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - in-ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - merge_funnel_in0: endpoint { - remote-endpoint = - <&funnel0_out>; - }; - }; - - port@1 { - reg = <1>; - merge_funnel_in1: endpoint { - remote-endpoint = - <&funnel1_out>; - }; - }; - - port@2 { - reg = <2>; - merge_funnel_in2: endpoint { - remote-endpoint = - <&funnel2_out>; - }; - }; - }; - - out-ports { - port { - merge_funnel_out: endpoint { - remote-endpoint = - <&etf_in>; - }; - }; - }; - }; - - replicator@3026000 { - compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; - reg = <0x3026000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - in-ports { - port { - replicator_in: endpoint { - remote-endpoint = - <&etf_out>; - }; - }; - }; - - out-ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - replicator_out0: endpoint { - remote-endpoint = - <&etr_in>; - }; - }; - - port@1 { - reg = <1>; - replicator_out1: endpoint { - remote-endpoint = - <&tpiu_in>; - }; - }; - }; - }; - - etf@3027000 { - compatible = "arm,coresight-tmc", "arm,primecell"; - reg = <0x3027000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - in-ports { - port { - etf_in: endpoint { - remote-endpoint = - <&merge_funnel_out>; - }; - }; - }; - - out-ports { - port { - etf_out: endpoint { - remote-endpoint = - <&replicator_in>; - }; - }; - }; - }; - - etr@3028000 { - compatible = "arm,coresight-tmc", "arm,primecell"; - reg = <0x3028000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - arm,scatter-gather; - - in-ports { - port { - etr_in: endpoint { - remote-endpoint = - <&replicator_out0>; - }; - }; - }; - }; - - debug@3810000 { - compatible = "arm,coresight-cpu-debug", "arm,primecell"; - reg = <0x3810000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>; - clock-names = "apb_pclk"; - - cpu = <&CPU0>; - }; - - etm@3840000 { - compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0x3840000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - cpu = <&CPU0>; - - out-ports { - port { - etm0_out: endpoint { - remote-endpoint = - <&apss_funnel0_in0>; - }; - }; - }; - }; - - debug@3910000 { - compatible = "arm,coresight-cpu-debug", "arm,primecell"; - reg = <0x3910000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>; - clock-names = "apb_pclk"; - - cpu = <&CPU1>; - }; - - etm@3940000 { - compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0x3940000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - cpu = <&CPU1>; - - out-ports { - port { - etm1_out: endpoint { - remote-endpoint = - <&apss_funnel0_in1>; - }; - }; - }; - }; - - funnel@39b0000 { /* APSS Funnel 0 */ - compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; - reg = <0x39b0000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - in-ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - apss_funnel0_in0: endpoint { - remote-endpoint = <&etm0_out>; - }; - }; - - port@1 { - reg = <1>; - apss_funnel0_in1: endpoint { - remote-endpoint = <&etm1_out>; - }; - }; - }; - - out-ports { - port { - apss_funnel0_out: endpoint { - remote-endpoint = - <&apss_merge_funnel_in0>; - }; - }; - }; - }; - - debug@3a10000 { - compatible = "arm,coresight-cpu-debug", "arm,primecell"; - reg = <0x3a10000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>; - clock-names = "apb_pclk"; - - cpu = <&CPU2>; - }; - - etm@3a40000 { - compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0x3a40000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - cpu = <&CPU2>; - - out-ports { - port { - etm2_out: endpoint { - remote-endpoint = - <&apss_funnel1_in0>; - }; - }; - }; - }; - - debug@3b10000 { - compatible = "arm,coresight-cpu-debug", "arm,primecell"; - reg = <0x3b10000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>; - clock-names = "apb_pclk"; - - cpu = <&CPU3>; - }; - - etm@3b40000 { - compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0x3b40000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - cpu = <&CPU3>; - - out-ports { - port { - etm3_out: endpoint { - remote-endpoint = - <&apss_funnel1_in1>; - }; - }; - }; - }; - - funnel@3bb0000 { /* APSS Funnel 1 */ - compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; - reg = <0x3bb0000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - in-ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - apss_funnel1_in0: endpoint { - remote-endpoint = <&etm2_out>; - }; - }; - - port@1 { - reg = <1>; - apss_funnel1_in1: endpoint { - remote-endpoint = <&etm3_out>; - }; - }; - }; - - out-ports { - port { - apss_funnel1_out: endpoint { - remote-endpoint = - <&apss_merge_funnel_in1>; - }; - }; - }; - }; - - funnel@3bc0000 { - compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; - reg = <0x3bc0000 0x1000>; - - clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; - clock-names = "apb_pclk", "atclk"; - - in-ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - apss_merge_funnel_in0: endpoint { - remote-endpoint = - <&apss_funnel0_out>; - }; - }; - - port@1 { - reg = <1>; - apss_merge_funnel_in1: endpoint { - remote-endpoint = - <&apss_funnel1_out>; - }; - }; - }; - - out-ports { - port { - apss_merge_funnel_out: endpoint { - remote-endpoint = - <&funnel1_in>; - }; - }; - }; - }; - - kryocc: clock-controller@6400000 { - compatible = "qcom,msm8996-apcc"; - reg = <0x06400000 0x90000>; - - clock-names = "xo", "sys_apcs_aux"; - clocks = <&rpmcc RPM_SMD_XO_A_CLK_SRC>, <&apcs_glb>; - - #clock-cells = <1>; - }; - - usb3: usb@6af8800 { - compatible = "qcom,msm8996-dwc3", "qcom,dwc3"; - reg = <0x06af8800 0x400>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "hs_phy_irq", "ss_phy_irq"; - - clocks = <&gcc GCC_SYS_NOC_USB3_AXI_CLK>, - <&gcc GCC_USB30_MASTER_CLK>, - <&gcc GCC_AGGRE2_USB3_AXI_CLK>, - <&gcc GCC_USB30_SLEEP_CLK>, - <&gcc GCC_USB30_MOCK_UTMI_CLK>; - clock-names = "cfg_noc", - "core", - "iface", - "sleep", - "mock_utmi"; - - assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_MASTER_CLK>; - assigned-clock-rates = <19200000>, <120000000>; - - interconnects = <&a2noc MASTER_USB3 &bimc SLAVE_EBI_CH0>, - <&bimc MASTER_AMPSS_M0 &snoc SLAVE_USB3>; - interconnect-names = "usb-ddr", "apps-usb"; - - power-domains = <&gcc USB30_GDSC>; - status = "disabled"; - - usb3_dwc3: usb@6a00000 { - compatible = "snps,dwc3"; - reg = <0x06a00000 0xcc00>; - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; - phys = <&hsusb_phy1>, <&ssusb_phy_0>; - phy-names = "usb2-phy", "usb3-phy"; - snps,hird-threshold = /bits/ 8 <0>; - snps,dis_u2_susphy_quirk; - snps,dis_enblslpm_quirk; - snps,is-utmi-l1-suspend; - tx-fifo-resize; - }; - }; - - usb3phy: phy@7410000 { - compatible = "qcom,msm8996-qmp-usb3-phy"; - reg = <0x07410000 0x1c4>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - clocks = <&gcc GCC_USB3_PHY_AUX_CLK>, - <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, - <&gcc GCC_USB3_CLKREF_CLK>; - clock-names = "aux", "cfg_ahb", "ref"; - - resets = <&gcc GCC_USB3_PHY_BCR>, - <&gcc GCC_USB3PHY_PHY_BCR>; - reset-names = "phy", "common"; - status = "disabled"; - - ssusb_phy_0: phy@7410200 { - reg = <0x07410200 0x200>, - <0x07410400 0x130>, - <0x07410600 0x1a8>; - #phy-cells = <0>; - - #clock-cells = <0>; - clock-output-names = "usb3_phy_pipe_clk_src"; - clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>; - clock-names = "pipe0"; - }; - }; - - hsusb_phy1: phy@7411000 { - compatible = "qcom,msm8996-qusb2-phy"; - reg = <0x07411000 0x180>; - #phy-cells = <0>; - - clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, - <&gcc GCC_RX1_USB2_CLKREF_CLK>; - clock-names = "cfg_ahb", "ref"; - - resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; - nvmem-cells = <&qusb2p_hstx_trim>; - status = "disabled"; - }; - - hsusb_phy2: phy@7412000 { - compatible = "qcom,msm8996-qusb2-phy"; - reg = <0x07412000 0x180>; - #phy-cells = <0>; - - clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, - <&gcc GCC_RX2_USB2_CLKREF_CLK>; - clock-names = "cfg_ahb", "ref"; - - resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; - nvmem-cells = <&qusb2s_hstx_trim>; - status = "disabled"; - }; - - sdhc1: mmc@7464900 { - compatible = "qcom,msm8996-sdhci", "qcom,sdhci-msm-v4"; - reg = <0x07464900 0x11c>, <0x07464000 0x800>; - reg-names = "hc", "core"; - - interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "hc_irq", "pwr_irq"; - - clock-names = "iface", "core", "xo"; - clocks = <&gcc GCC_SDCC1_AHB_CLK>, - <&gcc GCC_SDCC1_APPS_CLK>, - <&rpmcc RPM_SMD_XO_CLK_SRC>; - resets = <&gcc GCC_SDCC1_BCR>; - - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sdc1_state_on>; - pinctrl-1 = <&sdc1_state_off>; - - bus-width = <8>; - non-removable; - status = "disabled"; - }; - - sdhc2: mmc@74a4900 { - compatible = "qcom,msm8996-sdhci", "qcom,sdhci-msm-v4"; - reg = <0x074a4900 0x314>, <0x074a4000 0x800>; - reg-names = "hc", "core"; - - interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "hc_irq", "pwr_irq"; - - clock-names = "iface", "core", "xo"; - clocks = <&gcc GCC_SDCC2_AHB_CLK>, - <&gcc GCC_SDCC2_APPS_CLK>, - <&rpmcc RPM_SMD_XO_CLK_SRC>; - resets = <&gcc GCC_SDCC2_BCR>; - - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sdc2_state_on>; - pinctrl-1 = <&sdc2_state_off>; - - bus-width = <4>; - status = "disabled"; - }; - - blsp1_dma: dma-controller@7544000 { - compatible = "qcom,bam-v1.7.0"; - reg = <0x07544000 0x2b000>; - interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "bam_clk"; - qcom,controlled-remotely; - #dma-cells = <1>; - qcom,ee = <0>; - }; - - blsp1_uart2: serial@7570000 { - compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0x07570000 0x1000>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp1_uart2_default>; - pinctrl-1 = <&blsp1_uart2_sleep>; - dmas = <&blsp1_dma 2>, <&blsp1_dma 3>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - blsp1_spi1: spi@7575000 { - compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x07575000 0x600>; - interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp1_spi1_default>; - pinctrl-1 = <&blsp1_spi1_sleep>; - dmas = <&blsp1_dma 12>, <&blsp1_dma 13>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp1_i2c3: i2c@7577000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x07577000 0x1000>; - interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp1_i2c3_default>; - pinctrl-1 = <&blsp1_i2c3_sleep>; - dmas = <&blsp1_dma 16>, <&blsp1_dma 17>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp1_i2c6: i2c@757a000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x757a000 0x1000>; - interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp1_i2c6_default>; - pinctrl-1 = <&blsp1_i2c6_sleep>; - dmas = <&blsp1_dma 22>, <&blsp1_dma 23>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp2_dma: dma-controller@7584000 { - compatible = "qcom,bam-v1.7.0"; - reg = <0x07584000 0x2b000>; - interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP2_AHB_CLK>; - clock-names = "bam_clk"; - qcom,controlled-remotely; - #dma-cells = <1>; - qcom,ee = <0>; - }; - - blsp2_uart2: serial@75b0000 { - compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0x075b0000 0x1000>; - interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>, - <&gcc GCC_BLSP2_AHB_CLK>; - clock-names = "core", "iface"; - status = "disabled"; - }; - - blsp2_uart3: serial@75b1000 { - compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0x075b1000 0x1000>; - interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP2_UART3_APPS_CLK>, - <&gcc GCC_BLSP2_AHB_CLK>; - clock-names = "core", "iface"; - status = "disabled"; - }; - - blsp2_i2c1: i2c@75b5000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x075b5000 0x1000>; - interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>, - <&gcc GCC_BLSP2_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp2_i2c1_default>; - pinctrl-1 = <&blsp2_i2c1_sleep>; - dmas = <&blsp2_dma 12>, <&blsp2_dma 13>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp2_i2c2: i2c@75b6000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x075b6000 0x1000>; - interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>, - <&gcc GCC_BLSP2_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp2_i2c2_default>; - pinctrl-1 = <&blsp2_i2c2_sleep>; - dmas = <&blsp2_dma 14>, <&blsp2_dma 15>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp2_i2c3: i2c@75b7000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x075b7000 0x1000>; - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP2_QUP3_I2C_APPS_CLK>, - <&gcc GCC_BLSP2_AHB_CLK>; - clock-names = "core", "iface"; - clock-frequency = <400000>; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp2_i2c3_default>; - pinctrl-1 = <&blsp2_i2c3_sleep>; - dmas = <&blsp2_dma 16>, <&blsp2_dma 17>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp2_i2c5: i2c@75b9000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x75b9000 0x1000>; - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP2_QUP5_I2C_APPS_CLK>, - <&gcc GCC_BLSP2_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp2_i2c5_default>; - dmas = <&blsp2_dma 20>, <&blsp2_dma 21>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp2_i2c6: i2c@75ba000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x75ba000 0x1000>; - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP2_QUP6_I2C_APPS_CLK>, - <&gcc GCC_BLSP2_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp2_i2c6_default>; - pinctrl-1 = <&blsp2_i2c6_sleep>; - dmas = <&blsp2_dma 22>, <&blsp2_dma 23>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp2_spi6: spi@75ba000 { - compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x075ba000 0x600>; - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP2_QUP6_SPI_APPS_CLK>, - <&gcc GCC_BLSP2_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp2_spi6_default>; - pinctrl-1 = <&blsp2_spi6_sleep>; - dmas = <&blsp2_dma 22>, <&blsp2_dma 23>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - usb2: usb@76f8800 { - compatible = "qcom,msm8996-dwc3", "qcom,dwc3"; - reg = <0x076f8800 0x400>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "hs_phy_irq"; - - clocks = <&gcc GCC_PERIPH_NOC_USB20_AHB_CLK>, - <&gcc GCC_USB20_MASTER_CLK>, - <&gcc GCC_USB20_MOCK_UTMI_CLK>, - <&gcc GCC_USB20_SLEEP_CLK>, - <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>; - clock-names = "cfg_noc", - "core", - "iface", - "sleep", - "mock_utmi"; - - assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>, - <&gcc GCC_USB20_MASTER_CLK>; - assigned-clock-rates = <19200000>, <60000000>; - - power-domains = <&gcc USB30_GDSC>; - qcom,select-utmi-as-pipe-clk; - status = "disabled"; - - usb2_dwc3: usb@7600000 { - compatible = "snps,dwc3"; - reg = <0x07600000 0xcc00>; - interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; - phys = <&hsusb_phy2>; - phy-names = "usb2-phy"; - maximum-speed = "high-speed"; - snps,dis_u2_susphy_quirk; - snps,dis_enblslpm_quirk; - }; - }; - - slimbam: dma-controller@9184000 { - compatible = "qcom,bam-v1.7.0"; - qcom,controlled-remotely; - reg = <0x09184000 0x32000>; - num-channels = <31>; - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; - #dma-cells = <1>; - qcom,ee = <1>; - qcom,num-ees = <2>; - }; - - slim_msm: slim-ngd@91c0000 { - compatible = "qcom,slim-ngd-v1.5.0"; - reg = <0x091c0000 0x2c000>; - interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&slimbam 3>, <&slimbam 4>; - dma-names = "rx", "tx"; - #address-cells = <1>; - #size-cells = <0>; - - status = "disabled"; - }; - - adsp_pil: remoteproc@9300000 { - compatible = "qcom,msm8996-adsp-pil"; - reg = <0x09300000 0x80000>; - - interrupts-extended = <&intc 0 162 IRQ_TYPE_EDGE_RISING>, - <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, - <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, - <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, - <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", - "handover", "stop-ack"; - - clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>; - clock-names = "xo"; - - memory-region = <&adsp_mem>; - - qcom,smem-states = <&adsp_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - power-domains = <&rpmpd MSM8996_VDDCX>; - power-domain-names = "cx"; - - status = "disabled"; - - smd-edge { - interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>; - - label = "lpass"; - mboxes = <&apcs_glb 8>; - qcom,smd-edge = <1>; - qcom,remote-pid = <2>; - - apr { - power-domains = <&gcc HLOS1_VOTE_LPASS_ADSP_GDSC>; - compatible = "qcom,apr-v2"; - qcom,smd-channels = "apr_audio_svc"; - qcom,domain = <APR_DOMAIN_ADSP>; - #address-cells = <1>; - #size-cells = <0>; - - service@3 { - reg = <APR_SVC_ADSP_CORE>; - compatible = "qcom,q6core"; - }; - - q6afe: service@4 { - compatible = "qcom,q6afe"; - reg = <APR_SVC_AFE>; - q6afedai: dais { - compatible = "qcom,q6afe-dais"; - #address-cells = <1>; - #size-cells = <0>; - #sound-dai-cells = <1>; - dai@1 { - reg = <1>; - }; - }; - }; - - q6asm: service@7 { - compatible = "qcom,q6asm"; - reg = <APR_SVC_ASM>; - q6asmdai: dais { - compatible = "qcom,q6asm-dais"; - #address-cells = <1>; - #size-cells = <0>; - #sound-dai-cells = <1>; - iommus = <&lpass_q6_smmu 1>; - }; - }; - - q6adm: service@8 { - compatible = "qcom,q6adm"; - reg = <APR_SVC_ADM>; - q6routing: routing { - compatible = "qcom,q6adm-routing"; - #sound-dai-cells = <0>; - }; - }; - }; - }; - }; - - apcs_glb: mailbox@9820000 { - compatible = "qcom,msm8996-apcs-hmss-global"; - reg = <0x09820000 0x1000>; - - #mbox-cells = <1>; - #clock-cells = <0>; - }; - - timer@9840000 { - #address-cells = <1>; - #size-cells = <1>; - ranges; - compatible = "arm,armv7-timer-mem"; - reg = <0x09840000 0x1000>; - clock-frequency = <19200000>; - - frame@9850000 { - frame-number = <0>; - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x09850000 0x1000>, - <0x09860000 0x1000>; - }; - - frame@9870000 { - frame-number = <1>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x09870000 0x1000>; - status = "disabled"; - }; - - frame@9880000 { - frame-number = <2>; - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x09880000 0x1000>; - status = "disabled"; - }; - - frame@9890000 { - frame-number = <3>; - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x09890000 0x1000>; - status = "disabled"; - }; - - frame@98a0000 { - frame-number = <4>; - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x098a0000 0x1000>; - status = "disabled"; - }; - - frame@98b0000 { - frame-number = <5>; - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x098b0000 0x1000>; - status = "disabled"; - }; - - frame@98c0000 { - frame-number = <6>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x098c0000 0x1000>; - status = "disabled"; - }; - }; - - saw3: syscon@9a10000 { - compatible = "syscon"; - reg = <0x09a10000 0x1000>; - }; - - cbf: clock-controller@9a11000 { - compatible = "qcom,msm8996-cbf"; - reg = <0x09a11000 0x10000>; - clocks = <&rpmcc RPM_SMD_XO_A_CLK_SRC>, <&apcs_glb>; - #clock-cells = <0>; - #interconnect-cells = <1>; - }; - - intc: interrupt-controller@9bc0000 { - compatible = "qcom,msm8996-gic-v3", "arm,gic-v3"; - #interrupt-cells = <3>; - interrupt-controller; - #redistributor-regions = <1>; - redistributor-stride = <0x0 0x40000>; - reg = <0x09bc0000 0x10000>, - <0x09c00000 0x100000>; - interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - - sound: sound { - }; - - thermal-zones { - cpu0-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 3>; - - trips { - cpu0_alert0: trip-point0 { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu0_crit: cpu-crit { - temperature = <110000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - }; - - cpu1-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 5>; - - trips { - cpu1_alert0: trip-point0 { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu1_crit: cpu-crit { - temperature = <110000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - }; - - cpu2-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 8>; - - trips { - cpu2_alert0: trip-point0 { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu2_crit: cpu-crit { - temperature = <110000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - }; - - cpu3-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 10>; - - trips { - cpu3_alert0: trip-point0 { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu3_crit: cpu-crit { - temperature = <110000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - }; - - gpu-top-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens1 6>; - - trips { - gpu1_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - }; - - cooling-maps { - map0 { - trip = <&gpu1_alert0>; - cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - - gpu-bottom-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens1 7>; - - trips { - gpu2_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - }; - - cooling-maps { - map0 { - trip = <&gpu2_alert0>; - cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - - m4m-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 1>; - - trips { - m4m_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - l3-or-venus-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 2>; - - trips { - l3_or_venus_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - cluster0-l2-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 7>; - - trips { - cluster0_l2_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - cluster1-l2-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 12>; - - trips { - cluster1_l2_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - camera-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens1 1>; - - trips { - camera_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - q6-dsp-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens1 2>; - - trips { - q6_dsp_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - mem-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens1 3>; - - trips { - mem_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - modemtx-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens1 4>; - - trips { - modemtx_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, - <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, - <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; - }; -}; diff --git a/arch/arm/dts/pm8916.dtsi b/arch/arm/dts/pm8916.dtsi deleted file mode 100644 index f4de8678774..00000000000 --- a/arch/arm/dts/pm8916.dtsi +++ /dev/null @@ -1,178 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include <dt-bindings/iio/qcom,spmi-vadc.h> -#include <dt-bindings/input/linux-event-codes.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/spmi/spmi.h> - -&spmi_bus { - - pm8916_0: pmic@0 { - compatible = "qcom,pm8916", "qcom,spmi-pmic"; - reg = <0x0 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pon@800 { - compatible = "qcom,pm8916-pon"; - reg = <0x800>; - mode-bootloader = <0x2>; - mode-recovery = <0x1>; - - pwrkey { - compatible = "qcom,pm8941-pwrkey"; - interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; - debounce = <15625>; - bias-pull-up; - linux,code = <KEY_POWER>; - }; - - pm8916_resin: resin { - compatible = "qcom,pm8941-resin"; - interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; - debounce = <15625>; - bias-pull-up; - status = "disabled"; - }; - - watchdog { - compatible = "qcom,pm8916-wdt"; - interrupts = <0x0 0x8 6 IRQ_TYPE_EDGE_RISING>; - timeout-sec = <60>; - }; - }; - - pm8916_usbin: usb-detect@1300 { - compatible = "qcom,pm8941-misc"; - reg = <0x1300>; - interrupts = <0x0 0x13 1 IRQ_TYPE_EDGE_BOTH>; - interrupt-names = "usb_vbus"; - status = "disabled"; - }; - - pm8916_temp: temp-alarm@2400 { - compatible = "qcom,spmi-temp-alarm"; - reg = <0x2400>; - interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>; - io-channels = <&pm8916_vadc VADC_DIE_TEMP>; - io-channel-names = "thermal"; - #thermal-sensor-cells = <0>; - }; - - pm8916_vadc: adc@3100 { - compatible = "qcom,spmi-vadc"; - reg = <0x3100>; - interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; - #address-cells = <1>; - #size-cells = <0>; - #io-channel-cells = <1>; - - channel@0 { - reg = <VADC_USBIN>; - qcom,pre-scaling = <1 10>; - }; - channel@7 { - reg = <VADC_VSYS>; - qcom,pre-scaling = <1 3>; - }; - channel@8 { - reg = <VADC_DIE_TEMP>; - }; - channel@9 { - reg = <VADC_REF_625MV>; - }; - channel@a { - reg = <VADC_REF_1250MV>; - }; - channel@e { - reg = <VADC_GND_REF>; - }; - channel@f { - reg = <VADC_VDD_VADC>; - }; - }; - - rtc@6000 { - compatible = "qcom,pm8941-rtc"; - reg = <0x6000>, <0x6100>; - reg-names = "rtc", "alarm"; - interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; - }; - - pm8916_mpps: mpps@a000 { - compatible = "qcom,pm8916-mpp", "qcom,spmi-mpp"; - reg = <0xa000>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pm8916_mpps 0 0 4>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - pm8916_gpios: gpio@c000 { - compatible = "qcom,pm8916-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8916_gpios 0 0 4>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - pm8916_1: pmic@1 { - compatible = "qcom,pm8916", "qcom,spmi-pmic"; - reg = <0x1 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pm8916_pwm: pwm { - compatible = "qcom,pm8916-pwm"; - - #pwm-cells = <2>; - - status = "disabled"; - }; - - pm8916_vib: vibrator@c000 { - compatible = "qcom,pm8916-vib"; - reg = <0xc000>; - status = "disabled"; - }; - - pm8916_codec: audio-codec@f000 { - compatible = "qcom,pm8916-wcd-analog-codec"; - reg = <0xf000>; - interrupt-parent = <&spmi_bus>; - interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>, - <0x1 0xf0 0x1 IRQ_TYPE_NONE>, - <0x1 0xf0 0x2 IRQ_TYPE_NONE>, - <0x1 0xf0 0x3 IRQ_TYPE_NONE>, - <0x1 0xf0 0x4 IRQ_TYPE_NONE>, - <0x1 0xf0 0x5 IRQ_TYPE_NONE>, - <0x1 0xf0 0x6 IRQ_TYPE_NONE>, - <0x1 0xf0 0x7 IRQ_TYPE_NONE>, - <0x1 0xf1 0x0 IRQ_TYPE_NONE>, - <0x1 0xf1 0x1 IRQ_TYPE_NONE>, - <0x1 0xf1 0x2 IRQ_TYPE_NONE>, - <0x1 0xf1 0x3 IRQ_TYPE_NONE>, - <0x1 0xf1 0x4 IRQ_TYPE_NONE>, - <0x1 0xf1 0x5 IRQ_TYPE_NONE>; - interrupt-names = "cdc_spk_cnp_int", - "cdc_spk_clip_int", - "cdc_spk_ocp_int", - "mbhc_ins_rem_det1", - "mbhc_but_rel_det", - "mbhc_but_press_det", - "mbhc_ins_rem_det", - "mbhc_switch_int", - "cdc_ear_ocp_int", - "cdc_hphr_ocp_int", - "cdc_hphl_ocp_det", - "cdc_ear_cnp_int", - "cdc_hphr_cnp_int", - "cdc_hphl_cnp_int"; - #sound-dai-cells = <1>; - status = "disabled"; - }; - }; -}; diff --git a/arch/arm/dts/pm8994.dtsi b/arch/arm/dts/pm8994.dtsi deleted file mode 100644 index d44a95caf04..00000000000 --- a/arch/arm/dts/pm8994.dtsi +++ /dev/null @@ -1,152 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include <dt-bindings/iio/qcom,spmi-vadc.h> -#include <dt-bindings/input/linux-event-codes.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/spmi/spmi.h> - -/ { - thermal-zones { - pm8994-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&pm8994_temp>; - - trips { - pm8994_alert0: pm8994-alert0 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - pm8994_crit: pm8994-crit { - temperature = <125000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - }; - }; -}; - -&spmi_bus { - - pmic@0 { - compatible = "qcom,pm8994", "qcom,spmi-pmic"; - reg = <0x0 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - rtc@6000 { - compatible = "qcom,pm8941-rtc"; - reg = <0x6000>, <0x6100>; - reg-names = "rtc", "alarm"; - interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; - }; - - pm8994_pon: pon@800 { - compatible = "qcom,pm8916-pon"; - reg = <0x800>; - mode-bootloader = <0x2>; - mode-recovery = <0x1>; - - pwrkey { - compatible = "qcom,pm8941-pwrkey"; - interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; - debounce = <15625>; - bias-pull-up; - linux,code = <KEY_POWER>; - }; - - pm8994_resin: resin { - compatible = "qcom,pm8941-resin"; - interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; - debounce = <15625>; - bias-pull-up; - status = "disabled"; - }; - }; - - pm8994_temp: temp-alarm@2400 { - compatible = "qcom,spmi-temp-alarm"; - reg = <0x2400>; - interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>; - io-channels = <&pm8994_vadc VADC_DIE_TEMP>; - io-channel-names = "thermal"; - #thermal-sensor-cells = <0>; - }; - - pm8994_vadc: adc@3100 { - compatible = "qcom,spmi-vadc"; - reg = <0x3100>; - interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; - #address-cells = <1>; - #size-cells = <0>; - #io-channel-cells = <1>; - - channel@7 { - reg = <VADC_VSYS>; - qcom,pre-scaling = <1 3>; - label = "vph_pwr"; - }; - channel@8 { - reg = <VADC_DIE_TEMP>; - label = "die_temp"; - }; - channel@9 { - reg = <VADC_REF_625MV>; - label = "ref_625mv"; - }; - channel@a { - reg = <VADC_REF_1250MV>; - label = "ref_1250mv"; - }; - channel@e { - reg = <VADC_GND_REF>; - }; - channel@f { - reg = <VADC_VDD_VADC>; - }; - }; - - pm8994_gpios: gpio@c000 { - compatible = "qcom,pm8994-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8994_gpios 0 0 22>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - pm8994_mpps: mpps@a000 { - compatible = "qcom,pm8994-mpp", "qcom,spmi-mpp"; - reg = <0xa000>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pm8994_mpps 0 0 8>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - pmic@1 { - compatible = "qcom,pm8994", "qcom,spmi-pmic"; - reg = <0x1 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pm8994_lpg: pwm { - compatible = "qcom,pm8994-lpg"; - - #address-cells = <1>; - #size-cells = <0>; - #pwm-cells = <2>; - - status = "disabled"; - }; - - pm8994_spmi_regulators: regulators { - compatible = "qcom,pm8994-regulators"; - }; - }; -}; diff --git a/arch/arm/dts/pm8998.dtsi b/arch/arm/dts/pm8998.dtsi deleted file mode 100644 index 3f82715392c..00000000000 --- a/arch/arm/dts/pm8998.dtsi +++ /dev/null @@ -1,130 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* Copyright 2018 Google LLC. */ - -#include <dt-bindings/iio/qcom,spmi-vadc.h> -#include <dt-bindings/input/linux-event-codes.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/spmi/spmi.h> -#include <dt-bindings/thermal/thermal.h> - -/ { - thermal-zones { - pm8998-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&pm8998_temp>; - - trips { - pm8998_alert0: pm8998-alert0 { - temperature = <105000>; - hysteresis = <2000>; - type = "passive"; - }; - pm8998_crit: pm8998-crit { - temperature = <125000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - }; - }; -}; - -&spmi_bus { - pm8998_lsid0: pmic@0 { - compatible = "qcom,pm8998", "qcom,spmi-pmic"; - reg = <0x0 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pm8998_pon: pon@800 { - compatible = "qcom,pm8998-pon"; - - reg = <0x800>; - mode-bootloader = <0x2>; - mode-recovery = <0x1>; - - pm8998_pwrkey: pwrkey { - compatible = "qcom,pm8941-pwrkey"; - interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; - debounce = <15625>; - bias-pull-up; - linux,code = <KEY_POWER>; - }; - - pm8998_resin: resin { - compatible = "qcom,pm8941-resin"; - interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; - debounce = <15625>; - bias-pull-up; - status = "disabled"; - }; - }; - - pm8998_temp: temp-alarm@2400 { - compatible = "qcom,spmi-temp-alarm"; - reg = <0x2400>; - interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>; - io-channels = <&pm8998_adc ADC5_DIE_TEMP>; - io-channel-names = "thermal"; - #thermal-sensor-cells = <0>; - }; - - pm8998_coincell: charger@2800 { - compatible = "qcom,pm8998-coincell", "qcom,pm8941-coincell"; - reg = <0x2800>; - - status = "disabled"; - }; - - pm8998_adc: adc@3100 { - compatible = "qcom,spmi-adc-rev2"; - reg = <0x3100>; - interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; - #address-cells = <1>; - #size-cells = <0>; - #io-channel-cells = <1>; - - channel@6 { - reg = <ADC5_DIE_TEMP>; - label = "die_temp"; - }; - }; - - pm8998_adc_tm: adc-tm@3400 { - compatible = "qcom,spmi-adc-tm-hc"; - reg = <0x3400>; - interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>; - #thermal-sensor-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - rtc@6000 { - compatible = "qcom,pm8941-rtc"; - reg = <0x6000>, <0x6100>; - reg-names = "rtc", "alarm"; - interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; - }; - - pm8998_gpios: gpio@c000 { - compatible = "qcom,pm8998-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8998_gpios 0 0 26>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - }; - - pm8998_lsid1: pmic@1 { - compatible = "qcom,pm8998", "qcom,spmi-pmic"; - reg = <0x1 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - }; -}; diff --git a/arch/arm/dts/pmi8994.dtsi b/arch/arm/dts/pmi8994.dtsi deleted file mode 100644 index 36d6a1fb553..00000000000 --- a/arch/arm/dts/pmi8994.dtsi +++ /dev/null @@ -1,65 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/spmi/spmi.h> - -&spmi_bus { - - pmic@2 { - compatible = "qcom,pmi8994", "qcom,spmi-pmic"; - reg = <0x2 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pmi8994_gpios: gpio@c000 { - compatible = "qcom,pmi8994-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pmi8994_gpios 0 0 10>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - pmi8994_mpps: mpps@a000 { - compatible = "qcom,pmi8994-mpp", "qcom,spmi-mpp"; - reg = <0xa000>; - gpio-controller; - gpio-ranges = <&pmi8994_mpps 0 0 4>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - pmic@3 { - compatible = "qcom,pmi8994", "qcom,spmi-pmic"; - reg = <0x3 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pmi8994_lpg: pwm { - compatible = "qcom,pmi8994-lpg"; - - #address-cells = <1>; - #size-cells = <0>; - #pwm-cells = <2>; - - status = "disabled"; - }; - - pmi8994_spmi_regulators: regulators { - compatible = "qcom,pmi8994-regulators"; - }; - - pmi8994_wled: wled@d800 { - compatible = "qcom,pmi8994-wled"; - reg = <0xd800>, <0xd900>; - interrupts = <0x3 0xd8 0x1 IRQ_TYPE_EDGE_RISING>, - <0x3 0xd8 0x2 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "ovp", "short"; - qcom,cabc; - qcom,external-pfet; - status = "disabled"; - }; - }; -}; diff --git a/arch/arm/dts/pmi8998.dtsi b/arch/arm/dts/pmi8998.dtsi deleted file mode 100644 index cd3f0790fd4..00000000000 --- a/arch/arm/dts/pmi8998.dtsi +++ /dev/null @@ -1,98 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/spmi/spmi.h> - -&spmi_bus { - pmi8998_lsid0: pmic@2 { - compatible = "qcom,pmi8998", "qcom,spmi-pmic"; - reg = <0x2 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pmi8998_charger: charger@1000 { - compatible = "qcom,pmi8998-charger"; - reg = <0x1000>; - - interrupts = <0x2 0x13 0x4 IRQ_TYPE_EDGE_BOTH>, - <0x2 0x12 0x2 IRQ_TYPE_EDGE_BOTH>, - <0x2 0x16 0x1 IRQ_TYPE_EDGE_RISING>, - <0x2 0x13 0x6 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "usb-plugin", - "bat-ov", - "wdog-bark", - "usbin-icl-change"; - - io-channels = <&pmi8998_rradc 3>, - <&pmi8998_rradc 4>; - io-channel-names = "usbin_i", "usbin_v"; - - status = "disabled"; - }; - - pmi8998_gpios: gpio@c000 { - compatible = "qcom,pmi8998-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pmi8998_gpios 0 0 14>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - pmi8998_rradc: adc@4500 { - compatible = "qcom,pmi8998-rradc"; - reg = <0x4500>; - #io-channel-cells = <1>; - }; - }; - - pmi8998_lsid1: pmic@3 { - compatible = "qcom,pmi8998", "qcom,spmi-pmic"; - reg = <0x3 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - labibb { - compatible = "qcom,pmi8998-lab-ibb"; - - ibb: ibb { - interrupts = <0x3 0xdc 0x2 IRQ_TYPE_EDGE_RISING>, - <0x3 0xdc 0x0 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "sc-err", "ocp"; - }; - - lab: lab { - interrupts = <0x3 0xde 0x1 IRQ_TYPE_EDGE_RISING>, - <0x3 0xde 0x0 IRQ_TYPE_LEVEL_LOW>; - interrupt-names = "sc-err", "ocp"; - }; - }; - - pmi8998_lpg: pwm { - compatible = "qcom,pmi8998-lpg"; - - #address-cells = <1>; - #size-cells = <0>; - #pwm-cells = <2>; - - status = "disabled"; - }; - - pmi8998_flash: led-controller@d300 { - compatible = "qcom,pmi8998-flash-led", "qcom,spmi-flash-led"; - reg = <0xd300>; - status = "disabled"; - }; - - pmi8998_wled: leds@d800 { - compatible = "qcom,pmi8998-wled"; - reg = <0xd800>, <0xd900>; - interrupts = <0x3 0xd8 0x1 IRQ_TYPE_EDGE_RISING>, - <0x3 0xd8 0x2 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "ovp", "short"; - label = "backlight"; - - status = "disabled"; - }; - }; -}; diff --git a/arch/arm/dts/pms405.dtsi b/arch/arm/dts/pms405.dtsi deleted file mode 100644 index 461ad97032f..00000000000 --- a/arch/arm/dts/pms405.dtsi +++ /dev/null @@ -1,149 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2018, Linaro Limited - */ - -#include <dt-bindings/spmi/spmi.h> -#include <dt-bindings/input/linux-event-codes.h> -#include <dt-bindings/iio/qcom,spmi-vadc.h> -#include <dt-bindings/thermal/thermal.h> - -/ { - thermal-zones { - pms405-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&pms405_temp>; - - trips { - pms405_alert0: pms405-alert0 { - temperature = <105000>; - hysteresis = <2000>; - type = "passive"; - }; - pms405_crit: pms405-crit { - temperature = <125000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - }; - }; -}; - -&spmi_bus { - pms405_0: pms405@0 { - compatible = "qcom,pms405", "qcom,spmi-pmic"; - reg = <0x0 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pms405_gpios: gpio@c000 { - compatible = "qcom,pms405-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pms405_gpios 0 0 12>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - pon@800 { - compatible = "qcom,pms405-pon"; - reg = <0x0800>; - mode-bootloader = <0x2>; - mode-recovery = <0x1>; - - pwrkey { - compatible = "qcom,pm8941-pwrkey"; - interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; - debounce = <15625>; - bias-pull-up; - linux,code = <KEY_POWER>; - }; - }; - - pms405_temp: temp-alarm@2400 { - compatible = "qcom,spmi-temp-alarm"; - reg = <0x2400>; - interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>; - io-channels = <&pms405_adc ADC5_DIE_TEMP>; - io-channel-names = "thermal"; - #thermal-sensor-cells = <0>; - }; - - pms405_adc: adc@3100 { - compatible = "qcom,pms405-adc", "qcom,spmi-adc-rev2"; - reg = <0x3100>; - interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; - #address-cells = <1>; - #size-cells = <0>; - #io-channel-cells = <1>; - - channel@0 { - reg = <ADC5_REF_GND>; - qcom,pre-scaling = <1 1>; - label = "ref_gnd"; - }; - - channel@1 { - reg = <ADC5_1P25VREF>; - qcom,pre-scaling = <1 1>; - label = "vref_1p25"; - }; - - channel@131 { - reg = <ADC5_VPH_PWR>; - qcom,pre-scaling = <1 3>; - label = "vph_pwr"; - }; - - channel@6 { - reg = <ADC5_DIE_TEMP>; - qcom,pre-scaling = <1 1>; - label = "die_temp"; - }; - - channel@77 { - reg = <ADC5_AMUX_THM1_100K_PU>; - qcom,ratiometric; - qcom,hw-settle-time = <200>; - qcom,pre-scaling = <1 1>; - label = "pa_therm1"; - }; - - channel@79 { - reg = <ADC5_AMUX_THM3_100K_PU>; - qcom,ratiometric; - qcom,hw-settle-time = <200>; - qcom,pre-scaling = <1 1>; - label = "pa_therm3"; - }; - - channel@76 { - reg = <ADC5_XO_THERM_100K_PU>; - qcom,ratiometric; - qcom,hw-settle-time = <200>; - qcom,pre-scaling = <1 1>; - label = "xo_therm"; - }; - }; - - rtc@6000 { - compatible = "qcom,pm8941-rtc"; - reg = <0x6000>, <0x6100>; - reg-names = "rtc", "alarm"; - interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; - }; - }; - - pms405_1: pms405@1 { - compatible = "qcom,pms405", "qcom,spmi-pmic"; - reg = <0x1 SPMI_USID>; - - pms405_spmi_regulators: regulators { - compatible = "qcom,pms405-regulators"; - }; - }; -}; diff --git a/arch/arm/dts/qcs404-evb-4000.dts b/arch/arm/dts/qcs404-evb-4000.dts deleted file mode 100644 index 358827c2fbd..00000000000 --- a/arch/arm/dts/qcs404-evb-4000.dts +++ /dev/null @@ -1,96 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2018, Linaro Limited - */ - -/dts-v1/; - -#include <dt-bindings/gpio/gpio.h> -#include "qcs404-evb.dtsi" - -/ { - model = "Qualcomm Technologies, Inc. QCS404 EVB 4000"; - compatible = "qcom,qcs404-evb-4000", "qcom,qcs404-evb", - "qcom,qcs404"; -}; - -ðernet { - status = "okay"; - - snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 10000>; - - pinctrl-names = "default"; - pinctrl-0 = <ðernet_defaults>; - - phy-handle = <&phy1>; - phy-mode = "rgmii"; - mdio { - #address-cells = <1>; - #size-cells = <0>; - compatible = "snps,dwmac-mdio"; - phy1: phy@4 { - compatible = "ethernet-phy-ieee802.3-c22"; - device_type = "ethernet-phy"; - reg = <0x4>; - }; - }; -}; - -&tlmm { - ethernet_defaults: ethernet-defaults-state { - int-pins { - pins = "gpio61"; - function = "rgmii_int"; - bias-disable; - drive-strength = <2>; - }; - mdc-pins { - pins = "gpio76"; - function = "rgmii_mdc"; - bias-pull-up; - }; - mdio-pins { - pins = "gpio75"; - function = "rgmii_mdio"; - bias-pull-up; - }; - tx-pins { - pins = "gpio67", "gpio66", "gpio65", "gpio64"; - function = "rgmii_tx"; - bias-pull-up; - drive-strength = <16>; - }; - rx-pins { - pins = "gpio73", "gpio72", "gpio71", "gpio70"; - function = "rgmii_rx"; - bias-disable; - drive-strength = <2>; - }; - tx-ctl-pins { - pins = "gpio68"; - function = "rgmii_ctl"; - bias-pull-up; - drive-strength = <16>; - }; - rx-ctl-pins { - pins = "gpio74"; - function = "rgmii_ctl"; - bias-disable; - drive-strength = <2>; - }; - tx-ck-pins { - pins = "gpio63"; - function = "rgmii_ck"; - bias-pull-up; - drive-strength = <16>; - }; - rx-ck-pins { - pins = "gpio69"; - function = "rgmii_ck"; - bias-disable; - drive-strength = <2>; - }; - }; -}; diff --git a/arch/arm/dts/qcs404-evb.dtsi b/arch/arm/dts/qcs404-evb.dtsi deleted file mode 100644 index 10655401528..00000000000 --- a/arch/arm/dts/qcs404-evb.dtsi +++ /dev/null @@ -1,389 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2018, Linaro Limited - */ - -#include <dt-bindings/gpio/gpio.h> -#include "qcs404.dtsi" -#include "pms405.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> - -/ { - aliases { - serial0 = &blsp1_uart2; - serial1 = &blsp1_uart3; - }; - - chosen { - stdout-path = "serial0"; - }; - - vph_pwr: vph-pwr-regulator { - compatible = "regulator-fixed"; - regulator-name = "vph_pwr"; - regulator-always-on; - regulator-boot-on; - }; - - vdd_ch0_3p3: - vdd_esmps3_3p3: vdd-esmps3-3p3-regulator { - compatible = "regulator-fixed"; - regulator-name = "eSMPS3_3P3"; - - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - usb3_vbus_reg: regulator-usb3-vbus { - compatible = "regulator-fixed"; - regulator-name = "VBUS_BOOST_5V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&pms405_gpios 3 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&usb_vbus_boost_pin>; - vin-supply = <&vph_pwr>; - enable-active-high; - - /* TODO: Drop this when introducing role switching */ - regulator-always-on; - }; -}; - -&blsp1_uart3 { - status = "okay"; - - bluetooth { - compatible = "qcom,wcn3990-bt"; - vddio-supply = <&vreg_l6_1p8>; - vddxo-supply = <&vreg_l5_1p8>; - vddrf-supply = <&vreg_l1_1p3>; - vddch0-supply = <&vdd_ch0_3p3>; - - local-bd-address = [ 02 00 00 00 5a ad ]; - - max-speed = <3200000>; - }; -}; - -&blsp1_dma { - qcom,controlled-remotely; -}; - -&blsp2_dma { - qcom,controlled-remotely; -}; - -&gcc { - protected-clocks = <GCC_BIMC_CDSP_CLK>, - <GCC_CDSP_CFG_AHB_CLK>, - <GCC_CDSP_BIMC_CLK_SRC>, - <GCC_CDSP_TBU_CLK>, - <141>, /* GCC_WCSS_Q6_AHB_CLK */ - <142>; /* GCC_WCSS_Q6_AXIM_CLK */ -}; - -&pms405_spmi_regulators { - vdd_s3-supply = <&vph_pwr>; - - pms405_s3: s3 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vdd_apc"; - regulator-initial-mode = <1>; - regulator-min-microvolt = <1048000>; - regulator-max-microvolt = <1384000>; - }; -}; - -&pcie { - status = "okay"; - - perst-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>; - - pinctrl-names = "default"; - pinctrl-0 = <&perst_state>; -}; - -&pcie_phy { - status = "okay"; - - vdda-vp-supply = <&vreg_l3_1p05>; - vdda-vph-supply = <&vreg_l5_1p8>; -}; - -&remoteproc_adsp { - status = "okay"; -}; - -&remoteproc_cdsp { - status = "okay"; -}; - -&remoteproc_wcss { - status = "okay"; -}; - -&rpm_requests { - regulators { - compatible = "qcom,rpm-pms405-regulators"; - - vdd_s1-supply = <&vph_pwr>; - vdd_s2-supply = <&vph_pwr>; - vdd_s3-supply = <&vph_pwr>; - vdd_s4-supply = <&vph_pwr>; - vdd_s5-supply = <&vph_pwr>; - vdd_l1_l2-supply = <&vreg_s5_1p35>; - vdd_l3_l8-supply = <&vreg_s5_1p35>; - vdd_l4-supply = <&vreg_s5_1p35>; - vdd_l5_l6-supply = <&vreg_s4_1p8>; - vdd_l7-supply = <&vph_pwr>; - vdd_l9-supply = <&vreg_s5_1p35>; - vdd_l10_l11_l12_l13-supply = <&vph_pwr>; - - vreg_s4_1p8: s4 { - regulator-min-microvolt = <1728000>; - regulator-max-microvolt = <1920000>; - }; - - vreg_s5_1p35: s5 { - regulator-min-microvolt = <1352000>; - regulator-max-microvolt = <1352000>; - }; - - vreg_l1_1p3: l1 { - regulator-min-microvolt = <1240000>; - regulator-max-microvolt = <1352000>; - }; - - vreg_l2_1p275: l2 { - regulator-min-microvolt = <1048000>; - regulator-max-microvolt = <1280000>; - }; - - vreg_l3_1p05: l3 { - regulator-min-microvolt = <1048000>; - regulator-max-microvolt = <1160000>; - }; - - vreg_l4_1p2: l4 { - regulator-min-microvolt = <1144000>; - regulator-max-microvolt = <1256000>; - }; - - vreg_l5_1p8: l5 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - vreg_l6_1p8: l6 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - vreg_l7_1p8: l7 { - regulator-min-microvolt = <1616000>; - regulator-max-microvolt = <3000000>; - }; - - vreg_l8_1p2: l8 { - regulator-min-microvolt = <1136000>; - regulator-max-microvolt = <1352000>; - }; - - vreg_l10_3p3: l10 { - regulator-min-microvolt = <2936000>; - regulator-max-microvolt = <3088000>; - }; - - vreg_l11_sdc2: l11 { - regulator-min-microvolt = <2696000>; - regulator-max-microvolt = <3304000>; - }; - - vreg_l12_3p3: l12 { - regulator-min-microvolt = <3050000>; - regulator-max-microvolt = <3300000>; - }; - - vreg_l13_3p3: l13 { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3300000>; - }; - }; -}; - -&sdcc1 { - status = "okay"; - - supports-cqe; - mmc-ddr-1_8v; - mmc-hs400-1_8v; - bus-width = <8>; - non-removable; - - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sdc1_on>; - pinctrl-1 = <&sdc1_off>; -}; - -&tlmm { - perst_state: perst-state { - pins = "gpio43"; - function = "gpio"; - - drive-strength = <2>; - bias-disable; - output-low; - }; - - sdc1_on: sdc1-on-state { - clk-pins { - pins = "sdc1_clk"; - bias-disable; - drive-strength = <16>; - }; - - cmd-pins { - pins = "sdc1_cmd"; - bias-pull-up; - drive-strength = <10>; - }; - - data-pins { - pins = "sdc1_data"; - bias-pull-up; - drive-strength = <10>; - }; - - rclk-pins { - pins = "sdc1_rclk"; - bias-pull-down; - }; - }; - - sdc1_off: sdc1-off-state { - clk-pins { - pins = "sdc1_clk"; - bias-disable; - drive-strength = <2>; - }; - - cmd-pins { - pins = "sdc1_cmd"; - bias-pull-up; - drive-strength = <2>; - }; - - data-pins { - pins = "sdc1_data"; - bias-pull-up; - drive-strength = <2>; - }; - - rclk-pins { - pins = "sdc1_rclk"; - bias-pull-down; - }; - }; - - usb3_id_pin: usb3-id-state { - pins = "gpio116"; - function = "gpio"; - - drive-strength = <2>; - bias-pull-up; - }; -}; - -&pms405_gpios { - usb_vbus_boost_pin: usb-vbus-boost-state { - pinconf { - pins = "gpio3"; - function = PMIC_GPIO_FUNC_NORMAL; - output-low; - power-source = <1>; - }; - }; - usb3_vbus_pin: usb3-vbus-state { - pinconf { - pins = "gpio12"; - function = PMIC_GPIO_FUNC_NORMAL; - input-enable; - bias-pull-down; - power-source = <1>; - }; - }; -}; - -&usb2 { - status = "okay"; -}; - -&usb2_phy_sec { - vdd-supply = <&vreg_l4_1p2>; - vdda1p8-supply = <&vreg_l5_1p8>; - vdda3p3-supply = <&vreg_l12_3p3>; - status = "okay"; -}; - -&usb3 { - status = "okay"; - -}; - -&usb3_dwc3 { - dr_mode = "host"; -}; - -&usb2_phy_prim { - vdd-supply = <&vreg_l4_1p2>; - vdda1p8-supply = <&vreg_l5_1p8>; - vdda3p3-supply = <&vreg_l12_3p3>; - status = "okay"; -}; - -&usb3_phy { - vdd-supply = <&vreg_l3_1p05>; - vdda1p8-supply = <&vreg_l5_1p8>; - status = "okay"; -}; - -&wifi { - status = "okay"; - vdd-0.8-cx-mx-supply = <&vreg_l2_1p275>; - vdd-1.8-xo-supply = <&vreg_l5_1p8>; - vdd-1.3-rfa-supply = <&vreg_l1_1p3>; -}; - -/* PINCTRL - additions to nodes defined in qcs404.dtsi */ - -&blsp1_uart2_default { - rx-pins { - drive-strength = <2>; - bias-disable; - }; - - tx-pins { - drive-strength = <2>; - bias-disable; - }; -}; - -&blsp1_uart3_default { - cts-pins { - bias-disable; - }; - - rts-tx-pins { - drive-strength = <2>; - bias-disable; - }; - - rx-pins { - bias-pull-up; - }; -}; diff --git a/arch/arm/dts/qcs404.dtsi b/arch/arm/dts/qcs404.dtsi deleted file mode 100644 index 2721f32dfb7..00000000000 --- a/arch/arm/dts/qcs404.dtsi +++ /dev/null @@ -1,1829 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2018, Linaro Limited - */ - -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/clock/qcom,gcc-qcs404.h> -#include <dt-bindings/clock/qcom,turingcc-qcs404.h> -#include <dt-bindings/clock/qcom,rpmcc.h> -#include <dt-bindings/power/qcom-rpmpd.h> -#include <dt-bindings/thermal/thermal.h> - -/ { - interrupt-parent = <&intc>; - - #address-cells = <2>; - #size-cells = <2>; - - chosen { }; - - clocks { - xo_board: xo-board { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <19200000>; - }; - - sleep_clk: sleep-clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - }; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - CPU0: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x100>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - next-level-cache = <&L2_0>; - #cooling-cells = <2>; - clocks = <&apcs_glb>; - operating-points-v2 = <&cpu_opp_table>; - power-domains = <&cpr>; - power-domain-names = "cpr"; - }; - - CPU1: cpu@101 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x101>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - next-level-cache = <&L2_0>; - #cooling-cells = <2>; - clocks = <&apcs_glb>; - operating-points-v2 = <&cpu_opp_table>; - power-domains = <&cpr>; - power-domain-names = "cpr"; - }; - - CPU2: cpu@102 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x102>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - next-level-cache = <&L2_0>; - #cooling-cells = <2>; - clocks = <&apcs_glb>; - operating-points-v2 = <&cpu_opp_table>; - power-domains = <&cpr>; - power-domain-names = "cpr"; - }; - - CPU3: cpu@103 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x103>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - next-level-cache = <&L2_0>; - #cooling-cells = <2>; - clocks = <&apcs_glb>; - operating-points-v2 = <&cpu_opp_table>; - power-domains = <&cpr>; - power-domain-names = "cpr"; - }; - - L2_0: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-unified; - }; - - idle-states { - entry-method = "psci"; - - CPU_SLEEP_0: cpu-sleep-0 { - compatible = "arm,idle-state"; - idle-state-name = "standalone-power-collapse"; - arm,psci-suspend-param = <0x40000003>; - entry-latency-us = <125>; - exit-latency-us = <180>; - min-residency-us = <595>; - local-timer-stop; - }; - }; - }; - - cpu_opp_table: opp-table-cpu { - compatible = "operating-points-v2-kryo-cpu"; - opp-shared; - - opp-1094400000 { - opp-hz = /bits/ 64 <1094400000>; - required-opps = <&cpr_opp1>; - }; - opp-1248000000 { - opp-hz = /bits/ 64 <1248000000>; - required-opps = <&cpr_opp2>; - }; - opp-1401600000 { - opp-hz = /bits/ 64 <1401600000>; - required-opps = <&cpr_opp3>; - }; - }; - - cpr_opp_table: opp-table-cpr { - compatible = "operating-points-v2-qcom-level"; - - cpr_opp1: opp1 { - opp-level = <1>; - qcom,opp-fuse-level = <1>; - }; - cpr_opp2: opp2 { - opp-level = <2>; - qcom,opp-fuse-level = <2>; - }; - cpr_opp3: opp3 { - opp-level = <3>; - qcom,opp-fuse-level = <3>; - }; - }; - - firmware { - scm: scm { - compatible = "qcom,scm-qcs404", "qcom,scm"; - #reset-cells = <1>; - }; - }; - - memory@80000000 { - device_type = "memory"; - /* We expect the bootloader to fill in the size */ - reg = <0 0x80000000 0 0>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - rpm: remoteproc { - compatible = "qcom,qcs404-rpm-proc", "qcom,rpm-proc"; - - glink-edge { - compatible = "qcom,glink-rpm"; - - interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>; - qcom,rpm-msg-ram = <&rpm_msg_ram>; - mboxes = <&apcs_glb 0>; - - rpm_requests: rpm-requests { - compatible = "qcom,rpm-qcs404"; - qcom,glink-channels = "rpm_requests"; - - rpmcc: clock-controller { - compatible = "qcom,rpmcc-qcs404", "qcom,rpmcc"; - #clock-cells = <1>; - clocks = <&xo_board>; - clock-names = "xo"; - }; - - rpmpd: power-controller { - compatible = "qcom,qcs404-rpmpd"; - #power-domain-cells = <1>; - operating-points-v2 = <&rpmpd_opp_table>; - - rpmpd_opp_table: opp-table { - compatible = "operating-points-v2"; - - rpmpd_opp_ret: opp1 { - opp-level = <16>; - }; - - rpmpd_opp_ret_plus: opp2 { - opp-level = <32>; - }; - - rpmpd_opp_min_svs: opp3 { - opp-level = <48>; - }; - - rpmpd_opp_low_svs: opp4 { - opp-level = <64>; - }; - - rpmpd_opp_svs: opp5 { - opp-level = <128>; - }; - - rpmpd_opp_svs_plus: opp6 { - opp-level = <192>; - }; - - rpmpd_opp_nom: opp7 { - opp-level = <256>; - }; - - rpmpd_opp_nom_plus: opp8 { - opp-level = <320>; - }; - - rpmpd_opp_turbo: opp9 { - opp-level = <384>; - }; - - rpmpd_opp_turbo_no_cpr: opp10 { - opp-level = <416>; - }; - - rpmpd_opp_turbo_plus: opp11 { - opp-level = <512>; - }; - }; - }; - }; - }; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - tz_apps_mem: memory@85900000 { - reg = <0 0x85900000 0 0x500000>; - no-map; - }; - - xbl_mem: memory@85e00000 { - reg = <0 0x85e00000 0 0x100000>; - no-map; - }; - - smem_region: memory@85f00000 { - reg = <0 0x85f00000 0 0x200000>; - no-map; - }; - - tz_mem: memory@86100000 { - reg = <0 0x86100000 0 0x300000>; - no-map; - }; - - wlan_fw_mem: memory@86400000 { - reg = <0 0x86400000 0 0x1100000>; - no-map; - }; - - adsp_fw_mem: memory@87500000 { - reg = <0 0x87500000 0 0x1a00000>; - no-map; - }; - - cdsp_fw_mem: memory@88f00000 { - reg = <0 0x88f00000 0 0x600000>; - no-map; - }; - - wlan_msa_mem: memory@89500000 { - reg = <0 0x89500000 0 0x100000>; - no-map; - }; - - uefi_mem: memory@9f800000 { - reg = <0 0x9f800000 0 0x800000>; - no-map; - }; - }; - - smem { - compatible = "qcom,smem"; - - memory-region = <&smem_region>; - qcom,rpm-msg-ram = <&rpm_msg_ram>; - - hwlocks = <&tcsr_mutex 3>; - }; - - soc: soc@0 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0 0xffffffff>; - compatible = "simple-bus"; - - turingcc: clock-controller@800000 { - compatible = "qcom,qcs404-turingcc"; - reg = <0x00800000 0x30000>; - clocks = <&gcc GCC_CDSP_CFG_AHB_CLK>; - - #clock-cells = <1>; - #reset-cells = <1>; - - status = "disabled"; - }; - - rpm_msg_ram: sram@60000 { - compatible = "qcom,rpm-msg-ram"; - reg = <0x00060000 0x6000>; - }; - - usb3_phy: phy@78000 { - compatible = "qcom,usb-ss-28nm-phy"; - reg = <0x00078000 0x400>; - #phy-cells = <0>; - clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, - <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, - <&gcc GCC_USB3_PHY_PIPE_CLK>; - clock-names = "ref", "ahb", "pipe"; - resets = <&gcc GCC_USB3_PHY_BCR>, - <&gcc GCC_USB3PHY_PHY_BCR>; - reset-names = "com", "phy"; - status = "disabled"; - }; - - usb2_phy_prim: phy@7a000 { - compatible = "qcom,usb-hs-28nm-femtophy"; - reg = <0x0007a000 0x200>; - #phy-cells = <0>; - clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, - <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, - <&gcc GCC_USB2A_PHY_SLEEP_CLK>; - clock-names = "ref", "ahb", "sleep"; - resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>, - <&gcc GCC_USB2A_PHY_BCR>; - reset-names = "phy", "por"; - status = "disabled"; - }; - - usb2_phy_sec: phy@7c000 { - compatible = "qcom,usb-hs-28nm-femtophy"; - reg = <0x0007c000 0x200>; - #phy-cells = <0>; - clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, - <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, - <&gcc GCC_USB2A_PHY_SLEEP_CLK>; - clock-names = "ref", "ahb", "sleep"; - resets = <&gcc GCC_QUSB2_PHY_BCR>, - <&gcc GCC_USB2_HS_PHY_ONLY_BCR>; - reset-names = "phy", "por"; - status = "disabled"; - }; - - qfprom: qfprom@a4000 { - compatible = "qcom,qcs404-qfprom", "qcom,qfprom"; - reg = <0x000a4000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - cpr_efuse_speedbin: speedbin@13c { - reg = <0x13c 0x4>; - bits = <2 3>; - }; - - tsens_s0_p1: s0-p1@1f8 { - reg = <0x1f8 0x1>; - bits = <0 6>; - }; - - tsens_s0_p2: s0-p2@1f8 { - reg = <0x1f8 0x2>; - bits = <6 6>; - }; - - tsens_s1_p1: s1-p1@1f9 { - reg = <0x1f9 0x2>; - bits = <4 6>; - }; - - tsens_s1_p2: s1-p2@1fa { - reg = <0x1fa 0x1>; - bits = <2 6>; - }; - - tsens_s2_p1: s2-p1@1fb { - reg = <0x1fb 0x1>; - bits = <0 6>; - }; - - tsens_s2_p2: s2-p2@1fb { - reg = <0x1fb 0x2>; - bits = <6 6>; - }; - - tsens_s3_p1: s3-p1@1fc { - reg = <0x1fc 0x2>; - bits = <4 6>; - }; - - tsens_s3_p2: s3-p2@1fd { - reg = <0x1fd 0x1>; - bits = <2 6>; - }; - - tsens_s4_p1: s4-p1@1fe { - reg = <0x1fe 0x1>; - bits = <0 6>; - }; - - tsens_s4_p2: s4-p2@1fe { - reg = <0x1fe 0x2>; - bits = <6 6>; - }; - - tsens_s5_p1: s5-p1@200 { - reg = <0x200 0x1>; - bits = <0 6>; - }; - - tsens_s5_p2: s5-p2@200 { - reg = <0x200 0x2>; - bits = <6 6>; - }; - - tsens_s6_p1: s6-p1@201 { - reg = <0x201 0x2>; - bits = <4 6>; - }; - - tsens_s6_p2: s6-p2@202 { - reg = <0x202 0x1>; - bits = <2 6>; - }; - - tsens_s7_p1: s7-p1@203 { - reg = <0x203 0x1>; - bits = <0 6>; - }; - - tsens_s7_p2: s7-p2@203 { - reg = <0x203 0x2>; - bits = <6 6>; - }; - - tsens_s8_p1: s8-p1@204 { - reg = <0x204 0x2>; - bits = <4 6>; - }; - - tsens_s8_p2: s8-p2@205 { - reg = <0x205 0x1>; - bits = <2 6>; - }; - - tsens_s9_p1: s9-p1@206 { - reg = <0x206 0x1>; - bits = <0 6>; - }; - - tsens_s9_p2: s9-p2@206 { - reg = <0x206 0x2>; - bits = <6 6>; - }; - - tsens_mode: mode@208 { - reg = <0x208 1>; - bits = <0 3>; - }; - - tsens_base1: base1@208 { - reg = <0x208 2>; - bits = <3 8>; - }; - - tsens_base2: base2@208 { - reg = <0x209 2>; - bits = <3 8>; - }; - - cpr_efuse_quot_offset1: qoffset1@231 { - reg = <0x231 0x4>; - bits = <4 7>; - }; - cpr_efuse_quot_offset2: qoffset2@232 { - reg = <0x232 0x4>; - bits = <3 7>; - }; - cpr_efuse_quot_offset3: qoffset3@233 { - reg = <0x233 0x4>; - bits = <2 7>; - }; - cpr_efuse_init_voltage1: ivoltage1@229 { - reg = <0x229 0x4>; - bits = <4 6>; - }; - cpr_efuse_init_voltage2: ivoltage2@22a { - reg = <0x22a 0x4>; - bits = <2 6>; - }; - cpr_efuse_init_voltage3: ivoltage3@22b { - reg = <0x22b 0x4>; - bits = <0 6>; - }; - cpr_efuse_quot1: quot1@22b { - reg = <0x22b 0x4>; - bits = <6 12>; - }; - cpr_efuse_quot2: quot2@22d { - reg = <0x22d 0x4>; - bits = <2 12>; - }; - cpr_efuse_quot3: quot3@230 { - reg = <0x230 0x4>; - bits = <0 12>; - }; - cpr_efuse_ring1: ring1@228 { - reg = <0x228 0x4>; - bits = <0 3>; - }; - cpr_efuse_ring2: ring2@228 { - reg = <0x228 0x4>; - bits = <4 3>; - }; - cpr_efuse_ring3: ring3@229 { - reg = <0x229 0x4>; - bits = <0 3>; - }; - cpr_efuse_revision: revision@218 { - reg = <0x218 0x4>; - bits = <3 3>; - }; - }; - - rng: rng@e3000 { - compatible = "qcom,prng-ee"; - reg = <0x000e3000 0x1000>; - clocks = <&gcc GCC_PRNG_AHB_CLK>; - clock-names = "core"; - }; - - bimc: interconnect@400000 { - reg = <0x00400000 0x80000>; - compatible = "qcom,qcs404-bimc"; - #interconnect-cells = <1>; - clock-names = "bus", "bus_a"; - clocks = <&rpmcc RPM_SMD_BIMC_CLK>, - <&rpmcc RPM_SMD_BIMC_A_CLK>; - }; - - tsens: thermal-sensor@4a9000 { - compatible = "qcom,qcs404-tsens", "qcom,tsens-v1"; - reg = <0x004a9000 0x1000>, /* TM */ - <0x004a8000 0x1000>; /* SROT */ - nvmem-cells = <&tsens_mode>, - <&tsens_base1>, <&tsens_base2>, - <&tsens_s0_p1>, <&tsens_s0_p2>, - <&tsens_s1_p1>, <&tsens_s1_p2>, - <&tsens_s2_p1>, <&tsens_s2_p2>, - <&tsens_s3_p1>, <&tsens_s3_p2>, - <&tsens_s4_p1>, <&tsens_s4_p2>, - <&tsens_s5_p1>, <&tsens_s5_p2>, - <&tsens_s6_p1>, <&tsens_s6_p2>, - <&tsens_s7_p1>, <&tsens_s7_p2>, - <&tsens_s8_p1>, <&tsens_s8_p2>, - <&tsens_s9_p1>, <&tsens_s9_p2>; - nvmem-cell-names = "mode", - "base1", "base2", - "s0_p1", "s0_p2", - "s1_p1", "s1_p2", - "s2_p1", "s2_p2", - "s3_p1", "s3_p2", - "s4_p1", "s4_p2", - "s5_p1", "s5_p2", - "s6_p1", "s6_p2", - "s7_p1", "s7_p2", - "s8_p1", "s8_p2", - "s9_p1", "s9_p2"; - #qcom,sensors = <10>; - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "uplow"; - #thermal-sensor-cells = <1>; - }; - - pcnoc: interconnect@500000 { - reg = <0x00500000 0x15080>; - compatible = "qcom,qcs404-pcnoc"; - #interconnect-cells = <1>; - clock-names = "bus", "bus_a"; - clocks = <&rpmcc RPM_SMD_PNOC_CLK>, - <&rpmcc RPM_SMD_PNOC_A_CLK>; - }; - - snoc: interconnect@580000 { - reg = <0x00580000 0x23080>; - compatible = "qcom,qcs404-snoc"; - #interconnect-cells = <1>; - clock-names = "bus", "bus_a"; - clocks = <&rpmcc RPM_SMD_SNOC_CLK>, - <&rpmcc RPM_SMD_SNOC_A_CLK>; - }; - - remoteproc_cdsp: remoteproc@b00000 { - compatible = "qcom,qcs404-cdsp-pas"; - reg = <0x00b00000 0x4040>; - - interrupts-extended = <&intc GIC_SPI 229 IRQ_TYPE_EDGE_RISING>, - <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, - <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, - <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, - <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", - "handover", "stop-ack"; - - clocks = <&xo_board>; - clock-names = "xo"; - - /* - * If the node was using the PIL binding, then include properties: - * clocks = <&xo_board>, - * <&gcc GCC_CDSP_CFG_AHB_CLK>, - * <&gcc GCC_CDSP_TBU_CLK>, - * <&gcc GCC_BIMC_CDSP_CLK>, - * <&turingcc TURING_WRAPPER_AON_CLK>, - * <&turingcc TURING_Q6SS_AHBS_AON_CLK>, - * <&turingcc TURING_Q6SS_AHBM_AON_CLK>, - * <&turingcc TURING_Q6SS_Q6_AXIM_CLK>; - * clock-names = "xo", - * "sway", - * "tbu", - * "bimc", - * "ahb_aon", - * "q6ss_slave", - * "q6ss_master", - * "q6_axim"; - * resets = <&gcc GCC_CDSP_RESTART>; - * reset-names = "restart"; - * qcom,halt-regs = <&tcsr 0x19004>; - */ - - memory-region = <&cdsp_fw_mem>; - - qcom,smem-states = <&cdsp_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - status = "disabled"; - - glink-edge { - interrupts = <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>; - - qcom,remote-pid = <5>; - mboxes = <&apcs_glb 12>; - - label = "cdsp"; - }; - }; - - usb3: usb@7678800 { - compatible = "qcom,qcs404-dwc3", "qcom,dwc3"; - reg = <0x07678800 0x400>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clocks = <&gcc GCC_USB30_MASTER_CLK>, - <&gcc GCC_SYS_NOC_USB3_CLK>, - <&gcc GCC_USB30_SLEEP_CLK>, - <&gcc GCC_USB30_MOCK_UTMI_CLK>; - clock-names = "core", "iface", "sleep", "mock_utmi"; - assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_MASTER_CLK>; - assigned-clock-rates = <19200000>, <200000000>; - status = "disabled"; - - usb3_dwc3: usb@7580000 { - compatible = "snps,dwc3"; - reg = <0x07580000 0xcd00>; - interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; - phys = <&usb2_phy_prim>, <&usb3_phy>; - phy-names = "usb2-phy", "usb3-phy"; - snps,has-lpm-erratum; - snps,hird-threshold = /bits/ 8 <0x10>; - snps,usb3_lpm_capable; - dr_mode = "otg"; - }; - }; - - usb2: usb@79b8800 { - compatible = "qcom,qcs404-dwc3", "qcom,dwc3"; - reg = <0x079b8800 0x400>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>, - <&gcc GCC_PCNOC_USB2_CLK>, - <&gcc GCC_USB_HS_INACTIVITY_TIMERS_CLK>, - <&gcc GCC_USB20_MOCK_UTMI_CLK>; - clock-names = "core", "iface", "sleep", "mock_utmi"; - assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>, - <&gcc GCC_USB_HS_SYSTEM_CLK>; - assigned-clock-rates = <19200000>, <133333333>; - status = "disabled"; - - usb@78c0000 { - compatible = "snps,dwc3"; - reg = <0x078c0000 0xcc00>; - interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; - phys = <&usb2_phy_sec>; - phy-names = "usb2-phy"; - snps,has-lpm-erratum; - snps,hird-threshold = /bits/ 8 <0x10>; - snps,usb3_lpm_capable; - dr_mode = "peripheral"; - }; - }; - - tlmm: pinctrl@1000000 { - compatible = "qcom,qcs404-pinctrl"; - reg = <0x01000000 0x200000>, - <0x01300000 0x200000>, - <0x07b00000 0x200000>; - reg-names = "south", "north", "east"; - interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; - gpio-ranges = <&tlmm 0 0 120>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - - blsp1_i2c0_default: blsp1-i2c0-default-state { - pins = "gpio32", "gpio33"; - function = "blsp_i2c0"; - }; - - blsp1_i2c1_default: blsp1-i2c1-default-state { - pins = "gpio24", "gpio25"; - function = "blsp_i2c1"; - }; - - blsp1_i2c2_default: blsp1-i2c2-default-state { - sda-pins { - pins = "gpio19"; - function = "blsp_i2c_sda_a2"; - }; - - scl-pins { - pins = "gpio20"; - function = "blsp_i2c_scl_a2"; - }; - }; - - blsp1_i2c3_default: blsp1-i2c3-default-state { - pins = "gpio84", "gpio85"; - function = "blsp_i2c3"; - }; - - blsp1_i2c4_default: blsp1-i2c4-default-state { - pins = "gpio117", "gpio118"; - function = "blsp_i2c4"; - }; - - blsp1_uart0_default: blsp1-uart0-default-state { - pins = "gpio30", "gpio31", "gpio32", "gpio33"; - function = "blsp_uart0"; - }; - - blsp1_uart1_default: blsp1-uart1-default-state { - pins = "gpio22", "gpio23"; - function = "blsp_uart1"; - }; - - blsp1_uart2_default: blsp1-uart2-default-state { - rx-pins { - pins = "gpio18"; - function = "blsp_uart_rx_a2"; - }; - - tx-pins { - pins = "gpio17"; - function = "blsp_uart_tx_a2"; - }; - }; - - blsp1_uart3_default: blsp1-uart3-default-state { - cts-pins { - pins = "gpio84"; - function = "blsp_uart3"; - }; - - rts-tx-pins { - pins = "gpio85", "gpio82"; - function = "blsp_uart3"; - }; - - rx-pins { - pins = "gpio83"; - function = "blsp_uart3"; - }; - }; - - blsp2_i2c0_default: blsp2-i2c0-default-state { - pins = "gpio28", "gpio29"; - function = "blsp_i2c5"; - }; - - blsp1_spi0_default: blsp1-spi0-default-state { - pins = "gpio30", "gpio31", "gpio32", "gpio33"; - function = "blsp_spi0"; - }; - - blsp1_spi1_default: blsp1-spi1-default-state { - mosi-pins { - pins = "gpio22"; - function = "blsp_spi_mosi_a1"; - }; - - miso-pins { - pins = "gpio23"; - function = "blsp_spi_miso_a1"; - }; - - cs-n-pins { - pins = "gpio24"; - function = "blsp_spi_cs_n_a1"; - }; - - clk-pins { - pins = "gpio25"; - function = "blsp_spi_clk_a1"; - }; - }; - - blsp1_spi2_default: blsp1-spi2-default-state { - pins = "gpio17", "gpio18", "gpio19", "gpio20"; - function = "blsp_spi2"; - }; - - blsp1_spi3_default: blsp1-spi3-default-state { - pins = "gpio82", "gpio83", "gpio84", "gpio85"; - function = "blsp_spi3"; - }; - - blsp1_spi4_default: blsp1-spi4-default-state { - pins = "gpio37", "gpio38", "gpio117", "gpio118"; - function = "blsp_spi4"; - }; - - blsp2_spi0_default: blsp2-spi0-default-state { - pins = "gpio26", "gpio27", "gpio28", "gpio29"; - function = "blsp_spi5"; - }; - - blsp2_uart0_default: blsp2-uart0-default-state { - pins = "gpio26", "gpio27", "gpio28", "gpio29"; - function = "blsp_uart5"; - }; - }; - - gcc: clock-controller@1800000 { - compatible = "qcom,gcc-qcs404"; - reg = <0x01800000 0x80000>; - #clock-cells = <1>; - #reset-cells = <1>; - #power-domain-cells = <1>; - - clocks = <&xo_board>, - <&sleep_clk>, - <&pcie_phy>, - <0>, - <0>, - <0>; - - assigned-clocks = <&gcc GCC_APSS_AHB_CLK_SRC>; - assigned-clock-rates = <19200000>; - }; - - tcsr_mutex: hwlock@1905000 { - compatible = "qcom,tcsr-mutex"; - reg = <0x01905000 0x20000>; - #hwlock-cells = <1>; - }; - - tcsr: syscon@1937000 { - compatible = "qcom,qcs404-tcsr", "syscon"; - reg = <0x01937000 0x25000>; - }; - - sram@290000 { - compatible = "qcom,rpm-stats"; - reg = <0x00290000 0x10000>; - }; - - spmi_bus: spmi@200f000 { - compatible = "qcom,spmi-pmic-arb"; - reg = <0x0200f000 0x001000>, - <0x02400000 0x800000>, - <0x02c00000 0x800000>, - <0x03800000 0x200000>, - <0x0200a000 0x002100>; - reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; - interrupt-names = "periph_irq"; - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; - qcom,ee = <0>; - qcom,channel = <0>; - #address-cells = <2>; - #size-cells = <0>; - interrupt-controller; - #interrupt-cells = <4>; - }; - - remoteproc_wcss: remoteproc@7400000 { - compatible = "qcom,qcs404-wcss-pas"; - reg = <0x07400000 0x4040>; - - interrupts-extended = <&intc GIC_SPI 153 IRQ_TYPE_EDGE_RISING>, - <&wcss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, - <&wcss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, - <&wcss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, - <&wcss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", - "handover", "stop-ack"; - - clocks = <&xo_board>; - clock-names = "xo"; - - memory-region = <&wlan_fw_mem>; - - qcom,smem-states = <&wcss_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - status = "disabled"; - - glink-edge { - interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>; - - qcom,remote-pid = <1>; - mboxes = <&apcs_glb 16>; - - label = "wcss"; - }; - }; - - pcie_phy: phy@7786000 { - compatible = "qcom,qcs404-pcie2-phy", "qcom,pcie2-phy"; - reg = <0x07786000 0xb8>; - - clocks = <&gcc GCC_PCIE_0_PIPE_CLK>; - resets = <&gcc GCC_PCIEPHY_0_PHY_BCR>, - <&gcc GCC_PCIE_0_PIPE_ARES>; - reset-names = "phy", "pipe"; - - clock-output-names = "pcie_0_pipe_clk"; - #clock-cells = <0>; - #phy-cells = <0>; - - status = "disabled"; - }; - - sdcc1: mmc@7804000 { - compatible = "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5"; - reg = <0x07804000 0x1000>, <0x7805000 0x1000>; - reg-names = "hc", "cqhci"; - - interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "hc_irq", "pwr_irq"; - - clocks = <&gcc GCC_SDCC1_AHB_CLK>, - <&gcc GCC_SDCC1_APPS_CLK>, - <&xo_board>; - clock-names = "iface", "core", "xo"; - - status = "disabled"; - }; - - blsp1_dma: dma-controller@7884000 { - compatible = "qcom,bam-v1.7.0"; - reg = <0x07884000 0x25000>; - interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "bam_clk"; - #dma-cells = <1>; - qcom,ee = <0>; - status = "okay"; - }; - - blsp1_uart0: serial@78af000 { - compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0x078af000 0x200>; - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_UART0_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp1_dma 0>, <&blsp1_dma 1>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp1_uart0_default>; - status = "disabled"; - }; - - blsp1_uart1: serial@78b0000 { - compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0x078b0000 0x200>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp1_dma 2>, <&blsp1_dma 3>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp1_uart1_default>; - status = "disabled"; - }; - - blsp1_uart2: serial@78b1000 { - compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0x078b1000 0x200>; - interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp1_dma 4>, <&blsp1_dma 5>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp1_uart2_default>; - status = "okay"; - }; - - ethernet: ethernet@7a80000 { - compatible = "qcom,qcs404-ethqos"; - reg = <0x07a80000 0x10000>, - <0x07a96000 0x100>; - reg-names = "stmmaceth", "rgmii"; - clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii"; - clocks = <&gcc GCC_ETH_AXI_CLK>, - <&gcc GCC_ETH_SLAVE_AHB_CLK>, - <&gcc GCC_ETH_PTP_CLK>, - <&gcc GCC_ETH_RGMII_CLK>; - interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "macirq", "eth_lpi"; - - snps,tso; - rx-fifo-depth = <4096>; - tx-fifo-depth = <4096>; - - status = "disabled"; - }; - - wifi: wifi@a000000 { - compatible = "qcom,wcn3990-wifi"; - reg = <0xa000000 0x800000>; - reg-names = "membase"; - memory-region = <&wlan_msa_mem>; - interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - blsp1_uart3: serial@78b2000 { - compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0x078b2000 0x200>; - interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp1_dma 6>, <&blsp1_dma 7>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp1_uart3_default>; - status = "disabled"; - }; - - blsp1_i2c0: i2c@78b5000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x078b5000 0x600>; - interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP0_I2C_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp1_i2c0_default>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp1_spi0: spi@78b5000 { - compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x078b5000 0x600>; - interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP0_SPI_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp1_spi0_default>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp1_i2c1: i2c@78b6000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x078b6000 0x600>; - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp1_i2c1_default>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp1_spi1: spi@78b6000 { - compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x078b6000 0x600>; - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp1_spi1_default>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp1_i2c2: i2c@78b7000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x078b7000 0x600>; - interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp1_i2c2_default>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp1_spi2: spi@78b7000 { - compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x078b7000 0x600>; - interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp1_spi2_default>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp1_i2c3: i2c@78b8000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x078b8000 0x600>; - interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp1_i2c3_default>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp1_spi3: spi@78b8000 { - compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x078b8000 0x600>; - interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp1_spi3_default>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp1_i2c4: i2c@78b9000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x078b9000 0x600>; - interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp1_i2c4_default>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp1_spi4: spi@78b9000 { - compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x078b9000 0x600>; - interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp1_spi4_default>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp2_dma: dma-controller@7ac4000 { - compatible = "qcom,bam-v1.7.0"; - reg = <0x07ac4000 0x17000>; - interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP2_AHB_CLK>; - clock-names = "bam_clk"; - #dma-cells = <1>; - qcom,ee = <0>; - status = "disabled"; - }; - - blsp2_uart0: serial@7aef000 { - compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0x07aef000 0x200>; - interrupts = <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP2_UART0_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; - clock-names = "core", "iface"; - dmas = <&blsp2_dma 0>, <&blsp2_dma 1>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp2_uart0_default>; - status = "disabled"; - }; - - blsp2_i2c0: i2c@7af5000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x07af5000 0x600>; - interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP2_QUP0_I2C_APPS_CLK>, - <&gcc GCC_BLSP2_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp2_i2c0_default>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - blsp2_spi0: spi@7af5000 { - compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x07af5000 0x600>; - interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP2_QUP0_SPI_APPS_CLK>, - <&gcc GCC_BLSP2_AHB_CLK>; - clock-names = "core", "iface"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp2_spi0_default>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - sram@8600000 { - compatible = "qcom,qcs404-imem", "syscon", "simple-mfd"; - reg = <0x08600000 0x1000>; - - #address-cells = <1>; - #size-cells = <1>; - - ranges = <0 0x08600000 0x1000>; - - pil-reloc@94c { - compatible = "qcom,pil-reloc-info"; - reg = <0x94c 0xc8>; - }; - }; - - intc: interrupt-controller@b000000 { - compatible = "qcom,msm-qgic2"; - interrupt-controller; - #interrupt-cells = <3>; - reg = <0x0b000000 0x1000>, - <0x0b002000 0x1000>; - }; - - apcs_glb: mailbox@b011000 { - compatible = "qcom,qcs404-apcs-apps-global", - "qcom,msm8916-apcs-kpss-global", "syscon"; - reg = <0x0b011000 0x1000>; - #mbox-cells = <1>; - clocks = <&apcs_hfpll>, <&gcc GCC_GPLL0_AO_OUT_MAIN>; - clock-names = "pll", "aux"; - #clock-cells = <0>; - }; - - apcs_hfpll: clock-controller@b016000 { - compatible = "qcom,hfpll"; - reg = <0x0b016000 0x30>; - #clock-cells = <0>; - clock-output-names = "apcs_hfpll"; - clocks = <&xo_board>; - clock-names = "xo"; - }; - - watchdog@b017000 { - compatible = "qcom,apss-wdt-qcs404", "qcom,kpss-wdt"; - reg = <0x0b017000 0x1000>; - clocks = <&sleep_clk>; - }; - - cpr: power-controller@b018000 { - compatible = "qcom,qcs404-cpr", "qcom,cpr"; - reg = <0x0b018000 0x1000>; - interrupts = <0 15 IRQ_TYPE_EDGE_RISING>; - clocks = <&xo_board>; - clock-names = "ref"; - vdd-apc-supply = <&pms405_s3>; - #power-domain-cells = <0>; - operating-points-v2 = <&cpr_opp_table>; - acc-syscon = <&tcsr>; - - nvmem-cells = <&cpr_efuse_quot_offset1>, - <&cpr_efuse_quot_offset2>, - <&cpr_efuse_quot_offset3>, - <&cpr_efuse_init_voltage1>, - <&cpr_efuse_init_voltage2>, - <&cpr_efuse_init_voltage3>, - <&cpr_efuse_quot1>, - <&cpr_efuse_quot2>, - <&cpr_efuse_quot3>, - <&cpr_efuse_ring1>, - <&cpr_efuse_ring2>, - <&cpr_efuse_ring3>, - <&cpr_efuse_revision>; - nvmem-cell-names = "cpr_quotient_offset1", - "cpr_quotient_offset2", - "cpr_quotient_offset3", - "cpr_init_voltage1", - "cpr_init_voltage2", - "cpr_init_voltage3", - "cpr_quotient1", - "cpr_quotient2", - "cpr_quotient3", - "cpr_ring_osc1", - "cpr_ring_osc2", - "cpr_ring_osc3", - "cpr_fuse_revision"; - }; - - timer@b120000 { - #address-cells = <1>; - #size-cells = <1>; - ranges; - compatible = "arm,armv7-timer-mem"; - reg = <0x0b120000 0x1000>; - clock-frequency = <19200000>; - - frame@b121000 { - frame-number = <0>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b121000 0x1000>, - <0x0b122000 0x1000>; - }; - - frame@b123000 { - frame-number = <1>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b123000 0x1000>; - status = "disabled"; - }; - - frame@b124000 { - frame-number = <2>; - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b124000 0x1000>; - status = "disabled"; - }; - - frame@b125000 { - frame-number = <3>; - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b125000 0x1000>; - status = "disabled"; - }; - - frame@b126000 { - frame-number = <4>; - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b126000 0x1000>; - status = "disabled"; - }; - - frame@b127000 { - frame-number = <5>; - interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; - reg = <0xb127000 0x1000>; - status = "disabled"; - }; - - frame@b128000 { - frame-number = <6>; - interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b128000 0x1000>; - status = "disabled"; - }; - }; - - remoteproc_adsp: remoteproc@c700000 { - compatible = "qcom,qcs404-adsp-pas"; - reg = <0x0c700000 0x4040>; - - interrupts-extended = <&intc GIC_SPI 293 IRQ_TYPE_EDGE_RISING>, - <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, - <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, - <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, - <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", - "handover", "stop-ack"; - - clocks = <&xo_board>; - clock-names = "xo"; - - memory-region = <&adsp_fw_mem>; - - qcom,smem-states = <&adsp_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - status = "disabled"; - - glink-edge { - interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>; - - qcom,remote-pid = <2>; - mboxes = <&apcs_glb 8>; - - label = "adsp"; - }; - }; - - pcie: pci@10000000 { - compatible = "qcom,pcie-qcs404"; - reg = <0x10000000 0xf1d>, - <0x10000f20 0xa8>, - <0x07780000 0x2000>, - <0x10001000 0x2000>; - reg-names = "dbi", "elbi", "parf", "config"; - device_type = "pci"; - linux,pci-domain = <0>; - bus-range = <0x00 0xff>; - num-lanes = <1>; - #address-cells = <3>; - #size-cells = <2>; - - ranges = <0x81000000 0x0 0x00000000 0x10003000 0x0 0x00010000>, /* I/O */ - <0x82000000 0x0 0x10013000 0x10013000 0x0 0x007ed000>; /* memory */ - - interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "msi"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ - <0 0 0 2 &intc GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ - <0 0 0 3 &intc GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ - <0 0 0 4 &intc GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ - clocks = <&gcc GCC_PCIE_0_CFG_AHB_CLK>, - <&gcc GCC_PCIE_0_AUX_CLK>, - <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, - <&gcc GCC_PCIE_0_SLV_AXI_CLK>; - clock-names = "iface", "aux", "master_bus", "slave_bus"; - - resets = <&gcc GCC_PCIE_0_AXI_MASTER_ARES>, - <&gcc GCC_PCIE_0_AXI_SLAVE_ARES>, - <&gcc GCC_PCIE_0_AXI_MASTER_STICKY_ARES>, - <&gcc GCC_PCIE_0_CORE_STICKY_ARES>, - <&gcc GCC_PCIE_0_BCR>, - <&gcc GCC_PCIE_0_AHB_ARES>; - reset-names = "axi_m", - "axi_s", - "axi_m_sticky", - "pipe_sticky", - "pwr", - "ahb"; - - phys = <&pcie_phy>; - phy-names = "pciephy"; - - status = "disabled"; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <GIC_PPI 2 0xff08>, - <GIC_PPI 3 0xff08>, - <GIC_PPI 4 0xff08>, - <GIC_PPI 1 0xff08>; - }; - - smp2p-adsp { - compatible = "qcom,smp2p"; - qcom,smem = <443>, <429>; - interrupts = <GIC_SPI 291 IRQ_TYPE_EDGE_RISING>; - mboxes = <&apcs_glb 10>; - qcom,local-pid = <0>; - qcom,remote-pid = <2>; - - adsp_smp2p_out: master-kernel { - qcom,entry-name = "master-kernel"; - #qcom,smem-state-cells = <1>; - }; - - adsp_smp2p_in: slave-kernel { - qcom,entry-name = "slave-kernel"; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - smp2p-cdsp { - compatible = "qcom,smp2p"; - qcom,smem = <94>, <432>; - interrupts = <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>; - mboxes = <&apcs_glb 14>; - qcom,local-pid = <0>; - qcom,remote-pid = <5>; - - cdsp_smp2p_out: master-kernel { - qcom,entry-name = "master-kernel"; - #qcom,smem-state-cells = <1>; - }; - - cdsp_smp2p_in: slave-kernel { - qcom,entry-name = "slave-kernel"; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - smp2p-wcss { - compatible = "qcom,smp2p"; - qcom,smem = <435>, <428>; - interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>; - mboxes = <&apcs_glb 18>; - qcom,local-pid = <0>; - qcom,remote-pid = <1>; - - wcss_smp2p_out: master-kernel { - qcom,entry-name = "master-kernel"; - #qcom,smem-state-cells = <1>; - }; - - wcss_smp2p_in: slave-kernel { - qcom,entry-name = "slave-kernel"; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - thermal-zones { - aoss-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens 0>; - - trips { - aoss_alert0: trip-point0 { - temperature = <105000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - q6-hvx-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens 1>; - - trips { - q6_hvx_alert0: trip-point0 { - temperature = <105000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - lpass-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens 2>; - - trips { - lpass_alert0: trip-point0 { - temperature = <105000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - wlan-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens 3>; - - trips { - wlan_alert0: trip-point0 { - temperature = <105000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - cluster-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens 4>; - - trips { - cluster_alert0: trip-point0 { - temperature = <95000>; - hysteresis = <2000>; - type = "hot"; - }; - cluster_alert1: trip-point1 { - temperature = <105000>; - hysteresis = <2000>; - type = "passive"; - }; - cluster_crit: cluster-crit { - temperature = <120000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - cooling-maps { - map0 { - trip = <&cluster_alert1>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - - cpu0-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens 5>; - - trips { - cpu0_alert0: trip-point0 { - temperature = <95000>; - hysteresis = <2000>; - type = "hot"; - }; - cpu0_alert1: trip-point1 { - temperature = <105000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu0_crit: cpu-crit { - temperature = <120000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - cooling-maps { - map0 { - trip = <&cpu0_alert1>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - - cpu1-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens 6>; - - trips { - cpu1_alert0: trip-point0 { - temperature = <95000>; - hysteresis = <2000>; - type = "hot"; - }; - cpu1_alert1: trip-point1 { - temperature = <105000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu1_crit: cpu-crit { - temperature = <120000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - cooling-maps { - map0 { - trip = <&cpu1_alert1>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - - cpu2-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens 7>; - - trips { - cpu2_alert0: trip-point0 { - temperature = <95000>; - hysteresis = <2000>; - type = "hot"; - }; - cpu2_alert1: trip-point1 { - temperature = <105000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu2_crit: cpu-crit { - temperature = <120000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - cooling-maps { - map0 { - trip = <&cpu2_alert1>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - - cpu3-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens 8>; - - trips { - cpu3_alert0: trip-point0 { - temperature = <95000>; - hysteresis = <2000>; - type = "hot"; - }; - cpu3_alert1: trip-point1 { - temperature = <105000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu3_crit: cpu-crit { - temperature = <120000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - cooling-maps { - map0 { - trip = <&cpu3_alert1>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - - gpu-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens 9>; - - trips { - gpu_alert0: trip-point0 { - temperature = <95000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - }; -}; diff --git a/arch/arm/dts/qrb4210-rb2-u-boot.dtsi b/arch/arm/dts/qrb4210-rb2-u-boot.dtsi new file mode 100644 index 00000000000..7d1375f38c4 --- /dev/null +++ b/arch/arm/dts/qrb4210-rb2-u-boot.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0 + +/* This is usually OTG but U-Boot doesn't support that properly */ +&usb_dwc3 { + dr_mode = "host"; +}; diff --git a/arch/arm/dts/r7s72100-gr-peach-u-boot.dts b/arch/arm/dts/r7s72100-gr-peach-u-boot.dtsi index 0ae9f91fbe8..34fba29e859 100644 --- a/arch/arm/dts/r7s72100-gr-peach-u-boot.dts +++ b/arch/arm/dts/r7s72100-gr-peach-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com> */ -#include "r7s72100-gr-peach.dts" / { aliases { diff --git a/arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dts b/arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dtsi index b735e972214..3ad619bdb90 100644 --- a/arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dts +++ b/arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2021 Renesas Electronics Corporation */ -#include "r8a774a1-hihope-rzg2m-ex.dts" #include "r8a774a1-u-boot.dtsi" &gpio3 { diff --git a/arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dts b/arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dtsi index 0bdc6909bfb..6f2f6c71c2f 100644 --- a/arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dts +++ b/arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2021 Renesas Electronics Corp. */ -#include "r8a774b1-hihope-rzg2n-ex.dts" #include "r8a774b1-u-boot.dtsi" &gpio3 { diff --git a/arch/arm/dts/r8a774c0-ek874-u-boot.dts b/arch/arm/dts/r8a774c0-ek874-u-boot.dtsi index 8fa6d8074b3..dcdddd9aed6 100644 --- a/arch/arm/dts/r8a774c0-ek874-u-boot.dts +++ b/arch/arm/dts/r8a774c0-ek874-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2021 Renesas Electronisc Corporation */ -#include "r8a774c0-ek874.dts" #include "r8a774c0-u-boot.dtsi" / { diff --git a/arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dts b/arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dtsi index 03a17bac7ec..8e57e03c899 100644 --- a/arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dts +++ b/arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2020 Renesas Electronics Corp. */ -#include "r8a774e1-hihope-rzg2h-ex.dts" #include "r8a774e1-u-boot.dtsi" &gpio3 { diff --git a/arch/arm/dts/r8a7790-lager-u-boot.dts b/arch/arm/dts/r8a7790-lager-u-boot.dtsi index 28b8b604c37..ed1891706ce 100644 --- a/arch/arm/dts/r8a7790-lager-u-boot.dts +++ b/arch/arm/dts/r8a7790-lager-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a7790-lager.dts" #include "r8a7790-u-boot.dtsi" &scif0 { diff --git a/arch/arm/dts/r8a7790-stout-u-boot.dts b/arch/arm/dts/r8a7790-stout-u-boot.dtsi index 85bcb787613..3b393045e36 100644 --- a/arch/arm/dts/r8a7790-stout-u-boot.dts +++ b/arch/arm/dts/r8a7790-stout-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a7790-stout.dts" #include "r8a7790-u-boot.dtsi" &scifa0 { diff --git a/arch/arm/dts/r8a7791-koelsch-u-boot.dts b/arch/arm/dts/r8a7791-koelsch-u-boot.dtsi index c5a1332131d..541c4191d69 100644 --- a/arch/arm/dts/r8a7791-koelsch-u-boot.dts +++ b/arch/arm/dts/r8a7791-koelsch-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a7791-koelsch.dts" #include "r8a7791-u-boot.dtsi" &scif0 { diff --git a/arch/arm/dts/r8a7791-porter-u-boot.dts b/arch/arm/dts/r8a7791-porter-u-boot.dtsi index bfec1fc6d62..cbf2c5265d8 100644 --- a/arch/arm/dts/r8a7791-porter-u-boot.dts +++ b/arch/arm/dts/r8a7791-porter-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a7791-porter.dts" #include "r8a7791-u-boot.dtsi" &scif0 { diff --git a/arch/arm/dts/r8a7792-blanche-u-boot.dts b/arch/arm/dts/r8a7792-blanche-u-boot.dtsi index 1f33df81cef..8c36a3e5850 100644 --- a/arch/arm/dts/r8a7792-blanche-u-boot.dts +++ b/arch/arm/dts/r8a7792-blanche-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a7792-blanche.dts" #include "r8a7792-u-boot.dtsi" &iic3 { diff --git a/arch/arm/dts/r8a7793-gose-u-boot.dts b/arch/arm/dts/r8a7793-gose-u-boot.dtsi index dd0932ceca9..41c4361c6e1 100644 --- a/arch/arm/dts/r8a7793-gose-u-boot.dts +++ b/arch/arm/dts/r8a7793-gose-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a7793-gose.dts" #include "r8a7793-u-boot.dtsi" &scif0 { diff --git a/arch/arm/dts/r8a7794-alt-u-boot.dts b/arch/arm/dts/r8a7794-alt-u-boot.dtsi index 0a39039fc97..e156b4c93c7 100644 --- a/arch/arm/dts/r8a7794-alt-u-boot.dts +++ b/arch/arm/dts/r8a7794-alt-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a7794-alt.dts" #include "r8a7794-u-boot.dtsi" &i2c7 { diff --git a/arch/arm/dts/r8a7794-silk-u-boot.dts b/arch/arm/dts/r8a7794-silk-u-boot.dtsi index 3fcb535a3ac..e448ea7e146 100644 --- a/arch/arm/dts/r8a7794-silk-u-boot.dts +++ b/arch/arm/dts/r8a7794-silk-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a7794-silk.dts" #include "r8a7794-u-boot.dtsi" &scif2 { diff --git a/arch/arm/dts/r8a77950-salvator-x-u-boot.dts b/arch/arm/dts/r8a77951-salvator-x-u-boot.dtsi index ba7cf521d0d..744f4aaaad9 100644 --- a/arch/arm/dts/r8a77950-salvator-x-u-boot.dts +++ b/arch/arm/dts/r8a77951-salvator-x-u-boot.dtsi @@ -5,8 +5,7 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a77950-salvator-x.dts" -#include "r8a77950-u-boot.dtsi" +#include "r8a77951-u-boot.dtsi" / { sysinfo { diff --git a/arch/arm/dts/r8a77950-u-boot.dtsi b/arch/arm/dts/r8a77951-u-boot.dtsi index 92907ea09bf..4cbec591479 100644 --- a/arch/arm/dts/r8a77950-u-boot.dtsi +++ b/arch/arm/dts/r8a77951-u-boot.dtsi @@ -30,7 +30,6 @@ /delete-node/ &can1; /delete-node/ &canfd; /delete-node/ &csi20; -/delete-node/ &csi21; /delete-node/ &csi40; /delete-node/ &csi41; /delete-node/ &drif00; @@ -44,16 +43,13 @@ /delete-node/ &du; /delete-node/ &fcpf0; /delete-node/ &fcpf1; -/delete-node/ &fcpf2; /delete-node/ &fcpvb0; /delete-node/ &fcpvb1; /delete-node/ &fcpvd0; /delete-node/ &fcpvd1; /delete-node/ &fcpvd2; -/delete-node/ &fcpvd3; /delete-node/ &fcpvi0; /delete-node/ &fcpvi1; -/delete-node/ &fcpvi2; /delete-node/ &hdmi0; /delete-node/ &hdmi1; /delete-node/ &lvds0; @@ -72,10 +68,8 @@ /delete-node/ &vspd0; /delete-node/ &vspd1; /delete-node/ &vspd2; -/delete-node/ &vspd3; /delete-node/ &vspi0; /delete-node/ &vspi1; -/delete-node/ &vspi2; / { /delete-node/ cvbs-in; diff --git a/arch/arm/dts/r8a77950-ulcb-u-boot.dts b/arch/arm/dts/r8a77951-ulcb-u-boot.dtsi index e371cde349f..305c4861520 100644 --- a/arch/arm/dts/r8a77950-ulcb-u-boot.dts +++ b/arch/arm/dts/r8a77951-ulcb-u-boot.dtsi @@ -5,8 +5,7 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a77950-ulcb.dts" -#include "r8a77950-u-boot.dtsi" +#include "r8a77951-u-boot.dtsi" / { cpld { diff --git a/arch/arm/dts/r8a77960-salvator-x-u-boot.dts b/arch/arm/dts/r8a77960-salvator-x-u-boot.dtsi index 2a9f0aa2180..84a28bf885c 100644 --- a/arch/arm/dts/r8a77960-salvator-x-u-boot.dts +++ b/arch/arm/dts/r8a77960-salvator-x-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a77960-salvator-x.dts" #include "r8a77960-u-boot.dtsi" / { diff --git a/arch/arm/dts/r8a77960-ulcb-u-boot.dts b/arch/arm/dts/r8a77960-ulcb-u-boot.dtsi index 79042b20852..6372f953956 100644 --- a/arch/arm/dts/r8a77960-ulcb-u-boot.dts +++ b/arch/arm/dts/r8a77960-ulcb-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a77960-ulcb.dts" #include "r8a77960-u-boot.dtsi" / { diff --git a/arch/arm/dts/r8a77965-salvator-x-u-boot.dts b/arch/arm/dts/r8a77965-salvator-x-u-boot.dtsi index e5421f9ca8f..d9a28fe9bab 100644 --- a/arch/arm/dts/r8a77965-salvator-x-u-boot.dts +++ b/arch/arm/dts/r8a77965-salvator-x-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a77965-salvator-x.dts" #include "r8a77965-u-boot.dtsi" / { diff --git a/arch/arm/dts/r8a77965-ulcb-u-boot.dts b/arch/arm/dts/r8a77965-ulcb-u-boot.dtsi index 969911d89ce..aa5de3d0465 100644 --- a/arch/arm/dts/r8a77965-ulcb-u-boot.dts +++ b/arch/arm/dts/r8a77965-ulcb-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a77965-ulcb.dts" #include "r8a77965-u-boot.dtsi" / { diff --git a/arch/arm/dts/r8a77970-eagle-u-boot.dts b/arch/arm/dts/r8a77970-eagle-u-boot.dtsi index eb868eda414..c7971b9e9ce 100644 --- a/arch/arm/dts/r8a77970-eagle-u-boot.dts +++ b/arch/arm/dts/r8a77970-eagle-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a77970-eagle.dts" #include "r8a77970-u-boot.dtsi" #include <dt-bindings/gpio/gpio.h> diff --git a/arch/arm/dts/r8a77970-v3msk-u-boot.dts b/arch/arm/dts/r8a77970-v3msk-u-boot.dtsi index 6ee06d7c000..c7b2e07793d 100644 --- a/arch/arm/dts/r8a77970-v3msk-u-boot.dts +++ b/arch/arm/dts/r8a77970-v3msk-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2019 Cogent Embedded, Inc. */ -#include "r8a77970-v3msk.dts" #include "r8a77970-u-boot.dtsi" #include <dt-bindings/gpio/gpio.h> diff --git a/arch/arm/dts/r8a77980-condor-u-boot.dts b/arch/arm/dts/r8a77980-condor-u-boot.dtsi index f4a3b43b8ff..34a735ae5b2 100644 --- a/arch/arm/dts/r8a77980-condor-u-boot.dts +++ b/arch/arm/dts/r8a77980-condor-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a77980-condor.dts" #include "r8a77980-u-boot.dtsi" / { diff --git a/arch/arm/dts/r8a77980-v3hsk-u-boot.dts b/arch/arm/dts/r8a77980-v3hsk-u-boot.dtsi index d083df65f9a..2901d0e7b57 100644 --- a/arch/arm/dts/r8a77980-v3hsk-u-boot.dts +++ b/arch/arm/dts/r8a77980-v3hsk-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2019 Cogent Embedded, Inc. */ -#include "r8a77980-v3hsk.dts" #include "r8a77980-u-boot.dtsi" / { diff --git a/arch/arm/dts/r8a77990-ebisu-u-boot.dts b/arch/arm/dts/r8a77990-ebisu-u-boot.dtsi index fc1c4a79294..b6b7b8f3609 100644 --- a/arch/arm/dts/r8a77990-ebisu-u-boot.dts +++ b/arch/arm/dts/r8a77990-ebisu-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a77990-ebisu.dts" #include "r8a77990-u-boot.dtsi" / { diff --git a/arch/arm/dts/r8a77995-draak-u-boot.dts b/arch/arm/dts/r8a77995-draak-u-boot.dtsi index 41ceae1da77..1922c40a438 100644 --- a/arch/arm/dts/r8a77995-draak-u-boot.dts +++ b/arch/arm/dts/r8a77995-draak-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a77995-draak.dts" #include "r8a77995-u-boot.dtsi" / { diff --git a/arch/arm/dts/r8a779a0-falcon-u-boot.dts b/arch/arm/dts/r8a779a0-falcon-u-boot.dtsi index 9d28791c605..3b8a017cb41 100644 --- a/arch/arm/dts/r8a779a0-falcon-u-boot.dts +++ b/arch/arm/dts/r8a779a0-falcon-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2020 Renesas Electronics Corp. */ -#include "r8a779a0-falcon.dts" #include "r8a779a0-u-boot.dtsi" / { diff --git a/arch/arm/dts/r8a779f0-spider-u-boot.dts b/arch/arm/dts/r8a779f0-spider-u-boot.dtsi index 26fc8bcf440..2fc7e7789a2 100644 --- a/arch/arm/dts/r8a779f0-spider-u-boot.dts +++ b/arch/arm/dts/r8a779f0-spider-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2021 Renesas Electronics Corp. */ -#include "r8a779f0-spider.dts" #include "r8a779f0-u-boot.dtsi" / { diff --git a/arch/arm/dts/r8a779g0-white-hawk-u-boot.dts b/arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi index bd756036645..a102639010d 100644 --- a/arch/arm/dts/r8a779g0-white-hawk-u-boot.dts +++ b/arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2021 Renesas Electronics Corp. */ -#include "r8a779g0-white-hawk.dts" #include "r8a779g0-u-boot.dtsi" / { diff --git a/arch/arm/dts/r8a779h0-gray-hawk-u-boot.dts b/arch/arm/dts/r8a779h0-gray-hawk-u-boot.dtsi index 935ba9465dc..92c13151613 100644 --- a/arch/arm/dts/r8a779h0-gray-hawk-u-boot.dts +++ b/arch/arm/dts/r8a779h0-gray-hawk-u-boot.dtsi @@ -5,7 +5,6 @@ * Copyright (C) 2023 Renesas Electronics Corp. */ -#include "r8a779h0-gray-hawk.dts" #include "r8a779h0-u-boot.dtsi" / { diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi index d15ba94d37b..007a69f9a60 100644 --- a/arch/arm/dts/rk3308-evb-u-boot.dtsi +++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi @@ -4,14 +4,11 @@ */ #include "rk3308-u-boot.dtsi" -/ { - chosen { - u-boot,spl-boot-order = "same-as-spl", &emmc; - }; -}; - &uart4 { bootph-all; clock-frequency = <24000000>; - status = "okay"; +}; + +&uart4_xfer { + bootph-all; }; diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts index 124a2408668..184b84fdde0 100644 --- a/arch/arm/dts/rk3308-evb.dts +++ b/arch/arm/dts/rk3308-evb.dts @@ -23,7 +23,7 @@ poll-interval = <100>; keyup-threshold-microvolt = <1800000>; - func-key { + button-func { linux,code = <KEY_FN>; label = "function"; press-threshold-microvolt = <18000>; @@ -37,31 +37,31 @@ poll-interval = <100>; keyup-threshold-microvolt = <1800000>; - esc-key { + button-esc { linux,code = <KEY_MICMUTE>; label = "micmute"; press-threshold-microvolt = <1130000>; }; - home-key { + button-home { linux,code = <KEY_MODE>; label = "mode"; press-threshold-microvolt = <901000>; }; - menu-key { + button-menu { linux,code = <KEY_PLAY>; label = "play"; press-threshold-microvolt = <624000>; }; - vol-down-key { + button-down { linux,code = <KEY_VOLUMEDOWN>; label = "volume down"; press-threshold-microvolt = <300000>; }; - vol-up-key { + button-up { linux,code = <KEY_VOLUMEUP>; label = "volume up"; press-threshold-microvolt = <18000>; @@ -75,115 +75,115 @@ pinctrl-names = "default"; pinctrl-0 = <&pwr_key>; - power { + key-power { gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>; linux,code = <KEY_POWER>; label = "GPIO Key Power"; - wakeup-source; debounce-interval = <100>; + wakeup-source; }; }; vcc12v_dcin: vcc12v-dcin { compatible = "regulator-fixed"; regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; + regulator-always-on; + regulator-boot-on; }; vcc5v0_sys: vcc5v0-sys { compatible = "regulator-fixed"; regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vdd_core: vdd-core { - compatible = "pwm-regulator"; - pwms = <&pwm0 0 5000 1>; - regulator-name = "vdd_core"; - regulator-min-microvolt = <827000>; - regulator-max-microvolt = <1340000>; regulator-always-on; regulator-boot-on; - regulator-settling-time-up-us = <250>; - pwm-supply = <&vcc5v0_sys>; - }; - - vdd_log: vdd-log { - compatible = "regulator-fixed"; - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1050000>; - regulator-max-microvolt = <1050000>; - vin-supply = <&vcc5v0_sys>; - }; - - vdd_1v0: vdd-1v0 { - compatible = "regulator-fixed"; - regulator-name = "vdd_1v0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - vin-supply = <&vcc5v0_sys>; + vin-supply = <&vcc12v_dcin>; }; vccio_sdio: vcc_1v8: vcc-1v8 { compatible = "regulator-fixed"; regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; vin-supply = <&vcc_io>; }; vcc_ddr: vcc-ddr { compatible = "regulator-fixed"; regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; regulator-min-microvolt = <1500000>; regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; vin-supply = <&vcc5v0_sys>; }; vcc_io: vcc-io { compatible = "regulator-fixed"; regulator-name = "vcc_io"; - regulator-always-on; - regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; vin-supply = <&vcc5v0_sys>; }; vccio_flash: vccio-flash { compatible = "regulator-fixed"; regulator-name = "vccio_flash"; - regulator-always-on; - regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; vin-supply = <&vcc_io>; }; vcc5v0_host: vcc5v0-host { compatible = "regulator-fixed"; - enable-active-high; gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; + enable-active-high; pinctrl-names = "default"; pinctrl-0 = <&usb_drv>; regulator-name = "vbus_host"; vin-supply = <&vcc5v0_sys>; }; + + vdd_core: vdd-core { + compatible = "pwm-regulator"; + pwms = <&pwm0 0 5000 1>; + regulator-name = "vdd_core"; + regulator-min-microvolt = <827000>; + regulator-max-microvolt = <1340000>; + regulator-always-on; + regulator-boot-on; + regulator-settling-time-up-us = <250>; + pwm-supply = <&vcc5v0_sys>; + }; + + vdd_log: vdd-log { + compatible = "regulator-fixed"; + regulator-name = "vdd_log"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + }; + + vdd_1v0: vdd-1v0 { + compatible = "regulator-fixed"; + regulator-name = "vdd_1v0"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + }; }; &cpu0 { diff --git a/arch/arm/dts/rk3308-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3308-roc-cc-u-boot.dtsi index 97d922c435d..3e01e7af611 100644 --- a/arch/arm/dts/rk3308-roc-cc-u-boot.dtsi +++ b/arch/arm/dts/rk3308-roc-cc-u-boot.dtsi @@ -5,13 +5,37 @@ #include "rk3308-u-boot.dtsi" / { - chosen { - u-boot,spl-boot-order = "same-as-spl", &emmc; + aliases { + ethernet0 = &gmac; }; }; +&gmac { + assigned-clocks = <&cru SCLK_MAC>; + assigned-clock-parents = <&mac_clkin>; + clock_in_out = "input"; + pinctrl-names = "default"; + pinctrl-0 = <&rmiim1_pins &macm1_refclk>; + status = "okay"; +}; + +&gpio4 { + bootph-pre-ram; +}; + &uart2 { bootph-all; clock-frequency = <24000000>; - status = "okay"; +}; + +&uart2m0_xfer { + bootph-all; +}; + +&vcc_sd { + bootph-pre-ram; +}; + +&vdd_core { + regulator-init-microvolt = <1015000>; }; diff --git a/arch/arm/dts/rk3308-roc-cc.dts b/arch/arm/dts/rk3308-roc-cc.dts index b4a54a852ce..9232357f4fe 100644 --- a/arch/arm/dts/rk3308-roc-cc.dts +++ b/arch/arm/dts/rk3308-roc-cc.dts @@ -9,11 +9,17 @@ / { model = "Firefly ROC-RK3308-CC board"; compatible = "firefly,roc-rk3308-cc", "rockchip,rk3308"; + + aliases { + mmc0 = &sdmmc; + mmc1 = &emmc; + }; + chosen { stdout-path = "serial2:1500000n8"; }; - ir_rx { + ir-receiver { compatible = "gpio-ir-receiver"; gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; @@ -27,14 +33,15 @@ leds { compatible = "gpio-leds"; - power { + + power_led: led-0 { label = "firefly:red:power"; linux,default-trigger = "ir-power-click"; default-state = "on"; gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; }; - user { + user_led: led-1 { label = "firefly:blue:user"; linux,default-trigger = "ir-user-click"; default-state = "off"; @@ -45,10 +52,10 @@ typec_vcc5v: typec-vcc5v { compatible = "regulator-fixed"; regulator-name = "typec_vcc5v"; - regulator-always-on; - regulator-boot-on; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; }; vcc5v0_sys: vcc5v0-sys { @@ -61,29 +68,6 @@ vin-supply = <&typec_vcc5v>; }; - vdd_core: vdd-core { - compatible = "pwm-regulator"; - pwms = <&pwm0 0 5000 1>; - regulator-name = "vdd_core"; - regulator-min-microvolt = <827000>; - regulator-max-microvolt = <1340000>; - regulator-init-microvolt = <1015000>; - regulator-always-on; - regulator-boot-on; - regulator-settling-time-up-us = <250>; - pwm-supply = <&vcc5v0_sys>; - }; - - vdd_log: vdd-log { - compatible = "regulator-fixed"; - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1050000>; - regulator-max-microvolt = <1050000>; - vin-supply = <&vcc5v0_sys>; - }; - vcc_io: vcc-io { compatible = "regulator-fixed"; regulator-name = "vcc_io"; @@ -100,8 +84,8 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>; - states = <1800000 0x0 - 3300000 0x1>; + states = <1800000 0x0>, + <3300000 0x1>; vin-supply = <&vcc5v0_sys>; }; @@ -113,9 +97,30 @@ regulator-max-microvolt = <3300000>; regulator-always-on; regulator-boot-on; - vim-supply = <&vcc_io>; + vin-supply = <&vcc_io>; + }; + + vdd_core: vdd-core { + compatible = "pwm-regulator"; + pwms = <&pwm0 0 5000 1>; + regulator-name = "vdd_core"; + regulator-min-microvolt = <827000>; + regulator-max-microvolt = <1340000>; + regulator-settling-time-up-us = <250>; + regulator-always-on; + regulator-boot-on; + pwm-supply = <&vcc5v0_sys>; }; + vdd_log: vdd-log { + compatible = "regulator-fixed"; + regulator-name = "vdd_log"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + }; }; &cpu0 { @@ -123,12 +128,9 @@ }; &emmc { - bus-width = <8>; cap-mmc-highspeed; - supports-emmc; - disable-wp; + mmc-hs200-1_8v; non-removable; - num-slots = <1>; status = "okay"; }; @@ -143,15 +145,6 @@ }; }; -&mac { - assigned-clocks = <&cru SCLK_MAC>; - assigned-clock-parents = <&mac_clkin>; - clock_in_out = "input"; - pinctrl-names = "default"; - pinctrl-0 = <&rmiim1_pins &macm1_refclk>; - status = "okay"; -}; - &pwm5 { status = "okay"; pinctrl-names = "active"; @@ -181,10 +174,8 @@ }; &sdmmc { - bus-width = <4>; cap-mmc-highspeed; cap-sd-highspeed; - supports-sd; card-detect-delay = <300>; sd-uhs-sdr25; sd-uhs-sdr50; diff --git a/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi b/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi index d88dee80573..a6fb8b12da3 100644 --- a/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi +++ b/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi @@ -4,39 +4,42 @@ */ #include "rk3308-u-boot.dtsi" -/ { - chosen { - u-boot,spl-boot-order = "same-as-spl", &emmc, &sdmmc; - }; +&emmc { + cap-sd-highspeed; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus4>; }; -&uart0 { - bootph-all; -}; - -&pinctrl { +&emmc_bus4 { + bootph-pre-ram; bootph-some-ram; +}; - uart0 { - bootph-some-ram; - }; - rtc { - bootph-some-ram; - }; +&u2phy_otg { + /delete-property/ phy-supply; }; -&uart0_xfer { - bootph-some-ram; +&uart0 { + bootph-all; + clock-frequency = <24000000>; }; &uart0_cts { - bootph-some-ram; + bootph-all; }; &uart0_rts { - bootph-some-ram; + bootph-all; }; -&rtc_32k { - bootph-some-ram; +&uart0_xfer { + bootph-all; +}; + +&vcc5v0_otg { + /delete-property/ regulator-always-on; +}; + +&vdd_core { + regulator-init-microvolt = <1015000>; }; diff --git a/arch/arm/dts/rk3308-rock-pi-s.dts b/arch/arm/dts/rk3308-rock-pi-s.dts index b5a8691b3fe..b47fe02c33f 100644 --- a/arch/arm/dts/rk3308-rock-pi-s.dts +++ b/arch/arm/dts/rk3308-rock-pi-s.dts @@ -1,12 +1,10 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd - * Copyright (C) 2023 Akash Gajjar <gajjar04akash@gmail.com> - * Copyright (c) 2023 Jagan Teki <jagan@openedev.com> + * Copyright (c) 2019 Akash Gajjar <akash@openedev.com> + * Copyright (c) 2019 Jagan Teki <jagan@openedev.com> */ /dts-v1/; -#include <dt-bindings/input/input.h> #include "rk3308.dtsi" / { @@ -14,7 +12,7 @@ compatible = "radxa,rockpis", "rockchip,rk3308"; aliases { - ethernet0 = &mac; + ethernet0 = &gmac; mmc0 = &emmc; mmc1 = &sdmmc; }; @@ -107,7 +105,6 @@ regulator-name = "vdd_core"; regulator-min-microvolt = <827000>; regulator-max-microvolt = <1340000>; - regulator-init-microvolt = <1015000>; regulator-settling-time-up-us = <250>; regulator-always-on; regulator-boot-on; @@ -137,7 +134,7 @@ status = "okay"; }; -&mac { +&gmac { clock_in_out = "output"; phy-supply = <&vcc_io>; snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; @@ -146,6 +143,68 @@ status = "okay"; }; +&gpio0 { + gpio-line-names = + /* GPIO0_A0 - A7 */ + "", "", "", "", "", "", "", "", + /* GPIO0_B0 - B7 */ + "", "", "", "header1-pin3 [GPIO0_B3]", + "header1-pin5 [GPIO0_B4]", "", "", + "header1-pin11 [GPIO0_B7]", + /* GPIO0_C0 - C7 */ + "header1-pin13 [GPIO0_C0]", + "header1-pin15 [GPIO0_C1]", "", "", "", + "", "", "", + /* GPIO0_D0 - D7 */ + "", "", "", "", "", "", "", ""; +}; + +&gpio1 { + gpio-line-names = + /* GPIO1_A0 - A7 */ + "", "", "", "", "", "", "", "", + /* GPIO1_B0 - B7 */ + "", "", "", "", "", "", "", "", + /* GPIO1_C0 - C7 */ + "", "", "", "", "", "", "header1-pin21 [GPIO1_C6]", + "header1-pin19 [GPIO1_C7]", + /* GPIO1_D0 - D7 */ + "header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]", + "", "", "", "", "", ""; +}; + +&gpio2 { + gpio-line-names = + /* GPIO2_A0 - A7 */ + "header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]", + "", "", + "header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]", + "header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]", + /* GPIO2_B0 - B7 */ + "header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]", + "header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]", + "header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]", + "header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]", + /* GPIO2_C0 - C7 */ + "header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "", + /* GPIO2_D0 - D7 */ + "", "", "", "", "", "", "", ""; +}; + +&gpio3 { + gpio-line-names = + /* GPIO3_A0 - A7 */ + "", "", "", "", "", "", "", "", + /* GPIO3_B0 - B7 */ + "", "", "header2-pin42 [GPIO3_B2]", + "header2-pin41 [GPIO3_B3]", "header2-pin40 [GPIO3_B4]", + "header2-pin39 [GPIO3_B5]", "", "", + /* GPIO3_C0 - C7 */ + "", "", "", "", "", "", "", "", + /* GPIO3_D0 - D7 */ + "", "", "", "", "", "", "", ""; +}; + &i2c1 { status = "okay"; }; @@ -209,6 +268,20 @@ status = "okay"; }; +&u2phy { + status = "okay"; + + u2phy_host: host-port { + phy-supply = <&vcc5v0_otg>; + status = "okay"; + }; + + u2phy_otg: otg-port { + phy-supply = <&vcc5v0_otg>; + status = "okay"; + }; +}; + &uart0 { status = "okay"; }; @@ -223,6 +296,19 @@ }; }; +&usb_host_ehci { + status = "okay"; +}; + +&usb_host_ohci { + status = "okay"; +}; + +&usb20_otg { + dr_mode = "peripheral"; + status = "okay"; +}; + &wdt { status = "okay"; }; diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi index db2c20a7055..684fa7abddb 100644 --- a/arch/arm/dts/rk3308-u-boot.dtsi +++ b/arch/arm/dts/rk3308-u-boot.dtsi @@ -10,32 +10,134 @@ mmc0 = &emmc; mmc1 = &sdmmc; }; -}; -&cru { - bootph-all; + chosen { + u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc; + }; + + dmc: dmc@ff010000 { + compatible = "rockchip,rk3308-dmc"; + reg = <0x0 0xff010000 0x0 0x10000>; + bootph-all; + }; + + otp: nvmem@ff210000 { + compatible = "rockchip,rk3308-otp"; + reg = <0x0 0xff210000 0x0 0x4000>; + clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>, + <&cru PCLK_OTP_PHY>; + clock-names = "otp", "apb_pclk", "phy"; + resets = <&cru SRST_OTP_PHY>; + reset-names = "phy"; + #address-cells = <1>; + #size-cells = <1>; + + cpu_id: id@7 { + reg = <0x07 0x10>; + }; + }; + + rng: rng@ff2f0000 { + compatible = "rockchip,cryptov2-rng"; + reg = <0x0 0xff2f0000 0x0 0x4000>; + }; }; -&dmc { +&cru { bootph-all; }; &emmc { + bootph-pre-ram; + bootph-some-ram; + /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ u-boot,spl-fifo-mode; +}; + +&emmc_bus8 { + bootph-pre-ram; + bootph-some-ram; +}; + +&emmc_clk { + bootph-pre-ram; + bootph-some-ram; +}; + +&emmc_cmd { + bootph-pre-ram; + bootph-some-ram; +}; + +&grf { bootph-all; }; -&sdmmc { +&pcfg_pull_none { bootph-all; - u-boot,spl-fifo-mode; }; -&grf { +&pcfg_pull_none_4ma { + bootph-pre-ram; + bootph-some-ram; +}; + +&pcfg_pull_none_8ma { + bootph-pre-ram; + bootph-some-ram; +}; + +&pcfg_pull_up { bootph-all; }; -&saradc { +&pcfg_pull_up_4ma { + bootph-pre-ram; + bootph-some-ram; +}; + +&pcfg_pull_up_8ma { + bootph-pre-ram; + bootph-some-ram; +}; + +&pinctrl { + bootph-all; +}; + +&rtc_32k { + bootph-all; +}; + +&sdmmc { + bootph-pre-ram; + bootph-some-ram; + + /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ + u-boot,spl-fifo-mode; +}; + +&sdmmc_bus4 { + bootph-pre-ram; + bootph-some-ram; +}; + +&sdmmc_clk { + bootph-pre-ram; + bootph-some-ram; +}; + +&sdmmc_cmd { + bootph-pre-ram; + bootph-some-ram; +}; + +&sdmmc_det { + bootph-pre-ram; + bootph-some-ram; +}; + +&xin24m { bootph-all; - status = "okay"; }; diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi index 9a152a8a907..cfc0a87b519 100644 --- a/arch/arm/dts/rk3308.dtsi +++ b/arch/arm/dts/rk3308.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd * @@ -9,6 +9,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/soc/rockchip,boot-mode.h> #include <dt-bindings/thermal/thermal.h> / { @@ -19,6 +20,11 @@ #size-cells = <2>; aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + gpio4 = &gpio4; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; @@ -39,7 +45,7 @@ cpu0: cpu@0 { device_type = "cpu"; - compatible = "arm,cortex-a35", "arm,armv8"; + compatible = "arm,cortex-a35"; reg = <0x0 0x0>; enable-method = "psci"; clocks = <&cru ARMCLK>; @@ -52,7 +58,7 @@ cpu1: cpu@1 { device_type = "cpu"; - compatible = "arm,cortex-a35", "arm,armv8"; + compatible = "arm,cortex-a35"; reg = <0x0 0x1>; enable-method = "psci"; operating-points-v2 = <&cpu0_opp_table>; @@ -62,7 +68,7 @@ cpu2: cpu@2 { device_type = "cpu"; - compatible = "arm,cortex-a35", "arm,armv8"; + compatible = "arm,cortex-a35"; reg = <0x0 0x2>; enable-method = "psci"; operating-points-v2 = <&cpu0_opp_table>; @@ -72,7 +78,7 @@ cpu3: cpu@3 { device_type = "cpu"; - compatible = "arm,cortex-a35", "arm,armv8"; + compatible = "arm,cortex-a35"; reg = <0x0 0x3>; enable-method = "psci"; operating-points-v2 = <&cpu0_opp_table>; @@ -95,10 +101,12 @@ l2: l2-cache { compatible = "cache"; + cache-level = <2>; + cache-unified; }; }; - cpu0_opp_table: cpu0-opp-table { + cpu0_opp_table: opp-table-0 { compatible = "operating-points-v2"; opp-shared; @@ -126,7 +134,7 @@ }; arm-pmu { - compatible = "arm,cortex-a53-pmu"; + compatible = "arm,cortex-a35-pmu"; interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, @@ -163,12 +171,53 @@ grf: grf@ff000000 { compatible = "rockchip,rk3308-grf", "syscon", "simple-mfd"; - reg = <0x0 0xff000000 0x0 0x10000>; + reg = <0x0 0xff000000 0x0 0x08000>; + + reboot-mode { + compatible = "syscon-reboot-mode"; + offset = <0x500>; + mode-bootloader = <BOOT_BL_DOWNLOAD>; + mode-loader = <BOOT_BL_DOWNLOAD>; + mode-normal = <BOOT_NORMAL>; + mode-recovery = <BOOT_RECOVERY>; + mode-fastboot = <BOOT_FASTBOOT>; + }; }; - dmc: dmc@0xff010000 { - compatible = "rockchip,rk3308-dmc"; - reg = <0x0 0xff010000 0x0 0x10000>; + usb2phy_grf: syscon@ff008000 { + compatible = "rockchip,rk3308-usb2phy-grf", "syscon", "simple-mfd"; + reg = <0x0 0xff008000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + + u2phy: usb2phy@100 { + compatible = "rockchip,rk3308-usb2phy"; + reg = <0x100 0x10>; + assigned-clocks = <&cru USB480M>; + assigned-clock-parents = <&u2phy>; + clocks = <&cru SCLK_USBPHY_REF>; + clock-names = "phyclk"; + clock-output-names = "usb480m_phy"; + #clock-cells = <0>; + status = "disabled"; + + u2phy_otg: otg-port { + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "otg-bvalid", "otg-id", + "linestate"; + #phy-cells = <0>; + status = "disabled"; + }; + + u2phy_host: host-port { + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "linestate"; + #phy-cells = <0>; + status = "disabled"; + }; + }; }; detect_grf: syscon@ff00b000 { @@ -183,7 +232,6 @@ reg = <0x0 0xff00c000 0x0 0x1000>; #address-cells = <1>; #size-cells = <1>; - }; i2c0: i2c@ff040000 { @@ -239,7 +287,7 @@ }; wdt: watchdog@ff080000 { - compatible = "snps,dw-wdt"; + compatible = "rockchip,rk3308-wdt", "snps,dw-wdt"; reg = <0x0 0xff080000 0x0 0x100>; clocks = <&cru PCLK_WDT>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; @@ -321,9 +369,8 @@ clock-names = "spiclk", "apb_pclk"; dmas = <&dmac0 0>, <&dmac0 1>; dma-names = "tx", "rx"; - pinctrl-names = "default", "high_speed"; + pinctrl-names = "default"; pinctrl-0 = <&spi0_clk &spi0_csn0 &spi0_miso &spi0_mosi>; - pinctrl-1 = <&spi0_clk_hs &spi0_csn0 &spi0_miso_hs &spi0_mosi_hs>; status = "disabled"; }; @@ -337,9 +384,8 @@ clock-names = "spiclk", "apb_pclk"; dmas = <&dmac0 2>, <&dmac0 3>; dma-names = "tx", "rx"; - pinctrl-names = "default", "high_speed"; + pinctrl-names = "default"; pinctrl-0 = <&spi1_clk &spi1_csn0 &spi1_miso &spi1_mosi>; - pinctrl-1 = <&spi1_clk_hs &spi1_csn0 &spi1_miso_hs &spi1_mosi_hs>; status = "disabled"; }; @@ -353,141 +399,140 @@ clock-names = "spiclk", "apb_pclk"; dmas = <&dmac1 16>, <&dmac1 17>; dma-names = "tx", "rx"; - pinctrl-names = "default", "high_speed"; + pinctrl-names = "default"; pinctrl-0 = <&spi2_clk &spi2_csn0 &spi2_miso &spi2_mosi>; - pinctrl-1 = <&spi2_clk_hs &spi2_csn0 &spi2_miso_hs &spi2_mosi_hs>; status = "disabled"; }; pwm8: pwm@ff160000 { compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff160000 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm8_pin>; clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>; clock-names = "pwm", "pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm8_pin>; + #pwm-cells = <3>; status = "disabled"; }; pwm9: pwm@ff160010 { compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff160010 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm9_pin>; clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>; clock-names = "pwm", "pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm9_pin>; + #pwm-cells = <3>; status = "disabled"; }; pwm10: pwm@ff160020 { compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff160020 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm10_pin>; clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>; clock-names = "pwm", "pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm10_pin>; + #pwm-cells = <3>; status = "disabled"; }; pwm11: pwm@ff160030 { compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff160030 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm11_pin>; clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>; clock-names = "pwm", "pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm11_pin>; + #pwm-cells = <3>; status = "disabled"; }; pwm4: pwm@ff170000 { compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff170000 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm4_pin>; clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>; clock-names = "pwm", "pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm4_pin>; + #pwm-cells = <3>; status = "disabled"; }; pwm5: pwm@ff170010 { compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff170010 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm5_pin>; clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>; clock-names = "pwm", "pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm5_pin>; + #pwm-cells = <3>; status = "disabled"; }; pwm6: pwm@ff170020 { compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff170020 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm6_pin>; clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>; clock-names = "pwm", "pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm6_pin>; + #pwm-cells = <3>; status = "disabled"; }; pwm7: pwm@ff170030 { compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff170030 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm7_pin>; clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>; clock-names = "pwm", "pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm7_pin>; + #pwm-cells = <3>; status = "disabled"; }; pwm0: pwm@ff180000 { compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff180000 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pin>; clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>; clock-names = "pwm", "pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pin>; + #pwm-cells = <3>; status = "disabled"; }; pwm1: pwm@ff180010 { compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff180010 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm1_pin>; clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>; clock-names = "pwm", "pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm1_pin>; + #pwm-cells = <3>; status = "disabled"; }; pwm2: pwm@ff180020 { compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff180020 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm2_pin>; clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>; clock-names = "pwm", "pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm2_pin>; + #pwm-cells = <3>; status = "disabled"; }; pwm3: pwm@ff180030 { compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff180030 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm3_pin>; clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>; clock-names = "pwm", "pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm3_pin>; + #pwm-cells = <3>; status = "disabled"; }; @@ -503,41 +548,34 @@ compatible = "rockchip,rk3308-saradc", "rockchip,rk3399-saradc"; reg = <0x0 0xff1e0000 0x0 0x100>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; - #io-channel-cells = <1>; clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; clock-names = "saradc", "apb_pclk"; + #io-channel-cells = <1>; resets = <&cru SRST_SARADC_P>; reset-names = "saradc-apb"; status = "disabled"; }; - amba { - compatible = "arm,amba-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges; + dmac0: dma-controller@ff2c0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x0 0xff2c0000 0x0 0x4000>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; + arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC0>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + }; - dmac0: dma-controller@ff2c0000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xff2c0000 0x0 0x4000>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; - #dma-cells = <1>; - clocks = <&cru ACLK_DMAC0>; - clock-names = "apb_pclk"; - peripherals-req-type-burst; - }; - - dmac1: dma-controller@ff2d0000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xff2d0000 0x0 0x4000>; - interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; - #dma-cells = <1>; - clocks = <&cru ACLK_DMAC1>; - clock-names = "apb_pclk"; - peripherals-req-type-burst; - }; + dmac1: dma-controller@ff2d0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x0 0xff2d0000 0x0 0x4000>; + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; + arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC1>; + clock-names = "apb_pclk"; + #dma-cells = <1>; }; i2s_2ch_0: i2s@ff350000 { @@ -572,7 +610,7 @@ }; spdif_tx: spdif-tx@ff3a0000 { - compatible = "rockchip,rk3308-spdif", "rockchip,rk3328-spdif"; + compatible = "rockchip,rk3308-spdif", "rockchip,rk3066-spdif"; reg = <0x0 0xff3a0000 0x0 0x1000>; interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru SCLK_SPDIF_TX>, <&cru HCLK_SPDIFTX>; @@ -584,16 +622,52 @@ status = "disabled"; }; + usb20_otg: usb@ff400000 { + compatible = "rockchip,rk3308-usb", "rockchip,rk3066-usb", + "snps,dwc2"; + reg = <0x0 0xff400000 0x0 0x40000>; + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_OTG>; + clock-names = "otg"; + dr_mode = "otg"; + g-np-tx-fifo-size = <16>; + g-rx-fifo-size = <280>; + g-tx-fifo-size = <256 128 128 64 32 16>; + phys = <&u2phy_otg>; + phy-names = "usb2-phy"; + status = "disabled"; + }; + + usb_host_ehci: usb@ff440000 { + compatible = "generic-ehci"; + reg = <0x0 0xff440000 0x0 0x10000>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>, <&u2phy>; + phys = <&u2phy_host>; + phy-names = "usb"; + status = "disabled"; + }; + + usb_host_ohci: usb@ff450000 { + compatible = "generic-ohci"; + reg = <0x0 0xff450000 0x0 0x10000>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>, <&u2phy>; + phys = <&u2phy_host>; + phy-names = "usb"; + status = "disabled"; + }; + sdmmc: mmc@ff480000 { compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xff480000 0x0 0x4000>; - max-frequency = <150000000>; + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; bus-width = <4>; clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drv", "ciu-sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; - interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; + max-frequency = <150000000>; pinctrl-names = "default"; pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>; status = "disabled"; @@ -602,35 +676,49 @@ emmc: mmc@ff490000 { compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xff490000 0x0 0x4000>; - max-frequency = <150000000>; + interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; bus-width = <8>; clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drv", "ciu-sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; - interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; + max-frequency = <150000000>; status = "disabled"; }; sdio: mmc@ff4a0000 { compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xff4a0000 0x0 0x4000>; - max-frequency = <150000000>; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; bus-width = <4>; clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drv", "ciu-sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; - interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; + max-frequency = <150000000>; pinctrl-names = "default"; pinctrl-0 = <&sdio_bus4 &sdio_cmd &sdio_clk>; status = "disabled"; }; - mac: ethernet@ff4e0000 { - compatible = "rockchip,rk3308-mac"; + nfc: nand-controller@ff4b0000 { + compatible = "rockchip,rk3308-nfc", + "rockchip,rv1108-nfc"; + reg = <0x0 0xff4b0000 0x0 0x4000>; + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>; + clock-names = "ahb", "nfc"; + assigned-clocks = <&cru SCLK_NANDC>; + assigned-clock-rates = <150000000>; + pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_csn0 + &flash_rdn &flash_rdy &flash_wrn>; + pinctrl-names = "default"; + status = "disabled"; + }; + + gmac: ethernet@ff4e0000 { + compatible = "rockchip,rk3308-gmac"; reg = <0x0 0xff4e0000 0x0 0x10000>; - rockchip,grf = <&grf>; interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq"; clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX_TX>, @@ -646,40 +734,57 @@ pinctrl-0 = <&rmii_pins &mac_refclk_12ma>; resets = <&cru SRST_MAC_A>; reset-names = "stmmaceth"; + rockchip,grf = <&grf>; + status = "disabled"; + }; + + sfc: spi@ff4c0000 { + compatible = "rockchip,sfc"; + reg = <0x0 0xff4c0000 0x0 0x4000>; + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; + clock-names = "clk_sfc", "hclk_sfc"; + pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>; + pinctrl-names = "default"; status = "disabled"; }; cru: clock-controller@ff500000 { compatible = "rockchip,rk3308-cru"; reg = <0x0 0xff500000 0x0 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; rockchip,grf = <&grf>; #clock-cells = <1>; #reset-cells = <1>; + assigned-clocks = <&cru SCLK_RTC32K>; + assigned-clock-rates = <32768>; }; gic: interrupt-controller@ff580000 { compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xff581000 0x0 0x1000>, <0x0 0xff582000 0x0 0x2000>, <0x0 0xff584000 0x0 0x2000>, <0x0 0xff586000 0x0 0x2000>; interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; + #interrupt-cells = <3>; + interrupt-controller; + #address-cells = <0>; }; sram: sram@fff80000 { compatible = "mmio-sram"; reg = <0x0 0xfff80000 0x0 0x40000>; + ranges = <0 0x0 0xfff80000 0x40000>; #address-cells = <1>; #size-cells = <1>; - ranges = <0 0x0 0xfff80000 0x40000>; + /* reserved for ddr dvfs and system suspend/resume */ ddr-sram@0 { reg = <0x0 0x8000>; }; + /* reserved for vad audio buffer */ vad_sram: vad-sram@8000 { reg = <0x8000 0x38000>; @@ -692,62 +797,58 @@ #address-cells = <2>; #size-cells = <2>; ranges; - gpio0: gpio0@ff220000 { + + gpio0: gpio@ff220000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff220000 0x0 0x100>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru PCLK_GPIO0>; gpio-controller; #gpio-cells = <2>; - interrupt-controller; #interrupt-cells = <2>; }; - gpio1: gpio1@ff230000 { + gpio1: gpio@ff230000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff230000 0x0 0x100>; interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru PCLK_GPIO1>; gpio-controller; #gpio-cells = <2>; - interrupt-controller; #interrupt-cells = <2>; }; - gpio2: gpio2@ff240000 { + gpio2: gpio@ff240000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff240000 0x0 0x100>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru PCLK_GPIO2>; gpio-controller; #gpio-cells = <2>; - interrupt-controller; #interrupt-cells = <2>; }; - gpio3: gpio3@ff250000 { + gpio3: gpio@ff250000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff250000 0x0 0x100>; interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru PCLK_GPIO3>; gpio-controller; #gpio-cells = <2>; - interrupt-controller; #interrupt-cells = <2>; }; - gpio4: gpio4@ff260000 { + gpio4: gpio@ff260000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xff260000 0x0 0x100>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru PCLK_GPIO4>; gpio-controller; #gpio-cells = <2>; - interrupt-controller; #interrupt-cells = <2>; }; @@ -831,6 +932,191 @@ input-enable; }; + emmc { + emmc_clk: emmc-clk { + rockchip,pins = + <3 RK_PB1 2 &pcfg_pull_none_8ma>; + }; + + emmc_cmd: emmc-cmd { + rockchip,pins = + <3 RK_PB0 2 &pcfg_pull_up_8ma>; + }; + + emmc_pwren: emmc-pwren { + rockchip,pins = + <3 RK_PB3 2 &pcfg_pull_none>; + }; + + emmc_rstn: emmc-rstn { + rockchip,pins = + <3 RK_PB2 2 &pcfg_pull_none>; + }; + + emmc_bus1: emmc-bus1 { + rockchip,pins = + <3 RK_PA0 2 &pcfg_pull_up_8ma>; + }; + + emmc_bus4: emmc-bus4 { + rockchip,pins = + <3 RK_PA0 2 &pcfg_pull_up_8ma>, + <3 RK_PA1 2 &pcfg_pull_up_8ma>, + <3 RK_PA2 2 &pcfg_pull_up_8ma>, + <3 RK_PA3 2 &pcfg_pull_up_8ma>; + }; + + emmc_bus8: emmc-bus8 { + rockchip,pins = + <3 RK_PA0 2 &pcfg_pull_up_8ma>, + <3 RK_PA1 2 &pcfg_pull_up_8ma>, + <3 RK_PA2 2 &pcfg_pull_up_8ma>, + <3 RK_PA3 2 &pcfg_pull_up_8ma>, + <3 RK_PA4 2 &pcfg_pull_up_8ma>, + <3 RK_PA5 2 &pcfg_pull_up_8ma>, + <3 RK_PA6 2 &pcfg_pull_up_8ma>, + <3 RK_PA7 2 &pcfg_pull_up_8ma>; + }; + }; + + flash { + flash_csn0: flash-csn0 { + rockchip,pins = + <3 RK_PB5 1 &pcfg_pull_none>; + }; + + flash_rdy: flash-rdy { + rockchip,pins = + <3 RK_PB4 1 &pcfg_pull_none>; + }; + + flash_ale: flash-ale { + rockchip,pins = + <3 RK_PB3 1 &pcfg_pull_none>; + }; + + flash_cle: flash-cle { + rockchip,pins = + <3 RK_PB1 1 &pcfg_pull_none>; + }; + + flash_wrn: flash-wrn { + rockchip,pins = + <3 RK_PB0 1 &pcfg_pull_none>; + }; + + flash_rdn: flash-rdn { + rockchip,pins = + <3 RK_PB2 1 &pcfg_pull_none>; + }; + + flash_bus8: flash-bus8 { + rockchip,pins = + <3 RK_PA0 1 &pcfg_pull_up_12ma>, + <3 RK_PA1 1 &pcfg_pull_up_12ma>, + <3 RK_PA2 1 &pcfg_pull_up_12ma>, + <3 RK_PA3 1 &pcfg_pull_up_12ma>, + <3 RK_PA4 1 &pcfg_pull_up_12ma>, + <3 RK_PA5 1 &pcfg_pull_up_12ma>, + <3 RK_PA6 1 &pcfg_pull_up_12ma>, + <3 RK_PA7 1 &pcfg_pull_up_12ma>; + }; + }; + + sfc { + sfc_bus4: sfc-bus4 { + rockchip,pins = + <3 RK_PA0 3 &pcfg_pull_none>, + <3 RK_PA1 3 &pcfg_pull_none>, + <3 RK_PA2 3 &pcfg_pull_none>, + <3 RK_PA3 3 &pcfg_pull_none>; + }; + + sfc_bus2: sfc-bus2 { + rockchip,pins = + <3 RK_PA0 3 &pcfg_pull_none>, + <3 RK_PA1 3 &pcfg_pull_none>; + }; + + sfc_cs0: sfc-cs0 { + rockchip,pins = + <3 RK_PA4 3 &pcfg_pull_none>; + }; + + sfc_clk: sfc-clk { + rockchip,pins = + <3 RK_PA5 3 &pcfg_pull_none>; + }; + }; + + gmac { + rmii_pins: rmii-pins { + rockchip,pins = + /* mac_txen */ + <1 RK_PC1 3 &pcfg_pull_none_12ma>, + /* mac_txd1 */ + <1 RK_PC3 3 &pcfg_pull_none_12ma>, + /* mac_txd0 */ + <1 RK_PC2 3 &pcfg_pull_none_12ma>, + /* mac_rxd0 */ + <1 RK_PC4 3 &pcfg_pull_none>, + /* mac_rxd1 */ + <1 RK_PC5 3 &pcfg_pull_none>, + /* mac_rxer */ + <1 RK_PB7 3 &pcfg_pull_none>, + /* mac_rxdv */ + <1 RK_PC0 3 &pcfg_pull_none>, + /* mac_mdio */ + <1 RK_PB6 3 &pcfg_pull_none>, + /* mac_mdc */ + <1 RK_PB5 3 &pcfg_pull_none>; + }; + + mac_refclk_12ma: mac-refclk-12ma { + rockchip,pins = + <1 RK_PB4 3 &pcfg_pull_none_12ma>; + }; + + mac_refclk: mac-refclk { + rockchip,pins = + <1 RK_PB4 3 &pcfg_pull_none>; + }; + }; + + gmac-m1 { + rmiim1_pins: rmiim1-pins { + rockchip,pins = + /* mac_txen */ + <4 RK_PB7 2 &pcfg_pull_none_12ma>, + /* mac_txd1 */ + <4 RK_PA5 2 &pcfg_pull_none_12ma>, + /* mac_txd0 */ + <4 RK_PA4 2 &pcfg_pull_none_12ma>, + /* mac_rxd0 */ + <4 RK_PA2 2 &pcfg_pull_none>, + /* mac_rxd1 */ + <4 RK_PA3 2 &pcfg_pull_none>, + /* mac_rxer */ + <4 RK_PA0 2 &pcfg_pull_none>, + /* mac_rxdv */ + <4 RK_PA1 2 &pcfg_pull_none>, + /* mac_mdio */ + <4 RK_PB6 2 &pcfg_pull_none>, + /* mac_mdc */ + <4 RK_PB5 2 &pcfg_pull_none>; + }; + + macm1_refclk_12ma: macm1-refclk-12ma { + rockchip,pins = + <4 RK_PB4 2 &pcfg_pull_none_12ma>; + }; + + macm1_refclk: macm1-refclk { + rockchip,pins = + <4 RK_PB4 2 &pcfg_pull_none>; + }; + }; + i2c0 { i2c0_xfer: i2c0-xfer { rockchip,pins = @@ -1163,281 +1449,154 @@ }; }; - spdif_in { - spdif_in: spdif-in { + pwm0 { + pwm0_pin: pwm0-pin { rockchip,pins = - <0 RK_PC2 1 &pcfg_pull_none>; + <0 RK_PB5 1 &pcfg_pull_none>; }; - }; - spdif_out { - spdif_out: spdif-out { + pwm0_pin_pull_down: pwm0-pin-pull-down { rockchip,pins = - <0 RK_PC1 1 &pcfg_pull_none>; + <0 RK_PB5 1 &pcfg_pull_down>; }; }; - tsadc { - tsadc_otp_gpio: tsadc-otp-gpio { + pwm1 { + pwm1_pin: pwm1-pin { rockchip,pins = - <0 RK_PB2 0 &pcfg_pull_none>; + <0 RK_PB6 1 &pcfg_pull_none>; }; - tsadc_otp_out: tsadc-otp-out { + pwm1_pin_pull_down: pwm1-pin-pull-down { rockchip,pins = - <0 RK_PB2 1 &pcfg_pull_none>; + <0 RK_PB6 1 &pcfg_pull_down>; }; }; - uart0 { - uart0_xfer: uart0-xfer { - rockchip,pins = - <2 RK_PA1 1 &pcfg_pull_up>, - <2 RK_PA0 1 &pcfg_pull_up>; - }; - - uart0_cts: uart0-cts { - rockchip,pins = - <2 RK_PA2 1 &pcfg_pull_none>; - }; - - uart0_rts: uart0-rts { + pwm2 { + pwm2_pin: pwm2-pin { rockchip,pins = - <2 RK_PA3 1 &pcfg_pull_none>; + <0 RK_PB7 1 &pcfg_pull_none>; }; - uart0_rts_gpio: uart0-rts-gpio { + pwm2_pin_pull_down: pwm2-pin-pull-down { rockchip,pins = - <2 RK_PA3 0 &pcfg_pull_none>; + <0 RK_PB7 1 &pcfg_pull_down>; }; }; - uart1 { - uart1_xfer: uart1-xfer { - rockchip,pins = - <1 RK_PD1 1 &pcfg_pull_up>, - <1 RK_PD0 1 &pcfg_pull_up>; - }; - - uart1_cts: uart1-cts { + pwm3 { + pwm3_pin: pwm3-pin { rockchip,pins = - <1 RK_PC6 1 &pcfg_pull_none>; + <0 RK_PC0 1 &pcfg_pull_none>; }; - uart1_rts: uart1-rts { + pwm3_pin_pull_down: pwm3-pin-pull-down { rockchip,pins = - <1 RK_PC7 1 &pcfg_pull_none>; + <0 RK_PC0 1 &pcfg_pull_down>; }; }; - uart2-m0 { - uart2m0_xfer: uart2m0-xfer { + pwm4 { + pwm4_pin: pwm4-pin { rockchip,pins = - <1 RK_PC7 2 &pcfg_pull_up>, - <1 RK_PC6 2 &pcfg_pull_up>; + <0 RK_PA1 2 &pcfg_pull_none>; }; - }; - uart2-m1 { - uart2m1_xfer: uart2m1-xfer { + pwm4_pin_pull_down: pwm4-pin-pull-down { rockchip,pins = - <4 RK_PD3 2 &pcfg_pull_up>, - <4 RK_PD2 2 &pcfg_pull_up>; + <0 RK_PA1 2 &pcfg_pull_down>; }; }; - uart3 { - uart3_xfer: uart3-xfer { + pwm5 { + pwm5_pin: pwm5-pin { rockchip,pins = - <3 RK_PB5 4 &pcfg_pull_up>, - <3 RK_PB4 4 &pcfg_pull_up>; + <0 RK_PC1 2 &pcfg_pull_none>; }; - }; - uart3-m1 { - uart3m1_xfer: uart3m1-xfer { + pwm5_pin_pull_down: pwm5-pin-pull-down { rockchip,pins = - <0 RK_PC2 3 &pcfg_pull_up>, - <0 RK_PC1 3 &pcfg_pull_up>; + <0 RK_PC1 2 &pcfg_pull_down>; }; }; - uart4 { - - uart4_xfer: uart4-xfer { - rockchip,pins = - <4 RK_PB1 1 &pcfg_pull_up>, - <4 RK_PB0 1 &pcfg_pull_up>; - }; - - uart4_cts: uart4-cts { - rockchip,pins = - <4 RK_PA6 1 &pcfg_pull_none>; - - }; - - uart4_rts: uart4-rts { + pwm6 { + pwm6_pin: pwm6-pin { rockchip,pins = - <4 RK_PA7 1 &pcfg_pull_none>; + <0 RK_PC2 2 &pcfg_pull_none>; }; - uart4_rts_gpio: uart4-rts-gpio { + pwm6_pin_pull_down: pwm6-pin-pull-down { rockchip,pins = - <4 RK_PA7 0 &pcfg_pull_none>; + <0 RK_PC2 2 &pcfg_pull_down>; }; }; - spi0 { - spi0_clk: spi0-clk { - rockchip,pins = - <2 RK_PA2 2 &pcfg_pull_up_4ma>; - }; - - spi0_csn0: spi0-csn0 { - rockchip,pins = - <2 RK_PA3 2 &pcfg_pull_up_4ma>; - }; - - spi0_miso: spi0-miso { - rockchip,pins = - <2 RK_PA0 2 &pcfg_pull_up_4ma>; - }; - - spi0_mosi: spi0-mosi { - rockchip,pins = - <2 RK_PA1 2 &pcfg_pull_up_4ma>; - }; - - spi0_clk_hs: spi0-clk-hs { - rockchip,pins = - <2 RK_PA2 2 &pcfg_pull_up_8ma>; - }; - - spi0_miso_hs: spi0-miso-hs { + pwm7 { + pwm7_pin: pwm7-pin { rockchip,pins = - <2 RK_PA0 2 &pcfg_pull_up_8ma>; + <2 RK_PB0 2 &pcfg_pull_none>; }; - spi0_mosi_hs: spi0-mosi-hs { + pwm7_pin_pull_down: pwm7-pin-pull-down { rockchip,pins = - <2 RK_PA1 2 &pcfg_pull_up_8ma>; + <2 RK_PB0 2 &pcfg_pull_down>; }; - }; - spi1 { - spi1_clk: spi1-clk { - rockchip,pins = - <3 RK_PB3 3 &pcfg_pull_up_4ma>; - }; - - spi1_csn0: spi1-csn0 { - rockchip,pins = - <3 RK_PB5 3 &pcfg_pull_up_4ma>; - }; - - spi1_miso: spi1-miso { - rockchip,pins = - <3 RK_PB2 3 &pcfg_pull_up_4ma>; - }; - - spi1_mosi: spi1-mosi { - rockchip,pins = - <3 RK_PB4 3 &pcfg_pull_up_4ma>; - }; - - spi1_clk_hs: spi1-clk-hs { - rockchip,pins = - <3 RK_PB3 3 &pcfg_pull_up_8ma>; - }; - - spi1_miso_hs: spi1-miso-hs { + pwm8 { + pwm8_pin: pwm8-pin { rockchip,pins = - <3 RK_PB2 3 &pcfg_pull_up_8ma>; + <2 RK_PB2 2 &pcfg_pull_none>; }; - spi1_mosi_hs: spi1-mosi-hs { + pwm8_pin_pull_down: pwm8-pin-pull-down { rockchip,pins = - <3 RK_PB4 3 &pcfg_pull_up_8ma>; + <2 RK_PB2 2 &pcfg_pull_down>; }; }; - spi1-m1 { - spi1m1_miso: spi1m1-miso { - rockchip,pins = - <2 RK_PA4 2 &pcfg_pull_up_4ma>; - }; - - spi1m1_mosi: spi1m1-mosi { - rockchip,pins = - <2 RK_PA5 2 &pcfg_pull_up_4ma>; - }; - - spi1m1_clk: spi1m1-clk { - rockchip,pins = - <2 RK_PA7 2 &pcfg_pull_up_4ma>; - }; - - spi1m1_csn0: spi1m1-csn0 { - rockchip,pins = - <2 RK_PB1 2 &pcfg_pull_up_4ma>; - }; - - spi1m1_miso_hs: spi1m1-miso-hs { - rockchip,pins = - <2 RK_PA4 2 &pcfg_pull_up_8ma>; - }; - - spi1m1_mosi_hs: spi1m1-mosi-hs { - rockchip,pins = - <2 RK_PA5 2 &pcfg_pull_up_8ma>; - }; - - spi1m1_clk_hs: spi1m1-clk-hs { + pwm9 { + pwm9_pin: pwm9-pin { rockchip,pins = - <2 RK_PA7 2 &pcfg_pull_up_8ma>; + <2 RK_PB3 2 &pcfg_pull_none>; }; - spi1m1_csn0_hs: spi1m1-csn0-hs { + pwm9_pin_pull_down: pwm9-pin-pull-down { rockchip,pins = - <2 RK_PB1 2 &pcfg_pull_up_8ma>; + <2 RK_PB3 2 &pcfg_pull_down>; }; }; - spi2 { - spi2_clk: spi2-clk { - rockchip,pins = - <1 RK_PD0 3 &pcfg_pull_up_4ma>; - }; - - spi2_csn0: spi2-csn0 { - rockchip,pins = - <1 RK_PD1 3 &pcfg_pull_up_4ma>; - }; - - spi2_miso: spi2-miso { + pwm10 { + pwm10_pin: pwm10-pin { rockchip,pins = - <1 RK_PC6 3 &pcfg_pull_up_4ma>; + <2 RK_PB4 2 &pcfg_pull_none>; }; - spi2_mosi: spi2-mosi { + pwm10_pin_pull_down: pwm10-pin-pull-down { rockchip,pins = - <1 RK_PC7 3 &pcfg_pull_up_4ma>; + <2 RK_PB4 2 &pcfg_pull_down>; }; + }; - spi2_clk_hs: spi2-clk-hs { + pwm11 { + pwm11_pin: pwm11-pin { rockchip,pins = - <1 RK_PD0 3 &pcfg_pull_up_8ma>; + <2 RK_PC0 4 &pcfg_pull_none>; }; - spi2_miso_hs: spi2-miso-hs { + pwm11_pin_pull_down: pwm11-pin-pull-down { rockchip,pins = - <1 RK_PC6 3 &pcfg_pull_up_8ma>; + <2 RK_PC0 4 &pcfg_pull_down>; }; + }; - spi2_mosi_hs: spi2-mosi-hs { + rtc { + rtc_32k: rtc-32k { rockchip,pins = - <1 RK_PC7 3 &pcfg_pull_up_8ma>; + <0 RK_PC3 1 &pcfg_pull_none>; }; }; @@ -1474,17 +1633,6 @@ <4 RK_PD2 1 &pcfg_pull_up_4ma>, <4 RK_PD3 1 &pcfg_pull_up_4ma>; }; - - sdmmc_gpio: sdmmc-gpio { - rockchip,pins = - <4 RK_PD0 0 &pcfg_pull_up_4ma>, - <4 RK_PD1 0 &pcfg_pull_up_4ma>, - <4 RK_PD2 0 &pcfg_pull_up_4ma>, - <4 RK_PD3 0 &pcfg_pull_up_4ma>, - <4 RK_PD4 0 &pcfg_pull_up_4ma>, - <4 RK_PD5 0 &pcfg_pull_up_4ma>, - <4 RK_PD6 0 &pcfg_pull_up_4ma>; - }; }; sdio { @@ -1525,327 +1673,216 @@ <4 RK_PA2 1 &pcfg_pull_up_8ma>, <4 RK_PA3 1 &pcfg_pull_up_8ma>; }; - - sdio_gpio: sdio-gpio { - rockchip,pins = - <4 RK_PA0 0 &pcfg_pull_up_4ma>, - <4 RK_PA1 0 &pcfg_pull_up_4ma>, - <4 RK_PA2 0 &pcfg_pull_up_4ma>, - <4 RK_PA3 0 &pcfg_pull_up_4ma>, - <4 RK_PA4 0 &pcfg_pull_up_4ma>, - <4 RK_PA5 0 &pcfg_pull_up_4ma>; - }; }; - emmc { - emmc_clk: emmc-clk { - rockchip,pins = - <3 RK_PB1 2 &pcfg_pull_none_8ma>; - }; - - emmc_cmd: emmc-cmd { + spdif_in { + spdif_in: spdif-in { rockchip,pins = - <3 RK_PB0 2 &pcfg_pull_up_8ma>; + <0 RK_PC2 1 &pcfg_pull_none>; }; + }; - emmc_pwren: emmc-pwren { + spdif_out { + spdif_out: spdif-out { rockchip,pins = - <3 RK_PB3 2 &pcfg_pull_none>; + <0 RK_PC1 1 &pcfg_pull_none>; }; + }; - emmc_rstn: emmc-rstn { + spi0 { + spi0_clk: spi0-clk { rockchip,pins = - <3 RK_PB2 2 &pcfg_pull_none>; + <2 RK_PA2 2 &pcfg_pull_up_4ma>; }; - emmc_bus1: emmc-bus1 { + spi0_csn0: spi0-csn0 { rockchip,pins = - <3 RK_PA0 2 &pcfg_pull_up_8ma>; + <2 RK_PA3 2 &pcfg_pull_up_4ma>; }; - emmc_bus4: emmc-bus4 { + spi0_miso: spi0-miso { rockchip,pins = - <3 RK_PA0 2 &pcfg_pull_up_8ma>, - <3 RK_PA1 2 &pcfg_pull_up_8ma>, - <3 RK_PA2 2 &pcfg_pull_up_8ma>, - <3 RK_PA3 2 &pcfg_pull_up_8ma>; + <2 RK_PA0 2 &pcfg_pull_up_4ma>; }; - emmc_bus8: emmc-bus8 { + spi0_mosi: spi0-mosi { rockchip,pins = - <3 RK_PA0 2 &pcfg_pull_up_8ma>, - <3 RK_PA1 2 &pcfg_pull_up_8ma>, - <3 RK_PA2 2 &pcfg_pull_up_8ma>, - <3 RK_PA3 2 &pcfg_pull_up_8ma>, - <3 RK_PA4 2 &pcfg_pull_up_8ma>, - <3 RK_PA5 2 &pcfg_pull_up_8ma>, - <3 RK_PA6 2 &pcfg_pull_up_8ma>, - <3 RK_PA7 2 &pcfg_pull_up_8ma>; + <2 RK_PA1 2 &pcfg_pull_up_4ma>; }; }; - flash { - flash_csn0: flash-csn0 { - rockchip,pins = - <3 RK_PB5 1 &pcfg_pull_none>; - }; - - flash_rdy: flash-rdy { - rockchip,pins = - <3 RK_PB4 1 &pcfg_pull_none>; - }; - - flash_ale: flash-ale { - rockchip,pins = - <3 RK_PB3 1 &pcfg_pull_none>; - }; - - flash_cle: flash-cle { + spi1 { + spi1_clk: spi1-clk { rockchip,pins = - <3 RK_PB1 1 &pcfg_pull_none>; + <3 RK_PB3 3 &pcfg_pull_up_4ma>; }; - flash_wrn: flash-wrn { + spi1_csn0: spi1-csn0 { rockchip,pins = - <3 RK_PB0 1 &pcfg_pull_none>; + <3 RK_PB5 3 &pcfg_pull_up_4ma>; }; - flash_rdn: flash-rdn { + spi1_miso: spi1-miso { rockchip,pins = - <3 RK_PB2 1 &pcfg_pull_none>; + <3 RK_PB2 3 &pcfg_pull_up_4ma>; }; - flash_bus8: flash-bus8 { + spi1_mosi: spi1-mosi { rockchip,pins = - <3 RK_PA0 1 &pcfg_pull_up_12ma>, - <3 RK_PA1 1 &pcfg_pull_up_12ma>, - <3 RK_PA2 1 &pcfg_pull_up_12ma>, - <3 RK_PA3 1 &pcfg_pull_up_12ma>, - <3 RK_PA4 1 &pcfg_pull_up_12ma>, - <3 RK_PA5 1 &pcfg_pull_up_12ma>, - <3 RK_PA6 1 &pcfg_pull_up_12ma>, - <3 RK_PA7 1 &pcfg_pull_up_12ma>; + <3 RK_PB4 3 &pcfg_pull_up_4ma>; }; }; - pwm0 { - pwm0_pin: pwm0-pin { + spi1-m1 { + spi1m1_miso: spi1m1-miso { rockchip,pins = - <0 RK_PB5 1 &pcfg_pull_none>; + <2 RK_PA4 2 &pcfg_pull_up_4ma>; }; - pwm0_pin_pull_down: pwm0-pin-pull-down { + spi1m1_mosi: spi1m1-mosi { rockchip,pins = - <0 RK_PB5 1 &pcfg_pull_down>; + <2 RK_PA5 2 &pcfg_pull_up_4ma>; }; - }; - pwm1 { - pwm1_pin: pwm1-pin { + spi1m1_clk: spi1m1-clk { rockchip,pins = - <0 RK_PB6 1 &pcfg_pull_none>; + <2 RK_PA7 2 &pcfg_pull_up_4ma>; }; - pwm1_pin_pull_down: pwm1-pin-pull-down { + spi1m1_csn0: spi1m1-csn0 { rockchip,pins = - <0 RK_PB6 1 &pcfg_pull_down>; + <2 RK_PB1 2 &pcfg_pull_up_4ma>; }; }; - pwm2 { - pwm2_pin: pwm2-pin { + spi2 { + spi2_clk: spi2-clk { rockchip,pins = - <0 RK_PB7 1 &pcfg_pull_none>; + <1 RK_PD0 3 &pcfg_pull_up_4ma>; }; - pwm2_pin_pull_down: pwm2-pin-pull-down { + spi2_csn0: spi2-csn0 { rockchip,pins = - <0 RK_PB7 1 &pcfg_pull_down>; + <1 RK_PD1 3 &pcfg_pull_up_4ma>; }; - }; - pwm3 { - pwm3_pin: pwm3-pin { + spi2_miso: spi2-miso { rockchip,pins = - <0 RK_PC0 1 &pcfg_pull_none>; + <1 RK_PC6 3 &pcfg_pull_up_4ma>; }; - pwm3_pin_pull_down: pwm3-pin-pull-down { + spi2_mosi: spi2-mosi { rockchip,pins = - <0 RK_PC0 1 &pcfg_pull_down>; + <1 RK_PC7 3 &pcfg_pull_up_4ma>; }; }; - pwm4 { - pwm4_pin: pwm4-pin { + tsadc { + tsadc_otp_pin: tsadc-otp-pin { rockchip,pins = - <0 RK_PA1 2 &pcfg_pull_none>; + <0 RK_PB2 0 &pcfg_pull_none>; }; - pwm4_pin_pull_down: pwm4-pin-pull-down { + tsadc_otp_out: tsadc-otp-out { rockchip,pins = - <0 RK_PA1 2 &pcfg_pull_down>; + <0 RK_PB2 1 &pcfg_pull_none>; }; }; - pwm5 { - pwm5_pin: pwm5-pin { + uart0 { + uart0_xfer: uart0-xfer { rockchip,pins = - <0 RK_PC1 2 &pcfg_pull_none>; + <2 RK_PA1 1 &pcfg_pull_up>, + <2 RK_PA0 1 &pcfg_pull_up>; }; - pwm5_pin_pull_down: pwm5-pin-pull-down { + uart0_cts: uart0-cts { rockchip,pins = - <0 RK_PC1 2 &pcfg_pull_down>; + <2 RK_PA2 1 &pcfg_pull_none>; }; - }; - pwm6 { - pwm6_pin: pwm6-pin { + uart0_rts: uart0-rts { rockchip,pins = - <0 RK_PC2 2 &pcfg_pull_none>; + <2 RK_PA3 1 &pcfg_pull_none>; }; - pwm6_pin_pull_down: pwm6-pin-pull-down { + uart0_rts_pin: uart0-rts-pin { rockchip,pins = - <0 RK_PC2 2 &pcfg_pull_down>; + <2 RK_PA3 0 &pcfg_pull_none>; }; }; - pwm7 { - pwm7_pin: pwm7-pin { - rockchip,pins = - <2 RK_PB0 2 &pcfg_pull_none>; - }; - - pwm7_pin_pull_down: pwm7-pin-pull-down { + uart1 { + uart1_xfer: uart1-xfer { rockchip,pins = - <2 RK_PB0 2 &pcfg_pull_down>; + <1 RK_PD1 1 &pcfg_pull_up>, + <1 RK_PD0 1 &pcfg_pull_up>; }; - }; - pwm8 { - pwm8_pin: pwm8-pin { + uart1_cts: uart1-cts { rockchip,pins = - <2 RK_PB2 2 &pcfg_pull_none>; + <1 RK_PC6 1 &pcfg_pull_none>; }; - pwm8_pin_pull_down: pwm8-pin-pull-down { + uart1_rts: uart1-rts { rockchip,pins = - <2 RK_PB2 2 &pcfg_pull_down>; + <1 RK_PC7 1 &pcfg_pull_none>; }; }; - pwm9 { - pwm9_pin: pwm9-pin { - rockchip,pins = - <2 RK_PB3 2 &pcfg_pull_none>; - }; - - pwm9_pin_pull_down: pwm9-pin-pull-down { + uart2-m0 { + uart2m0_xfer: uart2m0-xfer { rockchip,pins = - <2 RK_PB3 2 &pcfg_pull_down>; + <1 RK_PC7 2 &pcfg_pull_up>, + <1 RK_PC6 2 &pcfg_pull_up>; }; }; - pwm10 { - pwm10_pin: pwm10-pin { - rockchip,pins = - <2 RK_PB4 2 &pcfg_pull_none>; - }; - - pwm10_pin_pull_down: pwm10-pin-pull-down { + uart2-m1 { + uart2m1_xfer: uart2m1-xfer { rockchip,pins = - <2 RK_PB4 2 &pcfg_pull_down>; + <4 RK_PD3 2 &pcfg_pull_up>, + <4 RK_PD2 2 &pcfg_pull_up>; }; }; - pwm11 { - pwm11_pin: pwm11-pin { - rockchip,pins = - <2 RK_PC0 4 &pcfg_pull_none>; - }; - - pwm11_pin_pull_down: pwm11-pin-pull-down { + uart3 { + uart3_xfer: uart3-xfer { rockchip,pins = - <2 RK_PC0 4 &pcfg_pull_down>; + <3 RK_PB5 4 &pcfg_pull_up>, + <3 RK_PB4 4 &pcfg_pull_up>; }; }; - gmac { - rmii_pins: rmii-pins { - rockchip,pins = - /* mac_txen */ - <1 RK_PC1 3 &pcfg_pull_none_12ma>, - /* mac_txd1 */ - <1 RK_PC3 3 &pcfg_pull_none_12ma>, - /* mac_txd0 */ - <1 RK_PC2 3 &pcfg_pull_none_12ma>, - /* mac_rxd0 */ - <1 RK_PC4 3 &pcfg_pull_none>, - /* mac_rxd1 */ - <1 RK_PC5 3 &pcfg_pull_none>, - /* mac_rxer */ - <1 RK_PB7 3 &pcfg_pull_none>, - /* mac_rxdv */ - <1 RK_PC0 3 &pcfg_pull_none>, - /* mac_mdio */ - <1 RK_PB6 3 &pcfg_pull_none>, - /* mac_mdc */ - <1 RK_PB5 3 &pcfg_pull_none>; - }; - - mac_refclk_12ma: mac-refclk-12ma { - rockchip,pins = - <1 RK_PB4 3 &pcfg_pull_none_12ma>; - }; - - mac_refclk: mac-refclk { + uart3-m1 { + uart3m1_xfer: uart3m1-xfer { rockchip,pins = - <1 RK_PB4 3 &pcfg_pull_none>; + <0 RK_PC2 3 &pcfg_pull_up>, + <0 RK_PC1 3 &pcfg_pull_up>; }; }; - gmac-m1 { - rmiim1_pins: rmiim1-pins { + uart4 { + uart4_xfer: uart4-xfer { rockchip,pins = - /* mac_txen */ - <4 RK_PB7 2 &pcfg_pull_none_12ma>, - /* mac_txd1 */ - <4 RK_PA5 2 &pcfg_pull_none_12ma>, - /* mac_txd0 */ - <4 RK_PA4 2 &pcfg_pull_none_12ma>, - /* mac_rxd0 */ - <4 RK_PA2 2 &pcfg_pull_none>, - /* mac_rxd1 */ - <4 RK_PA3 2 &pcfg_pull_none>, - /* mac_rxer */ - <4 RK_PA0 2 &pcfg_pull_none>, - /* mac_rxdv */ - <4 RK_PA1 2 &pcfg_pull_none>, - /* mac_mdio */ - <4 RK_PB6 2 &pcfg_pull_none>, - /* mac_mdc */ - <4 RK_PB5 2 &pcfg_pull_none>; + <4 RK_PB1 1 &pcfg_pull_up>, + <4 RK_PB0 1 &pcfg_pull_up>; }; - macm1_refclk_12ma: macm1-refclk-12ma { + uart4_cts: uart4-cts { rockchip,pins = - <4 RK_PB4 2 &pcfg_pull_none_12ma>; + <4 RK_PA6 1 &pcfg_pull_none>; }; - macm1_refclk: macm1-refclk { + uart4_rts: uart4-rts { rockchip,pins = - <4 RK_PB4 2 &pcfg_pull_none>; + <4 RK_PA7 1 &pcfg_pull_none>; }; - }; - rtc { - rtc_32k: rtc-32k { + uart4_rts_pin: uart4-rts-pin { rockchip,pins = - <0 RK_PC3 1 &pcfg_pull_none>; + <4 RK_PA7 0 &pcfg_pull_none>; }; }; - }; }; diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi index e0c6aee58ab..d3608bd0e2b 100644 --- a/arch/arm/dts/rk3328-u-boot.dtsi +++ b/arch/arm/dts/rk3328-u-boot.dtsi @@ -130,6 +130,10 @@ bootph-all; }; +&vop { + bootph-some-ram; +}; + #ifdef CONFIG_ROCKCHIP_SPI_IMAGE &binman { simple-bin-spi { diff --git a/arch/arm/dts/rk3399-rock-pi-4a-u-boot.dtsi b/arch/arm/dts/rk3399-rock-pi-4a-u-boot.dtsi index 85ee5770add..38385621deb 100644 --- a/arch/arm/dts/rk3399-rock-pi-4a-u-boot.dtsi +++ b/arch/arm/dts/rk3399-rock-pi-4a-u-boot.dtsi @@ -4,3 +4,10 @@ */ #include "rk3399-rock-pi-4-u-boot.dtsi" + +&spi1 { + flash@0 { + bootph-pre-ram; + bootph-some-ram; + }; +}; diff --git a/arch/arm/dts/rk3399-rock-pi-4a.dts b/arch/arm/dts/rk3399-rock-pi-4a.dts index 931334aa3d6..d5df8939a65 100644 --- a/arch/arm/dts/rk3399-rock-pi-4a.dts +++ b/arch/arm/dts/rk3399-rock-pi-4a.dts @@ -12,3 +12,13 @@ model = "Radxa ROCK Pi 4A"; compatible = "radxa,rockpi4a", "radxa,rockpi4", "rockchip,rk3399"; }; + +&spi1 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <10000000>; + }; +}; diff --git a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi index 791f16b206f..793ed4ae8ae 100644 --- a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi +++ b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi @@ -6,12 +6,6 @@ chosen { u-boot,spl-boot-order = "same-as-spl", &sdmmc1, &sdmmc0; }; - - rng: rng@fe388000 { - compatible = "rockchip,cryptov2-rng"; - reg = <0x0 0xfe388000 0x0 0x2000>; - status = "okay"; - }; }; &dsi_dphy0 { diff --git a/arch/arm/dts/rk3566-pinetab2-u-boot.dtsi b/arch/arm/dts/rk3566-pinetab2-u-boot.dtsi index 4aa6ab1c848..eb18008f2fe 100644 --- a/arch/arm/dts/rk3566-pinetab2-u-boot.dtsi +++ b/arch/arm/dts/rk3566-pinetab2-u-boot.dtsi @@ -3,20 +3,31 @@ #include "rk356x-u-boot.dtsi" &fspi_dual_io_pins { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; &gpio0 { - bootph-all; + bootph-pre-ram; }; &i2c0 { bootph-pre-ram; }; -&rk817 { +&i2c0_xfer { + bootph-pre-ram; +}; + +&i2s1m0_mclk { + bootph-pre-ram; +}; + +&pmic_int_l { bootph-pre-ram; +}; +&rk817 { regulators { bootph-pre-ram; }; @@ -27,15 +38,13 @@ }; &sdmmc_pwren_l { - bootph-all; + bootph-pre-ram; }; &sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; - flash@0 { bootph-pre-ram; + bootph-some-ram; }; }; diff --git a/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi b/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi index 930d660868b..0e25b7e108f 100644 --- a/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi +++ b/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi @@ -3,7 +3,7 @@ #include "rk356x-u-boot.dtsi" &gpio0 { - bootph-all; + bootph-pre-ram; }; &sdhci { @@ -13,11 +13,9 @@ }; &sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; - flash@0 { bootph-pre-ram; + bootph-some-ram; }; }; @@ -34,5 +32,5 @@ }; &vcc_sd_h { - bootph-all; + bootph-pre-ram; }; diff --git a/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi b/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi index c235b4357f7..f2c9d8e167d 100644 --- a/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi +++ b/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi @@ -9,11 +9,9 @@ }; &sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; - flash@0 { bootph-pre-ram; + bootph-some-ram; }; }; diff --git a/arch/arm/dts/rk3568-generic-u-boot.dtsi b/arch/arm/dts/rk3568-generic-u-boot.dtsi index 6e8307e3bdf..fd7f5367b75 100644 --- a/arch/arm/dts/rk3568-generic-u-boot.dtsi +++ b/arch/arm/dts/rk3568-generic-u-boot.dtsi @@ -1,3 +1,10 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) #include "rk356x-u-boot.dtsi" + +&sfc { + flash@0 { + bootph-pre-ram; + bootph-some-ram; + }; +}; diff --git a/arch/arm/dts/rk3568-generic.dts b/arch/arm/dts/rk3568-generic.dts index 88eb1bfd2aa..085a09268e8 100644 --- a/arch/arm/dts/rk3568-generic.dts +++ b/arch/arm/dts/rk3568-generic.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Minimal generic DT for RK3566/RK3568 with eMMC and SD-card enabled + * Minimal generic DT for RK3566/RK3568 with eMMC, SD-card, SPI flash and USB OTG enabled */ /dts-v1/; @@ -12,7 +12,7 @@ aliases { mmc0 = &sdhci; - mmc1 = &sdmmc; + mmc1 = &sdmmc0; }; chosen { @@ -28,7 +28,7 @@ no-sdio; non-removable; pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; status = "okay"; }; @@ -39,10 +39,39 @@ no-mmc; no-sdio; pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; status = "okay"; }; +&sfc { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + }; +}; + &uart2 { status = "okay"; }; + +&usb_host0_xhci { + dr_mode = "peripheral"; + extcon = <&usb2phy0>; + maximum-speed = "high-speed"; + phys = <&usb2phy0_otg>; + phy-names = "usb2-phy"; + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_otg { + status = "okay"; +}; diff --git a/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi b/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi index 1fc71faa9e0..d8a6dd87510 100644 --- a/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi +++ b/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi @@ -3,7 +3,8 @@ #include "rk356x-u-boot.dtsi" &fspi_dual_io_pins { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; &sdhci { @@ -15,10 +16,8 @@ }; &sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; - flash@0 { bootph-pre-ram; + bootph-some-ram; }; }; diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi index 5b823fcca5f..9d18f5d0b36 100644 --- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi +++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi @@ -26,16 +26,15 @@ }; &sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; #address-cells = <1>; #size-cells = <0>; status = "okay"; flash@0 { - bootph-pre-ram; compatible = "jedec,spi-nor"; reg = <0>; + bootph-pre-ram; + bootph-some-ram; spi-max-frequency = <24000000>; spi-rx-bus-width = <4>; spi-tx-bus-width = <1>; diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi index d347080577d..0a0943b462a 100644 --- a/arch/arm/dts/rk356x-u-boot.dtsi +++ b/arch/arm/dts/rk356x-u-boot.dtsi @@ -21,6 +21,11 @@ bootph-all; }; + rng: rng@fe388000 { + compatible = "rockchip,cryptov2-rng"; + reg = <0x0 0xfe388000 0x0 0x2000>; + }; + otp: nvmem@fe38c000 { compatible = "rockchip,rk3568-otp"; reg = <0x0 0xfe38c000 0x0 0x4000>; @@ -33,119 +38,134 @@ }; }; -&xin24m { - bootph-all; +#ifdef CONFIG_ROCKCHIP_SPI_IMAGE +&binman { + simple-bin-spi { + mkimage { + args = "-n", CONFIG_SYS_SOC, "-T", "rksd"; + offset = <0x8000>; + }; + }; }; +#endif &cru { bootph-all; }; -&pmucru { - bootph-all; +&emmc_bus8 { + bootph-pre-ram; + bootph-some-ram; }; -&grf { - bootph-all; +&emmc_clk { + bootph-pre-ram; + bootph-some-ram; }; -&pmugrf { - bootph-all; +&emmc_cmd { + bootph-pre-ram; + bootph-some-ram; }; -&pinctrl { - bootph-all; +&emmc_datastrobe { + bootph-pre-ram; + bootph-some-ram; }; -&pcfg_pull_none_smt { - bootph-all; +&emmc_rstnout { + bootph-pre-ram; + bootph-some-ram; }; -&pcfg_pull_none { - bootph-all; +&fspi_pins { + bootph-pre-ram; + bootph-some-ram; }; -&pcfg_pull_up_drv_level_2 { +&grf { bootph-all; }; -&pcfg_pull_up { +&pcfg_pull_none { bootph-all; }; -&emmc_bus8 { - bootph-all; +&pcfg_pull_none_smt { + bootph-pre-ram; + bootph-some-ram; }; -&emmc_clk { +&pcfg_pull_up { bootph-all; }; -&emmc_cmd { - bootph-all; +&pcfg_pull_up_drv_level_2 { + bootph-pre-ram; + bootph-some-ram; }; -&emmc_datastrobe { +&pinctrl { bootph-all; }; -&emmc_rstnout { +&pmucru { bootph-all; }; -&fspi_pins { +&pmugrf { bootph-all; }; -&i2c0_xfer { - bootph-all; +&sdhci { + bootph-pre-ram; + bootph-some-ram; + max-frequency = <200000000>; +}; + +&sdmmc0 { + bootph-pre-ram; + bootph-some-ram; }; &sdmmc0_bus4 { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; &sdmmc0_clk { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; &sdmmc0_cmd { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; &sdmmc0_det { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; &sdmmc0_pwren { - bootph-all; -}; - -&uart2m0_xfer { - bootph-all; -}; - -&sdhci { bootph-pre-ram; - max-frequency = <200000000>; + bootph-some-ram; }; -&sdmmc0 { - bootph-pre-ram; +&sfc { + u-boot,spl-sfc-no-dma; }; &uart2 { - bootph-pre-ram; + bootph-all; clock-frequency = <24000000>; }; -#ifdef CONFIG_ROCKCHIP_SPI_IMAGE -&binman { - simple-bin-spi { - mkimage { - args = "-n", CONFIG_SYS_SOC, "-T", "rksd"; - offset = <0x8000>; - }; - }; +&uart2m0_xfer { + bootph-all; +}; + +&xin24m { + bootph-all; }; -#endif diff --git a/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi b/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi index ed15b14ea0e..f0ef0164664 100644 --- a/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi +++ b/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi @@ -3,7 +3,8 @@ #include "rk3588-u-boot.dtsi" &fspim2_pins { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; &sdhci { @@ -12,16 +13,15 @@ }; &sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; pinctrl-names = "default"; pinctrl-0 = <&fspim2_pins>; status = "okay"; flash@0 { - bootph-pre-ram; compatible = "jedec,spi-nor"; reg = <0>; + bootph-pre-ram; + bootph-some-ram; spi-max-frequency = <24000000>; spi-rx-bus-width = <4>; spi-tx-bus-width = <1>; diff --git a/arch/arm/dts/rk3588-generic-u-boot.dtsi b/arch/arm/dts/rk3588-generic-u-boot.dtsi index 853ed58cfe5..225dfa0b682 100644 --- a/arch/arm/dts/rk3588-generic-u-boot.dtsi +++ b/arch/arm/dts/rk3588-generic-u-boot.dtsi @@ -1,3 +1,25 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) #include "rk3588s-u-boot.dtsi" + +&u2phy0 { + status = "okay"; +}; + +&u2phy0_otg { + status = "okay"; +}; + +&usbdp_phy0 { + status = "okay"; +}; + +&usbdp_phy0_u3 { + status = "okay"; +}; + +&usb_host0_xhci { + dr_mode = "peripheral"; + maximum-speed = "high-speed"; + status = "okay"; +}; diff --git a/arch/arm/dts/rk3588-generic.dts b/arch/arm/dts/rk3588-generic.dts index e4721d97a87..95d757676f1 100644 --- a/arch/arm/dts/rk3588-generic.dts +++ b/arch/arm/dts/rk3588-generic.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Minimal generic DT for RK3588S/RK3588 with eMMC and SD-card enabled + * Minimal generic DT for RK3588S/RK3588 with eMMC, SD-card and USB OTG enabled */ /dts-v1/; @@ -40,5 +40,6 @@ }; &uart2 { + pinctrl-0 = <&uart2m0_xfer>; status = "okay"; }; diff --git a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi index 60494bb8485..968385622fa 100644 --- a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi +++ b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi @@ -7,12 +7,11 @@ #include "rk3588-u-boot.dtsi" &fspim1_pins { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; &sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; pinctrl-names = "default"; pinctrl-0 = <&fspim1_pins>; #address-cells = <1>; @@ -20,9 +19,10 @@ status = "okay"; flash@0 { - bootph-pre-ram; compatible = "jedec,spi-nor"; reg = <0>; + bootph-pre-ram; + bootph-some-ram; spi-max-frequency = <24000000>; spi-rx-bus-width = <4>; spi-tx-bus-width = <1>; diff --git a/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi b/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi index 5d5fa6ffb21..1ab31a4ec5a 100644 --- a/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi +++ b/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi @@ -3,7 +3,8 @@ #include "rk3588-u-boot.dtsi" &fspim1_pins { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; &sdhci { @@ -12,10 +13,8 @@ }; &sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; - flash@0 { bootph-pre-ram; + bootph-some-ram; }; }; diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi index 9ee9dd051e3..d6020ca790f 100644 --- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi +++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi @@ -18,7 +18,8 @@ }; &fspim2_pins { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; &pinctrl { @@ -35,16 +36,15 @@ }; &sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; pinctrl-names = "default"; pinctrl-0 = <&fspim2_pins>; status = "okay"; flash@0 { - bootph-pre-ram; compatible = "jedec,spi-nor"; reg = <0>; + bootph-pre-ram; + bootph-some-ram; spi-max-frequency = <24000000>; spi-rx-bus-width = <4>; spi-tx-bus-width = <1>; diff --git a/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi b/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi index ca2a684f354..a50bcc45f21 100644 --- a/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi +++ b/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi @@ -12,6 +12,10 @@ }; &uart9 { - bootph-pre-ram; + bootph-all; clock-frequency = <24000000>; }; + +&uart9m0_xfer { + bootph-all; +}; diff --git a/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi b/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi index 6e4b97028d7..f51d7f30d78 100644 --- a/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi @@ -3,7 +3,8 @@ #include "rk3588s-u-boot.dtsi" &fspim2_pins { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; &sdhci { @@ -12,16 +13,15 @@ }; &sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; pinctrl-names = "default"; pinctrl-0 = <&fspim2_pins>; status = "okay"; flash@0 { - bootph-pre-ram; compatible = "jedec,spi-nor"; reg = <0>; + bootph-pre-ram; + bootph-some-ram; spi-max-frequency = <24000000>; spi-rx-bus-width = <4>; spi-tx-bus-width = <1>; diff --git a/arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi b/arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi index 888d1b9c12d..12a92c0cba1 100644 --- a/arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi @@ -9,14 +9,13 @@ }; &fspim0_pins { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; &sfc { - bootph-pre-ram; - u-boot,spl-sfc-no-dma; - flash@0 { bootph-pre-ram; + bootph-some-ram; }; }; diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi index ac67c777ade..d3c257983ec 100644 --- a/arch/arm/dts/rk3588s-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-u-boot.dtsi @@ -41,6 +41,17 @@ status = "disabled"; }; + vo0_grf: syscon@fd5a6000 { + compatible = "rockchip,rk3588-vo-grf", "syscon"; + reg = <0x0 0xfd5a6000 0x0 0x2000>; + clocks = <&cru PCLK_VO0GRF>; + }; + + usb_grf: syscon@fd5ac000 { + compatible = "rockchip,rk3588-usb-grf", "syscon"; + reg = <0x0 0xfd5ac000 0x0 0x4000>; + }; + usbdpphy0_grf: syscon@fd5c8000 { compatible = "rockchip,rk3588-usbdpphy-grf", "syscon"; reg = <0x0 0xfd5c8000 0x0 0x4000>; @@ -72,26 +83,9 @@ }; }; - vo0_grf: syscon@fd5a6000 { - compatible = "rockchip,rk3588-vo-grf", "syscon"; - reg = <0x0 0xfd5a6000 0x0 0x2000>; - clocks = <&cru PCLK_VO0GRF>; - }; - - usb_grf: syscon@fd5ac000 { - compatible = "rockchip,rk3588-usb-grf", "syscon"; - reg = <0x0 0xfd5ac000 0x0 0x4000>; - }; - - usbdpphy0_grf: syscon@fd5c8000 { - compatible = "rockchip,rk3588-usbdpphy-grf", "syscon"; - reg = <0x0 0xfd5c8000 0x0 0x4000>; - }; - rng: rng@fe378000 { compatible = "rockchip,trngv1"; reg = <0x0 0xfe378000 0x0 0x200>; - status = "disabled"; }; usbdp_phy0: phy@fed80000 { @@ -126,35 +120,55 @@ }; }; -&emmc_bus8 { +#ifdef CONFIG_ROCKCHIP_SPI_IMAGE +&binman { + simple-bin-spi { + mkimage { + args = "-n", CONFIG_SYS_SOC, "-T", "rksd"; + offset = <0x8000>; + }; + }; +}; +#endif + +&cru { bootph-all; }; +&emmc_bus8 { + bootph-pre-ram; + bootph-some-ram; +}; + &emmc_clk { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; &emmc_cmd { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; &emmc_data_strobe { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; &emmc_rstnout { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; -&pinctrl { +&ioc { bootph-all; }; -&pcfg_pull_none { +&pcfg_pull_down { bootph-all; }; -&pcfg_pull_up_drv_level_2 { +&pcfg_pull_none { bootph-all; }; @@ -162,16 +176,17 @@ bootph-all; }; -&xin24m { - bootph-all; +&pcfg_pull_up_drv_level_2 { + bootph-pre-ram; + bootph-some-ram; }; -&cru { - bootph-pre-ram; +&php_grf { + bootph-all; }; -&sys_grf { - bootph-pre-ram; +&pinctrl { + bootph-all; }; &pmu1grf { @@ -180,42 +195,56 @@ &scmi { bootph-pre-ram; + bootph-some-ram; }; &scmi_clk { bootph-pre-ram; + bootph-some-ram; }; -&sdmmc { +&sdhci { bootph-pre-ram; bootph-some-ram; u-boot,spl-fifo-mode; }; -&sdhci { +&sdmmc { bootph-pre-ram; bootph-some-ram; u-boot,spl-fifo-mode; }; &sdmmc_bus4 { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; &sdmmc_clk { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; &sdmmc_cmd { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; &sdmmc_det { + bootph-pre-ram; + bootph-some-ram; +}; + +&sfc { + u-boot,spl-sfc-no-dma; +}; + +&sys_grf { bootph-all; }; &uart2 { - bootph-pre-ram; + bootph-all; clock-frequency = <24000000>; }; @@ -223,17 +252,6 @@ bootph-all; }; -&ioc { - bootph-pre-ram; -}; - -#ifdef CONFIG_ROCKCHIP_SPI_IMAGE -&binman { - simple-bin-spi { - mkimage { - args = "-n", CONFIG_SYS_SOC, "-T", "rksd"; - offset = <0x8000>; - }; - }; +&xin24m { + bootph-all; }; -#endif diff --git a/arch/arm/dts/sdm845-db845c-u-boot.dtsi b/arch/arm/dts/sdm845-db845c-u-boot.dtsi index 906f9faa545..9e4533e603c 100644 --- a/arch/arm/dts/sdm845-db845c-u-boot.dtsi +++ b/arch/arm/dts/sdm845-db845c-u-boot.dtsi @@ -7,3 +7,10 @@ &pcie0_3p3v_dual { regulator-always-on; }; + +&sdhc_2 { + /* Remove the unsupported rpmhcc xo clock reference */ + clocks = <&gcc GCC_SDCC2_AHB_CLK>, + <&gcc GCC_SDCC2_APPS_CLK>; + clock-names = "iface", "core"; +}; diff --git a/arch/arm/dts/sdm845-db845c.dts b/arch/arm/dts/sdm845-db845c.dts deleted file mode 100644 index c7eba6c491b..00000000000 --- a/arch/arm/dts/sdm845-db845c.dts +++ /dev/null @@ -1,1190 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2019, Linaro Ltd. - */ - -/dts-v1/; - -#include <dt-bindings/leds/common.h> -#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> -#include <dt-bindings/regulator/qcom,rpmh-regulator.h> -#include <dt-bindings/sound/qcom,q6afe.h> -#include <dt-bindings/sound/qcom,q6asm.h> -#include "sdm845.dtsi" -#include "sdm845-wcd9340.dtsi" -#include "pm8998.dtsi" -#include "pmi8998.dtsi" - -/ { - model = "Thundercomm Dragonboard 845c"; - compatible = "thundercomm,db845c", "qcom,sdm845"; - qcom,msm-id = <341 0x20001>; - qcom,board-id = <8 0>; - - aliases { - serial0 = &uart9; - serial1 = &uart6; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - /* Fixed crystal oscillator dedicated to MCP2517FD */ - clk40M: can-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <40000000>; - }; - - dc12v: dc12v-regulator { - compatible = "regulator-fixed"; - regulator-name = "DC12V"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - regulator-always-on; - }; - - gpio-keys { - compatible = "gpio-keys"; - autorepeat; - - pinctrl-names = "default"; - pinctrl-0 = <&vol_up_pin_a>; - - key-vol-up { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>; - }; - }; - - leds { - compatible = "gpio-leds"; - - led-0 { - label = "green:user4"; - function = LED_FUNCTION_INDICATOR; - color = <LED_COLOR_ID_GREEN>; - gpios = <&pm8998_gpios 13 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "panic-indicator"; - default-state = "off"; - }; - - led-1 { - label = "yellow:wlan"; - function = LED_FUNCTION_WLAN; - color = <LED_COLOR_ID_YELLOW>; - gpios = <&pm8998_gpios 9 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "phy0tx"; - default-state = "off"; - }; - - led-2 { - label = "blue:bt"; - function = LED_FUNCTION_BLUETOOTH; - color = <LED_COLOR_ID_BLUE>; - gpios = <&pm8998_gpios 5 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "bluetooth-power"; - default-state = "off"; - }; - }; - - hdmi-out { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con: endpoint { - remote-endpoint = <<9611_out>; - }; - }; - }; - - reserved-memory { - /* Cont splash region set up by the bootloader */ - cont_splash_mem: framebuffer@9d400000 { - reg = <0x0 0x9d400000 0x0 0x2400000>; - no-map; - }; - }; - - lt9611_1v8: lt9611-vdd18-regulator { - compatible = "regulator-fixed"; - regulator-name = "LT9611_1V8"; - - vin-supply = <&vdc_5v>; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - lt9611_3v3: lt9611-3v3 { - compatible = "regulator-fixed"; - regulator-name = "LT9611_3V3"; - - vin-supply = <&vdc_3v3>; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - /* - * TODO: make it possible to drive same GPIO from two clients - * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; - * enable-active-high; - */ - }; - - pcie0_1p05v: pcie-0-1p05v-regulator { - compatible = "regulator-fixed"; - regulator-name = "PCIE0_1.05V"; - - vin-supply = <&vbat>; - regulator-min-microvolt = <1050000>; - regulator-max-microvolt = <1050000>; - - /* - * TODO: make it possible to drive same GPIO from two clients - * gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; - * enable-active-high; - */ - }; - - cam0_dvdd_1v2: cam0-dvdd-1v2-regulator { - compatible = "regulator-fixed"; - regulator-name = "CAM0_DVDD_1V2"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - enable-active-high; - gpio = <&pm8998_gpios 12 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&cam0_dvdd_1v2_en_default>; - vin-supply = <&vbat>; - }; - - cam0_avdd_2v8: cam0-avdd-2v8-regulator { - compatible = "regulator-fixed"; - regulator-name = "CAM0_AVDD_2V8"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - enable-active-high; - gpio = <&pm8998_gpios 10 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&cam0_avdd_2v8_en_default>; - vin-supply = <&vbat>; - }; - - /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */ - cam3_avdd_2v8: cam3-avdd-2v8-regulator { - compatible = "regulator-fixed"; - regulator-name = "CAM3_AVDD_2V8"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - vin-supply = <&vbat>; - }; - - pcie0_3p3v_dual: vldo-3v3-regulator { - compatible = "regulator-fixed"; - regulator-name = "VLDO_3V3"; - - vin-supply = <&vbat>; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; - enable-active-high; - - pinctrl-names = "default"; - pinctrl-0 = <&pcie0_pwren_state>; - }; - - v5p0_hdmiout: v5p0-hdmiout-regulator { - compatible = "regulator-fixed"; - regulator-name = "V5P0_HDMIOUT"; - - vin-supply = <&vdc_5v>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <500000>; - - /* - * TODO: make it possible to drive same GPIO from two clients - * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; - * enable-active-high; - */ - }; - - vbat: vbat-regulator { - compatible = "regulator-fixed"; - regulator-name = "VBAT"; - - vin-supply = <&dc12v>; - regulator-min-microvolt = <4200000>; - regulator-max-microvolt = <4200000>; - regulator-always-on; - }; - - vbat_som: vbat-som-regulator { - compatible = "regulator-fixed"; - regulator-name = "VBAT_SOM"; - - vin-supply = <&dc12v>; - regulator-min-microvolt = <4200000>; - regulator-max-microvolt = <4200000>; - regulator-always-on; - }; - - vdc_3v3: vdc-3v3-regulator { - compatible = "regulator-fixed"; - regulator-name = "VDC_3V3"; - vin-supply = <&dc12v>; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdc_5v: vdc-5v-regulator { - compatible = "regulator-fixed"; - regulator-name = "VDC_5V"; - - vin-supply = <&dc12v>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <500000>; - regulator-always-on; - }; - - vreg_s4a_1p8: vreg-s4a-1p8 { - compatible = "regulator-fixed"; - regulator-name = "vreg_s4a_1p8"; - - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - vph_pwr: vph-pwr-regulator { - compatible = "regulator-fixed"; - regulator-name = "vph_pwr"; - - vin-supply = <&vbat_som>; - }; -}; - -&adsp_pas { - status = "okay"; - - firmware-name = "qcom/sdm845/adsp.mbn"; -}; - -&apps_rsc { - regulators-0 { - compatible = "qcom,pm8998-rpmh-regulators"; - qcom,pmic-id = "a"; - vdd-s1-supply = <&vph_pwr>; - vdd-s2-supply = <&vph_pwr>; - vdd-s3-supply = <&vph_pwr>; - vdd-s4-supply = <&vph_pwr>; - vdd-s5-supply = <&vph_pwr>; - vdd-s6-supply = <&vph_pwr>; - vdd-s7-supply = <&vph_pwr>; - vdd-s8-supply = <&vph_pwr>; - vdd-s9-supply = <&vph_pwr>; - vdd-s10-supply = <&vph_pwr>; - vdd-s11-supply = <&vph_pwr>; - vdd-s12-supply = <&vph_pwr>; - vdd-s13-supply = <&vph_pwr>; - vdd-l1-l27-supply = <&vreg_s7a_1p025>; - vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; - vdd-l3-l11-supply = <&vreg_s7a_1p025>; - vdd-l4-l5-supply = <&vreg_s7a_1p025>; - vdd-l6-supply = <&vph_pwr>; - vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; - vdd-l9-supply = <&vreg_bob>; - vdd-l10-l23-l25-supply = <&vreg_bob>; - vdd-l13-l19-l21-supply = <&vreg_bob>; - vdd-l16-l28-supply = <&vreg_bob>; - vdd-l18-l22-supply = <&vreg_bob>; - vdd-l20-l24-supply = <&vreg_bob>; - vdd-l26-supply = <&vreg_s3a_1p35>; - vin-lvs-1-2-supply = <&vreg_s4a_1p8>; - - vreg_s3a_1p35: smps3 { - regulator-min-microvolt = <1352000>; - regulator-max-microvolt = <1352000>; - }; - - vreg_s5a_2p04: smps5 { - regulator-min-microvolt = <1904000>; - regulator-max-microvolt = <2040000>; - }; - - vreg_s7a_1p025: smps7 { - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1028000>; - }; - - vreg_l1a_0p875: ldo1 { - regulator-min-microvolt = <880000>; - regulator-max-microvolt = <880000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l5a_0p8: ldo5 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <800000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l12a_1p8: ldo12 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l7a_1p8: ldo7 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l13a_2p95: ldo13 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2960000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l17a_1p3: ldo17 { - regulator-min-microvolt = <1304000>; - regulator-max-microvolt = <1304000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l20a_2p95: ldo20 { - regulator-min-microvolt = <2960000>; - regulator-max-microvolt = <2968000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l21a_2p95: ldo21 { - regulator-min-microvolt = <2960000>; - regulator-max-microvolt = <2968000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l24a_3p075: ldo24 { - regulator-min-microvolt = <3088000>; - regulator-max-microvolt = <3088000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l25a_3p3: ldo25 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3312000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l26a_1p2: ldo26 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_lvs1a_1p8: lvs1 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - vreg_lvs2a_1p8: lvs2 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - }; - - regulators-1 { - compatible = "qcom,pmi8998-rpmh-regulators"; - qcom,pmic-id = "b"; - - vdd-bob-supply = <&vph_pwr>; - - vreg_bob: bob { - regulator-min-microvolt = <3312000>; - regulator-max-microvolt = <3600000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; - regulator-allow-bypass; - }; - }; -}; - -&camss { - status = "okay"; - - vdda-phy-supply = <&vreg_l1a_0p875>; - vdda-pll-supply = <&vreg_l26a_1p2>; -}; - -&cdsp_pas { - status = "okay"; - firmware-name = "qcom/sdm845/cdsp.mbn"; -}; - -&gcc { - protected-clocks = <GCC_QSPI_CORE_CLK>, - <GCC_QSPI_CORE_CLK_SRC>, - <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, - <GCC_LPASS_Q6_AXI_CLK>, - <GCC_LPASS_SWAY_CLK>; -}; - -&gmu { - status = "okay"; -}; - -&gpi_dma0 { - status = "okay"; -}; - -&gpi_dma1 { - status = "okay"; -}; - -&gpu { - status = "okay"; - zap-shader { - memory-region = <&gpu_mem>; - firmware-name = "qcom/sdm845/a630_zap.mbn"; - }; -}; - -&i2c10 { - status = "okay"; - clock-frequency = <400000>; - - lt9611_codec: hdmi-bridge@3b { - compatible = "lontium,lt9611"; - reg = <0x3b>; - #sound-dai-cells = <1>; - - interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>; - - reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>; - - vdd-supply = <<9611_1v8>; - vcc-supply = <<9611_3v3>; - - pinctrl-names = "default"; - pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - lt9611_a: endpoint { - remote-endpoint = <&mdss_dsi0_out>; - }; - }; - - port@1 { - reg = <1>; - - lt9611_b: endpoint { - remote-endpoint = <&mdss_dsi1_out>; - }; - }; - - port@2 { - reg = <2>; - - lt9611_out: endpoint { - remote-endpoint = <&hdmi_con>; - }; - }; - }; - }; -}; - -&i2c11 { - /* On Low speed expansion */ - clock-frequency = <100000>; - status = "okay"; -}; - -&i2c14 { - /* On Low speed expansion */ - clock-frequency = <100000>; - status = "okay"; -}; - -&mdss { - memory-region = <&cont_splash_mem>; - status = "okay"; -}; - -&mdss_dsi0 { - status = "okay"; - vdda-supply = <&vreg_l26a_1p2>; - - qcom,dual-dsi-mode; - qcom,master-dsi; - - ports { - port@1 { - endpoint { - remote-endpoint = <<9611_a>; - data-lanes = <0 1 2 3>; - }; - }; - }; -}; - -&mdss_dsi0_phy { - status = "okay"; - vdds-supply = <&vreg_l1a_0p875>; -}; - -&mdss_dsi1 { - vdda-supply = <&vreg_l26a_1p2>; - - qcom,dual-dsi-mode; - - /* DSI1 is slave, so use DSI0 clocks */ - assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>; - - status = "okay"; - - ports { - port@1 { - endpoint { - remote-endpoint = <<9611_b>; - data-lanes = <0 1 2 3>; - }; - }; - }; -}; - -&mdss_dsi1_phy { - vdds-supply = <&vreg_l1a_0p875>; - status = "okay"; -}; - -&mss_pil { - status = "okay"; - firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn"; -}; - -&pcie0 { - status = "okay"; - perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; - enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>; - - vddpe-3v3-supply = <&pcie0_3p3v_dual>; - - pinctrl-names = "default"; - pinctrl-0 = <&pcie0_default_state>; -}; - -&pcie0_phy { - status = "okay"; - - vdda-phy-supply = <&vreg_l1a_0p875>; - vdda-pll-supply = <&vreg_l26a_1p2>; -}; - -&pcie1 { - status = "okay"; - perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>; - - pinctrl-names = "default"; - pinctrl-0 = <&pcie1_default_state>; -}; - -&pcie1_phy { - status = "okay"; - - vdda-phy-supply = <&vreg_l1a_0p875>; - vdda-pll-supply = <&vreg_l26a_1p2>; -}; - -&pm8998_gpios { - gpio-line-names = - "NC", - "NC", - "WLAN_SW_CTRL", - "NC", - "PM_GPIO5_BLUE_BT_LED", - "VOL_UP_N", - "NC", - "ADC_IN1", - "PM_GPIO9_YEL_WIFI_LED", - "CAM0_AVDD_EN", - "NC", - "CAM0_DVDD_EN", - "PM_GPIO13_GREEN_U4_LED", - "DIV_CLK2", - "NC", - "NC", - "NC", - "SMB_STAT", - "NC", - "NC", - "ADC_IN2", - "OPTION1", - "WCSS_PWR_REQ", - "PM845_GPIO24", - "OPTION2", - "PM845_SLB"; - - cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en-state { - pins = "gpio12"; - function = "normal"; - - bias-pull-up; - drive-push-pull; - qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; - }; - - cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state { - pins = "gpio10"; - function = "normal"; - - bias-pull-up; - drive-push-pull; - qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; - }; - - vol_up_pin_a: vol-up-active-state { - pins = "gpio6"; - function = "normal"; - input-enable; - bias-pull-up; - qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; - }; -}; - -&pm8998_resin { - linux,code = <KEY_VOLUMEDOWN>; - status = "okay"; -}; - -&pmi8998_lpg { - status = "okay"; - - qcom,power-source = <1>; - - led@3 { - reg = <3>; - color = <LED_COLOR_ID_GREEN>; - function = LED_FUNCTION_HEARTBEAT; - function-enumerator = <3>; - - linux,default-trigger = "heartbeat"; - default-state = "on"; - }; - - led@4 { - reg = <4>; - color = <LED_COLOR_ID_GREEN>; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <2>; - }; - - led@5 { - reg = <5>; - color = <LED_COLOR_ID_GREEN>; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <1>; - }; -}; - -/* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */ -&q6afedai { - dai@22 { - reg = <QUATERNARY_MI2S_RX>; - qcom,sd-lines = <0 1 2 3>; - }; -}; - -&q6asmdai { - dai@0 { - reg = <0>; - }; - - dai@1 { - reg = <1>; - }; - - dai@2 { - reg = <2>; - }; - - dai@3 { - reg = <3>; - direction = <2>; - is-compress-dai; - }; -}; - -&qupv3_id_0 { - status = "okay"; -}; - -&qupv3_id_1 { - status = "okay"; -}; - -&sdhc_2 { - status = "okay"; - - pinctrl-names = "default"; - pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; - - vmmc-supply = <&vreg_l21a_2p95>; - vqmmc-supply = <&vreg_l13a_2p95>; - - bus-width = <4>; - cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>; -}; - -&sound { - compatible = "qcom,db845c-sndcard", "qcom,sdm845-sndcard"; - pinctrl-0 = <&quat_mi2s_active - &quat_mi2s_sd0_active - &quat_mi2s_sd1_active - &quat_mi2s_sd2_active - &quat_mi2s_sd3_active>; - pinctrl-names = "default"; - model = "DB845c"; - audio-routing = - "RX_BIAS", "MCLK", - "AMIC1", "MIC BIAS1", - "AMIC2", "MIC BIAS2", - "DMIC0", "MIC BIAS1", - "DMIC1", "MIC BIAS1", - "DMIC2", "MIC BIAS3", - "DMIC3", "MIC BIAS3", - "SpkrLeft IN", "SPK1 OUT", - "SpkrRight IN", "SPK2 OUT", - "MM_DL1", "MultiMedia1 Playback", - "MM_DL2", "MultiMedia2 Playback", - "MM_DL4", "MultiMedia4 Playback", - "MultiMedia3 Capture", "MM_UL3"; - - mm1-dai-link { - link-name = "MultiMedia1"; - cpu { - sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; - }; - }; - - mm2-dai-link { - link-name = "MultiMedia2"; - cpu { - sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; - }; - }; - - mm3-dai-link { - link-name = "MultiMedia3"; - cpu { - sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; - }; - }; - - mm4-dai-link { - link-name = "MultiMedia4"; - cpu { - sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>; - }; - }; - - hdmi-dai-link { - link-name = "HDMI Playback"; - cpu { - sound-dai = <&q6afedai QUATERNARY_MI2S_RX>; - }; - - platform { - sound-dai = <&q6routing>; - }; - - codec { - sound-dai = <<9611_codec 0>; - }; - }; - - slim-dai-link { - link-name = "SLIM Playback"; - cpu { - sound-dai = <&q6afedai SLIMBUS_0_RX>; - }; - - platform { - sound-dai = <&q6routing>; - }; - - codec { - sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>; - }; - }; - - slimcap-dai-link { - link-name = "SLIM Capture"; - cpu { - sound-dai = <&q6afedai SLIMBUS_0_TX>; - }; - - platform { - sound-dai = <&q6routing>; - }; - - codec { - sound-dai = <&wcd9340 1>; - }; - }; -}; - -&spi0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&qup_spi0_default>; - cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; - - can@0 { - compatible = "microchip,mcp2517fd"; - reg = <0>; - clocks = <&clk40M>; - interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>; - spi-max-frequency = <10000000>; - vdd-supply = <&vdc_5v>; - xceiver-supply = <&vdc_5v>; - }; -}; - -&spi2 { - /* On Low speed expansion */ - status = "okay"; -}; - -&tlmm { - cam0_default: cam0-default-state { - rst-pins { - pins = "gpio9"; - function = "gpio"; - - drive-strength = <16>; - bias-disable; - }; - - mclk0-pins { - pins = "gpio13"; - function = "cam_mclk"; - - drive-strength = <16>; - bias-disable; - }; - }; - - cam3_default: cam3-default-state { - rst-pins { - function = "gpio"; - pins = "gpio21"; - - drive-strength = <16>; - bias-disable; - }; - - mclk3-pins { - function = "cam_mclk"; - pins = "gpio16"; - - drive-strength = <16>; - bias-disable; - }; - }; - - dsi_sw_sel: dsi-sw-sel-state { - pins = "gpio120"; - function = "gpio"; - - drive-strength = <2>; - bias-disable; - output-high; - }; - - lt9611_irq_pin: lt9611-irq-state { - pins = "gpio84"; - function = "gpio"; - bias-disable; - }; - - pcie0_default_state: pcie0-default-state { - clkreq-pins { - pins = "gpio36"; - function = "pci_e0"; - bias-pull-up; - }; - - reset-n-pins { - pins = "gpio35"; - function = "gpio"; - - drive-strength = <2>; - output-low; - bias-pull-down; - }; - - wake-n-pins { - pins = "gpio37"; - function = "gpio"; - - drive-strength = <2>; - bias-pull-up; - }; - }; - - pcie0_pwren_state: pcie0-pwren-state { - pins = "gpio90"; - function = "gpio"; - - drive-strength = <2>; - bias-disable; - }; - - pcie1_default_state: pcie1-default-state { - perst-n-pins { - pins = "gpio102"; - function = "gpio"; - - drive-strength = <16>; - bias-disable; - }; - - clkreq-pins { - pins = "gpio103"; - function = "pci_e1"; - bias-pull-up; - }; - - wake-n-pins { - pins = "gpio11"; - function = "gpio"; - - drive-strength = <2>; - bias-pull-up; - }; - - reset-n-pins { - pins = "gpio75"; - function = "gpio"; - - drive-strength = <16>; - bias-pull-up; - output-high; - }; - }; - - sdc2_default_state: sdc2-default-state { - clk-pins { - pins = "sdc2_clk"; - bias-disable; - - /* - * It seems that mmc_test reports errors if drive - * strength is not 16 on clk, cmd, and data pins. - */ - drive-strength = <16>; - }; - - cmd-pins { - pins = "sdc2_cmd"; - bias-pull-up; - drive-strength = <10>; - }; - - data-pins { - pins = "sdc2_data"; - bias-pull-up; - drive-strength = <10>; - }; - }; - - sdc2_card_det_n: sd-card-det-n-state { - pins = "gpio126"; - function = "gpio"; - bias-pull-up; - }; -}; - -&uart3 { - label = "LS-UART0"; - pinctrl-0 = <&qup_uart3_4pin>; - - status = "disabled"; -}; - -&uart6 { - status = "okay"; - - pinctrl-0 = <&qup_uart6_4pin>; - - bluetooth { - compatible = "qcom,wcn3990-bt"; - - vddio-supply = <&vreg_s4a_1p8>; - vddxo-supply = <&vreg_l7a_1p8>; - vddrf-supply = <&vreg_l17a_1p3>; - vddch0-supply = <&vreg_l25a_3p3>; - max-speed = <3200000>; - }; -}; - -&uart9 { - label = "LS-UART1"; - status = "okay"; -}; - -&usb_1 { - status = "okay"; -}; - -&usb_1_dwc3 { - dr_mode = "peripheral"; -}; - -&usb_1_hsphy { - status = "okay"; - - vdd-supply = <&vreg_l1a_0p875>; - vdda-pll-supply = <&vreg_l12a_1p8>; - vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; - - qcom,imp-res-offset-value = <8>; - qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; - qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; - qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; -}; - -&usb_1_qmpphy { - status = "okay"; - - vdda-phy-supply = <&vreg_l26a_1p2>; - vdda-pll-supply = <&vreg_l1a_0p875>; -}; - -&usb_2 { - status = "okay"; -}; - -&usb_2_dwc3 { - dr_mode = "host"; -}; - -&usb_2_hsphy { - status = "okay"; - - vdd-supply = <&vreg_l1a_0p875>; - vdda-pll-supply = <&vreg_l12a_1p8>; - vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; - - qcom,imp-res-offset-value = <8>; - qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>; -}; - -&usb_2_qmpphy { - status = "okay"; - - vdda-phy-supply = <&vreg_l26a_1p2>; - vdda-pll-supply = <&vreg_l1a_0p875>; -}; - -&ufs_mem_hc { - status = "okay"; - - reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; - - vcc-supply = <&vreg_l20a_2p95>; - vcc-max-microamp = <800000>; -}; - -&ufs_mem_phy { - status = "okay"; - - vdda-phy-supply = <&vreg_l1a_0p875>; - vdda-pll-supply = <&vreg_l26a_1p2>; -}; - -&venus { - status = "okay"; -}; - -&wcd9340 { - reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; - vdd-buck-supply = <&vreg_s4a_1p8>; - vdd-buck-sido-supply = <&vreg_s4a_1p8>; - vdd-tx-supply = <&vreg_s4a_1p8>; - vdd-rx-supply = <&vreg_s4a_1p8>; - vdd-io-supply = <&vreg_s4a_1p8>; - - swm: swm@c85 { - left_spkr: speaker@0,1 { - compatible = "sdw10217201000"; - reg = <0 1>; - powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; - #thermal-sensor-cells = <0>; - sound-name-prefix = "SpkrLeft"; - #sound-dai-cells = <0>; - }; - - right_spkr: speaker@0,2 { - compatible = "sdw10217201000"; - powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; - reg = <0 2>; - #thermal-sensor-cells = <0>; - sound-name-prefix = "SpkrRight"; - #sound-dai-cells = <0>; - }; - }; -}; - -&wifi { - status = "okay"; - - vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; - vdd-1.8-xo-supply = <&vreg_l7a_1p8>; - vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; - vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; - - qcom,snoc-host-cap-8bit-quirk; - qcom,ath10k-calibration-variant = "Thundercomm_DB845C"; -}; - -/* PINCTRL - additions to nodes defined in sdm845.dtsi */ -&qup_spi2_default { - drive-strength = <16>; -}; - -&qup_i2c10_default { - drive-strength = <2>; - bias-disable; -}; - -&qup_uart9_rx { - drive-strength = <2>; - bias-pull-up; -}; - -&qup_uart9_tx { - drive-strength = <2>; - bias-disable; -}; - -/* PINCTRL - additions to nodes defined in sdm845.dtsi */ -&qup_spi0_default { - drive-strength = <6>; - bias-disable; -}; diff --git a/arch/arm/dts/sdm845-samsung-starqltechn.dts b/arch/arm/dts/sdm845-samsung-starqltechn.dts deleted file mode 100644 index d37a433130b..00000000000 --- a/arch/arm/dts/sdm845-samsung-starqltechn.dts +++ /dev/null @@ -1,460 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * SDM845 Samsung S9 (SM-G9600) (starqltechn / star2qltechn) common device tree source - * - * Copyright (c) 2020, The Linux Foundation. All rights reserved. - */ - -/dts-v1/; - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/regulator/qcom,rpmh-regulator.h> -#include "sdm845.dtsi" - -/ { - chassis-type = "handset"; - model = "Samsung Galaxy S9 SM-G9600"; - compatible = "samsung,starqltechn", "qcom,sdm845"; - - chosen { - #address-cells = <2>; - #size-cells = <2>; - ranges; - framebuffer: framebuffer@9d400000 { - compatible = "simple-framebuffer"; - reg = <0 0x9d400000 0 (2960 * 1440 * 4)>;//2400000 - width = <1440>; - height = <2960>; - stride = <(1440 * 4)>; - format = "a8r8g8b8"; - }; - }; - - vph_pwr: vph-pwr-regulator { - compatible = "regulator-fixed"; - regulator-name = "vph_pwr"; - regulator-min-microvolt = <3700000>; - regulator-max-microvolt = <3700000>; - }; - - /* - * Apparently RPMh does not provide support for PM8998 S4 because it - * is always-on; model it as a fixed regulator. - */ - vreg_s4a_1p8: pm8998-smps4 { - compatible = "regulator-fixed"; - regulator-name = "vreg_s4a_1p8"; - - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-always-on; - regulator-boot-on; - - vin-supply = <&vph_pwr>; - }; - - reserved-memory { - memory@9d400000 { - reg = <0x0 0x9d400000 0x0 0x02400000>; - no-map; - }; - - memory@a1300000 { - compatible = "ramoops"; - reg = <0x0 0xa1300000 0x0 0x100000>; - record-size = <0x40000>; - console-size = <0x40000>; - ftrace-size = <0x40000>; - pmsg-size = <0x40000>; - }; - }; -}; - - -&apps_rsc { - regulators-0 { - compatible = "qcom,pm8998-rpmh-regulators"; - qcom,pmic-id = "a"; - - vdd-s1-supply = <&vph_pwr>; - vdd-s2-supply = <&vph_pwr>; - vdd-s3-supply = <&vph_pwr>; - vdd-s4-supply = <&vph_pwr>; - vdd-s5-supply = <&vph_pwr>; - vdd-s6-supply = <&vph_pwr>; - vdd-s7-supply = <&vph_pwr>; - vdd-s8-supply = <&vph_pwr>; - vdd-s9-supply = <&vph_pwr>; - vdd-s10-supply = <&vph_pwr>; - vdd-s11-supply = <&vph_pwr>; - vdd-s12-supply = <&vph_pwr>; - vdd-s13-supply = <&vph_pwr>; - vdd-l1-l27-supply = <&vreg_s7a_1p025>; - vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; - vdd-l3-l11-supply = <&vreg_s7a_1p025>; - vdd-l4-l5-supply = <&vreg_s7a_1p025>; - vdd-l6-supply = <&vph_pwr>; - vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; - vdd-l26-supply = <&vreg_s3a_1p35>; - vin-lvs-1-2-supply = <&vreg_s4a_1p8>; - - vreg_s2a_1p125: smps2 { - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - }; - - vreg_s3a_1p35: smps3 { - regulator-min-microvolt = <1352000>; - regulator-max-microvolt = <1352000>; - }; - - vreg_s5a_2p04: smps5 { - regulator-min-microvolt = <1904000>; - regulator-max-microvolt = <2040000>; - }; - - vreg_s7a_1p025: smps7 { - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1028000>; - }; - - vdd_qusb_hs0: - vdda_hp_pcie_core: - vdda_mipi_csi0_0p9: - vdda_mipi_csi1_0p9: - vdda_mipi_csi2_0p9: - vdda_mipi_dsi0_pll: - vdda_mipi_dsi1_pll: - vdda_qlink_lv: - vdda_qlink_lv_ck: - vdda_qrefs_0p875: - vdda_pcie_core: - vdda_pll_cc_ebi01: - vdda_pll_cc_ebi23: - vdda_sp_sensor: - vdda_ufs1_core: - vdda_ufs2_core: - vdda_usb1_ss_core: - vdda_usb2_ss_core: - vreg_l1a_0p875: ldo1 { - regulator-min-microvolt = <880000>; - regulator-max-microvolt = <880000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vddpx_10: - vreg_l2a_1p2: ldo2 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - regulator-always-on; - }; - - vreg_l3a_1p0: ldo3 { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vdd_wcss_cx: - vdd_wcss_mx: - vdda_wcss_pll: - vreg_l5a_0p8: ldo5 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <800000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vddpx_13: - vreg_l6a_1p8: ldo6 { - regulator-min-microvolt = <1856000>; - regulator-max-microvolt = <1856000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l7a_1p8: ldo7 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l8a_1p2: ldo8 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1248000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l9a_1p8: ldo9 { - regulator-min-microvolt = <1704000>; - regulator-max-microvolt = <2928000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l10a_1p8: ldo10 { - regulator-min-microvolt = <1704000>; - regulator-max-microvolt = <2928000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l11a_1p0: ldo11 { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1048000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vdd_qfprom: - vdd_qfprom_sp: - vdda_apc1_cs_1p8: - vdda_gfx_cs_1p8: - vdda_qrefs_1p8: - vdda_qusb_hs0_1p8: - vddpx_11: - vreg_l12a_1p8: ldo12 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vddpx_2: - vreg_l13a_2p95: ldo13 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2960000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l14a_1p88: ldo14 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l15a_1p8: ldo15 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l16a_2p7: ldo16 { - regulator-min-microvolt = <2704000>; - regulator-max-microvolt = <2704000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l17a_1p3: ldo17 { - regulator-min-microvolt = <1304000>; - regulator-max-microvolt = <1304000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l18a_2p7: ldo18 { - regulator-min-microvolt = <2704000>; - regulator-max-microvolt = <2960000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l19a_3p0: ldo19 { - regulator-min-microvolt = <2856000>; - regulator-max-microvolt = <3104000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l20a_2p95: ldo20 { - regulator-min-microvolt = <2704000>; - regulator-max-microvolt = <2960000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l21a_2p95: ldo21 { - regulator-min-microvolt = <2704000>; - regulator-max-microvolt = <2960000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l22a_2p85: ldo22 { - regulator-min-microvolt = <2864000>; - regulator-max-microvolt = <3312000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l23a_3p3: ldo23 { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3312000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vdda_qusb_hs0_3p1: - vreg_l24a_3p075: ldo24 { - regulator-min-microvolt = <3088000>; - regulator-max-microvolt = <3088000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l25a_3p3: ldo25 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3312000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vdda_hp_pcie_1p2: - vdda_hv_ebi0: - vdda_hv_ebi1: - vdda_hv_ebi2: - vdda_hv_ebi3: - vdda_mipi_csi_1p25: - vdda_mipi_dsi0_1p2: - vdda_mipi_dsi1_1p2: - vdda_pcie_1p2: - vdda_ufs1_1p2: - vdda_ufs2_1p2: - vdda_usb1_ss_1p2: - vdda_usb2_ss_1p2: - vreg_l26a_1p2: ldo26 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l28a_3p0: ldo28 { - regulator-min-microvolt = <2856000>; - regulator-max-microvolt = <3008000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_lvs1a_1p8: lvs1 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - vreg_lvs2a_1p8: lvs2 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - }; - - regulators-1 { - compatible = "qcom,pm8005-rpmh-regulators"; - qcom,pmic-id = "c"; - - vdd-s1-supply = <&vph_pwr>; - vdd-s2-supply = <&vph_pwr>; - vdd-s3-supply = <&vph_pwr>; - vdd-s4-supply = <&vph_pwr>; - - vreg_s3c_0p6: smps3 { - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <600000>; - }; - }; -}; - -&gcc { - protected-clocks = <GCC_QSPI_CORE_CLK>, - <GCC_QSPI_CORE_CLK_SRC>, - <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, - <GCC_LPASS_Q6_AXI_CLK>, - <GCC_LPASS_SWAY_CLK>; -}; - -&i2c10 { - clock-frequency = <400000>; - status = "okay"; -}; - -&qupv3_id_1 { - status = "okay"; -}; - -&uart9 { - status = "okay"; -}; - -&ufs_mem_hc { - reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; - vcc-supply = <&vreg_l20a_2p95>; - vcc-max-microamp = <600000>; - status = "okay"; -}; - -&ufs_mem_phy { - vdda-phy-supply = <&vdda_ufs1_core>; - vdda-pll-supply = <&vdda_ufs1_1p2>; - status = "okay"; -}; - -&sdhc_2 { - pinctrl-names = "default"; - pinctrl-0 = <&sdc2_clk_state &sdc2_cmd_state &sdc2_data_state &sd_card_det_n_state>; - cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>; - vmmc-supply = <&vreg_l21a_2p95>; - vqmmc-supply = <&vddpx_2>; - status = "okay"; -}; - -&usb_1 { - status = "okay"; -}; - -&usb_1_dwc3 { - /* Until we have Type C hooked up we'll force this as peripheral. */ - dr_mode = "peripheral"; -}; - -&usb_1_hsphy { - vdd-supply = <&vdda_usb1_ss_core>; - vdda-pll-supply = <&vdda_qusb_hs0_1p8>; - vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>; - - qcom,imp-res-offset-value = <8>; - qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; - qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; - qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; - status = "okay"; -}; - -&usb_1_qmpphy { - vdda-phy-supply = <&vdda_usb1_ss_1p2>; - vdda-pll-supply = <&vdda_usb1_ss_core>; - status = "okay"; -}; - -&wifi { - vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; - vdd-1.8-xo-supply = <&vreg_l7a_1p8>; - vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; - vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; - status = "okay"; -}; - -&tlmm { - gpio-reserved-ranges = <0 4>, <27 4>, <81 4>, <85 4>; - - sdc2_clk_state: sdc2-clk-state { - pins = "sdc2_clk"; - bias-disable; - - /* - * It seems that mmc_test reports errors if drive - * strength is not 16 on clk, cmd, and data pins. - */ - drive-strength = <16>; - }; - - sdc2_cmd_state: sdc2-cmd-state { - pins = "sdc2_cmd"; - bias-pull-up; - drive-strength = <16>; - }; - - sdc2_data_state: sdc2-data-state { - pins = "sdc2_data"; - bias-pull-up; - drive-strength = <16>; - }; - - sd_card_det_n_state: sd-card-det-n-state { - pins = "gpio126"; - function = "gpio"; - bias-pull-up; - }; -}; diff --git a/arch/arm/dts/sdm845-wcd9340.dtsi b/arch/arm/dts/sdm845-wcd9340.dtsi deleted file mode 100644 index c15d4886064..00000000000 --- a/arch/arm/dts/sdm845-wcd9340.dtsi +++ /dev/null @@ -1,86 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * SDM845 SoC device tree source - * - * Copyright (c) 2018, The Linux Foundation. All rights reserved. - */ - -&slim { - status = "okay"; - - slim@1 { - reg = <1>; - #address-cells = <2>; - #size-cells = <0>; - - wcd9340_ifd: ifd@0,0 { - compatible = "slim217,250"; - reg = <0 0>; - }; - - wcd9340: codec@1,0 { - compatible = "slim217,250"; - reg = <1 0>; - slim-ifc-dev = <&wcd9340_ifd>; - - #sound-dai-cells = <1>; - - interrupts-extended = <&tlmm 54 IRQ_TYPE_LEVEL_HIGH>; - interrupt-controller; - #interrupt-cells = <1>; - - clock-names = "extclk"; - clocks = <&rpmhcc RPMH_LN_BB_CLK2>; - - #clock-cells = <0>; - clock-frequency = <9600000>; - clock-output-names = "mclk"; - - pinctrl-0 = <&wcd_intr_default>; - pinctrl-names = "default"; - - qcom,micbias1-microvolt = <1800000>; - qcom,micbias2-microvolt = <1800000>; - qcom,micbias3-microvolt = <1800000>; - qcom,micbias4-microvolt = <1800000>; - - #address-cells = <1>; - #size-cells = <1>; - - wcdgpio: gpio-controller@42 { - compatible = "qcom,wcd9340-gpio"; - gpio-controller; - #gpio-cells = <2>; - reg = <0x42 0x2>; - }; - - swm: swm@c85 { - compatible = "qcom,soundwire-v1.3.0"; - reg = <0xc85 0x40>; - interrupts-extended = <&wcd9340 20>; - - qcom,dout-ports = <6>; - qcom,din-ports = <2>; - qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1f 0x3f 0x7 0x1f 0x3f 0x0f 0x0f>; - qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x6 0x12 0x0d 0x07 0x0a>; - qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x1f 0x00 0x00 0x1f 0x00 0x00>; - - #sound-dai-cells = <1>; - clocks = <&wcd9340>; - clock-names = "iface"; - #address-cells = <2>; - #size-cells = <0>; - }; - }; - }; -}; - -&tlmm { - wcd_intr_default: wcd-intr-default-state { - pins = "gpio54"; - function = "gpio"; - - bias-pull-down; - drive-strength = <2>; - }; -}; diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi deleted file mode 100644 index bf5e6eb9d31..00000000000 --- a/arch/arm/dts/sdm845.dtsi +++ /dev/null @@ -1,5752 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * SDM845 SoC device tree source - * - * Copyright (c) 2018, The Linux Foundation. All rights reserved. - */ - -#include <dt-bindings/clock/qcom,camcc-sdm845.h> -#include <dt-bindings/clock/qcom,dispcc-sdm845.h> -#include <dt-bindings/clock/qcom,gcc-sdm845.h> -#include <dt-bindings/clock/qcom,gpucc-sdm845.h> -#include <dt-bindings/clock/qcom,lpass-sdm845.h> -#include <dt-bindings/clock/qcom,rpmh.h> -#include <dt-bindings/clock/qcom,videocc-sdm845.h> -#include <dt-bindings/dma/qcom-gpi.h> -#include <dt-bindings/firmware/qcom,scm.h> -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/interconnect/qcom,osm-l3.h> -#include <dt-bindings/interconnect/qcom,sdm845.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/phy/phy-qcom-qmp.h> -#include <dt-bindings/phy/phy-qcom-qusb2.h> -#include <dt-bindings/power/qcom-rpmpd.h> -#include <dt-bindings/reset/qcom,sdm845-aoss.h> -#include <dt-bindings/reset/qcom,sdm845-pdc.h> -#include <dt-bindings/soc/qcom,apr.h> -#include <dt-bindings/soc/qcom,rpmh-rsc.h> -#include <dt-bindings/clock/qcom,gcc-sdm845.h> -#include <dt-bindings/thermal/thermal.h> - -/ { - interrupt-parent = <&intc>; - - #address-cells = <2>; - #size-cells = <2>; - - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - i2c6 = &i2c6; - i2c7 = &i2c7; - i2c8 = &i2c8; - i2c9 = &i2c9; - i2c10 = &i2c10; - i2c11 = &i2c11; - i2c12 = &i2c12; - i2c13 = &i2c13; - i2c14 = &i2c14; - i2c15 = &i2c15; - spi0 = &spi0; - spi1 = &spi1; - spi2 = &spi2; - spi3 = &spi3; - spi4 = &spi4; - spi5 = &spi5; - spi6 = &spi6; - spi7 = &spi7; - spi8 = &spi8; - spi9 = &spi9; - spi10 = &spi10; - spi11 = &spi11; - spi12 = &spi12; - spi13 = &spi13; - spi14 = &spi14; - spi15 = &spi15; - }; - - chosen { }; - - clocks { - xo_board: xo-board { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <38400000>; - clock-output-names = "xo_board"; - }; - - sleep_clk: sleep-clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32764>; - }; - }; - - cpus: cpus { - #address-cells = <2>; - #size-cells = <0>; - - CPU0: cpu@0 { - device_type = "cpu"; - compatible = "qcom,kryo385"; - reg = <0x0 0x0>; - clocks = <&cpufreq_hw 0>; - enable-method = "psci"; - capacity-dmips-mhz = <611>; - dynamic-power-coefficient = <154>; - qcom,freq-domain = <&cpufreq_hw 0>; - operating-points-v2 = <&cpu0_opp_table>; - interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>, - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; - power-domains = <&CPU_PD0>; - power-domain-names = "psci"; - #cooling-cells = <2>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-unified; - next-level-cache = <&L3_0>; - L3_0: l3-cache { - compatible = "cache"; - cache-level = <3>; - cache-unified; - }; - }; - }; - - CPU1: cpu@100 { - device_type = "cpu"; - compatible = "qcom,kryo385"; - reg = <0x0 0x100>; - clocks = <&cpufreq_hw 0>; - enable-method = "psci"; - capacity-dmips-mhz = <611>; - dynamic-power-coefficient = <154>; - qcom,freq-domain = <&cpufreq_hw 0>; - operating-points-v2 = <&cpu0_opp_table>; - interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>, - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; - power-domains = <&CPU_PD1>; - power-domain-names = "psci"; - #cooling-cells = <2>; - next-level-cache = <&L2_100>; - L2_100: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-unified; - next-level-cache = <&L3_0>; - }; - }; - - CPU2: cpu@200 { - device_type = "cpu"; - compatible = "qcom,kryo385"; - reg = <0x0 0x200>; - clocks = <&cpufreq_hw 0>; - enable-method = "psci"; - capacity-dmips-mhz = <611>; - dynamic-power-coefficient = <154>; - qcom,freq-domain = <&cpufreq_hw 0>; - operating-points-v2 = <&cpu0_opp_table>; - interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>, - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; - power-domains = <&CPU_PD2>; - power-domain-names = "psci"; - #cooling-cells = <2>; - next-level-cache = <&L2_200>; - L2_200: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-unified; - next-level-cache = <&L3_0>; - }; - }; - - CPU3: cpu@300 { - device_type = "cpu"; - compatible = "qcom,kryo385"; - reg = <0x0 0x300>; - clocks = <&cpufreq_hw 0>; - enable-method = "psci"; - capacity-dmips-mhz = <611>; - dynamic-power-coefficient = <154>; - qcom,freq-domain = <&cpufreq_hw 0>; - operating-points-v2 = <&cpu0_opp_table>; - interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>, - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; - #cooling-cells = <2>; - power-domains = <&CPU_PD3>; - power-domain-names = "psci"; - next-level-cache = <&L2_300>; - L2_300: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-unified; - next-level-cache = <&L3_0>; - }; - }; - - CPU4: cpu@400 { - device_type = "cpu"; - compatible = "qcom,kryo385"; - reg = <0x0 0x400>; - clocks = <&cpufreq_hw 1>; - enable-method = "psci"; - capacity-dmips-mhz = <1024>; - dynamic-power-coefficient = <442>; - qcom,freq-domain = <&cpufreq_hw 1>; - operating-points-v2 = <&cpu4_opp_table>; - interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>, - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; - power-domains = <&CPU_PD4>; - power-domain-names = "psci"; - #cooling-cells = <2>; - next-level-cache = <&L2_400>; - L2_400: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-unified; - next-level-cache = <&L3_0>; - }; - }; - - CPU5: cpu@500 { - device_type = "cpu"; - compatible = "qcom,kryo385"; - reg = <0x0 0x500>; - clocks = <&cpufreq_hw 1>; - enable-method = "psci"; - capacity-dmips-mhz = <1024>; - dynamic-power-coefficient = <442>; - qcom,freq-domain = <&cpufreq_hw 1>; - operating-points-v2 = <&cpu4_opp_table>; - interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>, - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; - power-domains = <&CPU_PD5>; - power-domain-names = "psci"; - #cooling-cells = <2>; - next-level-cache = <&L2_500>; - L2_500: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-unified; - next-level-cache = <&L3_0>; - }; - }; - - CPU6: cpu@600 { - device_type = "cpu"; - compatible = "qcom,kryo385"; - reg = <0x0 0x600>; - clocks = <&cpufreq_hw 1>; - enable-method = "psci"; - capacity-dmips-mhz = <1024>; - dynamic-power-coefficient = <442>; - qcom,freq-domain = <&cpufreq_hw 1>; - operating-points-v2 = <&cpu4_opp_table>; - interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>, - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; - power-domains = <&CPU_PD6>; - power-domain-names = "psci"; - #cooling-cells = <2>; - next-level-cache = <&L2_600>; - L2_600: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-unified; - next-level-cache = <&L3_0>; - }; - }; - - CPU7: cpu@700 { - device_type = "cpu"; - compatible = "qcom,kryo385"; - reg = <0x0 0x700>; - clocks = <&cpufreq_hw 1>; - enable-method = "psci"; - capacity-dmips-mhz = <1024>; - dynamic-power-coefficient = <442>; - qcom,freq-domain = <&cpufreq_hw 1>; - operating-points-v2 = <&cpu4_opp_table>; - interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>, - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; - power-domains = <&CPU_PD7>; - power-domain-names = "psci"; - #cooling-cells = <2>; - next-level-cache = <&L2_700>; - L2_700: l2-cache { - compatible = "cache"; - cache-level = <2>; - cache-unified; - next-level-cache = <&L3_0>; - }; - }; - - cpu-map { - cluster0 { - core0 { - cpu = <&CPU0>; - }; - - core1 { - cpu = <&CPU1>; - }; - - core2 { - cpu = <&CPU2>; - }; - - core3 { - cpu = <&CPU3>; - }; - - core4 { - cpu = <&CPU4>; - }; - - core5 { - cpu = <&CPU5>; - }; - - core6 { - cpu = <&CPU6>; - }; - - core7 { - cpu = <&CPU7>; - }; - }; - }; - - cpu_idle_states: idle-states { - entry-method = "psci"; - - LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { - compatible = "arm,idle-state"; - idle-state-name = "little-rail-power-collapse"; - arm,psci-suspend-param = <0x40000004>; - entry-latency-us = <350>; - exit-latency-us = <461>; - min-residency-us = <1890>; - local-timer-stop; - }; - - BIG_CPU_SLEEP_0: cpu-sleep-1-0 { - compatible = "arm,idle-state"; - idle-state-name = "big-rail-power-collapse"; - arm,psci-suspend-param = <0x40000004>; - entry-latency-us = <264>; - exit-latency-us = <621>; - min-residency-us = <952>; - local-timer-stop; - }; - }; - - domain-idle-states { - CLUSTER_SLEEP_0: cluster-sleep-0 { - compatible = "domain-idle-state"; - arm,psci-suspend-param = <0x4100c244>; - entry-latency-us = <3263>; - exit-latency-us = <6562>; - min-residency-us = <9987>; - }; - }; - }; - - firmware { - scm { - compatible = "qcom,scm-sdm845", "qcom,scm"; - }; - }; - - memory@80000000 { - device_type = "memory"; - /* We expect the bootloader to fill in the size */ - reg = <0 0x80000000 0 0>; - }; - - cpu0_opp_table: opp-table-cpu0 { - compatible = "operating-points-v2"; - opp-shared; - - cpu0_opp1: opp-300000000 { - opp-hz = /bits/ 64 <300000000>; - opp-peak-kBps = <800000 4800000>; - }; - - cpu0_opp2: opp-403200000 { - opp-hz = /bits/ 64 <403200000>; - opp-peak-kBps = <800000 4800000>; - }; - - cpu0_opp3: opp-480000000 { - opp-hz = /bits/ 64 <480000000>; - opp-peak-kBps = <800000 6451200>; - }; - - cpu0_opp4: opp-576000000 { - opp-hz = /bits/ 64 <576000000>; - opp-peak-kBps = <800000 6451200>; - }; - - cpu0_opp5: opp-652800000 { - opp-hz = /bits/ 64 <652800000>; - opp-peak-kBps = <800000 7680000>; - }; - - cpu0_opp6: opp-748800000 { - opp-hz = /bits/ 64 <748800000>; - opp-peak-kBps = <1804000 9216000>; - }; - - cpu0_opp7: opp-825600000 { - opp-hz = /bits/ 64 <825600000>; - opp-peak-kBps = <1804000 9216000>; - }; - - cpu0_opp8: opp-902400000 { - opp-hz = /bits/ 64 <902400000>; - opp-peak-kBps = <1804000 10444800>; - }; - - cpu0_opp9: opp-979200000 { - opp-hz = /bits/ 64 <979200000>; - opp-peak-kBps = <1804000 11980800>; - }; - - cpu0_opp10: opp-1056000000 { - opp-hz = /bits/ 64 <1056000000>; - opp-peak-kBps = <1804000 11980800>; - }; - - cpu0_opp11: opp-1132800000 { - opp-hz = /bits/ 64 <1132800000>; - opp-peak-kBps = <2188000 13516800>; - }; - - cpu0_opp12: opp-1228800000 { - opp-hz = /bits/ 64 <1228800000>; - opp-peak-kBps = <2188000 15052800>; - }; - - cpu0_opp13: opp-1324800000 { - opp-hz = /bits/ 64 <1324800000>; - opp-peak-kBps = <2188000 16588800>; - }; - - cpu0_opp14: opp-1420800000 { - opp-hz = /bits/ 64 <1420800000>; - opp-peak-kBps = <3072000 18124800>; - }; - - cpu0_opp15: opp-1516800000 { - opp-hz = /bits/ 64 <1516800000>; - opp-peak-kBps = <3072000 19353600>; - }; - - cpu0_opp16: opp-1612800000 { - opp-hz = /bits/ 64 <1612800000>; - opp-peak-kBps = <4068000 19353600>; - }; - - cpu0_opp17: opp-1689600000 { - opp-hz = /bits/ 64 <1689600000>; - opp-peak-kBps = <4068000 20889600>; - }; - - cpu0_opp18: opp-1766400000 { - opp-hz = /bits/ 64 <1766400000>; - opp-peak-kBps = <4068000 22425600>; - }; - }; - - cpu4_opp_table: opp-table-cpu4 { - compatible = "operating-points-v2"; - opp-shared; - - cpu4_opp1: opp-300000000 { - opp-hz = /bits/ 64 <300000000>; - opp-peak-kBps = <800000 4800000>; - }; - - cpu4_opp2: opp-403200000 { - opp-hz = /bits/ 64 <403200000>; - opp-peak-kBps = <800000 4800000>; - }; - - cpu4_opp3: opp-480000000 { - opp-hz = /bits/ 64 <480000000>; - opp-peak-kBps = <1804000 4800000>; - }; - - cpu4_opp4: opp-576000000 { - opp-hz = /bits/ 64 <576000000>; - opp-peak-kBps = <1804000 4800000>; - }; - - cpu4_opp5: opp-652800000 { - opp-hz = /bits/ 64 <652800000>; - opp-peak-kBps = <1804000 4800000>; - }; - - cpu4_opp6: opp-748800000 { - opp-hz = /bits/ 64 <748800000>; - opp-peak-kBps = <1804000 4800000>; - }; - - cpu4_opp7: opp-825600000 { - opp-hz = /bits/ 64 <825600000>; - opp-peak-kBps = <2188000 9216000>; - }; - - cpu4_opp8: opp-902400000 { - opp-hz = /bits/ 64 <902400000>; - opp-peak-kBps = <2188000 9216000>; - }; - - cpu4_opp9: opp-979200000 { - opp-hz = /bits/ 64 <979200000>; - opp-peak-kBps = <2188000 9216000>; - }; - - cpu4_opp10: opp-1056000000 { - opp-hz = /bits/ 64 <1056000000>; - opp-peak-kBps = <3072000 9216000>; - }; - - cpu4_opp11: opp-1132800000 { - opp-hz = /bits/ 64 <1132800000>; - opp-peak-kBps = <3072000 11980800>; - }; - - cpu4_opp12: opp-1209600000 { - opp-hz = /bits/ 64 <1209600000>; - opp-peak-kBps = <4068000 11980800>; - }; - - cpu4_opp13: opp-1286400000 { - opp-hz = /bits/ 64 <1286400000>; - opp-peak-kBps = <4068000 11980800>; - }; - - cpu4_opp14: opp-1363200000 { - opp-hz = /bits/ 64 <1363200000>; - opp-peak-kBps = <4068000 15052800>; - }; - - cpu4_opp15: opp-1459200000 { - opp-hz = /bits/ 64 <1459200000>; - opp-peak-kBps = <4068000 15052800>; - }; - - cpu4_opp16: opp-1536000000 { - opp-hz = /bits/ 64 <1536000000>; - opp-peak-kBps = <5412000 15052800>; - }; - - cpu4_opp17: opp-1612800000 { - opp-hz = /bits/ 64 <1612800000>; - opp-peak-kBps = <5412000 15052800>; - }; - - cpu4_opp18: opp-1689600000 { - opp-hz = /bits/ 64 <1689600000>; - opp-peak-kBps = <5412000 19353600>; - }; - - cpu4_opp19: opp-1766400000 { - opp-hz = /bits/ 64 <1766400000>; - opp-peak-kBps = <6220000 19353600>; - }; - - cpu4_opp20: opp-1843200000 { - opp-hz = /bits/ 64 <1843200000>; - opp-peak-kBps = <6220000 19353600>; - }; - - cpu4_opp21: opp-1920000000 { - opp-hz = /bits/ 64 <1920000000>; - opp-peak-kBps = <7216000 19353600>; - }; - - cpu4_opp22: opp-1996800000 { - opp-hz = /bits/ 64 <1996800000>; - opp-peak-kBps = <7216000 20889600>; - }; - - cpu4_opp23: opp-2092800000 { - opp-hz = /bits/ 64 <2092800000>; - opp-peak-kBps = <7216000 20889600>; - }; - - cpu4_opp24: opp-2169600000 { - opp-hz = /bits/ 64 <2169600000>; - opp-peak-kBps = <7216000 20889600>; - }; - - cpu4_opp25: opp-2246400000 { - opp-hz = /bits/ 64 <2246400000>; - opp-peak-kBps = <7216000 20889600>; - }; - - cpu4_opp26: opp-2323200000 { - opp-hz = /bits/ 64 <2323200000>; - opp-peak-kBps = <7216000 20889600>; - }; - - cpu4_opp27: opp-2400000000 { - opp-hz = /bits/ 64 <2400000000>; - opp-peak-kBps = <7216000 22425600>; - }; - - cpu4_opp28: opp-2476800000 { - opp-hz = /bits/ 64 <2476800000>; - opp-peak-kBps = <7216000 22425600>; - }; - - cpu4_opp29: opp-2553600000 { - opp-hz = /bits/ 64 <2553600000>; - opp-peak-kBps = <7216000 22425600>; - }; - - cpu4_opp30: opp-2649600000 { - opp-hz = /bits/ 64 <2649600000>; - opp-peak-kBps = <7216000 22425600>; - }; - - cpu4_opp31: opp-2745600000 { - opp-hz = /bits/ 64 <2745600000>; - opp-peak-kBps = <7216000 25497600>; - }; - - cpu4_opp32: opp-2803200000 { - opp-hz = /bits/ 64 <2803200000>; - opp-peak-kBps = <7216000 25497600>; - }; - }; - - dsi_opp_table: opp-table-dsi { - compatible = "operating-points-v2"; - - opp-19200000 { - opp-hz = /bits/ 64 <19200000>; - required-opps = <&rpmhpd_opp_min_svs>; - }; - - opp-180000000 { - opp-hz = /bits/ 64 <180000000>; - required-opps = <&rpmhpd_opp_low_svs>; - }; - - opp-275000000 { - opp-hz = /bits/ 64 <275000000>; - required-opps = <&rpmhpd_opp_svs>; - }; - - opp-328580000 { - opp-hz = /bits/ 64 <328580000>; - required-opps = <&rpmhpd_opp_svs_l1>; - }; - - opp-358000000 { - opp-hz = /bits/ 64 <358000000>; - required-opps = <&rpmhpd_opp_nom>; - }; - }; - - qspi_opp_table: opp-table-qspi { - compatible = "operating-points-v2"; - - opp-19200000 { - opp-hz = /bits/ 64 <19200000>; - required-opps = <&rpmhpd_opp_min_svs>; - }; - - opp-100000000 { - opp-hz = /bits/ 64 <100000000>; - required-opps = <&rpmhpd_opp_low_svs>; - }; - - opp-150000000 { - opp-hz = /bits/ 64 <150000000>; - required-opps = <&rpmhpd_opp_svs>; - }; - - opp-300000000 { - opp-hz = /bits/ 64 <300000000>; - required-opps = <&rpmhpd_opp_nom>; - }; - }; - - qup_opp_table: opp-table-qup { - compatible = "operating-points-v2"; - - opp-50000000 { - opp-hz = /bits/ 64 <50000000>; - required-opps = <&rpmhpd_opp_min_svs>; - }; - - opp-75000000 { - opp-hz = /bits/ 64 <75000000>; - required-opps = <&rpmhpd_opp_low_svs>; - }; - - opp-100000000 { - opp-hz = /bits/ 64 <100000000>; - required-opps = <&rpmhpd_opp_svs>; - }; - - opp-128000000 { - opp-hz = /bits/ 64 <128000000>; - required-opps = <&rpmhpd_opp_nom>; - }; - }; - - pmu { - compatible = "arm,armv8-pmuv3"; - interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>; - }; - - psci: psci { - compatible = "arm,psci-1.0"; - method = "smc"; - - CPU_PD0: power-domain-cpu0 { - #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&LITTLE_CPU_SLEEP_0>; - }; - - CPU_PD1: power-domain-cpu1 { - #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&LITTLE_CPU_SLEEP_0>; - }; - - CPU_PD2: power-domain-cpu2 { - #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&LITTLE_CPU_SLEEP_0>; - }; - - CPU_PD3: power-domain-cpu3 { - #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&LITTLE_CPU_SLEEP_0>; - }; - - CPU_PD4: power-domain-cpu4 { - #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&BIG_CPU_SLEEP_0>; - }; - - CPU_PD5: power-domain-cpu5 { - #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&BIG_CPU_SLEEP_0>; - }; - - CPU_PD6: power-domain-cpu6 { - #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&BIG_CPU_SLEEP_0>; - }; - - CPU_PD7: power-domain-cpu7 { - #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&BIG_CPU_SLEEP_0>; - }; - - CLUSTER_PD: power-domain-cluster { - #power-domain-cells = <0>; - domain-idle-states = <&CLUSTER_SLEEP_0>; - }; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - hyp_mem: hyp-mem@85700000 { - reg = <0 0x85700000 0 0x600000>; - no-map; - }; - - xbl_mem: xbl-mem@85e00000 { - reg = <0 0x85e00000 0 0x100000>; - no-map; - }; - - aop_mem: aop-mem@85fc0000 { - reg = <0 0x85fc0000 0 0x20000>; - no-map; - }; - - aop_cmd_db_mem: aop-cmd-db-mem@85fe0000 { - compatible = "qcom,cmd-db"; - reg = <0x0 0x85fe0000 0 0x20000>; - no-map; - }; - - smem@86000000 { - compatible = "qcom,smem"; - reg = <0x0 0x86000000 0 0x200000>; - no-map; - hwlocks = <&tcsr_mutex 3>; - }; - - tz_mem: tz@86200000 { - reg = <0 0x86200000 0 0x2d00000>; - no-map; - }; - - rmtfs_mem: rmtfs@88f00000 { - compatible = "qcom,rmtfs-mem"; - reg = <0 0x88f00000 0 0x200000>; - no-map; - - qcom,client-id = <1>; - qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; - }; - - qseecom_mem: qseecom@8ab00000 { - reg = <0 0x8ab00000 0 0x1400000>; - no-map; - }; - - camera_mem: camera-mem@8bf00000 { - reg = <0 0x8bf00000 0 0x500000>; - no-map; - }; - - ipa_fw_mem: ipa-fw@8c400000 { - reg = <0 0x8c400000 0 0x10000>; - no-map; - }; - - ipa_gsi_mem: ipa-gsi@8c410000 { - reg = <0 0x8c410000 0 0x5000>; - no-map; - }; - - gpu_mem: gpu@8c415000 { - reg = <0 0x8c415000 0 0x2000>; - no-map; - }; - - adsp_mem: adsp@8c500000 { - reg = <0 0x8c500000 0 0x1a00000>; - no-map; - }; - - wlan_msa_mem: wlan-msa@8df00000 { - reg = <0 0x8df00000 0 0x100000>; - no-map; - }; - - mpss_region: mpss@8e000000 { - reg = <0 0x8e000000 0 0x7800000>; - no-map; - }; - - venus_mem: venus@95800000 { - reg = <0 0x95800000 0 0x500000>; - no-map; - }; - - cdsp_mem: cdsp@95d00000 { - reg = <0 0x95d00000 0 0x800000>; - no-map; - }; - - mba_region: mba@96500000 { - reg = <0 0x96500000 0 0x200000>; - no-map; - }; - - slpi_mem: slpi@96700000 { - reg = <0 0x96700000 0 0x1400000>; - no-map; - }; - - spss_mem: spss@97b00000 { - reg = <0 0x97b00000 0 0x100000>; - no-map; - }; - - mdata_mem: mpss-metadata { - alloc-ranges = <0 0xa0000000 0 0x20000000>; - size = <0 0x4000>; - no-map; - }; - - fastrpc_mem: fastrpc { - compatible = "shared-dma-pool"; - alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; - alignment = <0x0 0x400000>; - size = <0x0 0x1000000>; - reusable; - }; - }; - - adsp_pas: remoteproc-adsp { - compatible = "qcom,sdm845-adsp-pas"; - - interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>, - <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, - <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, - <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, - <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", - "handover", "stop-ack"; - - clocks = <&rpmhcc RPMH_CXO_CLK>; - clock-names = "xo"; - - memory-region = <&adsp_mem>; - - qcom,qmp = <&aoss_qmp>; - - qcom,smem-states = <&adsp_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - status = "disabled"; - - glink-edge { - interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>; - label = "lpass"; - qcom,remote-pid = <2>; - mboxes = <&apss_shared 8>; - - apr { - compatible = "qcom,apr-v2"; - qcom,glink-channels = "apr_audio_svc"; - qcom,domain = <APR_DOMAIN_ADSP>; - #address-cells = <1>; - #size-cells = <0>; - qcom,intents = <512 20>; - - service@3 { - reg = <APR_SVC_ADSP_CORE>; - compatible = "qcom,q6core"; - qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; - }; - - q6afe: service@4 { - compatible = "qcom,q6afe"; - reg = <APR_SVC_AFE>; - qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; - q6afedai: dais { - compatible = "qcom,q6afe-dais"; - #address-cells = <1>; - #size-cells = <0>; - #sound-dai-cells = <1>; - }; - }; - - q6asm: service@7 { - compatible = "qcom,q6asm"; - reg = <APR_SVC_ASM>; - qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; - q6asmdai: dais { - compatible = "qcom,q6asm-dais"; - #address-cells = <1>; - #size-cells = <0>; - #sound-dai-cells = <1>; - iommus = <&apps_smmu 0x1821 0x0>; - }; - }; - - q6adm: service@8 { - compatible = "qcom,q6adm"; - reg = <APR_SVC_ADM>; - qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; - q6routing: routing { - compatible = "qcom,q6adm-routing"; - #sound-dai-cells = <0>; - }; - }; - }; - - fastrpc { - compatible = "qcom,fastrpc"; - qcom,glink-channels = "fastrpcglink-apps-dsp"; - label = "adsp"; - qcom,non-secure-domain; - #address-cells = <1>; - #size-cells = <0>; - - compute-cb@3 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <3>; - iommus = <&apps_smmu 0x1823 0x0>; - }; - - compute-cb@4 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <4>; - iommus = <&apps_smmu 0x1824 0x0>; - }; - }; - }; - }; - - cdsp_pas: remoteproc-cdsp { - compatible = "qcom,sdm845-cdsp-pas"; - - interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>, - <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, - <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, - <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, - <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", - "handover", "stop-ack"; - - clocks = <&rpmhcc RPMH_CXO_CLK>; - clock-names = "xo"; - - memory-region = <&cdsp_mem>; - - qcom,qmp = <&aoss_qmp>; - - qcom,smem-states = <&cdsp_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - status = "disabled"; - - glink-edge { - interrupts = <GIC_SPI 574 IRQ_TYPE_EDGE_RISING>; - label = "turing"; - qcom,remote-pid = <5>; - mboxes = <&apss_shared 4>; - fastrpc { - compatible = "qcom,fastrpc"; - qcom,glink-channels = "fastrpcglink-apps-dsp"; - label = "cdsp"; - qcom,non-secure-domain; - #address-cells = <1>; - #size-cells = <0>; - - compute-cb@1 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <1>; - iommus = <&apps_smmu 0x1401 0x30>; - }; - - compute-cb@2 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <2>; - iommus = <&apps_smmu 0x1402 0x30>; - }; - - compute-cb@3 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <3>; - iommus = <&apps_smmu 0x1403 0x30>; - }; - - compute-cb@4 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <4>; - iommus = <&apps_smmu 0x1404 0x30>; - }; - - compute-cb@5 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <5>; - iommus = <&apps_smmu 0x1405 0x30>; - }; - - compute-cb@6 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <6>; - iommus = <&apps_smmu 0x1406 0x30>; - }; - - compute-cb@7 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <7>; - iommus = <&apps_smmu 0x1407 0x30>; - }; - - compute-cb@8 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <8>; - iommus = <&apps_smmu 0x1408 0x30>; - }; - }; - }; - }; - - smp2p-cdsp { - compatible = "qcom,smp2p"; - qcom,smem = <94>, <432>; - - interrupts = <GIC_SPI 576 IRQ_TYPE_EDGE_RISING>; - - mboxes = <&apss_shared 6>; - - qcom,local-pid = <0>; - qcom,remote-pid = <5>; - - cdsp_smp2p_out: master-kernel { - qcom,entry-name = "master-kernel"; - #qcom,smem-state-cells = <1>; - }; - - cdsp_smp2p_in: slave-kernel { - qcom,entry-name = "slave-kernel"; - - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - smp2p-lpass { - compatible = "qcom,smp2p"; - qcom,smem = <443>, <429>; - - interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>; - - mboxes = <&apss_shared 10>; - - qcom,local-pid = <0>; - qcom,remote-pid = <2>; - - adsp_smp2p_out: master-kernel { - qcom,entry-name = "master-kernel"; - #qcom,smem-state-cells = <1>; - }; - - adsp_smp2p_in: slave-kernel { - qcom,entry-name = "slave-kernel"; - - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - smp2p-mpss { - compatible = "qcom,smp2p"; - qcom,smem = <435>, <428>; - interrupts = <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>; - mboxes = <&apss_shared 14>; - qcom,local-pid = <0>; - qcom,remote-pid = <1>; - - modem_smp2p_out: master-kernel { - qcom,entry-name = "master-kernel"; - #qcom,smem-state-cells = <1>; - }; - - modem_smp2p_in: slave-kernel { - qcom,entry-name = "slave-kernel"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - ipa_smp2p_out: ipa-ap-to-modem { - qcom,entry-name = "ipa"; - #qcom,smem-state-cells = <1>; - }; - - ipa_smp2p_in: ipa-modem-to-ap { - qcom,entry-name = "ipa"; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - smp2p-slpi { - compatible = "qcom,smp2p"; - qcom,smem = <481>, <430>; - interrupts = <GIC_SPI 172 IRQ_TYPE_EDGE_RISING>; - mboxes = <&apss_shared 26>; - qcom,local-pid = <0>; - qcom,remote-pid = <3>; - - slpi_smp2p_out: master-kernel { - qcom,entry-name = "master-kernel"; - #qcom,smem-state-cells = <1>; - }; - - slpi_smp2p_in: slave-kernel { - qcom,entry-name = "slave-kernel"; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - soc: soc@0 { - #address-cells = <2>; - #size-cells = <2>; - ranges = <0 0 0 0 0x10 0>; - dma-ranges = <0 0 0 0 0x10 0>; - compatible = "simple-bus"; - - gcc: clock-controller@100000 { - compatible = "qcom,gcc-sdm845"; - reg = <0 0x00100000 0 0x1f0000>; - clocks = <&rpmhcc RPMH_CXO_CLK>, - <&rpmhcc RPMH_CXO_CLK_A>, - <&sleep_clk>, - <&pcie0_phy>, - <&pcie1_phy>; - clock-names = "bi_tcxo", - "bi_tcxo_ao", - "sleep_clk", - "pcie_0_pipe_clk", - "pcie_1_pipe_clk"; - #clock-cells = <1>; - #reset-cells = <1>; - #power-domain-cells = <1>; - power-domains = <&rpmhpd SDM845_CX>; - }; - - qfprom@784000 { - compatible = "qcom,sdm845-qfprom", "qcom,qfprom"; - reg = <0 0x00784000 0 0x8ff>; - #address-cells = <1>; - #size-cells = <1>; - - qusb2p_hstx_trim: hstx-trim-primary@1eb { - reg = <0x1eb 0x1>; - bits = <1 4>; - }; - - qusb2s_hstx_trim: hstx-trim-secondary@1eb { - reg = <0x1eb 0x2>; - bits = <6 4>; - }; - }; - - rng: rng@793000 { - compatible = "qcom,prng-ee"; - reg = <0 0x00793000 0 0x1000>; - clocks = <&gcc GCC_PRNG_AHB_CLK>; - clock-names = "core"; - }; - - gpi_dma0: dma-controller@800000 { - #dma-cells = <3>; - compatible = "qcom,sdm845-gpi-dma"; - reg = <0 0x00800000 0 0x60000>; - interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>; - dma-channels = <13>; - dma-channel-mask = <0xfa>; - iommus = <&apps_smmu 0x0016 0x0>; - status = "disabled"; - }; - - qupv3_id_0: geniqup@8c0000 { - compatible = "qcom,geni-se-qup"; - reg = <0 0x008c0000 0 0x6000>; - clock-names = "m-ahb", "s-ahb"; - clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, - <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; - iommus = <&apps_smmu 0x3 0x0>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>; - interconnect-names = "qup-core"; - status = "disabled"; - - i2c0: i2c@880000 { - compatible = "qcom,geni-i2c"; - reg = <0 0x00880000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_i2c0_default>; - interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>, - <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>; - interconnect-names = "qup-core", "qup-config", "qup-memory"; - dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>, - <&gpi_dma0 1 0 QCOM_GPI_I2C>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi0: spi@880000 { - compatible = "qcom,geni-spi"; - reg = <0 0x00880000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_spi0_default>; - interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>; - interconnect-names = "qup-core", "qup-config"; - dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>, - <&gpi_dma0 1 0 QCOM_GPI_SPI>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart0: serial@880000 { - compatible = "qcom,geni-uart"; - reg = <0 0x00880000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_uart0_default>; - interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>; - interconnect-names = "qup-core", "qup-config"; - status = "disabled"; - }; - - i2c1: i2c@884000 { - compatible = "qcom,geni-i2c"; - reg = <0 0x00884000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_i2c1_default>; - interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>, - <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>; - interconnect-names = "qup-core", "qup-config", "qup-memory"; - dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>, - <&gpi_dma0 1 1 QCOM_GPI_I2C>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi1: spi@884000 { - compatible = "qcom,geni-spi"; - reg = <0 0x00884000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_spi1_default>; - interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>; - interconnect-names = "qup-core", "qup-config"; - dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>, - <&gpi_dma0 1 1 QCOM_GPI_SPI>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart1: serial@884000 { - compatible = "qcom,geni-uart"; - reg = <0 0x00884000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_uart1_default>; - interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>; - interconnect-names = "qup-core", "qup-config"; - status = "disabled"; - }; - - i2c2: i2c@888000 { - compatible = "qcom,geni-i2c"; - reg = <0 0x00888000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_i2c2_default>; - interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>, - <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>; - interconnect-names = "qup-core", "qup-config", "qup-memory"; - dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>, - <&gpi_dma0 1 2 QCOM_GPI_I2C>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi2: spi@888000 { - compatible = "qcom,geni-spi"; - reg = <0 0x00888000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_spi2_default>; - interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>; - interconnect-names = "qup-core", "qup-config"; - dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>, - <&gpi_dma0 1 2 QCOM_GPI_SPI>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart2: serial@888000 { - compatible = "qcom,geni-uart"; - reg = <0 0x00888000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_uart2_default>; - interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>; - interconnect-names = "qup-core", "qup-config"; - status = "disabled"; - }; - - i2c3: i2c@88c000 { - compatible = "qcom,geni-i2c"; - reg = <0 0x0088c000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_i2c3_default>; - interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>, - <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>; - interconnect-names = "qup-core", "qup-config", "qup-memory"; - dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>, - <&gpi_dma0 1 3 QCOM_GPI_I2C>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi3: spi@88c000 { - compatible = "qcom,geni-spi"; - reg = <0 0x0088c000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_spi3_default>; - interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>; - interconnect-names = "qup-core", "qup-config"; - dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>, - <&gpi_dma0 1 3 QCOM_GPI_SPI>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart3: serial@88c000 { - compatible = "qcom,geni-uart"; - reg = <0 0x0088c000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_uart3_default>; - interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>; - interconnect-names = "qup-core", "qup-config"; - status = "disabled"; - }; - - i2c4: i2c@890000 { - compatible = "qcom,geni-i2c"; - reg = <0 0x00890000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_i2c4_default>; - interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>, - <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>; - interconnect-names = "qup-core", "qup-config", "qup-memory"; - dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>, - <&gpi_dma0 1 4 QCOM_GPI_I2C>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi4: spi@890000 { - compatible = "qcom,geni-spi"; - reg = <0 0x00890000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_spi4_default>; - interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>; - interconnect-names = "qup-core", "qup-config"; - dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>, - <&gpi_dma0 1 4 QCOM_GPI_SPI>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart4: serial@890000 { - compatible = "qcom,geni-uart"; - reg = <0 0x00890000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_uart4_default>; - interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>; - interconnect-names = "qup-core", "qup-config"; - status = "disabled"; - }; - - i2c5: i2c@894000 { - compatible = "qcom,geni-i2c"; - reg = <0 0x00894000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_i2c5_default>; - interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>, - <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>; - interconnect-names = "qup-core", "qup-config", "qup-memory"; - dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>, - <&gpi_dma0 1 5 QCOM_GPI_I2C>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi5: spi@894000 { - compatible = "qcom,geni-spi"; - reg = <0 0x00894000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_spi5_default>; - interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>; - interconnect-names = "qup-core", "qup-config"; - dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>, - <&gpi_dma0 1 5 QCOM_GPI_SPI>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart5: serial@894000 { - compatible = "qcom,geni-uart"; - reg = <0 0x00894000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_uart5_default>; - interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>; - interconnect-names = "qup-core", "qup-config"; - status = "disabled"; - }; - - i2c6: i2c@898000 { - compatible = "qcom,geni-i2c"; - reg = <0 0x00898000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_i2c6_default>; - interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>, - <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>; - interconnect-names = "qup-core", "qup-config", "qup-memory"; - dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>, - <&gpi_dma0 1 6 QCOM_GPI_I2C>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi6: spi@898000 { - compatible = "qcom,geni-spi"; - reg = <0 0x00898000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_spi6_default>; - interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>; - interconnect-names = "qup-core", "qup-config"; - dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>, - <&gpi_dma0 1 6 QCOM_GPI_SPI>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart6: serial@898000 { - compatible = "qcom,geni-uart"; - reg = <0 0x00898000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_uart6_default>; - interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>; - interconnect-names = "qup-core", "qup-config"; - status = "disabled"; - }; - - i2c7: i2c@89c000 { - compatible = "qcom,geni-i2c"; - reg = <0 0x0089c000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_i2c7_default>; - interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - status = "disabled"; - }; - - spi7: spi@89c000 { - compatible = "qcom,geni-spi"; - reg = <0 0x0089c000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_spi7_default>; - interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>; - interconnect-names = "qup-core", "qup-config"; - dmas = <&gpi_dma0 0 7 QCOM_GPI_SPI>, - <&gpi_dma0 1 7 QCOM_GPI_SPI>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart7: serial@89c000 { - compatible = "qcom,geni-uart"; - reg = <0 0x0089c000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_uart7_default>; - interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>; - interconnect-names = "qup-core", "qup-config"; - status = "disabled"; - }; - }; - - gpi_dma1: dma-controller@a00000 { - #dma-cells = <3>; - compatible = "qcom,sdm845-gpi-dma"; - reg = <0 0x00a00000 0 0x60000>; - interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>; - dma-channels = <13>; - dma-channel-mask = <0xfa>; - iommus = <&apps_smmu 0x06d6 0x0>; - status = "disabled"; - }; - - qupv3_id_1: geniqup@ac0000 { - compatible = "qcom,geni-se-qup"; - reg = <0 0x00ac0000 0 0x6000>; - clock-names = "m-ahb", "s-ahb"; - clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, - <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; - iommus = <&apps_smmu 0x6c3 0x0>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>; - interconnect-names = "qup-core"; - status = "disabled"; - - i2c8: i2c@a80000 { - compatible = "qcom,geni-i2c"; - reg = <0 0x00a80000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_i2c8_default>; - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>, - <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>; - interconnect-names = "qup-core", "qup-config", "qup-memory"; - dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>, - <&gpi_dma1 1 0 QCOM_GPI_I2C>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi8: spi@a80000 { - compatible = "qcom,geni-spi"; - reg = <0 0x00a80000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_spi8_default>; - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>; - interconnect-names = "qup-core", "qup-config"; - dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>, - <&gpi_dma1 1 0 QCOM_GPI_SPI>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart8: serial@a80000 { - compatible = "qcom,geni-uart"; - reg = <0 0x00a80000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_uart8_default>; - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>; - interconnect-names = "qup-core", "qup-config"; - status = "disabled"; - }; - - i2c9: i2c@a84000 { - compatible = "qcom,geni-i2c"; - reg = <0 0x00a84000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_i2c9_default>; - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>, - <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>; - interconnect-names = "qup-core", "qup-config", "qup-memory"; - dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>, - <&gpi_dma1 1 1 QCOM_GPI_I2C>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi9: spi@a84000 { - compatible = "qcom,geni-spi"; - reg = <0 0x00a84000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_spi9_default>; - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>; - interconnect-names = "qup-core", "qup-config"; - dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>, - <&gpi_dma1 1 1 QCOM_GPI_SPI>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart9: serial@a84000 { - compatible = "qcom,geni-debug-uart"; - reg = <0 0x00a84000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_uart9_default>; - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>; - interconnect-names = "qup-core", "qup-config"; - status = "disabled"; - }; - - i2c10: i2c@a88000 { - compatible = "qcom,geni-i2c"; - reg = <0 0x00a88000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_i2c10_default>; - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>, - <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>; - interconnect-names = "qup-core", "qup-config", "qup-memory"; - dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>, - <&gpi_dma1 1 2 QCOM_GPI_I2C>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi10: spi@a88000 { - compatible = "qcom,geni-spi"; - reg = <0 0x00a88000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_spi10_default>; - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>; - interconnect-names = "qup-core", "qup-config"; - dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>, - <&gpi_dma1 1 2 QCOM_GPI_SPI>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart10: serial@a88000 { - compatible = "qcom,geni-uart"; - reg = <0 0x00a88000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_uart10_default>; - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>; - interconnect-names = "qup-core", "qup-config"; - status = "disabled"; - }; - - i2c11: i2c@a8c000 { - compatible = "qcom,geni-i2c"; - reg = <0 0x00a8c000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_i2c11_default>; - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>, - <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>; - interconnect-names = "qup-core", "qup-config", "qup-memory"; - dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>, - <&gpi_dma1 1 3 QCOM_GPI_I2C>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi11: spi@a8c000 { - compatible = "qcom,geni-spi"; - reg = <0 0x00a8c000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_spi11_default>; - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>; - interconnect-names = "qup-core", "qup-config"; - dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>, - <&gpi_dma1 1 3 QCOM_GPI_SPI>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart11: serial@a8c000 { - compatible = "qcom,geni-uart"; - reg = <0 0x00a8c000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_uart11_default>; - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>; - interconnect-names = "qup-core", "qup-config"; - status = "disabled"; - }; - - i2c12: i2c@a90000 { - compatible = "qcom,geni-i2c"; - reg = <0 0x00a90000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_i2c12_default>; - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>, - <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>; - interconnect-names = "qup-core", "qup-config", "qup-memory"; - dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>, - <&gpi_dma1 1 4 QCOM_GPI_I2C>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi12: spi@a90000 { - compatible = "qcom,geni-spi"; - reg = <0 0x00a90000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_spi12_default>; - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>; - interconnect-names = "qup-core", "qup-config"; - dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>, - <&gpi_dma1 1 4 QCOM_GPI_SPI>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart12: serial@a90000 { - compatible = "qcom,geni-uart"; - reg = <0 0x00a90000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_uart12_default>; - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>; - interconnect-names = "qup-core", "qup-config"; - status = "disabled"; - }; - - i2c13: i2c@a94000 { - compatible = "qcom,geni-i2c"; - reg = <0 0x00a94000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_i2c13_default>; - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>, - <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>; - interconnect-names = "qup-core", "qup-config", "qup-memory"; - dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>, - <&gpi_dma1 1 5 QCOM_GPI_I2C>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi13: spi@a94000 { - compatible = "qcom,geni-spi"; - reg = <0 0x00a94000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_spi13_default>; - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>; - interconnect-names = "qup-core", "qup-config"; - dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>, - <&gpi_dma1 1 5 QCOM_GPI_SPI>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart13: serial@a94000 { - compatible = "qcom,geni-uart"; - reg = <0 0x00a94000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_uart13_default>; - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>; - interconnect-names = "qup-core", "qup-config"; - status = "disabled"; - }; - - i2c14: i2c@a98000 { - compatible = "qcom,geni-i2c"; - reg = <0 0x00a98000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_i2c14_default>; - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>, - <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>; - interconnect-names = "qup-core", "qup-config", "qup-memory"; - dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>, - <&gpi_dma1 1 6 QCOM_GPI_I2C>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi14: spi@a98000 { - compatible = "qcom,geni-spi"; - reg = <0 0x00a98000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_spi14_default>; - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>; - interconnect-names = "qup-core", "qup-config"; - dmas = <&gpi_dma1 0 6 QCOM_GPI_SPI>, - <&gpi_dma1 1 6 QCOM_GPI_SPI>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart14: serial@a98000 { - compatible = "qcom,geni-uart"; - reg = <0 0x00a98000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_uart14_default>; - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>; - interconnect-names = "qup-core", "qup-config"; - status = "disabled"; - }; - - i2c15: i2c@a9c000 { - compatible = "qcom,geni-i2c"; - reg = <0 0x00a9c000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_i2c15_default>; - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - status = "disabled"; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>, - <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>; - interconnect-names = "qup-core", "qup-config", "qup-memory"; - dmas = <&gpi_dma1 0 7 QCOM_GPI_I2C>, - <&gpi_dma1 1 7 QCOM_GPI_I2C>; - dma-names = "tx", "rx"; - }; - - spi15: spi@a9c000 { - compatible = "qcom,geni-spi"; - reg = <0 0x00a9c000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_spi15_default>; - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>; - interconnect-names = "qup-core", "qup-config"; - dmas = <&gpi_dma1 0 7 QCOM_GPI_SPI>, - <&gpi_dma1 1 7 QCOM_GPI_SPI>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart15: serial@a9c000 { - compatible = "qcom,geni-uart"; - reg = <0 0x00a9c000 0 0x4000>; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>; - pinctrl-names = "default"; - pinctrl-0 = <&qup_uart15_default>; - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qup_opp_table>; - interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>; - interconnect-names = "qup-core", "qup-config"; - status = "disabled"; - }; - }; - - llcc: system-cache-controller@1100000 { - compatible = "qcom,sdm845-llcc"; - reg = <0 0x01100000 0 0x45000>, <0 0x01180000 0 0x50000>, - <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>, - <0 0x01300000 0 0x50000>; - reg-names = "llcc0_base", "llcc1_base", "llcc2_base", - "llcc3_base", "llcc_broadcast_base"; - interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; - }; - - dma@10a2000 { - compatible = "qcom,sdm845-dcc", "qcom,dcc"; - reg = <0x0 0x010a2000 0x0 0x1000>, - <0x0 0x010ae000 0x0 0x2000>; - }; - - pmu@114a000 { - compatible = "qcom,sdm845-llcc-bwmon"; - reg = <0 0x0114a000 0 0x1000>; - interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; - interconnects = <&mem_noc MASTER_LLCC 3 &mem_noc SLAVE_EBI1 3>; - - operating-points-v2 = <&llcc_bwmon_opp_table>; - - llcc_bwmon_opp_table: opp-table { - compatible = "operating-points-v2"; - - /* - * The interconnect path bandwidth taken from - * cpu4_opp_table bandwidth for gladiator_noc-mem_noc - * interconnect. This also matches the - * bandwidth table of qcom,llccbw (qcom,bw-tbl, - * bus width: 4 bytes) from msm-4.9 downstream - * kernel. - */ - opp-0 { - opp-peak-kBps = <800000>; - }; - opp-1 { - opp-peak-kBps = <1804000>; - }; - opp-2 { - opp-peak-kBps = <3072000>; - }; - opp-3 { - opp-peak-kBps = <5412000>; - }; - opp-4 { - opp-peak-kBps = <7216000>; - }; - }; - }; - - pmu@1436400 { - compatible = "qcom,sdm845-cpu-bwmon", "qcom,sdm845-bwmon"; - reg = <0 0x01436400 0 0x600>; - interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>; - interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>; - - operating-points-v2 = <&cpu_bwmon_opp_table>; - - cpu_bwmon_opp_table: opp-table { - compatible = "operating-points-v2"; - - /* - * The interconnect path bandwidth taken from - * cpu4_opp_table bandwidth for OSM L3 - * interconnect. This also matches the OSM L3 - * from bandwidth table of qcom,cpu4-l3lat-mon - * (qcom,core-dev-table, bus width: 16 bytes) - * from msm-4.9 downstream kernel. - */ - opp-0 { - opp-peak-kBps = <4800000>; - }; - opp-1 { - opp-peak-kBps = <9216000>; - }; - opp-2 { - opp-peak-kBps = <15052800>; - }; - opp-3 { - opp-peak-kBps = <20889600>; - }; - opp-4 { - opp-peak-kBps = <25497600>; - }; - }; - }; - - pcie0: pci@1c00000 { - compatible = "qcom,pcie-sdm845"; - reg = <0 0x01c00000 0 0x2000>, - <0 0x60000000 0 0xf1d>, - <0 0x60000f20 0 0xa8>, - <0 0x60100000 0 0x100000>, - <0 0x01c07000 0 0x1000>; - reg-names = "parf", "dbi", "elbi", "config", "mhi"; - device_type = "pci"; - linux,pci-domain = <0>; - bus-range = <0x00 0xff>; - num-lanes = <1>; - - #address-cells = <3>; - #size-cells = <2>; - - ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>, - <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0xd00000>; - - interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "msi"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ - <0 0 0 2 &intc 0 0 0 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ - <0 0 0 3 &intc 0 0 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ - <0 0 0 4 &intc 0 0 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ - - clocks = <&gcc GCC_PCIE_0_PIPE_CLK>, - <&gcc GCC_PCIE_0_AUX_CLK>, - <&gcc GCC_PCIE_0_CFG_AHB_CLK>, - <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, - <&gcc GCC_PCIE_0_SLV_AXI_CLK>, - <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>, - <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; - clock-names = "pipe", - "aux", - "cfg", - "bus_master", - "bus_slave", - "slave_q2a", - "tbu"; - - iommu-map = <0x0 &apps_smmu 0x1c10 0x1>, - <0x100 &apps_smmu 0x1c11 0x1>, - <0x200 &apps_smmu 0x1c12 0x1>, - <0x300 &apps_smmu 0x1c13 0x1>, - <0x400 &apps_smmu 0x1c14 0x1>, - <0x500 &apps_smmu 0x1c15 0x1>, - <0x600 &apps_smmu 0x1c16 0x1>, - <0x700 &apps_smmu 0x1c17 0x1>, - <0x800 &apps_smmu 0x1c18 0x1>, - <0x900 &apps_smmu 0x1c19 0x1>, - <0xa00 &apps_smmu 0x1c1a 0x1>, - <0xb00 &apps_smmu 0x1c1b 0x1>, - <0xc00 &apps_smmu 0x1c1c 0x1>, - <0xd00 &apps_smmu 0x1c1d 0x1>, - <0xe00 &apps_smmu 0x1c1e 0x1>, - <0xf00 &apps_smmu 0x1c1f 0x1>; - - resets = <&gcc GCC_PCIE_0_BCR>; - reset-names = "pci"; - - power-domains = <&gcc PCIE_0_GDSC>; - - phys = <&pcie0_phy>; - phy-names = "pciephy"; - - status = "disabled"; - }; - - pcie0_phy: phy@1c06000 { - compatible = "qcom,sdm845-qmp-pcie-phy"; - reg = <0 0x01c06000 0 0x1000>; - clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, - <&gcc GCC_PCIE_0_CFG_AHB_CLK>, - <&gcc GCC_PCIE_0_CLKREF_CLK>, - <&gcc GCC_PCIE_PHY_REFGEN_CLK>, - <&gcc GCC_PCIE_0_PIPE_CLK>; - clock-names = "aux", - "cfg_ahb", - "ref", - "refgen", - "pipe"; - - clock-output-names = "pcie_0_pipe_clk"; - #clock-cells = <0>; - - #phy-cells = <0>; - - resets = <&gcc GCC_PCIE_0_PHY_BCR>; - reset-names = "phy"; - - assigned-clocks = <&gcc GCC_PCIE_PHY_REFGEN_CLK>; - assigned-clock-rates = <100000000>; - - status = "disabled"; - }; - - pcie1: pci@1c08000 { - compatible = "qcom,pcie-sdm845"; - reg = <0 0x01c08000 0 0x2000>, - <0 0x40000000 0 0xf1d>, - <0 0x40000f20 0 0xa8>, - <0 0x40100000 0 0x100000>, - <0 0x01c0c000 0 0x1000>; - reg-names = "parf", "dbi", "elbi", "config", "mhi"; - device_type = "pci"; - linux,pci-domain = <1>; - bus-range = <0x00 0xff>; - num-lanes = <1>; - - #address-cells = <3>; - #size-cells = <2>; - - ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, - <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; - - interrupts = <GIC_SPI 307 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "msi"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ - <0 0 0 2 &intc 0 0 0 435 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ - <0 0 0 3 &intc 0 0 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ - <0 0 0 4 &intc 0 0 0 439 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ - - clocks = <&gcc GCC_PCIE_1_PIPE_CLK>, - <&gcc GCC_PCIE_1_AUX_CLK>, - <&gcc GCC_PCIE_1_CFG_AHB_CLK>, - <&gcc GCC_PCIE_1_MSTR_AXI_CLK>, - <&gcc GCC_PCIE_1_SLV_AXI_CLK>, - <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>, - <&gcc GCC_PCIE_1_CLKREF_CLK>, - <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; - clock-names = "pipe", - "aux", - "cfg", - "bus_master", - "bus_slave", - "slave_q2a", - "ref", - "tbu"; - - assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>; - assigned-clock-rates = <19200000>; - - iommu-map = <0x0 &apps_smmu 0x1c00 0x1>, - <0x100 &apps_smmu 0x1c01 0x1>, - <0x200 &apps_smmu 0x1c02 0x1>, - <0x300 &apps_smmu 0x1c03 0x1>, - <0x400 &apps_smmu 0x1c04 0x1>, - <0x500 &apps_smmu 0x1c05 0x1>, - <0x600 &apps_smmu 0x1c06 0x1>, - <0x700 &apps_smmu 0x1c07 0x1>, - <0x800 &apps_smmu 0x1c08 0x1>, - <0x900 &apps_smmu 0x1c09 0x1>, - <0xa00 &apps_smmu 0x1c0a 0x1>, - <0xb00 &apps_smmu 0x1c0b 0x1>, - <0xc00 &apps_smmu 0x1c0c 0x1>, - <0xd00 &apps_smmu 0x1c0d 0x1>, - <0xe00 &apps_smmu 0x1c0e 0x1>, - <0xf00 &apps_smmu 0x1c0f 0x1>; - - resets = <&gcc GCC_PCIE_1_BCR>; - reset-names = "pci"; - - power-domains = <&gcc PCIE_1_GDSC>; - - phys = <&pcie1_phy>; - phy-names = "pciephy"; - - status = "disabled"; - }; - - pcie1_phy: phy@1c0a000 { - compatible = "qcom,sdm845-qhp-pcie-phy"; - reg = <0 0x01c0a000 0 0x2000>; - clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>, - <&gcc GCC_PCIE_1_CFG_AHB_CLK>, - <&gcc GCC_PCIE_1_CLKREF_CLK>, - <&gcc GCC_PCIE_PHY_REFGEN_CLK>, - <&gcc GCC_PCIE_1_PIPE_CLK>; - clock-names = "aux", - "cfg_ahb", - "ref", - "refgen", - "pipe"; - - clock-output-names = "pcie_1_pipe_clk"; - #clock-cells = <0>; - - #phy-cells = <0>; - - resets = <&gcc GCC_PCIE_1_PHY_BCR>; - reset-names = "phy"; - - assigned-clocks = <&gcc GCC_PCIE_PHY_REFGEN_CLK>; - assigned-clock-rates = <100000000>; - - status = "disabled"; - }; - - mem_noc: interconnect@1380000 { - compatible = "qcom,sdm845-mem-noc"; - reg = <0 0x01380000 0 0x27200>; - #interconnect-cells = <2>; - qcom,bcm-voters = <&apps_bcm_voter>; - }; - - dc_noc: interconnect@14e0000 { - compatible = "qcom,sdm845-dc-noc"; - reg = <0 0x014e0000 0 0x400>; - #interconnect-cells = <2>; - qcom,bcm-voters = <&apps_bcm_voter>; - }; - - config_noc: interconnect@1500000 { - compatible = "qcom,sdm845-config-noc"; - reg = <0 0x01500000 0 0x5080>; - #interconnect-cells = <2>; - qcom,bcm-voters = <&apps_bcm_voter>; - }; - - system_noc: interconnect@1620000 { - compatible = "qcom,sdm845-system-noc"; - reg = <0 0x01620000 0 0x18080>; - #interconnect-cells = <2>; - qcom,bcm-voters = <&apps_bcm_voter>; - }; - - aggre1_noc: interconnect@16e0000 { - compatible = "qcom,sdm845-aggre1-noc"; - reg = <0 0x016e0000 0 0x15080>; - #interconnect-cells = <2>; - qcom,bcm-voters = <&apps_bcm_voter>; - }; - - aggre2_noc: interconnect@1700000 { - compatible = "qcom,sdm845-aggre2-noc"; - reg = <0 0x01700000 0 0x1f300>; - #interconnect-cells = <2>; - qcom,bcm-voters = <&apps_bcm_voter>; - }; - - mmss_noc: interconnect@1740000 { - compatible = "qcom,sdm845-mmss-noc"; - reg = <0 0x01740000 0 0x1c100>; - #interconnect-cells = <2>; - qcom,bcm-voters = <&apps_bcm_voter>; - }; - - ufs_mem_hc: ufshc@1d84000 { - compatible = "qcom,sdm845-ufshc", "qcom,ufshc", - "jedec,ufs-2.0"; - reg = <0 0x01d84000 0 0x2500>, - <0 0x01d90000 0 0x8000>; - reg-names = "std", "ice"; - interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; - phys = <&ufs_mem_phy_lanes>; - phy-names = "ufsphy"; - lanes-per-direction = <2>; - power-domains = <&gcc UFS_PHY_GDSC>; - #reset-cells = <1>; - resets = <&gcc GCC_UFS_PHY_BCR>; - reset-names = "rst"; - - iommus = <&apps_smmu 0x100 0xf>; - - clock-names = - "core_clk", - "bus_aggr_clk", - "iface_clk", - "core_clk_unipro", - "ref_clk", - "tx_lane0_sync_clk", - "rx_lane0_sync_clk", - "rx_lane1_sync_clk", - "ice_core_clk"; - clocks = - <&gcc GCC_UFS_PHY_AXI_CLK>, - <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, - <&gcc GCC_UFS_PHY_AHB_CLK>, - <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, - <&rpmhcc RPMH_CXO_CLK>, - <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, - <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, - <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>, - <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; - freq-table-hz = - <50000000 200000000>, - <0 0>, - <0 0>, - <37500000 150000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>, - <75000000 300000000>; - - interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mem_noc SLAVE_EBI1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>; - interconnect-names = "ufs-ddr", "cpu-ufs"; - - status = "disabled"; - }; - - ufs_mem_phy: phy@1d87000 { - compatible = "qcom,sdm845-qmp-ufs-phy"; - reg = <0 0x01d87000 0 0x18c>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - clock-names = "ref", - "ref_aux"; - clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, - <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; - - resets = <&ufs_mem_hc 0>; - reset-names = "ufsphy"; - status = "disabled"; - - ufs_mem_phy_lanes: phy@1d87400 { - reg = <0 0x01d87400 0 0x108>, - <0 0x01d87600 0 0x1e0>, - <0 0x01d87c00 0 0x1dc>, - <0 0x01d87800 0 0x108>, - <0 0x01d87a00 0 0x1e0>; - #phy-cells = <0>; - }; - }; - - cryptobam: dma-controller@1dc4000 { - compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; - reg = <0 0x01dc4000 0 0x24000>; - interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rpmhcc RPMH_CE_CLK>; - clock-names = "bam_clk"; - #dma-cells = <1>; - qcom,ee = <0>; - qcom,controlled-remotely; - iommus = <&apps_smmu 0x704 0x1>, - <&apps_smmu 0x706 0x1>, - <&apps_smmu 0x714 0x1>, - <&apps_smmu 0x716 0x1>; - }; - - crypto: crypto@1dfa000 { - compatible = "qcom,crypto-v5.4"; - reg = <0 0x01dfa000 0 0x6000>; - clocks = <&gcc GCC_CE1_AHB_CLK>, - <&gcc GCC_CE1_AXI_CLK>, - <&rpmhcc RPMH_CE_CLK>; - clock-names = "iface", "bus", "core"; - dmas = <&cryptobam 6>, <&cryptobam 7>; - dma-names = "rx", "tx"; - iommus = <&apps_smmu 0x704 0x1>, - <&apps_smmu 0x706 0x1>, - <&apps_smmu 0x714 0x1>, - <&apps_smmu 0x716 0x1>; - }; - - ipa: ipa@1e40000 { - compatible = "qcom,sdm845-ipa"; - - iommus = <&apps_smmu 0x720 0x0>, - <&apps_smmu 0x722 0x0>; - reg = <0 0x01e40000 0 0x7000>, - <0 0x01e47000 0 0x2000>, - <0 0x01e04000 0 0x2c000>; - reg-names = "ipa-reg", - "ipa-shared", - "gsi"; - - interrupts-extended = <&intc GIC_SPI 311 IRQ_TYPE_EDGE_RISING>, - <&intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>, - <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, - <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "ipa", - "gsi", - "ipa-clock-query", - "ipa-setup-ready"; - - clocks = <&rpmhcc RPMH_IPA_CLK>; - clock-names = "core"; - - interconnects = <&aggre2_noc MASTER_IPA 0 &mem_noc SLAVE_EBI1 0>, - <&aggre2_noc MASTER_IPA 0 &system_noc SLAVE_IMEM 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_IPA_CFG 0>; - interconnect-names = "memory", - "imem", - "config"; - - qcom,smem-states = <&ipa_smp2p_out 0>, - <&ipa_smp2p_out 1>; - qcom,smem-state-names = "ipa-clock-enabled-valid", - "ipa-clock-enabled"; - - status = "disabled"; - }; - - tcsr_mutex: hwlock@1f40000 { - compatible = "qcom,tcsr-mutex"; - reg = <0 0x01f40000 0 0x20000>; - #hwlock-cells = <1>; - }; - - tcsr_regs_1: syscon@1f60000 { - compatible = "qcom,sdm845-tcsr", "syscon"; - reg = <0 0x01f60000 0 0x20000>; - }; - - tlmm: pinctrl@3400000 { - compatible = "qcom,sdm845-pinctrl"; - reg = <0 0x03400000 0 0xc00000>; - interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 151>; - wakeup-parent = <&pdc_intc>; - - cci0_default: cci0-default-state { - /* SDA, SCL */ - pins = "gpio17", "gpio18"; - function = "cci_i2c"; - - bias-pull-up; - drive-strength = <2>; /* 2 mA */ - }; - - cci0_sleep: cci0-sleep-state { - /* SDA, SCL */ - pins = "gpio17", "gpio18"; - function = "cci_i2c"; - - drive-strength = <2>; /* 2 mA */ - bias-pull-down; - }; - - cci1_default: cci1-default-state { - /* SDA, SCL */ - pins = "gpio19", "gpio20"; - function = "cci_i2c"; - - bias-pull-up; - drive-strength = <2>; /* 2 mA */ - }; - - cci1_sleep: cci1-sleep-state { - /* SDA, SCL */ - pins = "gpio19", "gpio20"; - function = "cci_i2c"; - - drive-strength = <2>; /* 2 mA */ - bias-pull-down; - }; - - qspi_clk: qspi-clk-state { - pins = "gpio95"; - function = "qspi_clk"; - }; - - qspi_cs0: qspi-cs0-state { - pins = "gpio90"; - function = "qspi_cs"; - }; - - qspi_cs1: qspi-cs1-state { - pins = "gpio89"; - function = "qspi_cs"; - }; - - qspi_data0: qspi-data0-state { - pins = "gpio91"; - function = "qspi_data"; - }; - - qspi_data1: qspi-data1-state { - pins = "gpio92"; - function = "qspi_data"; - }; - - qspi_data23: qspi-data23-state { - pins = "gpio93", "gpio94"; - function = "qspi_data"; - }; - - qup_i2c0_default: qup-i2c0-default-state { - pins = "gpio0", "gpio1"; - function = "qup0"; - }; - - qup_i2c1_default: qup-i2c1-default-state { - pins = "gpio17", "gpio18"; - function = "qup1"; - }; - - qup_i2c2_default: qup-i2c2-default-state { - pins = "gpio27", "gpio28"; - function = "qup2"; - }; - - qup_i2c3_default: qup-i2c3-default-state { - pins = "gpio41", "gpio42"; - function = "qup3"; - }; - - qup_i2c4_default: qup-i2c4-default-state { - pins = "gpio89", "gpio90"; - function = "qup4"; - }; - - qup_i2c5_default: qup-i2c5-default-state { - pins = "gpio85", "gpio86"; - function = "qup5"; - }; - - qup_i2c6_default: qup-i2c6-default-state { - pins = "gpio45", "gpio46"; - function = "qup6"; - }; - - qup_i2c7_default: qup-i2c7-default-state { - pins = "gpio93", "gpio94"; - function = "qup7"; - }; - - qup_i2c8_default: qup-i2c8-default-state { - pins = "gpio65", "gpio66"; - function = "qup8"; - }; - - qup_i2c9_default: qup-i2c9-default-state { - pins = "gpio6", "gpio7"; - function = "qup9"; - }; - - qup_i2c10_default: qup-i2c10-default-state { - pins = "gpio55", "gpio56"; - function = "qup10"; - }; - - qup_i2c11_default: qup-i2c11-default-state { - pins = "gpio31", "gpio32"; - function = "qup11"; - }; - - qup_i2c12_default: qup-i2c12-default-state { - pins = "gpio49", "gpio50"; - function = "qup12"; - }; - - qup_i2c13_default: qup-i2c13-default-state { - pins = "gpio105", "gpio106"; - function = "qup13"; - }; - - qup_i2c14_default: qup-i2c14-default-state { - pins = "gpio33", "gpio34"; - function = "qup14"; - }; - - qup_i2c15_default: qup-i2c15-default-state { - pins = "gpio81", "gpio82"; - function = "qup15"; - }; - - qup_spi0_default: qup-spi0-default-state { - pins = "gpio0", "gpio1", "gpio2", "gpio3"; - function = "qup0"; - }; - - qup_spi1_default: qup-spi1-default-state { - pins = "gpio17", "gpio18", "gpio19", "gpio20"; - function = "qup1"; - }; - - qup_spi2_default: qup-spi2-default-state { - pins = "gpio27", "gpio28", "gpio29", "gpio30"; - function = "qup2"; - }; - - qup_spi3_default: qup-spi3-default-state { - pins = "gpio41", "gpio42", "gpio43", "gpio44"; - function = "qup3"; - }; - - qup_spi4_default: qup-spi4-default-state { - pins = "gpio89", "gpio90", "gpio91", "gpio92"; - function = "qup4"; - }; - - qup_spi5_default: qup-spi5-default-state { - pins = "gpio85", "gpio86", "gpio87", "gpio88"; - function = "qup5"; - }; - - qup_spi6_default: qup-spi6-default-state { - pins = "gpio45", "gpio46", "gpio47", "gpio48"; - function = "qup6"; - }; - - qup_spi7_default: qup-spi7-default-state { - pins = "gpio93", "gpio94", "gpio95", "gpio96"; - function = "qup7"; - }; - - qup_spi8_default: qup-spi8-default-state { - pins = "gpio65", "gpio66", "gpio67", "gpio68"; - function = "qup8"; - }; - - qup_spi9_default: qup-spi9-default-state { - pins = "gpio6", "gpio7", "gpio4", "gpio5"; - function = "qup9"; - }; - - qup_spi10_default: qup-spi10-default-state { - pins = "gpio55", "gpio56", "gpio53", "gpio54"; - function = "qup10"; - }; - - qup_spi11_default: qup-spi11-default-state { - pins = "gpio31", "gpio32", "gpio33", "gpio34"; - function = "qup11"; - }; - - qup_spi12_default: qup-spi12-default-state { - pins = "gpio49", "gpio50", "gpio51", "gpio52"; - function = "qup12"; - }; - - qup_spi13_default: qup-spi13-default-state { - pins = "gpio105", "gpio106", "gpio107", "gpio108"; - function = "qup13"; - }; - - qup_spi14_default: qup-spi14-default-state { - pins = "gpio33", "gpio34", "gpio31", "gpio32"; - function = "qup14"; - }; - - qup_spi15_default: qup-spi15-default-state { - pins = "gpio81", "gpio82", "gpio83", "gpio84"; - function = "qup15"; - }; - - qup_uart0_default: qup-uart0-default-state { - qup_uart0_tx: tx-pins { - pins = "gpio2"; - function = "qup0"; - }; - - qup_uart0_rx: rx-pins { - pins = "gpio3"; - function = "qup0"; - }; - }; - - qup_uart1_default: qup-uart1-default-state { - qup_uart1_tx: tx-pins { - pins = "gpio19"; - function = "qup1"; - }; - - qup_uart1_rx: rx-pins { - pins = "gpio20"; - function = "qup1"; - }; - }; - - qup_uart2_default: qup-uart2-default-state { - qup_uart2_tx: tx-pins { - pins = "gpio29"; - function = "qup2"; - }; - - qup_uart2_rx: rx-pins { - pins = "gpio30"; - function = "qup2"; - }; - }; - - qup_uart3_default: qup-uart3-default-state { - qup_uart3_tx: tx-pins { - pins = "gpio43"; - function = "qup3"; - }; - - qup_uart3_rx: rx-pins { - pins = "gpio44"; - function = "qup3"; - }; - }; - - qup_uart3_4pin: qup-uart3-4pin-state { - qup_uart3_4pin_cts: cts-pins { - pins = "gpio41"; - function = "qup3"; - }; - - qup_uart3_4pin_rts_tx: rts-tx-pins { - pins = "gpio42", "gpio43"; - function = "qup3"; - }; - - qup_uart3_4pin_rx: rx-pins { - pins = "gpio44"; - function = "qup3"; - }; - }; - - qup_uart4_default: qup-uart4-default-state { - qup_uart4_tx: tx-pins { - pins = "gpio91"; - function = "qup4"; - }; - - qup_uart4_rx: rx-pins { - pins = "gpio92"; - function = "qup4"; - }; - }; - - qup_uart5_default: qup-uart5-default-state { - qup_uart5_tx: tx-pins { - pins = "gpio87"; - function = "qup5"; - }; - - qup_uart5_rx: rx-pins { - pins = "gpio88"; - function = "qup5"; - }; - }; - - qup_uart6_default: qup-uart6-default-state { - qup_uart6_tx: tx-pins { - pins = "gpio47"; - function = "qup6"; - }; - - qup_uart6_rx: rx-pins { - pins = "gpio48"; - function = "qup6"; - }; - }; - - qup_uart6_4pin: qup-uart6-4pin-state { - qup_uart6_4pin_cts: cts-pins { - pins = "gpio45"; - function = "qup6"; - bias-pull-down; - }; - - qup_uart6_4pin_rts_tx: rts-tx-pins { - pins = "gpio46", "gpio47"; - function = "qup6"; - drive-strength = <2>; - bias-disable; - }; - - qup_uart6_4pin_rx: rx-pins { - pins = "gpio48"; - function = "qup6"; - bias-pull-up; - }; - }; - - qup_uart7_default: qup-uart7-default-state { - qup_uart7_tx: tx-pins { - pins = "gpio95"; - function = "qup7"; - }; - - qup_uart7_rx: rx-pins { - pins = "gpio96"; - function = "qup7"; - }; - }; - - qup_uart8_default: qup-uart8-default-state { - qup_uart8_tx: tx-pins { - pins = "gpio67"; - function = "qup8"; - }; - - qup_uart8_rx: rx-pins { - pins = "gpio68"; - function = "qup8"; - }; - }; - - qup_uart9_default: qup-uart9-default-state { - qup_uart9_tx: tx-pins { - pins = "gpio4"; - function = "qup9"; - }; - - qup_uart9_rx: rx-pins { - pins = "gpio5"; - function = "qup9"; - }; - }; - - qup_uart10_default: qup-uart10-default-state { - qup_uart10_tx: tx-pins { - pins = "gpio53"; - function = "qup10"; - }; - - qup_uart10_rx: rx-pins { - pins = "gpio54"; - function = "qup10"; - }; - }; - - qup_uart11_default: qup-uart11-default-state { - qup_uart11_tx: tx-pins { - pins = "gpio33"; - function = "qup11"; - }; - - qup_uart11_rx: rx-pins { - pins = "gpio34"; - function = "qup11"; - }; - }; - - qup_uart12_default: qup-uart12-default-state { - qup_uart12_tx: tx-pins { - pins = "gpio51"; - function = "qup0"; - }; - - qup_uart12_rx: rx-pins { - pins = "gpio52"; - function = "qup0"; - }; - }; - - qup_uart13_default: qup-uart13-default-state { - qup_uart13_tx: tx-pins { - pins = "gpio107"; - function = "qup13"; - }; - - qup_uart13_rx: rx-pins { - pins = "gpio108"; - function = "qup13"; - }; - }; - - qup_uart14_default: qup-uart14-default-state { - qup_uart14_tx: tx-pins { - pins = "gpio31"; - function = "qup14"; - }; - - qup_uart14_rx: rx-pins { - pins = "gpio32"; - function = "qup14"; - }; - }; - - qup_uart15_default: qup-uart15-default-state { - qup_uart15_tx: tx-pins { - pins = "gpio83"; - function = "qup15"; - }; - - qup_uart15_rx: rx-pins { - pins = "gpio84"; - function = "qup15"; - }; - }; - - quat_mi2s_sleep: quat-mi2s-sleep-state { - pins = "gpio58", "gpio59"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - quat_mi2s_active: quat-mi2s-active-state { - pins = "gpio58", "gpio59"; - function = "qua_mi2s"; - drive-strength = <8>; - bias-disable; - output-high; - }; - - quat_mi2s_sd0_sleep: quat-mi2s-sd0-sleep-state { - pins = "gpio60"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - quat_mi2s_sd0_active: quat-mi2s-sd0-active-state { - pins = "gpio60"; - function = "qua_mi2s"; - drive-strength = <8>; - bias-disable; - }; - - quat_mi2s_sd1_sleep: quat-mi2s-sd1-sleep-state { - pins = "gpio61"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - quat_mi2s_sd1_active: quat-mi2s-sd1-active-state { - pins = "gpio61"; - function = "qua_mi2s"; - drive-strength = <8>; - bias-disable; - }; - - quat_mi2s_sd2_sleep: quat-mi2s-sd2-sleep-state { - pins = "gpio62"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - quat_mi2s_sd2_active: quat-mi2s-sd2-active-state { - pins = "gpio62"; - function = "qua_mi2s"; - drive-strength = <8>; - bias-disable; - }; - - quat_mi2s_sd3_sleep: quat-mi2s-sd3-sleep-state { - pins = "gpio63"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - quat_mi2s_sd3_active: quat-mi2s-sd3-active-state { - pins = "gpio63"; - function = "qua_mi2s"; - drive-strength = <8>; - bias-disable; - }; - }; - - mss_pil: remoteproc@4080000 { - compatible = "qcom,sdm845-mss-pil"; - reg = <0 0x04080000 0 0x408>, <0 0x04180000 0 0x48>; - reg-names = "qdsp6", "rmb"; - - interrupts-extended = - <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>, - <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, - <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, - <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, - <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, - <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", - "handover", "stop-ack", - "shutdown-ack"; - - clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, - <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>, - <&gcc GCC_BOOT_ROM_AHB_CLK>, - <&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>, - <&gcc GCC_MSS_SNOC_AXI_CLK>, - <&gcc GCC_MSS_MFAB_AXIS_CLK>, - <&gcc GCC_PRNG_AHB_CLK>, - <&rpmhcc RPMH_CXO_CLK>; - clock-names = "iface", "bus", "mem", "gpll0_mss", - "snoc_axi", "mnoc_axi", "prng", "xo"; - - qcom,qmp = <&aoss_qmp>; - - qcom,smem-states = <&modem_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - resets = <&aoss_reset AOSS_CC_MSS_RESTART>, - <&pdc_reset PDC_MODEM_SYNC_RESET>; - reset-names = "mss_restart", "pdc_reset"; - - qcom,halt-regs = <&tcsr_regs_1 0x3000 0x5000 0x4000>; - - power-domains = <&rpmhpd SDM845_CX>, - <&rpmhpd SDM845_MX>, - <&rpmhpd SDM845_MSS>; - power-domain-names = "cx", "mx", "mss"; - - status = "disabled"; - - mba { - memory-region = <&mba_region>; - }; - - mpss { - memory-region = <&mpss_region>; - }; - - metadata { - memory-region = <&mdata_mem>; - }; - - glink-edge { - interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; - label = "modem"; - qcom,remote-pid = <1>; - mboxes = <&apss_shared 12>; - }; - }; - - gpucc: clock-controller@5090000 { - compatible = "qcom,sdm845-gpucc"; - reg = <0 0x05090000 0 0x9000>; - #clock-cells = <1>; - #reset-cells = <1>; - #power-domain-cells = <1>; - clocks = <&rpmhcc RPMH_CXO_CLK>, - <&gcc GCC_GPU_GPLL0_CLK_SRC>, - <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; - clock-names = "bi_tcxo", - "gcc_gpu_gpll0_clk_src", - "gcc_gpu_gpll0_div_clk_src"; - }; - - slpi_pas: remoteproc@5c00000 { - compatible = "qcom,sdm845-slpi-pas"; - reg = <0 0x5c00000 0 0x4000>; - - interrupts-extended = <&intc GIC_SPI 494 IRQ_TYPE_EDGE_RISING>, - <&slpi_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, - <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, - <&slpi_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, - <&slpi_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", - "handover", "stop-ack"; - - clocks = <&rpmhcc RPMH_CXO_CLK>; - clock-names = "xo"; - - qcom,qmp = <&aoss_qmp>; - - power-domains = <&rpmhpd SDM845_CX>, - <&rpmhpd SDM845_MX>; - power-domain-names = "lcx", "lmx"; - - memory-region = <&slpi_mem>; - - qcom,smem-states = <&slpi_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - status = "disabled"; - - glink-edge { - interrupts = <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>; - label = "dsps"; - qcom,remote-pid = <3>; - mboxes = <&apss_shared 24>; - - fastrpc { - compatible = "qcom,fastrpc"; - qcom,glink-channels = "fastrpcglink-apps-dsp"; - label = "sdsp"; - qcom,non-secure-domain; - qcom,vmids = <QCOM_SCM_VMID_HLOS QCOM_SCM_VMID_MSS_MSA - QCOM_SCM_VMID_SSC_Q6 QCOM_SCM_VMID_ADSP_Q6>; - memory-region = <&fastrpc_mem>; - #address-cells = <1>; - #size-cells = <0>; - - compute-cb@0 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <0>; - }; - }; - }; - }; - - stm@6002000 { - compatible = "arm,coresight-stm", "arm,primecell"; - reg = <0 0x06002000 0 0x1000>, - <0 0x16280000 0 0x180000>; - reg-names = "stm-base", "stm-stimulus-base"; - - clocks = <&aoss_qmp>; - clock-names = "apb_pclk"; - - out-ports { - port { - stm_out: endpoint { - remote-endpoint = - <&funnel0_in7>; - }; - }; - }; - }; - - funnel@6041000 { - compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; - reg = <0 0x06041000 0 0x1000>; - - clocks = <&aoss_qmp>; - clock-names = "apb_pclk"; - - out-ports { - port { - funnel0_out: endpoint { - remote-endpoint = - <&merge_funnel_in0>; - }; - }; - }; - - in-ports { - #address-cells = <1>; - #size-cells = <0>; - - port@7 { - reg = <7>; - funnel0_in7: endpoint { - remote-endpoint = <&stm_out>; - }; - }; - }; - }; - - funnel@6043000 { - compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; - reg = <0 0x06043000 0 0x1000>; - - clocks = <&aoss_qmp>; - clock-names = "apb_pclk"; - - out-ports { - port { - funnel2_out: endpoint { - remote-endpoint = - <&merge_funnel_in2>; - }; - }; - }; - - in-ports { - #address-cells = <1>; - #size-cells = <0>; - - port@5 { - reg = <5>; - funnel2_in5: endpoint { - remote-endpoint = - <&apss_merge_funnel_out>; - }; - }; - }; - }; - - funnel@6045000 { - compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; - reg = <0 0x06045000 0 0x1000>; - - clocks = <&aoss_qmp>; - clock-names = "apb_pclk"; - - out-ports { - port { - merge_funnel_out: endpoint { - remote-endpoint = <&etf_in>; - }; - }; - }; - - in-ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - merge_funnel_in0: endpoint { - remote-endpoint = - <&funnel0_out>; - }; - }; - - port@2 { - reg = <2>; - merge_funnel_in2: endpoint { - remote-endpoint = - <&funnel2_out>; - }; - }; - }; - }; - - replicator@6046000 { - compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; - reg = <0 0x06046000 0 0x1000>; - - clocks = <&aoss_qmp>; - clock-names = "apb_pclk"; - - out-ports { - port { - replicator_out: endpoint { - remote-endpoint = <&etr_in>; - }; - }; - }; - - in-ports { - port { - replicator_in: endpoint { - remote-endpoint = <&etf_out>; - }; - }; - }; - }; - - etf@6047000 { - compatible = "arm,coresight-tmc", "arm,primecell"; - reg = <0 0x06047000 0 0x1000>; - - clocks = <&aoss_qmp>; - clock-names = "apb_pclk"; - - out-ports { - port { - etf_out: endpoint { - remote-endpoint = - <&replicator_in>; - }; - }; - }; - - in-ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - etf_in: endpoint { - remote-endpoint = - <&merge_funnel_out>; - }; - }; - }; - }; - - etr@6048000 { - compatible = "arm,coresight-tmc", "arm,primecell"; - reg = <0 0x06048000 0 0x1000>; - - clocks = <&aoss_qmp>; - clock-names = "apb_pclk"; - arm,scatter-gather; - - in-ports { - port { - etr_in: endpoint { - remote-endpoint = - <&replicator_out>; - }; - }; - }; - }; - - etm@7040000 { - compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0 0x07040000 0 0x1000>; - - cpu = <&CPU0>; - - clocks = <&aoss_qmp>; - clock-names = "apb_pclk"; - arm,coresight-loses-context-with-cpu; - - out-ports { - port { - etm0_out: endpoint { - remote-endpoint = - <&apss_funnel_in0>; - }; - }; - }; - }; - - etm@7140000 { - compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0 0x07140000 0 0x1000>; - - cpu = <&CPU1>; - - clocks = <&aoss_qmp>; - clock-names = "apb_pclk"; - arm,coresight-loses-context-with-cpu; - - out-ports { - port { - etm1_out: endpoint { - remote-endpoint = - <&apss_funnel_in1>; - }; - }; - }; - }; - - etm@7240000 { - compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0 0x07240000 0 0x1000>; - - cpu = <&CPU2>; - - clocks = <&aoss_qmp>; - clock-names = "apb_pclk"; - arm,coresight-loses-context-with-cpu; - - out-ports { - port { - etm2_out: endpoint { - remote-endpoint = - <&apss_funnel_in2>; - }; - }; - }; - }; - - etm@7340000 { - compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0 0x07340000 0 0x1000>; - - cpu = <&CPU3>; - - clocks = <&aoss_qmp>; - clock-names = "apb_pclk"; - arm,coresight-loses-context-with-cpu; - - out-ports { - port { - etm3_out: endpoint { - remote-endpoint = - <&apss_funnel_in3>; - }; - }; - }; - }; - - etm@7440000 { - compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0 0x07440000 0 0x1000>; - - cpu = <&CPU4>; - - clocks = <&aoss_qmp>; - clock-names = "apb_pclk"; - arm,coresight-loses-context-with-cpu; - - out-ports { - port { - etm4_out: endpoint { - remote-endpoint = - <&apss_funnel_in4>; - }; - }; - }; - }; - - etm@7540000 { - compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0 0x07540000 0 0x1000>; - - cpu = <&CPU5>; - - clocks = <&aoss_qmp>; - clock-names = "apb_pclk"; - arm,coresight-loses-context-with-cpu; - - out-ports { - port { - etm5_out: endpoint { - remote-endpoint = - <&apss_funnel_in5>; - }; - }; - }; - }; - - etm@7640000 { - compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0 0x07640000 0 0x1000>; - - cpu = <&CPU6>; - - clocks = <&aoss_qmp>; - clock-names = "apb_pclk"; - arm,coresight-loses-context-with-cpu; - - out-ports { - port { - etm6_out: endpoint { - remote-endpoint = - <&apss_funnel_in6>; - }; - }; - }; - }; - - etm@7740000 { - compatible = "arm,coresight-etm4x", "arm,primecell"; - reg = <0 0x07740000 0 0x1000>; - - cpu = <&CPU7>; - - clocks = <&aoss_qmp>; - clock-names = "apb_pclk"; - arm,coresight-loses-context-with-cpu; - - out-ports { - port { - etm7_out: endpoint { - remote-endpoint = - <&apss_funnel_in7>; - }; - }; - }; - }; - - funnel@7800000 { /* APSS Funnel */ - compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; - reg = <0 0x07800000 0 0x1000>; - - clocks = <&aoss_qmp>; - clock-names = "apb_pclk"; - - out-ports { - port { - apss_funnel_out: endpoint { - remote-endpoint = - <&apss_merge_funnel_in>; - }; - }; - }; - - in-ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - apss_funnel_in0: endpoint { - remote-endpoint = - <&etm0_out>; - }; - }; - - port@1 { - reg = <1>; - apss_funnel_in1: endpoint { - remote-endpoint = - <&etm1_out>; - }; - }; - - port@2 { - reg = <2>; - apss_funnel_in2: endpoint { - remote-endpoint = - <&etm2_out>; - }; - }; - - port@3 { - reg = <3>; - apss_funnel_in3: endpoint { - remote-endpoint = - <&etm3_out>; - }; - }; - - port@4 { - reg = <4>; - apss_funnel_in4: endpoint { - remote-endpoint = - <&etm4_out>; - }; - }; - - port@5 { - reg = <5>; - apss_funnel_in5: endpoint { - remote-endpoint = - <&etm5_out>; - }; - }; - - port@6 { - reg = <6>; - apss_funnel_in6: endpoint { - remote-endpoint = - <&etm6_out>; - }; - }; - - port@7 { - reg = <7>; - apss_funnel_in7: endpoint { - remote-endpoint = - <&etm7_out>; - }; - }; - }; - }; - - funnel@7810000 { - compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; - reg = <0 0x07810000 0 0x1000>; - - clocks = <&aoss_qmp>; - clock-names = "apb_pclk"; - - out-ports { - port { - apss_merge_funnel_out: endpoint { - remote-endpoint = - <&funnel2_in5>; - }; - }; - }; - - in-ports { - port { - apss_merge_funnel_in: endpoint { - remote-endpoint = - <&apss_funnel_out>; - }; - }; - }; - }; - - sdhc_2: mmc@8804000 { - compatible = "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5"; - reg = <0 0x08804000 0 0x1000>; - - interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "hc_irq", "pwr_irq"; - - clocks = <&gcc GCC_SDCC2_AHB_CLK>, - <&gcc GCC_SDCC2_APPS_CLK>, - <&rpmhcc RPMH_CXO_CLK>; - clock-names = "iface", "core", "xo"; - iommus = <&apps_smmu 0xa0 0xf>; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&sdhc2_opp_table>; - - status = "disabled"; - - sdhc2_opp_table: opp-table { - compatible = "operating-points-v2"; - - opp-9600000 { - opp-hz = /bits/ 64 <9600000>; - required-opps = <&rpmhpd_opp_min_svs>; - }; - - opp-19200000 { - opp-hz = /bits/ 64 <19200000>; - required-opps = <&rpmhpd_opp_low_svs>; - }; - - opp-100000000 { - opp-hz = /bits/ 64 <100000000>; - required-opps = <&rpmhpd_opp_svs>; - }; - - opp-201500000 { - opp-hz = /bits/ 64 <201500000>; - required-opps = <&rpmhpd_opp_svs_l1>; - }; - }; - }; - - qspi: spi@88df000 { - compatible = "qcom,sdm845-qspi", "qcom,qspi-v1"; - reg = <0 0x088df000 0 0x600>; - iommus = <&apps_smmu 0x160 0x0>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>, - <&gcc GCC_QSPI_CORE_CLK>; - clock-names = "iface", "core"; - power-domains = <&rpmhpd SDM845_CX>; - operating-points-v2 = <&qspi_opp_table>; - status = "disabled"; - }; - - slim: slim-ngd@171c0000 { - compatible = "qcom,slim-ngd-v2.1.0"; - reg = <0 0x171c0000 0 0x2c000>; - interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; - - dmas = <&slimbam 3>, <&slimbam 4>; - dma-names = "rx", "tx"; - - iommus = <&apps_smmu 0x1806 0x0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - lmh_cluster1: lmh@17d70800 { - compatible = "qcom,sdm845-lmh"; - reg = <0 0x17d70800 0 0x400>; - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; - cpus = <&CPU4>; - qcom,lmh-temp-arm-millicelsius = <65000>; - qcom,lmh-temp-low-millicelsius = <94500>; - qcom,lmh-temp-high-millicelsius = <95000>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - lmh_cluster0: lmh@17d78800 { - compatible = "qcom,sdm845-lmh"; - reg = <0 0x17d78800 0 0x400>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - cpus = <&CPU0>; - qcom,lmh-temp-arm-millicelsius = <65000>; - qcom,lmh-temp-low-millicelsius = <94500>; - qcom,lmh-temp-high-millicelsius = <95000>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - usb_1_hsphy: phy@88e2000 { - compatible = "qcom,sdm845-qusb2-phy", "qcom,qusb2-v2-phy"; - reg = <0 0x088e2000 0 0x400>; - status = "disabled"; - #phy-cells = <0>; - - clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, - <&rpmhcc RPMH_CXO_CLK>; - clock-names = "cfg_ahb", "ref"; - - resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; - - nvmem-cells = <&qusb2p_hstx_trim>; - }; - - usb_2_hsphy: phy@88e3000 { - compatible = "qcom,sdm845-qusb2-phy", "qcom,qusb2-v2-phy"; - reg = <0 0x088e3000 0 0x400>; - status = "disabled"; - #phy-cells = <0>; - - clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, - <&rpmhcc RPMH_CXO_CLK>; - clock-names = "cfg_ahb", "ref"; - - resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; - - nvmem-cells = <&qusb2s_hstx_trim>; - }; - - usb_1_qmpphy: phy@88e8000 { - compatible = "qcom,sdm845-qmp-usb3-dp-phy"; - reg = <0 0x088e8000 0 0x3000>; - status = "disabled"; - - clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, - <&gcc GCC_USB3_PRIM_CLKREF_CLK>, - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, - <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>, - <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>; - clock-names = "aux", - "ref", - "com_aux", - "usb3_pipe", - "cfg_ahb"; - - resets = <&gcc GCC_USB3_PHY_PRIM_BCR>, - <&gcc GCC_USB3_DP_PHY_PRIM_BCR>; - reset-names = "phy", "common"; - - #clock-cells = <1>; - #phy-cells = <1>; - }; - - usb_2_qmpphy: phy@88eb000 { - compatible = "qcom,sdm845-qmp-usb3-uni-phy"; - reg = <0 0x088eb000 0 0x18c>; - status = "disabled"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, - <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, - <&gcc GCC_USB3_SEC_CLKREF_CLK>, - <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; - clock-names = "aux", "cfg_ahb", "ref", "com_aux"; - - resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, - <&gcc GCC_USB3_PHY_SEC_BCR>; - reset-names = "phy", "common"; - - usb_2_ssphy: phy@88eb200 { - reg = <0 0x088eb200 0 0x128>, - <0 0x088eb400 0 0x1fc>, - <0 0x088eb800 0 0x218>, - <0 0x088eb600 0 0x70>; - #clock-cells = <0>; - #phy-cells = <0>; - clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; - clock-names = "pipe0"; - clock-output-names = "usb3_uni_phy_pipe_clk_src"; - }; - }; - - usb_1: usb@a6f8800 { - compatible = "qcom,sdm845-dwc3", "qcom,dwc3"; - reg = <0 0x0a6f8800 0 0x400>; - status = "disabled"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - dma-ranges; - - clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MASTER_CLK>, - <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_SLEEP_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; - clock-names = "cfg_noc", - "core", - "iface", - "sleep", - "mock_utmi"; - - assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_PRIM_MASTER_CLK>; - assigned-clock-rates = <19200000>, <150000000>; - - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "hs_phy_irq", "ss_phy_irq", - "dm_hs_phy_irq", "dp_hs_phy_irq"; - - power-domains = <&gcc USB30_PRIM_GDSC>; - - resets = <&gcc GCC_USB30_PRIM_BCR>; - - interconnects = <&aggre2_noc MASTER_USB3_0 0 &mem_noc SLAVE_EBI1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>; - interconnect-names = "usb-ddr", "apps-usb"; - - usb_1_dwc3: usb@a600000 { - compatible = "snps,dwc3"; - reg = <0 0x0a600000 0 0xcd00>; - interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - iommus = <&apps_smmu 0x740 0>; - snps,dis_u2_susphy_quirk; - snps,dis_enblslpm_quirk; - phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; - phy-names = "usb2-phy", "usb3-phy"; - }; - }; - - usb_2: usb@a8f8800 { - compatible = "qcom,sdm845-dwc3", "qcom,dwc3"; - reg = <0 0x0a8f8800 0 0x400>; - status = "disabled"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - dma-ranges; - - clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, - <&gcc GCC_USB30_SEC_MASTER_CLK>, - <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, - <&gcc GCC_USB30_SEC_SLEEP_CLK>, - <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>; - clock-names = "cfg_noc", - "core", - "iface", - "sleep", - "mock_utmi"; - - assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_SEC_MASTER_CLK>; - assigned-clock-rates = <19200000>, <150000000>; - - interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 490 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 491 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "hs_phy_irq", "ss_phy_irq", - "dm_hs_phy_irq", "dp_hs_phy_irq"; - - power-domains = <&gcc USB30_SEC_GDSC>; - - resets = <&gcc GCC_USB30_SEC_BCR>; - - interconnects = <&aggre2_noc MASTER_USB3_1 0 &mem_noc SLAVE_EBI1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>; - interconnect-names = "usb-ddr", "apps-usb"; - - usb_2_dwc3: usb@a800000 { - compatible = "snps,dwc3"; - reg = <0 0x0a800000 0 0xcd00>; - interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; - iommus = <&apps_smmu 0x760 0>; - snps,dis_u2_susphy_quirk; - snps,dis_enblslpm_quirk; - phys = <&usb_2_hsphy>, <&usb_2_ssphy>; - phy-names = "usb2-phy", "usb3-phy"; - }; - }; - - venus: video-codec@aa00000 { - compatible = "qcom,sdm845-venus-v2"; - reg = <0 0x0aa00000 0 0xff000>; - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&videocc VENUS_GDSC>, - <&videocc VCODEC0_GDSC>, - <&videocc VCODEC1_GDSC>, - <&rpmhpd SDM845_CX>; - power-domain-names = "venus", "vcodec0", "vcodec1", "cx"; - operating-points-v2 = <&venus_opp_table>; - clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, - <&videocc VIDEO_CC_VENUS_AHB_CLK>, - <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>, - <&videocc VIDEO_CC_VCODEC0_CORE_CLK>, - <&videocc VIDEO_CC_VCODEC0_AXI_CLK>, - <&videocc VIDEO_CC_VCODEC1_CORE_CLK>, - <&videocc VIDEO_CC_VCODEC1_AXI_CLK>; - clock-names = "core", "iface", "bus", - "vcodec0_core", "vcodec0_bus", - "vcodec1_core", "vcodec1_bus"; - iommus = <&apps_smmu 0x10a0 0x8>, - <&apps_smmu 0x10b0 0x0>; - memory-region = <&venus_mem>; - interconnects = <&mmss_noc MASTER_VIDEO_P0 0 &mem_noc SLAVE_EBI1 0>, - <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_VENUS_CFG 0>; - interconnect-names = "video-mem", "cpu-cfg"; - - status = "disabled"; - - video-core0 { - compatible = "venus-decoder"; - }; - - video-core1 { - compatible = "venus-encoder"; - }; - - venus_opp_table: opp-table { - compatible = "operating-points-v2"; - - opp-100000000 { - opp-hz = /bits/ 64 <100000000>; - required-opps = <&rpmhpd_opp_min_svs>; - }; - - opp-200000000 { - opp-hz = /bits/ 64 <200000000>; - required-opps = <&rpmhpd_opp_low_svs>; - }; - - opp-320000000 { - opp-hz = /bits/ 64 <320000000>; - required-opps = <&rpmhpd_opp_svs>; - }; - - opp-380000000 { - opp-hz = /bits/ 64 <380000000>; - required-opps = <&rpmhpd_opp_svs_l1>; - }; - - opp-444000000 { - opp-hz = /bits/ 64 <444000000>; - required-opps = <&rpmhpd_opp_nom>; - }; - - opp-533000097 { - opp-hz = /bits/ 64 <533000097>; - required-opps = <&rpmhpd_opp_turbo>; - }; - }; - }; - - videocc: clock-controller@ab00000 { - compatible = "qcom,sdm845-videocc"; - reg = <0 0x0ab00000 0 0x10000>; - clocks = <&rpmhcc RPMH_CXO_CLK>; - clock-names = "bi_tcxo"; - #clock-cells = <1>; - #power-domain-cells = <1>; - #reset-cells = <1>; - }; - - camss: camss@acb3000 { - compatible = "qcom,sdm845-camss"; - - reg = <0 0x0acb3000 0 0x1000>, - <0 0x0acba000 0 0x1000>, - <0 0x0acc8000 0 0x1000>, - <0 0x0ac65000 0 0x1000>, - <0 0x0ac66000 0 0x1000>, - <0 0x0ac67000 0 0x1000>, - <0 0x0ac68000 0 0x1000>, - <0 0x0acaf000 0 0x4000>, - <0 0x0acb6000 0 0x4000>, - <0 0x0acc4000 0 0x4000>; - reg-names = "csid0", - "csid1", - "csid2", - "csiphy0", - "csiphy1", - "csiphy2", - "csiphy3", - "vfe0", - "vfe1", - "vfe_lite"; - - interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "csid0", - "csid1", - "csid2", - "csiphy0", - "csiphy1", - "csiphy2", - "csiphy3", - "vfe0", - "vfe1", - "vfe_lite"; - - power-domains = <&clock_camcc IFE_0_GDSC>, - <&clock_camcc IFE_1_GDSC>, - <&clock_camcc TITAN_TOP_GDSC>; - - clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, - <&clock_camcc CAM_CC_CPAS_AHB_CLK>, - <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, - <&clock_camcc CAM_CC_IFE_0_CSID_CLK>, - <&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>, - <&clock_camcc CAM_CC_IFE_1_CSID_CLK>, - <&clock_camcc CAM_CC_IFE_1_CSID_CLK_SRC>, - <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>, - <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, - <&clock_camcc CAM_CC_CSIPHY0_CLK>, - <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>, - <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, - <&clock_camcc CAM_CC_CSIPHY1_CLK>, - <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK>, - <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, - <&clock_camcc CAM_CC_CSIPHY2_CLK>, - <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK>, - <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>, - <&clock_camcc CAM_CC_CSIPHY3_CLK>, - <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK>, - <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, - <&gcc GCC_CAMERA_AHB_CLK>, - <&gcc GCC_CAMERA_AXI_CLK>, - <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, - <&clock_camcc CAM_CC_SOC_AHB_CLK>, - <&clock_camcc CAM_CC_IFE_0_AXI_CLK>, - <&clock_camcc CAM_CC_IFE_0_CLK>, - <&clock_camcc CAM_CC_IFE_0_CPHY_RX_CLK>, - <&clock_camcc CAM_CC_IFE_0_CLK_SRC>, - <&clock_camcc CAM_CC_IFE_1_AXI_CLK>, - <&clock_camcc CAM_CC_IFE_1_CLK>, - <&clock_camcc CAM_CC_IFE_1_CPHY_RX_CLK>, - <&clock_camcc CAM_CC_IFE_1_CLK_SRC>, - <&clock_camcc CAM_CC_IFE_LITE_CLK>, - <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, - <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>; - clock-names = "camnoc_axi", - "cpas_ahb", - "cphy_rx_src", - "csi0", - "csi0_src", - "csi1", - "csi1_src", - "csi2", - "csi2_src", - "csiphy0", - "csiphy0_timer", - "csiphy0_timer_src", - "csiphy1", - "csiphy1_timer", - "csiphy1_timer_src", - "csiphy2", - "csiphy2_timer", - "csiphy2_timer_src", - "csiphy3", - "csiphy3_timer", - "csiphy3_timer_src", - "gcc_camera_ahb", - "gcc_camera_axi", - "slow_ahb_src", - "soc_ahb", - "vfe0_axi", - "vfe0", - "vfe0_cphy_rx", - "vfe0_src", - "vfe1_axi", - "vfe1", - "vfe1_cphy_rx", - "vfe1_src", - "vfe_lite", - "vfe_lite_cphy_rx", - "vfe_lite_src"; - - iommus = <&apps_smmu 0x0808 0x0>, - <&apps_smmu 0x0810 0x8>, - <&apps_smmu 0x0c08 0x0>, - <&apps_smmu 0x0c10 0x8>; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - reg = <1>; - }; - - port@2 { - reg = <2>; - }; - - port@3 { - reg = <3>; - }; - }; - }; - - cci: cci@ac4a000 { - compatible = "qcom,sdm845-cci", "qcom,msm8996-cci"; - #address-cells = <1>; - #size-cells = <0>; - - reg = <0 0x0ac4a000 0 0x4000>; - interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>; - power-domains = <&clock_camcc TITAN_TOP_GDSC>; - - clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, - <&clock_camcc CAM_CC_SOC_AHB_CLK>, - <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, - <&clock_camcc CAM_CC_CPAS_AHB_CLK>, - <&clock_camcc CAM_CC_CCI_CLK>, - <&clock_camcc CAM_CC_CCI_CLK_SRC>; - clock-names = "camnoc_axi", - "soc_ahb", - "slow_ahb_src", - "cpas_ahb", - "cci", - "cci_src"; - - assigned-clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, - <&clock_camcc CAM_CC_CCI_CLK>; - assigned-clock-rates = <80000000>, <37500000>; - - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&cci0_default &cci1_default>; - pinctrl-1 = <&cci0_sleep &cci1_sleep>; - - status = "disabled"; - - cci_i2c0: i2c-bus@0 { - reg = <0>; - clock-frequency = <1000000>; - #address-cells = <1>; - #size-cells = <0>; - }; - - cci_i2c1: i2c-bus@1 { - reg = <1>; - clock-frequency = <1000000>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - clock_camcc: clock-controller@ad00000 { - compatible = "qcom,sdm845-camcc"; - reg = <0 0x0ad00000 0 0x10000>; - #clock-cells = <1>; - #reset-cells = <1>; - #power-domain-cells = <1>; - clocks = <&rpmhcc RPMH_CXO_CLK>; - clock-names = "bi_tcxo"; - }; - - mdss: display-subsystem@ae00000 { - compatible = "qcom,sdm845-mdss"; - reg = <0 0x0ae00000 0 0x1000>; - reg-names = "mdss"; - - power-domains = <&dispcc MDSS_GDSC>; - - clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, - <&dispcc DISP_CC_MDSS_MDP_CLK>; - clock-names = "iface", "core"; - - interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; - interrupt-controller; - #interrupt-cells = <1>; - - interconnects = <&mmss_noc MASTER_MDP0 0 &mem_noc SLAVE_EBI1 0>, - <&mmss_noc MASTER_MDP1 0 &mem_noc SLAVE_EBI1 0>; - interconnect-names = "mdp0-mem", "mdp1-mem"; - - iommus = <&apps_smmu 0x880 0x8>, - <&apps_smmu 0xc80 0x8>; - - status = "disabled"; - - #address-cells = <2>; - #size-cells = <2>; - ranges; - - mdss_mdp: display-controller@ae01000 { - compatible = "qcom,sdm845-dpu"; - reg = <0 0x0ae01000 0 0x8f000>, - <0 0x0aeb0000 0 0x2008>; - reg-names = "mdp", "vbif"; - - clocks = <&gcc GCC_DISP_AXI_CLK>, - <&dispcc DISP_CC_MDSS_AHB_CLK>, - <&dispcc DISP_CC_MDSS_AXI_CLK>, - <&dispcc DISP_CC_MDSS_MDP_CLK>, - <&dispcc DISP_CC_MDSS_VSYNC_CLK>; - clock-names = "gcc-bus", "iface", "bus", "core", "vsync"; - - assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; - assigned-clock-rates = <19200000>; - operating-points-v2 = <&mdp_opp_table>; - power-domains = <&rpmhpd SDM845_CX>; - - interrupt-parent = <&mdss>; - interrupts = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - dpu_intf0_out: endpoint { - remote-endpoint = <&dp_in>; - }; - }; - - port@1 { - reg = <1>; - dpu_intf1_out: endpoint { - remote-endpoint = <&mdss_dsi0_in>; - }; - }; - - port@2 { - reg = <2>; - dpu_intf2_out: endpoint { - remote-endpoint = <&mdss_dsi1_in>; - }; - }; - }; - - mdp_opp_table: opp-table { - compatible = "operating-points-v2"; - - opp-19200000 { - opp-hz = /bits/ 64 <19200000>; - required-opps = <&rpmhpd_opp_min_svs>; - }; - - opp-171428571 { - opp-hz = /bits/ 64 <171428571>; - required-opps = <&rpmhpd_opp_low_svs>; - }; - - opp-344000000 { - opp-hz = /bits/ 64 <344000000>; - required-opps = <&rpmhpd_opp_svs_l1>; - }; - - opp-430000000 { - opp-hz = /bits/ 64 <430000000>; - required-opps = <&rpmhpd_opp_nom>; - }; - }; - }; - - mdss_dp: displayport-controller@ae90000 { - status = "disabled"; - compatible = "qcom,sdm845-dp"; - - reg = <0 0x0ae90000 0 0x200>, - <0 0x0ae90200 0 0x200>, - <0 0x0ae90400 0 0x600>, - <0 0x0ae90a00 0 0x600>, - <0 0x0ae91000 0 0x600>; - - interrupt-parent = <&mdss>; - interrupts = <12>; - - clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, - <&dispcc DISP_CC_MDSS_DP_AUX_CLK>, - <&dispcc DISP_CC_MDSS_DP_LINK_CLK>, - <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>, - <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>; - clock-names = "core_iface", "core_aux", "ctrl_link", - "ctrl_link_iface", "stream_pixel"; - assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>, - <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>; - assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, - <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; - phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>; - phy-names = "dp"; - - operating-points-v2 = <&dp_opp_table>; - power-domains = <&rpmhpd SDM845_CX>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - dp_in: endpoint { - remote-endpoint = <&dpu_intf0_out>; - }; - }; - - port@1 { - reg = <1>; - dp_out: endpoint { }; - }; - }; - - dp_opp_table: opp-table { - compatible = "operating-points-v2"; - - opp-162000000 { - opp-hz = /bits/ 64 <162000000>; - required-opps = <&rpmhpd_opp_low_svs>; - }; - - opp-270000000 { - opp-hz = /bits/ 64 <270000000>; - required-opps = <&rpmhpd_opp_svs>; - }; - - opp-540000000 { - opp-hz = /bits/ 64 <540000000>; - required-opps = <&rpmhpd_opp_svs_l1>; - }; - - opp-810000000 { - opp-hz = /bits/ 64 <810000000>; - required-opps = <&rpmhpd_opp_nom>; - }; - }; - }; - - mdss_dsi0: dsi@ae94000 { - compatible = "qcom,sdm845-dsi-ctrl", - "qcom,mdss-dsi-ctrl"; - reg = <0 0x0ae94000 0 0x400>; - reg-names = "dsi_ctrl"; - - interrupt-parent = <&mdss>; - interrupts = <4>; - - clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, - <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, - <&dispcc DISP_CC_MDSS_PCLK0_CLK>, - <&dispcc DISP_CC_MDSS_ESC0_CLK>, - <&dispcc DISP_CC_MDSS_AHB_CLK>, - <&dispcc DISP_CC_MDSS_AXI_CLK>; - clock-names = "byte", - "byte_intf", - "pixel", - "core", - "iface", - "bus"; - assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; - assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>; - - operating-points-v2 = <&dsi_opp_table>; - power-domains = <&rpmhpd SDM845_CX>; - - phys = <&mdss_dsi0_phy>; - - status = "disabled"; - - #address-cells = <1>; - #size-cells = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - mdss_dsi0_in: endpoint { - remote-endpoint = <&dpu_intf1_out>; - }; - }; - - port@1 { - reg = <1>; - mdss_dsi0_out: endpoint { - }; - }; - }; - }; - - mdss_dsi0_phy: phy@ae94400 { - compatible = "qcom,dsi-phy-10nm"; - reg = <0 0x0ae94400 0 0x200>, - <0 0x0ae94600 0 0x280>, - <0 0x0ae94a00 0 0x1e0>; - reg-names = "dsi_phy", - "dsi_phy_lane", - "dsi_pll"; - - #clock-cells = <1>; - #phy-cells = <0>; - - clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, - <&rpmhcc RPMH_CXO_CLK>; - clock-names = "iface", "ref"; - - status = "disabled"; - }; - - mdss_dsi1: dsi@ae96000 { - compatible = "qcom,sdm845-dsi-ctrl", - "qcom,mdss-dsi-ctrl"; - reg = <0 0x0ae96000 0 0x400>; - reg-names = "dsi_ctrl"; - - interrupt-parent = <&mdss>; - interrupts = <5>; - - clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, - <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, - <&dispcc DISP_CC_MDSS_PCLK1_CLK>, - <&dispcc DISP_CC_MDSS_ESC1_CLK>, - <&dispcc DISP_CC_MDSS_AHB_CLK>, - <&dispcc DISP_CC_MDSS_AXI_CLK>; - clock-names = "byte", - "byte_intf", - "pixel", - "core", - "iface", - "bus"; - assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>; - assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>; - - operating-points-v2 = <&dsi_opp_table>; - power-domains = <&rpmhpd SDM845_CX>; - - phys = <&mdss_dsi1_phy>; - - status = "disabled"; - - #address-cells = <1>; - #size-cells = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - mdss_dsi1_in: endpoint { - remote-endpoint = <&dpu_intf2_out>; - }; - }; - - port@1 { - reg = <1>; - mdss_dsi1_out: endpoint { - }; - }; - }; - }; - - mdss_dsi1_phy: phy@ae96400 { - compatible = "qcom,dsi-phy-10nm"; - reg = <0 0x0ae96400 0 0x200>, - <0 0x0ae96600 0 0x280>, - <0 0x0ae96a00 0 0x10e>; - reg-names = "dsi_phy", - "dsi_phy_lane", - "dsi_pll"; - - #clock-cells = <1>; - #phy-cells = <0>; - - clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, - <&rpmhcc RPMH_CXO_CLK>; - clock-names = "iface", "ref"; - - status = "disabled"; - }; - }; - - gpu: gpu@5000000 { - compatible = "qcom,adreno-630.2", "qcom,adreno"; - - reg = <0 0x05000000 0 0x40000>, <0 0x509e000 0 0x10>; - reg-names = "kgsl_3d0_reg_memory", "cx_mem"; - - /* - * Look ma, no clocks! The GPU clocks and power are - * controlled entirely by the GMU - */ - - interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>; - - iommus = <&adreno_smmu 0>; - - operating-points-v2 = <&gpu_opp_table>; - - qcom,gmu = <&gmu>; - - interconnects = <&mem_noc MASTER_GFX3D 0 &mem_noc SLAVE_EBI1 0>; - interconnect-names = "gfx-mem"; - - status = "disabled"; - - gpu_opp_table: opp-table { - compatible = "operating-points-v2"; - - opp-710000000 { - opp-hz = /bits/ 64 <710000000>; - opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; - opp-peak-kBps = <7216000>; - }; - - opp-675000000 { - opp-hz = /bits/ 64 <675000000>; - opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; - opp-peak-kBps = <7216000>; - }; - - opp-596000000 { - opp-hz = /bits/ 64 <596000000>; - opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; - opp-peak-kBps = <6220000>; - }; - - opp-520000000 { - opp-hz = /bits/ 64 <520000000>; - opp-level = <RPMH_REGULATOR_LEVEL_NOM>; - opp-peak-kBps = <6220000>; - }; - - opp-414000000 { - opp-hz = /bits/ 64 <414000000>; - opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; - opp-peak-kBps = <4068000>; - }; - - opp-342000000 { - opp-hz = /bits/ 64 <342000000>; - opp-level = <RPMH_REGULATOR_LEVEL_SVS>; - opp-peak-kBps = <2724000>; - }; - - opp-257000000 { - opp-hz = /bits/ 64 <257000000>; - opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; - opp-peak-kBps = <1648000>; - }; - }; - }; - - adreno_smmu: iommu@5040000 { - compatible = "qcom,sdm845-smmu-v2", "qcom,adreno-smmu", "qcom,smmu-v2"; - reg = <0 0x05040000 0 0x10000>; - #iommu-cells = <1>; - #global-interrupts = <2>; - interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 364 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 365 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 366 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 367 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 368 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 369 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 370 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 371 IRQ_TYPE_EDGE_RISING>; - clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>, - <&gcc GCC_GPU_CFG_AHB_CLK>; - clock-names = "bus", "iface"; - - power-domains = <&gpucc GPU_CX_GDSC>; - }; - - gmu: gmu@506a000 { - compatible = "qcom,adreno-gmu-630.2", "qcom,adreno-gmu"; - - reg = <0 0x0506a000 0 0x30000>, - <0 0x0b280000 0 0x10000>, - <0 0x0b480000 0 0x10000>; - reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq"; - - interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "hfi", "gmu"; - - clocks = <&gpucc GPU_CC_CX_GMU_CLK>, - <&gpucc GPU_CC_CXO_CLK>, - <&gcc GCC_DDRSS_GPU_AXI_CLK>, - <&gcc GCC_GPU_MEMNOC_GFX_CLK>; - clock-names = "gmu", "cxo", "axi", "memnoc"; - - power-domains = <&gpucc GPU_CX_GDSC>, - <&gpucc GPU_GX_GDSC>; - power-domain-names = "cx", "gx"; - - iommus = <&adreno_smmu 5>; - - operating-points-v2 = <&gmu_opp_table>; - - status = "disabled"; - - gmu_opp_table: opp-table { - compatible = "operating-points-v2"; - - opp-400000000 { - opp-hz = /bits/ 64 <400000000>; - opp-level = <RPMH_REGULATOR_LEVEL_SVS>; - }; - - opp-200000000 { - opp-hz = /bits/ 64 <200000000>; - opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; - }; - }; - }; - - dispcc: clock-controller@af00000 { - compatible = "qcom,sdm845-dispcc"; - reg = <0 0x0af00000 0 0x10000>; - clocks = <&rpmhcc RPMH_CXO_CLK>, - <&gcc GCC_DISP_GPLL0_CLK_SRC>, - <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>, - <&mdss_dsi0_phy 0>, - <&mdss_dsi0_phy 1>, - <&mdss_dsi1_phy 0>, - <&mdss_dsi1_phy 1>, - <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, - <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; - clock-names = "bi_tcxo", - "gcc_disp_gpll0_clk_src", - "gcc_disp_gpll0_div_clk_src", - "dsi0_phy_pll_out_byteclk", - "dsi0_phy_pll_out_dsiclk", - "dsi1_phy_pll_out_byteclk", - "dsi1_phy_pll_out_dsiclk", - "dp_link_clk_divsel_ten", - "dp_vco_divided_clk_src_mux"; - #clock-cells = <1>; - #reset-cells = <1>; - #power-domain-cells = <1>; - }; - - pdc_intc: interrupt-controller@b220000 { - compatible = "qcom,sdm845-pdc", "qcom,pdc"; - reg = <0 0x0b220000 0 0x30000>; - qcom,pdc-ranges = <0 480 94>, <94 609 15>, <115 630 7>; - #interrupt-cells = <2>; - interrupt-parent = <&intc>; - interrupt-controller; - }; - - pdc_reset: reset-controller@b2e0000 { - compatible = "qcom,sdm845-pdc-global"; - reg = <0 0x0b2e0000 0 0x20000>; - #reset-cells = <1>; - }; - - tsens0: thermal-sensor@c263000 { - compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; - reg = <0 0x0c263000 0 0x1ff>, /* TM */ - <0 0x0c222000 0 0x1ff>; /* SROT */ - #qcom,sensors = <13>; - interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "uplow", "critical"; - #thermal-sensor-cells = <1>; - }; - - tsens1: thermal-sensor@c265000 { - compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; - reg = <0 0x0c265000 0 0x1ff>, /* TM */ - <0 0x0c223000 0 0x1ff>; /* SROT */ - #qcom,sensors = <8>; - interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "uplow", "critical"; - #thermal-sensor-cells = <1>; - }; - - aoss_reset: reset-controller@c2a0000 { - compatible = "qcom,sdm845-aoss-cc"; - reg = <0 0x0c2a0000 0 0x31000>; - #reset-cells = <1>; - }; - - aoss_qmp: power-management@c300000 { - compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp"; - reg = <0 0x0c300000 0 0x400>; - interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>; - mboxes = <&apss_shared 0>; - - #clock-cells = <0>; - - cx_cdev: cx { - #cooling-cells = <2>; - }; - - ebi_cdev: ebi { - #cooling-cells = <2>; - }; - }; - - sram@c3f0000 { - compatible = "qcom,sdm845-rpmh-stats"; - reg = <0 0x0c3f0000 0 0x400>; - }; - - spmi_bus: spmi@c440000 { - compatible = "qcom,spmi-pmic-arb"; - reg = <0 0x0c440000 0 0x1100>, - <0 0x0c600000 0 0x2000000>, - <0 0x0e600000 0 0x100000>, - <0 0x0e700000 0 0xa0000>, - <0 0x0c40a000 0 0x26000>; - reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; - interrupt-names = "periph_irq"; - interrupts = <GIC_SPI 481 IRQ_TYPE_LEVEL_HIGH>; - qcom,ee = <0>; - qcom,channel = <0>; - #address-cells = <2>; - #size-cells = <0>; - interrupt-controller; - #interrupt-cells = <4>; - }; - - sram@146bf000 { - compatible = "qcom,sdm845-imem", "syscon", "simple-mfd"; - reg = <0 0x146bf000 0 0x1000>; - - #address-cells = <1>; - #size-cells = <1>; - - ranges = <0 0 0x146bf000 0x1000>; - - pil-reloc@94c { - compatible = "qcom,pil-reloc-info"; - reg = <0x94c 0xc8>; - }; - }; - - apps_smmu: iommu@15000000 { - compatible = "qcom,sdm845-smmu-500", "arm,mmu-500"; - reg = <0 0x15000000 0 0x80000>; - #iommu-cells = <2>; - #global-interrupts = <1>; - interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>; - }; - - lpasscc: clock-controller@17014000 { - compatible = "qcom,sdm845-lpasscc"; - reg = <0 0x17014000 0 0x1f004>, <0 0x17300000 0 0x200>; - reg-names = "cc", "qdsp6ss"; - #clock-cells = <1>; - status = "disabled"; - }; - - gladiator_noc: interconnect@17900000 { - compatible = "qcom,sdm845-gladiator-noc"; - reg = <0 0x17900000 0 0xd080>; - #interconnect-cells = <2>; - qcom,bcm-voters = <&apps_bcm_voter>; - }; - - watchdog@17980000 { - compatible = "qcom,apss-wdt-sdm845", "qcom,kpss-wdt"; - reg = <0 0x17980000 0 0x1000>; - clocks = <&sleep_clk>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; - }; - - apss_shared: mailbox@17990000 { - compatible = "qcom,sdm845-apss-shared"; - reg = <0 0x17990000 0 0x1000>; - #mbox-cells = <1>; - }; - - apps_rsc: rsc@179c0000 { - label = "apps_rsc"; - compatible = "qcom,rpmh-rsc"; - reg = <0 0x179c0000 0 0x10000>, - <0 0x179d0000 0 0x10000>, - <0 0x179e0000 0 0x10000>; - reg-names = "drv-0", "drv-1", "drv-2"; - interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - qcom,tcs-offset = <0xd00>; - qcom,drv-id = <2>; - qcom,tcs-config = <ACTIVE_TCS 2>, - <SLEEP_TCS 3>, - <WAKE_TCS 3>, - <CONTROL_TCS 1>; - power-domains = <&CLUSTER_PD>; - - apps_bcm_voter: bcm-voter { - compatible = "qcom,bcm-voter"; - }; - - rpmhcc: clock-controller { - compatible = "qcom,sdm845-rpmh-clk"; - #clock-cells = <1>; - clock-names = "xo"; - clocks = <&xo_board>; - }; - - rpmhpd: power-controller { - compatible = "qcom,sdm845-rpmhpd"; - #power-domain-cells = <1>; - operating-points-v2 = <&rpmhpd_opp_table>; - - rpmhpd_opp_table: opp-table { - compatible = "operating-points-v2"; - - rpmhpd_opp_ret: opp1 { - opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; - }; - - rpmhpd_opp_min_svs: opp2 { - opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; - }; - - rpmhpd_opp_low_svs: opp3 { - opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; - }; - - rpmhpd_opp_svs: opp4 { - opp-level = <RPMH_REGULATOR_LEVEL_SVS>; - }; - - rpmhpd_opp_svs_l1: opp5 { - opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; - }; - - rpmhpd_opp_nom: opp6 { - opp-level = <RPMH_REGULATOR_LEVEL_NOM>; - }; - - rpmhpd_opp_nom_l1: opp7 { - opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; - }; - - rpmhpd_opp_nom_l2: opp8 { - opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; - }; - - rpmhpd_opp_turbo: opp9 { - opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; - }; - - rpmhpd_opp_turbo_l1: opp10 { - opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; - }; - }; - }; - }; - - intc: interrupt-controller@17a00000 { - compatible = "arm,gic-v3"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0 0x17a00000 0 0x10000>, /* GICD */ - <0 0x17a60000 0 0x100000>; /* GICR * 8 */ - interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; - - msi-controller@17a40000 { - compatible = "arm,gic-v3-its"; - msi-controller; - #msi-cells = <1>; - reg = <0 0x17a40000 0 0x20000>; - status = "disabled"; - }; - }; - - slimbam: dma-controller@17184000 { - compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; - qcom,controlled-remotely; - reg = <0 0x17184000 0 0x2a000>; - num-channels = <31>; - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; - #dma-cells = <1>; - qcom,ee = <1>; - qcom,num-ees = <2>; - iommus = <&apps_smmu 0x1806 0x0>; - }; - - timer@17c90000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0 0x20000000>; - compatible = "arm,armv7-timer-mem"; - reg = <0 0x17c90000 0 0x1000>; - - frame@17ca0000 { - frame-number = <0>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x17ca0000 0x1000>, - <0x17cb0000 0x1000>; - }; - - frame@17cc0000 { - frame-number = <1>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x17cc0000 0x1000>; - status = "disabled"; - }; - - frame@17cd0000 { - frame-number = <2>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x17cd0000 0x1000>; - status = "disabled"; - }; - - frame@17ce0000 { - frame-number = <3>; - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x17ce0000 0x1000>; - status = "disabled"; - }; - - frame@17cf0000 { - frame-number = <4>; - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x17cf0000 0x1000>; - status = "disabled"; - }; - - frame@17d00000 { - frame-number = <5>; - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x17d00000 0x1000>; - status = "disabled"; - }; - - frame@17d10000 { - frame-number = <6>; - interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x17d10000 0x1000>; - status = "disabled"; - }; - }; - - osm_l3: interconnect@17d41000 { - compatible = "qcom,sdm845-osm-l3", "qcom,osm-l3"; - reg = <0 0x17d41000 0 0x1400>; - - clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; - clock-names = "xo", "alternate"; - - #interconnect-cells = <1>; - }; - - cpufreq_hw: cpufreq@17d43000 { - compatible = "qcom,sdm845-cpufreq-hw", "qcom,cpufreq-hw"; - reg = <0 0x17d43000 0 0x1400>, <0 0x17d45800 0 0x1400>; - reg-names = "freq-domain0", "freq-domain1"; - - interrupts-extended = <&lmh_cluster0 0>, <&lmh_cluster1 0>; - - clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; - clock-names = "xo", "alternate"; - - #freq-domain-cells = <1>; - #clock-cells = <1>; - }; - - wifi: wifi@18800000 { - compatible = "qcom,wcn3990-wifi"; - status = "disabled"; - reg = <0 0x18800000 0 0x800000>; - reg-names = "membase"; - memory-region = <&wlan_msa_mem>; - clock-names = "cxo_ref_clk_pin"; - clocks = <&rpmhcc RPMH_RF_CLK2>; - interrupts = - <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>; - iommus = <&apps_smmu 0x0040 0x1>; - }; - }; - - sound: sound { - }; - - thermal-zones { - cpu0-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 1>; - - trips { - cpu0_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu0_alert1: trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu0_crit: cpu-crit { - temperature = <110000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - cpu1-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 2>; - - trips { - cpu1_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu1_alert1: trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu1_crit: cpu-crit { - temperature = <110000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - cpu2-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 3>; - - trips { - cpu2_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu2_alert1: trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu2_crit: cpu-crit { - temperature = <110000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - cpu3-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 4>; - - trips { - cpu3_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu3_alert1: trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu3_crit: cpu-crit { - temperature = <110000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - cpu4-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 7>; - - trips { - cpu4_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu4_alert1: trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu4_crit: cpu-crit { - temperature = <110000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - cpu5-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 8>; - - trips { - cpu5_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu5_alert1: trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu5_crit: cpu-crit { - temperature = <110000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - cpu6-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 9>; - - trips { - cpu6_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu6_alert1: trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu6_crit: cpu-crit { - temperature = <110000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - cpu7-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 10>; - - trips { - cpu7_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu7_alert1: trip-point1 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu7_crit: cpu-crit { - temperature = <110000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - aoss0-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 0>; - - trips { - aoss0_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - cluster0-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 5>; - - trips { - cluster0_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - cluster0_crit: cluster0_crit { - temperature = <110000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - }; - - cluster1-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 6>; - - trips { - cluster1_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - cluster1_crit: cluster1_crit { - temperature = <110000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - }; - - gpu-top-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 11>; - - trips { - gpu1_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - gpu-bottom-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 12>; - - trips { - gpu2_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - aoss1-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens1 0>; - - trips { - aoss1_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - q6-modem-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens1 1>; - - trips { - q6_modem_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - mem-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens1 2>; - - trips { - mem_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - wlan-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens1 3>; - - trips { - wlan_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - q6-hvx-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens1 4>; - - trips { - q6_hvx_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - camera-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens1 5>; - - trips { - camera_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - video-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens1 6>; - - trips { - video_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - - modem-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens1 7>; - - trips { - modem_alert0: trip-point0 { - temperature = <90000>; - hysteresis = <2000>; - type = "hot"; - }; - }; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>, - <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>, - <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>, - <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>; - }; -}; diff --git a/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi b/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi index ba0c02489d1..f004e9840a2 100644 --- a/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi +++ b/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi @@ -16,11 +16,26 @@ u-boot,mmc-env-partition = "u-boot-env"; }; + gpio-keys { + button-user-1 { + label = "User-1"; + linux,code = <BTN_2>; + gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; + + button-user { + /* update label to match the label requested in board_key_check() */ + label = "User-2"; + }; + }; + leds { + led-blue { + /delete-property/default-state; + }; + led-red { - color = <LED_COLOR_ID_RED>; gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; - default-state = "off"; }; }; }; diff --git a/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi index 20728f27ee1..a5158fec7ef 100644 --- a/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi @@ -3,6 +3,7 @@ * Copyright : STMicroelectronics 2022 */ +#include <dt-bindings/input/linux-event-codes.h> #include "stm32mp15-scmi-u-boot.dtsi" / { @@ -12,20 +13,35 @@ }; config { - u-boot,boot-led = "heartbeat"; - u-boot,error-led = "error"; + u-boot,boot-led = "led-blue"; + u-boot,error-led = "led-red"; u-boot,mmc-env-partition = "u-boot-env"; st,adc_usb_pd = <&adc1 18>, <&adc1 19>; - st,fastboot-gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; - st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + button-user-1 { + label = "User-1"; + linux,code = <BTN_1>; + gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; + + button-user-2 { + label = "User-2"; + linux,code = <BTN_2>; + gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; }; led { - red { - label = "error"; + led-blue { + /delete-property/label; + }; + + led-red { gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; - default-state = "off"; - status = "okay"; }; }; }; diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi index a16358266a2..f97debaa0e4 100644 --- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi @@ -4,6 +4,7 @@ */ #include <dt-bindings/clock/stm32mp1-clksrc.h> +#include <dt-bindings/input/linux-event-codes.h> #include "stm32mp15-u-boot.dtsi" #include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi" @@ -14,12 +15,10 @@ }; config { - u-boot,boot-led = "heartbeat"; - u-boot,error-led = "error"; + u-boot,boot-led = "led-blue"; + u-boot,error-led = "led-red"; u-boot,mmc-env-partition = "fip"; st,adc_usb_pd = <&adc1 18>, <&adc1 19>; - st,fastboot-gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; - st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; }; #if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL) @@ -48,12 +47,29 @@ }; #endif + gpio-keys { + compatible = "gpio-keys"; + + button-user-1 { + label = "User-1"; + linux,code = <BTN_1>; + gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; + + button-user-2 { + label = "User-2"; + linux,code = <BTN_2>; + gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; + }; + led { - red { - label = "error"; + led-blue { + /delete-property/label; + }; + + led-red { gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; - default-state = "off"; - status = "okay"; }; }; }; diff --git a/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi index 4d763bd3a2c..7c0d1bab11a 100644 --- a/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi @@ -3,6 +3,7 @@ * Copyright : STMicroelectronics 2022 */ +#include <dt-bindings/input/linux-event-codes.h> #include "stm32mp15-scmi-u-boot.dtsi" / { @@ -11,19 +12,36 @@ }; config { - u-boot,boot-led = "heartbeat"; - u-boot,error-led = "error"; + u-boot,boot-led = "led-blue"; + u-boot,error-led = "led-red"; u-boot,mmc-env-partition = "u-boot-env"; - st,fastboot-gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; - st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + button-user-1 { + label = "User-1"; + linux,code = <BTN_1>; + gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; + + button-user-2 { + label = "User-2"; + linux,code = <BTN_2>; + gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; }; led { - red { - label = "error"; + compatible = "gpio-leds"; + + led-blue { + gpios = <&gpiod 9 GPIO_ACTIVE_HIGH>; + }; + + led-red { gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; - default-state = "off"; - status = "okay"; }; }; }; diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi index ef91088aa37..d93359f967c 100644 --- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi @@ -4,6 +4,7 @@ */ #include <dt-bindings/clock/stm32mp1-clksrc.h> +#include <dt-bindings/input/linux-event-codes.h> #include "stm32mp15-u-boot.dtsi" #include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi" @@ -13,11 +14,9 @@ }; config { - u-boot,boot-led = "heartbeat"; - u-boot,error-led = "error"; + u-boot,boot-led = "led-blue"; + u-boot,error-led = "led-red"; u-boot,mmc-env-partition = "fip"; - st,fastboot-gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; - st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; }; #if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL) @@ -43,12 +42,31 @@ }; #endif + gpio-keys { + compatible = "gpio-keys"; + + button-user-1 { + label = "User-1"; + linux,code = <BTN_1>; + gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; + + button-user-2 { + label = "User-2"; + linux,code = <BTN_2>; + gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; + }; + led { - red { - label = "error"; + compatible = "gpio-leds"; + + led-blue { + gpios = <&gpiod 9 GPIO_ACTIVE_HIGH>; + }; + + led-red { gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; - default-state = "off"; - status = "okay"; }; }; }; diff --git a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi index 139940bd5d4..3515347e91d 100644 --- a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi @@ -33,11 +33,11 @@ label = "fsbl1"; reg = <0x00000000 0x00040000>; }; - partition@80000 { + partition@40000 { label = "fsbl2"; reg = <0x00040000 0x00040000>; }; - partition@100000 { + partition@80000 { label = "ssbl"; reg = <0x00080000 0x00200000>; }; @@ -58,7 +58,7 @@ label = "fsbl2"; reg = <0x00040000 0x00040000>; }; - partition@100000 { + partition@80000 { label = "fip"; reg = <0x00080000 0x00400000>; }; @@ -112,7 +112,7 @@ label = "fip2"; reg = <0x00600000 0x00400000>; }; - partition@1200000 { + partition@a00000 { label = "UBI"; reg = <0x00a00000 0x3f600000>; }; diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi index 2f70b0690d2..1b445619325 100644 --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi @@ -106,15 +106,15 @@ label = "fsbl2"; reg = <0x00040000 0x00040000>; }; - partition@500000 { + partition@80000 { label = "uboot"; reg = <0x00080000 0x00160000>; }; - partition@900000 { + partition@1e0000 { label = "env1"; reg = <0x001E0000 0x00010000>; }; - partition@980000 { + partition@1f0000 { label = "env2"; reg = <0x001F0000 0x00010000>; }; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi index 552b35db3c7..ba84db679e1 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi @@ -42,15 +42,15 @@ label = "fsbl2"; reg = <0x00040000 0x00040000>; }; - partition@500000 { + partition@80000 { label = "uboot"; reg = <0x00080000 0x00160000>; }; - partition@900000 { + partition@1e0000 { label = "env1"; reg = <0x001E0000 0x00010000>; }; - partition@980000 { + partition@1f0000 { label = "env2"; reg = <0x001F0000 0x00010000>; }; diff --git a/arch/arm/dts/tegra114-u-boot.dtsi b/arch/arm/dts/tegra114-u-boot.dtsi index 7c119725528..6a02714a258 100644 --- a/arch/arm/dts/tegra114-u-boot.dtsi +++ b/arch/arm/dts/tegra114-u-boot.dtsi @@ -1,3 +1,16 @@ #include <config.h> #include "tegra-u-boot.dtsi" + +/ { + host1x@50000000 { + bootph-all; + dc@54200000 { + bootph-all; + }; + + dc@54240000 { + bootph-all; + }; + }; +}; diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi index 68ee7f31656..250d692f6bf 100644 --- a/arch/arm/dts/tegra114.dtsi +++ b/arch/arm/dts/tegra114.dtsi @@ -42,7 +42,7 @@ }; dc@54200000 { - compatible = "nvidia,tegra114-dc", "nvidia,tegra20-dc"; + compatible = "nvidia,tegra114-dc"; reg = <0x54200000 0x00040000>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_DISP1>, @@ -61,7 +61,7 @@ }; dc@54240000 { - compatible = "nvidia,tegra114-dc", "nvidia,tegra20-dc"; + compatible = "nvidia,tegra114-dc"; reg = <0x54240000 0x00040000>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_DISP2>, diff --git a/arch/arm/dts/tegra20-paz00.dts b/arch/arm/dts/tegra20-paz00.dts index 5cf604e8659..f851767a55f 100644 --- a/arch/arm/dts/tegra20-paz00.dts +++ b/arch/arm/dts/tegra20-paz00.dts @@ -35,22 +35,6 @@ status = "okay"; nvidia,panel = <&panel>; - - display-timings { - timing@0 { - /* PAZ00 has 1024x600 */ - clock-frequency = <54030000>; - hactive = <1024>; - vactive = <600>; - hback-porch = <160>; - hfront-porch = <24>; - hsync-len = <136>; - vback-porch = <3>; - vfront-porch = <61>; - vsync-len = <6>; - hsync-active = <1>; - }; - }; }; }; diff --git a/arch/arm/dts/tegra30-asus-grouper-common.dtsi b/arch/arm/dts/tegra30-asus-grouper-common.dtsi index e8a3511a9f7..d437ddc4dce 100644 --- a/arch/arm/dts/tegra30-asus-grouper-common.dtsi +++ b/arch/arm/dts/tegra30-asus-grouper-common.dtsi @@ -829,6 +829,12 @@ gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>; linux,code = <KEY_DOWN>; }; + + switch-hall-sensor { + label = "Lid"; + gpios = <&gpio TEGRA_GPIO(S, 6) GPIO_ACTIVE_LOW>; + linux,code = <SW_LID>; + }; }; panel: panel { diff --git a/arch/arm/dts/tegra30-asus-p1801-t.dts b/arch/arm/dts/tegra30-asus-p1801-t.dts index 350443d55eb..243ff2bda26 100644 --- a/arch/arm/dts/tegra30-asus-p1801-t.dts +++ b/arch/arm/dts/tegra30-asus-p1801-t.dts @@ -118,8 +118,8 @@ nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; - nvidia,ioreset = <0>; + nvidia,lock = <1>; + nvidia,io-reset = <1>; }; /* SDMMC3 pinmux */ @@ -203,7 +203,7 @@ nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; nvidia,open-drain = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; + nvidia,lock = <1>; }; gen2_i2c { nvidia,pins = "gen2_i2c_scl_pt5", @@ -213,7 +213,7 @@ nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; nvidia,open-drain = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; + nvidia,lock = <1>; }; cam_i2c { nvidia,pins = "cam_i2c_scl_pbb1", @@ -223,7 +223,7 @@ nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; nvidia,open-drain = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; + nvidia,lock = <1>; }; ddc_i2c { nvidia,pins = "ddc_scl_pv4", @@ -232,7 +232,7 @@ nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; + nvidia,lock = <1>; }; pwr_i2c { nvidia,pins = "pwr_i2c_scl_pz6", @@ -242,7 +242,7 @@ nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; nvidia,open-drain = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; + nvidia,lock = <1>; }; hotplug_i2c { nvidia,pins = "pu4"; @@ -260,7 +260,7 @@ nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; nvidia,open-drain = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; + nvidia,lock = <1>; }; hdmi_hpd { nvidia,pins = "hdmi_int_pn7"; @@ -632,8 +632,8 @@ nvidia,pull = <TEGRA_PIN_PULL_UP>; nvidia,tristate = <TEGRA_PIN_ENABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; - nvidia,ioreset = <0>; + nvidia,lock = <1>; + nvidia,io-reset = <1>; }; /* GPIO keys pinmux */ @@ -718,8 +718,8 @@ nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; - nvidia,ioreset = <0>; + nvidia,lock = <1>; + nvidia,io-reset = <1>; }; vi_d10_pt2 { nvidia,pins = "vi_d10_pt2", @@ -838,8 +838,8 @@ nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_DISABLE>; - nvidia,lock = <0>; - nvidia,ioreset = <0>; + nvidia,lock = <1>; + nvidia,io-reset = <1>; }; vi_mclk_pt1 { nvidia,pins = "vi_mclk_pt1"; diff --git a/arch/arm/dts/tegra30-asus-tf600t.dts b/arch/arm/dts/tegra30-asus-tf600t.dts index f49e7341fe0..3ddd78b3df6 100644 --- a/arch/arm/dts/tegra30-asus-tf600t.dts +++ b/arch/arm/dts/tegra30-asus-tf600t.dts @@ -90,6 +90,8 @@ nvidia,pull = <TEGRA_PIN_PULL_UP>; nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,lock = <1>; + nvidia,io-reset = <1>; }; /* SDMMC2 pinmux */ @@ -98,21 +100,15 @@ "vi_d2_pl0", "vi_d3_pl1", "vi_d5_pl3", - "vi_d7_pl5"; - nvidia,function = "sdmmc2"; - nvidia,pull = <TEGRA_PIN_PULL_NONE>; - nvidia,tristate = <TEGRA_PIN_DISABLE>; - nvidia,enable-input = <TEGRA_PIN_ENABLE>; - }; - vi_d8_pl6 { - nvidia,pins = "vi_d8_pl6", + "vi_d7_pl5", + "vi_d8_pl6", "vi_d9_pl7"; nvidia,function = "sdmmc2"; nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; - nvidia,ioreset = <0>; + nvidia,lock = <1>; + nvidia,io-reset = <1>; }; /* SDMMC3 pinmux */ @@ -146,6 +142,8 @@ nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,lock = <1>; + nvidia,io-reset = <1>; }; sdmmc4_cmd { nvidia,pins = "sdmmc4_cmd_pt7", @@ -161,6 +159,8 @@ nvidia,pull = <TEGRA_PIN_PULL_UP>; nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,lock = <1>; + nvidia,io-reset = <1>; }; sdmmc4_rst_n { nvidia,pins = "sdmmc4_rst_n_pcc3"; @@ -469,6 +469,42 @@ nvidia,enable-input = <TEGRA_PIN_ENABLE>; }; + /* SPI pinmux */ + spi1_ctrl { + nvidia,pins = "spi1_mosi_px4", + "spi1_sck_px5", + "spi1_cs0_n_px6", + "spi1_miso_px7"; + nvidia,function = "spi1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + spi2_sck { + nvidia,pins = "spi2_sck_px2"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + spi2_cs1_n { + nvidia,pins = "spi2_cs1_n_pw2"; + nvidia,function = "spi2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + spi4_ctrl { + nvidia,pins = "gmi_a16_pj7", + "gmi_a17_pb0", + "gmi_a18_pb1", + "gmi_a19_pk7"; + nvidia,function = "spi4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + /* Display A pinmux */ lcd_pwr0_pb2 { nvidia,pins = "lcd_pwr0_pb2", @@ -577,8 +613,8 @@ nvidia,pull = <TEGRA_PIN_PULL_UP>; nvidia,tristate = <TEGRA_PIN_ENABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; - nvidia,ioreset = <0>; + nvidia,lock = <1>; + nvidia,io-reset = <1>; }; /* GPIO keys pinmux */ @@ -657,18 +693,19 @@ nvidia,enable-input = <TEGRA_PIN_DISABLE>; }; vi_vsync_pd6 { - nvidia,pins = "vi_vsync_pd6", + nvidia,pins = "vi_d0_pt4", + "vi_d10_pt2", + "vi_vsync_pd6", "vi_hsync_pd7"; nvidia,function = "rsvd2"; nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; - nvidia,ioreset = <0>; + nvidia,lock = <1>; + nvidia,io-reset = <1>; }; - vi_d10_pt2 { - nvidia,pins = "vi_d10_pt2", - "vi_d0_pt4", "pbb0"; + pbb0 { + nvidia,pins = "pbb0"; nvidia,function = "rsvd2"; nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,tristate = <TEGRA_PIN_DISABLE>; @@ -783,21 +820,15 @@ nvidia,enable-input = <TEGRA_PIN_ENABLE>; }; - vi_d4_pl2 { - nvidia,pins = "vi_d4_pl2"; - nvidia,function = "vi"; - nvidia,pull = <TEGRA_PIN_PULL_NONE>; - nvidia,tristate = <TEGRA_PIN_DISABLE>; - nvidia,enable-input = <TEGRA_PIN_DISABLE>; - }; - vi_d6_pl4 { - nvidia,pins = "vi_d6_pl4"; + vi_d4 { + nvidia,pins = "vi_d4_pl2", + "vi_d6_pl4"; nvidia,function = "vi"; nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_DISABLE>; - nvidia,lock = <0>; - nvidia,ioreset = <0>; + nvidia,lock = <1>; + nvidia,io-reset = <1>; }; vi_mclk_pt1 { nvidia,pins = "vi_mclk_pt1"; @@ -805,6 +836,8 @@ nvidia,pull = <TEGRA_PIN_PULL_UP>; nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,lock = <1>; + nvidia,io-reset = <1>; }; jtag { @@ -1089,6 +1122,16 @@ clock-output-names = "pmic-oscillator"; }; + extcon-keys { + compatible = "gpio-keys"; + + switch-dock-hall-sensor { + label = "Lid sensor"; + gpios = <&gpio TEGRA_GPIO(BB, 6) GPIO_ACTIVE_LOW>; + linux,code = <SW_LID>; + }; + }; + gpio-keys { compatible = "gpio-keys"; diff --git a/arch/arm/dts/tegra30-asus-tf700t.dts b/arch/arm/dts/tegra30-asus-tf700t.dts index cc03f5a7ec2..6dc760b90d6 100644 --- a/arch/arm/dts/tegra30-asus-tf700t.dts +++ b/arch/arm/dts/tegra30-asus-tf700t.dts @@ -7,7 +7,18 @@ model = "ASUS Transformer Infinity TF700T"; compatible = "asus,tf700t", "nvidia,tegra30"; - /delete-node/ host1x@50000000; + host1x@50000000 { + dc@54200000 { + clocks = <&tegra_car TEGRA30_CLK_DISP1>, + <&tegra_car TEGRA30_CLK_PLL_D_OUT0>; + + rgb { + status = "okay"; + + nvidia,panel = <&tc358768>; + }; + }; + }; pinmux@70000868 { state_default: pinmux { @@ -62,5 +73,92 @@ }; }; - /delete-node/ panel; + tc358768_refclk: clock-tc358768 { + compatible = "fixed-clock"; + clock-frequency = <23100000>; + clock-accuracy = <100>; + #clock-cells = <0>; + }; + + tc358768_osc: clock-tc358768-osc-gate { + compatible = "gpio-gate-clock"; + enable-gpios = <&gpio TEGRA_GPIO(D, 2) GPIO_ACTIVE_HIGH>; + clocks = <&tc358768_refclk>; + #clock-cells = <0>; + }; + + i2c-mux { + compatible = "i2c-mux-gpio"; + + mux-gpios = <&gpio TEGRA_GPIO(X, 0) GPIO_ACTIVE_HIGH>; + i2c-parent = <&gen1_i2c>; + idle-state = <0x0>; + + #address-cells = <1>; + #size-cells = <0>; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + tc358768: dsi@7 { + compatible = "toshiba,tc358768"; + reg = <0x7>; + + #address-cells = <1>; + #size-cells = <0>; + + clocks = <&tc358768_osc>; + clock-names = "refclk"; + + reset-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_LOW>; + + vddc-supply = <&vdd_1v2_mipi>; + vddio-supply = <&vdd_1v8_vio>; + vddmipi-supply = <&vdd_1v2_mipi>; + + panel = <&panel>; + }; + }; + }; + + panel: panel { + compatible = "panasonic,vvx10f004b00"; + + power-supply = <&vdd_pnl_reg>; + backlight = <&backlight>; + + /delete-property/ enable-gpios; + + display-timings { + timing@0 { + /* 1920x1200@60Hz */ + clock-frequency = <154000000>; + + hactive = <1920>; + hfront-porch = <48>; + hback-porch = <80>; + hsync-len = <32>; + hsync-active = <1>; + + vactive = <1200>; + vfront-porch = <3>; + vback-porch = <26>; + vsync-len = <6>; + vsync-active = <1>; + }; + }; + }; + + vdd_1v2_mipi: regulator-mipi { + compatible = "regulator-fixed"; + regulator-name = "tc358768_1v2_vdd"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <10000>; + regulator-boot-on; + gpio = <&gpio TEGRA_GPIO(BB, 3) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; diff --git a/arch/arm/dts/tegra30-asus-transformer.dtsi b/arch/arm/dts/tegra30-asus-transformer.dtsi index e6cc6e7105f..03ba8fb9604 100644 --- a/arch/arm/dts/tegra30-asus-transformer.dtsi +++ b/arch/arm/dts/tegra30-asus-transformer.dtsi @@ -99,8 +99,8 @@ nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; - nvidia,io-reset = <0>; + nvidia,lock = <1>; + nvidia,io-reset = <1>; }; /* SDMMC3 pinmux */ @@ -189,7 +189,7 @@ nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; nvidia,open-drain = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; + nvidia,lock = <1>; }; gen2_i2c { @@ -200,7 +200,7 @@ nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; nvidia,open-drain = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; + nvidia,lock = <1>; }; cam_i2c { @@ -211,7 +211,7 @@ nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; nvidia,open-drain = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; + nvidia,lock = <1>; }; ddc_i2c { @@ -221,7 +221,7 @@ nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; + nvidia,lock = <1>; }; pwr_i2c { @@ -232,7 +232,7 @@ nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; nvidia,open-drain = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; + nvidia,lock = <1>; }; hotplug_i2c { @@ -647,8 +647,8 @@ nvidia,pull = <TEGRA_PIN_PULL_UP>; nvidia,tristate = <TEGRA_PIN_ENABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; - nvidia,io-reset = <0>; + nvidia,lock = <1>; + nvidia,io-reset = <1>; }; /* GPIO keys pinmux */ @@ -741,8 +741,8 @@ nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; - nvidia,lock = <0>; - nvidia,io-reset = <0>; + nvidia,lock = <1>; + nvidia,io-reset = <1>; }; vi_d10_pt2 { @@ -879,8 +879,8 @@ nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_DISABLE>; - nvidia,lock = <0>; - nvidia,io-reset = <0>; + nvidia,lock = <1>; + nvidia,io-reset = <1>; }; vi_mclk_pt1 { @@ -1150,6 +1150,16 @@ clock-output-names = "pmic-oscillator"; }; + extcon-keys { + compatible = "gpio-keys"; + + switch-dock-hall-sensor { + label = "Lid sensor"; + gpios = <&gpio TEGRA_GPIO(S, 6) GPIO_ACTIVE_LOW>; + linux,code = <SW_LID>; + }; + }; + gpio-keys { compatible = "gpio-keys"; diff --git a/arch/arm/dts/tegra30-u-boot.dtsi b/arch/arm/dts/tegra30-u-boot.dtsi index 3038227dbed..6a02714a258 100644 --- a/arch/arm/dts/tegra30-u-boot.dtsi +++ b/arch/arm/dts/tegra30-u-boot.dtsi @@ -8,5 +8,9 @@ dc@54200000 { bootph-all; }; + + dc@54240000 { + bootph-all; + }; }; }; diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi index f198bc0edbe..1177e2ab1f4 100644 --- a/arch/arm/dts/tegra30.dtsi +++ b/arch/arm/dts/tegra30.dtsi @@ -158,7 +158,7 @@ }; dc@54200000 { - compatible = "nvidia,tegra30-dc", "nvidia,tegra20-dc"; + compatible = "nvidia,tegra30-dc"; reg = <0x54200000 0x00040000>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_DISP1>, diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h index 4276a0f6811..ecf3b4e7428 100644 --- a/arch/arm/include/asm/arch-rockchip/bootrom.h +++ b/arch/arm/include/asm/arch-rockchip/bootrom.h @@ -43,11 +43,14 @@ void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd); * Boot-device identifiers as used by the BROM */ enum { + BROM_BOOTSOURCE_UNKNOWN = 0, BROM_BOOTSOURCE_NAND = 1, BROM_BOOTSOURCE_EMMC = 2, BROM_BOOTSOURCE_SPINOR = 3, BROM_BOOTSOURCE_SPINAND = 4, BROM_BOOTSOURCE_SD = 5, + BROM_BOOTSOURCE_I2C = 8, + BROM_BOOTSOURCE_SPI = 9, BROM_BOOTSOURCE_USB = 10, BROM_LAST_BOOTSOURCE = BROM_BOOTSOURCE_USB }; diff --git a/arch/arm/include/asm/arch-rk3308/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h index 84b63e4d568..091ae82d7cc 100644 --- a/arch/arm/include/asm/arch-rk3308/cru_rk3308.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h @@ -147,6 +147,20 @@ enum { CORE_DIV_CON_SHIFT = 0, CORE_DIV_CON_MASK = 0x0f << CORE_DIV_CON_SHIFT, + /* CRU_CLK_SEL2_CON */ + CLK_RTC32K_SEL_SHIFT = 8, + CLK_RTC32K_SEL_MASK = 3 << CLK_RTC32K_SEL_SHIFT, + CLK_RTC32K_IO = 0, + CLK_RTC32K_PVTM, + CLK_RTC32K_FRAC_DIV, + CLK_RTC32K_DIV, + + /* CRU_CLK_SEL3_CON */ + CLK_RTC32K_FRAC_NUMERATOR_SHIFT = 16, + CLK_RTC32K_FRAC_NUMERATOR_MASK = 0xffff << 16, + CLK_RTC32K_FRAC_DENOMINATOR_SHIFT = 0, + CLK_RTC32K_FRAC_DENOMINATOR_MASK = 0xffff, + /* CRU_CLK_SEL5_CON */ BUS_PLL_SEL_SHIFT = 6, BUS_PLL_SEL_MASK = 0x3 << BUS_PLL_SEL_SHIFT, diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h index 226744d67d9..4ad1d33e056 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h @@ -62,6 +62,40 @@ check_member(rk3328_cru, sdmmc_ext_con[1], 0x39c); enum apll_frequencies { APLL_816_MHZ, APLL_600_MHZ, + + /* CRU_CLK_SEL37_CON */ + ACLK_VIO_PLL_SEL_CPLL = 0, + ACLK_VIO_PLL_SEL_GPLL = 1, + ACLK_VIO_PLL_SEL_HDMIPHY = 2, + ACLK_VIO_PLL_SEL_USB480M = 3, + ACLK_VIO_PLL_SEL_SHIFT = 6, + ACLK_VIO_PLL_SEL_MASK = 3 << ACLK_VIO_PLL_SEL_SHIFT, + ACLK_VIO_DIV_CON_SHIFT = 0, + ACLK_VIO_DIV_CON_MASK = 0x1f << ACLK_VIO_DIV_CON_SHIFT, + HCLK_VIO_DIV_CON_SHIFT = 8, + HCLK_VIO_DIV_CON_MASK = 0x1f << HCLK_VIO_DIV_CON_SHIFT, + + /* CRU_CLK_SEL39_CON */ + ACLK_VOP_PLL_SEL_CPLL = 0, + ACLK_VOP_PLL_SEL_GPLL = 1, + ACLK_VOP_PLL_SEL_HDMIPHY = 2, + ACLK_VOP_PLL_SEL_USB480M = 3, + ACLK_VOP_PLL_SEL_SHIFT = 6, + ACLK_VOP_PLL_SEL_MASK = 3 << ACLK_VOP_PLL_SEL_SHIFT, + ACLK_VOP_DIV_CON_SHIFT = 0, + ACLK_VOP_DIV_CON_MASK = 0x1f << ACLK_VOP_DIV_CON_SHIFT, + + /* CRU_CLK_SEL40_CON */ + DCLK_LCDC_PLL_SEL_GPLL = 0, + DCLK_LCDC_PLL_SEL_CPLL = 1, + DCLK_LCDC_PLL_SEL_SHIFT = 0, + DCLK_LCDC_PLL_SEL_MASK = 1 << DCLK_LCDC_PLL_SEL_SHIFT, + DCLK_LCDC_SEL_HDMIPHY = 0, + DCLK_LCDC_SEL_PLL = 1, + DCLK_LCDC_SEL_SHIFT = 1, + DCLK_LCDC_SEL_MASK = 1 << DCLK_LCDC_SEL_SHIFT, + DCLK_LCDC_DIV_CON_SHIFT = 8, + DCLK_LCDC_DIV_CON_MASK = 0xFf << DCLK_LCDC_DIV_CON_SHIFT, }; void rk3328_configure_cpu(struct rk3328_cru *cru, diff --git a/arch/arm/include/asm/arch-rk3308/grf_rk3308.h b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h index a995bb950d9..a995bb950d9 100644 --- a/arch/arm/include/asm/arch-rk3308/grf_rk3308.h +++ b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h index fe6b8ba2732..0264bfe1c50 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h @@ -220,10 +220,7 @@ struct sunxi_ccm_reg { #ifndef __ASSEMBLY__ void clock_set_pll1(unsigned int clk); -void clock_set_pll2(unsigned int clk); -void clock_set_pll4(unsigned int clk); void clock_set_pll6(unsigned int clk); -void clock_set_pll12(unsigned int clk); unsigned int clock_get_pll4_periph0(void); #endif diff --git a/arch/arm/include/asm/arch-sunxi/tzpc.h b/arch/arm/include/asm/arch-sunxi/tzpc.h index 7a6fcaebdb5..92696088a39 100644 --- a/arch/arm/include/asm/arch-sunxi/tzpc.h +++ b/arch/arm/include/asm/arch-sunxi/tzpc.h @@ -28,6 +28,12 @@ struct sunxi_tzpc { #define SUN8I_H3_TZPC_DECPORT1_ALL 0xff #define SUN8I_H3_TZPC_DECPORT2_ALL 0x7f +#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3 void tzpc_init(void); +#else +static inline void tzpc_init(void) +{ +} +#endif #endif /* _SUNXI_TZPC_H */ diff --git a/arch/arm/include/asm/arch-tegra/dc.h b/arch/arm/include/asm/arch-tegra/dc.h index 7613d84f221..ca3718411ab 100644 --- a/arch/arm/include/asm/arch-tegra/dc.h +++ b/arch/arm/include/asm/arch-tegra/dc.h @@ -443,6 +443,11 @@ enum win_color_depth_id { #define WINDOW_D_SELECT BIT(7) #define WINDOW_H_SELECT BIT(8) +/* DC_COM_PIN_OUTPUT_POLARITY1 0x307 */ +#define LHS_OUTPUT_POLARITY_LOW BIT(30) +#define LVS_OUTPUT_POLARITY_LOW BIT(28) +#define LSC0_OUTPUT_POLARITY_LOW BIT(24) + /* DC_DISP_DISP_WIN_OPTIONS 0x402 */ #define CURSOR_ENABLE BIT(16) #define SOR_ENABLE BIT(25) @@ -569,12 +574,4 @@ enum { #define DC_N_WINDOWS 5 #define DC_REG_SAVE_SPACE (DC_N_WINDOWS + 5) -#define TEGRA_DSI_A "dsi@54300000" -#define TEGRA_DSI_B "dsi@54400000" - -struct tegra_dc_plat { - struct udevice *dev; /* Display controller device */ - struct dc_ctlr *dc; /* Display controller regmap */ -}; - #endif /* __ASM_ARCH_TEGRA_DC_H */ diff --git a/arch/arm/include/asm/arch-tegra114/pwm.h b/arch/arm/include/asm/arch-tegra114/pwm.h new file mode 100644 index 00000000000..af391518035 --- /dev/null +++ b/arch/arm/include/asm/arch-tegra114/pwm.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Tegra pulse width frequency modulator definitions + * + * Copyright (c) 2011 The Chromium OS Authors. + */ + +#ifndef __ASM_ARCH_TEGRA114_PWM_H +#define __ASM_ARCH_TEGRA114_PWM_H + +#include <asm/arch-tegra/pwm.h> + +#endif /* __ASM_ARCH_TEGRA114_PWM_H */ diff --git a/arch/arm/include/asm/arch-tegra20/display.h b/arch/arm/include/asm/arch-tegra20/display.h deleted file mode 100644 index e7b3cffd466..00000000000 --- a/arch/arm/include/asm/arch-tegra20/display.h +++ /dev/null @@ -1,28 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2010 - * NVIDIA Corporation <www.nvidia.com> - */ - -#ifndef __ASM_ARCH_TEGRA_DISPLAY_H -#define __ASM_ARCH_TEGRA_DISPLAY_H - -#include <asm/arch-tegra/dc.h> - -/* This holds information about a window which can be displayed */ -struct disp_ctl_win { - enum win_color_depth_id fmt; /* Color depth/format */ - unsigned bpp; /* Bits per pixel */ - phys_addr_t phys_addr; /* Physical address in memory */ - unsigned x; /* Horizontal address offset (bytes) */ - unsigned y; /* Veritical address offset (bytes) */ - unsigned w; /* Width of source window */ - unsigned h; /* Height of source window */ - unsigned stride; /* Number of bytes per line */ - unsigned out_x; /* Left edge of output window (col) */ - unsigned out_y; /* Top edge of output window (row) */ - unsigned out_w; /* Width of output window in pixels */ - unsigned out_h; /* Height of output window in pixels */ -}; - -#endif /*__ASM_ARCH_TEGRA_DISPLAY_H*/ diff --git a/arch/arm/include/asm/arch-tegra30/display.h b/arch/arm/include/asm/arch-tegra30/display.h deleted file mode 100644 index 9411525799d..00000000000 --- a/arch/arm/include/asm/arch-tegra30/display.h +++ /dev/null @@ -1,28 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2010 - * NVIDIA Corporation <www.nvidia.com> - */ - -#ifndef __ASM_ARCH_TEGRA_DISPLAY_H -#define __ASM_ARCH_TEGRA_DISPLAY_H - -#include <asm/arch-tegra/dc.h> - -/* This holds information about a window which can be displayed */ -struct disp_ctl_win { - enum win_color_depth_id fmt; /* Color depth/format */ - unsigned int bpp; /* Bits per pixel */ - phys_addr_t phys_addr; /* Physical address in memory */ - unsigned int x; /* Horizontal address offset (bytes) */ - unsigned int y; /* Veritical address offset (bytes) */ - unsigned int w; /* Width of source window */ - unsigned int h; /* Height of source window */ - unsigned int stride; /* Number of bytes per line */ - unsigned int out_x; /* Left edge of output window (col) */ - unsigned int out_y; /* Top edge of output window (row) */ - unsigned int out_w; /* Width of output window in pixels */ - unsigned int out_h; /* Height of output window in pixels */ -}; - -#endif /*__ASM_ARCH_TEGRA_DISPLAY_H*/ diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index b55167e9cc0..67275fba616 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -31,7 +31,7 @@ endif obj-$(CONFIG_CPU_V7M) += cmd_boot.o obj-$(CONFIG_OF_LIBFDT) += bootm-fdt.o obj-$(CONFIG_CMD_BOOTI) += bootm.o image.o -obj-$(CONFIG_BOOTM) += bootm.o +obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-$(CONFIG_CMD_BOOTZ) += bootm.o zimage.o else obj-$(CONFIG_$(SPL_TPL_)FRAMEWORK) += spl.o diff --git a/arch/arm/mach-imx/ddrmc-vf610-calibration.c b/arch/arm/mach-imx/ddrmc-vf610-calibration.c index cd7e95e61d0..7d787d04598 100644 --- a/arch/arm/mach-imx/ddrmc-vf610-calibration.c +++ b/arch/arm/mach-imx/ddrmc-vf610-calibration.c @@ -45,7 +45,7 @@ * based on trace length differences from their * layout. * Mismatches up to 25% or tCK (clock period) are - * allowed, so the value in the filed doesn’t have + * allowed, so the value in the filed doesn't have * to be very accurate. * * - 0x2 (b'10) - RDLVL_DL_0/1 - refers to adjusting the DQS strobe in relation @@ -184,14 +184,14 @@ static int ddrmc_cal_dqs_to_dq(struct ddrmr_regs *ddrmr) debug("RDLVL: PHY_RDLVL_EDGE:\t 0x%x\n", (tmp >> DDRMC_CR101_PHY_RDLVL_EDGE_OFF) & 0x1); //set 0 - /* Program Leveling mode - CR93[SW_LVL_MODE] to ’b10 */ + /* Program Leveling mode - CR93[SW_LVL_MODE] to 'b10 */ clrsetbits_le32(&ddrmr->cr[93], DDRMC_CR93_SW_LVL_MODE(0x3), DDRMC_CR93_SW_LVL_MODE(0x2)); tmp = readl(&ddrmr->cr[93]); debug("RDLVL: SW_LVL_MODE:\t 0x%x\n", (tmp >> DDRMC_CR93_SW_LVL_MODE_OFF) & 0x3); - /* Start procedure - CR93[SWLVL_START] to ’b1 */ + /* Start procedure - CR93[SWLVL_START] to 'b1 */ sw_leveling_start; /* Poll CR94[SWLVL_OP_DONE] */ @@ -211,7 +211,7 @@ static int ddrmc_cal_dqs_to_dq(struct ddrmr_regs *ddrmr) 0xFFFF << DDRMC_CR105_RDLVL_DL_0_OFF, i << DDRMC_CR105_RDLVL_DL_0_OFF); - /* Load values CR93[SWLVL_LOAD] to ’b1 */ + /* Load values CR93[SWLVL_LOAD] to 'b1 */ sw_leveling_load_value; /* Poll CR94[SWLVL_OP_DONE] */ @@ -263,7 +263,7 @@ static int ddrmc_cal_dqs_to_dq(struct ddrmr_regs *ddrmr) 0xFFFF << DDRMC_CR110_RDLVL_DL_1_OFF, i << DDRMC_CR110_RDLVL_DL_1_OFF); - /* Load values CR93[SWLVL_LOAD] to ’b1 */ + /* Load values CR93[SWLVL_LOAD] to 'b1 */ sw_leveling_load_value; /* Poll CR94[SWLVL_OP_DONE] */ @@ -317,7 +317,7 @@ static int ddrmc_cal_dqs_to_dq(struct ddrmr_regs *ddrmr) sw_leveling_load_value; sw_leveling_op_done; - /* Exit procedure - CR94[SWLVL_EXIT] to ’b1 */ + /* Exit procedure - CR94[SWLVL_EXIT] to 'b1 */ sw_leveling_exit; /* Poll CR94[SWLVL_OP_DONE] */ diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig index b79485f1f75..e892da80fe8 100644 --- a/arch/arm/mach-imx/imx9/Kconfig +++ b/arch/arm/mach-imx/imx9/Kconfig @@ -31,6 +31,7 @@ choice config TARGET_IMX93_11X11_EVK bool "imx93_11x11_evk" select IMX93 + imply OF_UPSTREAM config TARGET_IMX93_VAR_SOM bool "imx93_var_som" diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c index 1bdc568f9b1..e0da9c23958 100644 --- a/arch/arm/mach-imx/mx6/clock.c +++ b/arch/arm/mach-imx/mx6/clock.c @@ -714,10 +714,10 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq) /* * Register: PLL_VIDEO * Bit Field: POST_DIV_SELECT - * 00 — Divide by 4. - * 01 — Divide by 2. - * 10 — Divide by 1. - * 11 — Reserved + * 00 - Divide by 4. + * 01 - Divide by 2. + * 10 - Divide by 1. + * 11 - Reserved * No need to check post_div(1) */ for (post_div = 2; post_div <= 4; post_div <<= 1) { diff --git a/arch/arm/mach-imx/mx7/psci-mx7.c b/arch/arm/mach-imx/mx7/psci-mx7.c index 699a2569cb7..0b71fa40344 100644 --- a/arch/arm/mach-imx/mx7/psci-mx7.c +++ b/arch/arm/mach-imx/mx7/psci-mx7.c @@ -631,9 +631,9 @@ __secure void psci_system_suspend(u32 __always_unused function_id, * Workaround: * If both CPU0/CPU1 are IDLE, the last IDLE CPU should * disable GIC first, then REG_BYPASS_COUNTER is used - * to mask wakeup INT, and then execute “wfi” is used to + * to mask wakeup INT, and then execute "wfi" is used to * bring the system into power down processing safely. - * The counter must be enabled as close to the “wfi” state + * The counter must be enabled as close to the "wfi" state * as possible. The following equation can be used to * determine the RBC counter value: * RBC_COUNT * (1/32K RTC frequency) >= diff --git a/arch/arm/mach-ipq40xx/include/mach/gpio.h b/arch/arm/mach-ipq40xx/include/mach/gpio.h index a45747c0fe5..53c6ae06490 100644 --- a/arch/arm/mach-ipq40xx/include/mach/gpio.h +++ b/arch/arm/mach-ipq40xx/include/mach/gpio.h @@ -1,10 +1,35 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Empty gpio.h + * Qualcomm common pin control data. * - * This file must stay as arch/arm/include/asm/gpio.h requires it. - * - * Copyright (c) 2019 Sartura Ltd. - * - * Author: Robert Marko <robert.marko@sartura.hr> + * Copyright (C) 2023 Linaro Ltd. */ +#ifndef _QCOM_GPIO_H_ +#define _QCOM_GPIO_H_ + +#include <asm/types.h> +#include <stdbool.h> + +struct msm_pin_data { + int pin_count; + const unsigned int *pin_offsets; + /* Index of first special pin, these are ignored for now */ + unsigned int special_pins_start; +}; + +static inline u32 qcom_pin_offset(const unsigned int *offs, unsigned int selector) +{ + u32 out = (selector * 0x1000); + + if (offs) + return out + offs[selector]; + + return out; +} + +static inline bool qcom_is_special_pin(const struct msm_pin_data *pindata, unsigned int pin) +{ + return pindata->special_pins_start && pin >= pindata->special_pins_start; +} + +#endif /* _QCOM_GPIO_H_ */ diff --git a/arch/arm/mach-k3/am62a7_init.c b/arch/arm/mach-k3/am62a7_init.c index 2a0221a3718..658828cf75f 100644 --- a/arch/arm/mach-k3/am62a7_init.c +++ b/arch/arm/mach-k3/am62a7_init.c @@ -31,7 +31,7 @@ static void store_boot_info_from_rom(void) bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX); if (IS_ENABLED(CONFIG_CPU_V7R)) { - memcpy(&bootdata, (uintptr_t *)ROM_ENTENDED_BOOT_DATA_INFO, + memcpy(&bootdata, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO, sizeof(struct rom_extended_boot_data)); } } diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c index ddf47ef0a9b..80c3cb3479f 100644 --- a/arch/arm/mach-k3/am642_init.c +++ b/arch/arm/mach-k3/am642_init.c @@ -226,7 +226,7 @@ void board_init_f(ulong dummy) * The warm reset realigns internal clocks and prevents the lockup from * happening. */ - ret = uclass_first_device_err(UCLASS_SYSRESET, &dev); + ret = uclass_get_device_by_driver(UCLASS_FIRMWARE, DM_DRIVER_GET(ti_sci), &dev); if (ret) printf("\n%s:uclass device error [%d]\n",__func__,ret); diff --git a/arch/arm/mach-k3/include/mach/am62a_hardware.h b/arch/arm/mach-k3/include/mach/am62a_hardware.h index 11080801c4c..cd61abe0185 100644 --- a/arch/arm/mach-k3/include/mach/am62a_hardware.h +++ b/arch/arm/mach-k3/include/mach/am62a_hardware.h @@ -66,7 +66,7 @@ #define MCU_CTRL_DEVICE_CLKOUT_32K_CTRL (MCU_CTRL_MMR0_BASE + 0x8058) #define MCU_CTRL_DEVICE_CLKOUT_LFOSC_SELECT_VAL (0x3) -#define ROM_ENTENDED_BOOT_DATA_INFO 0x43c3f1e0 +#define ROM_EXTENDED_BOOT_DATA_INFO 0x43c3f1e0 #define K3_BOOT_PARAM_TABLE_INDEX_OCRAM 0x7000F290 diff --git a/arch/arm/mach-renesas/Kconfig b/arch/arm/mach-renesas/Kconfig index 2ac867612bf..aeb55da609b 100644 --- a/arch/arm/mach-renesas/Kconfig +++ b/arch/arm/mach-renesas/Kconfig @@ -14,6 +14,7 @@ config RCAR_64 imply CMD_GPT imply CMD_MMC_SWRITE if MMC imply CMD_UUID + imply OF_UPSTREAM imply SUPPORT_EMMC_RPMB if MMC choice diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index f68a0a48949..67d3b28d058 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -160,14 +160,25 @@ config ROCKCHIP_RK3308 select SPL_ATF select SPL_ATF_NO_PLATFORM_PARAM select SPL_LOAD_FIT + imply ARMV8_CRYPTO + imply ARMV8_SET_SMPEN + imply DM_RNG + imply LEGACY_IMAGE_FORMAT + imply MISC + imply MISC_INIT_R + imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD - imply SPL_ROCKCHIP_COMMON_BOARD + imply ROCKCHIP_OTP imply SPL_CLK - imply SPL_REGMAP - imply SPL_SYSCON + imply SPL_DM_SEQ_ALIAS + imply SPL_FIT_SIGNATURE + imply SPL_PINCTRL imply SPL_RAM - imply SPL_SERIAL + imply SPL_REGMAP + imply SPL_ROCKCHIP_COMMON_BOARD imply SPL_SEPARATE_BSS + imply SPL_SERIAL + imply SPL_SYSCON help The Rockchip RK3308 is a ARM-based Soc which embedded with quad Cortex-A35 and highly integrated audio interfaces. @@ -180,18 +191,19 @@ config ROCKCHIP_RK3328 select SUPPORT_TPL select TPL select TPL_NEEDS_SEPARATE_STACK if TPL + imply ARMV8_CRYPTO + imply ARMV8_SET_SMPEN + imply MISC + imply MISC_INIT_R + imply OF_LIVE + imply PRE_CONSOLE_BUFFER imply ROCKCHIP_COMMON_BOARD + imply ROCKCHIP_EFUSE imply ROCKCHIP_SDRAM_COMMON imply SPL_ROCKCHIP_COMMON_BOARD + imply SPL_SEPARATE_BSS imply SPL_SERIAL imply TPL_SERIAL - imply SPL_SEPARATE_BSS - select ENABLE_ARM_SOC_BOOT0_HOOK - select DEBUG_UART_BOARD_INIT - select SYS_NS16550 - imply MISC - imply ROCKCHIP_EFUSE - imply MISC_INIT_R help The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two @@ -294,12 +306,16 @@ config ROCKCHIP_RK3568 select BOARD_LATE_INIT select DM_REGULATOR_FIXED select DM_RESET - imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF - imply ROCKCHIP_COMMON_BOARD - imply OF_LIBFDT_OVERLAY - imply ROCKCHIP_OTP + imply BOOTSTD_FULL + imply DM_RNG imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP + imply OF_LIBFDT_OVERLAY + imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP + imply RNG_ROCKCHIP + imply ROCKCHIP_COMMON_BOARD + imply ROCKCHIP_OTP + imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT help The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55, @@ -321,16 +337,19 @@ config ROCKCHIP_RK3588 select BOARD_LATE_INIT select DM_REGULATOR_FIXED select DM_RESET - imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF - imply ROCKCHIP_COMMON_BOARD - imply OF_LIBFDT_OVERLAY - imply ROCKCHIP_OTP + imply BOOTSTD_FULL + imply CLK_SCMI + imply DM_RNG imply MISC_INIT_R imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP - imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT - imply CLK_SCMI + imply OF_LIBFDT_OVERLAY + imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP + imply RNG_ROCKCHIP + imply ROCKCHIP_COMMON_BOARD + imply ROCKCHIP_OTP imply SCMI_FIRMWARE - imply BOOTSTD_FULL + imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF + imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT help The Rockchip RK3588 is a ARM-based SoC with quad-core Cortex-A76 and quad-core Cortex-A55 including NEON and GPU, 6TOPS NPU, Mali-G610 MP4, @@ -573,6 +592,9 @@ config ROCKCHIP_COMMON_STACK_ADDR imply TPL_SYS_MALLOC_F if TPL imply TPL_SYS_MALLOC_SIMPLE if TPL +config NR_DRAM_BANKS + default 10 if ROCKCHIP_EXTERNAL_TPL + source "arch/arm/mach-rockchip/px30/Kconfig" source "arch/arm/mach-rockchip/rk3036/Kconfig" source "arch/arm/mach-rockchip/rk3066/Kconfig" diff --git a/arch/arm/mach-rockchip/px30-board-tpl.c b/arch/arm/mach-rockchip/px30-board-tpl.c index 637a5e1b18b..db368a7b8c2 100644 --- a/arch/arm/mach-rockchip/px30-board-tpl.c +++ b/arch/arm/mach-rockchip/px30-board-tpl.c @@ -36,7 +36,7 @@ void board_init_f(ulong dummy) { int ret; -#ifdef CONFIG_DEBUG_UART +#if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL) debug_uart_init(); /* * Debug UART can be used from here if required: @@ -46,8 +46,10 @@ void board_init_f(ulong dummy) * printhex8(0x1234); * printascii("string"); */ +#if CONFIG_TPL_BANNER_PRINT printascii("U-Boot TPL board init\n"); #endif +#endif secure_timer_init(); ret = sdram_init(); diff --git a/arch/arm/mach-rockchip/px30/Kconfig b/arch/arm/mach-rockchip/px30/Kconfig index 41893920cb4..23f8f430c4a 100644 --- a/arch/arm/mach-rockchip/px30/Kconfig +++ b/arch/arm/mach-rockchip/px30/Kconfig @@ -36,9 +36,9 @@ config TARGET_PX30_CORE 10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame. config TARGET_RINGNECK_PX30 - bool "Theobroma Systems PX30-µQ7 (Ringneck)" + bool "Theobroma Systems PX30-uQ7 (Ringneck)" help - The PX30-uQ7 (Ringneck) SoM is a µQseven-compatible (40mmx70mm, + The PX30-uQ7 (Ringneck) SoM is a uQseven-compatible (40mmx70mm, MXM-230 connector) system-on-module from Theobroma Systems[1], featuring the Rockchip PX30. diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c index b4f655fa4b3..2ec3289d75b 100644 --- a/arch/arm/mach-rockchip/px30/px30.c +++ b/arch/arm/mach-rockchip/px30/px30.c @@ -19,6 +19,7 @@ const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { [BROM_BOOTSOURCE_EMMC] = "/mmc@ff390000", + [BROM_BOOTSOURCE_SPINOR] = "/spi@ff3a0000/flash@0", [BROM_BOOTSOURCE_SD] = "/mmc@ff370000", }; diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c index c77c56c1dab..70cf5002912 100644 --- a/arch/arm/mach-rockchip/rk3288/rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/rk3288.c @@ -28,6 +28,7 @@ DECLARE_GLOBAL_DATA_PTR; const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { [BROM_BOOTSOURCE_EMMC] = "/mmc@ff0f0000", + [BROM_BOOTSOURCE_SPINOR] = "/spi@ff130000/flash@0", [BROM_BOOTSOURCE_SD] = "/mmc@ff0c0000", }; diff --git a/arch/arm/mach-rockchip/rk3308/Kconfig b/arch/arm/mach-rockchip/rk3308/Kconfig index 749e9995d91..fac966207a9 100644 --- a/arch/arm/mach-rockchip/rk3308/Kconfig +++ b/arch/arm/mach-rockchip/rk3308/Kconfig @@ -23,9 +23,6 @@ config ROCKCHIP_COMMON_STACK_ADDR config TEXT_BASE default 0x00600000 -config SPL_SERIAL - default y - source "board/rockchip/evb_rk3308/Kconfig" source "board/firefly/firefly-rk3308/Kconfig" diff --git a/arch/arm/mach-rockchip/rk3308/clk_rk3308.c b/arch/arm/mach-rockchip/rk3308/clk_rk3308.c index ccda53380c6..201bf661f9b 100644 --- a/arch/arm/mach-rockchip/rk3308/clk_rk3308.c +++ b/arch/arm/mach-rockchip/rk3308/clk_rk3308.c @@ -7,7 +7,7 @@ #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> -#include <asm/arch/cru_rk3308.h> +#include <asm/arch-rockchip/cru_rk3308.h> #include <linux/err.h> int rockchip_get_clk(struct udevice **devp) diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c index 27a748327e3..a0915c72bfa 100644 --- a/arch/arm/mach-rockchip/rk3308/rk3308.c +++ b/arch/arm/mach-rockchip/rk3308/rk3308.c @@ -5,8 +5,8 @@ #include <common.h> #include <init.h> #include <malloc.h> -#include <asm/arch/grf_rk3308.h> #include <asm/arch-rockchip/bootrom.h> +#include <asm/arch-rockchip/grf_rk3308.h> #include <asm/arch-rockchip/hardware.h> #include <asm/gpio.h> #include <debug_uart.h> @@ -141,6 +141,7 @@ enum { const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { [BROM_BOOTSOURCE_EMMC] = "/mmc@ff490000", + [BROM_BOOTSOURCE_SPINOR] = "/spi@ff4c0000/flash@0", [BROM_BOOTSOURCE_SD] = "/mmc@ff480000", }; diff --git a/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c b/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c index daf74a0e2d3..d2f267e6353 100644 --- a/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c +++ b/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c @@ -17,4 +17,7 @@ U_BOOT_DRIVER(rockchip_rk3328_grf) = { .name = "rockchip_rk3328_grf", .id = UCLASS_SYSCON, .of_match = rk3328_syscon_ids, +#if CONFIG_IS_ENABLED(OF_REAL) + .bind = dm_scan_fdt_dev, +#endif }; diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c index 651ba109020..8f5ca1dfa7c 100644 --- a/arch/arm/mach-rockchip/rk3368/rk3368.c +++ b/arch/arm/mach-rockchip/rk3368/rk3368.c @@ -55,6 +55,7 @@ struct mm_region *mem_map = rk3368_mem_map; const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { [BROM_BOOTSOURCE_EMMC] = "/mmc@ff0f0000", + [BROM_BOOTSOURCE_SPINOR] = "/spi@ff120000/flash@0", [BROM_BOOTSOURCE_SD] = "/mmc@ff0c0000", }; diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig index d7e4af31f24..39049ab35a9 100644 --- a/arch/arm/mach-rockchip/rk3588/Kconfig +++ b/arch/arm/mach-rockchip/rk3588/Kconfig @@ -66,7 +66,7 @@ config TARGET_NANOPCT6_RK3588 HDMI2.0, and HDMI1.4 2x 4-lane MIPI-DSI, compatible with MIPI DPHY 2.0 or CPHY 1.1 USB-A: USB 3.0, Type A - USB-C: Full function USB Type‑C port, DP display up to 4Kp60, USB 3.0 + USB-C: Full function USB Type-C port, DP display up to 4Kp60, USB 3.0 40-pin 2.54mm header connector: up to 2x SPIs, 6x UARTs, 1x I2Cs, 8x PWMs, 2x I2Ss, 28x GPIOs Debug UART: 3 Pin 2.54mm header, 3V level, 1500000bps @@ -117,7 +117,7 @@ config TARGET_ROCK5A_RK3588 Mali G610MC4 GPU MIPI CSI 2 multiple lanes connector 4-lane MIPI DSI connector - Audio – 3.5mm earphone jack + Audio - 3.5mm earphone jack eMMC module connector uSD slot (up to 128GB) 2x USB 2.0, 2x USB 3.0 @@ -197,7 +197,7 @@ config TARGET_TOYBRICK_RK3588 4x ARM Cortex-A76, 4x ARM Cortex-A55 8/16GB Memory LPDDR4x Mali G610MC4 GPU - 2× MIPI-CSI0 Connector + 2x MIPI-CSI0 Connector 1x 2Lanes PCIe3.0 Connector 1x SATA3.0 Connector 32GB eMMC Module @@ -221,14 +221,14 @@ config ROCKCHIP_COMMON_STACK_ADDR config TEXT_BASE default 0x00a00000 -source board/edgeble/neural-compute-module-6/Kconfig -source board/friendlyelec/nanopc-t6-rk3588/Kconfig -source board/pine64/quartzpro64-rk3588/Kconfig -source board/turing/turing-rk1-rk3588/Kconfig -source board/radxa/rock5a-rk3588s/Kconfig -source board/radxa/rock5b-rk3588/Kconfig -source board/rockchip/evb_rk3588/Kconfig -source board/rockchip/toybrick_rk3588/Kconfig -source board/theobroma-systems/jaguar_rk3588/Kconfig +source "board/edgeble/neural-compute-module-6/Kconfig" +source "board/friendlyelec/nanopc-t6-rk3588/Kconfig" +source "board/pine64/quartzpro64-rk3588/Kconfig" +source "board/turing/turing-rk1-rk3588/Kconfig" +source "board/radxa/rock5a-rk3588s/Kconfig" +source "board/radxa/rock5b-rk3588/Kconfig" +source "board/rockchip/evb_rk3588/Kconfig" +source "board/rockchip/toybrick_rk3588/Kconfig" +source "board/theobroma-systems/jaguar_rk3588/Kconfig" endif diff --git a/arch/arm/mach-rockchip/rv1108/Kconfig b/arch/arm/mach-rockchip/rv1108/Kconfig index a12216dccf6..28ed0b24581 100644 --- a/arch/arm/mach-rockchip/rv1108/Kconfig +++ b/arch/arm/mach-rockchip/rv1108/Kconfig @@ -36,7 +36,7 @@ config SYS_SOC config SYS_MALLOC_F_LEN default 0x400 -source board/rockchip/evb_rv1108/Kconfig -source board/elgin/elgin_rv1108/Kconfig +source "board/rockchip/evb_rv1108/Kconfig" +source "board/elgin/elgin_rv1108/Kconfig" endif diff --git a/arch/arm/mach-rockchip/rv1126/Kconfig b/arch/arm/mach-rockchip/rv1126/Kconfig index 55b11121203..330b7df2312 100644 --- a/arch/arm/mach-rockchip/rv1126/Kconfig +++ b/arch/arm/mach-rockchip/rv1126/Kconfig @@ -6,8 +6,8 @@ config TARGET_RV1126_NEU2 Neu2: Neural Compute Module 2(Neu2) is a 96boards SoM-CB compute module based on Rockchip RV1126 from Edgeble AI. - Neu2 powered with Consumer grade (0 to +80 °C) RV1126 SoC. - Neu2k powered with Industrial grade (-40 °C to +85 °C) RV1126K SoC. + Neu2 powered with Consumer grade (0 to +80 deg C) RV1126 SoC. + Neu2k powered with Industrial grade (-40 C to +85 deg C) RV1126K SoC. Neu2-IO: Neural Compute Module 2(Neu2) IO board is an industrial form factor @@ -64,7 +64,7 @@ config SYS_MALLOC_F_LEN config TEXT_BASE default 0x600000 -source board/edgeble/neural-compute-module-2/Kconfig -source board/itead/sonoff-ihost/Kconfig +source "board/edgeble/neural-compute-module-2/Kconfig" +source "board/itead/sonoff-ihost/Kconfig" endif diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c index 8589c46f10a..40eb9eb7b19 100644 --- a/arch/arm/mach-rockchip/rv1126/rv1126.c +++ b/arch/arm/mach-rockchip/rv1126/rv1126.c @@ -15,6 +15,7 @@ const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { [BROM_BOOTSOURCE_EMMC] = "/mmc@ffc50000", + [BROM_BOOTSOURCE_SPINOR] = "/spi@ffc90000/flash@0", [BROM_BOOTSOURCE_SD] = "/mmc@ffc60000", }; diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c index 0d9a0aef6f5..f2a3d6b1400 100644 --- a/arch/arm/mach-rockchip/sdram.c +++ b/arch/arm/mach-rockchip/sdram.c @@ -8,6 +8,7 @@ #include <init.h> #include <log.h> #include <ram.h> +#include <asm/armv8/mmu.h> #include <asm/global_data.h> #include <asm/io.h> #include <asm/arch-rockchip/sdram.h> @@ -35,12 +36,271 @@ struct tos_parameter_t { s64 reserve[8]; }; +#ifdef CONFIG_ARM64 +/* Tag size and offset */ +#define ATAGS_SIZE SZ_8K +#define ATAGS_OFFSET (SZ_2M - ATAGS_SIZE) +#define ATAGS_PHYS_BASE (CFG_SYS_SDRAM_BASE + ATAGS_OFFSET) +#define ATAGS_PHYS_END (ATAGS_PHYS_BASE + ATAGS_SIZE) + +/* ATAGS memory structures */ + +enum tag_magic { + ATAG_NONE, + ATAG_CORE = 0x54410001, + ATAG_SERIAL = 0x54410050, + ATAG_DDR_MEM = 0x54410052, + ATAG_MAX = 0x544100ff, +}; + +/* + * An ATAG contains the following data: + * - header + * u32 size // sizeof(header + tag data) / sizeof(u32) + * u32 magic + * - tag data + */ + +struct tag_header { + u32 size; + u32 magic; +} __packed; + +/* + * DDR_MEM tag bank is storing data this way: + * - address0 + * - address1 + * - [...] + * - addressX + * - size0 + * - size1 + * - [...] + * - sizeX + * + * with X being tag_ddr_mem.count - 1. + */ +struct tag_ddr_mem { + u32 count; + u32 version; + u64 bank[20]; + u32 flags; + u32 data[2]; + u32 hash; +} __packed; + +static u32 js_hash(const void *buf, u32 len) +{ + u32 i, hash = 0x47C6A7E6; + + if (!buf || !len) + return hash; + + for (i = 0; i < len; i++) + hash ^= ((hash << 5) + ((const char *)buf)[i] + (hash >> 2)); + + return hash; +} + +static int rockchip_dram_init_banksize(void) +{ + const struct tag_header *tag_h = NULL; + u32 *addr = (void *)ATAGS_PHYS_BASE; + struct tag_ddr_mem *ddr_info; + u32 calc_hash; + u8 i, j; + + if (!IS_ENABLED(CONFIG_ROCKCHIP_RK3588) && + !IS_ENABLED(CONFIG_ROCKCHIP_RK3568)) + return -ENOTSUPP; + + if (!IS_ENABLED(CONFIG_ROCKCHIP_EXTERNAL_TPL)) + return -ENOTSUPP; + + /* Find DDR_MEM tag */ + while (addr < (u32 *)ATAGS_PHYS_END) { + tag_h = (const struct tag_header *)addr; + + if (!tag_h->size) { + debug("End of ATAGS (0-size tag), no DDR_MEM found\n"); + return -ENODATA; + } + + if (tag_h->magic == ATAG_DDR_MEM) + break; + + switch (tag_h->magic) { + case ATAG_NONE: + case ATAG_CORE: + case ATAG_SERIAL ... ATAG_MAX: + addr += tag_h->size; + continue; + default: + debug("Invalid magic (0x%08x) for ATAG at 0x%p\n", + tag_h->magic, addr); + return -EINVAL; + } + } + + if (addr >= (u32 *)ATAGS_PHYS_END || + (tag_h && (addr + tag_h->size > (u32 *)ATAGS_PHYS_END))) { + debug("End of ATAGS, no DDR_MEM found\n"); + return -ENODATA; + } + + /* Data is right after the magic member of the tag_header struct */ + ddr_info = (struct tag_ddr_mem *)(&tag_h->magic + 1); + if (!ddr_info->count || ddr_info->count > CONFIG_NR_DRAM_BANKS) { + debug("Too many ATAG banks, got (%d) but max allowed (%d)\n", + ddr_info->count, CONFIG_NR_DRAM_BANKS); + return -ENOMEM; + } + + if (!ddr_info->hash) { + debug("No hash for tag (0x%08x)\n", tag_h->magic); + } else { + calc_hash = js_hash(addr, sizeof(u32) * (tag_h->size - 1)); + + if (calc_hash != ddr_info->hash) { + debug("Incorrect hash for tag (0x%08x), got (0x%08x) expected (0x%08x)\n", + tag_h->magic, ddr_info->hash, calc_hash); + return -EINVAL; + } + } + + /* + * Rockchip guaranteed DDR_MEM is ordered so no need to worry about + * bi_dram order. + */ + for (i = 0, j = 0; i < ddr_info->count; i++, j++) { + phys_size_t size = ddr_info->bank[(i + ddr_info->count)]; + phys_addr_t start_addr = ddr_info->bank[i]; + struct mm_region *tmp_mem_map = mem_map; + phys_addr_t end_addr; + + /* + * BL31 (TF-A) reserves the first 2MB but DDR_MEM tag may not + * have it, so force this space as reserved. + */ + if (start_addr < SZ_2M) { + size -= SZ_2M - start_addr; + start_addr = SZ_2M; + } + + /* + * Put holes for reserved memory areas from mem_map. + * + * Only check for at most one overlap with one reserved memory + * area. + */ + while (tmp_mem_map->size) { + const phys_addr_t rsrv_start = tmp_mem_map->phys; + const phys_size_t rsrv_size = tmp_mem_map->size; + const phys_addr_t rsrv_end = rsrv_start + rsrv_size; + + /* + * DRAM memories are expected by Arm to be marked as + * Normal Write-back cacheable, Inner shareable[1], so + * let's filter on that to put holes in non-DRAM areas. + * + * [1] https://developer.arm.com/documentation/102376/0200/Cacheability-and-shareability-attributes + */ + const u64 dram_attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE; + /* + * (AttrIndx | SH) in Lower Attributes of Block + * Descriptor[2]. + * [2] https://developer.arm.com/documentation/102376/0200/Describing-memory-in-AArch64 + */ + const u64 attrs_mask = PMD_ATTRINDX_MASK | GENMASK(9, 8); + + if ((tmp_mem_map->attrs & attrs_mask) == dram_attrs) { + tmp_mem_map++; + continue; + } + + /* + * If the start of the DDR_MEM tag is in a reserved + * memory area, move start address and resize. + */ + if (start_addr >= rsrv_start && start_addr < rsrv_end) { + if (rsrv_end - start_addr > size) { + debug("Would be negative memory size\n"); + return -EINVAL; + } + + size -= rsrv_end - start_addr; + start_addr = rsrv_end; + break; + } + + if (start_addr < rsrv_start) { + end_addr = start_addr + size; + + if (end_addr <= rsrv_start) { + tmp_mem_map++; + continue; + } + + /* + * If the memory area overlaps a reserved memory + * area with start address outside of reserved + * memory area and... + * + * ... ends in the middle of reserved memory + * area, resize. + */ + if (end_addr <= rsrv_end) { + size = rsrv_start - start_addr; + break; + } + + /* + * ... ends after the reserved memory area, + * split the region in two, one for before the + * reserved memory area and one for after. + */ + gd->bd->bi_dram[j].start = start_addr; + gd->bd->bi_dram[j].size = rsrv_start - start_addr; + + j++; + + size = end_addr - rsrv_end; + start_addr = rsrv_end; + + break; + } + + tmp_mem_map++; + } + + if (j > CONFIG_NR_DRAM_BANKS) { + debug("Too many banks, max allowed (%d)\n", + CONFIG_NR_DRAM_BANKS); + return -ENOMEM; + } + + gd->bd->bi_dram[j].start = start_addr; + gd->bd->bi_dram[j].size = size; + } + + return 0; +} +#endif + int dram_init_banksize(void) { size_t ram_top = (unsigned long)(gd->ram_size + CFG_SYS_SDRAM_BASE); size_t top = min((unsigned long)ram_top, (unsigned long)(gd->ram_top)); #ifdef CONFIG_ARM64 + int ret = rockchip_dram_init_banksize(); + + if (!ret) + return ret; + + debug("Couldn't use ATAG (%d) to detect DDR layout, falling back...\n", + ret); + /* Reserve 0x200000 for ATF bl31 */ gd->bd->bi_dram[0].start = 0x200000; gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start; diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c index 79c856d2a0a..3543267aa57 100644 --- a/arch/arm/mach-rockchip/spl-boot-order.c +++ b/arch/arm/mach-rockchip/spl-boot-order.c @@ -29,7 +29,7 @@ * -ENOSYS, if the device matching the node can not be mapped onto a * SPL boot device (e.g. the third MMC device) * -1, for unspecified failures - * a positive integer (from the BOOT_DEVICE_... family) on succes. + * a positive integer (from the BOOT_DEVICE_... family) on success. */ static int spl_node_to_boot_device(int node) @@ -148,8 +148,8 @@ void board_boot_order(u32 *spl_boot_list) /* Try to map this back onto SPL boot devices */ boot_device = spl_node_to_boot_device(node); if (boot_device < 0) { - debug("%s: could not map node @%x to a boot-device\n", - __func__, node); + debug("%s: could not map node %s to a boot-device\n", + __func__, conf); continue; } diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index 1586a093fc3..3ce7e792b5a 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -32,18 +32,26 @@ __weak const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { const char *board_spl_was_booted_from(void) { - u32 bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR); + static u32 brom_bootsource_id_cache = BROM_BOOTSOURCE_UNKNOWN; + u32 bootdevice_brom_id; const char *bootdevice_ofpath = NULL; + if (brom_bootsource_id_cache != BROM_BOOTSOURCE_UNKNOWN) + bootdevice_brom_id = brom_bootsource_id_cache; + else + bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR); + if (bootdevice_brom_id < ARRAY_SIZE(boot_devices)) bootdevice_ofpath = boot_devices[bootdevice_brom_id]; - if (bootdevice_ofpath) + if (bootdevice_ofpath) { + brom_bootsource_id_cache = bootdevice_brom_id; debug("%s: brom_bootdevice_id %x maps to '%s'\n", __func__, bootdevice_brom_id, bootdevice_ofpath); - else + } else { debug("%s: failed to resolve brom_bootdevice_id %x\n", __func__, bootdevice_brom_id); + } return bootdevice_ofpath; } diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig index 96e44e2c549..536960b83c3 100644 --- a/arch/arm/mach-snapdragon/Kconfig +++ b/arch/arm/mach-snapdragon/Kconfig @@ -4,7 +4,12 @@ config SYS_SOC default "snapdragon" config SYS_VENDOR + string "Snapdragon board vendor" default "qualcomm" + help + Allows to specify vendor for the Snapdragon SoCs based boards. + Based on this option board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> + will be used as the custom board directory. config SYS_MALLOC_F_LEN default 0x2000 @@ -19,12 +24,11 @@ config LNX_KRNL_IMG_TEXT_OFFSET_BASE default 0x80000000 config SYS_BOARD - string "Qualcomm custom board" + string "Snapdragon SoCs based board" help - The Dragonboard 410c and 820c have additional board init - code that isn't shared with other Qualcomm boards. - Based on this option board/qualcomm/<CONFIG_SYS_BOARD> will - be used. + Allows to specify the Snapdragon SoCs based board name. + Based on this option board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> + will be used as the custom board directory. config SYS_CONFIG_NAME string "Board configuration name" diff --git a/arch/arm/mach-snapdragon/of_fixup.c b/arch/arm/mach-snapdragon/of_fixup.c index 3f7ac227bd0..55368dd43b6 100644 --- a/arch/arm/mach-snapdragon/of_fixup.c +++ b/arch/arm/mach-snapdragon/of_fixup.c @@ -17,6 +17,8 @@ * Author: Caleb Connolly <caleb.connolly@linaro.org> */ +#define pr_fmt(fmt) "of_fixup: " fmt + #include <dt-bindings/input/linux-event-codes.h> #include <dm/of_access.h> #include <dm/of.h> @@ -153,3 +155,21 @@ void qcom_of_fixup_nodes(void) time_call(fixup_usb_nodes); time_call(fixup_power_domains); } + +int ft_board_setup(void *blob, struct bd_info __maybe_unused *bd) +{ + struct fdt_header *fdt = blob; + int node; + + /* We only want to do this fix-up for the RB1 board, quick return for all others */ + if (!fdt_node_check_compatible(fdt, 0, "qcom,qrb4210-rb2")) + return 0; + + fdt_for_each_node_by_compatible(node, blob, 0, "snps,dwc3") { + log_debug("%s: Setting 'dr_mode' to OTG\n", fdt_get_name(blob, node, NULL)); + fdt_setprop_string(fdt, node, "dr_mode", "otg"); + break; + } + + return 0; +} diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig b/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig index 8f91db4b46b..589276282e4 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig @@ -17,6 +17,7 @@ config CMD_STM32PROG config CMD_STM32PROG_USB bool "support stm32prog over USB" depends on CMD_STM32PROG + depends on USB_GADGET_DOWNLOAD default y help activate the command "stm32prog usb" for STM32MP soc family diff --git a/arch/arm/mach-stm32mp/stm32mp1/Makefile b/arch/arm/mach-stm32mp/stm32mp1/Makefile index 857148747ef..ebae50f66c9 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/Makefile +++ b/arch/arm/mach-stm32mp/stm32mp1/Makefile @@ -8,7 +8,6 @@ obj-y += cpu.o obj-$(CONFIG_STM32MP13X) += stm32mp13x.o obj-$(CONFIG_STM32MP15X) += stm32mp15x.o -obj-$(CONFIG_STM32_ECDSA_VERIFY) += ecdsa_romapi.o ifdef CONFIG_SPL_BUILD obj-y += spl.o obj-y += tzc400.o diff --git a/arch/arm/mach-stm32mp/stm32mp1/psci.c b/arch/arm/mach-stm32mp/stm32mp1/psci.c index 8cdeb0ab3f2..4f2379df45f 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/psci.c +++ b/arch/arm/mach-stm32mp/stm32mp1/psci.c @@ -703,6 +703,8 @@ void __secure psci_system_suspend(u32 __always_unused function_id, { u32 saved_mcudivr, saved_pll3cr, saved_pll4cr, saved_mssckselr; u32 gicd_addr = stm32mp_get_gicd_base_address(); + u32 cpu = psci_get_cpu_id(); + u32 sp = (u32)__secure_stack_end - (cpu << ARM_PSCI_STACK_SHIFT); bool iwdg1_wake = false; bool iwdg2_wake = false; bool other_wake = false; @@ -805,4 +807,16 @@ void __secure psci_system_suspend(u32 __always_unused function_id, writel(SYSCFG_CMPENR_MPUEN, STM32_SYSCFG_BASE + SYSCFG_CMPENSETR); clrbits_le32(STM32_SYSCFG_BASE + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL); + + /* + * The system has resumed successfully. Rewrite LR register stored + * on stack with 'ep' value, so that on return from this PSCI call, + * the code would jump to that 'ep' resume entry point code path + * instead of the previous 'lr' register content which (e.g. with + * Linux) points to resume failure code path. + * + * See arch/arm/cpu/armv7/psci.S _smc_psci: for the stack layout + * used here, SP-4 is PC, SP-8 is LR, SP-12 is R7, and so on. + */ + writel(ep, sp - 8); } diff --git a/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c b/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c index afc56b02eea..d75ec99d6a1 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c +++ b/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c @@ -14,6 +14,7 @@ #include <asm/arch/sys_proto.h> #include <dm/device.h> #include <dm/uclass.h> +#include <linux/bitfield.h> /* RCC register */ #define RCC_TZCR (STM32_RCC_BASE + 0x00) @@ -41,6 +42,9 @@ #define TZC_REGION_ID_ACCESS0 (STM32_TZC_BASE + 0x114) #define TAMP_CR1 (STM32_TAMP_BASE + 0x00) +#define TAMP_SMCR (STM32_TAMP_BASE + 0x20) +#define TAMP_SMCR_BKPRWDPROT GENMASK(7, 0) +#define TAMP_SMCR_BKPWDPROT GENMASK(23, 16) #define PWR_CR1 (STM32_PWR_BASE + 0x00) #define PWR_MCUCR (STM32_PWR_BASE + 0x14) @@ -136,6 +140,18 @@ static void security_init(void) */ writel(0x0, TAMP_CR1); + /* + * TAMP: Configure non-zero secure protection settings. This is + * checked by BootROM function 35ac on OTP-CLOSED device during + * CPU core 1 release from endless loop. If secure protection + * fields are zero, the core 1 is not released from endless + * loop on second SGI0. + */ + clrsetbits_le32(TAMP_SMCR, + TAMP_SMCR_BKPRWDPROT | TAMP_SMCR_BKPWDPROT, + FIELD_PREP(TAMP_SMCR_BKPRWDPROT, 0x20) | + FIELD_PREP(TAMP_SMCR_BKPWDPROT, 0x20)); + /* GPIOZ: deactivate the security */ writel(BIT(0), RCC_MP_AHB5ENSETR); writel(0x0, GPIOZ_SECCFGR); @@ -322,8 +338,23 @@ void get_soc_name(char name[SOC_NAME_SIZE]) get_cpu_string_offsets(&type, &pkg, &rev); - snprintf(name, SOC_NAME_SIZE, "STM32MP%s%s Rev.%s", - soc_type[type], soc_pkg[pkg], soc_rev[rev]); + if (bsec_dbgswenable()) { + snprintf(name, SOC_NAME_SIZE, "STM32MP%s%s Rev.%s", + soc_type[type], soc_pkg[pkg], soc_rev[rev]); + } else { + /* + * SoC revision is only accessible via DBUMCU IDC register, + * which requires BSEC.DENABLE DBGSWENABLE bit to be set to + * make the register accessible, otherwise an access to the + * register triggers bus fault. As BSEC.DBGSWENABLE is zero + * in case of an OTP-CLOSED system, do NOT set DBGSWENABLE + * bit as this might open a brief window for timing attacks. + * Instead, report that this system is OTP-CLOSED and do not + * report any SoC revision to avoid confusing users. + */ + snprintf(name, SOC_NAME_SIZE, "STM32MP%s%s SEC/C", + soc_type[type], soc_pkg[pkg]); + } } static void setup_soc_type_pkg_rev(void) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index fe89aec6b9a..ddf9414b08e 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -1078,7 +1078,7 @@ config SPL_STACK_R_ADDR config SPL_SPI_SUNXI bool "Support for SPI Flash on Allwinner SoCs in SPL" - depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || SUN50I_GEN_H6 || MACH_SUNIV + depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || SUN50I_GEN_H6 || MACH_SUNIV || SUNXI_GEN_NCAT2 help Enable support for SPI Flash. This option allows SPL to read from sunxi SPI Flash. It uses the same method as the boot ROM, so does diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile index 1d4c70ec352..3f83c0280ef 100644 --- a/arch/arm/mach-sunxi/Makefile +++ b/arch/arm/mach-sunxi/Makefile @@ -7,7 +7,6 @@ # Wolfgang Denk, DENX Software Engineering, wd@denx.de. obj-y += board.o -obj-y += clock.o obj-y += cpu_info.o obj-y += dram_helpers.o obj-$(CONFIG_SUN6I_PRCM) += prcm.o @@ -31,6 +30,7 @@ obj-y += timer.o endif ifdef CONFIG_SPL_BUILD +obj-y += clock.o obj-$(CONFIG_MACH_SUNIV) += dram_suniv.o obj-$(CONFIG_DRAM_SUN4I) += dram_sun4i.o obj-$(CONFIG_DRAM_SUN6I) += dram_sun6i.o diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index f4dbb2a740b..0140b07d32a 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -458,10 +458,8 @@ void board_init_f(ulong dummy) { sunxi_sram_init(); -#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3 /* Enable non-secure access to some peripherals */ tzpc_init(); -#endif clock_init(); timer_init(); diff --git a/arch/arm/mach-sunxi/clock.c b/arch/arm/mach-sunxi/clock.c index b6c68c94f67..5e9fa0d0748 100644 --- a/arch/arm/mach-sunxi/clock.c +++ b/arch/arm/mach-sunxi/clock.c @@ -23,10 +23,8 @@ __weak void gtbus_init(void) int clock_init(void) { -#ifdef CONFIG_SPL_BUILD clock_init_safe(); gtbus_init(); -#endif clock_init_uart(); clock_init_sec(); diff --git a/arch/arm/mach-sunxi/clock_sun4i.c b/arch/arm/mach-sunxi/clock_sun4i.c index ac3b7a801f4..6458d066f7e 100644 --- a/arch/arm/mach-sunxi/clock_sun4i.c +++ b/arch/arm/mach-sunxi/clock_sun4i.c @@ -43,7 +43,6 @@ void clock_init_safe(void) setbits_le32(&ccm->pll6_cfg, 0x1 << CCM_PLL6_CTRL_SATA_EN_SHIFT); #endif } -#endif void clock_init_uart(void) { @@ -77,7 +76,6 @@ int clock_twi_onoff(int port, int state) return 0; } -#ifdef CONFIG_SPL_BUILD #define PLL1_CFG(N, K, M, P) ( 1 << CCM_PLL1_CFG_ENABLE_SHIFT | \ 0 << CCM_PLL1_CFG_VCO_RST_SHIFT | \ 8 << CCM_PLL1_CFG_VCO_BIAS_SHIFT | \ @@ -177,8 +175,9 @@ void clock_set_pll1(unsigned int hz) &ccm->cpu_ahb_apb0_cfg); sdelay(20); } -#endif +#endif /* CONFIG_SPL_BUILD */ +/* video, DRAM, PLL_PERIPH clocks */ void clock_set_pll3(unsigned int clk) { struct sunxi_ccm_reg * const ccm = diff --git a/arch/arm/mach-sunxi/clock_sun50i_h6.c b/arch/arm/mach-sunxi/clock_sun50i_h6.c index dac3663e1be..cc2ee336416 100644 --- a/arch/arm/mach-sunxi/clock_sun50i_h6.c +++ b/arch/arm/mach-sunxi/clock_sun50i_h6.c @@ -51,7 +51,6 @@ void clock_init_safe(void) */ writel(MBUS_CLK_SRC_PLL6X2 | MBUS_CLK_M(3), &ccm->mbus_cfg); } -#endif void clock_init_uart(void) { @@ -73,7 +72,6 @@ void clock_init_uart(void) 1 << (RESET_SHIFT + CONFIG_CONS_INDEX - 1)); } -#ifdef CONFIG_SPL_BUILD void clock_set_pll1(unsigned int clk) { struct sunxi_ccm_reg * const ccm = @@ -105,33 +103,6 @@ void clock_set_pll1(unsigned int clk) val |= CCM_CPU_AXI_MUX_PLL_CPUX; writel(val, &ccm->cpu_axi_cfg); } -#endif - -unsigned int clock_get_pll6(void) -{ - struct sunxi_ccm_reg *const ccm = - (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - uint32_t rval = readl(&ccm->pll6_cfg); - int n = ((rval & CCM_PLL6_CTRL_N_MASK) >> CCM_PLL6_CTRL_N_SHIFT) + 1; - int div2 = ((rval & CCM_PLL6_CTRL_DIV2_MASK) >> - CCM_PLL6_CTRL_DIV2_SHIFT) + 1; - int div1, m; - - if (IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) { - div1 = ((rval & CCM_PLL6_CTRL_P0_MASK) >> - CCM_PLL6_CTRL_P0_SHIFT) + 1; - m = 1; - } else { - div1 = ((rval & CCM_PLL6_CTRL_DIV1_MASK) >> - CCM_PLL6_CTRL_DIV1_SHIFT) + 1; - if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) - m = 4; - else - m = 2; - } - - return 24000000U * n / m / div1 / div2; -} int clock_twi_onoff(int port, int state) { @@ -160,3 +131,31 @@ int clock_twi_onoff(int port, int state) return 0; } +#endif /* CONFIG_SPL_BUILD */ + +/* PLL_PERIPH0 clock, used by the MMC driver */ +unsigned int clock_get_pll6(void) +{ + struct sunxi_ccm_reg *const ccm = + (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + uint32_t rval = readl(&ccm->pll6_cfg); + int n = ((rval & CCM_PLL6_CTRL_N_MASK) >> CCM_PLL6_CTRL_N_SHIFT) + 1; + int div2 = ((rval & CCM_PLL6_CTRL_DIV2_MASK) >> + CCM_PLL6_CTRL_DIV2_SHIFT) + 1; + int div1, m; + + if (IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) { + div1 = ((rval & CCM_PLL6_CTRL_P0_MASK) >> + CCM_PLL6_CTRL_P0_SHIFT) + 1; + m = 1; + } else { + div1 = ((rval & CCM_PLL6_CTRL_DIV1_MASK) >> + CCM_PLL6_CTRL_DIV1_SHIFT) + 1; + if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) + m = 4; + else + m = 2; + } + + return 24000000U * n / m / div1 / div2; +} diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c index aad9df282ec..59f7e15ffe8 100644 --- a/arch/arm/mach-sunxi/clock_sun6i.c +++ b/arch/arm/mach-sunxi/clock_sun6i.c @@ -62,7 +62,6 @@ void clock_init_safe(void) setbits_le32(&ccm->sata_clk_cfg, CCM_SATA_CTRL_ENABLE); #endif } -#endif /* CONFIG_SPL_BUILD */ void clock_init_sec(void) { @@ -124,7 +123,6 @@ void clock_init_uart(void) #endif } -#ifdef CONFIG_SPL_BUILD void clock_set_pll1(unsigned int clk) { struct sunxi_ccm_reg * const ccm = @@ -173,6 +171,7 @@ void clock_set_pll1(unsigned int clk) } #endif /* CONFIG_SPL_BUILD */ +/* video, DRAM, PLL_PERIPH clocks */ void clock_set_pll3(unsigned int clk) { struct sunxi_ccm_reg * const ccm = diff --git a/arch/arm/mach-sunxi/clock_sun8i_a83t.c b/arch/arm/mach-sunxi/clock_sun8i_a83t.c index 198fe9dbd73..9eeba084f95 100644 --- a/arch/arm/mach-sunxi/clock_sun8i_a83t.c +++ b/arch/arm/mach-sunxi/clock_sun8i_a83t.c @@ -46,7 +46,6 @@ void clock_init_safe(void) /* timestamp */ writel(1, 0x01720000); } -#endif void clock_init_uart(void) { @@ -70,7 +69,6 @@ void clock_init_uart(void) CONFIG_CONS_INDEX - 1)); } -#ifdef CONFIG_SPL_BUILD void clock_set_pll1(unsigned int clk) { struct sunxi_ccm_reg * const ccm = @@ -102,8 +100,9 @@ void clock_set_pll1(unsigned int clk) CPU_CLK_SRC_PLL1 << C1_CPUX_CLK_SRC_SHIFT, &ccm->cpu_axi_cfg); } -#endif +#endif /* CONFIG_SPL_BUILD */ +/* DRAM and PLL_PERIPH0 clock (used by the MMC driver) */ void clock_set_pll5(unsigned int clk) { struct sunxi_ccm_reg * const ccm = diff --git a/arch/arm/mach-sunxi/clock_sun9i.c b/arch/arm/mach-sunxi/clock_sun9i.c index edaff9a28ce..5913e40cb65 100644 --- a/arch/arm/mach-sunxi/clock_sun9i.c +++ b/arch/arm/mach-sunxi/clock_sun9i.c @@ -17,6 +17,52 @@ #ifdef CONFIG_SPL_BUILD +static void clock_set_pll2(unsigned int clk) +{ + struct sunxi_ccm_reg * const ccm = + (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + const int p = 0; + + /* Switch cluster 1 to 24MHz clock while changing PLL2 */ + clrsetbits_le32(&ccm->cpu_clk_source, C1_CPUX_CLK_SRC_MASK, + C1_CPUX_CLK_SRC_OSC24M); + + writel(CCM_PLL2_CTRL_EN | CCM_PLL2_CTRL_P(p) | + CCM_PLL2_CLOCK_TIME_2 | CCM_PLL2_CTRL_N(clk / 24000000), + &ccm->pll2_c1_cfg); + + sdelay(2000); + + /* Switch cluster 1 back to PLL2 */ + clrsetbits_le32(&ccm->cpu_clk_source, C1_CPUX_CLK_SRC_MASK, + C1_CPUX_CLK_SRC_PLL2); +} + +static void clock_set_pll4(unsigned int clk) +{ + struct sunxi_ccm_reg * const ccm = + (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + + writel(CCM_PLL4_CTRL_EN | CCM_PLL4_CTRL_N(clk / 24000000), + &ccm->pll4_periph0_cfg); + + sdelay(2000); +} + +static void clock_set_pll12(unsigned int clk) +{ + struct sunxi_ccm_reg * const ccm = + (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + + if (readl(&ccm->pll12_periph1_cfg) & CCM_PLL12_CTRL_EN) + return; + + writel(CCM_PLL12_CTRL_EN | CCM_PLL12_CTRL_N(clk / 24000000), + &ccm->pll12_periph1_cfg); + + sdelay(2000); +} + void clock_init_safe(void) { struct sunxi_ccm_reg * const ccm = @@ -63,7 +109,6 @@ void clock_init_safe(void) /* set enable-bit in TSTAMP_CTRL_REG */ writel(1, 0x01720000); } -#endif void clock_init_uart(void) { @@ -80,7 +125,6 @@ void clock_init_uart(void) CONFIG_CONS_INDEX - 1)); } -#ifdef CONFIG_SPL_BUILD void clock_set_pll1(unsigned int clk) { struct sunxi_ccm_reg * const ccm = @@ -108,27 +152,6 @@ void clock_set_pll1(unsigned int clk) C0_CPUX_CLK_SRC_PLL1); } -void clock_set_pll2(unsigned int clk) -{ - struct sunxi_ccm_reg * const ccm = - (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - const int p = 0; - - /* Switch cluster 1 to 24MHz clock while changing PLL2 */ - clrsetbits_le32(&ccm->cpu_clk_source, C1_CPUX_CLK_SRC_MASK, - C1_CPUX_CLK_SRC_OSC24M); - - writel(CCM_PLL2_CTRL_EN | CCM_PLL2_CTRL_P(p) | - CCM_PLL2_CLOCK_TIME_2 | CCM_PLL2_CTRL_N(clk / 24000000), - &ccm->pll2_c1_cfg); - - sdelay(2000); - - /* Switch cluster 1 back to PLL2 */ - clrsetbits_le32(&ccm->cpu_clk_source, C1_CPUX_CLK_SRC_MASK, - C1_CPUX_CLK_SRC_PLL2); -} - void clock_set_pll6(unsigned int clk) { struct sunxi_ccm_reg * const ccm = @@ -143,32 +166,6 @@ void clock_set_pll6(unsigned int clk) sdelay(2000); } -void clock_set_pll12(unsigned int clk) -{ - struct sunxi_ccm_reg * const ccm = - (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - - if (readl(&ccm->pll12_periph1_cfg) & CCM_PLL12_CTRL_EN) - return; - - writel(CCM_PLL12_CTRL_EN | CCM_PLL12_CTRL_N(clk / 24000000), - &ccm->pll12_periph1_cfg); - - sdelay(2000); -} - - -void clock_set_pll4(unsigned int clk) -{ - struct sunxi_ccm_reg * const ccm = - (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - - writel(CCM_PLL4_CTRL_EN | CCM_PLL4_CTRL_N(clk / 24000000), - &ccm->pll4_periph0_cfg); - - sdelay(2000); -} -#endif int clock_twi_onoff(int port, int state) { @@ -193,7 +190,9 @@ int clock_twi_onoff(int port, int state) return 0; } +#endif /* CONFIG_SPL_BUILD */ +/* PLL_PERIPH0 clock (used by the MMC driver) */ unsigned int clock_get_pll4_periph0(void) { struct sunxi_ccm_reg *const ccm = diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c index 72faa7171c1..7acb44f52ae 100644 --- a/arch/arm/mach-sunxi/spl_spi_sunxi.c +++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c @@ -72,18 +72,27 @@ #define SUN6I_CTL_ENABLE BIT(0) #define SUN6I_CTL_MASTER BIT(1) #define SUN6I_CTL_SRST BIT(31) +#define SUN6I_TCR_SDM BIT(13) #define SUN6I_TCR_XCH BIT(31) /*****************************************************************************/ -#define CCM_AHB_GATING0 (0x01C20000 + 0x60) -#define CCM_H6_SPI_BGR_REG (0x03001000 + 0x96c) -#ifdef CONFIG_SUN50I_GEN_H6 -#define CCM_SPI0_CLK (0x03001000 + 0x940) +#if IS_ENABLED(CONFIG_SUN50I_GEN_H6) +#define CCM_BASE 0x03001000 +#elif IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2) +#define CCM_BASE 0x02001000 #else -#define CCM_SPI0_CLK (0x01C20000 + 0xA0) +#define CCM_BASE 0x01C20000 #endif -#define SUN6I_BUS_SOFT_RST_REG0 (0x01C20000 + 0x2C0) + +#define CCM_AHB_GATING0 (CCM_BASE + 0x60) +#define CCM_H6_SPI_BGR_REG (CCM_BASE + 0x96c) +#if IS_ENABLED(CONFIG_SUN50I_GEN_H6) || IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2) +#define CCM_SPI0_CLK (CCM_BASE + 0x940) +#else +#define CCM_SPI0_CLK (CCM_BASE + 0xA0) +#endif +#define SUN6I_BUS_SOFT_RST_REG0 (CCM_BASE + 0x2C0) #define AHB_RESET_SPI0_SHIFT 20 #define AHB_GATE_OFFSET_SPI0 20 @@ -101,17 +110,22 @@ */ static void spi0_pinmux_setup(unsigned int pin_function) { - /* All chips use PC0 and PC2. */ - sunxi_gpio_set_cfgpin(SUNXI_GPC(0), pin_function); + /* All chips use PC2. And all chips use PC0, except R528/T113 */ + if (!IS_ENABLED(CONFIG_MACH_SUN8I_R528)) + sunxi_gpio_set_cfgpin(SUNXI_GPC(0), pin_function); + sunxi_gpio_set_cfgpin(SUNXI_GPC(2), pin_function); - /* All chips except H6 and H616 use PC1. */ - if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6)) + /* All chips except H6/H616/R528/T113 use PC1. */ + if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6) && + !IS_ENABLED(CONFIG_MACH_SUN8I_R528)) sunxi_gpio_set_cfgpin(SUNXI_GPC(1), pin_function); - if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) + if (IS_ENABLED(CONFIG_MACH_SUN50I_H6) || + IS_ENABLED(CONFIG_MACH_SUN8I_R528)) sunxi_gpio_set_cfgpin(SUNXI_GPC(5), pin_function); - if (IS_ENABLED(CONFIG_MACH_SUN50I_H616)) + if (IS_ENABLED(CONFIG_MACH_SUN50I_H616) || + IS_ENABLED(CONFIG_MACH_SUN8I_R528)) sunxi_gpio_set_cfgpin(SUNXI_GPC(4), pin_function); /* Older generations use PC23 for CS, newer ones use PC3. */ @@ -125,7 +139,8 @@ static void spi0_pinmux_setup(unsigned int pin_function) static bool is_sun6i_gen_spi(void) { return IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I) || - IS_ENABLED(CONFIG_SUN50I_GEN_H6); + IS_ENABLED(CONFIG_SUN50I_GEN_H6) || + IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2); } static uintptr_t spi0_base_address(void) @@ -136,6 +151,9 @@ static uintptr_t spi0_base_address(void) if (IS_ENABLED(CONFIG_SUN50I_GEN_H6)) return 0x05010000; + if (IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) + return 0x04025000; + if (!is_sun6i_gen_spi() || IS_ENABLED(CONFIG_MACH_SUNIV)) return 0x01C05000; @@ -151,23 +169,30 @@ static void spi0_enable_clock(void) uintptr_t base = spi0_base_address(); /* Deassert SPI0 reset on SUN6I */ - if (IS_ENABLED(CONFIG_SUN50I_GEN_H6)) + if (IS_ENABLED(CONFIG_SUN50I_GEN_H6) || + IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) setbits_le32(CCM_H6_SPI_BGR_REG, (1U << 16) | 0x1); else if (is_sun6i_gen_spi()) setbits_le32(SUN6I_BUS_SOFT_RST_REG0, (1 << AHB_RESET_SPI0_SHIFT)); /* Open the SPI0 gate */ - if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6)) + if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6) && + !IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) setbits_le32(CCM_AHB_GATING0, (1 << AHB_GATE_OFFSET_SPI0)); if (IS_ENABLED(CONFIG_MACH_SUNIV)) { /* Divide by 32, clock source is AHB clock 200MHz */ writel(SPI0_CLK_DIV_BY_32, base + SUN6I_SPI0_CCTL); } else { - /* Divide by 4 */ - writel(SPI0_CLK_DIV_BY_4, base + (is_sun6i_gen_spi() ? - SUN6I_SPI0_CCTL : SUN4I_SPI0_CCTL)); + /* New SoCs do not have a clock divider inside */ + if (!IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) { + /* Divide by 4 */ + writel(SPI0_CLK_DIV_BY_4, + base + (is_sun6i_gen_spi() ? SUN6I_SPI0_CCTL : + SUN4I_SPI0_CCTL)); + } + /* 24MHz from OSC24M */ writel((1 << 31), CCM_SPI0_CLK); } @@ -179,6 +204,14 @@ static void spi0_enable_clock(void) /* Wait for completion */ while (readl(base + SUN6I_SPI0_GCR) & SUN6I_CTL_SRST) ; + + /* + * For new SoCs we should configure sample mode depending on + * input clock. As 24MHz from OSC24M is used, we could use + * normal sample mode by setting SDM bit in the TCR register + */ + if (IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) + setbits_le32(base + SUN6I_SPI0_TCR, SUN6I_TCR_SDM); } else { /* Enable SPI in the master mode and reset FIFO */ setbits_le32(base + SUN4I_SPI0_CTL, SUN4I_CTL_MASTER | @@ -205,11 +238,13 @@ static void spi0_disable_clock(void) writel(0, CCM_SPI0_CLK); /* Close the SPI0 gate */ - if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6)) + if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6) && + !IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) clrbits_le32(CCM_AHB_GATING0, (1 << AHB_GATE_OFFSET_SPI0)); /* Assert SPI0 reset on SUN6I */ - if (IS_ENABLED(CONFIG_SUN50I_GEN_H6)) + if (IS_ENABLED(CONFIG_SUN50I_GEN_H6) || + IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) clrbits_le32(CCM_H6_SPI_BGR_REG, (1U << 16) | 0x1); else if (is_sun6i_gen_spi()) clrbits_le32(SUN6I_BUS_SOFT_RST_REG0, @@ -223,7 +258,8 @@ static void spi0_init(void) if (IS_ENABLED(CONFIG_MACH_SUN50I) || IS_ENABLED(CONFIG_SUN50I_GEN_H6)) pin_function = SUN50I_GPC_SPI0; - else if (IS_ENABLED(CONFIG_MACH_SUNIV)) + else if (IS_ENABLED(CONFIG_MACH_SUNIV) || + IS_ENABLED(CONFIG_MACH_SUN8I_R528)) pin_function = SUNIV_GPC_SPI0; spi0_pinmux_setup(pin_function); diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 05e194de082..04612895576 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -219,6 +219,10 @@ config TEGRA_ENABLE_UARTC config TEGRA_ENABLE_UARTD bool "Use UARTD" +config TEGRA_ENABLE_UARTE + bool "Use UARTE" + depends on TEGRA20 || TEGRA30 + endchoice config TEGRA_GPU diff --git a/arch/m68k/lib/Makefile b/arch/m68k/lib/Makefile index 5ccd9545cb5..6e1fd938f52 100644 --- a/arch/m68k/lib/Makefile +++ b/arch/m68k/lib/Makefile @@ -8,7 +8,7 @@ lib-$(CONFIG_USE_PRIVATE_LIBGCC) += lshrdi3.o muldi3.o ashldi3.o ashrdi3.o obj-y += bdinfo.o -obj-$(CONFIG_BOOTM) += bootm.o +obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-y += cache.o obj-y += interrupts.o obj-y += time.o diff --git a/arch/microblaze/lib/Makefile b/arch/microblaze/lib/Makefile index 2f234825f80..dfd8135f4f2 100644 --- a/arch/microblaze/lib/Makefile +++ b/arch/microblaze/lib/Makefile @@ -3,6 +3,6 @@ # (C) Copyright 2003-2006 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -obj-$(CONFIG_BOOTM) += bootm.o +obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-$(CONFIG_CMD_BDI) += bdinfo.o obj-y += muldi3.o diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index 4386eb4d6d1..1621cc9a1ff 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -10,7 +10,7 @@ obj-y += reloc.o obj-y += stack.o obj-y += traps.o -obj-$(CONFIG_BOOTM) += bootm.o +obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-$(CONFIG_CMD_GO) += boot.o obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/arch/mips/mach-mscc/include/mach/ddr.h b/arch/mips/mach-mscc/include/mach/ddr.h index 3ba33d27c17..58c89d5e645 100644 --- a/arch/mips/mach-mscc/include/mach/ddr.h +++ b/arch/mips/mach-mscc/include/mach/ddr.h @@ -225,7 +225,7 @@ #define VC3_MPAR_FAW VC3_MPAR_tFAW #define VC3_MPAR_BL 4 #define MSCC_MEMPARM_MR0 ((VC3_MPAR_RL - 4) << 4) | ((VC3_MPAR_tWR - 4) << 9) -/* ODT_RTT: “0x0040” for 120ohm, and “0x0004” for 60ohm. */ +/* ODT_RTT: "0x0040" for 120ohm, and "0x0004" for 60ohm. */ #define MSCC_MEMPARM_MR1 0x0040 #define MSCC_MEMPARM_MR2 ((VC3_MPAR_WL - 5) << 3) #define MSCC_MEMPARM_MR3 0 diff --git a/arch/mips/mach-octeon/include/mach/cvmx-helper-pki.h b/arch/mips/mach-octeon/include/mach/cvmx-helper-pki.h index ff32dab67b5..25e2877469a 100644 --- a/arch/mips/mach-octeon/include/mach/cvmx-helper-pki.h +++ b/arch/mips/mach-octeon/include/mach/cvmx-helper-pki.h @@ -267,7 +267,7 @@ void cvmx_helper_pki_set_fcs_op(int node, int interface, int nports, int has_fcs * buffer separate from the work queue entry. Words following the * WQE in the same cache line will be zeroed, other lines in the * buffer will not be modified and will retain stale data (from the - * buffer’s previous use). This setting may decrease the peak PKI + * buffer's previous use). This setting may decrease the peak PKI * performance by up to half on small packets. */ void cvmx_helper_pki_set_wqe_mode(int node, bool pkt_outside_wqe); diff --git a/arch/mips/mach-octeon/include/mach/cvmx-pki.h b/arch/mips/mach-octeon/include/mach/cvmx-pki.h index c1feb55a1f0..d918f792eee 100644 --- a/arch/mips/mach-octeon/include/mach/cvmx-pki.h +++ b/arch/mips/mach-octeon/include/mach/cvmx-pki.h @@ -110,8 +110,8 @@ enum cvmx_pki_wqe_vlan { CVMX_PKI_USE_FIRST_VLAN = 0, CVMX_PKI_USE_SECOND_VLAN } * Controls how the PKI statistics counters are handled * The PKI_STAT*_X registers can be indexed either by port kind (pkind), or * final style. (Does not apply to the PKI_STAT_INB* registers.) - * 0 = X represents the packet’s pkind - * 1 = X represents the low 6-bits of packet’s final style + * 0 = X represents the packet's pkind + * 1 = X represents the low 6-bits of packet's final style */ enum cvmx_pki_stats_mode { CVMX_PKI_STAT_MODE_PKIND, CVMX_PKI_STAT_MODE_STYLE }; @@ -880,7 +880,7 @@ int cvmx_pki_get_pkind_style(int node, int pkind); * buffer separate from the work queue entry. Words following the * WQE in the same cache line will be zeroed, other lines in the * buffer will not be modified and will retain stale data (from the - * buffer’s previous use). This setting may decrease the peak PKI + * buffer's previous use). This setting may decrease the peak PKI * performance by up to half on small packets. */ void cvmx_pki_set_wqe_mode(int node, u64 style, bool pkt_outside_wqe); diff --git a/arch/mips/mach-octeon/include/mach/cvmx-pko3.h b/arch/mips/mach-octeon/include/mach/cvmx-pko3.h index 86f89be855f..bda607203f3 100644 --- a/arch/mips/mach-octeon/include/mach/cvmx-pko3.h +++ b/arch/mips/mach-octeon/include/mach/cvmx-pko3.h @@ -366,7 +366,7 @@ enum cvmx_pko_memalg_e { */ MEMALG_SETRSLT = 2, /* [DSZ] = B64; mem = PKO_MEM_RESULT_S. */ MEMALG_ADD = 8, /* mem = mem + PKO_SEND_MEM_S[OFFSET] */ - MEMALG_SUB = 9, /* mem = mem – PKO_SEND_MEM_S[OFFSET] */ + MEMALG_SUB = 9, /* mem = mem - PKO_SEND_MEM_S[OFFSET] */ MEMALG_ADDLEN = 0xA, /* mem += [OFFSET] + PKO_SEND_HDR_S[TOTAL] */ MEMALG_SUBLEN = 0xB, /* mem -= [OFFSET] + PKO_SEND_HDR_S[TOTAL] */ MEMALG_ADDMBUF = 0xC, /* mem += [OFFSET] + mbufs_freed */ diff --git a/arch/nios2/lib/Makefile b/arch/nios2/lib/Makefile index 68a5ca007d5..a9f3c7100e7 100644 --- a/arch/nios2/lib/Makefile +++ b/arch/nios2/lib/Makefile @@ -4,5 +4,5 @@ # Wolfgang Denk, DENX Software Engineering, wd@denx.de. obj-y += cache.o -obj-$(CONFIG_BOOTM) += bootm.o +obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-y += libgcc.o diff --git a/arch/powerpc/cpu/mpc8xx/cpu_init.c b/arch/powerpc/cpu/mpc8xx/cpu_init.c index aac4203a6e4..d1abe8f00bf 100644 --- a/arch/powerpc/cpu/mpc8xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c @@ -92,6 +92,12 @@ void cpu_init_f(immap_t __iomem *immr) CONFIG_SYS_PLPRCR); #endif + /* Set SDMA configuration register */ + if (IS_ENABLED(CONFIG_MPC885)) + out_be32(&immr->im_siu_conf.sc_sdcr, 0x0040); + else + out_be32(&immr->im_siu_conf.sc_sdcr, 0x0001); + /* * Memory Controller: */ diff --git a/arch/powerpc/dts/cmpc885.dts b/arch/powerpc/dts/cmpc885.dts index 7b9566a0fa4..454ceb91ca0 100644 --- a/arch/powerpc/dts/cmpc885.dts +++ b/arch/powerpc/dts/cmpc885.dts @@ -83,13 +83,23 @@ spi: spi@aa0 { status = "okay"; #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; + #size-cells = <0>; compatible = "fsl,mpc8xx-spi"; - gpios = <&CPM1_PIO_B 21 1>; /* /EEPROM_CS ACTIVE_LOW */ + gpios = <&CPM1_PIO_B 21 1 /* /EEPROM_CS ACTIVE_LOW */ + &CPM1_PIO_B 23 1 /* Temperature mother board */ + &CPM1_PIO_B 14 1>; /* Temperature CPU board */ eeprom@0 { - cell-index = <1>; + reg = <0>; + compatible = "atmel,at25", "cs,eeprom"; + }; + temp@1 { + reg = <1>; + compatible = "ti,lm74"; + }; + temp@2 { + reg = <2>; + compatible = "ti,lm74"; }; }; }; diff --git a/arch/powerpc/dts/cmpcpro.dts b/arch/powerpc/dts/cmpcpro.dts index c27d9dba335..1dfa864ebba 100644 --- a/arch/powerpc/dts/cmpcpro.dts +++ b/arch/powerpc/dts/cmpcpro.dts @@ -140,11 +140,21 @@ compatible = "fsl,mpc832x-spi"; reg = <0x4c0 0x40>; mode = "cpu"; - gpios = <&qe_pio_d 3 1>; + gpios = <&qe_pio_d 3 1 + &qe_pio_c 5 1 /* TEMP mother board */ + &qe_pio_c 3 1>; /* TEMP CPU board */ clock-frequency = <0>; - eeprom@3 { + eeprom@0 { + reg = <0>; compatible = "atmel,at25", "cs,eeprom"; - cell-index = <1>; + }; + temp@1 { + reg = <1>; + compatible = "ti,lm74"; + }; + temp@2 { + reg = <2>; + compatible = "ti,lm74"; }; }; eth0: ucc@3000 { diff --git a/arch/powerpc/dts/mcr3000.dts b/arch/powerpc/dts/mcr3000.dts index c4d7737bc67..aa46007b8d9 100644 --- a/arch/powerpc/dts/mcr3000.dts +++ b/arch/powerpc/dts/mcr3000.dts @@ -26,6 +26,47 @@ timeout-sec = <2>; hw_margin_ms = <1000>; }; + + spi: spi@aa0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl,mpc8xx-spi"; + gpios = <&csspi 2 0 + &csspi 0 0>; + + temp@0 { + reg = <0>; + compatible = "ti,lm74"; + }; + fpga@1 { + reg = <1>; + }; + }; + }; + + localbus@ff000100 { + compatible = "s3k,mcr3000-localbus", "fsl,pq1-localbus", "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0xff000100 0x40>; // ORx and BRx register + + ranges = <0 0 0x04000000 0x04000000 // BOOT + 1 0 0x00000000 0x04000000 // SDRAM + 2 0 0x08000000 0x04000000 // RAMDP + 3 0 0x0C000000 0x04000000 // NAND + 4 0 0x10000000 0x04000000 // Periphs + 5 0 0x14000000 0x04000000 // FPGA + 6 0 0x18000000 0x04000000 // mezzanine + 7 0 0x1c000000 0x04000000>; // DSP + + csspi: gpio-controller@2 { + #gpio-cells = <2>; + compatible = "s3k,mcr3000-cpld-csspi"; + reg = <4 0x802 2>; + gpio-controller; + }; }; SERIAL: smc@0 { diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index dcce9834927..bb819dcbb6c 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -34,7 +34,7 @@ obj-y += ticks.o endif obj-y += reloc.o -obj-$(CONFIG_BOOTM) += bootm.o +obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-y += cache.o obj-y += extable.o obj-y += interrupts.o diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index 0b2c88db6ba..9a05b662fd6 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -6,7 +6,7 @@ # Copyright (C) 2017 Andes Technology Corporation # Rick Chen, Andes Technology Corporation <rick@andestech.com> -obj-$(CONFIG_BOOTM) += bootm.o +obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-$(CONFIG_CMD_BOOTI) += bootm.o image.o obj-$(CONFIG_CMD_GO) += boot.o obj-y += cache.o diff --git a/arch/sandbox/lib/Makefile b/arch/sandbox/lib/Makefile index c4924b23c83..a2bc5a7ee60 100644 --- a/arch/sandbox/lib/Makefile +++ b/arch/sandbox/lib/Makefile @@ -7,5 +7,5 @@ obj-y += fdt_fixup.o interrupts.o sections.o obj-$(CONFIG_PCI) += pci_io.o -obj-$(CONFIG_BOOTM) += bootm.o +obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-$(CONFIG_CMD_BOOTZ) += bootm.o diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile index 8c3c30293a3..e7520a328d5 100644 --- a/arch/sh/lib/Makefile +++ b/arch/sh/lib/Makefile @@ -6,7 +6,7 @@ extra-y += start.o obj-y += board.o -obj-$(CONFIG_BOOTM) += bootm.o +obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-y += time.o obj-$(CONFIG_CMD_SH_ZIMAGEBOOT) += zimageboot.o diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index 94aa335ede4..8fc35e1b51e 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -16,7 +16,7 @@ obj-$(CONFIG_X86_32BIT_INIT) += string.o endif ifndef CONFIG_SPL_BUILD -obj-$(CONFIG_BOOTM) += bootm.o +obj-$(CONFIG_CMD_BOOTM) += bootm.o endif obj-y += cmd_boot.o obj-$(CONFIG_$(SPL_)COREBOOT_SYSINFO) += coreboot/ diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index 4e4cf18dec5..c15f11f8cdf 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -283,7 +283,7 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) { int ret; - printf("Jumping to 64-bit U-Boot\n"); + printf("Jumping to 64-bit U-Boot: Note many features are missing\n"); ret = cpu_jump_to_64bit_uboot(spl_image->entry_point); debug("ret=%d\n", ret); hang(); diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c index 12eae17c396..1095dc92c5a 100644 --- a/arch/x86/lib/tables.c +++ b/arch/x86/lib/tables.c @@ -98,6 +98,8 @@ int write_tables(void) int size = table->size ? : CONFIG_ROM_TABLE_SIZE; u32 rom_table_end; + rom_addr = ALIGN(rom_addr, 16); + if (!strcmp("smbios", table->name)) gd->arch.smbios_start = rom_addr; diff --git a/arch/xtensa/lib/Makefile b/arch/xtensa/lib/Makefile index bb9157f30f0..ad4fe32cb69 100644 --- a/arch/xtensa/lib/Makefile +++ b/arch/xtensa/lib/Makefile @@ -3,6 +3,6 @@ # (C) Copyright 2007 - 2013 Tensilica Inc. # (C) Copyright 2014 - 2016 Cadence Design Systems Inc. -obj-$(CONFIG_BOOTM) += bootm.o +obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-y += cache.o misc.o relocate.o time.o diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c index 1a2f60e3d19..00114e6d915 100644 --- a/board/CZ.NIC/turris_mox/turris_mox.c +++ b/board/CZ.NIC/turris_mox/turris_mox.c @@ -395,7 +395,7 @@ static void load_spi_dtb(void) return; /* - * SPI NOR "dtb" partition offset & size hardcoded for now because the + * SPI NOR "dtb" partition offset & size hardcoded for now because the * mtd subsystem does not offer finding the partition yet and we do not * want to reimplement OF partition parser here. */ diff --git a/board/amlogic/vim3/vim3.c b/board/amlogic/vim3/vim3.c index 43d7a8e84f6..a4850364f41 100644 --- a/board/amlogic/vim3/vim3.c +++ b/board/amlogic/vim3/vim3.c @@ -89,7 +89,7 @@ int meson_ft_board_setup(void *blob, struct bd_info *bd) /* * If in PCIe mode, alter DT - * 0：Enable USB3.0，Disable PCIE, 1：Disable USB3.0, Enable PCIE + * 0: Enable USB3.0, Disable PCIE, 1: Disable USB3.0, Enable PCIE */ if (ret > 0) { static char data[32] __aligned(4); diff --git a/board/asus/transformer-t30/configs/p1801-t.config b/board/asus/transformer-t30/configs/p1801-t.config index fab2912132c..f378f54570d 100644 --- a/board/asus/transformer-t30/configs/p1801-t.config +++ b/board/asus/transformer-t30/configs/p1801-t.config @@ -1,2 +1,3 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-p1801-t" +# CONFIG_I2C_MUX is not set CONFIG_USB_GADGET_PRODUCT_NUM=0x4cb0 diff --git a/board/asus/transformer-t30/configs/tf201.config b/board/asus/transformer-t30/configs/tf201.config index 296743b7748..e4fd30378a1 100644 --- a/board/asus/transformer-t30/configs/tf201.config +++ b/board/asus/transformer-t30/configs/tf201.config @@ -1,2 +1,3 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf201" +# CONFIG_I2C_MUX is not set CONFIG_USB_GADGET_PRODUCT_NUM=0x4d00 diff --git a/board/asus/transformer-t30/configs/tf300t.config b/board/asus/transformer-t30/configs/tf300t.config index 32a92fe76fa..9ad2ebd98e8 100644 --- a/board/asus/transformer-t30/configs/tf300t.config +++ b/board/asus/transformer-t30/configs/tf300t.config @@ -1,2 +1,3 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf300t" +# CONFIG_I2C_MUX is not set CONFIG_USB_GADGET_PRODUCT_NUM=0x4d00 diff --git a/board/asus/transformer-t30/configs/tf300tg.config b/board/asus/transformer-t30/configs/tf300tg.config index 1396294f6de..7b44a91acc4 100644 --- a/board/asus/transformer-t30/configs/tf300tg.config +++ b/board/asus/transformer-t30/configs/tf300tg.config @@ -1,2 +1,3 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf300tg" +# CONFIG_I2C_MUX is not set CONFIG_USB_GADGET_PRODUCT_NUM=0x4c80 diff --git a/board/asus/transformer-t30/configs/tf300tl.config b/board/asus/transformer-t30/configs/tf300tl.config index 3db033c8df4..81e96d5df6f 100644 --- a/board/asus/transformer-t30/configs/tf300tl.config +++ b/board/asus/transformer-t30/configs/tf300tl.config @@ -1,2 +1,3 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf300tl" +# CONFIG_I2C_MUX is not set CONFIG_USB_GADGET_PRODUCT_NUM=0x4d00 diff --git a/board/asus/transformer-t30/configs/tf600t.config b/board/asus/transformer-t30/configs/tf600t.config index e40d0fdd479..b3734869f59 100644 --- a/board/asus/transformer-t30/configs/tf600t.config +++ b/board/asus/transformer-t30/configs/tf600t.config @@ -1,4 +1,6 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf600t" CONFIG_BOOTCOMMAND="setenv gpio_button 222; if run check_button; then poweroff; fi; setenv gpio_button 132; if run check_button; then echo Starting SPI flash update ...; run update_spi; fi; run bootcmd_usb0; run bootcmd_mmc1; run bootcmd_mmc0; poweroff;" +# CONFIG_I2C_MUX is not set +CONFIG_TEGRA20_SLINK=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_USB_GADGET_PRODUCT_NUM=0x4d00 diff --git a/board/asus/transformer-t30/configs/tf700t.config b/board/asus/transformer-t30/configs/tf700t.config index 066c884d082..887c25fbf22 100644 --- a/board/asus/transformer-t30/configs/tf700t.config +++ b/board/asus/transformer-t30/configs/tf700t.config @@ -1,2 +1,4 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf700t" +CONFIG_CLK_GPIO=y CONFIG_USB_GADGET_PRODUCT_NUM=0x4c90 +CONFIG_VIDEO_BRIDGE_TOSHIBA_TC358768=y diff --git a/board/bosch/acc/acc.c b/board/bosch/acc/acc.c index 34088adee47..65c2f356713 100644 --- a/board/bosch/acc/acc.c +++ b/board/bosch/acc/acc.c @@ -437,7 +437,7 @@ static const struct mx6_ddr3_cfg acc_mx6d_mem_ddr3_1066 = { .trcd = 1313, // 13.125ns .trcmin = 5063, // 50.625ns .trasmin = 3750, // 37.5ns - .SRT = 0, // Set to 1 for temperatures above 85°C + .SRT = 0, // Set to 1 for temperatures above 85 deg C }; static const struct mx6_ddr_sysinfo acc_mx6d_ddr_info = { diff --git a/board/bosch/shc/board.c b/board/bosch/shc/board.c index 962a485acd2..aebdfd4dfec 100644 --- a/board/bosch/shc/board.c +++ b/board/bosch/shc/board.c @@ -115,7 +115,7 @@ static void __maybe_unused force_modules_running(void) gpio_direction_output(WIFI_REGEN_GPIO, 1); /* * Wait for Wi-Fi power regulator to reach a stable voltage - * (soft-start time, max. 350 µs) + * (soft-start time, max. 350 us) */ __udelay(350); diff --git a/board/bosch/shc/board.h b/board/bosch/shc/board.h index 4cc02f93c64..a5e58186c9c 100644 --- a/board/bosch/shc/board.h +++ b/board/bosch/shc/board.h @@ -154,7 +154,7 @@ static inline int board_is_series(void) #define HDR_FATC_LEN 12 /* -* SHC parameters held in On-Board I²C EEPROM device. +* SHC parameters held in On-Board I2C EEPROM device. * * Header Format * diff --git a/board/congatec/cgtqmx8/cgtqmx8.c b/board/congatec/cgtqmx8/cgtqmx8.c index 3b01354bb6b..d8e5b1d6963 100644 --- a/board/congatec/cgtqmx8/cgtqmx8.c +++ b/board/congatec/cgtqmx8/cgtqmx8.c @@ -171,7 +171,7 @@ int board_mmc_init(struct bd_info *bis) * (U-Boot device node) (Physical Port) * mmc0 (onboard eMMC) USDHC1 * mmc1 (external SD card) USDHC2 - * mmc2 (onboard µSD) USDHC3 + * mmc2 (onboard uSD) USDHC3 */ for (i = 0; i < CFG_SYS_FSL_USDHC_NUM; i++) { switch (i) { @@ -196,7 +196,7 @@ int board_mmc_init(struct bd_info *bis) gpio_direction_input(USDHC1_CD_GPIO); break; case 2: - /* onboard µSD */ + /* onboard uSD */ if (!imx8_power_domain_lookup_name("conn_sdhc2", &pd)) power_domain_on(&pd); diff --git a/board/cssi/cmpc885/Makefile b/board/cssi/cmpc885/Makefile index baf9e5ab4f6..6c055097cdd 100644 --- a/board/cssi/cmpc885/Makefile +++ b/board/cssi/cmpc885/Makefile @@ -5,6 +5,6 @@ # Christophe Leroy <christophe.leroy@c-s.fr> # -obj-y += cmpc885.o ../common/common.o +obj-y += cmpc885.o obj-y += sdram.o obj-$(CONFIG_CMD_NAND) += nand.o diff --git a/board/cssi/cmpc885/cmpc885.c b/board/cssi/cmpc885/cmpc885.c index e11cfafaa58..49c13056edc 100644 --- a/board/cssi/cmpc885/cmpc885.c +++ b/board/cssi/cmpc885/cmpc885.c @@ -114,8 +114,10 @@ static int setup_mac(void) if (memcmp(din + EE_OFF_MAC1, &ident, sizeof(ident)) == 0) eth_env_set_enetaddr("ethaddr", din + EE_OFF_MAC1); - if (memcmp(din + EE_OFF_MAC2, &ident, sizeof(ident)) == 0) + if (memcmp(din + EE_OFF_MAC2, &ident, sizeof(ident)) == 0) { eth_env_set_enetaddr("eth1addr", din + EE_OFF_MAC2); + eth_env_set_enetaddr("eth2addr", din + EE_OFF_MAC2); + } return 0; } diff --git a/board/cssi/cmpc885/cmpc885.env b/board/cssi/cmpc885/cmpc885.env index 51ab5ce2cfc..570117cd369 100644 --- a/board/cssi/cmpc885/cmpc885.env +++ b/board/cssi/cmpc885/cmpc885.env @@ -2,6 +2,6 @@ loadaddr=0x1a00000 filename=cmpc885.itb console_args=console=ttyCPM0,115200N8 loadkernel=ubi part nand0;ubifsmount ubi0;ubifsload ${loadaddr} /boot/${filename};ubifsumount; ubi detach -flashboot=setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off ${ofl_args}; run loadkernel; bootm $loadaddr#$config -tftpboot=setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off ${ofl_args}; tftp ${loadaddr} ${filename};bootm $loadaddr#$config +flashboot=setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off ${ofl_args}; run loadkernel; bootm ${loadaddr}#${config} +tftpboot=setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off ${ofl_args}; tftp ${loadaddr} ${filename};bootm ${loadaddr}#${config} update=echo 'Updating ubi image'; if tftp $loadaddr $ubifile; then nand erase.chip; nand write $loadaddr 0x00 $filesize; fi; diff --git a/board/cssi/cmpcpro/Makefile b/board/cssi/cmpcpro/Makefile index 73ff451ea1c..30837781af6 100644 --- a/board/cssi/cmpcpro/Makefile +++ b/board/cssi/cmpcpro/Makefile @@ -5,4 +5,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y += cmpcpro.o nand.o ../common/common.o +obj-y += cmpcpro.o nand.o diff --git a/board/cssi/cmpcpro/cmpcpro.env b/board/cssi/cmpcpro/cmpcpro.env index 7394b8386ea..47b436ff6bc 100644 --- a/board/cssi/cmpcpro/cmpcpro.env +++ b/board/cssi/cmpcpro/cmpcpro.env @@ -3,6 +3,6 @@ filename=cmpcpro.itb netdev=eth0 console_args=console=ttyS0,115200N8 loadkernel=ubi part nand0;ubifsmount ubi0; ubifsload ${loadaddr} /boot/${filename}; ubifsumount; ubi detach -flashboot=mw.w 90000040 0x000E 1; setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off ${ofl_args}; run loadkernel; bootm $loadaddr#$config -tftpboot=mw.w 90000040 0x000E 1; setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off ${ofl_args}; tftp ${loadaddr} ${filename}; bootm $loadaddr#$config +flashboot=mw.w 90000040 0x000E 1; setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off ${ofl_args}; run loadkernel; bootm ${loadaddr}#${config} +tftpboot=mw.w 90000040 0x000E 1; setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off ${ofl_args}; tftp ${loadaddr} ${filename}; bootm ${loadaddr}#${config} update=echo 'Updating ubi image'; mw.w 90000040 0x000E 1; if tftp $loadaddr $ubifile; then nand erase.chip; nand write $loadaddr 0x00 $filesize; fi; diff --git a/board/cssi/common/Makefile b/board/cssi/common/Makefile new file mode 100644 index 00000000000..973582639e6 --- /dev/null +++ b/board/cssi/common/Makefile @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2024 CS GROUP France +# Christophe Leroy <christophe.leroy@csgroup.eu> +# + +obj-$(CONFIG_TARGET_CMPC885) += common.o +obj-$(CONFIG_TARGET_CMPCPRO) += common.o diff --git a/board/cssi/common/common.c b/board/cssi/common/common.c index 7ecf7726209..0292a9016e8 100644 --- a/board/cssi/common/common.c +++ b/board/cssi/common/common.c @@ -164,7 +164,7 @@ int checkboard_common(void) void misc_init_r_common(void) { - u8 tmp, far_id; + u8 tmp, far_id, addr; int count = 3; switch (in_8(ADDR_FPGA_R_BASE)) { @@ -173,6 +173,10 @@ void misc_init_r_common(void) if ((in_8(ADDR_FPGA_R_BASE + 0x31) & FPGA_R_ACQ_AL_FAV) == 0) env_set("bootdelay", "60"); + addr = in_8(ADDR_FPGA_R_BASE + 0x43); + printf("Board address: 0x%2.2x (System %d Rack %d Slot %d)\n", + addr, addr >> 7, (addr >> 4) & 7, addr & 15); + env_set("config", CFG_BOARD_MCR3000_2G); env_set("hostname", CFG_BOARD_MCR3000_2G); break; @@ -208,12 +212,44 @@ void misc_init_r_common(void) } } +static void iop_setup_fpgam_common(void) +{ + u8 far_id = in_8(ADDR_FPGA_R_BASE + 0x43) >> 5; + + if (far_id == FAR_CASRSA) { + /* + * PFDIR[15] = 0 [0x01] + * PFDIR[14] = 1 [0x02] + * PFDIR[13] = 1 [0x04] + */ + clrsetbits_8(ADDR_FPGA_R_BASE + 0x37, 0x01, 0x06); + /* + * PFODR[15] = 1 [0x01] + * PFODR[14] = 0 [0x02] + * PFODR[13] = 0 [0x04] + */ + clrsetbits_8(ADDR_FPGA_R_BASE + 0x39, 0x06, 0x01); + /* + * PFDAT[15] = 0 [0x01] + * PFDAT[14] = 1 [0x02] + * PFDAT[13] = 1 [0x04] + * PFDAT[12] = 1 [0x08] + */ + clrsetbits_8(ADDR_FPGA_R_BASE + 0x3B, 0x01, 0x0E); + + /* Setup TOR_OUT */ + out_8(ADDR_FPGA_R_BASE + 0x32, 0x2A); + } +} + void iop_setup_common(void) { u8 type = in_8(ADDR_FPGA_R_BASE); - if (type == TYPE_MCR) + if (type == TYPE_MCR) { iop_setup_mcr(); - else if (type == TYPE_MIAE) + } else if (type == TYPE_MIAE) { iop_setup_miae(); + iop_setup_fpgam_common(); + } } diff --git a/board/cssi/mcr3000/Makefile b/board/cssi/mcr3000/Makefile index 7803016af3a..846fd680e99 100644 --- a/board/cssi/mcr3000/Makefile +++ b/board/cssi/mcr3000/Makefile @@ -6,3 +6,4 @@ obj-y += mcr3000.o obj-$(CONFIG_CMD_NAND) += nand.o +obj-$(CONFIG_MPC8XX_SPI) += mcr3000_gpio.o diff --git a/board/cssi/mcr3000/fpga_code.h b/board/cssi/mcr3000/fpga_code.h new file mode 100644 index 00000000000..4772a508860 --- /dev/null +++ b/board/cssi/mcr3000/fpga_code.h @@ -0,0 +1,9778 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2010 CS Systemes d'Information + * + * uCORE FPGA code for MCR3000 board + */ + +u32 fpga_code[] = { + 0xffffffff, 0xaa995566, 0x30008001, 0x00000007, 0x30016001, 0x00000014, + 0x30012001, 0x00803f2d, 0x3000c001, 0x00000000, 0x30008001, 0x00000009, + 0x30002001, 0x00000000, 0x30008001, 0x00000001, 0x30004000, 0x5000cf75, + 0x00920000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00004004, 0x80000000, 0x00000000, 0x00120000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00004024, 0x80000000, 0x00000000, + 0xffca8000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00003ff2, 0xa0000000, 0x00000000, 0x00823000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00014020, 0x80000000, 0x00000000, + 0xff5a8000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00003fd6, 0xa0000000, 0x00000000, 0xff5a8000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00003ff6, 0xa0000000, 0x00000000, + 0x00100000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000004, 0x80000000, 0x00000000, 0xff9001a2, 0x0078800e, 0xa0058001, + 0x60005800, 0x16000580, 0x01600058, 0x001e0007, 0x80016000, 0x78001e00, + 0x070001c0, 0x0070001c, 0x00070001, 0xc0007800, 0x1c000600, 0x01800060, + 0x00180006, 0x00018000, 0x60001800, 0x06003fe4, 0x00000000, 0x00000000, + 0xc015d200, 0xff403f60, 0x0dc8237c, 0x10fc803f, 0xe00cc803, 0x7c00fc90, + 0x37e00ff8, 0x03fc00df, 0x003bc00f, 0xc8439700, 0xdf803fe0, 0x0ff803f8, + 0x22cf803f, 0xe00ff803, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x803fa02d, + 0xf3033020, 0x70000000, 0x00000000, 0x8090ea00, 0xbf102e40, 0x0892803f, + 0x0098802c, 0xcb8a8802, 0x2e088a20, 0x0ac20bb8, 0x027e420f, 0x9022f00b, + 0xb822e408, 0x8b822cc0, 0x09b802e8, 0x248b802e, 0xe00bb802, 0xee00bb80, + 0x2ee00bb8, 0x02ee00bb, 0x802e8048, 0xa4022006, 0x30000000, 0x00000000, + 0x08008000, 0xa3206ec0, 0x29a002cc, 0x4081040c, 0xc80a8010, 0xcc049a00, + 0x2cc80b30, 0x02cc00a3, 0x00a0d04b, 0xb0222081, 0xb3006cc0, 0x0b3002cc, + 0x8083002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x002c8a0b, + 0x334a0280, 0x20000000, 0x00000000, 0xc015ee00, 0xbb002ec4, 0x0998022c, + 0x0489002e, 0xc00b9402, 0xe4018920, 0x62c00bb0, 0x02ec00ab, 0x0022c14b, + 0xb002ac40, 0xab006ec0, 0x09b002ee, 0x008b002e, 0xc00bb002, 0xec00bb00, + 0x2ec00bb0, 0x02ec10bb, 0x002e900a, 0xa0023000, 0x60000000, 0x00000000, + 0x4105e304, 0xfb023c60, 0x0d0883ec, 0x01db003e, 0xc00e0803, 0xec00d0c8, + 0x3ec04fb0, 0x12ec00eb, 0x0072c00f, 0x80032480, 0xfb003ec0, 0x0fb007cb, + 0x00cb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x002e800f, + 0xb00b1044, 0x70000000, 0x00000000, 0xa011b800, 0xff013f60, 0x8ed023dc, + 0x04df903f, 0xc006f243, 0x3a40ec80, 0x3fc087f0, 0x837c0057, 0x006fc08f, + 0xf003fe00, 0xdf003fc0, 0x0ff003f8, 0x00ff003f, 0xc00ff003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00ff, 0x003f844d, 0x7403e800, 0x60000000, 0x00000000, + 0xc010a000, 0xcf0036c0, 0x2ea0033c, 0x00eb0c3a, 0xc00ea403, 0x8c00fb00, + 0x3ac00fb0, 0x03dc00ff, 0x203ac80e, 0xb203a450, 0xdb003ec0, 0x0cb003ed, + 0x02cb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003e980e, + 0xb0033004, 0x20000000, 0x00000000, 0xc8052820, 0x8f0422e8, 0x089002fc, + 0x880b6022, 0xc008b000, 0xe410eb00, 0x22c00eb8, 0x023c808f, 0x4023e308, + 0x38214e00, 0x9b003ac0, 0x0db002ee, 0x808b003a, 0xc00bb002, 0xec00bb00, + 0x2ec00bb0, 0x02ec00bb, 0x002e0100, 0xb9823200, 0x40000000, 0x00000000, + 0xc0044000, 0x830024e0, 0x0820028e, 0x00b2842a, 0xc0080002, 0x8c04b004, + 0x28c00b3d, 0x028c00a3, 0x9028d10b, 0x04020780, 0x83002cc0, 0x083002c4, + 0x8483042c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x024c00a3, 0x00268428, + 0x14023100, 0x10000000, 0x00000000, 0x60107b02, 0x839025e0, 0x086802de, + 0x019e8061, 0xe02a6806, 0xde40af84, 0x21e01a78, 0x021ec887, 0x8425e009, + 0x78867640, 0x878029e0, 0x097802d6, 0x40878029, 0xe00b7802, 0xde00b780, + 0x2de00b78, 0x02de00b7, 0x822fa808, 0x28021804, 0x10000000, 0x00000000, + 0x48084800, 0xc30036c0, 0x0a20038c, 0x10b30038, 0xc40c3043, 0x8c00f200, + 0x28c01f30, 0x028c80a3, 0x0138c58f, 0x31028c50, 0xd3003cc0, 0x0c3003e5, + 0x00c3003c, 0xc00f3003, 0xcc00f300, 0x3cc00f30, 0x03cc00e3, 0x003c804e, + 0x100b1302, 0x10000000, 0x00000000, 0x4015b800, 0xff443bc4, 0x0fc001dc, + 0x00e7001f, 0xc005f023, 0xfc11f500, 0x3bc40f70, 0x279c90e7, 0x1139c11e, + 0x7003fc50, 0xff003bc0, 0x0ff103f4, 0x10ff003b, 0xc00ff003, 0xfc00ff00, + 0x3fc01ff0, 0x03fc00ff, 0x003d880f, 0xe103d004, 0x60000000, 0x00000000, + 0x0804a000, 0xff80bae0, 0x0da003fc, 0x20db003e, 0xc00f9003, 0xee04cb80, + 0x12c08fb0, 0x20bd40cf, 0x303ec48f, 0x8003cc00, 0xcb003ec0, 0x0fb003ec, + 0x00cb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003e802c, + 0x90230200, 0x20000000, 0x00000000, 0xc0189800, 0xb72021c0, 0x096004dc, + 0x00b7002d, 0xc01b7002, 0xd8008f00, 0x35c00b70, 0x02dca087, 0x286dc00b, + 0x7022dc00, 0xd7002dc0, 0x0b70265c, 0x02c7002d, 0xc00e7003, 0xdc00b700, + 0x2dc00b70, 0x02dc00b7, 0x022d800d, 0x50023006, 0x20000000, 0x00000000, + 0x20009a00, 0xb3b02be0, 0x087802de, 0x40a7802d, 0xe00b7846, 0xce029580, + 0x29e00978, 0x02ce80a7, 0xa46de81b, 0x7802fe00, 0x87802de0, 0x0b7802fe, + 0x2097802d, 0xe00b7802, 0xde00b780, 0x2de00b78, 0x02de00b7, 0x802da008, + 0x38020800, 0x20000000, 0x00000000, 0x6804cc80, 0xb30020c0, 0x091602cc, + 0x10b3c02c, 0xc01b3502, 0xcc809104, 0x24c00b30, 0x02cc00a3, 0x002cc10b, + 0x3002cd40, 0x93002cc0, 0x0b30024e, 0x0083002c, 0xc00a3002, 0xcc00b300, + 0x2cc00b30, 0x02cc00b3, 0x022cd209, 0xb8021a00, 0x20000000, 0x00000000, + 0xe815f900, 0xfa002a80, 0x2ce403e8, 0x00eed83e, 0x800f6503, 0xf800dea0, + 0x3a800fa0, 0x03e8022a, 0x003e804f, 0xe021da00, 0xca003e80, 0x0fa003f8, + 0x00da003e, 0x800fa003, 0xe800fa00, 0x3e800fa0, 0x03e800fa, 0x003fb00c, + 0xe40b3a04, 0x70000000, 0x00000000, 0x4801a000, 0xf8003e00, 0x0e8003e0, + 0x00f8003e, 0x008f8003, 0xe000e800, 0x16000f80, 0x03e10018, 0x403e000f, + 0x8403e000, 0xf8003e10, 0x1f8003e1, 0x00f8003e, 0x000f8003, 0xa000f800, + 0x3e000f80, 0x03e000f8, 0x023e044f, 0x8583d200, 0x60000000, 0x00000000, + 0x0810a400, 0xf9003e44, 0x0f900306, 0x4059003e, 0x400c9003, 0xa400f908, + 0x3e410c90, 0x03c600d9, 0x021e600f, 0x9c03e460, 0xc9003a60, 0x0f9023a6, + 0x82c9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e608c, + 0x91030204, 0x20000000, 0x00000000, 0x80046400, 0xb9022e78, 0x0b900226, + 0x20b9882e, 0x400a9002, 0x2400b900, 0x2e400899, 0x02e740a9, 0x403a440b, + 0x9802e600, 0xa9002e44, 0x0b9002c4, 0x9889002e, 0x400b9002, 0xe400b900, + 0x2e400b90, 0x02e400b9, 0x002c4108, 0x9c02a000, 0x10000000, 0x00000000, + 0x38052d00, 0x39002e40, 0x0b102224, 0x04a92028, 0x40089002, 0xe400b900, + 0x2c400894, 0x22a50019, 0x552e4319, 0x9402a400, 0x99002a40, 0x0b9002a4, + 0x0099002e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400b9, 0x002e4928, + 0x90024e00, 0x40000000, 0x00000000, 0x28140408, 0xb1102c50, 0x0b140204, + 0x00a1002c, 0x500a9002, 0xc400b140, 0x2c501810, 0x02c40881, 0x0028400b, + 0x1012e442, 0xb1002cd0, 0x1b1002e5, 0x0091002c, 0x400b1002, 0xc400b100, + 0x2c400b10, 0x02c400b1, 0x002cc408, 0x1102cb05, 0x00000000, 0x00000000, + 0x380c2000, 0xf8403e00, 0x0f804320, 0x00f8003e, 0x000c8002, 0xe000f800, + 0x3e000c80, 0x03e004d8, 0x043e000f, 0x8003a100, 0xd8003a00, 0x0f8003a0, + 0xa0d8043e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x003e100c, + 0xa6834e03, 0x50000000, 0x00000000, 0x9805f400, 0xf9617d40, 0x0fd00be5, + 0x00fd003e, 0x410fd003, 0x3d00ff00, 0x3e402f90, 0x23e500f9, 0x403a500f, + 0xd023f480, 0x69003e40, 0x0f9003d4, 0x00e9003e, 0x400d9003, 0xe400f900, + 0x3e400f90, 0x03e400f9, 0x003dc84f, 0xd203a704, 0x70000000, 0x00000000, + 0x1805f400, 0xf9283944, 0x0f900334, 0x00cd003e, 0x400f9003, 0xe484f900, + 0x22400fd0, 0x03f480dd, 0x287f480f, 0x5003b400, 0xe9003f40, 0x0f9003f4, + 0x00c9003e, 0x400d9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003d402c, + 0xd0030600, 0x70000000, 0x00000000, 0x3818e000, 0xb8002e08, 0x0b808220, + 0x04d8002e, 0x0a0b8002, 0xe040b808, 0x20020b80, 0x02e008b8, 0x003a040b, + 0x80036000, 0xc8043e0a, 0x0b8003a8, 0x0488002e, 0x000b8003, 0xa000b800, + 0x2e000b80, 0x02e000e8, 0x023a0048, 0x82020e06, 0x30000000, 0x00000000, + 0x48008e00, 0xb1002848, 0x9b122244, 0x4581022c, 0x480b1002, 0xc400b120, + 0xa0400b10, 0x62c440b1, 0x002c400b, 0x9002a401, 0xa1002c48, 0x0b1002c4, + 0x0081002c, 0x400b1002, 0xc400b100, 0x2c400b10, 0x02c400b1, 0x002c402a, + 0x12821200, 0x20000000, 0x00000000, 0x9801a400, 0xb9002e48, 0x1b904264, + 0x0199092e, 0x400b9402, 0xe400b904, 0x22400b90, 0x02e410b9, 0x002a400b, + 0x91066480, 0x89006ac0, 0x039022a4, 0x0089002e, 0x400b9002, 0xa400b900, + 0x2e400b90, 0x02e400a9, 0x022a600a, 0x90022600, 0x20000000, 0x00000000, + 0xa011e740, 0xf9003a60, 0x0f9a1344, 0x0089443e, 0x400f9807, 0xe600b9d0, + 0x32400f90, 0x03e408f9, 0x002e400f, 0x1881a528, 0xe9002e40, 0x0b9003e5, + 0x02c9023e, 0x400d9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003c502e, + 0x900b2804, 0x70000000, 0x00000000, 0xc801a400, 0xf9003e61, 0x0f9a0ba4, + 0x08f9083e, 0x400f9c13, 0xe641f980, 0x3e401f90, 0x03e400f9, 0x007e404f, + 0x9003e400, 0xe9003e40, 0x0f9003a4, 0x00f9003e, 0x40079003, 0xa400f900, + 0x3e400f90, 0x03e400e9, 0x003e400d, 0x1103f200, 0x60000000, 0x00000000, + 0x0810a000, 0xf8007202, 0x0c8003e0, 0x30e8403a, 0x010f8003, 0xe000f800, + 0x3e000d82, 0x03e000f8, 0x040e015f, 0x84136008, 0xd8003e02, 0x0f800341, + 0x00c8003e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x003e042c, + 0x80030204, 0x20000000, 0x00000000, 0x28053900, 0xba00a3b0, 0x48a013ba, + 0x00ee202a, 0x800ba002, 0xe804ba00, 0x2e800ae4, 0x82f800be, 0xc13bb40b, + 0xe6131a80, 0xaa002fb0, 0x0ba00279, 0x00fa002e, 0x800ba002, 0xe800ba00, + 0x2e800ea0, 0x02e800ba, 0x042f800a, 0xe403ca00, 0x40000000, 0x00000000, + 0x28044d20, 0xb30064d4, 0x88b0128e, 0x05a34168, 0xc08b3002, 0xcc01bb00, + 0x2cc0093c, 0x02ce00b3, 0xa128e003, 0x3c828d24, 0x83022cc4, 0x0b30024d, + 0x8083002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x028c01b3, 0x002cc028, + 0x3a020a00, 0x10000000, 0x00000000, 0x80105410, 0xb7a023e0, 0x0972029c, + 0x20a58125, 0xc80b7002, 0xdc00b700, 0x2de00a50, 0x02dd0095, 0x0829c20b, + 0xd01ab405, 0xb7002dc0, 0x0b700278, 0x00b7002d, 0xc00b7002, 0xdc00b700, + 0x2dc00a70, 0x02dc00b7, 0x002d007a, 0x7402e004, 0x10000000, 0x00000000, + 0x88085a00, 0xf3e43160, 0x2c7a0396, 0x00e58039, 0xf30f7802, 0xde00f790, + 0x2dec0d58, 0x03da00f5, 0x8139e00b, 0x78039e00, 0xd7803de0, 0x0f780352, + 0x0287803d, 0xe00f7803, 0xde00f780, 0x2de00f78, 0x039e0077, 0x803d602c, + 0xf80b2202, 0x10000000, 0x00000000, 0x0815a000, 0xfb803ec0, 0x0ef003a4, + 0x00f1013b, 0xc90fb023, 0xec08ff30, 0x3fcc0d90, 0x03e808f9, 0x043a800d, + 0xb0030c02, 0xeb003ec0, 0x0fb003c8, 0x10fb003e, 0xc00fb003, 0xec00fb00, + 0x3ec00eb0, 0x03ec00fb, 0x003e400f, 0xb003c204, 0x60000000, 0x00000000, + 0x0004b600, 0xff2033a0, 0x0cfc83be, 0x40bd803f, 0xe40cf803, 0xfe40bf92, + 0x13e008d9, 0x03f600cd, 0x903fe00c, 0xf203de02, 0xdf813fe0, 0x0ff903fe, + 0x00cf803f, 0xc00ff803, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x813f608c, + 0xd84b0000, 0x60000000, 0x00000000, 0xa8189840, 0xbf003180, 0x0df00214, + 0x4085202f, 0xc40d7003, 0x9c00b700, 0x37c80854, 0x03dc0884, 0x0031400c, + 0x61061000, 0xd7002dc0, 0x0e704278, 0x40d7003d, 0xc00b7002, 0xdc00b700, + 0x2dc00b70, 0x03dc00b7, 0x002d0208, 0x600b6a06, 0x20000000, 0x00000000, + 0x00009100, 0xb70021c0, 0x08710280, 0x01a4002d, 0xc0187002, 0xdc009708, + 0x21c08840, 0x228800b5, 0x000dc008, 0xf002b420, 0x87002dc0, 0x0b7042d4, + 0x0087002d, 0xc00b7002, 0xdc00b700, 0x2dc00b70, 0x02dc00b7, 0x002f4408, + 0x00024000, 0x20000000, 0x00000000, 0x20048840, 0xb30020c0, 0x09384200, + 0x1180002c, 0xc00b3202, 0x4c40b304, 0x2ec00800, 0x02c01090, 0x026c0008, + 0x0c922121, 0x93002ec0, 0x0a302248, 0x0093002c, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x028c00b3, 0x022c4088, 0x85024800, 0x20000000, 0x00000000, + 0xa815e400, 0xff0032c0, 0x08fa03ac, 0x00a9003f, 0xc088ba02, 0xec089f00, + 0x23c08c90, 0x11a000f9, 0x002ec028, 0x9000a600, 0xcb003e00, 0x0bb003cc, + 0x00cb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x02ec00fb, 0x003ed00c, + 0x900b6a04, 0x60000000, 0x00000000, 0x8001a400, 0xfb003ac0, 0x0ff003cc, + 0x00e8003f, 0xc00db003, 0xac20ff00, 0x37c00f80, 0x01a10081, 0x0032c00f, + 0x9103a400, 0xeb003e00, 0x0fb02368, 0x00eb003a, 0xc00fb003, 0xec00fb00, + 0x3ec00fb0, 0x03ec00fb, 0x023e800f, 0xb003e000, 0x60000000, 0x00000000, + 0x2110b000, 0xff003f40, 0x0cf0833c, 0x0acd0037, 0xc00ff003, 0xfc01ff0a, + 0x13c00dd0, 0x03f0007c, 0x0032640c, 0xc0037c00, 0xcf013fe0, 0x88f003fc, + 0x80cf003f, 0xc00ff003, 0xfc00ff00, 0x3fc00ff0, 0x03fc00ff, 0x003f420c, + 0xd0830844, 0x20000000, 0x00000000, 0xa1046208, 0xbb002cc0, 0x89b002ac, + 0x40808022, 0xc009b003, 0xac00bb00, 0x2ac00c88, 0x026300b8, 0xc02c300f, + 0x08036e00, 0x8b002ef0, 0x0db002ea, 0x00ab006e, 0xc00bb002, 0xec00bb00, + 0x2ec10bb0, 0x03ac00bb, 0x002c6008, 0x98022841, 0x00000000, 0x00000000, + 0x80052600, 0x9b012ed0, 0x8930426c, 0x00898026, 0xc00bb006, 0xec00b300, + 0xaac00998, 0x02a225b9, 0x88269008, 0x9892e600, 0x8b012ec8, 0x8ab002ed, + 0x008b002e, 0xc00bb002, 0xec00bb00, 0x2ec00bb0, 0x02ec00bb, 0x002ee008, + 0xb8022000, 0x40000000, 0x00000000, 0x08140000, 0xb3002ec0, 0x493002c4, + 0x01888020, 0xc0093002, 0x8c009300, 0x28c00800, 0x024000b0, 0x00a40001, + 0x8006c003, 0x83002cc0, 0x033002e8, 0x02a3002c, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x028c00b3, 0x002c8028, 0x20060205, 0x00000000, 0x00000000, + 0x000d6000, 0xfb042cc0, 0x0cf04368, 0x00880037, 0xc00fb003, 0xec00b700, + 0x2bc00d80, 0x23e000b8, 0x0036000c, 0x8003e400, 0xcb003ec0, 0x0eb003ec, + 0x00cb002e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00bb, 0x003e400c, + 0xa0030003, 0x50000000, 0x00000000, 0xa015f000, 0xff003fc0, 0x2ef003b0, + 0x007c023f, 0xc00ff003, 0xbc04ff00, 0x37c00ec0, 0x03f000fc, 0x003b001f, + 0x40073000, 0xff003fc0, 0x1df003f8, 0x00ff003f, 0xc00ff003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00ff, 0x003d404f, 0xe003e804, 0x70000000, 0x00000000, + 0xc015d888, 0xcf103761, 0x0dc803f2, 0x00cf3033, 0x200ff203, 0x3200df28, + 0x33c00ff8, 0x03fe00f4, 0x803f200e, 0x5803d200, 0xff803fe0, 0x0ff803ff, + 0x00cfc033, 0xe00ff803, 0xfe00ff80, 0x3be00ff8, 0x03fe00ff, 0x803fe40c, + 0xf8033000, 0x70000000, 0x00000000, 0x8018e9a8, 0x8b702040, 0x0c8082e2, + 0x088f4422, 0x204bfc03, 0x24a0afc0, 0x22e04bb2, 0x82ee0438, 0x812e200a, + 0x9842e200, 0xbb802ee0, 0x09b802ec, 0x028b0022, 0xe00bb802, 0xee00bb80, + 0x2ee00bb8, 0x02ee00bb, 0x842ec008, 0xb8036004, 0x30000000, 0x00000000, + 0x0805c8c0, 0x82002840, 0x480202e0, 0x00836128, 0x008b3102, 0x2400b301, + 0xa8c01a32, 0x32cc00b0, 0x022ac02a, 0x1002c008, 0xb3006cc0, 0x0b3002cc, + 0x808320a0, 0xc00b3002, 0xcc00b300, 0x28c00b30, 0x02cc00b3, 0x002e0028, + 0x30120211, 0x70000000, 0x00000000, 0xc005a802, 0x9a40aa40, 0x08b042e8, + 0x008b002a, 0x204bb002, 0x6e00ab03, 0x2ad80bb0, 0x06ec00b8, 0x006ec00a, + 0xb802e200, 0xbb002ec0, 0x0bb002cc, 0x008b0022, 0xc00bb002, 0xec00bb00, + 0x2ec08bb0, 0x02ec00bb, 0x002ef008, 0xb0027004, 0x40000000, 0x00000000, + 0x0004af68, 0xcbc23ec0, 0x088d83c1, 0x40cb00ba, 0x380fb003, 0x2220fb00, + 0x3af00fb0, 0x03ec08f8, 0x5838c04e, 0x8803e320, 0xfb003ec0, 0x0fb003ec, + 0x00cb0032, 0xc00fb003, 0xec00fb00, 0x3ac00fb0, 0x03ec00fb, 0x003ef00c, + 0xb0030004, 0x70000000, 0x00000000, 0xe110be00, 0xaf9037c4, 0x0fc803f4, + 0x04ff0037, 0x000f7003, 0xbc02e700, 0x37c00ff0, 0x03fc00fc, 0x801fc00d, + 0xc003f000, 0xbf003fc0, 0x0df003fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00, + 0x3fc007f0, 0x03fc00ff, 0x003fc00f, 0xf003f800, 0x60000000, 0x00000000, + 0xc010ad00, 0xca003ac4, 0x1eb003ad, 0x80cf003a, 0x1c0ff313, 0xa508ff0a, + 0x3ec00fb0, 0x03ec00f8, 0x503ee184, 0xb0032010, 0xcb003ec0, 0x0fb003ec, + 0x00cb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x53ec04fb, 0x043ed80c, + 0xb0033004, 0x20000000, 0x00000000, 0xc8040c00, 0x8a0002e0, 0x08b0022c, + 0x008f0022, 0x000bf402, 0x0c04dfc1, 0x2ec00bb0, 0x02ef30b8, 0x5032d40d, + 0xb0822000, 0xdb8826c0, 0x0bb002ec, 0x028b002e, 0xc00bb002, 0xec00bb00, + 0x2ec00bb0, 0x02ec00bb, 0x002cc20a, 0x3a02b200, 0x40000000, 0x00000000, + 0xe0054802, 0x8b002ac0, 0x0a0002c0, 0x008b0028, 0x000b3002, 0x84088380, + 0x04c01b30, 0x024e20b0, 0x40280009, 0x18024000, 0x93802cc0, 0x0b3002cc, + 0x088b002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x024c00b3, 0x002cf008, + 0x38823800, 0x50000000, 0x00000000, 0x62011200, 0x8d9021e0, 0x08f9025e, + 0x04839021, 0x200b7802, 0x36409788, 0x2dc40b78, 0x02de00bc, 0x80232409, + 0xf8227200, 0x978025e0, 0x0b7802de, 0x0087802d, 0xe00b7802, 0xde00b780, + 0x2de00b78, 0x02de00b7, 0x802fe00a, 0x78029810, 0x40000000, 0x00000000, + 0x48080800, 0xc31038c0, 0x0a0003c4, 0x20c30038, 0x040f3012, 0x8c42a310, + 0x3c040b31, 0x034c40f0, 0x1038c00d, 0x10034040, 0xd3003cc0, 0x0f3003ec, + 0x40c3003c, 0xc00f3003, 0xcc00f300, 0x3cc40f30, 0x03cc00f3, 0x003cc00c, + 0x30031202, 0x00000000, 0x00000000, 0x401db801, 0xf5103fc0, 0x0f70039c, + 0x41ff001f, 0x400f7103, 0xdc42ff08, 0x3f880ff0, 0x03fc10ff, 0x003dc00f, + 0xf003b440, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00, + 0x3fc01ff0, 0x03fc00ff, 0x003dc407, 0x7003d006, 0x60000000, 0x00000000, + 0xa815ec00, 0xdf103240, 0x0eb80368, 0x00ff643a, 0x001ff700, 0xcc00df21, + 0x3ee00eb0, 0x03ec00f8, 0x003cc00c, 0x38032000, 0x7b003ec0, 0x0fb003ec, + 0x00fb80b2, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003cc01c, + 0xb003ea00, 0x70000000, 0x00000000, 0xc8119400, 0xcd802140, 0x0b70021c, + 0x00b76821, 0x018b7142, 0x5c008730, 0x2cc00870, 0x02dc01b4, 0x006dc00a, + 0x70029400, 0xb7002dc0, 0x0b7012dc, 0x08b70021, 0xc00b7002, 0xdc00b700, + 0x2dc00b70, 0x02dc00b7, 0x002dc008, 0x7002f204, 0x60000000, 0x00000000, + 0xc0009a02, 0x87802160, 0x0bf802de, 0x00b78025, 0x604b7a02, 0x7e048780, + 0x29600a78, 0x029e09b7, 0x802fe218, 0xf8029200, 0xb7802de0, 0x0b7802de, + 0x00b78021, 0xe00b7802, 0xde00b780, 0x2de00b78, 0x02de00b7, 0x802fe008, + 0x7822f010, 0x20000000, 0x00000000, 0x4804cc20, 0x81002064, 0x0b3c028d, + 0x10b30024, 0xc00b3002, 0x6e028300, 0x2cd20830, 0x02cc00b3, 0xe22cd00a, + 0x35028c00, 0xb3002cc0, 0x0b3002cc, 0x00b30020, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x02cc00b3, 0x002cc408, 0x3002d204, 0x30000000, 0x00000000, + 0xe8053800, 0xce01b2a1, 0x0fe483fa, 0xc0fa002f, 0x9c0fa007, 0x7802ca00, + 0x3f900ea0, 0x03e800be, 0xa03d800c, 0xec02ba20, 0xfa021e80, 0x0ba003e8, + 0x00fa0032, 0x800fa003, 0xe800fa00, 0x3e800fa0, 0x03e800fa, 0x003db02c, + 0xa003fa04, 0x60000000, 0x00000000, 0x4800e000, 0xe8003e10, 0x0f820361, + 0x00f000ba, 0x100f8003, 0x6048f800, 0x3e000f80, 0x13e000f8, 0x403e020f, + 0x8082e000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe000f800, + 0x3e000f80, 0x03e000f8, 0x003e090f, 0x8403d200, 0x30000000, 0x00000000, + 0x0800e400, 0xc9003e70, 0x0f9003e6, 0x10f90032, 0x600e9813, 0xe400c100, + 0x32400790, 0x03e400e9, 0xa02e440d, 0x9003e420, 0xf9a03e40, 0x0f9003e4, + 0x00c9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400c, + 0x9903c204, 0x30000000, 0x00000000, 0x80044400, 0xad002240, 0x0b9002e4, + 0x00b9003c, 0x78089182, 0xe401e930, 0x2e400b90, 0x02c70089, 0x402e620d, + 0x9803a400, 0xb9002e40, 0x0b9002e4, 0x0289002e, 0x400b9002, 0xe400b900, + 0x2e400b90, 0x02e400b9, 0x002e542a, 0x9c02e000, 0x10000000, 0x00000000, + 0x18152482, 0x81002640, 0x0b9002ac, 0x40b90062, 0x441a9012, 0xe4008900, + 0x26400b90, 0x02e441a9, 0x002e4008, 0xb102e400, 0xb9002e40, 0x0b9002c4, + 0x0089002e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400b9, 0x002e4208, + 0x9082c600, 0x40000000, 0x00000000, 0x08040440, 0xa14020d0, 0x1b1402c4, + 0x0031406e, 0x40881002, 0xc500b100, 0x2c400b14, 0x02c40081, 0x002c4089, + 0x1002c400, 0xb1006c40, 0x0b1002c4, 0x4081102c, 0x400b1002, 0xc400b100, + 0x2c400b10, 0x02c400b1, 0x002e440a, 0x1002c211, 0x00000000, 0x00000000, + 0x38088100, 0xc8283600, 0x0b8003a8, 0x00f00032, 0x000e8003, 0xe0088800, + 0x22000f80, 0x03e800ea, 0x043e000c, 0x8003e000, 0xf8003e00, 0x0f8003e1, + 0x00c0403e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x003e100c, + 0x8003ee03, 0x50000000, 0x00000000, 0x9819f582, 0xfd003740, 0x0f5003f4, + 0x00b9403b, 0x410f9403, 0xfc00e940, 0x3b500f90, 0x02e4007d, 0x003f400f, + 0xd013bc00, 0xf9003e40, 0x0f9003e4, 0x80f9203e, 0x400f9003, 0xe400f900, + 0x3e400f90, 0x03e400f9, 0x023f480f, 0x9003e606, 0x70000000, 0x00000000, + 0x1805d403, 0xc9003f44, 0x4f900334, 0x01e91033, 0x4008d283, 0x2440fd00, + 0x36400f91, 0x033400fd, 0x001d400f, 0xd0072400, 0xfd003e40, 0x0f9003e4, + 0x00f90032, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003f400c, + 0x5003e600, 0x70000000, 0x00000000, 0x3810e002, 0x88212e08, 0x0b80a360, + 0x00801022, 0x00288002, 0x2080b840, 0x22000b80, 0x032000b8, 0x002e000b, + 0xa002a000, 0xb8002e00, 0x0b8002e0, 0x08b80022, 0x000b8002, 0xe000b800, + 0x2e000b80, 0x02e000b8, 0x002e0a28, 0x8002ce04, 0x30000000, 0x00000000, + 0x0805c400, 0x812c2c48, 0x0b12020c, 0x00a10120, 0x40081002, 0x0480b110, + 0x2c440b10, 0x024400b1, 0x802c404b, 0x90220400, 0xb1002c40, 0x0b1002c4, + 0x00b10020, 0x400b1002, 0xc400b100, 0x2c400b10, 0x02c400b1, 0x002e4009, + 0x1002c201, 0x70000000, 0x00000000, 0x1815a422, 0x89402e40, 0x0b120264, + 0x20a90026, 0x40089002, 0x2481b904, 0x2a400b10, 0x022c00bb, 0x002ec20b, + 0x9022a400, 0xb9002e40, 0x0b9002e4, 0x00b90022, 0x400b9002, 0xe400b900, + 0x2e400b90, 0x02e400b9, 0x002e4809, 0x9002c604, 0x60000000, 0x00000000, + 0xa0108640, 0x89003e40, 0x0f9c8305, 0x04a90430, 0x480c9009, 0x2400f900, + 0x3e724f90, 0x0b6400f9, 0x403e500f, 0x95022600, 0xf9003e40, 0x0f9002e4, + 0x00b900b2, 0x400f9003, 0xe400b900, 0x3e400b90, 0x03e400f9, 0x003e720d, + 0x9003e804, 0x70000000, 0x00000000, 0xa800a622, 0xf9021e40, 0x0f9003e7, + 0x00d900ba, 0x700f9023, 0xe600f908, 0x36440f90, 0x03e420f9, 0xa03e6407, + 0x9803e480, 0xf9003e40, 0x0f9013e4, 0x00f9003e, 0x400f9003, 0xe400f900, + 0x3e400f90, 0x03e400f9, 0x003e400e, 0x9003ea00, 0x60000000, 0x00000000, + 0x2810a100, 0xc8013e04, 0x0f840360, 0x20f80436, 0x000f0183, 0xe100c802, + 0x3e100f80, 0x032000f8, 0x0832104c, 0x8403e000, 0xf8003e00, 0x0f8003e0, + 0x00c8003e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x003e020c, + 0x80030a04, 0x20000000, 0x00000000, 0x28043900, 0xaa002fb0, 0x0ba00339, + 0x04ba0023, 0x800bec02, 0xe8008680, 0x22800ba0, 0x037800be, 0x80238408, + 0x2883a800, 0xba002e80, 0x0ba002e8, 0x028a002e, 0x800ba002, 0xe800ba00, + 0x2e800ba0, 0x02e800ba, 0x002db80a, 0xe00a0a00, 0x40000000, 0x00000000, + 0x28054d00, 0x830024c2, 0x0b30020c, 0x00bb0020, 0xdc0b3c02, 0xcc0093c0, + 0x28c00b30, 0x020e00b3, 0x9020d009, 0x3032cc08, 0xb3102cc0, 0x0b3002cc, + 0x088b002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x002ce008, + 0x38220a00, 0x50000000, 0x00000000, 0x20011c00, 0xa7002d40, 0x09701a1c, + 0x00b73021, 0xc00b5002, 0xfe019508, 0x21c00b72, 0x025d00bf, 0x8023e029, + 0x70029c00, 0xb7002dc0, 0x0b7002de, 0x8087202d, 0xc00b7002, 0xdc00b700, + 0x2dc00b70, 0x02dc00b7, 0x002f002a, 0x78822800, 0x40000000, 0x00000000, + 0x20081600, 0xc7a83de0, 0x0ff8031e, 0x00f7b0a1, 0xe00f5803, 0xde42d180, + 0x29e00ffa, 0x031e00f7, 0x80b1e09d, 0x7843de00, 0xf7803de0, 0x0f7803ff, + 0x40c7803d, 0xe00f7803, 0xde00f780, 0x3de00f78, 0x03de00f7, 0x803d200c, + 0x780b2a02, 0x00000000, 0x00000000, 0x081da400, 0xff503ec0, 0x4fb203ac, + 0x00fb413a, 0x800f9003, 0xdc80e800, 0x3ac00ff5, 0x03e008b3, 0x007e411e, + 0xb003ac00, 0xfb0036c0, 0x8fb003ec, 0x00fb183e, 0xc00fb003, 0xec00fb00, + 0x3ec00fb0, 0x03ec00fb, 0x003d000f, 0xb003c206, 0x60000000, 0x00000000, + 0x4005fe00, 0xc780b3e0, 0x0ffc835e, 0x00ef8037, 0xe40fd803, 0x3e20ed80, + 0x37e00efc, 0x03be007f, 0x803fe40c, 0x73033e00, 0xbf903fe0, 0x0ff903fe, + 0x00ff803f, 0xe00ff803, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x803fa00d, + 0x78031000, 0x70000000, 0x00000000, 0xa8119d40, 0xd71035c0, 0x1bf21290, + 0x208710b1, 0x400b5003, 0x5c00d500, 0x3dc008f0, 0x021c00b5, 0x202dcc0d, + 0x7003dc00, 0xb5002dc0, 0x0b7042dc, 0x00b7002d, 0xc00b7002, 0xdc00b700, + 0x2dc00b70, 0x02dc00b7, 0x002f8028, 0x50022a04, 0x60000000, 0x00000000, + 0x80009400, 0x8f0821c0, 0x0b704a3c, 0x00a70021, 0xc2090002, 0x3c00b100, + 0x21c00b70, 0x02dc00b6, 0x002f8049, 0xf1421d20, 0xb7002dc0, 0x0b7042dc, + 0x00b7002d, 0xc00b7002, 0xdc00b700, 0x2dc00b70, 0x02dc00b7, 0x002d8009, + 0x70020400, 0x20000000, 0x00000000, 0x6014c780, 0x838024c0, 0x0b380203, + 0x28830020, 0x300b0012, 0x4f008000, 0x24e01930, 0x124000b0, 0x002c0009, + 0x3102cc00, 0xb1002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x02cc00b3, 0x002ca408, 0x300a1804, 0x30000000, 0x00000000, + 0x28158602, 0x8f803280, 0x0bf5032c, 0x00ef0230, 0xe04d9023, 0x3ec0b900, + 0x32c20ff0, 0x03cc00fb, 0x983c0001, 0x30032e00, 0xf3003ec0, 0x0fb003fc, + 0x00ff003e, 0xc00fb002, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ee00d, + 0xb0030a04, 0x60000000, 0x00000000, 0x80006440, 0xff003e10, 0x0fb103ec, + 0x00fb003a, 0xc84f8043, 0xfc00f900, 0x3ec00ef0, 0x13ac05fa, 0x003e400f, + 0x9003ec00, 0xfb007ec0, 0x0fb003ec, 0x00fb013e, 0xc00fb003, 0xec00fb00, + 0x3ec00fb0, 0x03ec00fb, 0x003e820f, 0xa403e000, 0x30000000, 0x00000000, + 0x0110e402, 0xc70033c0, 0x0cf00370, 0x00f30033, 0x700d5011, 0x3c01cd00, + 0x2ec08ff0, 0x023e00cd, 0x9233000e, 0xf8073c00, 0xfdc133c0, 0x0ff003fc, + 0x00ff0033, 0xc00ff003, 0xfc00ff00, 0x3fc00ff0, 0x03fc00ff, 0x003f000c, + 0xf003e004, 0x30000000, 0x00000000, 0x81046600, 0x8b0028d0, 0x0ab04220, + 0x00eb003e, 0x18088802, 0xac05d8e2, 0x26c00bb0, 0x03a208a0, 0x8036600d, + 0xb002ac00, 0xb9002ac0, 0x0bb002ec, 0x00bb0036, 0xc00bb002, 0xec00bb00, + 0x2ec10bb0, 0x02ec08bb, 0x000c2008, 0xb082e040, 0x10000000, 0x00000000, + 0x80002200, 0x8b012ac2, 0x8830022c, 0xa0bb0062, 0x800998a2, 0x8c008880, + 0x2ec00b30, 0x02e0808b, 0x002a2008, 0xb1026c00, 0xbb0022c0, 0x0bb002ec, + 0x00b30022, 0xc00bb002, 0xec00bb00, 0x2ec00bb0, 0x02ec00bb, 0x002ea008, + 0xb002e000, 0x40000000, 0x00000000, 0x08002000, 0x83002ac0, 0x1a304280, + 0x10230068, 0x00080002, 0x8c008000, 0x2cc00b30, 0x028000a0, 0x002e400b, + 0x3002cc00, 0x310028c0, 0x0b3002cc, 0x00b30024, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x02cc00b3, 0x002e8008, 0x0002c201, 0x00000000, 0x00000000, + 0x00086000, 0xcf023ac1, 0x08f00320, 0x00ff0022, 0x000d8002, 0xbc028801, + 0x3ec00ff0, 0x03a000c8, 0x043a001e, 0xb0226c00, 0xf90032c0, 0x0fb003fc, + 0x00ff0032, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x013e802c, + 0xb003e003, 0x50000000, 0x00000000, 0xa019f000, 0x3f003fc0, 0x0ff00b30, + 0x00ff003f, 0x004fc003, 0xdc08fc01, 0x37c08ff0, 0x03b000fc, 0x0035000d, + 0xf003bc00, 0xfd003fc0, 0x0ff013fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00ff, 0x003f800f, 0xf003e806, 0x70000000, 0x00000000, + 0xc015fc00, 0xdf803d30, 0x0ef00352, 0x40ff1037, 0xca0df113, 0x32009480, + 0x37200f48, 0x03f200df, 0x343b800f, 0xf043fc80, 0xfd843731, 0x4cf2035c, + 0xa0cf803f, 0xe00ff803, 0xfe00ef80, 0x3fcc0ff2, 0x03fe00ff, 0x9033c00c, + 0xf803f080, 0x70000000, 0x00000000, 0x8090bf00, 0x8b802e00, 0x08fd0220, + 0x84b75023, 0xf04bf34a, 0x22108908, 0x2a210b88, 0x03a2088f, 0x6026b40e, + 0xf7823f04, 0xbb803c08, 0x0af3822b, 0x00ab802e, 0xe00eb802, 0xee00bb80, + 0x2ed48bb6, 0x82ec20b8, 0x0022f008, 0xb802e006, 0x30000000, 0x00000000, + 0x0a048c40, 0x83002e08, 0x0a3002c0, 0x00a30424, 0xc00a3202, 0xa000b820, + 0x28200a00, 0x02e00193, 0x302c8002, 0x30028c40, 0xb3022400, 0x8830024c, + 0x0083006c, 0xc00b3002, 0xcc00a300, 0x2cc88b34, 0x02cc80ab, 0x0020d00a, + 0x3002c200, 0x00000000, 0x00000000, 0xc000ac00, 0x8b002ec2, 0x08b022a4, + 0x00bb0022, 0xc00bb022, 0xa180a980, 0x2a408ba1, 0x02e200a3, 0x0066800a, + 0xb0022c00, 0xbb802ec3, 0x8ab00629, 0x00ab006e, 0xc00ab002, 0xec00bb00, + 0x2ec01bb0, 0x22ec00bb, 0x4022c00a, 0xb002f000, 0x60000000, 0x00000000, + 0x4101ec00, 0xcb006e00, 0x0eb013e0, 0x08eb0036, 0xc00cb023, 0x8304f9c8, + 0xbe001f8c, 0x03c320db, 0x003a948e, 0xb001ac00, 0xf9813601, 0x0cb0236f, + 0x00cb003e, 0xc00fb003, 0xec00eb00, 0x3ec00fb0, 0x03ec04f3, 0x40b2040e, + 0xb003d044, 0x70000000, 0x00000000, 0xa001bc00, 0xff013fc4, 0x4f70017e, + 0x40ff003f, 0xc00fb003, 0x7601df00, 0x3fe84dd0, 0x03b020df, 0x003be08e, + 0xb0117c00, 0xfe003f10, 0x077003fe, 0x60ff003f, 0xc00ef003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00ff, 0xa03de12d, 0xf043e800, 0x60000000, 0x00000000, + 0xc0008c40, 0xdb003e00, 0x0df013a8, 0x10df0133, 0xc18e7003, 0x2480eb40, + 0x32a80fb7, 0x072300ff, 0x003af20f, 0xb003ac40, 0xeb0032c0, 0x0cf103ef, + 0x00cb103e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec02cb, 0x003a680f, + 0xb803f004, 0x20000000, 0x00000000, 0xc8153c00, 0x8b003cc0, 0x48f1016c, + 0x10cf0423, 0xc029f003, 0x66049300, 0x36f00bbc, 0x436000df, 0x002e704d, + 0xf0077f44, 0xd26236c0, 0x0ffc02cc, 0x00abd072, 0xc00bb002, 0xec00bb00, + 0x2fc00bf0, 0x02ec008b, 0x0822d003, 0xb002f200, 0x40000000, 0x00000000, + 0xc4004c00, 0x83042c01, 0x09300200, 0x00bb0020, 0xc0093022, 0x0000b100, + 0x20100b04, 0x02010183, 0x00288088, 0xb0020e08, 0x13002200, 0x0a388288, + 0x0083c028, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x02cc0083, 0x8028c10b, + 0x3042f000, 0x10000000, 0x00000000, 0x60105e00, 0x87806f20, 0x0879027a, + 0x40878428, 0xe0097902, 0x5e209f80, 0x2da40bf8, 0x02d21097, 0x802de009, + 0x7802de41, 0xbfd025e4, 0x097800da, 0x00a78061, 0xe00b7802, 0xde00b780, + 0x2de00b78, 0x02de008f, 0x8021e00b, 0x7c02d804, 0x10000000, 0x00000000, + 0x6c084c00, 0xc3002cc0, 0x0d30428c, 0x00f30020, 0xc4083003, 0x0c00a300, + 0x20c00b14, 0x020080a3, 0x2038c40c, 0x30020c00, 0xf3013000, 0x1e30038c, + 0x90c30038, 0xc00f3003, 0xcc00f300, 0x3cc40f31, 0x03ec00c3, 0x0038c00f, + 0x3003d202, 0x10000000, 0x00000000, 0x40059c20, 0xef007bc0, 0x0f7003fc, + 0x00ff0037, 0xc006f023, 0xdc00ef00, 0x37c00ff0, 0x035009ff, 0x003dc00f, + 0xf1035c30, 0xd7003fc0, 0x8ff00378, 0x00f7003b, 0xc00ff003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00f7, 0x003fc007, 0xf003d004, 0x60000000, 0x00000000, + 0x0815ac02, 0xcb003ec0, 0x0ffa0366, 0x00cf2033, 0xd10ef003, 0x2000e102, + 0x32600ca0, 0x03e000ff, 0x493b800f, 0xb0032c00, 0xcb0032c0, 0x0df4833a, + 0x00cb003e, 0xc00fb003, 0xec00fb00, 0x3ec40fb1, 0x03ec00fb, 0x00b3400f, + 0xb003c204, 0x20000000, 0x00000000, 0xe0109cd0, 0x87012dc0, 0x0b35023c, + 0x00d71035, 0xc20bf513, 0x5c00b700, 0x29c02870, 0x039000b7, 0x4431600b, + 0xf5120cc0, 0xa60037c0, 0x0df20352, 0x00a70039, 0xc00b7002, 0xdc00b700, + 0x2dc80b72, 0x02dc00bf, 0x00b5404b, 0x7002f104, 0x20000000, 0x00000000, + 0x20008e01, 0x87802df0, 0x0b7a025e, 0x00839125, 0xec1b7a02, 0x1e04bf80, + 0x23e04978, 0x429200b3, 0xa429ec1a, 0x78021e80, 0x978025e0, 0x08794206, + 0xc087802d, 0xe00b7802, 0xde00b780, 0x2de00b78, 0x02de00b7, 0x8021600b, + 0x7802c800, 0x20000000, 0x00000000, 0x4804cc02, 0x83002cf0, 0x8b30020d, + 0x909b0024, 0xc00bb022, 0x4c00b344, 0x28e00831, 0x228d00bb, 0x0020e20b, + 0x30020c04, 0xb26024e8, 0x0930024c, 0x00a30028, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x02cc00b3, 0x80a4c00b, 0x3002db00, 0x20000000, 0x00000000, + 0xe8056800, 0xca022f80, 0x0fa0037a, 0x088a0036, 0x800fa003, 0x3840f660, + 0x23a80d6d, 0x03b820fa, 0x003ba00f, 0xa04b2800, 0xde0037b8, 0x0ca00339, + 0x00ca003e, 0x800fa003, 0xe800fa00, 0x3e800fa0, 0x03e800fe, 0x5033800f, + 0xa023fb00, 0x70000000, 0x00000000, 0x48018000, 0xf8003e08, 0x0f8003e0, + 0x40f8003e, 0x008f8003, 0xe000f80e, 0x3e190e84, 0x02a02838, 0x003a040f, + 0x0013e002, 0xe8403e00, 0x0f8407e1, 0x20f8403e, 0x000f8003, 0xe000f800, + 0x3e000f80, 0x03e000f8, 0x103e300f, 0x8003d210, 0x60000000, 0x00000000, + 0x0800a480, 0xc9003e40, 0x0f9a0364, 0x00f90032, 0x400f9003, 0x6440f900, + 0x36400f90, 0x032650f9, 0x043e480f, 0x90034600, 0x89003240, 0x1c180324, + 0x80f9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x00b2640f, + 0x9003c300, 0x20000000, 0x00000000, 0x80046400, 0x89002e40, 0x0b9416e4, + 0x00b9003a, 0x4009900e, 0x2408b900, 0x36500e92, 0x02250039, 0x00334003, + 0x9002a502, 0x01202240, 0x0a9902b6, 0x00e9482e, 0x400b9002, 0xe400b900, + 0x2e400b90, 0x02e400b9, 0x42a2680b, 0x9012e000, 0x10000000, 0x00000000, + 0x38152402, 0x89002e40, 0x1b9412ec, 0x00b90022, 0x400b9042, 0x2400b900, + 0xa2404b90, 0x022500b9, 0x0426c00b, 0x90026480, 0xa900a041, 0x98900224, + 0x20b9002e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400b1, 0x08a2c04b, + 0x9002ce04, 0x40000000, 0x00000000, 0x28140400, 0x81002c50, 0x1b1042c5, + 0x00314028, 0x40091402, 0x0400b940, 0x24408b90, 0x220408b1, 0x4020c00b, + 0x14028401, 0xa1002050, 0x8b3102c4, 0x00a1006c, 0x401b1002, 0xc400b100, + 0x2c440b11, 0x02c440b1, 0x1020410b, 0x1842ca05, 0x00000000, 0x00000000, + 0x380d60a0, 0xc8003e00, 0x0f8002e0, 0x01b80032, 0x000f8002, 0x2000f801, + 0x32800f80, 0x032000f8, 0x023e0a0b, 0x80036800, 0xe8013200, 0x0c840320, + 0xa0f8003e, 0x000f8003, 0xe000f800, 0x3e1a0f86, 0x83e100f8, 0x40320b0f, + 0x8003ce03, 0x50000000, 0x00000000, 0x9811e400, 0xf9003f40, 0x0f9403f4, + 0x00f9403a, 0x50059403, 0xb400fd00, 0x3d400ed0, 0x0bfc00f9, 0x401b404f, + 0x94436500, 0xd50037c0, 0x0e9603b4, 0x00f9003e, 0x400f9003, 0xe400f900, + 0x3e480f92, 0x03e480fd, 0x20bf400f, 0x9003e610, 0x70000000, 0x00000000, + 0x1805f400, 0xc9003e44, 0x2cd003a4, 0x08c91032, 0x480f9283, 0x3400f904, + 0x3b400f50, 0x03f400f9, 0x2933400e, 0x9003f400, 0xc5003a40, 0x0fd2833c, + 0x00cd003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x032400fd, 0x0033c02c, + 0xd0030601, 0x60000000, 0x00000000, 0x3818a000, 0xc8002e88, 0x088402e8, + 0x21881022, 0x008b8202, 0x2000b008, 0x2a000b80, 0x02e000b8, 0x2036810b, + 0x8482e000, 0x8800320a, 0x8b800220, 0x00d8002e, 0x00098002, 0xe000b800, + 0x2e000b80, 0x0a2000b2, 0x00220008, 0x80420e06, 0x30000000, 0x00000000, + 0x48048c00, 0x91002848, 0x081102c4, 0x00810060, 0x450b1282, 0x0400b120, + 0x68400b10, 0x06c400a1, 0x2824404b, 0x1312c446, 0x8100a848, 0x1b100224, + 0x0081002c, 0x400b1002, 0xc400b100, 0x2c400b10, 0x020400b1, 0x00284108, + 0x10221201, 0x20000000, 0x00000000, 0x9804a400, 0x89002c40, 0x489042e4, + 0x808900a2, 0x400b1002, 0x2420b980, 0x2a580b90, 0x86e480b1, 0x0026400b, + 0x9022e400, 0x89002240, 0x0b10422c, 0x0099002e, 0x40099002, 0xe400b900, + 0x2e400b90, 0x022400b9, 0x00aa5008, 0x90422600, 0x20000000, 0x00000000, + 0xa011e408, 0xd9003e50, 0x089003e5, 0x00890032, 0x400f900b, 0x2600f900, + 0x3a704b90, 0x17e400f9, 0x00b2700f, 0x9023c400, 0xc1017a60, 0x0fd00b24, + 0xc049003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x032400f9, 0x003a700c, + 0x100b2804, 0x70000000, 0x00000000, 0xc8018402, 0xf9003e64, 0x0f9043e4, + 0x02f9003e, 0x408f9003, 0xe490f900, 0x3e400f91, 0x03e414f9, 0x007a640f, + 0x9043e400, 0xf9903a49, 0x0b9003e4, 0x00f9003e, 0x400f9003, 0xe400f900, + 0x3e404f10, 0x03e400f9, 0xc036440f, 0x9003f210, 0x60000000, 0x00000000, + 0x0810a000, 0xf8003a10, 0x2c8097e1, 0x00c00036, 0x000e8003, 0x60103800, + 0x32110f84, 0x03a140f8, 0x011e1808, 0x8003e000, 0xf820b210, 0x0f8003a1, + 0x20c8003e, 0x000f8003, 0xe000f800, 0x3e001c80, 0x03e000f8, 0x4032100c, + 0x8083c204, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x09ee03a8, + 0x008a0022, 0x8008a002, 0xb844ba01, 0x2b808be5, 0x823b00ba, 0x002f990a, + 0xa003ba00, 0xbe002280, 0x0be4829a, 0x00dea02e, 0x800ba002, 0xe800ba00, + 0x2e8028a0, 0x02e800be, 0x9881894d, 0xe402ca00, 0x40000000, 0x00000000, + 0x28044c00, 0xb30028c0, 0x081c02ac, 0x02830064, 0xc00a3002, 0x0d403b00, + 0x24c20b1c, 0x428e3023, 0x002cd008, 0x30028c80, 0xb30020c0, 0x0b3a228e, + 0x00a3892c, 0xc0033002, 0xcc00b300, 0x2cc00830, 0x06cc00bb, 0x4020c048, + 0x3842ca00, 0x10000000, 0x00000000, 0x80105401, 0xb7002dc8, 0x095002bc, + 0x80832024, 0xe0083102, 0x90009724, 0x2d400b78, 0x225c00b7, 0x102c600a, + 0x72069c20, 0xb70121c4, 0x0b404288, 0x20b7002d, 0xc00b7002, 0xdc00b700, + 0x2ce80872, 0x12dc84b5, 0x00a30009, 0x7082e004, 0x10000000, 0x00000000, + 0x88085600, 0xf7823bf0, 0x0c68039f, 0x20c7e435, 0xe04e7a93, 0x5600f780, + 0x25e00f58, 0x039e10e7, 0xb03d6008, 0x78839e00, 0xf78031ec, 0x0f28539e, + 0x00e7803d, 0xe00f7803, 0xde00b780, 0x3df8087e, 0x03df80f6, 0x8031a10c, + 0x7803e202, 0x10000000, 0x00000000, 0x0815a400, 0xfb043fd8, 0x0ea0139c, + 0x80ff403a, 0xc007f023, 0xe008ff00, 0x3a008fb0, 0x33ac00ff, 0x003e000f, + 0xf303a400, 0xfa00bfc0, 0x0ff80164, 0x00db003e, 0xc00fb003, 0xec00fb00, + 0x3ec00fb0, 0x23ec08f8, 0x00bc008f, 0xb003c200, 0x60000000, 0x00000000, + 0x0004b600, 0xcf803ff1, 0x2cf8033e, 0x80cfc437, 0xe00ef803, 0x3240bff8, + 0x37e08ff8, 0x03fe40bf, 0x903b600f, 0xf1037e00, 0xf78033e0, 0x0cf88312, + 0x40cf8013, 0xe00ff803, 0xfe00ff80, 0x3fe04cf8, 0x10fe40fe, 0x90b3e0c8, + 0xf943c000, 0x60000000, 0x00000000, 0xa8189c00, 0x87003dc0, 0x0864021c, + 0x80871035, 0xc00d7001, 0x5000b710, 0x31400b52, 0x02d040b7, 0x04714a0d, + 0x70015814, 0xb70035c1, 0x08740350, 0xd0a50429, 0xc00b7002, 0xdc00b700, + 0x3fc00a70, 0x025c00b6, 0x38a10608, 0x7002ea06, 0x20000000, 0x00000000, + 0x00009440, 0x87002dc0, 0x08700a1d, 0xca930021, 0xc0083002, 0x5000b728, + 0xa1c00b60, 0x06dd40b3, 0x05294008, 0x71061c00, 0xbf0023c0, 0x08710230, + 0x01860021, 0xc00b7002, 0xdc00b700, 0x2dc00870, 0x02dc0cb6, 0x00210028, + 0x7002c000, 0x20000000, 0x00000000, 0x20048401, 0x830028d2, 0x0820020c, + 0x00930024, 0xc0093002, 0x4300b300, 0x20180b0c, 0x06c040b3, 0x00283009, + 0x30020000, 0xb34024e0, 0x08304241, 0x40800028, 0xc00b3002, 0xcc00b300, + 0x2cc008b0, 0x024c00b2, 0x48201008, 0x3002c800, 0x30000000, 0x00000000, + 0xa815e400, 0xcb002fc0, 0x0c80033c, 0x201f0002, 0xc00cf003, 0x4480f790, + 0x30680f17, 0x03ef00bf, 0x003a600c, 0xf0162400, 0xfbc031d8, 0x04900606, + 0x42cb0032, 0xc00fb003, 0xec00fb00, 0x3fc00cf0, 0x03fc00fb, 0xc032c40c, + 0x1023ea04, 0x70000000, 0x00000000, 0x80018400, 0xfb003fc5, 0x0f0403fc, + 0x00ef023c, 0xc10ff027, 0xe000ff01, 0x3e508fa4, 0x03ec00b7, 0x0432500f, + 0xb007e500, 0xf9103fc2, 0x0f7043e1, 0x00fa003e, 0xc00fb003, 0xec00fb00, + 0x3ac08fb0, 0x036c00fb, 0x003e000d, 0xb003e000, 0x40000000, 0x00000000, + 0x2110ac00, 0xcf053bc0, 0x0fa0073c, 0x10cf0472, 0xc00cf003, 0x3420cf00, + 0x37404cd0, 0x233100ff, 0x0132428f, 0xb0033284, 0xff0933c1, 0x0cfc0374, + 0x00cf0037, 0xc00ff003, 0xfc00ff00, 0x3fc00ff0, 0x033c00fe, 0x90b0002c, + 0xd0030844, 0x20000000, 0x00000000, 0xa1046402, 0x8b002ec0, 0x0ba8062c, + 0x00ab002a, 0xc01ab006, 0xa200ab00, 0x322088a4, 0x83e381eb, 0x003a280b, + 0xb002e190, 0xb1803ec0, 0x0db00227, 0x028a002e, 0xc00bb002, 0xec01bb00, + 0x2ec00bb0, 0x422c00ba, 0x82a2200c, 0xb4022840, 0x10000000, 0x00000000, + 0x80052600, 0x9b002ec0, 0x0a98224c, 0x00830062, 0xc0183042, 0x22048b00, + 0x2a3008b0, 0x122c00bb, 0x0122200b, 0x30022c00, 0xbbc00ac0, 0x08b00266, + 0x008b082e, 0xc00bb002, 0xec08bb00, 0x2ec00bb0, 0x026c00b2, 0x0022e008, + 0xbc022000, 0x40000000, 0x00000000, 0x08140400, 0x93002cc0, 0x0b00024c, + 0x01a30068, 0xc00a3002, 0xa000ab00, 0xa8000800, 0x02c00033, 0x042000c9, + 0x30028804, 0xb9022ec0, 0x09300200, 0x0280002c, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x0a4c00b2, 0x00200108, 0x30120205, 0x00000000, 0x00000000, + 0x000d6400, 0xdb0039c0, 0x0e900a5c, 0x01cf0022, 0xc008f002, 0x2000c700, + 0x3a000ca0, 0x0220043f, 0x00b2000f, 0xf0032800, 0xfb003bc0, 0x4c302364, + 0x004a0036, 0xc00fb003, 0xec00bb00, 0x3ec00fb0, 0x036c00f2, 0x0032004c, + 0xb0430003, 0x50000000, 0x00000000, 0xa015fc00, 0xef003fc0, 0x0fc003bc, + 0x00ff003f, 0xc00ff023, 0xf000ff00, 0x33000bc0, 0x03b000ef, 0x003b000f, + 0xf003f000, 0xfd002dc0, 0x0ff007f4, 0x00f4003f, 0xc00ff003, 0xfc103f00, + 0x3fc00ff0, 0x42bc00fe, 0x043f010e, 0xe003e804, 0x70000000, 0x00000000, + 0xc005fe00, 0xff8009c0, 0x0ef2c3f2, 0x00fd803d, 0x200dc803, 0xfca8ff80, + 0x3f608cf8, 0x03fe04ff, 0x001d200c, 0xf803fe08, 0xff803fe0, 0x0ff803fe, + 0x00ff903b, 0xe00ff803, 0xfe00ff80, 0x3fe00f78, 0x037e04ff, 0x813fe08f, + 0xf803f000, 0x70000000, 0x00000000, 0x8010ee00, 0xbb802ef4, 0x08fc02e2, + 0x00e9802e, 0x20088802, 0xdd208b80, 0x2e600bb8, 0x02ee04bb, 0xc02e200a, + 0xb802ee00, 0xbb802ee0, 0x0bb803ee, 0x00bb0036, 0xe009b802, 0xee00bb80, + 0x2ee08fb8, 0x022e00bb, 0x802ee00b, 0xb802e004, 0x30000000, 0x00000000, + 0x08058c00, 0xa3012cc0, 0x0a300680, 0x01b1006e, 0x000b0002, 0xcc808302, + 0x2c400a30, 0x028c00b3, 0x402c000a, 0x3006cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b32020, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x024c00b3, 0x002cc00a, + 0x3002c201, 0x70000000, 0x00000000, 0xc014ac08, 0xbb002ec4, 0x08b002e2, + 0x00bb802e, 0x204a8202, 0xec02ab00, 0x2e480bb0, 0x00ec08bb, 0x002ec84a, + 0xb002ec00, 0xbb002ec0, 0x0bb002ac, 0x00bb0026, 0xc00bb002, 0xec00bb00, + 0x2ec08ab0, 0x022c00bb, 0x002ec00b, 0xb002f004, 0x60000000, 0x00000000, + 0x4015ec00, 0xfb0038e8, 0x0eb003a3, 0x20f9c03c, 0x200f8207, 0xec00fb00, + 0x3ec00cb0, 0x23ac00fb, 0x000e280e, 0xb003ec00, 0xfb003ec0, 0x0fb002ec, + 0x00bb0032, 0xc00fb003, 0xec00fb00, 0x3ec00bb0, 0x176c04fb, 0x043ec00e, + 0xb003d004, 0x70000000, 0x00000000, 0xe0013c14, 0xff003fe0, 0x8ff003f4, + 0x00ed003f, 0x000df007, 0xfc04df00, 0x3fe00ff0, 0x22fc00ff, 0x003f620f, + 0xf0437c00, 0xff003fc0, 0x0ff003fc, 0x00ff0037, 0xc00df003, 0xfc00ff00, + 0x3fc00ff0, 0xa3fc00ff, 0x003fc00f, 0xf003f800, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb043bc0, 0x0ef003e4, 0x80fb003a, 0x020db023, 0xcc00fb00, + 0x3ec00eb0, 0x03ec00fb, 0x0c3a800c, 0xb2432c00, 0xfb003ec0, 0x0fb003ec, + 0x00fb0036, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, + 0xb003f004, 0x20000000, 0x00000000, 0xc8052c04, 0xbb003e00, 0x08f08624, + 0x00bbd022, 0x080db012, 0xfc00ab00, 0x3af00bb0, 0x02ec10bf, 0xc020f00d, + 0xba036c00, 0xbb002ec0, 0x0bb002ec, 0x04bb8022, 0xc00bb002, 0xec00bb00, + 0x2ec00b3c, 0x022c00bb, 0x002ec00b, 0xb002f200, 0x40000000, 0x00000000, + 0xe0014c00, 0xb30068c0, 0x0a300280, 0x01b0c00c, 0x20000002, 0x4c008301, + 0x24ec0b30, 0x024e4093, 0x90282001, 0x3c004c00, 0xb3002cc0, 0x0b3002cc, + 0x04bb8024, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x028c00b3, 0x002cc01b, + 0x3002f800, 0x50000000, 0x00000000, 0x60011e00, 0xb7842de0, 0x087c0216, + 0x00b6982d, 0x20097802, 0xde02a780, 0x29e00b78, 0x02de00b7, 0x806ba209, + 0x78025e00, 0xb7802de0, 0x0b7802de, 0x00b78821, 0xe00b7802, 0xde00b780, + 0x2de00b78, 0x821e00b7, 0x802de01b, 0x7802d800, 0x40000000, 0x00000000, + 0x48080c40, 0xb30038c0, 0x0e300284, 0x4071403c, 0x010c3003, 0xcc00a310, + 0x2cc00f30, 0x034c40d3, 0x0038400d, 0x30034c00, 0xf3003cc0, 0x0f3017cc, + 0x08fb0034, 0xc00f3003, 0xcc00f300, 0x3cc40f30, 0x03cc00f3, 0x003cc40f, + 0x3003d202, 0x00000000, 0x00000000, 0x401dbc04, 0xff003b00, 0x0f7083b4, + 0x50f70133, 0x441ff003, 0xfc0ccf00, 0x3bc00ff0, 0x03fc00f7, 0x0037c00f, + 0x7003fc00, 0xff003fc0, 0x0ff001fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00, + 0x3fc10ff0, 0x03fc00ff, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000, + 0xa805ec00, 0xfb007dc0, 0x0ef203e0, 0x00f3003a, 0x000f8803, 0x6d20fb00, + 0x38600eb0, 0x07ec00fb, 0x103ec00f, 0xb003ec00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, + 0xb003ea00, 0x70000000, 0x00000000, 0xc8019c00, 0xb7002de0, 0x487282d4, + 0x00b700b5, 0x400b7002, 0x1c00b700, 0x2d400870, 0x02dc10b7, 0x002dc00b, + 0x7002dc00, 0xb7002dc0, 0x0b7022dc, 0x00b7002d, 0xc00b7002, 0xdc00b700, + 0x2dc00b70, 0x02dc00b7, 0x002dc00b, 0x7002f204, 0x60000000, 0x00000000, + 0xc0009e00, 0xb7812dec, 0x0b7a06d6, 0x00bfc029, 0x201bf886, 0x5e40b784, + 0x6d600a78, 0x02de04b7, 0xa42de00b, 0x78029e00, 0xb7802de0, 0x0b7802de, + 0x00b7802d, 0xe00b7802, 0xde00b780, 0x2de00b78, 0x02de00b7, 0x802de00b, + 0x7802f000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3006cf0, 0x093002cf, + 0x00b34464, 0xc00b3802, 0x0c00b300, 0x2c400830, 0x02cc10b3, 0x002cd40b, + 0x3042cc00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002d204, 0x30000000, 0x00000000, + 0xe815a810, 0xfa003fa0, 0x0fa003f8, 0x00f6543b, 0x960fe903, 0x6810fa00, + 0x3e800ea0, 0x33e804fa, 0x003f800f, 0xa047e800, 0xfa003e80, 0x0fa003e8, + 0x00fa003e, 0x800fa003, 0xe800fa00, 0x3e800fa0, 0x03e800fa, 0x003e800f, + 0xa003fa04, 0x60000000, 0x00000000, 0x4840e000, 0xf8023c0c, 0x0e8400e0, + 0xc8f8413e, 0x000f8003, 0xc004f804, 0x3e100f80, 0x43e000f8, 0x043e100f, + 0x8003e000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe000f800, + 0x3e000f84, 0x03e000f8, 0x003e000f, 0x8003d200, 0x20000000, 0x00000000, + 0x0810e400, 0xf9003e60, 0x0c190366, 0x10e90032, 0x400e9003, 0xe400a900, + 0x3e400f90, 0x03e600f9, 0x803e420f, 0x9003e400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e400f98, 0x03e400f9, 0x003e400f, + 0x9003c204, 0x30000000, 0x00000000, 0x80046408, 0xb9002f60, 0x0a901204, + 0x40894034, 0x40089002, 0xe4008900, 0x2e600b90, 0x03a440b9, 0xc02e400b, + 0x9802e400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9002, 0xe400b900, + 0x2e400b9c, 0x02e400b9, 0x002e400b, 0x9002e001, 0x00000000, 0x00000000, + 0x18052400, 0xb9002e46, 0x18900264, 0x00a9282a, 0xc00a9002, 0xe400a900, + 0x2a440b90, 0x02e400b9, 0x102e400b, 0x9202e404, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x400b9002, 0xe400b900, 0x2e400b96, 0x02e400b9, 0x002e400b, + 0x9002c600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c41, 0x1a100224, + 0x088902a8, 0x40181002, 0xc500a100, 0x2cc00b10, 0x028400b3, 0x012cc00b, + 0x1002c400, 0xb1002c40, 0x0b1002c4, 0x00b1402c, 0x400b1002, 0xc400b100, + 0x2c400b10, 0x02c400b1, 0x002c400b, 0x1006c201, 0x00000000, 0x00000000, + 0x38056010, 0xf8043e0a, 0x0ca00360, 0x04e800aa, 0x000e8003, 0xe008e800, + 0x3a000f80, 0x01e000f8, 0x003e000f, 0x8003e000, 0x78003e00, 0x0f8003e0, + 0x00f8003e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000b8, 0x003e000f, + 0x8003ce03, 0x50000000, 0x00000000, 0x9859e400, 0xf9003f40, 0x0f9403f4, + 0x00fd0137, 0xc10f5003, 0xe500d900, 0x3f400f90, 0x43a400f9, 0x403f400f, + 0x9003e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f900, + 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003e606, 0x70000000, 0x00000000, + 0x1805e400, 0xf9003740, 0x0cd20b34, 0x00cd0037, 0x400f9003, 0xe4a0c900, + 0x7dc00d90, 0x038400fd, 0x21794009, 0xd003e400, 0xf9003e40, 0x0f9003e4, + 0x00fd003e, 0x400f9003, 0xe400f900, 0x3e400fd0, 0x03e400f9, 0x003e400f, + 0x9003c600, 0x70000000, 0x00000000, 0x3810e008, 0xb8042e00, 0x05810220, + 0x00880236, 0x000b8002, 0xc080a800, 0x2e000880, 0x03a000b8, 0x04260148, + 0x8002e000, 0xb8002e00, 0x0b8002e0, 0x00b8002e, 0x000b8002, 0xe000b800, + 0x2e000b80, 0x02e000b8, 0x002e000b, 0x8002ce04, 0x30000000, 0x00000000, + 0x0805c400, 0xa1012cc0, 0x08101244, 0x03890020, 0x400b1802, 0xc4a08101, + 0x2c401910, 0x028400b1, 0x102a4109, 0x1012c400, 0xb1002c40, 0x0b1002c4, + 0x00b1002c, 0x400b1002, 0xc400b100, 0x2c400b10, 0x02c400b1, 0x002c400b, + 0x1002c201, 0x70000000, 0x00000000, 0x1811a400, 0xb9002e51, 0x1990262e, + 0x00891826, 0x440b9002, 0xe400a904, 0x2e400890, 0x02a400b9, 0x00264809, + 0x9042e400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9002, 0xe400b900, + 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002c604, 0x60000000, 0x00000000, + 0xa011e400, 0xe9043e64, 0x0c100705, 0x84c94032, 0x504f9803, 0xe400c900, + 0x2c400d90, 0x03a400f9, 0x003a520d, 0x9007e400, 0xf9003e40, 0x0f9007e4, + 0x00fd002e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f, + 0x9003e804, 0x70000000, 0x00000000, 0xa801a400, 0xf9003e40, 0x0f9003e4, + 0x00f981be, 0x400f9203, 0xe400f900, 0x3e422f90, 0x03ec08f9, 0x0636404c, + 0x9006e400, 0xf9003e40, 0x0f9043e4, 0x00f9003e, 0x400f9003, 0xe400f900, + 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003ea00, 0x60000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0c8203e0, 0x70f8403a, 0x100f8003, 0xe000e800, + 0x3a018f80, 0x036000e8, 0x303a090d, 0x8003e000, 0xf8003e00, 0x0f8003e0, + 0x00f8003e, 0x000f8003, 0xe000f800, 0x3e000f81, 0x03e000f8, 0x003e000f, + 0x8003ca04, 0x20000000, 0x00000000, 0x28052804, 0xba002d80, 0x88e003fa, + 0x00e6e0a3, 0x810ba002, 0xe8048a01, 0x3ba208a0, 0x00ea008e, 0x003d9048, + 0xe812e800, 0xea002e80, 0x0ba000e8, 0x00ba002e, 0x800ba002, 0xe800ba00, + 0x2e800be0, 0x02e800ba, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000, + 0x28054c00, 0xb3006cc0, 0x091422cf, 0x00a3a028, 0xc0033042, 0xec00a300, + 0x2cd01a30, 0x02c800b3, 0x402cf008, 0x3002cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x82cc00b3, 0x002cc00b, + 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c01, 0xb7002dc0, 0x2970429c, + 0x00ad0021, 0xc01b7040, 0xdc088700, 0x2dc00870, 0x02d30094, 0x002d5008, + 0x4402dc00, 0xa7002dc0, 0x0b7002dc, 0x00b5202d, 0xc00b7002, 0xdc00b700, + 0x2dc00b70, 0x02dc00b7, 0x002dc00b, 0x7002e800, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7803de0, 0x0d4802de, 0x04e580b9, 0xe00f7802, 0xde84e784, + 0x3de00a78, 0x035a20f6, 0x8439e02c, 0x5803de00, 0xf7803de0, 0x0f7803de, + 0x00f7803d, 0xe00f7803, 0xde00f780, 0x3de00f78, 0x03de00f7, 0x803de00f, + 0x7803ea02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003cc0, 0x0eb003ec, + 0x00e1003e, 0xc00fb003, 0xed60fb00, 0x3ac006b0, 0x02e000e8, 0x003a000e, + 0x8043ec00, 0xeb003ec0, 0x0fb003ec, 0x00f9903e, 0xc00fb003, 0xec00fb00, + 0x3ec08fb0, 0x03ec00fb, 0x003ec00f, 0xb003c206, 0x60000000, 0x00000000, + 0x0005fe00, 0xff803de0, 0x0cc8039a, 0x04c59239, 0xe00ef803, 0xbe04df80, + 0x7fe40cf9, 0x03fa00ff, 0x803fe00c, 0xd325fc40, 0xff803fe0, 0x0bf903fe, + 0x01ff903f, 0xe00ff803, 0xfe00ff80, 0x3fe00ff9, 0x03fe00ff, 0x803fe00f, + 0xf803c004, 0x70000000, 0x00000000, 0xa8119c04, 0xf7002dc0, 0x0d74121c, + 0x00857821, 0xc1087002, 0xdc008710, 0x2d4c0d70, 0x039000b4, 0x10394408, + 0x4102dc00, 0xb7002dc0, 0x0b7002dc, 0x00f5002d, 0xc00b7002, 0xdc00b700, + 0x2dc00b70, 0x02dc00b7, 0x002dc00f, 0x7002ea04, 0x60000000, 0x00000000, + 0x00009c00, 0xb7002d40, 0x080102d8, 0x408c0069, 0xc00a7182, 0x9c009700, + 0x2dc08870, 0x429000b4, 0x002dc008, 0x5006dc40, 0xb7002dc0, 0x0b7022dc, + 0x00b7022d, 0xc00b7002, 0xdc00b700, 0x2dc00b70, 0x00dc00b7, 0x002dc00b, + 0x7002c000, 0x00000000, 0x00000000, 0x2014cc00, 0xa3002c40, 0x8930220c, + 0x10808420, 0xe0183486, 0xec008300, 0x2c400930, 0x028000b0, 0x00286408, + 0x0002cc00, 0xb3002cc0, 0x0b3002cc, 0x00a1000c, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x02cc00b3, 0x002cc00a, 0x3002c800, 0x30000000, 0x00000000, + 0xa815ac00, 0xbb003ec4, 0x0cb003e4, 0x14c900b8, 0xe70e3803, 0xbc02db00, + 0x2ec00cb0, 0x03a000f9, 0x003ed408, 0x8002ec00, 0xfb003ec0, 0x0fb003ec, + 0x00bb003e, 0xc00fb002, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00b, + 0xb003ea00, 0x60000000, 0x00000000, 0x8000ec08, 0xfb003ed4, 0x0fa403e7, + 0x82f8003e, 0x100fb003, 0xec00fb00, 0x3ed00fb0, 0x23a000f8, 0x003a400f, + 0x8003ec00, 0xfb003ec0, 0x0fb003ec, 0x00f9003e, 0xc00fb003, 0xec00fb00, + 0x3ec00fb4, 0x03ec00fb, 0x003ec00f, 0xb003e000, 0x30000000, 0x00000000, + 0x0110fc00, 0xff003d80, 0x0cc403fc, 0x04fd003b, 0xd008f003, 0x2c00ef00, + 0x2f400cf0, 0x03f200f4, 0x0233e81c, 0xc003fc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff003, 0xfc00ff00, 0x3fc00ff8, 0x037c00ff, 0x003fc00f, + 0xf003c040, 0x30000000, 0x00000000, 0x81046c00, 0xbb002e80, 0x8a8002ef, + 0x01e0c022, 0x300ab002, 0x2c00ab00, 0x2c320fb0, 0x02e209b8, 0xca20000a, + 0x8802ec00, 0xfb002ec0, 0x0fb012ec, 0x00f9002e, 0xc00bb002, 0xec00bb00, + 0x2ec00f0d, 0x822c00bb, 0x002ec009, 0xb002e040, 0x10000000, 0x00000000, + 0x80012c00, 0xbb016ed0, 0x48a012ec, 0x40b9802a, 0xc24ab002, 0x2c00ab00, + 0x2ee008b0, 0x02e044b8, 0x81a24008, 0x8822ec00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0xec00bb00, 0x2ec00bb0, 0x026c00bb, 0x002ec01b, + 0xb0026004, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0a2062c8, + 0x00a80020, 0x000ab00a, 0x0c00a300, 0x2e400b30, 0x02c00090, 0x0060404a, + 0x0806cc04, 0xb3002cc0, 0x0b3002cc, 0x00a10024, 0xc00b3002, 0xcc00b300, + 0x2cc00a30, 0x02cc00b3, 0x012cc009, 0x3002c201, 0x00000000, 0x00000000, + 0x000d6c00, 0xfb003e00, 0x0c8013e4, 0x10b8013a, 0xc00eb003, 0x3c00eb02, + 0x3e4008b0, 0x03e000b8, 0x00324018, 0x8003ec00, 0xfb003ec0, 0x0fb003ec, + 0x04bb013e, 0xc04fb007, 0xec00fb00, 0x3ec00bb0, 0x036c00fb, 0x003ec00f, + 0xb003c003, 0x00000000, 0x00000000, 0xa01dfc00, 0xff003f00, 0x0fc023f0, + 0x08fc003f, 0x000ff003, 0xfc00df00, 0x7d400ef0, 0x03f000fc, 0x003d400f, + 0xc007fc00, 0xef003fc0, 0x0ef003fc, 0x00fd003f, 0xc00ff003, 0xfc00ff00, + 0x3fc00ff0, 0x033c00ff, 0x003fc00d, 0xf003e803, 0x70000000, 0x00000000, + 0xc095fe00, 0xcf003f00, 0x0ff2837c, 0x00fc843d, 0x244ef183, 0x1200ef38, + 0x33c81f72, 0xa35210ef, 0x8137c81c, 0x4803f200, 0xff212524, 0x0ff203fe, + 0x04ff803f, 0xe08ff803, 0xfc04ef20, 0x3f200f58, 0x033c40f7, 0x8131e000, + 0xf3023082, 0x70000000, 0x00000000, 0x8000e880, 0x8b602e00, 0x0bfc023f, + 0x40ba802e, 0x0848f612, 0x2080df60, 0x23e40bfc, 0x12e0888b, 0x802fc60a, + 0x88022200, 0xafc02208, 0x0bfc02ee, 0x00fb802e, 0xe00bb802, 0xef408b1a, + 0x0e200b90, 0x822c00eb, 0x822ae008, 0xa142a000, 0x20000000, 0x00000000, + 0x08008428, 0xa3482c80, 0x0b30224c, 0x00b0042e, 0x090a3202, 0x0020a304, + 0x28c00b30, 0x02a028a3, 0x002cc80a, 0x00124000, 0x83106008, 0x0b3102cc, + 0x00b3002c, 0xc00b3002, 0xcc00a320, 0x2c800b90, 0x0a8c40b3, 0x00208008, + 0x32060201, 0x20000000, 0x00000000, 0xc0158a01, 0xab002e80, 0x0bb0022c, + 0x00bb202e, 0x4008b006, 0x0210ab00, 0x2ac10bb0, 0x42e0048b, 0x006cc00a, + 0x9802ac80, 0xab006260, 0x0bb042ec, 0x00bb002e, 0xc00bb002, 0xec048b00, + 0x2ef00b98, 0x02ac00ab, 0x082ae018, 0xb002b004, 0x60000000, 0x00000000, + 0x0184e020, 0xeba03e48, 0x0fb0036c, 0x10f8003e, 0x200eb00b, 0x2200ab00, + 0x3ac00bb0, 0x23a920ab, 0x022ec00a, 0x0a016104, 0xdb00b610, 0x0fb007ec, + 0x01fb003e, 0xc00fb003, 0xec00eb00, 0x3e000f98, 0x01ac00f8, 0x0032722c, + 0x34030040, 0x30000000, 0x00000000, 0x8100b000, 0xdf103fc0, 0x0ff083fc, + 0x003e843f, 0xe40fb013, 0xf401d702, 0x37c30df0, 0xc3ff14ff, 0x081ec017, + 0xd0037200, 0x7f003f00, 0x0ff003fc, 0x08ef043f, 0xc00ff023, 0xdc00ff00, + 0x3f000ff0, 0x037c00ef, 0x923fc00f, 0xf443e060, 0x20000000, 0x00000000, + 0xc000a400, 0xcf203e00, 0x0ef003fc, 0x61c9403a, 0x800e700b, 0x2500ff00, + 0x32c40df0, 0x43ac00cb, 0x023fc00d, 0x88432c20, 0xc3003650, 0x0eb003ac, + 0x00fb003e, 0xc00fb003, 0xec10fb00, 0x32100fa0, 0x036c00fb, 0xa032900c, + 0xb4833800, 0x20000000, 0x00000000, 0xe8052000, 0x0ac022a6, 0x0b70a23c, + 0x198b0020, 0xc008f002, 0x24008f00, 0x23c00efc, 0x024c008b, 0x402bc008, + 0x94114f30, 0xdf883640, 0x0af0032c, 0x00bb002e, 0xc00bb022, 0xfc00bf00, + 0x22400b30, 0x023c00b3, 0x4034c00d, 0xb203fa00, 0x40000000, 0x00000000, + 0xc4044c10, 0x13d22400, 0x0a3c020d, 0x01920028, 0x000a3006, 0x4000a300, + 0x20e04b34, 0x02c80483, 0x4028c00a, 0x04928100, 0xa3802000, 0x0a30028c, + 0x0033002c, 0xc00b3002, 0xcc00b300, 0x20580b10, 0x02cc10b3, 0x4020c009, + 0x30027000, 0x10000000, 0x00000000, 0x60001e40, 0x93802520, 0x0b38020e, + 0x009d8063, 0xa8887822, 0x76008382, 0xa1e80b78, 0x06fc0087, 0x8429e120, + 0xc802fe00, 0x97812760, 0x0a38001e, 0x00b7802d, 0xe00b7802, 0xde00b780, + 0xa1610bf9, 0x029e01bf, 0x8427e019, 0x7802d000, 0x00000000, 0x00000000, + 0x6c002400, 0xd3003cc0, 0x0e310b8c, 0x40924038, 0xd00e3003, 0x4400f300, + 0x20c00b30, 0x828c50c3, 0x3828c00f, 0x10038140, 0xe3013000, 0x4e32078c, + 0x00f3003c, 0xc00f3002, 0xcc00bb00, 0x20800f31, 0x03cc00f3, 0x1030c00d, + 0x96035200, 0x00000000, 0x00000000, 0x401dbc00, 0xef003bc0, 0x0ff403bc, + 0x18e5002f, 0xc90ff081, 0xb408ff00, 0x37c80ef4, 0x023cc0d7, 0x1033c04f, + 0xd0035c10, 0xf7403f44, 0x0df003bc, 0x00ff003f, 0xc00ff003, 0xfc00ff00, + 0x3fc007f1, 0x437c40ff, 0x003fc40f, 0xf003d000, 0x20000000, 0x00000000, + 0x0811a802, 0x8f003a40, 0x0ff003fd, 0x20fb003e, 0x400cfc23, 0xa2009f60, + 0x30cb0cf5, 0x03aa00eb, 0x003bc20d, 0x9003ec00, 0xfb103e40, 0x0fb083ec, + 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec80f10, 0x032c40fb, 0x003cc088, + 0xb0030202, 0x20000000, 0x00000000, 0xe0089800, 0x8d8021c0, 0x0b7002dd, + 0x09b5002f, 0xc008f12b, 0x7400af68, 0x69c00872, 0x22fc0087, 0x002fd008, + 0x5012dc00, 0xb7203d40, 0x0b7642dc, 0x00e7002d, 0xc00b7002, 0xdc80b720, + 0x2dd20b70, 0x021c80b7, 0x002dc008, 0x500ab100, 0x20000000, 0x00000000, + 0x0000b700, 0x94922960, 0x037b02de, 0x00b7806d, 0xe0097802, 0x16008780, + 0x25c40b78, 0x02df00b7, 0x8029e808, 0x5812de01, 0xb7802d62, 0x0b7a02de, + 0x00b7802d, 0xe00b7802, 0xde40b790, 0x2da80be8, 0x021e00b7, 0xc02de20a, + 0x18220000, 0x20000000, 0x00000000, 0x4804cc00, 0x832020e8, 0x4b3002cc, + 0x00b1402c, 0xfc093012, 0x4d40a300, 0x28c08830, 0x12cc2093, 0x000cc008, + 0x3ca2cf60, 0xb30028c0, 0x0b3002cc, 0x00a3002c, 0xc00b3002, 0xcc00b300, + 0x2ce10b38, 0x020c00b3, 0x402ce01a, 0x39029304, 0x30000000, 0x00000000, + 0xc805b900, 0xce203b80, 0x0fa002e8, 0x00f6503f, 0xb03da007, 0xba008a00, + 0x76800fa0, 0x27fb00ea, 0x003a8048, 0xec83f800, 0xfa006fb0, 0x0fa003e8, + 0x00fa003e, 0x800fa003, 0xe800fa00, 0x3ea81f68, 0x032804fe, 0x403d80ae, + 0x64033300, 0x60000000, 0x00000000, 0x4810a000, 0xf8413c14, 0x0f0013e1, + 0x00f8003e, 0x000e8043, 0xe020e800, 0x78000f80, 0x07e000e8, 0x003e002e, + 0x8003e100, 0xf8007e02, 0x1f8003e0, 0x00f8003e, 0x000f8003, 0xe000f800, + 0x3e001f81, 0x8be000f8, 0x0a3e0009, 0x8083d200, 0x20000000, 0x00000000, + 0x0810a420, 0xd1203660, 0x1c900364, 0x00f90036, 0x400d9003, 0xe400f900, + 0x36400c91, 0x03e404f9, 0x043e400c, 0x9202e680, 0xc9103e41, 0x0f9043e4, + 0x00e9003e, 0x400f9003, 0xe400f100, 0x32680f90, 0x032408f9, 0x803e400c, + 0x90030300, 0x20000000, 0x00000000, 0x80046402, 0xcd402248, 0x289602a6, + 0x00b90036, 0x40089002, 0xe401e900, 0x2a402898, 0x02e400b9, 0x002e400f, + 0x9c42c500, 0x89002e40, 0x0b9002e4, 0x00b9002e, 0x400b9003, 0xa400b902, + 0x22e00b90, 0x022400b9, 0x002e4408, 0x92036000, 0x10000000, 0x00000000, + 0x18050400, 0x89402644, 0x089002a5, 0x40b90020, 0x40089002, 0xec04b102, + 0x62600a90, 0x82a401a9, 0x202c4000, 0x90862400, 0x89012ec0, 0x0b9002e4, + 0x00b9002e, 0x400b9002, 0xe400b900, 0x22500b90, 0x0a2400b9, 0x202e4009, + 0x98024600, 0x40000000, 0x00000000, 0x08140452, 0x8110204a, 0x08102284, + 0x00b10024, 0x50591402, 0xc501b140, 0x28c10a10, 0x06c505b3, 0x000c500b, + 0x1002ec00, 0x81002c50, 0x5b1002c4, 0x01b1012c, 0x404b1006, 0x8400b110, + 0x20400b91, 0x020441b3, 0x042c4129, 0x91024200, 0x00000000, 0x00000000, + 0x18002100, 0xc8683608, 0x088003a0, 0x10f80032, 0x002d8003, 0xe000b800, + 0x36000e80, 0x03e000f8, 0x003e000c, 0x8023e000, 0xc8002e00, 0x0f8003e0, + 0x00e8003e, 0x000f8003, 0xe0a0f868, 0x22000f84, 0x0321a8f8, 0x003e000d, + 0x86834600, 0x10000000, 0x00000000, 0x9811d480, 0xfd203f4a, 0x0f9403e5, + 0x00fd003f, 0x400e9402, 0x7400e942, 0x3a510c94, 0x03f400f9, 0x003e501e, + 0xf003f402, 0xf9403f41, 0x0f9403e4, 0x00f9003e, 0x400f9003, 0xe400f920, + 0xbe418ff2, 0x03e4807f, 0x043f400e, 0xd203e600, 0x70000000, 0x00000000, + 0x1815a400, 0x4d003b40, 0x06d00b74, 0x10cd003e, 0x400f9283, 0x2440f900, + 0x79400cd0, 0x432401ed, 0x003e4c1c, 0xd043f400, 0xfd003e40, 0x8c928324, + 0x00f9003e, 0x400f9003, 0xe480f900, 0x3e400f90, 0x03e400f5, 0x0033400b, + 0xd28b0602, 0x70000000, 0x00000000, 0x1810e010, 0x88002200, 0x08840220, + 0x04d8006e, 0x0a4b8203, 0x40803048, 0x32000e81, 0x0200a4b8, 0x002e0c0e, + 0x8002e000, 0xb8103a0a, 0x0d800220, 0x00b8002e, 0x000e8002, 0xe000b802, + 0x2e000b80, 0x12e000e8, 0x00a2800b, 0x82034600, 0x30000000, 0x00000000, + 0x4804a402, 0x81002840, 0x08110604, 0x4081012c, 0x490b1282, 0x04809134, + 0x28444b10, 0x068484a1, 0x002c484a, 0x1002c400, 0xb1002c48, 0x08100a04, + 0x00b1002c, 0x400b1002, 0xc440b100, 0x2c400b10, 0x02c400b9, 0x0020401b, + 0x12821a00, 0x20000000, 0x00000000, 0x9814a480, 0x89202a50, 0x08900224, + 0x0099002e, 0x510b9002, 0x6501b900, 0x22404a90, 0x0a2400b9, 0x042e400a, + 0x9802e700, 0xb9002848, 0x09900224, 0x00b9002e, 0x400a9002, 0xe400b900, + 0x2e580b91, 0x02e400a9, 0x8022401b, 0x98026e00, 0x20000000, 0x00000000, + 0xa000a580, 0xcd883a74, 0x2c900324, 0x00c9482e, 0x540f9003, 0x2740b901, + 0x2a400e90, 0x03a480e9, 0x003e400e, 0x9c03e400, 0xf9003e48, 0x0c900324, + 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e500f94, 0x03e400f9, 0x4032640f, + 0x96032800, 0x20000000, 0x00000000, 0xe800a400, 0xf9883440, 0x0f10a3a4, + 0x00f9003e, 0x610f9003, 0xe600f900, 0x3a400e10, 0x03e400f9, 0x043e401f, + 0x9002e400, 0xf9043a40, 0x1f1003e4, 0x00f9003e, 0x400e9003, 0xe400f900, + 0x3e400f90, 0x03e400e9, 0x003e610f, 0x1083f200, 0x20000000, 0x00000000, + 0x2800a100, 0xc0023e10, 0x0f8047c0, 0x20c8001e, 0x001f0003, 0x6000c800, + 0x38030c88, 0x13e103d8, 0x043c000d, 0x84a3e100, 0xf8103210, 0x0c8003e0, + 0x00f8007e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000c8, 0x0032100f, + 0x840b0200, 0x20000000, 0x00000000, 0x08040802, 0x8e000f80, 0x1be003ba, + 0x088a806e, 0x800ba002, 0xa804da00, 0x238000e8, 0x03a800ce, 0xc62e8002, + 0xec03bb10, 0xba002a80, 0x88a002e8, 0x00ba002e, 0x800ba002, 0xe800ea00, + 0x3ab20ba0, 0x03a80086, 0x4922a043, 0xe88bc204, 0x00000000, 0x00000000, + 0x08040c00, 0x83900cc0, 0x0b11028c, 0x08a1002c, 0xc00b3002, 0x4c008b00, + 0x28f08838, 0x00cc00a3, 0xc92cc109, 0x3d028d64, 0xb38000c1, 0x283002cc, + 0x00b3006c, 0xc01b3002, 0xcc00b300, 0x2cc80b30, 0x028c0083, 0xc820e50b, + 0x300a0200, 0x10000000, 0x00000000, 0x00101c40, 0x85002d40, 0x0b40428d, + 0x08850d2d, 0xc80b3202, 0x9ec09700, 0x21100870, 0x929e80b5, 0x402dc80a, + 0x70229400, 0xb3802bc4, 0x087002dc, 0x00b7002d, 0xc00b7002, 0xdc00a720, + 0x29800b72, 0x029e8087, 0x0021c00b, 0x3002c000, 0x00000000, 0x00000000, + 0x00083ea0, 0xc7813de1, 0x0b481396, 0x02e5842d, 0xfc4b7a83, 0x5ea0c7c0, + 0x29202c78, 0x03de40e5, 0x803fea15, 0x78019600, 0xf78031e2, 0x087802de, + 0x00f7802d, 0xe00f7803, 0xde00f7c0, 0x2de00f78, 0x13be02c7, 0x80b1e04f, + 0x580b0000, 0x00000000, 0x00000000, 0x2815ac88, 0xff903e80, 0x8f8003a8, + 0x00d9003f, 0xc80ff103, 0x6d84bb0e, 0x7e004fb0, 0x03fc40c8, 0x003fc50c, + 0xb003a404, 0xf9003cd8, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0x6c00eb00, + 0x3a9a0fb1, 0x03ac40fb, 0x043ec00f, 0x9003ca04, 0x60000000, 0x00000000, + 0x4005be02, 0xce903be0, 0x0ff9021e, 0xc8ef823f, 0xe00df803, 0x7e12ef80, + 0x13600df9, 0x133e017d, 0x923fe00e, 0xf243f600, 0xff803be4, 0x0ff803fe, + 0x00ff803f, 0xe00ff803, 0xfe00ff80, 0x3fe00cf8, 0x037e00ff, 0x803fe00f, + 0xf8031002, 0x60000000, 0x00000000, 0xa800bc10, 0x86003546, 0x48710a1c, + 0xc887102f, 0xc40d7013, 0x7c008724, 0x3508a864, 0x029c48e5, 0x002dc80c, + 0x6082d400, 0xb72431ce, 0x0f7003dc, 0x00b7002d, 0xc00f7002, 0xdc00b700, + 0x3dc00af0, 0x021c00b7, 0x002dc00b, 0x70822b00, 0x20000000, 0x00000000, + 0xa0009c00, 0x970061c0, 0x0a71021c, 0xc0a7002d, 0xc0087002, 0x1c008305, + 0x21000810, 0x425c00b5, 0x012cc08b, 0x51025000, 0xb7012dc0, 0x1b7002dc, + 0x00b7002d, 0xc00b7002, 0xdc00b700, 0x2f000871, 0x021c00b7, 0x002dc20b, + 0x70022800, 0x20000000, 0x00000000, 0x40048f63, 0x93d02680, 0x40300200, + 0x0803e06c, 0xf0093002, 0x4f608300, 0x24010800, 0x064c20a0, 0x002cc00a, + 0x0c02c2c0, 0xb10062e8, 0x0b30428c, 0x00b3002c, 0xc10b3002, 0xcc00b302, + 0x2c120a38, 0x020c00b3, 0xb22cc00b, 0xbc021100, 0x30000000, 0x00000000, + 0x0804be00, 0xd80032a0, 0x0eb00724, 0x00eb882f, 0xf68cf003, 0x3e01af00, + 0x22400c30, 0x2a7d00f9, 0x002fc04e, 0xb8026500, 0xfb002ff0, 0x0fb002ec, + 0x00fb003e, 0xc01fb003, 0xec00ff00, 0x3e500cfc, 0x033c00fb, 0x003c64cf, + 0x9c0b0300, 0x20000000, 0x00000000, 0x8000ac00, 0xeb003e40, 0x0e8403e4, + 0x00fb023f, 0xc00ff013, 0xec00fb00, 0x3e100f90, 0x03bc00e9, 0x423fc00c, + 0x9203e009, 0xfb0036c0, 0x0eb0036c, 0x00fb003e, 0xc00eb003, 0xec00fb00, + 0x3a000fb1, 0x03ac08fb, 0x422e400f, 0xb403e000, 0x20000000, 0x00000000, + 0x0100bc00, 0xca083300, 0x0d640314, 0x09cf023b, 0xc00cf001, 0x3c00f700, + 0x30010ce0, 0x03bc00dd, 0x003dc00d, 0xe813f400, 0xe30073c0, 0x0870037c, + 0x00ff003f, 0xc00ff003, 0xfc00ff00, 0x3fd00ff0, 0x83dc10cf, 0x103fe90c, + 0x988b0140, 0x20000000, 0x00000000, 0x81102c04, 0x83b12212, 0x0a8003e3, + 0x00a3823e, 0xc18ab002, 0x2c10bb00, 0x3a008d84, 0x02ac0088, 0x802ec00c, + 0x8d02e224, 0xb91022c0, 0x08b0022c, 0x00bb002e, 0xc00bb002, 0x6c00bb00, + 0x2e800bb0, 0x02ec0089, 0xce2ee18d, 0x82022044, 0x00000000, 0x00000000, + 0x80040c00, 0x9a002688, 0x08a40262, 0x20b91024, 0xc0593002, 0xac08bb00, + 0x221429b8, 0x020c0098, 0xc02ec009, 0xb0b2e600, 0xa9042ac0, 0x0bb0026c, + 0x00bb002e, 0xc00bb002, 0xec00bb00, 0x2e400bb0, 0x16ec009b, 0x002ec049, + 0xb1022000, 0x00000000, 0x00000000, 0x08140c00, 0x92002440, 0x0b0012c0, + 0x00b90024, 0xc01b300a, 0x8c00b300, 0x2c000900, 0x028c0090, 0x022cc008, + 0x0042c000, 0x910020c0, 0x0b30060c, 0x01b3002c, 0xc00b3002, 0x4c00b300, + 0x2c400b30, 0x02cc0292, 0x042cc009, 0x300a0200, 0x00000000, 0x00000000, + 0x00007c00, 0xda003400, 0x0ca00260, 0x00b90073, 0xc00d7011, 0xbc10bf00, + 0x32000d80, 0x633c00d8, 0x003fc00d, 0x8003e010, 0xe9013bc0, 0x2fb0036c, + 0x00fb003e, 0xc00fb003, 0xec00bb00, 0x3e000fb0, 0x03ec00db, 0x003ec04d, + 0xb00b0000, 0x10000000, 0x00000000, 0x8011bc02, 0xef003b00, 0x0e4053b0, + 0x04ed003f, 0xc00ef003, 0x7c01bf02, 0x3b000ec0, 0x03fc00ec, 0x007fc08f, + 0xc007f008, 0x7d007bc0, 0x0cf003fc, 0x00ff003f, 0xc00ff003, 0x7c04ff00, + 0x3d000ff0, 0x03fc10ef, 0x003fc08f, 0xf003e004, 0x70000000, 0x00000000, + 0xc08cfe00, 0xcdc433c0, 0x1ff083fc, 0x00af803f, 0xe00f7207, 0x9e00cf80, + 0x3be00ef2, 0x03fc80ec, 0x801fe00e, 0xf803fe00, 0xff803fe0, 0x0ff803fe, + 0x00ff803f, 0xe00ff803, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x9037e00f, + 0xf803f000, 0x70000000, 0x00000000, 0x8000e600, 0x880136d0, 0x0bfc42ff, + 0x48b3282e, 0xe00bfc13, 0xae00fb80, 0x22c20bf5, 0x82fe44b8, 0x8232c00a, + 0xb802ee00, 0xbb8026e0, 0x0bb202ee, 0x00bb802e, 0xe00bb802, 0xee00bb80, + 0x2ee00bb8, 0x02ee00bb, 0x0022e00b, 0xb802e004, 0x30000000, 0x00000000, + 0x0804880a, 0x88202090, 0x5b3012cc, 0x00a3212c, 0xc08b3402, 0x8c018300, + 0x20c84b32, 0x428c00b0, 0x042cc008, 0x3002cc00, 0xb3002cc0, 0x0b3082cc, + 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00a30, 0x02cc00b3, 0x006cc00b, + 0x3002c201, 0x70000000, 0x00000000, 0xc014a400, 0x8a002685, 0x0bb002ec, + 0x00bb022e, 0xc00bb002, 0xac10bb00, 0xa2c00bb0, 0x06ec00b8, 0x8628c00a, + 0xb002ec00, 0xbb002ec0, 0x0bb042ec, 0x00bb002e, 0xc00bb002, 0xec00bb00, + 0x2ec08bb0, 0x02ec00bb, 0x002ac00b, 0xb002f004, 0x60000000, 0x00000000, + 0x0184e380, 0xc08032d0, 0x0bb043ec, 0x00eb003e, 0xc00fb003, 0xac10cb00, + 0x32c00eb0, 0x07ec08e8, 0xc03ec10c, 0xb003ec00, 0xbb002ec0, 0x0fb003ec, + 0x00fb002e, 0xc00fb002, 0xec00bb00, 0x3ec00fb0, 0x03ec00f3, 0x003ec00f, + 0xb003d004, 0x70000000, 0x00000000, 0x8100b100, 0xfc403fc0, 0x0ff023fc, + 0x20ff002f, 0xc00ff003, 0xfc04df00, 0x37c00ff0, 0x53ec01fd, 0x0137c00f, + 0xf0017c00, 0x7f0037c0, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00ff, 0x0817c00f, 0xf003f800, 0x60000000, 0x00000000, + 0xe000ab00, 0xc9807e82, 0x0eb043bc, 0x00db0036, 0xc00eb083, 0xac08eb00, + 0x3ec00ff0, 0x032c10f9, 0x403ec00c, 0xb003ec00, 0xfb003ec0, 0x0fb003ac, + 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x13ec04fb, 0x003ec00f, + 0xb003f004, 0x20000000, 0x00000000, 0xe8050200, 0x88502ea8, 0x0bf5063d, + 0x008b0022, 0xe00bf003, 0x4c208300, 0x3ac00bf0, 0x023c1089, 0x002ec00d, + 0xb002ec00, 0xbb002ec0, 0x0bb0022c, 0x10bb002e, 0xc00bb002, 0xec00bb00, + 0x2ec00bb0, 0x02ec00bb, 0xc822c10b, 0xb002f200, 0x40000000, 0x00000000, + 0xc4044c00, 0x90012c80, 0x0a3002cd, 0x4093002c, 0xc8083102, 0xcd80b330, + 0x64c00b30, 0x020c0080, 0x022ce208, 0x3002cc00, 0xb30028c0, 0x0b3a028c, + 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x8028c043, + 0x3042f800, 0x50000000, 0x00000000, 0x40001e02, 0x95802da0, 0x0b78025e, + 0x81878061, 0xe20b7802, 0x5e409780, 0x69e01b78, 0x169e0285, 0x902de209, + 0x7802de00, 0xb7802de0, 0x0b78821e, 0x01b7802d, 0xe00b7802, 0xde00b780, + 0x2de00b78, 0x02de00b7, 0x8021e00b, 0x7802d800, 0x40000000, 0x00000000, + 0x4c000840, 0xd0002cd0, 0x4e30c2cc, 0x01d31134, 0xc44e3013, 0xcc00b301, + 0x3cc08fb0, 0x0b0c00e1, 0x003ec41c, 0x3003cc00, 0xf3003cc0, 0x0fb1038c, + 0x00f3003c, 0xc00f3003, 0xcc00f300, 0x3cc40f30, 0x27cc00fb, 0x0038c00f, + 0x3003d202, 0x00000000, 0x00000000, 0x40149c04, 0xec103fc4, 0x0f74839d, + 0x80ff002f, 0xc00ff183, 0xfc00ef10, 0x3bc44bf1, 0x013c20ad, 0x003fc10f, + 0xf103fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00ff, 0x003bc00f, 0xf003d006, 0x60000000, 0x00000000, + 0x0814a400, 0xf8003fa0, 0x0eb003ff, 0x44db023e, 0xc00fb003, 0x6c00c300, + 0x36e00df4, 0x036c80f8, 0x8036c00e, 0xb003ec00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x8036c00f, + 0xb003ea00, 0x70000000, 0x00000000, 0xc0009400, 0xb4002f20, 0x087220cc, + 0x00c7002d, 0xc00b3302, 0x1c008700, 0x2bc00836, 0x8a1cc0b5, 0x00b1c00b, + 0x70039c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b7002, 0xdc00b700, + 0x2dc00970, 0x02dc00b7, 0x0021c00b, 0x7002f204, 0x60000000, 0x00000000, + 0x00009a00, 0xb484296c, 0x0a7802de, 0x8097802d, 0xe00a7802, 0xde008780, + 0x21e00978, 0x061e80bd, 0x8021e00b, 0x7802de00, 0xb7802de0, 0x0b7802de, + 0x00b7802d, 0xe00b7802, 0xde00b780, 0x2de00a78, 0x02de00b7, 0x8025e00b, + 0x7802f000, 0x20000000, 0x00000000, 0x4814cf00, 0xb3086ce0, 0x083022cc, + 0x0183002c, 0xc00b3002, 0x8c068300, 0x28c04930, 0x020c01b3, 0x4120c00b, + 0x30028c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x02cc00b3, 0x0020c00b, 0x3002d204, 0x30000000, 0x00000000, + 0xc805b900, 0xfe013fa8, 0x8aa003e8, 0x04da023e, 0x800ea003, 0xe811c200, + 0x36800da0, 0x036800fe, 0x8a32801e, 0xa003e800, 0xfa002e80, 0x0fa003e8, + 0x00fa003e, 0x800ba002, 0xe800ba00, 0x3e800ea0, 0x03e800fa, 0x0036800f, + 0xa003fa04, 0x60000000, 0x00000000, 0x4810a040, 0xf8013e10, 0x0f0003e0, + 0x00f8003e, 0x100f8001, 0x2001f840, 0x3e001e80, 0x038000f8, 0x083a101f, + 0x8003a000, 0xf8003e00, 0x0f8403e0, 0x00f8003e, 0x000f8003, 0xe000f800, + 0x3e000d80, 0x03e000f8, 0x003e000f, 0x8003d200, 0x30000000, 0x00000000, + 0x0810a420, 0xf9213e60, 0x0f990b27, 0x00f9002e, 0x400f1003, 0xe500d902, + 0x36404f90, 0x032400c9, 0x003e680f, 0x9023e400, 0xf9003e40, 0x0f9403e4, + 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f, + 0x9003c204, 0x30000000, 0x00000000, 0x80046500, 0xb9862f56, 0x0b9402a6, + 0x00b9002e, 0x560b9417, 0x440089c8, 0x2a400b90, 0x02a40089, 0x003a480b, + 0x9002e400, 0xb9002e40, 0x0b9202e4, 0x00b9002e, 0x400b9012, 0xe400b900, + 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002e000, 0x10000000, 0x00000000, + 0x18042600, 0xbb042e40, 0x0a940224, 0x00a9002e, 0x400b9022, 0xa4208920, + 0x22400b10, 0x0624028b, 0x002e400b, 0x9002e400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400b9, 0x002e400b, + 0x9002c600, 0x40000000, 0x00000000, 0x08040600, 0xb1902c50, 0x0b10028c, + 0x01b1406c, 0x400b3052, 0x04009100, 0x28504b14, 0x12840081, 0x002c500b, + 0x1002c400, 0xb1002c40, 0x0b1102c4, 0x00b1002c, 0x400b1002, 0xc400b100, + 0x2c400b10, 0x02c400b1, 0x102c400b, 0x1002c201, 0x00000000, 0x00000000, + 0x1800a000, 0xf8402e0a, 0x0e800320, 0x00e8003e, 0x000f8002, 0xa002d800, + 0x32000f80, 0x032000c8, 0x003e000f, 0x8023e000, 0xf8047e00, 0x0f8403e0, + 0x04f8013e, 0x004f8013, 0xe001f800, 0x3e000f80, 0x03e000f8, 0x403e000f, + 0x8003ce03, 0x50000000, 0x00000000, 0x981df408, 0xfd203f40, 0x0f9423e5, + 0x10f9003e, 0x418f9403, 0xc400e900, 0x3a400f94, 0x03e500f5, 0x003a400f, + 0x9003e400, 0xf9003e40, 0x0f9203e4, 0x00f9003e, 0x400f9002, 0xe400f900, + 0x3e400f90, 0x03e400f1, 0x203e400f, 0x9003e606, 0x70000000, 0x00000000, + 0x1809b400, 0xff003344, 0x1ed00334, 0x01f91033, 0x400f5283, 0x3400fd00, + 0x32400f91, 0x032480b9, 0x003f448f, 0x9007e400, 0xf9003e40, 0x0fd003a4, + 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400fd, 0x1036400f, + 0x9003c600, 0x70000000, 0x00000000, 0x1800e800, 0xb8002008, 0x0e840320, + 0x04b00236, 0x010b800a, 0x2000b800, 0x28024b81, 0x02a000ba, 0x022e080b, + 0x8002e000, 0xb8002e00, 0x0b820220, 0x00b8002e, 0x000b8002, 0xe000b800, + 0x2e000b80, 0x02e000b8, 0x0022000b, 0x8002ce04, 0x30000000, 0x00000000, + 0x68048400, 0xb900a448, 0x0a110a04, 0x40b100a8, 0x404b1042, 0x0404b100, + 0x20400b10, 0x020440b1, 0x002c480b, 0x1002c400, 0xb1002c40, 0x0b128a04, + 0x00b1002c, 0x400b1002, 0xc400b100, 0x2c400b10, 0x02c400b1, 0x0024400b, + 0x1002c201, 0x70000000, 0x00000000, 0xb814a440, 0xb9006250, 0x0a900224, + 0x01b9002a, 0xc04b9002, 0x2401b900, 0x2a400b90, 0x02a400b9, 0x002e400b, + 0x9002e400, 0xb9002e40, 0x1b900224, 0x00b9002e, 0x400b9002, 0xe400b900, + 0x2e400b90, 0x02e400bb, 0x0022400b, 0x9002c604, 0x60000000, 0x00000000, + 0xa000a600, 0xbd603640, 0x4e100724, 0x00b9022a, 0x400b9027, 0x2400f100, + 0x32400f90, 0x022400f9, 0x403e411f, 0x9002e400, 0xf9003e40, 0x0b900324, + 0x00f9003e, 0x400f9003, 0xe400b900, 0x3e400f90, 0x03e400f9, 0x0036400f, + 0x9003e804, 0x70000000, 0x00000000, 0xc800a400, 0xf9903e70, 0x0f9003a4, + 0x00f90036, 0x400f9003, 0xe401f900, 0x3e400f10, 0x23e400f9, 0xc03e400f, + 0x9003e400, 0xf9003e40, 0x0f900364, 0x00f9003e, 0x400f9003, 0xe400f900, + 0x3e400f90, 0x03e400f9, 0x003e4007, 0x9003ea00, 0x60000000, 0x00000000, + 0x0800a160, 0xe8103a10, 0x0d80d3e0, 0x10f80632, 0x000e800f, 0x2080d810, + 0x32000e80, 0x032000f8, 0x003e000f, 0x8043e010, 0xf8003e00, 0x0f8303e0, + 0x00f8003e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x0032000f, + 0x8003ca04, 0x20000000, 0x00000000, 0x08043b00, 0xb6902f84, 0x08e403b9, + 0x40ba0137, 0xb0086882, 0x38008e80, 0x2a8008a0, 0x022800ba, 0x003b800b, + 0xa003a800, 0xba002e80, 0x0bec02e8, 0x00ba002e, 0x800ba002, 0xe800ba00, + 0x2e800ba0, 0x02e800be, 0x0022800b, 0xa002ca00, 0x40000000, 0x00000000, + 0x08040f00, 0xb34028c0, 0x9935028d, 0x40bb0020, 0xf80a3802, 0x0d0093e0, + 0x20c01a30, 0x020c00b3, 0x002cc00b, 0x30028c00, 0xb3002cc0, 0x0bb000cc, + 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x028c00ba, 0x8820c009, + 0x3002ca00, 0x50000000, 0x00000000, 0x00001400, 0xb5002de0, 0x08700294, + 0x00b72025, 0x70087002, 0x1e009700, 0x29e40871, 0x021c00b7, 0x0029800b, + 0x70029c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b7002, 0xdc00b700, + 0x2dc00b70, 0x02dc00b4, 0x4021c00b, 0x7002e800, 0x40000000, 0x00000000, + 0x00001200, 0xf68439e0, 0x0d780396, 0x00f7b031, 0x600e7812, 0x1e00d780, + 0x21e00ef8, 0x8b1e08f7, 0x803de00f, 0x78039e00, 0xf7803de0, 0x0f7803de, + 0x00f7803d, 0xe00f7803, 0xde00f780, 0x3de00f78, 0x039e00fe, 0x80b1e10f, + 0x7803ea02, 0x00000000, 0x00000000, 0x2814a000, 0xfe903ec0, 0x0f9003a0, + 0x08ff003c, 0x408ba003, 0xcc006300, 0x3eda0fb6, 0x03ec10fb, 0x003ec00f, + 0xb047ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00fb00, + 0x3ec00fb0, 0x03ec00f8, 0x003ec00f, 0xb003c206, 0x60000000, 0x00000000, + 0x4014b200, 0xfc2037a0, 0x08f90376, 0x44bf8813, 0x600ff807, 0xbe00f780, + 0x33e00cf8, 0x033e00cf, 0x803fe00f, 0xf203fe00, 0xff803fe0, 0x0ff8033e, + 0x00ff803f, 0xe00ff803, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x8033e00f, + 0xf803c000, 0x70000000, 0x00000000, 0xa8089004, 0xbf0021c0, 0x0d600014, + 0x403f2029, 0x400b5202, 0x1c80b700, 0x2bc40e70, 0x035c00a7, 0x003d800b, + 0x7106dc00, 0xe7002dc0, 0x0be0021c, 0x00b7002d, 0xc00b7002, 0xdc00b700, + 0x2dc00b70, 0x02dc00b4, 0x0035c40b, 0x7002ea04, 0x60000000, 0x00000000, + 0xa0009000, 0xb60021c6, 0x08700214, 0x01b70025, 0x000b3006, 0x9c08b700, + 0x21c00930, 0x020c0087, 0x002dc00b, 0x7002dc00, 0xb7002dc0, 0x0b50021c, + 0x00b7002d, 0xc00b7002, 0xdc00b700, 0x2dc00b70, 0x02dc00b7, 0x0021c00b, + 0x7002c000, 0x20000000, 0x00000000, 0x40048020, 0xb21320c0, 0x09000200, + 0x00b3002c, 0x001b0002, 0x0c01b300, 0x68c04a30, 0x064c00a3, 0xa02cc003, + 0x3002cc00, 0xa3002cc0, 0x0b000a0c, 0x00b3002c, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x02cc00b0, 0x0024c00b, 0x3002c804, 0x30000000, 0x00000000, + 0x0804a680, 0xfb401460, 0x08b00324, 0x00ff0036, 0x400b3003, 0x8c00fb00, + 0x33c00df0, 0x032c00cb, 0x082e408b, 0xb002ec00, 0xbb003ec0, 0x0fb0022c, + 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fa, 0x0032c00f, + 0xb003ea04, 0x60000000, 0x00000000, 0x8010a400, 0xfb603ec0, 0x0fb403a4, + 0x00ff003a, 0x000fb003, 0xe500fb40, 0x3ec00eb0, 0x03ec00fb, 0x003ad00f, + 0xb003ec00, 0xfb003ec0, 0x0f9003ec, 0x00fb003e, 0xc00fb003, 0xec00fb00, + 0x3ec00fb0, 0x03ec00fa, 0x003ec08f, 0xb003e000, 0x30000000, 0x00000000, + 0x0110b000, 0xff0036d0, 0x4d280314, 0x10cf003f, 0x400ff003, 0x7800ce00, + 0x33c00c70, 0x033c08ff, 0x003be80f, 0xf003fc00, 0xff003fc0, 0x0fe9033c, + 0x00ff007f, 0xc00ff003, 0xfc00ff00, 0x3fc00ff0, 0x03fc00fe, 0x003fc00f, + 0xf003c044, 0x30000000, 0x00000000, 0x81042200, 0xb38022e0, 0x09880223, + 0x00ab002e, 0x300ca042, 0x2f00a3c0, 0x2ac008b0, 0x02ac00bb, 0x002ef00e, + 0xb002ec00, 0xbb002ec0, 0x0b0802ac, 0x00bb002e, 0xc00bb002, 0xec00bb00, + 0x2ec00bb0, 0x03ac00ba, 0xc02ec00b, 0xb002e040, 0x10000000, 0x00000000, + 0x80042200, 0xba282200, 0x08918662, 0x308b006e, 0x600bb002, 0x6e208b88, + 0x20c00ab0, 0x022c00bb, 0x002a420b, 0xb002ec00, 0xbb002ec0, 0x0bb4022c, + 0x00bb002e, 0xc00bb002, 0xec00bb00, 0x2ec00bb0, 0x02ec00b8, 0x802ec00b, + 0xb042e000, 0x40000000, 0x00000000, 0x08000000, 0xb30122c0, 0x09000240, + 0x0083002c, 0x000b1002, 0x0400a300, 0x28c00830, 0x128c00b3, 0x042cc00a, + 0x3002cc01, 0xb3002cc0, 0x0b00028c, 0x00b3002c, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x028c00b0, 0x002cc00b, 0x3002c201, 0x00000000, 0x00000000, + 0x00006000, 0xba00b2c0, 0x2c800360, 0x02cf003e, 0x000fb003, 0x6c008900, + 0x33c00ef0, 0x032c00fb, 0x003ac00f, 0xb003ec00, 0xfb003ec0, 0x0f80032c, + 0x00fb002e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00f8, 0x003ec00f, + 0xb003c003, 0x50000000, 0x00000000, 0x801df000, 0xff013bc0, 0x1cc00bb0, + 0x00ff003f, 0x000cc003, 0xfc00ff00, 0x3fc00ff0, 0x13fc00ff, 0x007fc01f, + 0xf007fc00, 0xff003fc0, 0x0fc007fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00f4, 0x003fc00f, 0xf003e806, 0x70000000, 0x00000000, + 0xc084fe00, 0xfc80b360, 0x0f78037c, 0x40dc8031, 0xe00ed803, 0xfe05d492, + 0x37c80ff0, 0x0b5081f4, 0x803fc80f, 0x4903fc80, 0xc4803720, 0x0cf2033e, + 0x00ff813f, 0xe00cf803, 0xfc00cf94, 0x33600dc8, 0x03fcc0cf, 0x8033c00f, + 0x78033004, 0x70000000, 0x00000000, 0x8000ee10, 0xb80822e0, 0x0bb8022c, + 0x808a2802, 0xe0009203, 0xee00b822, 0x2fcec2fc, 0x0aa700a8, 0x242ff008, + 0x8042ff40, 0xa8802a20, 0x0abd02ae, 0x08bb802e, 0x4208b803, 0xb6008b20, + 0x22e00898, 0x02ec0089, 0x8122f10b, 0xb8022006, 0x30000000, 0x00000000, + 0x08048c08, 0xb8202040, 0x0b300a4c, 0x00820020, 0xc04a1082, 0xcc00b000, + 0x28c04934, 0x008840a0, 0x080cc44a, 0x0202cc00, 0x80002000, 0x0830020c, + 0x00b3002c, 0x88083006, 0xec418300, 0x22004900, 0x028c408b, 0x0028d00b, + 0x20020201, 0x70000000, 0x00000000, 0xc014ac00, 0xb88022c0, 0x0bb0020c, + 0x228100a2, 0xc00ab002, 0xec00b8c0, 0x2ec049b0, 0x22a60008, 0x012ec009, + 0x8844ec04, 0xa9042a82, 0x8ab2c2ac, 0x00bb002c, 0x0008b002, 0xac00ab00, + 0xa28808ac, 0x00ec008b, 0x002ac00b, 0xa8023000, 0x60000000, 0x00000000, + 0x0184ac00, 0xf08022c0, 0x0fb0036e, 0x00d84832, 0xc00e9906, 0xec009880, + 0x7ec00d30, 0x038600f8, 0x882ec00f, 0x8883cc04, 0xc8d01000, 0x9cb4032c, + 0x00fb013e, 0x910cb003, 0xce02cb00, 0x30780d84, 0x03ac02c3, 0x203ac00f, + 0x1c030004, 0x70000000, 0x00000000, 0x8100bc10, 0xfc003f40, 0x0ff003fe, + 0x40fe003f, 0xc005f033, 0xbc00fd05, 0x2ec00ef0, 0x0af402ff, 0x1035c00a, + 0xc043fc06, 0xed023fea, 0x8f7803fc, 0x10ff003f, 0xe42ff003, 0xa640df00, + 0x3fc007d0, 0x03fc00fd, 0x1037c00f, 0xf003f800, 0x60000000, 0x00000000, + 0xc000ac00, 0xf8003ac0, 0x0fb0036c, 0x00eb003a, 0xc30e9003, 0xec00f942, + 0x39c02df0, 0x22ec08f9, 0x0433c08c, 0x8403bc30, 0xe8403250, 0x0ef443ec, + 0x00fb003e, 0x800fb007, 0x2c00db00, 0x3e480d85, 0x43ec00fb, 0x003ac60e, + 0xb8033004, 0x20000000, 0x00000000, 0xe8042c08, 0x38882e40, 0x0b30022c, + 0x00890020, 0xd808b002, 0xec808900, 0x23c009f8, 0x022490db, 0x0537d40d, + 0x80437e08, 0x818836c0, 0x08a002ec, 0x00bb002e, 0x800bbd82, 0x2c000b00, + 0x2ed00dad, 0x42fc00bb, 0x1837c008, 0xb0037200, 0x40000000, 0x00000000, + 0xe0040c00, 0xb0a02840, 0x0b30024c, 0x00a00028, 0xc00a1002, 0x4f208004, + 0x28c01830, 0x12021292, 0x0128c10b, 0x00020e40, 0x80006800, 0x0a3002cc, + 0x00b3002c, 0x400b3402, 0x44009b00, 0x2c10082c, 0x02ec00b3, 0x0020f08a, + 0x30023800, 0x50000000, 0x00000000, 0x60001e04, 0xb5806de0, 0x0b78020e, + 0x01878021, 0xe0085902, 0xde008d80, 0x69e01839, 0x82160e9f, 0x0025e20b, + 0xc900de00, 0x8c812d64, 0x187802de, 0x08b7802d, 0x600b7002, 0x56009780, + 0x2f210978, 0x02de00b7, 0x8025e108, 0xf8025800, 0x40000000, 0x00000000, + 0x68000c40, 0xf0003840, 0x0f300348, 0x08ea0038, 0xc00a3002, 0x4c008100, + 0x28c10d30, 0x264800f3, 0x3038cc06, 0x01030c0a, 0xe15018c2, 0x1e3003cc, + 0x00b3003c, 0xd00f3102, 0x4400d304, 0x2c000c11, 0x03cc00f2, 0x0038c00e, + 0x30031202, 0x00000000, 0x00000000, 0x401cbc10, 0xfd003fc0, 0x0ff001f0, + 0x44fd003f, 0xc00ff003, 0xdc02ed00, 0x37c407f0, 0x833400df, 0x2119c40d, + 0xc1235c41, 0xfd0035c0, 0x8fd103fc, 0x08ff003f, 0x400f7223, 0xb540ef00, + 0x3d800ff0, 0x03fc20f7, 0x033dc40f, 0xf003d006, 0x60000000, 0x00000000, + 0x0814ac00, 0xf8003ac0, 0x0f30032c, 0x01c98032, 0xc00eb003, 0x6c00f802, + 0x3bc00cf6, 0x87241028, 0x0233c21f, 0x80037c00, 0xc9003e80, 0x8cf013ec, + 0x08fb013e, 0x0004b803, 0x2500cb00, 0x3e000fa2, 0x03ec00fb, 0x0032c40c, + 0xb001ea04, 0x70000000, 0x00000000, 0xc0089c00, 0xb5002d40, 0x0e70023c, + 0x02870035, 0xc00b7006, 0x1c00b500, 0x2fd40d72, 0x0a1c00af, 0x00a1d80b, + 0xe0061cc2, 0x85002dc0, 0x8f6e02dc, 0x00b7002d, 0x400d7002, 0x04008700, + 0x2d000b77, 0x02dc80b7, 0x0029c828, 0x7002f204, 0x60000000, 0x00000000, + 0x00009e00, 0xb48029e0, 0x0b780a1e, 0x00878021, 0xe00bfc02, 0x5e00b580, + 0x2de88938, 0x465e0085, 0x8225e00a, 0x68221e41, 0x85802de2, 0x0858c2de, + 0x01b7812d, 0xa019780e, 0x16018780, 0x2d200b58, 0x02de00b6, 0x8021e018, + 0x7802f000, 0x20000000, 0x00000000, 0x48048c00, 0xb3002c60, 0x0a30000d, + 0x00810024, 0xc00bb002, 0x0c00b370, 0x2cc00930, 0x020c00ab, 0x9224c00b, + 0x3c020c00, 0x83822ce0, 0x0b3402cc, 0x00b3002e, 0xf8093002, 0x04018300, + 0x2c820b30, 0x02cc00b3, 0x0028c098, 0x3482d200, 0x30000000, 0x00000000, + 0xc804a800, 0xfe003a80, 0x0fa00338, 0x008e5032, 0x800fa003, 0x6800fec0, + 0x3e800da0, 0x037a20ce, 0xd066800e, 0xec022800, 0xc6e03fb0, 0x0ce003e8, + 0x00fa003f, 0x880da003, 0x2802ca01, 0x3f800fa0, 0x03e800f6, 0x0032802c, + 0xe003fa00, 0x60000000, 0x00000000, 0x4810a000, 0xf8403e04, 0x0e8013e0, + 0x60f8003e, 0x100f8003, 0xe000f800, 0x7e002f00, 0x03e101f8, 0x013a000f, + 0x836ba000, 0xf8083e02, 0x0f0003e0, 0x08f8003e, 0x000f8003, 0xc000f800, + 0x3e000f80, 0x03e000f8, 0x423e100f, 0x8403d200, 0x30000000, 0x00000000, + 0x0810a400, 0xf980b640, 0x0f900364, 0x00d9003e, 0x600e9003, 0x6440f900, + 0xb8401c98, 0x0366a0e9, 0x0332450f, 0x90212680, 0xc9003240, 0x0c9083e4, + 0x00f9003e, 0x400c9003, 0xe400d900, 0x3e700f90, 0x03e400f9, 0x00b2480c, + 0x9003c200, 0x30000000, 0x00000000, 0x80042400, 0xb1402240, 0x0b102224, + 0x00c9002e, 0x600b9002, 0x2604b900, 0x22410a9c, 0x02c68089, 0x002e680b, + 0x90028710, 0xd9022054, 0x0dd00224, 0x00b9002e, 0x400c9d02, 0xe4008900, + 0x2e500bb0, 0x02e400b9, 0x88205208, 0x9402e000, 0x10000000, 0x00000000, + 0x18012400, 0xbb502240, 0x0b900244, 0x0089002e, 0x460b9002, 0x6400b100, + 0x22400991, 0x022400a9, 0x0022400b, 0x1002a500, 0x99802240, 0x009002a4, + 0x00b9012e, 0x40199002, 0xe4028900, 0x2e500b90, 0x02e400b9, 0x80224008, + 0xbc02c604, 0x40000000, 0x00000000, 0x08000410, 0xb9102040, 0x0b100205, + 0x0081402c, 0x400b1102, 0x0400b140, 0x60500b30, 0x12840081, 0x40a8400b, + 0x14068400, 0x990020c1, 0x09100604, 0x04b1002c, 0x50283002, 0xc4008110, + 0x2c400b10, 0x06c440b9, 0x00204028, 0x1002c201, 0x00000000, 0x00000000, + 0x1800600c, 0xf8423200, 0x0f800360, 0x01c0003e, 0x000e8403, 0x6000f800, + 0x32000980, 0x2360a4a8, 0x0232000f, 0x8003a000, 0x9800b200, 0x2c8283a0, + 0x00f8003c, 0x000d8003, 0xe2a0c840, 0x3e000f80, 0x03e1a0f8, 0x00320a0c, + 0x8003ce03, 0x50000000, 0x00000000, 0x984de400, 0xfd203b40, 0x0f9023f5, + 0x02fd003e, 0x400f5203, 0xe400fd01, 0x3e510e94, 0x03d400fd, 0x0036508f, + 0xd021c500, 0xfd003d40, 0x4fd003e4, 0x00f9003f, 0x400f1003, 0xf400f920, + 0x3f400b90, 0x03e480f5, 0x013c400f, 0xd003e606, 0x70000000, 0x00000000, + 0x1815a400, 0xff003e40, 0x1cd023e4, 0x00e9003b, 0x400fd003, 0xb400f910, + 0x3e400f50, 0x033400e9, 0x00334a0f, 0x91077400, 0x5d003d40, 0x0c9011e4, + 0x00f9003e, 0x400fd003, 0xe400f900, 0x3f400f90, 0x03e400fd, 0x003f4047, + 0xf000c600, 0x70000000, 0x00000000, 0x1810e008, 0xb8002e00, 0x0d8006e1, + 0x20b80836, 0x000e8002, 0x6000b020, 0x2c120b80, 0x43601088, 0x2a32000b, + 0x22436100, 0x8a002e00, 0x0a8002e0, 0x00b8002e, 0x030b8002, 0xe040b800, + 0x2e000ba0, 0x22e000ba, 0x002e000b, 0xa002ce04, 0x30000000, 0x00000000, + 0x68048400, 0xb1002e40, 0x081002c4, 0xc0a10020, 0x400b1002, 0xc400b120, + 0x2c4c0b11, 0x02040481, 0x206c400b, 0x12020440, 0x81002a40, 0x081002c4, + 0x00b1002c, 0x480b1006, 0xc401b100, 0x2c400b10, 0x02c400b1, 0x002c400b, + 0x1002c201, 0x70000000, 0x00000000, 0xb811a400, 0xbb002e40, 0x099002e4, + 0xa0b92026, 0xc08a9022, 0x64103900, 0x2e401b90, 0x02640081, 0x422a400b, + 0x90006408, 0x89026e49, 0x0a9082e4, 0x00b9022e, 0x400b9002, 0xe401b900, + 0x2e540b92, 0x02e405b9, 0x002e400b, 0x9002c604, 0x60000000, 0x00000000, + 0xa004a400, 0xfd803c40, 0x089002e5, 0x00e90822, 0x410fd803, 0xa400f998, + 0x3e400f90, 0x030642c9, 0x00be410f, 0x9c032402, 0xc9403e79, 0x0c9403e4, + 0x00f9003e, 0x680f9003, 0xe400f905, 0x3e510f98, 0x03e400f9, 0xd03e400f, + 0x9503e804, 0x30000000, 0x00000000, 0xc800a404, 0xf9183e41, 0x0f9003e6, + 0x00f9003e, 0x420f9203, 0xa410f900, 0x3e400f10, 0x03e402f9, 0x0036400f, + 0x9903e438, 0xf9903e60, 0x1f9203e4, 0x00f9043e, 0x440f9043, 0xe480f900, + 0x3e600f98, 0x03e418f9, 0x883e400f, 0x9003ea00, 0x20000000, 0x00000000, + 0x0800a000, 0xf8003e00, 0x0f804320, 0x02d8403e, 0x044e8013, 0xe064f840, + 0x12000c82, 0x0320c0d8, 0x0432000e, 0x80034008, 0xd8003e18, 0x2c800320, + 0x08f8003e, 0x002c8003, 0xe000e800, 0x3e188c85, 0x83e000f8, 0x4032000d, + 0x8483ca04, 0x20000000, 0x00000000, 0x0804a804, 0xbe802e80, 0x09e10228, + 0x00ca002f, 0x900ba002, 0xfb00ba00, 0x2a8008ea, 0x0b79008a, 0x0083a008, + 0xa0123904, 0xca802d92, 0x08a04168, 0x00ba002e, 0x8008ed86, 0xe800ba00, + 0x2fa008a4, 0x02e810ee, 0x88b3800b, 0xe202ca00, 0x00000000, 0x00000000, + 0x08044c00, 0xb3902cc0, 0x0b3c0a0c, 0x088b002c, 0xc00ab002, 0xce10b300, + 0x24c00b3c, 0x020c0183, 0x0024c808, 0xb002cd00, 0x83002ce0, 0x1830004c, + 0x00b3002c, 0xc0083c12, 0xcc00a300, 0x2ce01038, 0x06cc00b3, 0x0024808b, + 0x3002ca00, 0x50000000, 0x00000000, 0x00101c00, 0xb5002dc0, 0x097c0a0e, + 0x4087202d, 0xc00b7206, 0xdc01b780, 0x29e40b70, 0x024c048f, 0x30056208, + 0x73128d06, 0x87082dc1, 0x0878025c, 0x00b7012f, 0xe0087002, 0xdc00b720, + 0x2dc24860, 0x06dc80af, 0x80a1c20b, 0x7002c800, 0x40000000, 0x00000000, + 0x00081e00, 0xf6a03de0, 0x0f78031e, 0x20c7a02d, 0xe09e7a03, 0xde00f78a, + 0x31ec4b78, 0x031e00d7, 0xa124602e, 0x7a03de00, 0xc7803de0, 0x0438235e, + 0x00f7803d, 0xe8087802, 0xde00e784, 0x3dc00c78, 0x83de00f7, 0x8435e00d, + 0x4813ca02, 0x00000000, 0x00000000, 0x2814ac00, 0xff803ec0, 0x0f3003ec, + 0x80ef5036, 0xc00ff803, 0x6400ff60, 0x3fd8acb0, 0x03ec02f3, 0x203a004f, + 0xf4012400, 0xeb003ec0, 0x4fb003ec, 0x00fb003d, 0xc00fa003, 0xec00fb00, + 0x3cc00fa2, 0x03ec40e3, 0x023e400f, 0x8003c206, 0x60000000, 0x00000000, + 0x4014be00, 0xff883be0, 0x0f7803be, 0x00e7c07b, 0xe40ff983, 0xfe408f8a, + 0x1fc80ff8, 0x039e00cf, 0xc13b608f, 0xfc47fc00, 0xff803fe0, 0x0cf803fe, + 0x40ff803f, 0xf20cf803, 0xfe00ff88, 0x3f600ff9, 0x03fe00c7, 0x8033a40c, + 0x69031000, 0x70000000, 0x00000000, 0xa8009c00, 0xbf0021c0, 0x0f70021c, + 0x20b71861, 0x8403f002, 0x1c04d720, 0x2dc40852, 0x021c01a7, 0x20a1400b, + 0x72079c80, 0x87002d40, 0x8d72039c, 0x05b7002f, 0xc00d7002, 0xdc008700, + 0x2d400b55, 0x02dc0087, 0x1035c00a, 0x60022a04, 0x60000000, 0x00000000, + 0xa0009c00, 0xb6482dc0, 0x0b70029c, 0x40af0029, 0x404a7012, 0x9c08870a, + 0x2cc00a70, 0x06944087, 0x0061400b, 0x74028840, 0xa5082dc4, 0x087022dc, + 0x01b7002d, 0xc0087002, 0xcc20a710, 0x2d400b75, 0x06dc009f, 0x0021c048, + 0x404e0000, 0x20000000, 0x00000000, 0x40040c00, 0xb38024e0, 0x1230022c, + 0x01b34820, 0x000bb802, 0x04001b00, 0x2cc00810, 0x020580a3, 0x0020000b, + 0x30028400, 0x81882c43, 0x1934028c, 0x00b3002c, 0xc0093002, 0xce01a300, + 0x2c400b18, 0x02cc0090, 0x4820408a, 0x28061804, 0x30000000, 0x00000000, + 0x0804ac10, 0xf8c03ae0, 0x8b3003be, 0x00efc03a, 0xc04eb823, 0xac00cf10, + 0x1fc00a30, 0x02af80cf, 0x002a400f, 0xfa03ac00, 0xab803ed0, 0x0cb083ec, + 0x00fb003f, 0xc60cb003, 0xec00ef00, 0x3ea00f92, 0x03fc02db, 0x6022c00c, + 0xba030a04, 0x60000000, 0x00000000, 0x8000ac00, 0x3a003ac5, 0x0fb403ec, + 0x00ff003e, 0x500fb103, 0xe800ff00, 0x3fc00eb4, 0x53e400fb, 0x103e500f, + 0xf003ac00, 0xe9003ed4, 0x0fb003ec, 0x00fb023f, 0xc00fb401, 0xcc004b00, + 0x3ee00f84, 0x03ec00eb, 0x403ec00f, 0xb003e000, 0x30000000, 0x00000000, + 0x0100bc00, 0xfea433c0, 0x07f0033c, 0x00cf0033, 0x8004f003, 0x3e80ff02, + 0x3bc00dd8, 0x03bc00df, 0x0b3f410b, 0xf003de00, 0x9f003f40, 0x0cf0a3fc, + 0x00ff007f, 0xc10cfa03, 0xfc00df00, 0x3f400fdc, 0x032c00ff, 0x8036c00f, + 0xc003c044, 0x30000000, 0x00000000, 0x81142c00, 0xb24022c0, 0x0bb74a2c, + 0x00c30036, 0x100bb002, 0xa020bb00, 0x3ec04a98, 0x922624bb, 0x0026200b, + 0xb002e400, 0x89002c70, 0x08b0026c, 0x00bb002c, 0xc008b082, 0xec00ab00, + 0x2e600b0c, 0x036c00b3, 0x1822680b, 0x8803a040, 0x10000000, 0x00000000, + 0x80012c00, 0xbb0466c0, 0x0b80222c, 0x00ab0426, 0xe019b002, 0x6000bb00, + 0x60c00ab2, 0x02ee00bb, 0x002a220b, 0xb002e481, 0xbb200ae2, 0x08b002ec, + 0x08bb002e, 0xc0099002, 0xec008b00, 0x2e700ba0, 0x02ac01bb, 0x0022e00b, + 0xa802e000, 0x50000000, 0x00000000, 0x08140c10, 0xbb04e0c0, 0x0b00020c, + 0x00ab0424, 0x000b3042, 0x8000b301, 0x2cc00a10, 0x020400b3, 0x0004000b, + 0x3002c405, 0x81022e00, 0x0830024c, 0x01b3002e, 0xc0293002, 0xcc00a300, + 0x2c400b80, 0x064c00bb, 0x0020400b, 0x00028200, 0x00000000, 0x00000000, + 0x00006c00, 0xfa0032c1, 0x0f80023c, 0x00ef0036, 0x000db003, 0x2000ff00, + 0x3bc00e80, 0x21e004d7, 0x027e000f, 0xf003e000, 0xf9003e40, 0x2cb003ec, + 0x00fb002f, 0xc00db003, 0xec00cb00, 0x2e400fa0, 0x03ac00fb, 0x0032c00f, + 0x8003c002, 0x10000000, 0x00000000, 0x8000fc04, 0xff003fc0, 0x0fc013fc, + 0x0adf003f, 0x000ff003, 0x9004ff00, 0x3fc00e40, 0x03f000ff, 0x007f004f, + 0xf023f400, 0xed043d40, 0x8ff003fc, 0x00ff023f, 0xc00ef003, 0xfc00ff02, + 0x3f400fc0, 0x01fc00ff, 0x003b400f, 0xe003a806, 0x70000000, 0x00000000, + 0xc005fe00, 0xff403300, 0x07d803fc, 0x00df003b, 0xc40cf803, 0x3c80d704, + 0x3fc80fc8, 0x03be40cc, 0x8033e007, 0xf803fe00, 0xfc803b20, 0x0fc003fe, + 0x00ff803f, 0xe00ff903, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x803fe00f, + 0xf2937084, 0x70000000, 0x00000000, 0xc010ee10, 0xb740a2a0, 0x0b9822ff, + 0x40bfc023, 0xd00ab848, 0x1ca0cf90, 0xa3f00e98, 0x028c0848, 0x803ee00e, + 0xb812ee04, 0xb8802e60, 0x0b8902ee, 0x00bb802e, 0xe00bb202, 0xee00bb80, + 0x2ee00bb8, 0x02ee00bb, 0x822ee00b, 0xbc023004, 0x30000000, 0x00000000, + 0xc805cc00, 0xb3602840, 0x0b10028c, 0x04b34008, 0xd8083012, 0x8cc1b300, + 0x24d10b80, 0x020c8290, 0x0028c00b, 0x3002cc00, 0xb0002c00, 0x0b0002cc, + 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x002cc00b, + 0x30027200, 0x20000000, 0x00000000, 0xc015ac01, 0xb3002a40, 0x1bb822ec, + 0x00bb002a, 0xc00ab000, 0xac00bb00, 0xaac00a90, 0x0aac0088, 0x802ec08a, + 0xb022ec00, 0xba002ec0, 0x0bb642ec, 0x00bb002e, 0xc00bb002, 0xec00bb00, + 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xb0023004, 0x60000000, 0x00000000, + 0x0015e400, 0xfb003a00, 0x0f9003ec, 0x00fb003a, 0xc00c3003, 0xac00f300, + 0x36c00f24, 0x0b2c00c8, 0xc83ac00f, 0xb003ec00, 0xf8203e06, 0x0f8c02ec, + 0x00fb003e, 0xc00bb002, 0xec00fb00, 0x2ec00fb0, 0x03ec00fb, 0x003ec04f, + 0xb0135040, 0x70000000, 0x00000000, 0xa001bd00, 0xff0037c1, 0x0fd003fc, + 0x00ff0037, 0xc007f003, 0x7c088f00, 0x37c00ff4, 0x83fc00fc, 0x0037c00f, + 0xf003fc00, 0xff403f60, 0x0db801fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00ff, 0x003fc10f, 0x7003e804, 0x60000000, 0x00000000, + 0xd410a400, 0xdb00b280, 0x0fb003ec, 0x10d33038, 0xc00db003, 0xcc10cb00, + 0x3ac20fa4, 0x07ac00e8, 0x403ec08f, 0xb002ec44, 0xf9043e90, 0x0f80032c, + 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, + 0xb003f404, 0x20000000, 0x00000000, 0xc8052c00, 0xbf0022f0, 0x03ba02fc, + 0x60bf0563, 0xc008bd82, 0xfc088fd0, 0x23c20bb4, 0x036c0081, 0x002ec00b, + 0xb002ec00, 0xbb003ac0, 0x0bb0022c, 0x00bb002e, 0xc00bb882, 0xec00bb00, + 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xf002f200, 0x40000000, 0x00000000, + 0xe0054410, 0xb3000416, 0x0b10024d, 0x00b38020, 0xc0093842, 0xcc00a3c0, + 0x28d00934, 0x222c00a0, 0x082cc00b, 0x3002cc00, 0xb0002c40, 0x0b00020c, + 0x00b3002c, 0xc00b3042, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x002cc00b, + 0x3002f200, 0x10000000, 0x00000000, 0xf0011600, 0xb78125a0, 0x0b7912de, + 0x08b78020, 0xe0087802, 0xde02a788, 0x21e00bf9, 0xc65e0084, 0x802de00b, + 0x7802de00, 0xb5802de0, 0x0b48021e, 0x00b7802d, 0xe00b7802, 0xde00b780, + 0x2de00b78, 0x02de00b7, 0x802de00b, 0x7802f804, 0x10000000, 0x00000000, + 0x48080c40, 0xf300b440, 0x0f1003cc, 0x00d300a8, 0xc00d3003, 0xcc00e321, + 0x38c48f31, 0x268c01e0, 0x023cc44f, 0x3107cc00, 0xf3003c40, 0x0f300b0c, + 0x10f3003c, 0xc00f3003, 0xcc00f300, 0x3cc00f30, 0x03cc00f3, 0x003cc00f, + 0x3003d202, 0x10000000, 0x00000000, 0x400dbc10, 0xff103b40, 0x0ff013fc, + 0x00f7023f, 0xc407f003, 0xfc00cf40, 0x3fc41f71, 0x03fc00fe, 0x003fc00f, + 0xf003fc01, 0xff003bc0, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003d004, 0x60000000, 0x00000000, + 0xa805e400, 0xbb103200, 0x0bb8032c, 0x80eb4816, 0xd50d3003, 0x2cc0db30, + 0x3ec00fb0, 0x036c04f8, 0x023ec00f, 0xb003ec00, 0xfa003ec0, 0x0fb0032c, + 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, + 0xb003c204, 0x20000000, 0x00000000, 0xc8119400, 0xb73021c0, 0x0b70035d, + 0x40876423, 0xc40a700a, 0x1c40d700, 0x21d40b70, 0x021c01b6, 0x006dc00f, + 0x7002dc00, 0xb7003dc0, 0x0b30021c, 0x00b7002d, 0xc10b7002, 0xdc00b700, + 0x2dc00b70, 0x02dc00b7, 0x002dc00b, 0x7002f004, 0x20000000, 0x00000000, + 0x80009631, 0xa3a121a0, 0x0bf8021e, 0x80a38025, 0xe88a7802, 0x0e80a7a0, + 0x29e00afc, 0x021e00a5, 0x802de00b, 0x7802de00, 0xb7802df0, 0x1b780a5e, + 0x00b7802d, 0xe00b7802, 0xde00b780, 0x2de00b78, 0x02de00b7, 0x802de00b, + 0x7902c800, 0x20000000, 0x00000000, 0x4814ce08, 0xb305a0d2, 0x0b30024c, + 0x08830020, 0xc00a3002, 0x6c01b300, 0x24c10b38, 0x220c01b3, 0x802cc10a, + 0x3002cc00, 0xb3602cc0, 0x0b3d024c, 0x00b3002c, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002da04, 0x20000000, 0x00000000, + 0xe8152804, 0xfa04b388, 0x8fa20328, 0x00aa0036, 0x808ea003, 0x2800ea00, + 0x3e800f68, 0x0b6800e6, 0x603e800b, 0xa003e800, 0xfe483fa0, 0x0fe00168, + 0x00fa002e, 0x800ba003, 0xe800ba00, 0x3e800fa0, 0x03e800fa, 0x003e800f, + 0xa003fa04, 0x70000000, 0x00000000, 0x4800e000, 0xf0003e00, 0x0f8003c1, + 0x00f8043c, 0x010e8023, 0xa0009804, 0x3a000f84, 0x23a00078, 0x493e000f, + 0x8003e000, 0xf8003a00, 0x0f8203a0, 0x00f8003e, 0x000f8003, 0xe000f800, + 0x3e000f80, 0x03e000f8, 0x003e000f, 0x8003d200, 0x60000000, 0x00000000, + 0x0810e400, 0xf9003240, 0x0e9c03e4, 0x80e9803e, 0x409e9401, 0xa400e104, + 0x38504c90, 0x03e400f9, 0x8032400f, 0x9003e600, 0xf9003e40, 0x0f100324, + 0x00f9003e, 0x400f9803, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f, + 0x9003c204, 0x20000000, 0x00000000, 0x80046400, 0xb900a060, 0x089000e4, + 0x04818022, 0x40181802, 0xa4018910, 0x26500d94, 0x822400f9, 0x002a400f, + 0x9002e400, 0xb9002e40, 0x0b900224, 0x04b9012e, 0x400e9912, 0xe400b900, + 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002e000, 0x10000000, 0x00000000, + 0x18052400, 0xb900aa4a, 0x8a9002a4, 0x00a9102e, 0x401a9012, 0xa419a900, + 0x6a5008b0, 0x02a410b9, 0x1022400b, 0x9002e440, 0xb9002e40, 0x0b900624, + 0x00b9002e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400b9, 0x002e400b, + 0x9002ce00, 0x40000000, 0x00000000, 0x08040400, 0xb110284a, 0x081012c4, + 0x08810020, 0x50081022, 0x85088100, 0x60408910, 0x460500b3, 0x0028401b, + 0x1000c408, 0xb1002c40, 0x0b100604, 0x00b1002c, 0x400b1102, 0xc400b100, + 0x2c400b10, 0x02c400b1, 0x002c400b, 0x1002ca05, 0x00000000, 0x00000000, + 0xb80d6000, 0xf8683a08, 0x0e8003a8, 0x11a800be, 0x000a8003, 0xa000a800, + 0x3a000c80, 0x33e010f8, 0x0032000f, 0x8003e000, 0xb8013e00, 0x4f828b20, + 0x00f8053e, 0x001f8403, 0xe001f800, 0x3e000f80, 0x03e000f8, 0x003e000f, + 0x8283ce03, 0x50000000, 0x00000000, 0x981df408, 0xf920b740, 0x0f5001c5, + 0x01f9413e, 0x500f9003, 0xe500f141, 0x3e500f50, 0x03e400ed, 0x003e401e, + 0x9003e400, 0xdf003f40, 0x0fd003e4, 0x00f9003e, 0x400e9203, 0xe400f900, + 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003e604, 0x70000000, 0x00000000, + 0x9805e400, 0xf9003340, 0x0cd003b4, 0x00d50032, 0x480e5003, 0x64c0cd00, + 0xf3404e50, 0x436400f5, 0x0036400f, 0x9003f400, 0xf9003e40, 0x0b928324, + 0x00e9003e, 0x400fd153, 0xe400b900, 0x3e400f90, 0x03e400f9, 0x003e400f, + 0x9283c600, 0x70000000, 0x00000000, 0x3810e000, 0xb800a280, 0x88800020, + 0x02881016, 0x0a088002, 0xa0d0e840, 0x3e000880, 0x0280a0ba, 0x0022000b, + 0x8042e000, 0xb8002e00, 0x0b800220, 0x00b8002e, 0x000b8002, 0xe000b800, + 0x2e000b80, 0x02e000b8, 0x002e000b, 0x8002ce06, 0x20000000, 0x00000000, + 0x4805c400, 0xb1012c40, 0x08100284, 0x40810020, 0x4c0b1002, 0x44889114, + 0x28440b90, 0x020488b9, 0x0024410b, 0x1002c400, 0xb1002c40, 0x0b100604, + 0x01a1002c, 0x400b1002, 0xc400b100, 0x2c400b10, 0x02c400b1, 0x002c400b, + 0x1002d201, 0x20000000, 0x00000000, 0x1811a400, 0xb9002e40, 0x08911224, + 0x10890024, 0x40089002, 0x8400a900, 0x2e400990, 0x02a400bb, 0x0022400b, + 0x9002e400, 0xb9002e40, 0x0b900624, 0x00b9002e, 0x400b9012, 0xe400b900, + 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002e600, 0x20000000, 0x00000000, + 0xa015e440, 0xf9003e60, 0x0c9813a4, 0x00c90032, 0x404f1023, 0x6400d102, + 0x0a400b10, 0x072400f1, 0x0036400b, 0x9003e404, 0xf9c03e44, 0x0f920324, + 0x00e9003e, 0x400b9003, 0xe400b900, 0x2e400f90, 0x02e400f9, 0x003e400f, + 0x9003e804, 0x70000000, 0x00000000, 0xe801a600, 0xf1003248, 0x2f9003c4, + 0x00b9003e, 0x400f9003, 0xe400e908, 0xb6420e90, 0x27a400f9, 0x103e400f, + 0x9003e400, 0xf9c43e40, 0x0f1c0be4, 0x00f9003e, 0x400f9003, 0xe400f900, + 0x3e401f90, 0x03e400f9, 0x003e400f, 0x9003f200, 0x60000000, 0x00000000, + 0x2810a000, 0xf8023610, 0x0f8103e0, 0x00d0203a, 0x000c8003, 0x2000e800, + 0x34014e80, 0x432000d8, 0x2032000f, 0x8003e000, 0xf8403e00, 0x0f840320, + 0x00e8003e, 0x000f8003, 0xe0003800, 0x3e000f80, 0x03e000f8, 0x003e000f, + 0x8003c204, 0x20000000, 0x00000000, 0x28052804, 0xba002d84, 0x0b2002fa, + 0x00de40a2, 0x800de403, 0x6804cee0, 0x03a00ce4, 0x8228008e, 0x482a800b, + 0xa003aa20, 0xba002e80, 0x0ba02228, 0x00ba002e, 0x800ba002, 0xe800ba00, + 0x2e804ba0, 0x03a800ba, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000, + 0x28054c00, 0xb3002c60, 0x8b380284, 0x21831068, 0xc00a3702, 0x0c00a3c0, + 0x28f00a3c, 0x820c0093, 0x0028c00b, 0x30028c00, 0xb3002cc0, 0x0b30024c, + 0x00b3002c, 0xc00b3102, 0xcc00b300, 0x2cc00b30, 0x028c00b3, 0x002cc00b, + 0x3002ca00, 0x10000000, 0x00000000, 0xa0011c00, 0xb7302dd0, 0x0b7006d4, + 0x20970124, 0xc8097006, 0x4c409700, 0x294209d0, 0x021e0087, 0x0029c00b, + 0x70069c00, 0xb7002dc0, 0x0b70025c, 0x00b7002d, 0xc00b7002, 0xdc00b700, + 0x2dc00b70, 0x029c00b7, 0x002dc00b, 0x7002e004, 0x10000000, 0x00000000, + 0xa8081e00, 0xb7b02d20, 0x0b78039e, 0x00878639, 0xea0e7803, 0x1e20e780, + 0x28a04e78, 0x0b1e20d7, 0x8039e00f, 0x78039600, 0xf7803de0, 0x0f380b5e, + 0x04f7802d, 0xe00f7803, 0xde00f780, 0x3de00f78, 0x039e00f7, 0x803de00f, + 0x7803e202, 0x10000000, 0x00000000, 0x081dac04, 0xfb213e80, 0x0fb003c8, + 0x08fb0033, 0xcc4f9003, 0xed80e100, 0xb2c00e90, 0x03ec80fb, 0x003ec00f, + 0xb003a400, 0xfb003ec0, 0x0fb003ac, 0x00fb003e, 0xc00fb003, 0xec10fb00, + 0x3ec00fb0, 0x03ac00fb, 0x003ec00f, 0xb003c204, 0x60000000, 0x00000000, + 0x4005fe00, 0xff903364, 0x0af903f2, 0x00df9037, 0xe00cf803, 0x3e00ef80, + 0x33e04c58, 0x133e20d7, 0x803be40f, 0xf202de40, 0xd78031e0, 0x0cf8033e, + 0x00ff803f, 0xe00ff903, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x803fe00f, + 0xf803c000, 0x20000000, 0x00000000, 0xa8119c04, 0xbf042184, 0x087002dc, + 0x80853037, 0xc00a7202, 0x3c00e700, 0x35c10840, 0x03bc0287, 0x0035c01b, + 0x70039400, 0x870035c4, 0x0a71835c, 0x00b7102d, 0xc00b7002, 0xdc00b700, + 0x2dc00b70, 0x02dc00b7, 0x002dc00b, 0x7002ea06, 0x20000000, 0x00000000, + 0x10009c00, 0xb70120c6, 0x1a5012d8, 0x00870021, 0xc0097002, 0x1c009710, + 0x21c009d0, 0x025c0087, 0x0829c10b, 0x7102d410, 0x9f0023c0, 0x0830021c, + 0x00b7002d, 0xc00b5006, 0xdc00b700, 0x2dc00b70, 0x02dc00b7, 0x002dc00b, + 0x7002c000, 0x20000000, 0x00000000, 0x6010ce00, 0xbb046030, 0x081802c0, + 0x00810064, 0xc00b1002, 0x0c00a100, 0x04010904, 0x028c0083, 0x0820c00b, + 0x30028400, 0x832004e4, 0x0a34024c, 0x04b3002c, 0xc00b9002, 0xcc003300, + 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002c800, 0x20000000, 0x00000000, + 0x2015ae80, 0xbf0032e0, 0x0eb883ec, 0x004b0023, 0xc00db00b, 0x3c00bb02, + 0x30402910, 0x0b7c00cb, 0x002ac00b, 0xb003ec00, 0xdb4832d0, 0x0cb4032c, + 0x00fb003e, 0xc00bb003, 0xec08fb00, 0x3ec00fb0, 0x02ec00bb, 0x003ec00f, + 0xb003ea04, 0x70000000, 0x00000000, 0x8400ec00, 0xfb007e48, 0x0f9003cc, + 0x02ea003f, 0xc00eb003, 0xcc00f340, 0x3e400e90, 0x13ac00eb, 0x013ec00f, + 0xb003ec00, 0xfb023ec8, 0x0fb003ec, 0x00fb003e, 0xc00f9003, 0xec00fb00, + 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, 0xb003e000, 0x60000000, 0x00000000, + 0x8010fc00, 0xcf007100, 0x0dfa13e4, 0x10c90039, 0xc00cf003, 0x3c00df00, + 0x36000ec0, 0xa73c00fd, 0x0033c00f, 0xf003f400, 0xff0033c0, 0x0cf083fc, + 0x00ff003f, 0xc00ff003, 0x3c00ff00, 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, + 0xf013c844, 0x20000000, 0x00000000, 0x80044c00, 0x8b0036a1, 0x889012e2, + 0x00a0f022, 0xc00a1c1b, 0x6c00a9b0, 0x2260888c, 0x022c00b1, 0xc03ac00b, + 0xb0026400, 0x930034c0, 0x0db002ec, 0x00bb002e, 0xc00b9903, 0x6c00bb00, + 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xb002e800, 0x10000000, 0x00000000, + 0x80052c00, 0x8b0022e0, 0x09b002a2, 0x008b002e, 0xc0089c02, 0x2c008800, + 0x22600a9c, 0x02ac00bb, 0x8022c00b, 0xb002ec00, 0xbb0022c0, 0x08b002ec, + 0x01bb002e, 0xc00bb002, 0x2c00bb00, 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, + 0xb002e000, 0x40000000, 0x00000000, 0x08042c00, 0x8305a001, 0x0a1002cc, + 0x01a10028, 0xc01a0002, 0x0c00a100, 0x20400880, 0x020c0192, 0x002cc00b, + 0x30024400, 0x9b0026c0, 0x093002cc, 0x00b3002c, 0xc00b1042, 0x4c00b300, + 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002c205, 0x00000000, 0x00000000, + 0x800d6c00, 0xcf0022c0, 0x0d9003a8, 0x08c9003f, 0xc00c9002, 0x3c01d800, + 0xb6400e80, 0x0a3c00bb, 0x0032c00f, 0xb003e400, 0xfb0022c0, 0x0cb003ec, + 0x00fb003e, 0xc00f900b, 0x2c00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, + 0xb003c023, 0x50000000, 0x00000000, 0xa01dfc00, 0xff063f00, 0x8dd001f0, + 0x00fd0037, 0xc08f4003, 0xfc047500, 0x3f000fc0, 0x03fc00ff, 0x003bc01f, + 0xf0037400, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00fd003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00ff, 0x003fc08f, 0xf003e804, 0x70000000, 0x00000000, + 0xc085fc80, 0xdf903fe0, 0x0df003be, 0x00ff803f, 0xc20df803, 0xfe10fc80, + 0x3d600ec8, 0x22f200ff, 0x913be08e, 0x48031600, 0xdc803360, 0x89f683f3, + 0x0044803f, 0xe00cf803, 0xfe00ff80, 0x37e00ff2, 0x83fe00fd, 0x803d200f, + 0xf283f000, 0x70000000, 0x00000000, 0x80188d48, 0x8b202ee0, 0x0bfc022e, + 0x00bb802f, 0xd808b842, 0xee008880, 0x0e080088, 0x02e2048b, 0x002ee011, + 0x8822a600, 0xb880284a, 0x08f602e0, 0x84a88026, 0xe02ab802, 0xee00bb80, + 0x2ee00bbc, 0x02ec80b8, 0x822e2009, 0xbc02e004, 0x30000000, 0x00000000, + 0x08048c08, 0x93002cc0, 0x4b34128c, 0x0033002c, 0xc24b3012, 0xcc089002, + 0x2e420900, 0x02c000a3, 0x202cc09a, 0x00108400, 0xb0002208, 0x0b3012c0, + 0x0080002c, 0xc0183002, 0xcc00b300, 0x2cc00b30, 0x02cc24b1, 0x002c000b, + 0x3002c201, 0x70000000, 0x00000000, 0xc0058c00, 0x8b002ec0, 0x0bb002ac, + 0x00bb002e, 0xc000b002, 0xec008980, 0x0ee02ab0, 0x066c008b, 0x002ec04b, + 0x9444a401, 0x9b006ae0, 0x2ab002e8, 0x00a98026, 0xc00ab002, 0xec00bb00, + 0x2ec00bb0, 0x02ec00bb, 0x202e214b, 0xb002f004, 0x60000000, 0x00000000, + 0x4115ec00, 0xdb043ec0, 0x0fb003ac, 0x00bb003e, 0xc00fb003, 0xec00f880, + 0x3e600d8c, 0x81e108fb, 0x003ac00e, 0x04038640, 0xf8a03260, 0x8fb002e2, + 0x44c8802c, 0xc00cb003, 0xec00fb00, 0x36c00bb0, 0x03ec00f9, 0x483ea00f, + 0xb003d004, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0f70437c, + 0x00ff007d, 0xc00df003, 0xfc007c00, 0x3f808ddc, 0x23fa50df, 0x001fc20d, + 0xfc03fc00, 0xec403fc0, 0x05b003f4, 0x00fc002f, 0xc00df003, 0xfc00ff00, + 0x3fc00fb0, 0x03fc00fd, 0x803f800d, 0xf003f800, 0x60000000, 0x00000000, + 0xc010ac08, 0xcb003ac0, 0x0ff003ac, 0x00fb003f, 0xc00cb203, 0xec20f808, + 0x3e400eaa, 0x03a504fb, 0x043ec00f, 0xa003ac20, 0xdb083242, 0x0df0032c, + 0x00c80232, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x032c00cb, 0x003e840e, + 0xb003f004, 0x20000000, 0x00000000, 0xc8053d40, 0x8b022ec0, 0x0bf0002c, + 0x00bb006f, 0xc008b402, 0x0d20b90c, 0x0cc009b0, 0x03ce84bb, 0x002ef00f, + 0xb8022e00, 0x834034d3, 0x0af0022c, 0x00d9e036, 0xe20bb002, 0xec00bb00, + 0x2ec00bf0, 0x122c004b, 0x802e9008, 0xf002f200, 0x40000000, 0x00000000, + 0xc0044e00, 0x830028c0, 0x0b30428c, 0x04b3012c, 0xc08a3002, 0x8f009081, + 0x24400304, 0x02c38093, 0x0228d003, 0x00824402, 0xa0902460, 0x08300220, + 0x08802020, 0xe00b3002, 0xcc00b300, 0x2cc00b30, 0x020c00b1, 0x902c280a, + 0x3002f800, 0x50000000, 0x00000000, 0x60005e60, 0x87802de0, 0x0b38021e, + 0x01b7842d, 0xe00a7882, 0x1e00b490, 0x2f2019e8, 0x06d60037, 0x822de40a, + 0xe8925e09, 0x8f802568, 0x0a780a3e, 0x409c8025, 0xe00b7802, 0xde00b780, + 0x6de00b78, 0x021e0aa7, 0xc02f6008, 0x7802d800, 0x40000000, 0x00000000, + 0x48084c02, 0xc30138c0, 0x0f30038c, 0x00f3002e, 0xc00e3003, 0xccc09010, + 0x3cc08e10, 0x02c900f3, 0x003cc20b, 0x3102cc20, 0xc0103480, 0x9c300304, + 0x40c00030, 0xc00b3003, 0xcc00f300, 0x3cc00f30, 0x032c00f1, 0x003c000e, + 0x3003d202, 0x00000000, 0x00000000, 0x401dbc14, 0xff003fc0, 0x0ff083fc, + 0x00ff003f, 0xc00d7017, 0xfc40fd10, 0x3fc00e71, 0x023c00ff, 0x003fc01f, + 0xf0133c48, 0xe7007fc8, 0x0ef183dc, 0x40fd103f, 0xc00ff103, 0xfc40ff00, + 0x3fc40ff0, 0x01fc08df, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000, + 0x0804ac00, 0xdb003ac0, 0x0ff403ec, 0x00fb003f, 0xca01b003, 0xec00f800, + 0x32c00eb0, 0x07ac00cb, 0x003ec10d, 0x9003c400, 0xdb001cc0, 0x0cb0032a, + 0x00c88032, 0xe00cb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00f3, 0x0032c00f, + 0xb003ea00, 0x70000000, 0x00000000, 0xc0189c80, 0x87002dc0, 0x0b7302dc, + 0x00b7002d, 0xd8087002, 0xdc10b401, 0x21800870, 0x039c00e7, 0x006dc008, + 0x7002dc00, 0x87002dc0, 0x0f73029c, 0x02840021, 0xc00d7002, 0xdc00b700, + 0x2dc00b74, 0x02dc00b7, 0x0029c00b, 0x7202f204, 0x60000000, 0x00000000, + 0x20009e43, 0x97806de0, 0x0b7802de, 0x00b7802d, 0xe0097802, 0xde08bc00, + 0x25e00a78, 0x82de04b7, 0x8229e00b, 0x7c029e03, 0xa7806fe0, 0x687a061f, + 0x009cc021, 0xe0087802, 0xde00b780, 0x2de00b78, 0x02de00bf, 0x8021e00b, + 0x7902f000, 0x20000000, 0x00000000, 0x68008c08, 0x83026cc0, 0x0b3002cc, + 0x00b3002c, 0xc0883002, 0xcc00b381, 0x24e04834, 0x028f80ab, 0x016cc00a, + 0x3002cc00, 0xb3442cf0, 0x0b30028c, 0x00938060, 0xc0093002, 0xcc00b300, + 0x2cc00b30, 0x02cc00b3, 0x8068e40b, 0x3002d204, 0x30000000, 0x00000000, + 0xe815e800, 0xda003a80, 0x0fa003e8, 0x00fa002e, 0x800da003, 0xe800f608, + 0x37a30e68, 0x03d980fa, 0x0038800f, 0xec03ea80, 0xee603db2, 0x0ca01b3a, + 0x00de00b2, 0x800ca003, 0xe800fa00, 0x3e800fa0, 0x03e800fe, 0x9033900f, + 0xa003fa04, 0x60000000, 0x00000000, 0x4801a000, 0xf8003e00, 0x0f8003e0, + 0x00f8003e, 0x000f8002, 0xe000f802, 0x3a000f80, 0x93a000f8, 0x001e100c, + 0x8003e100, 0xc80a3e02, 0x0f000360, 0x00e8403e, 0x000f8007, 0xe000f800, + 0x3e000f80, 0x03e000f8, 0x103e120f, 0x8003d200, 0x30000000, 0x00000000, + 0x0810a442, 0xc9003240, 0x0f9003e4, 0x00f9003e, 0x401c9103, 0xe604f980, + 0x36400c9c, 0x43a640c9, 0x003a400c, 0x9983e600, 0xc9803a68, 0x6c900324, + 0x24f9803e, 0x440f9013, 0xe400f900, 0x3e408f90, 0x03e400f9, 0x0032402c, + 0x9003c204, 0x30000000, 0x00000000, 0x80046482, 0x89003240, 0x0b9002e4, + 0x01b9002e, 0x400a9202, 0xe701b960, 0x22401f9c, 0x112700d9, 0x0122680d, + 0x90824600, 0xd9813a40, 0x0d900364, 0x00b9d02e, 0x400b9002, 0xe400b900, + 0x2e400b90, 0x02e400b1, 0x20206008, 0x9002e000, 0x10000000, 0x00000000, + 0x38050400, 0x81002240, 0x0b9002e4, 0x10b9002c, 0x40089002, 0xe485b920, + 0x04400990, 0x02a400a9, 0x02224508, 0x9046e441, 0x89202e40, 0x2890022c, + 0x00b9002e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400b9, 0x80a2c808, + 0x9002c600, 0x40000000, 0x00000000, 0x28140440, 0x81102040, 0x091002c4, + 0x00b1002c, 0x500a1002, 0xcc00b100, 0x20500a10, 0x02241891, 0x40604019, + 0x10024c00, 0x91002ac4, 0x09110244, 0x40b1002c, 0x400b1002, 0xc400b100, + 0x2c400b10, 0x02c440b9, 0x00204008, 0x1002c201, 0x00000000, 0x00000000, + 0x380d41a0, 0xc840b200, 0x0f8003e0, 0x00b8002c, 0x00088003, 0xe000b800, + 0x340009a0, 0x02a800a8, 0x0022008c, 0x8053e001, 0xc8003a10, 0x2c040301, + 0x00fa003e, 0x000f8003, 0xe000f800, 0x3e000f82, 0x83e100f8, 0x0032800c, + 0x8283ce03, 0x50000000, 0x00000000, 0x9815e480, 0xf9203a40, 0x0f9403e4, + 0x00f9003e, 0x500f9003, 0xe400f500, 0x37404ff0, 0x039c00f9, 0x00b4400f, + 0xd0137410, 0x7f043b49, 0x0f9613f4, 0x80f5003c, 0x400f9003, 0xe400f901, + 0x3e400790, 0x03e480fd, 0x003f400f, 0x9003e606, 0x70000000, 0x00000000, + 0x1815e400, 0xc9003240, 0x0f9203e4, 0x18f9003e, 0x440cd003, 0xf404bd04, + 0x3a400fd0, 0x031400f9, 0x003f400b, 0xd0031400, 0xfd003f40, 0x0c920324, + 0x00fd003d, 0x400c9003, 0xe400f900, 0x3e400f90, 0x03e400fd, 0x003f400f, + 0x9203c600, 0x70000000, 0x00000000, 0x3810c000, 0x80002200, 0x0b8102e0, + 0x00b8002e, 0x040d8002, 0xe000b800, 0x2e020880, 0x02a000b0, 0x282e010b, + 0x80032008, 0xb8022e00, 0x088002a0, 0x00b8002e, 0x00088002, 0xe000b800, + 0x2e004b80, 0x02e020ba, 0x002e000b, 0x8002ce00, 0x30000000, 0x00000000, + 0x48008400, 0xa1002040, 0x0b1002c4, 0x00b1002c, 0x40081002, 0xc400b102, + 0x2a480a10, 0x060400b1, 0x242c400b, 0x90024400, 0xb1006c40, 0x0b110284, + 0x00b1812c, 0xc0381002, 0xc400b100, 0x2c400b10, 0x02c480b1, 0x002c400b, + 0x1102c205, 0x70000000, 0x00000000, 0x98108400, 0xa1002640, 0x0b9002e4, + 0x00b9002e, 0x40099002, 0xe40cb960, 0x2e400892, 0x02a400b9, 0x012e408b, + 0x96022400, 0xb9002c48, 0x0a9022a4, 0x21b9002e, 0x40089002, 0xe400b900, + 0x2e400b90, 0x02e400b9, 0x002e600b, 0x9002c604, 0x60000000, 0x00000000, + 0xa005e400, 0xe900b240, 0x0b9043e4, 0x00f9002e, 0x400c9023, 0xe400f900, + 0x3a4c4e1c, 0x222501f9, 0x003e408f, 0x980b6400, 0xf9503f58, 0x3e9027a5, + 0x00f9523e, 0x400c9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0xc03e600f, + 0x9003e804, 0x70000000, 0x00000000, 0xc811ac02, 0xd9003a40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xe400f984, 0x1e400a98, 0x23e458f9, 0x003e418f, + 0x9043e480, 0xf9003e42, 0x1d9003e7, 0x10f90036, 0x400f9003, 0xe400f900, + 0x3e400f90, 0x03e400f9, 0x283e400f, 0x9003ea00, 0x60000000, 0x00000000, + 0x0810a040, 0xc8003600, 0x0e8003e0, 0x00f8003c, 0x000d8003, 0xe080f800, + 0x3e100f87, 0x43e144f8, 0x00ba040f, 0x80c3a000, 0xd8003e14, 0x0c800320, + 0x08f8003e, 0x000e8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x003a000f, + 0x8003ca04, 0x20000000, 0x00000000, 0x28052800, 0x8a002a80, 0x0ba002e8, + 0x00ea002e, 0x8008ed02, 0xfa20be11, 0x2c800be0, 0x02f80c8a, 0x042b800b, + 0x68023914, 0xcea02fb0, 0x4aa01228, 0x04be882d, 0x8008a002, 0xe800ba00, + 0x2e800ba0, 0x02e804ee, 0xa023840f, 0xa002ca00, 0x40000000, 0x00000000, + 0x28044f22, 0x030020c0, 0x0b3002cc, 0x00a3006c, 0xc0083002, 0xce009340, + 0x2cc08b38, 0x02ce80a3, 0x0020e80b, 0x34068c22, 0x83802cd0, 0x08b0000c, + 0x00b3a02c, 0xd80b3002, 0xcc00b300, 0x2cc00b30, 0x06cc00a3, 0x0028d40b, + 0x3002ca00, 0x50000000, 0x00000000, 0x80105800, 0x972029c0, 0x0b7006dc, + 0x04a7022d, 0xc0285402, 0xdc04b604, 0x6dc00b70, 0x02fe0497, 0x822dc00b, + 0x74463e20, 0x84002f80, 0x0a33021c, 0x80b6012d, 0x40097002, 0xdc00b700, + 0x2dc04b70, 0x02dc80a7, 0x8021c00b, 0x7002e800, 0x40000000, 0x00000000, + 0x88085e00, 0xc7a031e0, 0x0f7803de, 0x00e7803c, 0xf40d5803, 0xde00f480, + 0x3de20b78, 0x03de01f7, 0xcc31e00f, 0x78039e10, 0x45803de0, 0x1c78131e, + 0xc1f5803d, 0x600b7803, 0xde00b780, 0x3de00f78, 0x53df00e7, 0x8039e00f, + 0x7803ea00, 0x00000000, 0x00000000, 0x0815a0a0, 0xeb403ac0, 0x0fb003ec, + 0x00eb003f, 0xc80f9003, 0xec007a00, 0x3fd00fb0, 0x23e800ef, 0x403ac00f, + 0x2003ec10, 0xa8003de4, 0x0bb28bec, 0x00fa003e, 0xc00eb003, 0xec00fb00, + 0x36c00fb0, 0x23ec00e0, 0x013ec00e, 0xb003c204, 0x60000000, 0x00000000, + 0x0004be00, 0xcfc833e0, 0x0ff8033e, 0x00ff803f, 0xe04cd803, 0xfe10ff80, + 0x3fe30cf9, 0x073e00ff, 0x802fe407, 0xf807fc04, 0xfd903f20, 0x0cf80bbe, + 0x28ce903f, 0xa00df803, 0xfe00ff80, 0x3fe00ff8, 0x03fe40fd, 0x803fe40f, + 0xf803c000, 0x70000000, 0x00000000, 0xa8189800, 0x8f0021c0, 0x0b71035c, + 0x00b7002d, 0xc00d4002, 0xdc10b600, 0x2fc00a40, 0x021da037, 0x102d400e, + 0x55439c20, 0xf4002fc1, 0x0a70031c, 0x0086002d, 0x080d7002, 0xdc00b700, + 0x3dc40b70, 0x02dc00b5, 0x422dd00f, 0x7002ea04, 0x60000000, 0x00000000, + 0x00009440, 0x870021c0, 0x0b30021c, 0x00b7002d, 0xc0085002, 0xd400b510, + 0x29c008f0, 0x461400b7, 0x0025808b, 0x700214c0, 0xb5006dc0, 0x093002fc, + 0x0085012d, 0x00187002, 0xdc00b700, 0x2dc00b71, 0x02dc10b5, 0x082d400b, + 0x7002c000, 0x20000000, 0x00000000, 0x20048000, 0x8b0020c0, 0x0b30024c, + 0x00b3002e, 0xc0090002, 0xc400b300, 0x6ef00a0d, 0xa20280bb, 0x002c000a, + 0x09068600, 0xb0482cc0, 0x8b30020d, 0x0082482c, 0x80093002, 0xcc00b300, + 0x2cc04b30, 0x02cc00b0, 0xc02c700a, 0x3002c804, 0x30000000, 0x00000000, + 0xa815ec00, 0x8f00b2c0, 0x0bb0032c, 0x00fb003f, 0xc00c9023, 0xec00f940, + 0x3bd208bc, 0x2a2d08ff, 0x0026c00f, 0xbc132c00, 0xf8483e60, 0x0df003fd, + 0x0289c03e, 0xc00cb003, 0xec00fb00, 0x3ec00fb0, 0x01fc00f9, 0x903ee20b, + 0xb003ea04, 0x60000000, 0x00000000, 0x8001a800, 0xfb003ec0, 0x0fb003ec, + 0x00fb003f, 0xc00f9003, 0xe504b910, 0x3fc00fb4, 0x03e500ff, 0x003e900f, + 0xb603a410, 0xe8013fdc, 0x0eb003ee, 0x00f9c03e, 0x400fb003, 0xec00fb00, + 0x3ac00fb0, 0x03ec00f9, 0x003e400f, 0xb003e000, 0x30000000, 0x00000000, + 0x21108400, 0xcf0033c0, 0x0f70033c, 0x00ff003e, 0xc00cc003, 0xfd00cc08, + 0x3fc24cc8, 0x03fc40df, 0x0037400f, 0xd003fc00, 0xbc0233e0, 0x0c70037c, + 0x20fdc03f, 0x400cf003, 0xfc00ff00, 0x3fc00ff0, 0x03fc04fd, 0x013fc28f, + 0x70030044, 0x30000000, 0x00000000, 0xa1046180, 0x8b0022c0, 0x0bb002ac, + 0x009b002e, 0xc00a8842, 0xc604aa81, 0x2ec10886, 0x02e000bb, 0x042a3c0b, + 0x8803a600, 0xf0c034f4, 0x08b0422c, 0x00b9402c, 0xe00db002, 0xec00bb00, + 0x2ec00bb0, 0x02ec00b8, 0xc22e504b, 0xb0022040, 0x10000000, 0x00000000, + 0x80052c80, 0x8b0022c0, 0x0bb0022c, 0x00bb002e, 0xc0089c02, 0xec2089c0, + 0x2ec008b2, 0x12e801bb, 0x0022c00b, 0xa202af00, 0xb88922c2, 0x12b0026c, + 0x00ba082e, 0x200ab002, 0xec00bb00, 0x2ec00bb0, 0x02ec00b8, 0x802ee00b, + 0xb002a000, 0x40000000, 0x00000000, 0x08140800, 0x830020c0, 0x0b30028c, + 0x04b3002c, 0xc10a0002, 0xc000a100, 0x2cc00800, 0x02c001b3, 0x00280109, + 0x00028401, 0xa80026c0, 0x3a30020c, 0x00b2000c, 0x004b3002, 0xcc00b300, + 0x2cc00b30, 0x02cc00b0, 0x002c000b, 0x30020201, 0x00000000, 0x00000000, + 0x000d6000, 0xcf00b2c0, 0x0fb0032c, 0x00fb003f, 0xc00c8003, 0xe000c901, + 0x2fc05880, 0x12e004df, 0x0132000f, 0x8003a000, 0xb80032c0, 0x0ef0037c, + 0x10f9003e, 0x000eb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00f8, 0x003e400f, + 0xb00b0003, 0x50000000, 0x00000000, 0xa015f000, 0xff003fc0, 0x0ff003fc, + 0x00df003f, 0xc00fc003, 0xf400ff00, 0x3fc02f40, 0x03f000df, 0x003f000f, + 0xc003b404, 0xfc013fc0, 0x0df013dc, 0x00ff043d, 0x000df003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00fc, 0x023f401f, 0xf003e802, 0x70000000, 0x00000000, + 0xc015fcc2, 0xd7003500, 0x0cf8033c, 0x80ff903f, 0x200ff203, 0xfe00ff80, + 0x3f201f48, 0x03fe10f4, 0x8035202d, 0xc803fe00, 0xfc803320, 0x0cc12330, + 0x405c3433, 0xe008c103, 0x3400cf80, 0x3fe00ff8, 0x03fe00ff, 0x803fe00f, + 0xf803f000, 0x70000000, 0x00000000, 0x8018fc00, 0x8b843220, 0x88b202bf, + 0x009b202e, 0x204bfc02, 0xee10bb80, 0x0ea00b88, 0x02ee00b9, 0x8022a008, + 0x8802ae00, 0x39802a60, 0x02860201, 0xc0b85022, 0xc80a8102, 0x2500ab80, + 0x2ee00bb8, 0x02ee00bb, 0x802ee00b, 0xb802e004, 0x30000000, 0x00000000, + 0x0805ccc8, 0x83002000, 0x0830828c, 0x40b30028, 0x000b3402, 0xcc10b300, + 0x2c000b00, 0x008c00ab, 0x002e4008, 0xb002cc00, 0xb8002200, 0x08040a80, + 0x05b02028, 0xc2080002, 0x05a08300, 0x2cc00b30, 0x024c00b3, 0x002cc00b, + 0x3002c201, 0x70000000, 0x00000000, 0xc005ac01, 0x9b00a270, 0x0a300aac, + 0x00bb002e, 0x601bb042, 0xec00bb00, 0x2ec00b88, 0x02ec109b, 0x806af008, + 0xb80aac04, 0xb90b2ad8, 0x02a20229, 0x00ba0420, 0xc00ab000, 0x0400ab00, + 0x2ec00bb0, 0x02ec00bb, 0x002ec003, 0xb002f004, 0x60000000, 0x00000000, + 0x00006c08, 0xdb2410e0, 0x4cb003ac, 0x08fb001a, 0x300fb003, 0xec10fb00, + 0x3e800b88, 0x03ac10f9, 0x803e300d, 0x2c83ec00, 0xf2003030, 0x048c03a1, + 0x00f808a2, 0xc0008583, 0x2400cb04, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, + 0xb003d004, 0x70000000, 0x00000000, 0xe1909c00, 0xef203fc0, 0x2df0006c, + 0x009f003f, 0x000ff003, 0xfc00ff00, 0x2f004fc0, 0x23fc00fd, 0x0033802f, + 0xe003fc10, 0xbf403f40, 0x0f700bf4, 0x40f9903f, 0xc00f4003, 0xf440ff00, + 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003f800, 0x60000000, 0x00000000, + 0xc010ac00, 0xf3003a80, 0x0db0032c, 0x00cb0032, 0x400fb007, 0x2c00fb00, + 0x36c20d82, 0x13ac11fb, 0x0036408c, 0xb0032c41, 0xfa402280, 0x1d950b2c, + 0x00c30432, 0xc60cb603, 0x2c60cb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00d, + 0xb003f004, 0x20000000, 0x00000000, 0xca043c00, 0x8ba032d4, 0x08b00b3f, + 0x608b0022, 0x400bf003, 0x6c00bb00, 0x0e704d84, 0x036dc0b3, 0x003cc08d, + 0xbc036f40, 0xfb8036c0, 0x0db1436f, 0x40dbe022, 0xf00db882, 0x2f00db00, + 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xb002f200, 0x40000000, 0x00000000, + 0xe0014c00, 0x83002c90, 0x0930024d, 0x00830028, 0x080b3482, 0x0c009300, + 0x2c24080c, 0x028e0092, 0x1820e048, 0x3c820d00, 0xb3002040, 0x0b040240, + 0x40902020, 0xd00a0402, 0x8600a300, 0x2cc00b30, 0x02cc00b3, 0x0024c009, + 0x3002f800, 0x50000000, 0x00000000, 0x60011e40, 0x848221a4, 0x0878221e, + 0x00878029, 0x604b7882, 0x5e00b780, 0x2fe009c8, 0x021e00b7, 0x8029e209, + 0x78825e00, 0xaf8825e0, 0x4819025e, 0x08978001, 0xe00b3002, 0x9600b780, + 0x2de00b78, 0x02de00b7, 0x802de00b, 0x7802d800, 0x40000000, 0x00000000, + 0x48082c00, 0xc3200cc4, 0x0db1434c, 0x008b0028, 0x161f3002, 0x0c04b300, + 0x6c040804, 0x828c00b3, 0x0120c018, 0x30430c40, 0xb3107040, 0x0b350344, + 0x80d100b2, 0xc00e0103, 0xa400e300, 0x3cc00f30, 0x03cc00f3, 0x003cc00d, + 0x3003d202, 0x00000000, 0x00000000, 0x401dbd20, 0x2c006785, 0x0ff013fc, + 0x00ff10b7, 0x400f74a3, 0xfc41ff10, 0x1dc01fc0, 0x13fc00ff, 0x103fc40f, + 0x7003fc10, 0xf7043fc0, 0x0ff143fc, 0x02ff003f, 0xc00df213, 0x7c01df00, + 0x3fc00ff0, 0x03fc01ff, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000, + 0xa805ed00, 0xdb8032e0, 0x0db003ed, 0x20cb0032, 0x400fb823, 0x6c00fb00, + 0x3ac00e80, 0x032c00e3, 0x0034c01c, 0xb003ac00, 0xfb003ec0, 0x0ba00328, + 0x00ca0032, 0xe00cb00b, 0x2400cb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, + 0xb003ea04, 0x70000000, 0x00000000, 0xc8119c80, 0x870035c0, 0x087002dd, + 0x00df0029, 0x400b3002, 0x1c01b700, 0x39400b40, 0x02dc00b7, 0x0225c008, + 0x70029c00, 0xb7002dc0, 0x83700a1c, 0x008f002b, 0xc0283042, 0x14008700, + 0x2dc00b70, 0x02dc00b7, 0x002dc00b, 0x7002f204, 0x60000000, 0x00000000, + 0xc0409e94, 0x838024e0, 0x087802ce, 0x08978025, 0x600b7a06, 0x5e10b780, + 0x2de00b48, 0x021e04b7, 0x0123e049, 0xfc029e00, 0xb7802de2, 0x0b78320e, + 0x08978021, 0xe0087802, 0x0e208780, 0x2de00b78, 0x02de00b7, 0x802de00b, + 0x7802f000, 0x20000000, 0x00000000, 0x4814ec10, 0x83002494, 0x883002cc, + 0x00b30028, 0xd00b3002, 0x0c00b300, 0x28780336, 0x028c00b3, 0x4200c028, + 0x300a0c08, 0xb3902ce0, 0x0b30c20c, 0x02939028, 0xc0083082, 0x0c028300, + 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002d200, 0x30000000, 0x00000000, + 0xe815a800, 0xce0837a0, 0x6ca023e8, 0x00da0037, 0xa00fa003, 0x6800fa00, + 0x3f900f68, 0x872800e6, 0x00358005, 0x68038804, 0xfe807fa0, 0x0bec033a, + 0x42de4032, 0x800ce002, 0x2a008a00, 0x3e800fa0, 0x03e800fa, 0x003e800f, + 0xa003fa00, 0x60000000, 0x00000000, 0x4800e002, 0xf8003e08, 0x0e8003e0, + 0x00d8003e, 0x040f8403, 0xe000b800, 0x3e050f80, 0x03e001f8, 0x483e010e, + 0x8003e100, 0xf8003e00, 0x0f8143c1, 0x40e8483e, 0x100f8503, 0xe104d800, + 0x3e000f80, 0x03e000f8, 0x003e000f, 0x8003d200, 0x30000000, 0x00000000, + 0x0810e400, 0xc9993e50, 0x0f900324, 0x00e90232, 0x460f9801, 0xe400f900, + 0x3e640e9a, 0x032600f9, 0x8532610e, 0x9803a400, 0xc9a03e40, 0x07911324, + 0x00c90032, 0x400f9003, 0x4480c900, 0x3e400f90, 0x03e400f9, 0x003e400f, + 0x9003c200, 0x30000000, 0x00000000, 0x80046400, 0x89202e70, 0x0b900204, + 0x00890236, 0x400b9802, 0xe400b902, 0x2e500b90, 0x032440b9, 0x0016600c, + 0x98822440, 0x89013e40, 0x0b9c0364, 0x40d9c036, 0x764b9c03, 0x65008900, + 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002e004, 0x10000000, 0x00000000, + 0x18042400, 0x99042e40, 0x0b100226, 0x00a10022, 0x400a9202, 0xe4009900, + 0x6ec21b94, 0x06640099, 0x1022480a, 0x9102a420, 0x89006e40, 0x0b108224, + 0x24812026, 0x400b1102, 0x24108900, 0x2e400b90, 0x02e400b9, 0x002e400b, + 0x9002c600, 0x40000000, 0x00000000, 0x08040500, 0x81002cca, 0x1b142204, + 0x00814024, 0x400b3002, 0xc400b105, 0x2c408b10, 0x0a0400bb, 0x01664009, + 0x90420401, 0x81002840, 0x0b110244, 0x409310a4, 0x440b3102, 0x4c428100, + 0x2c400b10, 0x02c400b1, 0x002c400b, 0x1002c201, 0x00000000, 0x00000000, + 0x38080000, 0xd8013e08, 0x8f800b28, 0x00e80022, 0x810f8002, 0xe0009800, + 0x3e000e80, 0x026000d8, 0x0022000a, 0x8012a002, 0xc8052e00, 0x1f068321, + 0xa0c86836, 0x100f86c7, 0x21a0c800, 0x3e000f80, 0x03e000f8, 0x003e000f, + 0x8003ce03, 0x50000000, 0x00000000, 0x9819e506, 0xfd403f40, 0x079003e5, + 0x04f9003f, 0x400f9433, 0xe404f904, 0x3f400f50, 0x03e400fd, 0x003f400e, + 0x5003e400, 0xfd003f40, 0x4fd203f4, 0x80fd243e, 0x480fd203, 0xf480f900, + 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003e602, 0x70000000, 0x00000000, + 0x1801e480, 0xcd283d40, 0x0e9003f4, 0x00f91035, 0x400bd283, 0xe400d900, + 0x3f400fd0, 0x07b400fd, 0x0036400c, 0x500b3400, 0xfd003e40, 0x0fd28334, + 0xc0cd0033, 0x400cd103, 0x3400e900, 0x3e400f90, 0x03e400f9, 0x003e400f, + 0x9003c604, 0x70000000, 0x00000000, 0x3810e0a0, 0x88002e00, 0x4c8082e0, + 0x00e80222, 0x000b8002, 0xe000b801, 0x2e800ea0, 0x02e00098, 0x00228008, + 0x80022000, 0xb8002e00, 0x8ba26220, 0xc0a848aa, 0x02088102, 0x20a0b800, + 0x2e000b80, 0x02e000b8, 0x002e000b, 0x8002ce04, 0x30000000, 0x00000000, + 0x0805c4c2, 0x81022a40, 0x0a1206c4, 0x40a1002c, 0x400b1002, 0xc4009100, + 0x2c404b10, 0x02c404a9, 0x00264009, 0x90024408, 0xb1002c40, 0x0b128204, + 0x80813060, 0x40281002, 0x0480a100, 0x2c400b10, 0x02c400b1, 0x002c400b, + 0x1002c201, 0x70000000, 0x00000000, 0x1815a401, 0x89002e50, 0x089002ec, + 0x00a1002a, 0xc00bb002, 0xe400b900, 0x6e400a90, 0x02e40099, 0x00224038, + 0x920a2c00, 0xb9002e40, 0x8b900225, 0x00ab0028, 0x40089402, 0x2400b900, + 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002c600, 0x60000000, 0x00000000, + 0xa010a400, 0xc9003e50, 0x0e9003e4, 0x00e9001e, 0x680f9003, 0xe400d900, + 0x3e508f9c, 0x01e400f1, 0x8836400d, 0x12036400, 0xb9003e40, 0x0f980b26, + 0x00c94832, 0x400c9403, 0x2600e900, 0x3e400f90, 0x03e400f9, 0x003e400f, + 0x9003e800, 0x70000000, 0x00000000, 0xa800a400, 0xf9093e40, 0x0e9003e4, + 0x00e90036, 0x480f9003, 0xe400f900, 0x3e420f92, 0x83e401f9, 0x903ac04f, + 0x9003e400, 0xf9003e70, 0x0f92c3c4, 0x40f9a03e, 0x400f910b, 0xe480f900, + 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003ea00, 0x60000000, 0x00000000, + 0x28108000, 0xe8007e04, 0x0e8003e0, 0x10c8003e, 0x000d800b, 0x2000f800, + 0x3a006c84, 0x03e081f8, 0x6036100d, 0x84036080, 0xf8103e00, 0x1c841321, + 0x82c86032, 0x000f8003, 0x2002c800, 0x3e000f80, 0x03e000f8, 0x003e000f, + 0x8003ca00, 0x20000000, 0x00000000, 0x28042804, 0x8e846d80, 0x08a003b9, + 0x008a003f, 0xb008ed03, 0x6800ba01, 0x2f8008ec, 0x03b800be, 0x4038a00a, + 0xe50a3a80, 0xba006e80, 0x0de40238, 0x888e4023, 0xb20bec03, 0x7b40ca00, + 0x2e810ba0, 0x03a800ba, 0x002e800b, 0xa002ca04, 0x40000000, 0x00000000, + 0x28054c00, 0xb1802cc0, 0x1a30028e, 0x8183002c, 0xe2093c02, 0x0c00b300, + 0x28e40134, 0x00cd09b3, 0x8020800a, 0x30020f00, 0xb3012cc0, 0x08bc220c, + 0x128b00a4, 0xc20bbb0a, 0x0c008300, 0x2cc00b30, 0x02cc00b3, 0x002cc00b, + 0x3002ca00, 0x50000000, 0x00000000, 0x20111c80, 0x95402dc0, 0x8872229f, + 0x0087302b, 0x62080882, 0x1c01b700, 0x2d600974, 0x329d01bf, 0x402b100a, + 0x70821400, 0xb7002fe0, 0x09740a1c, 0x00830c25, 0xc10b3002, 0x5e209700, + 0x2dc00b70, 0x029c00b7, 0x002dc00b, 0x7002e800, 0x40000000, 0x00000000, + 0x20080e80, 0xf6802de0, 0x0e78038e, 0x02c7902d, 0x600d4802, 0x1e00f780, + 0x39605d78, 0x13de00b7, 0x8571a04e, 0x58031600, 0xf7802de0, 0x08f80b3e, + 0x14c78025, 0xe00f7803, 0x3e00c780, 0x3de00f78, 0x03de00f7, 0x803de00f, + 0x7803ea02, 0x00000000, 0x00000000, 0x0815ac24, 0xea003e80, 0x8fb403a4, + 0x00fb203e, 0x410f8003, 0xec00db00, 0x1c404eb0, 0x03ec00f3, 0x007c001e, + 0x8003e004, 0xfb023cc0, 0x07b003ec, 0x00f9003a, 0x008fb003, 0xe000eb00, + 0x3ec00fb0, 0x03ac00fb, 0x003ec00f, 0xb003c202, 0x60000000, 0x00000000, + 0x4005fe20, 0xc59025ec, 0x0efdc33e, 0x004f803f, 0x600fc803, 0x7e50ff80, + 0x3f6029f9, 0x23de40c7, 0x9031340c, 0x51033600, 0xff902fe8, 0x0ff8033e, + 0x00cf8133, 0xe007f913, 0x3e004f81, 0x3fe007f8, 0x03fe00ff, 0x803fe00f, + 0xf803c000, 0x70000000, 0x00000000, 0xa8119c0a, 0x870131c4, 0x48f0021c, + 0x04d70039, 0x400b400a, 0x1c00b704, 0x2d010850, 0x40d804d7, 0x31210e4a, + 0x72035400, 0xb5002dc3, 0x0b608354, 0x00861021, 0xc40bc382, 0x9c40a700, + 0x2dc00b70, 0x02dc00b7, 0x102dc00b, 0x7002ea04, 0x60000000, 0x00000000, + 0x80009c00, 0x860a2148, 0x0a700608, 0x0097002d, 0x040b0002, 0x1c10b710, + 0x2d400860, 0x02dc040f, 0x40230109, 0xd1061400, 0xb7000dc8, 0x0b500208, + 0x60870021, 0xc00b7006, 0x1c008700, 0x2dc00b70, 0x02dc00b7, 0x002dc00b, + 0x7002c000, 0x20000000, 0x00000000, 0x6010cc00, 0x80c02010, 0x08300200, + 0x00930028, 0x180b0002, 0x0c00b300, 0x2c220804, 0x02c80093, 0x00200003, + 0x00224000, 0xb14824d0, 0x090e0060, 0x008000a0, 0x000b0a06, 0x80042300, + 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002c804, 0x30000000, 0x00000000, + 0x2815bc00, 0xcb00a2c0, 0x0ef0030c, 0x00df003c, 0x520f8003, 0x2c00fb00, + 0x3e400cbe, 0x03cc00cb, 0x4032a00d, 0x30022400, 0xb3403ee0, 0x0fb8012f, + 0x02cbe032, 0xc00fbc43, 0x2e280b00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, + 0xb003ea04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb407ec8, 0x0fb003e8, + 0x00fb002e, 0x100f8417, 0xac00fb00, 0x7e448fa4, 0x03e500fb, 0x41be000e, + 0xb403e400, 0xfb003ec0, 0x0f9023e8, 0x04f3083e, 0xd00fb003, 0xec04fb00, + 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, 0xb003e010, 0x30000000, 0x00000000, + 0x0110ec00, 0xed083bc0, 0x4ef0037c, 0x00cf003f, 0x400e4003, 0xbc01ff00, + 0x7f008cda, 0x87fc00cf, 0x0033000c, 0xd9073400, 0xfd0033c2, 0x0fa04334, + 0x20ce043b, 0xf00fcc03, 0x2f00cf00, 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, + 0xf003c044, 0x30000000, 0x00000000, 0x81046c00, 0x89c03c80, 0x08b04222, + 0x00fb0026, 0x30088802, 0x2c00fb00, 0x2c000d8c, 0x03af00d2, 0x8068240f, + 0x8803e200, 0xb91036c0, 0x09848363, 0x40884036, 0x300b8802, 0x22008b00, + 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xb002e040, 0x10000000, 0x00000000, + 0x80000c00, 0xa8882ec0, 0x0a300264, 0x808b002e, 0x600a8822, 0xac00bb00, + 0x6e5408b4, 0x42ef048b, 0x88220008, 0xa4022200, 0xbb0026c0, 0x0b31022c, + 0x24891422, 0x020b3082, 0x00208b00, 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, + 0xb002e000, 0x40000000, 0x00000000, 0x08000c00, 0x82022cc0, 0x08300240, + 0x01a30024, 0x00080002, 0x0c01a300, 0x2e004900, 0x028c0091, 0x002a000b, + 0x8002c000, 0xb10024c0, 0x0b000240, 0x00800024, 0x000b004a, 0x00028300, + 0x2cc00b30, 0x02cc00b3, 0x002cc04b, 0x3042c201, 0x00000000, 0x00000000, + 0x00087c00, 0xea003a40, 0x0af00360, 0x008f002e, 0x000a8003, 0xac00bb00, + 0x2e000c80, 0x02ec00cb, 0x0022000c, 0x80022000, 0xf90036c0, 0x0f800b20, + 0x02c0003a, 0x000f8003, 0x2001cb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, + 0xb003c003, 0x50000000, 0x00000000, 0xa01dfc08, 0xfc003b00, 0x0ff003b0, + 0x00ff003f, 0x004fc023, 0xfc00ff00, 0x3d004fc0, 0x02bc00ff, 0x043f000e, + 0xc003f000, 0xfd003fc0, 0x0dc003b0, 0x00fc003f, 0x000fc003, 0xf000ff00, + 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003e802, 0x70000000, 0x00000000, + 0xc005fc88, 0xdc103fe0, 0x0ff807be, 0x00df803f, 0xe00ff803, 0xf0b0ef80, + 0x3fca0fc8, 0x0372008f, 0x281fe00c, 0xf803d200, 0x048137c0, 0x0cf923fc, + 0xa0cf2831, 0x200cf803, 0xfe00fe80, 0xb3c80df8, 0x0b3c86cf, 0x80b3204d, + 0xf802f000, 0x70000000, 0x00000000, 0xc010dc40, 0x882022e0, 0x0bb802cc, + 0xa08b802e, 0xe00bb802, 0xe3008b84, 0x2ff00c88, 0x0260a08f, 0xc22ee00a, + 0xb802e200, 0xa88223e4, 0x0ab002ff, 0x00abc02a, 0x0848b802, 0xee00bb08, + 0x22b408b0, 0x822f408a, 0x81226008, 0xb802e004, 0x30000000, 0x00000000, + 0xc8458c08, 0x900020c0, 0x0b30028c, 0x00b3002c, 0xc00b3002, 0xc000a302, + 0x2cc00280, 0x02e00183, 0x0028c00a, 0x3012c404, 0xa00424c0, 0x883002cc, + 0x00a30020, 0x02083002, 0xcc00ba20, 0x20c009b2, 0x028c0083, 0x00264009, + 0x3002c201, 0x70000000, 0x00000000, 0xc0148c00, 0x890022c0, 0x0bb002ec, + 0x00ab002e, 0xc00bb002, 0xe110ab00, 0x2ec00b98, 0x2268028b, 0x002ec008, + 0xb002ee00, 0xa88822c0, 0x0ab002ec, 0x00ab002a, 0x8208b002, 0xec00bb80, + 0x229808b0, 0x82ac118b, 0x0026e009, 0xb002f004, 0x60000000, 0x00000000, + 0x0415ec08, 0xd888b2c0, 0x0bb003ac, 0x00fb003e, 0xc00fb002, 0xea00eb00, + 0x3ec00e0e, 0x03e060cb, 0x0038c02e, 0xb003e280, 0xe08036c0, 0x2cb003cc, + 0x00eb0032, 0x501cb003, 0xec00f280, 0x32308db5, 0x03ac00c1, 0x9036600d, + 0xb002d004, 0x70000000, 0x00000000, 0xa041bc02, 0xfd9037c0, 0x0ff003fc, + 0x00df003f, 0xc00ff003, 0xf240df00, 0x3dc204d0, 0x033e007f, 0x003fc01f, + 0xf023f010, 0xfc083fc0, 0x4df003ec, 0x0077003f, 0x718ff003, 0xfc00fd00, + 0x3d400ff0, 0x037c00ff, 0x023bc00e, 0xf003f800, 0x60000000, 0x00000000, + 0xc010ac00, 0xe80032c0, 0x0fb003ec, 0x10db003e, 0xc00fb003, 0xe920db30, + 0x3bc00e84, 0x03e510ff, 0x013ac20e, 0xb0032c80, 0xf80034c3, 0x0cb033ec, + 0x00eb043e, 0x600cb003, 0xec00fa00, 0x32000ea4, 0x03ec20fb, 0x0d3e4004, + 0xb003f004, 0x20000000, 0x00000000, 0xd8053c80, 0x8b0022c0, 0x0bb002ec, + 0x008b042e, 0xc00bb000, 0xc180db81, 0x23c20b90, 0x22cc20bf, 0x8836d108, + 0xb0034e80, 0x89c037d2, 0x08b042fd, 0x200f802e, 0xc008b002, 0xec00bb00, + 0x22400830, 0x40de08bb, 0x602cc008, 0xb002f200, 0x40000000, 0x00000000, + 0xe0054c00, 0xaa0020c0, 0x0b3002ec, 0x0093002c, 0xc00b3002, 0xc4003340, + 0x28d00a00, 0x40c328b3, 0xa020c00a, 0x39828700, 0xa01020d0, 0x083006cf, + 0x8093902e, 0x80083002, 0xcc00b300, 0x20c00a30, 0x024e00b3, 0x442c0008, + 0x3002f800, 0x50000000, 0x00000000, 0xf0011f40, 0x878021e0, 0x0b7802de, + 0x0087806d, 0xe00b7806, 0xc6009780, 0x21e10b48, 0x02d600b7, 0x802de008, + 0x78227e00, 0x1c9125c0, 0x087822de, 0x0097802f, 0x50087802, 0xde00bf80, + 0x20e00878, 0x02de04b6, 0x802f6008, 0x7802d800, 0x40000000, 0x00000000, + 0x48080c00, 0xea00b0c0, 0x0b3003cc, 0x00d3003c, 0xc00f3002, 0xc400f310, + 0x28c40e11, 0x02cc00f3, 0x0038c20e, 0x30038400, 0xf01010c4, 0x0c3003cc, + 0x00f3013c, 0x840c3003, 0xcc00f340, 0x30c00e10, 0x03cc20f3, 0x003cc00c, + 0x3003d202, 0x00000000, 0x00000000, 0x400dbc00, 0xff103fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff003, 0xfc40e704, 0x3fc00fd0, 0x03fc00f7, 0x0035c00d, + 0x7001fc00, 0xec107dd8, 0x0ff103fc, 0x00ef003f, 0xc80ff003, 0xfc00f700, + 0xbf800ff1, 0x23fc40ff, 0x023dc40f, 0xf003d006, 0x60000000, 0x00000000, + 0xa805ec20, 0xcaa032c0, 0x0fb003ec, 0x00fb003e, 0xc00eb002, 0xec01fb00, + 0x3bd20f90, 0x27aa00df, 0xd036c00c, 0xb043cc04, 0xd80032c9, 0x0fb0032c, + 0x90fb103e, 0xc00fb003, 0xec00fb00, 0x3ec04eb0, 0x03ec00fb, 0x003cc00d, + 0xb003ea00, 0x70000000, 0x00000000, 0xc8118d00, 0x830821c0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xd4403700, 0x2dd00b50, 0x42fc0483, 0x0821c002, + 0x7012dc00, 0xd60021d8, 0x0b70021d, 0x40b7802d, 0x404b7002, 0xdc00b700, + 0x2cc00870, 0x02dc00b7, 0x002dc008, 0x7002f204, 0x60000000, 0x00000000, + 0x80001e82, 0x868021e0, 0x0b78029e, 0x00b78021, 0xe00b7802, 0xde00b781, + 0x25e88b58, 0x82de0897, 0xa025e00a, 0x7802ff00, 0x97c0a5e8, 0x0b78021e, + 0x00b7a02d, 0xe00b7802, 0xde00b780, 0x2d220a78, 0x02dec0b7, 0x882fe009, + 0x7802f000, 0x20000000, 0x00000000, 0x4814cc00, 0x835020c0, 0x0b3002ec, + 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b38, 0x02cd0083, 0x0020c00a, + 0x3002ce00, 0x93c824c0, 0x0bb0020c, 0x01b3022c, 0xc00b3002, 0xcc00b380, + 0x2c5808bc, 0x02cc00b3, 0x842cd048, 0x3002d204, 0x30000000, 0x00000000, + 0xe815a804, 0x8a84b280, 0x0fa003a8, 0x00fa003a, 0x800ea003, 0xe880fa04, + 0x34808fe9, 0x43fb60da, 0x0236800e, 0xa003d800, 0xde803680, 0x0fa00b28, + 0x00fa003f, 0x900fa003, 0xe800f6a0, 0x3fb00ee9, 0x03e800f6, 0xc03d9805, + 0xa003fa04, 0x60000000, 0x00000000, 0x4800e100, 0xf8083e00, 0x0f8003e0, + 0x00f8003e, 0x000f8003, 0xe000f800, 0x1e000f80, 0x03e000f8, 0x003e000f, + 0x8043e102, 0xf8403a11, 0x0f8003e1, 0x00d8023e, 0x000f8003, 0xe000f800, + 0x3c000f81, 0x03e100f8, 0x083e000f, 0x8003d200, 0x30000000, 0x00000000, + 0x0810c402, 0xcb003e40, 0x0f9003e4, 0x00c9003e, 0x400f9003, 0xee00f900, + 0x3e500e90, 0x03e440f9, 0x203e480d, 0x9c03e640, 0xc9023060, 0x0c900324, + 0x00f10032, 0x460f9003, 0xe400f900, 0x36400c90, 0x032480f9, 0x8032428f, + 0x9003c204, 0x30000000, 0x00000000, 0x80046500, 0x89042e40, 0x0b9002e4, + 0x00a9002e, 0x400e9002, 0xe500b908, 0x2e600890, 0x02e600b9, 0x802c6028, + 0x9002e502, 0x8100227c, 0x28900225, 0x00b9c02a, 0x600b9002, 0xe408b900, + 0x22400890, 0x022480b9, 0x40224008, 0x9002e000, 0x10000000, 0x00000000, + 0x18052700, 0x89002e40, 0x0b9002e4, 0x0089002e, 0x400b9002, 0xe460b900, + 0x2e400b90, 0x02e400b9, 0x402e4009, 0x9000e400, 0x89106240, 0x09900224, + 0x00b92226, 0x500b9002, 0xe400b900, 0x26400890, 0x022410b9, 0x202a400a, + 0x9002c600, 0x40000000, 0x00000000, 0x08040440, 0x81102c40, 0x0b1002c5, + 0x00a10024, 0x400a1002, 0xc400b100, 0x24c00910, 0x02c440b1, 0x002c4008, + 0x1022ec00, 0x8300a040, 0x09140a0c, 0x08b1002c, 0x500b1002, 0xc400b910, + 0x20400811, 0x320401bb, 0x00224008, 0x1002c201, 0x00000000, 0x00000000, + 0xb80d61a0, 0x88683e00, 0x0f8003e0, 0x00c8003e, 0x000f8003, 0xe0a0f800, + 0x3e000f80, 0x21e100f8, 0x003e000d, 0x8001e000, 0xc801320a, 0x0d000320, + 0x00fa2836, 0x000f8003, 0xe000f840, 0x362a2c84, 0x0320a0f8, 0x003a000e, + 0x8003ce03, 0x50000000, 0x00000000, 0x980de480, 0xf9243e40, 0x0f9003e4, + 0x00f9003e, 0x400f9023, 0xe400f900, 0x3e500ed0, 0x03f480f9, 0x403c400f, + 0x9003f404, 0xf5001e40, 0x4e9003e5, 0x00f9003b, 0x400f9003, 0xe400fd20, + 0x3f408ff2, 0x2be400fd, 0x00bf400e, 0x9003e606, 0x70000000, 0x00000000, + 0x9805e400, 0xd9003e40, 0x0f9003e4, 0x00c9003e, 0x400f9011, 0xf408ed00, + 0x37400c90, 0x43f400ed, 0x28354009, 0xd003f400, 0xc5002340, 0x0f9003f4, + 0x80cd0033, 0x408f9003, 0xe400f900, 0x3f480c90, 0x03f400f9, 0x00b0404d, + 0x9002c600, 0x70000000, 0x00000000, 0x3800e000, 0x88002e00, 0x0b8002e0, + 0x20d8002e, 0x000b8002, 0xe001b800, 0x2e000c80, 0x02e00088, 0x0022000a, + 0x8022e000, 0xd8013600, 0x0b8202e0, 0x44a80022, 0x000b8002, 0xe000b820, + 0x22042880, 0x82e000b8, 0x00320008, 0x8002ce04, 0x30000000, 0x00000000, + 0x4815c400, 0x81802c40, 0x0b1002c4, 0x00810028, 0x400b1002, 0xc400a100, + 0x2c440810, 0x42e400a1, 0x0024400a, 0x1002e400, 0x81802040, 0x0b12a2c4, + 0x008100a0, 0x401b1002, 0xc400b128, 0x28400812, 0x02c440b9, 0x00224049, + 0x1006c201, 0x70000000, 0x00000000, 0x18158400, 0x89802e40, 0x0b9002c4, + 0x0099002e, 0x400b9002, 0xe441b900, 0x2e400894, 0x06e44089, 0x0022400a, + 0x9042ec00, 0x99002640, 0x1b9002e4, 0x00ab0022, 0x480b9002, 0xe400b900, + 0x22400891, 0x02e401b9, 0x40225808, 0x9002c604, 0x60000000, 0x00000000, + 0xa015e402, 0xc9023e40, 0x0f9002e4, 0x00c9003a, 0x400f9003, 0xe404e900, + 0x36402c9c, 0x02c624e9, 0x0034401e, 0x9001e720, 0xc1c03240, 0x0f9023e4, + 0x01c90032, 0x400f9003, 0xe400f900, 0x3a781c9c, 0x03e400f1, 0x4032500d, + 0x9003e804, 0x70000000, 0x00000000, 0xe801ac20, 0xe9003e40, 0x0f9003e4, + 0x00f9003e, 0x410f9013, 0xe400f908, 0x3e408e92, 0x03e400f1, 0x023e404f, + 0x9003e708, 0xf9913e40, 0x0f9003e4, 0x0071043e, 0x620f9003, 0xe408f920, + 0x3a682f90, 0x43e400fb, 0xa03a400f, 0x9003ea00, 0x60000000, 0x00000000, + 0x2810a042, 0xc8003a00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xa008e800, + 0x3c081f84, 0x03e110f8, 0x0032000f, 0x8003e160, 0xc8011a01, 0x0f8003c0, + 0x02c8003e, 0x040c8003, 0xe000f800, 0x3e100d84, 0x03e000f8, 0x003e000e, + 0x8003ca04, 0x20000000, 0x00000000, 0x28052b00, 0x8a002280, 0x0ba002e8, + 0x00ba002e, 0x800ba002, 0xfa20de80, 0x2f900ba0, 0x02fa00be, 0xc02ba608, + 0xe8039800, 0xde983784, 0x4ba002fa, 0x408ea32f, 0x8108a002, 0xe808ba00, + 0x2ca02aa0, 0x03ba00ba, 0x402c8008, 0xa002ca00, 0x40000000, 0x00000000, + 0x28054e02, 0x830028c0, 0x0b30028c, 0x00b3002c, 0xc00b3002, 0x8e00b300, + 0x2cd40930, 0x024c00b3, 0x3020d002, 0x38428f00, 0x838064d0, 0x0b3002c4, + 0x0083802c, 0xd0093012, 0xcc08bb00, 0x2c600930, 0x028e80b3, 0x482cc00a, + 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0x87b021c0, 0x0b7002dc, + 0x10b7002d, 0xc00b7002, 0xd400b440, 0x2d404b70, 0x12dc20b5, 0x0069c018, + 0x4090bc00, 0x97002550, 0x0b7012c4, 0x2097012f, 0xe0297002, 0xdc00b720, + 0x2c420a72, 0x029c20b7, 0x002fc108, 0x7002e800, 0x40000000, 0x00000000, + 0xa8000e04, 0xc38139e0, 0x4b78039e, 0x80f7803d, 0xe00f7803, 0x9a00f680, + 0x2de00b78, 0x025600f0, 0x8031e00f, 0x58039a14, 0xc78235e0, 0x0f7a03d6, + 0x10c6802d, 0xa00d7803, 0xde00f7a0, 0x3d600d7c, 0x039a00f7, 0x803de00e, + 0x7801ea02, 0x00000000, 0x00000000, 0x0815a500, 0xfb003ec0, 0x0fb003fd, + 0x40fb003e, 0xc00fb003, 0xe004c804, 0x3e400fb0, 0x21e400f8, 0x003ec00e, + 0x80438000, 0xfb003e40, 0x0ff503e4, 0x00ea013c, 0xc00eb003, 0xec00fb10, + 0x36400db0, 0x03ac00fa, 0x203ec00f, 0xb003c206, 0x60000000, 0x00000000, + 0x4005ff00, 0xcf803fe0, 0x0ff803ff, 0x00ff801f, 0xe00ff803, 0xfe01fd90, + 0x3fe40df8, 0x03be40fc, 0x803fe00d, 0xd203fe80, 0xbf9033e4, 0x0efd03b6, + 0x00ed903f, 0x600cf801, 0xfe00ff80, 0x3f600cf8, 0x03fe00e7, 0xc033e00f, + 0xf813c000, 0x70000000, 0x00000000, 0xa8119400, 0x87002dc0, 0x0b7002dc, + 0x40b7002d, 0xc00b7022, 0xd500b400, 0x3d400e70, 0x02d408b4, 0x002d100d, + 0x4003dc00, 0xb7302140, 0x0bf00219, 0x0087002f, 0xc8087002, 0xdc00b700, + 0x3d400d70, 0x82dc0087, 0x00a1c40b, 0x7002ea04, 0x60000000, 0x00000000, + 0x10009c00, 0xa7002dc0, 0x087002dc, 0x00b7002d, 0xc00b7002, 0xd0209400, + 0x2c010870, 0x02dc10b4, 0x002dc00a, 0x5102dc81, 0x95022501, 0x0b702694, + 0x40a4032d, 0xc0197002, 0xdc00b708, 0x2c440870, 0x02dc00bf, 0x0021c00b, + 0x7002c000, 0x20000000, 0x00000000, 0x6014c000, 0x83c02cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xc200b000, 0x28000a34, 0x82c760b0, 0x002c000b, + 0x00108400, 0xb050a400, 0x4b300288, 0x0080002c, 0xf8093002, 0xcc08b3c0, + 0x2c500938, 0x02cc0893, 0x2020ec0b, 0x3002c804, 0x30000000, 0x00000000, + 0x3815a802, 0xaf582ec0, 0x04b003fc, 0x00fb002e, 0xc00fb002, 0xe400b900, + 0x2e000cb0, 0x03e700f9, 0x003ec00a, 0x8000ee30, 0xdb503240, 0x0ef00384, + 0x01e2003e, 0x880db003, 0xec00f7d0, 0x3e542cf0, 0x23ec00f3, 0x2032c00f, + 0xb003ea04, 0x60000000, 0x00000000, 0x8000e000, 0xf3003ec0, 0x0fb003fc, + 0x00fb043e, 0xc00fb003, 0xe018f800, 0x3e500fb1, 0x03e000f8, 0x043ec009, + 0x8012e800, 0xf9003a10, 0x1ff00364, 0x01fa003e, 0x800eb003, 0xec00fb00, + 0x3a400eb0, 0x83ed00eb, 0x003ec00f, 0xb003e000, 0x30000000, 0x00000000, + 0x9010e900, 0xdf0033c0, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xb000fc00, + 0x7d000cf0, 0x03b400f4, 0x0033400d, 0xc003be04, 0xcf023f40, 0x0ff01362, + 0x80de0033, 0x800cf003, 0xfc00ff00, 0x35440cf0, 0x431c00cf, 0x003bc00f, + 0xf001c044, 0x30000000, 0x00000000, 0x80046120, 0x8b0022c0, 0x0bb002ec, + 0x009b002e, 0xc00bb002, 0xe200b8e0, 0x6e720ab0, 0x02e300e8, 0x8128700d, + 0x88238340, 0xd9802e32, 0x0bb00221, 0x008a80a0, 0x8028b002, 0xec08bb00, + 0x22400830, 0x022c8088, 0x0022c04b, 0xb002e040, 0x10000000, 0x00000000, + 0x80050800, 0x8b0022c0, 0x0bb002ec, 0x00bb002e, 0xc10bb042, 0xe600b882, + 0x6e2008b0, 0x06ee2128, 0xc022e00a, 0x8802a400, 0x9b800e60, 0x1b3002ec, + 0x00988022, 0x000ab002, 0xec00bb00, 0x26c008b0, 0x0264519b, 0x812ac00b, + 0xb002e000, 0x40000000, 0x00000000, 0x08040000, 0x830020c0, 0x0b3002cc, + 0x00b30024, 0xc00b3002, 0x4000b000, 0x2c400a30, 0x02c001a0, 0x00284001, + 0x0842c400, 0x91022c00, 0x0b304288, 0x00800020, 0xa0023002, 0xcc00bb00, + 0x20c028b0, 0x224c019b, 0x0020c00b, 0x3002c201, 0x00000000, 0x00000000, + 0x800d6802, 0xcb00b2c0, 0x0fb003fc, 0x00fb023e, 0xc003b003, 0xe000b800, + 0x2e0008b0, 0x03ac00e8, 0x0032401c, 0x8003a404, 0xd9003e00, 0x0ff003e8, + 0x08d80032, 0x8006b003, 0xec00fb00, 0x36c02cb0, 0x036c00db, 0x003ac00f, + 0xb023c003, 0x50000000, 0x00000000, 0xa01df000, 0xef003fc0, 0x0ff023fc, + 0x00df003f, 0xc00ff003, 0xf001fc00, 0x3f000ff0, 0x03f000ec, 0x003d400f, + 0xc047b400, 0xf4003f00, 0x0ff02378, 0x08fc013f, 0x800df003, 0xfc00ff00, + 0x3fc00ff0, 0x2b9c02ed, 0x003fc00f, 0xf003e806, 0x70000000, 0x00000000, + 0xc005f000, 0xfc002fd8, 0x8ef20b7c, 0x80ff2023, 0xe00ff003, 0x5208ec90, + 0x3f200fc8, 0x431210f4, 0x8037e08e, 0xc8073200, 0xcc803f20, 0x0fc803f2, + 0x00fc800f, 0x200fc807, 0xf000cc10, 0x33e40df9, 0x0b3b02df, 0x8033e00f, + 0xf803f000, 0x70000000, 0x00000000, 0xc010e000, 0xb8802fcc, 0x4876023f, + 0x40bf5820, 0xc20bfc02, 0x22088820, 0x2e210b88, 0x236208b8, 0x802ae10a, + 0x88022600, 0xab802ee0, 0x0bb842ee, 0x04bb816e, 0xe00bb842, 0xe244a810, + 0x22c008b0, 0x0228808b, 0x0036e00b, 0xb802f004, 0x30000000, 0x00000000, + 0xc805c800, 0xb2002cc0, 0x1a34820c, 0x09b32020, 0xc80b3426, 0xc0002002, + 0x2c000b90, 0x064001a0, 0x0022c009, 0x00020401, 0x83006cc0, 0x033022cc, + 0x0c930424, 0xc00b3006, 0xc0018000, 0xa0c85932, 0x02088093, 0x286cc00b, + 0x3002f201, 0x70000000, 0x00000000, 0xc011a810, 0xba8e2ec0, 0x08b012ac, + 0x00bb000a, 0xc00bb042, 0xa2082940, 0x2e601b92, 0x026601bb, 0x082ae02b, + 0x90822500, 0xab022ec3, 0x09b002e4, 0xb0b80c2e, 0x420bb202, 0xe4302b00, + 0x22c04838, 0x0228008b, 0x002ec08b, 0xb002f004, 0x60000000, 0x00000000, + 0x0015e480, 0xf9803ec0, 0x0eb0036c, 0x04fb0432, 0xc10fb003, 0xe320e8d0, + 0x3e200f20, 0x836320f0, 0x0520680f, 0x0d0a0d0c, 0xcb483ec0, 0x8fb083ee, + 0x00fb0026, 0xc40fbc82, 0xe344c8a0, 0x32c00db8, 0x0b2800db, 0x003ec00b, + 0xb003e004, 0x70000000, 0x00000000, 0xa001a800, 0xfd003ec0, 0x0ff0003c, + 0x20f70027, 0xc00b7023, 0x7000de80, 0x3f028fe0, 0x01f004be, 0x201b800c, + 0xf001f900, 0xff103fe8, 0x0fe103fe, 0x20ff403f, 0xc20fc013, 0xe800f6c0, + 0x3fc00ff0, 0x0bf800ff, 0x0017c00f, 0xf003e800, 0x60000000, 0x00000000, + 0xd010a510, 0xcb4038c0, 0x0eb003ac, 0x00fb0032, 0xc00eb003, 0x6000eb01, + 0x3a400eb4, 0x03e500d9, 0x4232400c, 0xa0032d00, 0xf84a3e00, 0x0f9482e9, + 0x00fbc03a, 0x800fb413, 0x4d00c900, 0x3ec00cb4, 0x0ba800eb, 0x003ac00f, + 0xb043f504, 0x20000000, 0x00000000, 0xc8052800, 0x8b8823c0, 0x28f00a3f, + 0x80ef0022, 0xc008f502, 0x0004db00, 0x227848b2, 0x02e6200b, 0x802a8008, + 0x90036e20, 0xbb402ee0, 0x0bbc00ed, 0x80bb042e, 0xd30bb522, 0xec608b20, + 0x2ec8089a, 0x022a208b, 0x5022c00b, 0xb002f200, 0x40000000, 0x00000000, + 0xe0054040, 0x826028c0, 0x09b0020e, 0x00930028, 0xc00a3002, 0x82048000, + 0x00200b34, 0x82c200a0, 0x1020c008, 0x00020e20, 0xb3002cc0, 0x0b3002cd, + 0x00b34828, 0xe00b3c02, 0x4200b021, 0x2ec02830, 0x0a2920ab, 0x402cc00b, + 0x3012f800, 0x50000000, 0x00000000, 0xf8011640, 0x878061e4, 0x4979021e, + 0x40a38129, 0xe00a3802, 0x32009d90, 0x01c00979, 0x02d6008d, 0x812be008, + 0x48125e40, 0xb4802d32, 0x8b5802da, 0x00b7822d, 0xa00b7822, 0xde45b580, + 0x2de008f8, 0x021a8087, 0x8025e00b, 0x7802fc00, 0x40000000, 0x00000000, + 0x48080849, 0xc31038c4, 0x0b31238c, 0x00f30038, 0xc00e3183, 0x8060c000, + 0xa8000f30, 0x03c800e2, 0x0030c04c, 0x10030800, 0xf3123cc0, 0x4f21c3cc, + 0x40f32038, 0xc04f01c3, 0x4842f200, 0x3ec00c36, 0x0ba800eb, 0x003cc40f, + 0x3003d202, 0x00000000, 0x00000000, 0x400dbc50, 0xf6113fc4, 0x0ef183fc, + 0x20df4337, 0xc00df007, 0xb008d500, 0x3dc00ef0, 0x03fc02ef, 0x012dc06f, + 0x5003fc00, 0xff003fc0, 0x0ff043fc, 0x00ff003f, 0xc00ff843, 0xfc40cf00, + 0x3fc00e70, 0x03f880ff, 0x003bc11f, 0xf003d006, 0x60000000, 0x00000000, + 0xa815e600, 0xca001ecc, 0x0cbe036e, 0x80cb1036, 0xc00fb603, 0x6004fb80, + 0x12400f30, 0x032400fb, 0x8032c00f, 0xb00b0602, 0xcb003ec0, 0x0fb001e4, + 0x00f8003e, 0x410fb001, 0xe4004b00, 0xb2c00ca0, 0x032800db, 0x8036c00f, + 0xb003ea00, 0x70000000, 0x00000000, 0xc8118c00, 0x870078c4, 0x0832821c, + 0xa08f0021, 0xc08b7702, 0xd000b500, 0x81c00b70, 0x109400e7, 0x0021c00b, + 0x70029400, 0x87002dc0, 0x0b7022dc, 0x00b7002d, 0xc00b7002, 0x4c008f04, + 0x29c00860, 0x0a380087, 0x0021c10b, 0x7002f024, 0x60000000, 0x00000000, + 0x80009700, 0x87802de8, 0x1970024e, 0x82978205, 0xe01b7802, 0x5a00bf80, + 0x05600bfc, 0x021e00b7, 0x0401e01b, 0x78225600, 0x87802de2, 0x0b7840de, + 0x00b7802d, 0xe01b78a6, 0xde1087c0, 0x21e00868, 0x021a0297, 0x8065e00b, + 0x7802e000, 0x20000000, 0x00000000, 0x4804ce00, 0x824828c0, 0x1830020c, + 0x009b0020, 0xc00b3002, 0xcf00b390, 0x20d20b38, 0x028d20a3, 0x4220cc13, + 0x3022d200, 0x84002500, 0x0b482252, 0xc0b4002d, 0x100b4002, 0x4e408300, + 0x2ac06827, 0x0a080083, 0x0020c00b, 0x3002d204, 0x30000000, 0x00000000, + 0xe801bb02, 0xce403e80, 0x2da00368, 0x00da0036, 0x810ba003, 0x78c0fe42, + 0x37800f68, 0x231800fe, 0xc033a00f, 0xef216920, 0xca403e90, 0x0fa003e9, + 0x00fa402e, 0x900fa803, 0xf802cec0, 0x32800c6c, 0x033802da, 0x0036800f, + 0xa003fa04, 0x60000000, 0x00000000, 0x48006000, 0xf8013a00, 0x1f8003e1, + 0x00e8003e, 0x000f8443, 0xe000f808, 0x3a110f84, 0x03e100e8, 0x10be008f, + 0x8003a000, 0xf85a3e02, 0x8f8303e1, 0x00f8323e, 0x120f8803, 0x6124f048, + 0x3e002f80, 0x03e000f8, 0x003e000f, 0x8003d200, 0x30000000, 0x00000000, + 0x0800e520, 0xf9013a40, 0x0e1043a6, 0x00f90032, 0x402c9803, 0xe480f900, + 0x3e60039a, 0x032400c9, 0x083a400e, 0x99032520, 0xf9403e40, 0x0f9907e6, + 0x00f9023e, 0x480f9c03, 0xc600c9a0, 0x32600c90, 0x1ba400c9, 0x203e400f, + 0x9003c204, 0x30000000, 0x00000000, 0x80046410, 0xb9922e40, 0x0c904224, + 0x00b90422, 0x40089506, 0xe610b900, 0x2e400b90, 0x036400f1, 0x40304008, + 0x1022a500, 0xb9c82e61, 0x0f9406e5, 0x00b9402e, 0x580b9012, 0xe650d980, + 0x36540894, 0x02060289, 0x402e400b, 0x9002e000, 0x10000000, 0x00000000, + 0x18152400, 0xb9002c40, 0x0a9002a4, 0x80b90020, 0x400890b2, 0xe401b900, + 0x2ec80b94, 0x02248089, 0x502a4028, 0x90423400, 0xbd002f44, 0x0bd082f5, + 0x40bdc02f, 0x404bd042, 0xe4008900, 0x22420890, 0xc2a44089, 0x402e400b, + 0x9002c600, 0x40000000, 0x00000000, 0x08040ca0, 0xb1ac2c50, 0x08140204, + 0x01b142a0, 0x50481002, 0xc410b142, 0x2cc10b10, 0x024c00a1, 0x00224008, + 0x90269400, 0xb5002d60, 0x0a5012d4, 0x10b5002d, 0x400b5002, 0xc4009310, + 0xa4440891, 0x022c4081, 0x102c400b, 0x1002c201, 0x00000000, 0x00000000, + 0xb80d6080, 0xf8203a01, 0x0e8003a8, 0x00f80022, 0x00088002, 0xe008f800, + 0x3e000f80, 0x03200888, 0x003a008e, 0xa0032810, 0xf8003e00, 0x0b8002e0, + 0x00f8003e, 0x010fe003, 0xe8a4c868, 0x30100c04, 0x03a100c0, 0x403e000f, + 0x8003ee03, 0x50000000, 0x00000000, 0x981df4a4, 0xfd003e50, 0x0e9403e5, + 0x00f9403e, 0x400f9403, 0xf400f500, 0x3f400fd0, 0x03f400b5, 0x003b400f, + 0x5003e400, 0xf9003e40, 0x0fb003ec, 0x00f9047e, 0x400fb003, 0xf400fd20, + 0x3e686fda, 0x13f680f9, 0x203e400f, 0x9003e606, 0x70000000, 0x00000000, + 0x9801f404, 0xfd013e4c, 0x8e9003f4, 0x00891006, 0x410ed293, 0xf400e900, + 0x71400f50, 0x03d410cd, 0x0032400e, 0x50033400, 0xf9003e40, 0x0f9003e4, + 0x00f9023e, 0xc00f9003, 0xe480bd28, 0x32440d90, 0x0b6402cd, 0x1072400f, + 0x9003e600, 0x70000000, 0x00000000, 0x3810c000, 0xb8002e0c, 0x0884c2e0, + 0x00d0102a, 0x0a8b8002, 0x2000e00a, 0x22000b80, 0x02e000a8, 0x0236018a, + 0x800a2000, 0xb8003e00, 0x8e8002e0, 0x10b8002e, 0x000b8002, 0xf008b020, + 0x22090880, 0xc2302080, 0x00a2000b, 0x8002de04, 0x30000000, 0x00000000, + 0x4805c400, 0xb1002c48, 0x5b1342c4, 0x49910028, 0x480b1002, 0x8400a122, + 0x20408b10, 0x02e40081, 0x8022400a, 0x90024400, 0xb5002d40, 0x1b500254, + 0x00b5002d, 0x400b5012, 0xd44db128, 0xa1480952, 0x02541081, 0x0060400b, + 0x1002d201, 0x70000000, 0x00000000, 0x1811a440, 0xb9006c40, 0x099002e4, + 0x0091002a, 0x401b9002, 0x24282901, 0x22410b90, 0x02e420a9, 0x8026408a, + 0x91066c10, 0xbd0c2fc8, 0x8ad112f4, 0x10bd0c2f, 0xc203d822, 0xfc01b140, + 0x22400852, 0x0a340081, 0x0022400b, 0x9002c604, 0x60000000, 0x00000000, + 0xa011e400, 0xf9c83e40, 0x4f9003c4, 0x00d90032, 0x400f9003, 0xa500e9e0, + 0x22584f96, 0x02c440c1, 0xc432401a, 0x98836428, 0xf9d01e52, 0x0f9c0367, + 0x08f9c23e, 0x540f9003, 0xe4c0f900, 0x32402d90, 0x0b6402c9, 0x0022400f, + 0x9003e804, 0x70000000, 0x00000000, 0xe801a420, 0xf9c03e40, 0x0e9003e4, + 0x08f9003a, 0x400f9003, 0xa480f9a0, 0xbe400f90, 0x03e604f9, 0x003e400f, + 0x9803a400, 0xf9083a42, 0xce9812e5, 0x00f9903e, 0x600f9003, 0xe420f998, + 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003fa00, 0x60000000, 0x00000000, + 0x2810a000, 0xc8403600, 0x0e800360, 0x00e80032, 0x018d0203, 0x2040c800, + 0x1a180e85, 0x03a000c8, 0x0032000f, 0x84036100, 0xf8003e00, 0x0f8403e1, + 0x28f8803e, 0x080f8403, 0xe008f810, 0x32020c80, 0x03f002c8, 0x013e000f, + 0x8003ca04, 0x20000000, 0x00000000, 0x28053920, 0x8edc2280, 0x08a01339, + 0x80ca003e, 0x8020e402, 0x2a00ba04, 0x63a000e8, 0x123800ae, 0x8028800b, + 0x60033960, 0xba002ea2, 0x0ba046e8, 0x00baa02e, 0xa88ba1a2, 0xeb00ee00, + 0x36b008ad, 0x832a208e, 0x0032800b, 0xa002ca00, 0x40000000, 0x00000000, + 0x28054f00, 0x93c064c0, 0x0b30020d, 0x80b3002c, 0xc0083002, 0x0e00bb00, + 0x28e00a32, 0x068c2083, 0x0020c01b, 0x30024f00, 0xb4012d00, 0x5b4312d0, + 0x00b4006d, 0x200b4402, 0xd100b380, 0x22c43830, 0x0aac0083, 0x0028c043, + 0x3002ca00, 0x50000000, 0x00000000, 0xa0011600, 0x9f8025c4, 0x197a020c, + 0x0987102d, 0xe4084082, 0x1c00b710, 0x23a20a78, 0x061c00a7, 0x4009c00b, + 0x70021c00, 0xb5002dc0, 0x0b7012dd, 0x04b7002d, 0xc00b7002, 0xdd00a700, + 0x254088d0, 0x021c0087, 0x4025c00b, 0x7002e800, 0x40000000, 0x00000000, + 0xa8081e00, 0xd78037e8, 0x4ffb031e, 0x00f7b03f, 0xea0c4003, 0x1e006788, + 0x29600e78, 0x039e10c7, 0x8031e00f, 0x78035e00, 0xf7803de0, 0x0b7802de, + 0x08f7802d, 0xe00f7802, 0xde00f781, 0x33a10c68, 0x03b200c7, 0x8039e00f, + 0x7803ea02, 0x00000000, 0x00000000, 0x081dac02, 0xe2007ad2, 0x06b00bac, + 0x04eb003e, 0xc00e0003, 0xec00fb20, 0x1e800d90, 0x03ac08f3, 0x043ec00f, + 0xb043a800, 0xfa003ec0, 0x0f8003e4, 0x04fb003e, 0xc10fb003, 0xec00fb00, + 0x3e800f00, 0x03a000fa, 0x003ac00f, 0xb003c206, 0x60000000, 0x00000000, + 0x4005fa00, 0xcf8233e0, 0x2df8835e, 0x08ff823b, 0xe00fc803, 0xbe00ff81, + 0x27200c78, 0x033e00e7, 0x80b3e00c, 0xf0037e00, 0xed803fe0, 0x0ff920fe, + 0x40ff903f, 0xe00ff842, 0xfe44ff84, 0x2fe40cf8, 0x03be00dd, 0x803fe08f, + 0xf803d000, 0x70000000, 0x00000000, 0xa811b008, 0x854021c0, 0x0c700210, + 0x00df2001, 0xc80e4023, 0x5c00e700, 0x31080866, 0x029c4087, 0x2035c04f, + 0x72879450, 0x85002d02, 0x0f7402d8, 0x00b5182d, 0x060b4002, 0xdc40b700, + 0x2f4c2870, 0x0bfc0285, 0x002dc08b, 0x7022ea04, 0x60000000, 0x00000000, + 0x10009420, 0x971021c0, 0x0870021c, 0x00870129, 0xc01b4002, 0x9400a710, + 0xa10109f0, 0x221c00a7, 0x0867c008, 0x71063c00, 0xb7002dc4, 0x0b7006dc, + 0x00b6002d, 0xc00b7002, 0xd200b408, 0x2d8008f0, 0x029a0097, 0x002dc00b, + 0x7002c400, 0x20000000, 0x00000000, 0x6014c420, 0x900022c0, 0x58300200, + 0x00930022, 0xc00a0002, 0x4480abe0, 0x20000100, 0x068d0083, 0x4264e20b, + 0x38028005, 0x93802cd0, 0x0b3006ce, 0xc0b3002c, 0xd00b3002, 0xcc40b080, + 0x2e0008b8, 0x0ac8008a, 0x002cc00b, 0x3002d804, 0x30000000, 0x00000000, + 0x28152e02, 0xdb42a3c1, 0x0cf00b2c, 0x00ef003b, 0xc00f8003, 0xad00ef82, + 0x22f02db0, 0x030d01e2, 0x9024f24c, 0xb0032c00, 0xfb213ef0, 0x0fbc12ec, + 0x10fb803e, 0xe00fb103, 0xef00fbd0, 0x2ec00cba, 0x028c00da, 0x003ec00f, + 0xb003ce04, 0x60000000, 0x00000000, 0x9000e400, 0xeb613ec0, 0x0e30038c, + 0x00f3003e, 0xc00e8403, 0xac00eb10, 0x3e970eb0, 0x03ed22fa, 0x003ec00f, + 0xb203ad00, 0xeb023ed8, 0x0eb193ed, 0x00fa053e, 0xd20fbc03, 0xe080f840, + 0x3e500f94, 0x2bec00fb, 0x403ec00f, 0xb003e000, 0x30000000, 0x00000000, + 0x8010f800, 0xf90036c0, 0x4cf00330, 0x80df0033, 0xc00d8003, 0xfc00df00, + 0x33841fe2, 0x03fc00fd, 0x0033c08c, 0xc00326a0, 0xfd083b28, 0x0ff043f8, + 0x00fd183f, 0x000fc003, 0xfe90f700, 0x33c02ce8, 0x0b7280dc, 0x0033c005, + 0xf003e004, 0x30000000, 0x00000000, 0x90006800, 0x304422c0, 0x0ab003e0, + 0x00ab0022, 0xc00d8a12, 0xe4009b01, 0x36000b84, 0x0266008b, 0xc03ec00a, + 0x08826108, 0xf94022c0, 0x0bb407ed, 0x00bb002e, 0xc00bbc02, 0xec00b8c0, + 0x36d0088c, 0x1a220288, 0x9022c00b, 0xb002e400, 0x10000000, 0x00000000, + 0x80052800, 0xba202ec0, 0x08b0066c, 0x008b002a, 0xc1088802, 0xec80bb00, + 0x22100b90, 0x026b009a, 0x8922c008, 0xb802e80c, 0xb2522ac1, 0x0b8812e6, + 0x20bb022e, 0xc40bb612, 0xec089b28, 0x22c208b6, 0x022c1088, 0x4022c009, + 0xb002e000, 0x40000000, 0x00000000, 0x08040215, 0xb00028c0, 0x0a300282, + 0x00a30028, 0xc1090002, 0xcc109300, 0x64001b00, 0x0248008a, 0x020ac02a, + 0x30264010, 0xbb0020c0, 0x8b30028c, 0x00b3802c, 0xc00b3022, 0xcc00b000, + 0x24400810, 0x022c0081, 0x0020c00b, 0x3002c201, 0x00000000, 0x00000000, + 0x800d6000, 0xb8003fc0, 0x0c700260, 0x00cf003b, 0xc00c8002, 0xec04d700, + 0x72008380, 0x036c00db, 0x0122c00c, 0x8003a000, 0xf9043ac0, 0x0fb002ec, + 0x00fb003e, 0xc007b003, 0xec00d800, 0x32804ca0, 0x072000c8, 0x00b2c00d, + 0xb003e003, 0x50000000, 0x00000000, 0xa01df000, 0xfc0037c0, 0x0ff003f0, + 0x00ef00b7, 0xc10fc003, 0xf4007f00, 0xb9000fc0, 0x025400bf, 0x003dc00f, + 0x400bb000, 0xec003f00, 0x4fc003f0, 0x00fc043f, 0x000fc003, 0xf000fc00, + 0x7f000f40, 0x03b000ec, 0x003fc00f, 0xf003e806, 0x70000000, 0x00000000, + 0xc005fc00, 0xff1033e0, 0x0ff8037e, 0x00ff803f, 0xe00ff803, 0xfca0ff84, + 0x3fc00e78, 0x03d600cf, 0x803fe00e, 0x5c03fe00, 0xfc803fc0, 0x0ff0433e, + 0x00c5803b, 0x200cf803, 0x7c80ff90, 0x3bc80dfc, 0x033e00cf, 0x4033e00f, + 0xf803f001, 0x70000000, 0x00000000, 0xc010cd48, 0xbf4022e0, 0x0eb802ee, + 0x00bb802e, 0xe00bb802, 0xef00ab84, 0x0fe40bb8, 0x02e600ab, 0x8026e00b, + 0x9003ee04, 0xe8802ff0, 0x0bf902ae, 0x00a98020, 0x8808b802, 0x05b08b20, + 0x226408b0, 0x0224208b, 0x5022e00b, 0xb802e004, 0x20000000, 0x00000000, + 0xc800cc08, 0xa36220c0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xc4008302, + 0x2cc10a30, 0x02a400b1, 0x002cc08a, 0x9202cc00, 0xb0002cc4, 0x0b30020c, + 0x008a006a, 0x0a28b002, 0x4050b320, 0x28c00bb2, 0x0a2c8083, 0x202cc00b, + 0x3002c201, 0x30000000, 0x00000000, 0xc015ac00, 0xb30022c0, 0x0ab002ec, + 0x00bb002e, 0xc00bb052, 0xe400ab04, 0x2ec01bb0, 0x02ee01b9, 0x002ec01b, + 0xbc12ec00, 0xbb082ec1, 0x0bb002ac, 0x01ab1062, 0xb008bc0a, 0x0a020b00, + 0x2a440ab0, 0x002c628b, 0x002ec00b, 0xb002f004, 0x60000000, 0x00000000, + 0x0011ec00, 0xeb0032c0, 0x0fb003ec, 0x00fb003e, 0xc047b023, 0xe800cb04, + 0x3ec04eb0, 0x03a300fb, 0x023ec00e, 0x9c13ec10, 0xf8803ec0, 0x9fb0030c, + 0x00cb4838, 0x214c8813, 0x6690fbd8, 0x3ae00f34, 0x030e00cb, 0x003ec00f, + 0xb003c004, 0x70000000, 0x00000000, 0xb001bc00, 0xff003bc0, 0x0ef003fc, + 0x00ff003f, 0xc00bf003, 0xf9087f00, 0x3fc00ff0, 0x03f000ef, 0x0077c00f, + 0xd003fc00, 0x6da83fc2, 0x0f7003fc, 0x00ff003f, 0x800fc003, 0xfc12ff00, + 0x34600df0, 0x43fc00f7, 0x00b3c00f, 0xf003f800, 0x60000000, 0x00000000, + 0xc010ac00, 0xeb00b6c0, 0x0db003ec, 0x00fb003e, 0xc00cb003, 0xac00db00, + 0x3fc00fb1, 0x836c00fb, 0x0036c10f, 0xb003ac04, 0xfa0032c0, 0x0cf0032c, + 0x00fb0036, 0x400cb403, 0xe200fb00, 0x32c03c90, 0x03ed00cb, 0x003ac00f, + 0xb003f004, 0x20000000, 0x00000000, 0xd8053d20, 0x8f0022c0, 0x0bb003ec, + 0x00bb002e, 0xc00eb002, 0xcf048b02, 0x37c00abc, 0x074c008b, 0x002ec10b, + 0x30036c00, 0xbb4037d2, 0x08f0036d, 0x40b3a036, 0x80083002, 0xeb008b00, + 0x02c008b0, 0x02ec008f, 0x0022c00b, 0xb002f200, 0x40000000, 0x00000000, + 0xe0054f80, 0xa30120c0, 0x1b3002cc, 0x00b3002c, 0xc00a3002, 0xcd209300, + 0x2cc00830, 0x020400a3, 0x002cc00b, 0x00020c00, 0xb00020d0, 0x0330020e, + 0x00b12020, 0x00083002, 0xc800b900, 0x20c04820, 0x024800a3, 0x0020c009, + 0x3002f800, 0x50000000, 0x00000000, 0xf0011e10, 0x839021e0, 0x0b78069e, + 0x00b7802d, 0xe00a7822, 0xce008784, 0x28e00a79, 0x027e1097, 0x802de00b, + 0xea021e00, 0xb68025c0, 0x0b38025e, 0x00bf8225, 0xb0087802, 0xd300af80, + 0xa1700878, 0x06fe02a7, 0x8021e00b, 0x7800d800, 0x40000000, 0x00000000, + 0x48080c40, 0xa31030c0, 0x0f3002cc, 0x00f3002c, 0xc00e3003, 0x8460d310, + 0x2cc00e30, 0x020400f1, 0x042cc40f, 0x10028c00, 0xf12370c4, 0x8f30530c, + 0x20f30030, 0x040c3003, 0xc880f300, 0x30c00834, 0x03cc00eb, 0x2038c80f, + 0x3003d202, 0x00000000, 0x00000000, 0x400dbc00, 0xff103bc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff003, 0xfc00ff00, 0x17c21af0, 0x03fc00cd, 0x003fc40f, + 0xf203fc40, 0xf7001dd8, 0x1cf083fc, 0x00ff003f, 0x800ff003, 0xf800d700, + 0x3f400ff0, 0x03dc00df, 0x083fc00f, 0xf003d006, 0x60000000, 0x00000000, + 0xa805ec10, 0xfb2232c0, 0x0fb003ec, 0x00fb003e, 0xc00eb003, 0xe880fb00, + 0x3fe88c30, 0x038e00cb, 0x000ac00f, 0xb003ac00, 0xfb003ed4, 0x0ff483ac, + 0x00f38036, 0x008fb003, 0xe802fb00, 0x3ec02db0, 0x03ec00fb, 0x003ec00f, + 0xb003ea04, 0x70000000, 0x00000000, 0xc8111c80, 0xb74a21c0, 0x0b7002dc, + 0x00b7002d, 0xc00b7016, 0xd844b700, 0x3dc28d70, 0x021c0297, 0x002dc0cb, + 0xf0035c00, 0xf7002dc8, 0x0b7202dc, 0x00b70021, 0x80cb7002, 0xd800d600, + 0x2dc00870, 0x02dc00b7, 0x202dc00b, 0x7002f204, 0x60000000, 0x00000000, + 0x80009ec0, 0xb3a021e0, 0x0b78029e, 0x00b7802d, 0xe00b7802, 0xd611b780, + 0x2ce80978, 0x02bc0097, 0x802de08b, 0x7c421e00, 0xb7882de0, 0x1b7802de, + 0x00b78021, 0xa00b7c02, 0xca00b780, 0x2ce0085c, 0x02de00b7, 0xa02de00b, + 0x7802f040, 0x20000000, 0x00000000, 0x4814cc00, 0xb30020c0, 0x0b3002cc, + 0x00b3002c, 0xc00b3022, 0xcf40b300, 0x28c00930, 0x060f0093, 0x002cc05b, + 0x3a024c00, 0x23002cc0, 0x0b3006cc, 0x00b38020, 0xf00b3002, 0xca029370, + 0x2cc008bc, 0x22ef10b3, 0x002cc00b, 0x3002d200, 0x30000000, 0x00000000, + 0xe815a800, 0xfa00b280, 0x0fa003e8, 0x00fa003e, 0x800ea003, 0xe900fa00, + 0x2e800da0, 0x039800ca, 0xa03e800f, 0x68032800, 0xbe103e80, 0xcfa007a8, + 0x10be2033, 0xb80bec02, 0xd882fec0, 0x3ea80ce1, 0x03fa84fa, 0x043e800b, + 0xa003fa00, 0x60000000, 0x00000000, 0x4800e000, 0xf0003e00, 0x0f8003e0, + 0x00f8003e, 0x000f8003, 0xe080f800, 0x3e000f84, 0x03a060e8, 0x003e001f, + 0x8003e001, 0x78003e10, 0x0f8003e1, 0x00f841ba, 0x084f80c3, 0xe00af800, + 0x3e000e80, 0x03e020f8, 0x007e000f, 0x8003d200, 0x30000000, 0x00000000, + 0x0810e400, 0xe9001240, 0x0f9003a4, 0x00f9003e, 0x400f9003, 0xec00f900, + 0x3e400f94, 0x032400e9, 0x003e40cd, 0x902b2404, 0xe900b260, 0x0b100324, + 0x00f9883e, 0x400f9003, 0x6400d900, 0x3c480d90, 0x002402c9, 0x013e400f, + 0x9003c200, 0x30000000, 0x00000000, 0x80046540, 0x89002240, 0x0b9002e4, + 0x00b9002e, 0x400e9002, 0xe420b900, 0x2e400b10, 0x83640289, 0x002e418b, + 0x9032a404, 0xb1402258, 0x0b9002a5, 0x00b9802e, 0x400b1002, 0x2500f900, + 0x2e600890, 0x12240089, 0x042e400b, 0x9002e000, 0x10000000, 0x00000000, + 0x18050500, 0xa9002a40, 0x0a9002e4, 0x00a9002e, 0x400b9002, 0xa441a900, + 0x2a401a90, 0x022c0089, 0x002a4009, 0x90022400, 0xb9082249, 0x0b900224, + 0x00b9202e, 0x400b9002, 0x65009900, 0x2e400990, 0x0aa40089, 0x002e400b, + 0x9002c604, 0x40000000, 0x00000000, 0x08040440, 0x8110a840, 0x0b1002c4, + 0x00b1002c, 0x40081042, 0xc400b100, 0x2c400b10, 0x02640181, 0x006c400b, + 0x94428404, 0xb1002040, 0x0b102684, 0x00b1026c, 0x440b9002, 0x2442b110, + 0x2c600811, 0x06844081, 0x106c400b, 0x1002c201, 0x00000000, 0x00000000, + 0xb80d61a0, 0xa868ba00, 0x0e8003a0, 0x00e8002e, 0x000f8003, 0xa0a0f800, + 0x3e000f80, 0x032000e8, 0x003e000d, 0x80232000, 0xf8013200, 0x0b800328, + 0x00fa003e, 0x100f8007, 0x61a0d840, 0x3e2a0d84, 0x03a100c8, 0x683e000f, + 0x8003ee03, 0x50000000, 0x00000000, 0x981de480, 0xf9203640, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e500f90, 0x03f400fd, 0x003e400f, + 0xd003e410, 0xfd003e50, 0x0f9403e4, 0x00ff003f, 0x480fd003, 0xf480fd20, + 0x3f400fd2, 0x037484f9, 0x203e400f, 0x9003e606, 0x70000000, 0x00000000, + 0x9805e400, 0xc9003240, 0x0f9003e4, 0x00d9003e, 0x400e9001, 0xf400f904, + 0x3e400ed0, 0x13e400c9, 0x003e400f, 0x90032400, 0xd5003f48, 0x0e9283f4, + 0x00fd003f, 0x400c9007, 0x3482f900, 0x3f490c90, 0x03e400d9, 0x103e400f, + 0x9003e600, 0x70000000, 0x00000000, 0x3800c002, 0x88002200, 0x0b8002e0, + 0x00b8002e, 0x000b8002, 0xe000b800, 0x2e000880, 0x02e01288, 0x042e008b, + 0x80862001, 0xf8002e00, 0x0a8003e0, 0x00b8002e, 0x800a8002, 0x20a28a20, + 0x2e0428a0, 0x82e020b8, 0x102e000b, 0x8002ce04, 0x30000000, 0x00000000, + 0x4815c400, 0x81002040, 0x0b1002c4, 0x00b10024, 0x400a1002, 0xc401b100, + 0x2c440b10, 0x02e404a1, 0x006c400b, 0x12024400, 0xb1002c44, 0x081002c4, + 0x04b1022c, 0x40289002, 0x04c8b128, 0x2c400812, 0x02c400b1, 0x022c400b, + 0x1002c201, 0x70000000, 0x00000000, 0x1815ac00, 0x89002240, 0x0b9002e4, + 0x00b9002e, 0x401b9002, 0xe420b900, 0x2e400a90, 0x02e42189, 0x016e400b, + 0x91966400, 0xa9002e40, 0x8a9026a4, 0x08b9002e, 0x400a908a, 0x24aa8920, + 0x2e400892, 0x00e400b9, 0x012e404b, 0x9000c604, 0x60000000, 0x00000000, + 0xa015e400, 0xc900b240, 0x0f9003e4, 0x00b90036, 0x400e9013, 0xe744f901, + 0x3e400f90, 0x03e400e9, 0x102e400f, 0x980a6408, 0xb9602e40, 0x0e9024e4, + 0x04f9801c, 0x400c9c02, 0x2402f940, 0x3c400c98, 0x01e48099, 0x002e408f, + 0x9003e804, 0x70000000, 0x00000000, 0xe8018c00, 0xf1003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xe408f900, 0x3c400d90, 0x03e480f9, 0x813e400f, + 0x9803a400, 0xf9903c40, 0x0f9047e4, 0x00f9907e, 0x642f9403, 0xe600f900, + 0x3e680f98, 0x23e680f9, 0x003e400f, 0x9003ea00, 0x60000000, 0x00000000, + 0x2810a080, 0xc8003200, 0x0f8003e0, 0x00e8003e, 0x000f8007, 0xe084f802, + 0x3e000880, 0x03e004c8, 0x02320007, 0x8043e000, 0x78083607, 0x8c8013e0, + 0x1078147e, 0x180e8413, 0x6080d840, 0x3e000e84, 0x036000f8, 0x003e004f, + 0x8001ca04, 0x20000000, 0x00000000, 0x28012820, 0x8a002280, 0x0ea002e8, + 0x00ba002e, 0x800ba002, 0xf800ba00, 0x2e8000e8, 0x22c800aa, 0x003a800b, + 0xa003a800, 0x9e082380, 0x08a002fa, 0x80be942f, 0xa0082002, 0x3800da00, + 0x0f8048a0, 0x07280cba, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000, + 0x28054d00, 0x8300a0c0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc40b300, + 0x2cc02839, 0x02cc0093, 0x0020c00b, 0xb0028c00, 0xb38480d0, 0x08300244, + 0x80b3426c, 0xe00a3002, 0x66029300, 0x2cc41a30, 0x068c08b3, 0x002cc00b, + 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0x871021c0, 0x0a7002dc, + 0x00b7002d, 0xc00b7006, 0xdc00b700, 0x2dc00870, 0x00fc00b7, 0x0029c00b, + 0x70029c00, 0xbf802040, 0x087002d4, 0x00b4002d, 0xc208f002, 0x05009720, + 0x2cc098f8, 0x0e9c80b7, 0x002dc00b, 0x7002e800, 0x40000000, 0x00000000, + 0xa8001e02, 0xcf8031e0, 0x0f7803de, 0x00f7803d, 0xe00f7802, 0xde00f780, + 0x2ce00478, 0x23de00d7, 0x8071e00f, 0x7f439e01, 0xf78031e0, 0x08780356, + 0x10f4842d, 0xe00e7803, 0x5202d7a0, 0x3de10e78, 0x039e80f7, 0xc03de00f, + 0x7803e802, 0x00000000, 0x00000000, 0x0815ac80, 0xfb403ec0, 0x0fb003ec, + 0x00fb003e, 0xc00fb003, 0xe408fb04, 0x3ec00fb0, 0x03cc00eb, 0x003ec00f, + 0xf021ac00, 0xdb003a40, 0x2fb001e4, 0x00f8003c, 0xc04f3003, 0xe000fb10, + 0x3e800f31, 0x032c00fb, 0x003ec00f, 0xb003c206, 0x60000000, 0x00000000, + 0x4005fb00, 0xcfc033e0, 0x0ff803fe, 0x00ef803f, 0xe00ff803, 0xf640ff90, + 0x3fe00ff8, 0x23de00ef, 0x8033e00f, 0xf1037e40, 0xbf903fe0, 0x0df913f6, + 0x40fc903f, 0xe40cf803, 0xfa02bf90, 0x33e40ef8, 0x03fe20ff, 0x803fe00f, + 0xf803f004, 0x70000000, 0x00000000, 0xa8119802, 0x8f0021c0, 0x0b7002dc, + 0x00b7002d, 0xc00f7003, 0xd040b700, 0x2dc00b70, 0x02dc02c7, 0x0021c00b, + 0x70071c00, 0xb6702d48, 0x0a704390, 0x40b6103d, 0x8c087203, 0x9020d700, + 0x21cc0870, 0x02dc20b7, 0x002dc00b, 0x70026a04, 0x60000000, 0x00000000, + 0x10009800, 0x870021c0, 0x0b7002dc, 0x00a7002d, 0xc00b7002, 0xd441b700, + 0x6dc00b50, 0x02fc209f, 0x0021c00b, 0x71061c10, 0xb7002c00, 0x1a7032d4, + 0x10b5112d, 0xc2487006, 0xdc02bf01, 0x21c00a70, 0x02dc00b7, 0x002dc00b, + 0x7002c600, 0x20000000, 0x00000000, 0x6814c800, 0x830020c0, 0x0b3002cc, + 0x00b3002c, 0xc0023002, 0x8000b300, 0x2cc00b10, 0x12cc0083, 0x0020c00b, + 0x30220c00, 0xb2002c00, 0x0a300280, 0x00b0402c, 0xb8083002, 0xa60893d0, + 0x20800835, 0x22ce00b3, 0x002cc00b, 0x3002d800, 0x30000000, 0x00000000, + 0x2015ac00, 0xcf00a2c0, 0x0bb003ec, 0x00eb003e, 0xc00bb002, 0xe600fb00, + 0x2ec00fb0, 0x00cc00db, 0x0022c003, 0xfa032c00, 0xb3993e40, 0x0ab003c4, + 0x0038802c, 0x702c3003, 0xee02ff00, 0xb0c00efc, 0x02fd40ff, 0x003ec00f, + 0xb002da00, 0x60000000, 0x00000000, 0x8000e400, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0xc00fb003, 0xe545fb02, 0x3ec00f94, 0x53ec009b, 0x003ec00f, + 0xf003ac00, 0xfb453e10, 0x023003ec, 0x00f9503a, 0x400fb003, 0xec00eb20, + 0x3ec40fb0, 0x03ec00fb, 0x003ec00f, 0xb0036400, 0x30000000, 0x00000000, + 0x8010e440, 0xef00b3c0, 0x0ff003fc, 0x00ff003f, 0xc00ff007, 0xb00cef00, + 0x3bc18ff0, 0x03fc00cf, 0x043fc00f, 0xf0037c00, 0xfec03140, 0x0df04332, + 0x00dc083f, 0x600cf003, 0xbc40ff02, 0x3ec00cf0, 0x82fc00ff, 0x002fc00f, + 0xf003e000, 0x30000000, 0x00000000, 0x80046100, 0x8b0022c0, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0xe210bb00, 0x2ec04b8e, 0x06ec0c8b, 0x012ec00b, + 0xb0022c00, 0xba813620, 0x08b002aa, 0x0488a02e, 0x400db002, 0x29008b00, + 0x2ef00ab0, 0x02ec00bb, 0x002ec00b, 0xb002e040, 0x10000000, 0x00000000, + 0x80050000, 0xb30026c0, 0x0ab002ec, 0x00bb002e, 0xc00bb002, 0xe700bb00, + 0x2ec05bb8, 0x06ec009b, 0x002ac00b, 0x30026c01, 0xb9002263, 0x09b0022d, + 0x8018802e, 0xc808b002, 0xad02bb00, 0x2ef008b0, 0x06ec00bb, 0x002ec00b, + 0xb002e004, 0x40000000, 0x00000000, 0x08040002, 0x930020c0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xc000b301, 0x2cc00b10, 0x06ec0293, 0x002cc00b, + 0x30020c10, 0xb8002400, 0x08300288, 0x0080002c, 0x8009b002, 0x08028300, + 0x2cc00a30, 0x26cc00b3, 0x002cc00b, 0x3022c201, 0x00000000, 0x00000000, + 0x800d6000, 0xff0036c0, 0x0eb003ec, 0x00fb003e, 0xc00fb047, 0xe000eb00, + 0x3ec00f90, 0x06ec02db, 0x007ac01f, 0x70036c00, 0xb8003200, 0x0db00328, + 0x00d8007e, 0xc00cb023, 0x8c00fb00, 0x3e400cb0, 0x03ec00fb, 0x003ec00f, + 0xb003e003, 0x50000000, 0x00000000, 0xa01df000, 0xef003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff007, 0xf014ff00, 0x3fc00fc0, 0x03fc10e7, 0x007fc00f, + 0xf002bc01, 0xfc003f00, 0x1ff003f8, 0x00fd0075, 0x800ff003, 0xfc12e700, + 0x3f400ff0, 0x03fc00bf, 0x003fc00f, 0xf003e806, 0x70000000, 0x00000000, + 0xc001f001, 0xff203fcc, 0x8cfc333c, 0x80d48437, 0x200ecc03, 0xdc02cc82, + 0x3f210df8, 0x43f200df, 0x803be00f, 0xf8023600, 0xf780370c, 0x0cc20210, + 0x208c3033, 0x0088d203, 0x70044f80, 0x2fe00cf8, 0x037e00cf, 0x8037e00f, + 0xf803f000, 0x70000000, 0x00000000, 0xe010c400, 0xbf502fcc, 0x0db0123e, + 0x50b9802e, 0x20088002, 0xff008880, 0x2e2088b8, 0x52e200bb, 0x8122e00b, + 0xb822a600, 0xbb800a0c, 0x08869223, 0x08a8712a, 0x120a9192, 0xa3028b08, + 0x24c02832, 0x12cc80ab, 0x8022e00b, 0xb802e006, 0x30000000, 0x00000000, + 0xc805c808, 0xb3002cc0, 0x083212cc, 0x0090012e, 0x000a0202, 0xcd00a000, + 0x2c000b30, 0x02c0019b, 0x0028c00a, 0x30000400, 0xb3002400, 0x68040600, + 0x00800020, 0x1908120a, 0x00408320, 0x6cca2830, 0x82cc2083, 0x0024c00b, + 0x3002c201, 0x70000000, 0x00000000, 0xe015ac00, 0xbb022ec0, 0x293002ec, + 0x00b9882e, 0xc008b0e2, 0xec000884, 0x2e600ab0, 0x02e210bb, 0x8822c009, + 0xb000ac08, 0x9b0620c0, 0x08104a24, 0x00a9042a, 0xc29a9802, 0xac808b00, + 0x24c108b0, 0x02cc10ab, 0x0026c00b, 0xb002f000, 0x60000000, 0x00000000, + 0x8415e000, 0xbb003ec0, 0x0cb003ec, 0x00d9c03c, 0x320e8c03, 0xec00a880, + 0x1e200fb0, 0x00e284d9, 0xc03ac00e, 0xb0032600, 0x73003622, 0x0c850321, + 0x50c8c432, 0x100c9c03, 0x0280cb00, 0x7ec00cb0, 0x036c00cb, 0x0036c007, + 0xb003c004, 0x70000000, 0x00000000, 0xa001b800, 0xfb003ec0, 0x0ff0032c, + 0x08fd002f, 0xa40fc401, 0xfc107c08, 0x1f400df0, 0x02f024ff, 0x012fc10f, + 0xf003fe68, 0xff043f49, 0x0fe043f8, 0x00fe903d, 0x090f7053, 0xea08ff00, + 0x37c04ff0, 0x13fc00ff, 0x003bc00f, 0xf003e800, 0x60000000, 0x00000000, + 0xd010a400, 0xcb0c30c0, 0x0cb003ec, 0x20c86032, 0x400cb403, 0x2c44e840, + 0x3a180fb0, 0x036100fb, 0x4232c01f, 0xb007e440, 0xeb897288, 0x44b5032c, + 0x80c30032, 0xd08cb80f, 0x6400cb00, 0x3ec80cb0, 0x132c02cb, 0x0032c00f, + 0xb003f004, 0x20000000, 0x00000000, 0xc8052f20, 0x0f4023c0, 0x0ab0023e, + 0x28896036, 0xe808b002, 0x1c00d848, 0x0c701eb0, 0x02e720b3, 0x0022c40b, + 0x3702ee00, 0xdb4376d0, 0x8db0020f, 0x80db52b6, 0xd20cbc0f, 0x2d44db60, + 0x2ed80db0, 0x036dc0d3, 0x0036c00b, 0xb002f200, 0x40000000, 0x00000000, + 0xe0054280, 0x834020c0, 0x1830024f, 0x00824260, 0x1248000a, 0x8c108080, + 0x08100b30, 0x02c301b3, 0x0020d44b, 0x3022c400, 0x83422400, 0x08080201, + 0x00808060, 0x32090002, 0x000c830a, 0x2cc00830, 0x820e0083, 0x0020c00b, + 0x3002f800, 0x10000000, 0x00000000, 0xf0011600, 0x879021e0, 0x0a78025e, + 0x008f0027, 0x60587806, 0x9e009480, 0x2da08a78, 0x06d201bf, 0x90a1e01b, + 0x7802d600, 0x979127a0, 0x097d065e, 0x40979824, 0xc008fd4a, 0x16009780, + 0x2de10978, 0x125e0097, 0x8025e00b, 0x7802d804, 0x10000000, 0x00000000, + 0x49080844, 0xc30070c0, 0x08b003cc, 0x00831030, 0x810c8103, 0x8c82c040, + 0x38c20330, 0x02c090b3, 0x1030c40b, 0x3012cc40, 0x83002042, 0x08a44308, + 0x048a1120, 0x04093402, 0x0800c300, 0x3cc00c30, 0x030c00c3, 0x0030c40f, + 0x3003da02, 0x10000000, 0x00000000, 0x401dbc18, 0xff443fc0, 0x0ff003bc, + 0x02ff3039, 0xc40ff103, 0x7c20cf02, 0x3f409ef0, 0x02f80077, 0x126fc40d, + 0xf003dc50, 0xdf003dc0, 0x4ff003bc, 0x14ff123f, 0xcc0b7003, 0xfc04ff10, + 0x1fc44ff0, 0x03fc40f7, 0x003fc00f, 0xf003d004, 0x60000000, 0x00000000, + 0x8805e000, 0xfb0032c8, 0x2cb003ed, 0x80c9003e, 0xc00fb003, 0x6c81e806, + 0x3ec08fb0, 0x03a000f3, 0x0026c00b, 0xb001ec00, 0xeb0036c0, 0x6d900164, + 0x02c9003a, 0xc084800b, 0x2e00cb80, 0x32c00cb0, 0x23ec00db, 0x003ec00f, + 0xb003c200, 0x70000000, 0x00000000, 0xc0919800, 0xb30023cd, 0x187002cc, + 0x20850439, 0xc00b7002, 0xdcb08404, 0x2dc00b70, 0x26d400e6, 0x0021c00b, + 0x7001dc00, 0xb70029c0, 0x0e30029c, 0x00a70428, 0xc108f002, 0x9c00a700, + 0x29c00870, 0x12dc0087, 0x002dc00b, 0x7002f206, 0x60000000, 0x00000000, + 0x80009704, 0xb79021ec, 0x0878029e, 0xc987c029, 0xe20b7806, 0x5e82a581, + 0x29e20b78, 0x12da00bf, 0xc025e00b, 0x7812de00, 0xa78024e0, 0x0878320e, + 0x2893802d, 0xe0197812, 0x4e019780, 0x21e00878, 0x22de0097, 0x802de00b, + 0x7802c800, 0x20000000, 0x00000000, 0x4814cf00, 0xb300a2c0, 0x0a3002cc, + 0x01a34868, 0xd00b3c92, 0xcc00a341, 0x6cd20b30, 0x42cd80b3, 0x8020c043, + 0x30028c10, 0xb30020d0, 0x08309a8d, 0x00a30068, 0xd208300a, 0x8d21b300, + 0x28c10830, 0x02cc0083, 0x002cc00b, 0x3002d200, 0x30000000, 0x00000000, + 0xe815bb00, 0xfa003280, 0x0ca003a8, 0x00c6403b, 0xa40fea23, 0x6802ae40, + 0x3f910fa0, 0x01f980be, 0xc034800b, 0xa000e820, 0xea003790, 0x0ce41339, + 0x00de48bf, 0x802d6083, 0x79849a02, 0x228028a0, 0x23e800da, 0x003e800f, + 0xa003fa04, 0x70000000, 0x00000000, 0x4800c080, 0xf8003e00, 0x0d8003c0, + 0x02d8042a, 0x100b8003, 0xe004d840, 0x1e100f80, 0x03e100e8, 0x203e000f, + 0x8043e000, 0xf8423e06, 0x4f8503a0, 0x20f8043e, 0x040f8403, 0xe110e800, + 0x3e004f84, 0x13e004f8, 0x003e000f, 0x8003d200, 0x60000000, 0x00000000, + 0x0810e600, 0xc9003a40, 0x0c9003e4, 0x00c91016, 0x409f9001, 0x0400c988, + 0x3e400b90, 0x016404f9, 0x0036480c, 0x90032600, 0xf9903648, 0x0c100304, + 0x40c94832, 0x480c9203, 0x2440b921, 0x3e400e90, 0x032408c9, 0x203e400f, + 0x9003c204, 0x20000000, 0x00000000, 0x80046440, 0xa1402240, 0x1a9002e4, + 0x0089402e, 0x589b9002, 0x2610d980, 0x2e400b90, 0x02e700e1, 0x0222600d, + 0x10036680, 0xb1202a60, 0x08900a27, 0x8a892034, 0x400d980a, 0x2680b900, + 0x2e440890, 0x43640289, 0x802e400b, 0x9002e000, 0x10000000, 0x00000000, + 0x18052400, 0x89012a40, 0x089002e6, 0x0289002a, 0x40031002, 0xa4408910, + 0x2ef00b90, 0x06e481b9, 0x00264008, 0x91022485, 0xb9002040, 0x689c022c, + 0x00830026, 0x5009940a, 0x2401b909, 0x2c400a10, 0x02040089, 0x002e400b, + 0x9002ce00, 0x40000000, 0x00000000, 0x080406a0, 0xa3002050, 0x0a1402c6, + 0x00830028, 0x400b140a, 0x84009300, 0x2c400b10, 0x02cc00a9, 0x0020c009, + 0x10024401, 0xb100a044, 0x08110e04, 0x008110a4, 0x44099102, 0x0401b110, + 0x2c452831, 0x02444081, 0x002c400b, 0x1002ca05, 0x00000000, 0x00000000, + 0x380d6080, 0xc8003a00, 0x088023e0, 0x00c8013e, 0x000b8003, 0xa0008800, + 0x2e000f80, 0x036001f8, 0x0036001c, 0xa0022000, 0xb800329a, 0x0c868320, + 0xa0c86922, 0x1a2c8683, 0x20a0f042, 0x7c100e84, 0x030100c8, 0x003e000f, + 0x8003ee03, 0x50000000, 0x00000000, 0x980df4b0, 0xf96c3e51, 0x0f9003e5, + 0x08fd003f, 0x400ff003, 0x4500fd00, 0x3f400f90, 0x23f410ed, 0x023e400b, + 0x9011f400, 0x71001b49, 0x0fd203f4, 0x00fd243f, 0x4807d203, 0xf404f920, + 0x3e490f92, 0x13e480f9, 0x003e400f, 0x9003e604, 0x70000000, 0x00000000, + 0x1805f400, 0xbd28324c, 0x0e9003f4, 0x00cd0037, 0x404f9043, 0xd481cd00, + 0x33400f90, 0x43f401f9, 0x0033401f, 0xd003f400, 0xf5003348, 0x0ed29134, + 0x828d0139, 0x4008d113, 0x24898d00, 0x32440f90, 0x112410cd, 0x003e400f, + 0x9003e600, 0x70000000, 0x00000000, 0x7810e800, 0xe801200c, 0x080082e0, + 0x00d8002e, 0x000b8202, 0xe040a801, 0x22010b80, 0x00e000ba, 0x0022000b, + 0x8003e008, 0xb8002a0a, 0x888203a8, 0x40e84922, 0x03288102, 0xa000f020, + 0x2a084f00, 0x822020a8, 0x0026000b, 0x8002ce06, 0x30000000, 0x00000000, + 0x4805c400, 0xb100a848, 0x021202c4, 0x44838024, 0x404b1286, 0xc4098900, + 0xa0400b10, 0x024400b9, 0x0020c10b, 0x1002c400, 0xb100204d, 0x28128204, + 0x00813028, 0x44081068, 0x04498128, 0x64480b12, 0x3a040881, 0x002c400b, + 0x1002d200, 0x20000000, 0x00000000, 0x18152400, 0xab022840, 0x089002e4, + 0x0199002e, 0x409b9202, 0xe400ab10, 0x22490b90, 0x02ec00b9, 0x00a24019, + 0xb002a400, 0xb90122c2, 0x081042a4, 0x80a90002, 0x50981082, 0xa4412100, + 0x6e400b10, 0x460400a9, 0x002e400b, 0x9002c600, 0x20000000, 0x00000000, + 0xa010a500, 0xf9003a40, 0x0e9002e4, 0x00c90006, 0x480f9413, 0xe4004108, + 0x32780f90, 0x13e428b9, 0x50324003, 0x9022e608, 0xb100b250, 0x0c9a6326, + 0x00c9882a, 0x602c9403, 0x27828900, 0x36400f90, 0x132400c9, 0x003e400f, + 0x9003e804, 0x70000000, 0x00000000, 0xe800a480, 0xf1081640, 0x0e9007e4, + 0x00f9a03e, 0x640f9003, 0xe400e900, 0x3e600f90, 0x03e700f9, 0x003e400f, + 0x9003e440, 0xf9003e68, 0x0f9103a6, 0x20e9a83c, 0x480f9903, 0xec00f900, + 0x3ac0deb0, 0x13ec00f9, 0x0036400f, 0x9003f200, 0x60000000, 0x00000000, + 0x2810a122, 0xc8003e00, 0x4e800360, 0x00c80a3e, 0x040c8013, 0x0022f801, + 0x32004f80, 0x43e118f8, 0x0432000b, 0x8002e020, 0xf8003213, 0x0c800301, + 0x00c04032, 0x002c800b, 0x0000f820, 0x2a008f80, 0x036020f8, 0x003e000f, + 0x8003c204, 0x20000000, 0x00000000, 0x28043800, 0x8e802e81, 0x08a00319, + 0x008e000f, 0x8008a003, 0x3a00cec2, 0x23b006a0, 0x02f920b2, 0x0033940b, + 0xec02fa00, 0xbe032380, 0x28ed423b, 0x028ea0a3, 0x80cde103, 0x6844ee80, + 0x22820ba4, 0x032a00ba, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000, + 0x28054d00, 0x82402cc0, 0x0830020d, 0x6093002c, 0xf309300a, 0x4f00a3a0, + 0xa4d80b30, 0x02ce20b3, 0x00a4d00b, 0x36028f00, 0xb380a2d0, 0x0834468e, + 0x41834468, 0xc00b3c02, 0x0c08b341, 0x24c00b38, 0xc20c10b3, 0x002cc10b, + 0x3002ca00, 0x50000000, 0x00000000, 0x20010e00, 0x87402dc8, 0x087a0a0c, + 0x0397006d, 0x4019f906, 0x1d00840a, 0x25101a70, 0x00dc00bf, 0x0021c003, + 0x7082d420, 0xb74020c2, 0x0a340e1c, 0x01970529, 0xc209f462, 0x5c289708, + 0x25804b64, 0x421830b7, 0x002dc01b, 0x7002e004, 0x40000000, 0x00000000, + 0x28081a00, 0xc6802de0, 0x2879071e, 0x0097813d, 0xc00d7b02, 0x5e026481, + 0x75200f78, 0x01de00f7, 0x8035e00f, 0x78039600, 0xb78021e0, 0x2878038e, + 0x00c38429, 0xe02f7803, 0x1e21f780, 0xb5609f78, 0x0b1e00f7, 0x803de00f, + 0x7803e202, 0x00000000, 0x00000000, 0x081da000, 0xfb023ed1, 0x0fb303a0, + 0x00ea002c, 0x400e7603, 0xec00d000, 0x3a000fb0, 0x02ec00f3, 0x043ec10f, + 0xb013e000, 0x7a003e80, 0x8db003e4, 0x00eb0026, 0x000f0003, 0xe980eb00, + 0x1a800bb0, 0x03a9a0fb, 0x003ec00f, 0xb003c204, 0x60000000, 0x00000000, + 0x4005fe00, 0xdf8033f2, 0x0ff803fe, 0x40af903f, 0xe00ff803, 0x7e00ec82, + 0x3f244cf9, 0x01f608cf, 0x803b600f, 0xf203f640, 0xd78423e0, 0x0cf8033e, + 0x00ef9433, 0xe08c7803, 0x3e087f80, 0x13700cdc, 0x237e48df, 0x803fe00f, + 0xf803d000, 0x20000000, 0x00000000, 0xa811b884, 0xdf0021c8, 0x0e7202dc, + 0xc0b7002d, 0xd0037002, 0x9400f400, 0x2d002870, 0x02d840a7, 0x0021808f, + 0x4002d400, 0x05002bc8, 0x8a76021d, 0x00bc3a03, 0xc82a7123, 0xdc10bc00, + 0x2980c840, 0x22184087, 0x002dc00b, 0x7002ea06, 0x20000000, 0x00000000, + 0x00009c09, 0x861021c0, 0x427012dc, 0x00b5002d, 0xc00bf002, 0x1c00a410, + 0x27021a70, 0x22fc008f, 0x0029c00b, 0x7102f401, 0x87002140, 0x08000018, + 0x00a70121, 0xc019f002, 0x1400b700, 0x21440851, 0x025c0197, 0x002dc00a, + 0x7002c600, 0x20000000, 0x00000000, 0x6014c180, 0x920220c0, 0x8a3002c0, + 0x00b0406c, 0x980b3402, 0x8410b0c9, 0x2c320a30, 0x02c100a3, 0x6020004a, + 0x0002c208, 0x8000282c, 0x0a800000, 0x80b08220, 0x001b0c2a, 0xc740b800, + 0x28800810, 0x06080183, 0x002cc00b, 0x3002d800, 0x20000000, 0x00000000, + 0x2815a400, 0xcb00b3c0, 0x0ef002ec, 0x00fb403e, 0x520ff103, 0x2c00a84a, + 0x26300eb0, 0x02c7408b, 0x803a4083, 0xb042e402, 0x8b0032f0, 0x0cb20b2e, + 0x24eb1022, 0xcc0db98b, 0x2d00bb00, 0x32c02ca0, 0x036c00db, 0x003ec00f, + 0xb003ca84, 0x60000000, 0x00000000, 0x8000ee04, 0xf2043ec0, 0x0eb013ed, + 0x10f9003e, 0x400ff803, 0xac00f800, 0x3e000db0, 0x03e540fb, 0x103e500f, + 0xb403e450, 0xeb023e50, 0x0f8003e9, 0x00fb413c, 0xc04eb403, 0xe800fb40, + 0x3f800fa4, 0x036100fb, 0x003ec00f, 0xb003e400, 0x30000000, 0x00000000, + 0x0110f200, 0xff0031c0, 0x0cf003fc, 0x00df0833, 0x401ff003, 0xd440cc01, + 0x3f000ff0, 0x01f000ef, 0x00b3000f, 0xc203f400, 0x9d0033e4, 0x4cf0833c, + 0x00fc8033, 0xc00cf003, 0x5420cc01, 0x33400ef0, 0x233c48cd, 0x803fc00e, + 0xf003e864, 0x30000000, 0x00000000, 0x80046200, 0xbac122c0, 0x08b002c1, + 0x80800022, 0x700bb012, 0xe50088c0, 0x2e220bb0, 0x22e300d3, 0x00223209, + 0x8c02e300, 0xb0802220, 0x0a810f60, 0x00b87022, 0x60088c03, 0x206088f0, + 0x36000db4, 0x03208099, 0x802ec10b, 0xb002e840, 0x10000000, 0x00000000, + 0x80056440, 0xb98022c0, 0x08b002e0, 0x809a2022, 0x200bb006, 0xe9008880, + 0x2e200bb0, 0x02e6008b, 0x00226043, 0xb042e301, 0x9b802080, 0x48b00224, + 0x80b30022, 0x700802a2, 0x2c018b00, 0x20480a00, 0x8a40009b, 0x202ec00b, + 0xb002e000, 0x40000000, 0x00000000, 0x08040800, 0xb10020c0, 0x2a3002c0, + 0x008081a0, 0x400b3002, 0xc00a8000, 0x2c000b30, 0x02c0009b, 0x05200009, + 0x00004000, 0xb100a000, 0x08004240, 0x00b00020, 0x40080006, 0x08028001, + 0x24800900, 0x02000293, 0x002cc00b, 0x3022c205, 0x00000000, 0x00000000, + 0x00082400, 0xf80033c0, 0x1cf003e0, 0x00d80032, 0x000bf043, 0xe001c800, + 0x3e000fb0, 0x03e000cb, 0x0022000f, 0x8047e019, 0xd9002200, 0x0c800220, + 0x00b80222, 0x400c8023, 0x2410c800, 0xb0400e00, 0x030000c9, 0x003ec00f, + 0xb003e003, 0x50000000, 0x00000000, 0xa01df000, 0xfc013fc0, 0x0df003f0, + 0x00ac002f, 0x000f7003, 0xd000fc02, 0x3d000ff0, 0x07d001d7, 0x00bf000d, + 0xc002d000, 0xfc023f00, 0x0fc003f0, 0x007c003f, 0x4087c003, 0xf005fc00, + 0x3b004fc0, 0x13b000ed, 0x003fc00f, 0xf003e804, 0x70000000, 0x00000000, + 0xc015fe00, 0xff803be0, 0x0ff803fe, 0x00ff803f, 0xe00df803, 0xf200ec90, + 0x37e00ff8, 0x07f210df, 0x803fc80f, 0xe843b240, 0xdf0133c0, 0x09f903fe, + 0x00ff4033, 0xd80ff803, 0xfe00ff80, 0x3be00ff8, 0x03fcc0ff, 0x803fe00f, + 0xf803f000, 0x70000000, 0x00000000, 0x8090ac00, 0xbb802ee0, 0x0bb802ee, + 0x08bb802e, 0xe00bb802, 0xe084c020, 0x22e003b0, 0x476208ab, 0x802ef00b, + 0xa802e080, 0xabc222d0, 0x0cb202cc, 0x08bf402a, 0xd40bb802, 0xee00bb08, + 0x32e00bb8, 0x42ed00bb, 0x802ee00b, 0xb802e004, 0x30000000, 0x00000000, + 0x0a048c20, 0xb30028c0, 0x0b3002cc, 0x00b3002c, 0xc0093002, 0xc020a800, + 0x2cc00a32, 0x82e000a3, 0x006cd00b, 0x0002e001, 0x934020da, 0x0b3002cc, + 0x00b33028, 0xc80b3002, 0xcc00b320, 0x28c00b30, 0x02ccc0a3, 0x002cc00b, + 0x3002ca00, 0x20000000, 0x00000000, 0xc004ac00, 0xbb002ec0, 0x0bb002ec, + 0x01bb0026, 0xc00bb002, 0xcc208884, 0x2ac00bb0, 0x02a304a8, 0x882eca0b, + 0xac02ec04, 0xab1022c0, 0x0bb002ec, 0x00bb002a, 0xc00bb002, 0xec00bb00, + 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xb002f804, 0x70000000, 0x00000000, + 0x4105ec10, 0xfb007ac0, 0x0fb003ec, 0x00fb003e, 0xc00db003, 0xe040e080, + 0x3ec00fb0, 0x02c208fa, 0xc43e700b, 0xa823a3c0, 0xdb0022c0, 0x2fb003ec, + 0x00fb013a, 0xc00bb003, 0xec00fb00, 0x3ac00fb0, 0x03ec00fb, 0x003ec00f, + 0xb003d044, 0x70000000, 0x00000000, 0xa041bc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff013, 0xf600cd00, 0x37c00ff0, 0x037420fe, 0x003fe00f, + 0xe001f400, 0xd780bdc8, 0x0cf003fc, 0x00f7003f, 0xc00ff003, 0xfc00ff00, + 0x33c00ff0, 0x03fc00ff, 0x003fc00f, 0xf003e800, 0x60000000, 0x00000000, + 0xc000ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00cb003, 0xe800f901, + 0x3ec04fb0, 0x13e418f9, 0xa232504f, 0x84236900, 0xff623751, 0x07b003ec, + 0x00cb003a, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00db, 0x003ec00f, + 0xb003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb003ec0, 0x0bb002ec, + 0x00bb002e, 0xc00bb042, 0xee00b900, 0x22c00bb0, 0x01a500b8, 0x4022f408, + 0x9002ce00, 0x8ba02240, 0x08b002ec, 0x00df0023, 0xc00bb002, 0xec00bb00, + 0x2ec00bb0, 0x12fc00bb, 0x002ec00b, 0xb002f200, 0x40000000, 0x00000000, + 0xc0104c00, 0xb3002cc0, 0x0b30024c, 0x00b3002c, 0xc00a3042, 0xc200b000, + 0x24c00930, 0x02c00093, 0x4024804a, 0x3002c200, 0xa3c220c0, 0x0a3022cc, + 0x00830008, 0xc10b3002, 0xcc00bb00, 0x2cc00b30, 0x02cc0093, 0x002cc00b, + 0x3002f800, 0x50000000, 0x00000000, 0x60105e00, 0xb7802de0, 0x0b7802de, + 0x00b7802d, 0xe00b7822, 0xda05b588, 0x69e00b79, 0x02d600b7, 0x0024a000, + 0x7c02da10, 0x809020e4, 0x0878025e, 0x00978221, 0xe00b7806, 0xde00b780, + 0x2de00b78, 0x02de00b7, 0x802de00b, 0x7802d800, 0x40000000, 0x00000000, + 0x48084c10, 0xf3003cc0, 0x0f3003cc, 0x00f3002c, 0xc00e3027, 0xc420f100, + 0x3cc00f30, 0x03c42072, 0x10348e4a, 0x1043e428, 0xe300b0c0, 0x0e3013cc, + 0x00cb0038, 0xc00f3003, 0xcc00f300, 0x3cc00f30, 0x13cc01d3, 0x003cc00f, + 0x3003d202, 0x00000000, 0x00000000, 0x4045bc04, 0xff013bc0, 0x0bf003fc, + 0x00ff003f, 0xc00ff103, 0xfc04fd03, 0x37c00ff0, 0x43b400f4, 0x203b944e, + 0xf013fc00, 0xec083bc0, 0x0ef003fc, 0x08ff183f, 0xc00ff003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000, + 0x0804ae00, 0xdb007ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00f800, + 0x1ec00fb8, 0x03a001fa, 0x013e588e, 0xa011ee00, 0xd70033a0, 0x0cb003ee, + 0x00cb2033, 0xc10cb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00cb, 0x003ec00f, + 0xb003c200, 0x60000000, 0x00000000, 0xc018bc00, 0x87006dc0, 0x0b7002dc, + 0x00b7002d, 0xc10b7002, 0xdc00e500, 0x2dc00bf0, 0x035400b6, 0x046d400b, + 0x6012dc00, 0x24a22ba1, 0x0d70027c, 0x00d72833, 0xd01a7002, 0xdc00b700, + 0x2dc00b70, 0x02fd0087, 0x002dc00b, 0x7002f004, 0x20000000, 0x00000000, + 0x20009e00, 0x978129e0, 0x097802de, 0x00b7802d, 0xe00b7802, 0xde009581, + 0x2de00378, 0x021608b6, 0x802de00b, 0x6802fe01, 0x97802124, 0x097802de, + 0x0083a125, 0xe8187802, 0xde00b780, 0x2de00b78, 0x02de8287, 0x802de00b, + 0x7802c000, 0x20000000, 0x00000000, 0x68048c00, 0x83002cc0, 0x0b3002cc, + 0x00b3000c, 0xc00b3002, 0xcf20a3c0, 0x2cc00b30, 0x024c81b2, 0x402cf20b, + 0x3002cf80, 0x93c028f0, 0x19b0024c, 0x00930022, 0xc00a3002, 0xcc00b300, + 0x2cc04b30, 0x02cc0083, 0x002cc00b, 0x3002d204, 0x20000000, 0x00000000, + 0xe815e800, 0xda003e80, 0x0da003e8, 0x00ba002e, 0x800fa002, 0xf920fe90, + 0x3e810fa0, 0x023a80fe, 0x602ea80f, 0xe701fb00, 0xde802390, 0x09a002e8, + 0x00ca04e6, 0x800ca003, 0xe800fa00, 0x3e800fa0, 0x03e800ca, 0x002e800f, + 0xa003fa04, 0x60000000, 0x00000000, 0x4801a000, 0xf8003e01, 0x8f8003e0, + 0x00f8003e, 0x000b8003, 0xe000f810, 0x3e000f80, 0x036100f8, 0x083e000f, + 0x8003e040, 0xe8183e0c, 0x0f8003e0, 0x00f0023e, 0x000f8003, 0xe000f800, + 0x3e000f80, 0x03e000f8, 0x003e000f, 0x8003d200, 0x30000000, 0x00000000, + 0x0810a400, 0xf9003e40, 0x0f9003e4, 0x00f9007e, 0x400f9043, 0xe440f900, + 0x3e400f90, 0x03e600e9, 0x007ee00f, 0x98036600, 0xd1203240, 0x0e900324, + 0x40f90036, 0x400c9003, 0xe400f900, 0x3e400f90, 0x03c400c9, 0x003e400f, + 0x9003d204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x400b9002, 0xe600b984, 0x2e400990, 0x03c41089, 0x822e604b, + 0x15022400, 0xbd842340, 0x0b9003a4, 0x04b90022, 0x400a9002, 0xe400b900, + 0x2e400b90, 0x02e40089, 0x002e400b, 0x9002e000, 0x10000000, 0x00000000, + 0x38052400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9002, 0x6404bb10, + 0x2a400b90, 0x02e44029, 0x88264409, 0x901a2480, 0xbb0222c0, 0x0b900225, + 0x00b90022, 0x40089002, 0xe400b900, 0x2e400b90, 0x02e40089, 0x042e400b, + 0x9002c600, 0x40000000, 0x00000000, 0x28140440, 0xb1002c40, 0x0b1002c4, + 0x00b1002c, 0x400b1042, 0xc451b110, 0x2c400b14, 0x02c40081, 0x012cc00b, + 0xb0020444, 0xb3002044, 0x191402c5, 0x00b11020, 0x442a1002, 0xc400b110, + 0x2c400b10, 0x02c44081, 0x012c400b, 0x1002c201, 0x00000000, 0x00000000, + 0x380d6100, 0xf8003e00, 0x0f8003e0, 0x00f8002e, 0x000f8003, 0xe1007840, + 0x3a000f80, 0x03e800e8, 0x02260a05, 0x80136100, 0xf828321a, 0x0f800320, + 0x00f840b2, 0x100c8003, 0xe000f840, 0x3e000f80, 0x03e1a0c8, 0x003e000f, + 0x8003de03, 0x50000000, 0x00000000, 0x9805e480, 0xf9003e40, 0x0f9003e4, + 0x01f9007e, 0x400f9007, 0xf480fd20, 0x3e400d90, 0x03b410fd, 0x010e400f, + 0xd003d480, 0xbd00ff48, 0x0f9003a4, 0x04f9603a, 0x580f9003, 0xe400f920, + 0x36400f90, 0x03e482f9, 0x003e400f, 0x9003e602, 0x70000000, 0x00000000, + 0x1805e404, 0xf9002a40, 0x0f9003e4, 0x00f9003e, 0x400f9043, 0xc400f900, + 0x3e400f91, 0x037400dd, 0x003f400f, 0xd003f400, 0xf5003340, 0x0c900374, + 0x40c9003a, 0x400d9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f, + 0x9003c600, 0x70000000, 0x00000000, 0x3818e000, 0xb8002e00, 0x0b8002e0, + 0x00b8002e, 0x000b8002, 0xe004b800, 0x2e000b80, 0x0220000a, 0x002e004b, + 0x8013a004, 0xba002201, 0x088203a0, 0x80d84022, 0x00088002, 0xe000b820, + 0x2e000b80, 0x02e020b8, 0x002e000b, 0x8002ce04, 0x30000000, 0x00000000, + 0x48008400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0xc400b100, + 0x2c400b10, 0x02440491, 0x012c404b, 0x3002c410, 0xb104a041, 0x081282c4, + 0x8c811528, 0x45091002, 0xc400b128, 0x2c400b10, 0x02c440b1, 0x002c400b, + 0x1002d201, 0x70000000, 0x00000000, 0x9804a400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x400b9002, 0xe480b908, 0x2e400b90, 0x0665848b, 0x012ee00b, + 0x9406ed40, 0xb9002250, 0x089002a4, 0x0499002a, 0x40089002, 0xe400b900, + 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002f604, 0x60000000, 0x00000000, + 0xa015e400, 0xb9003a40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe420f940, + 0x3e400f90, 0x036600d9, 0x802e600f, 0x9403e704, 0xf9c02344, 0x2c9017e4, + 0x0489003a, 0x400d9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f, + 0x9003f804, 0x70000000, 0x00000000, 0xc801a400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xec007b40, 0x3e400f90, 0x07a410f9, 0x903e400f, + 0x9a03a420, 0xf1207c40, 0x0d9007a4, 0x00f90036, 0x400f9003, 0xe400f900, + 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003fa00, 0x60000000, 0x00000000, + 0x0810a000, 0xe8003e00, 0x0f8003e0, 0x00f8003a, 0x000f8002, 0xe100c800, + 0x3e000f80, 0x03a100f8, 0x023a068f, 0x8c03e144, 0xf808b610, 0x0e8003a0, + 0x80f000b2, 0x000c8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x003e000f, + 0x8003ca04, 0x20000000, 0x00000000, 0x28052800, 0x8a002e80, 0x0ba002e8, + 0x00ba002e, 0x8003a002, 0xe8408a00, 0x3e800ba0, 0x02db40be, 0x082f800b, + 0xe043b809, 0xbea02280, 0x08a002bb, 0x00ba0022, 0x800da002, 0xe8009a00, + 0x2e800ba0, 0x03a800ba, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000, + 0x28040c00, 0xa3002cc0, 0x0b3002cc, 0x00b30028, 0xc01b3002, 0xcf528310, + 0x2cc00bb0, 0x028d00b3, 0x2108d08b, 0x10028f10, 0xb30020c0, 0x8b3002af, + 0x00b30022, 0xc00a3002, 0xcc00b300, 0x2cc00b30, 0x028c00b3, 0x002cc00b, + 0x3002ca00, 0x10000000, 0x00000000, 0x80005e00, 0x87002dc0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xfe098500, 0x2dc00b73, 0x02dd10b7, 0x002dc00b, + 0x50029400, 0xb70621c8, 0x197a021d, 0x00b72021, 0xc80b7002, 0xdc009720, + 0x2dc00b70, 0x029cc0b7, 0x002dc00b, 0x7002e800, 0x10000000, 0x00000000, + 0x88083e00, 0xe7803de0, 0x0f7802de, 0x00f78039, 0xe00f7803, 0xd600c790, + 0x2de00f7a, 0x039e00f7, 0x8439600f, 0x58139e10, 0xb78033e8, 0x0ff90392, + 0x00f3a023, 0xe80e7803, 0xde00f7a0, 0x3de00f78, 0x039e80f7, 0x803de00f, + 0x7803ea02, 0x10000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0xc00fb003, 0xed00fb04, 0x3ac04ff0, 0x03ec00fb, 0x003e000f, + 0x90022408, 0xfa003be0, 0x0ef303e0, 0x08fb063e, 0xe00db003, 0xec00fb10, + 0x3ec00fb0, 0x03ac00fb, 0x013ec00f, 0xb003c206, 0x60000000, 0x00000000, + 0x0014be20, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xfb00dd90, + 0x37e08ffd, 0x037e405f, 0x923fe00f, 0x5103be00, 0xffb033e2, 0x4cf843be, + 0x00cf883f, 0xe20df803, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x803fe40f, + 0xf803c000, 0x70000000, 0x00000000, 0xa8109c40, 0xb7003dc0, 0x0b7002dc, + 0x00b7002d, 0xc00f7016, 0xd040b500, 0x6dc00b70, 0x121c40b5, 0x182d440b, + 0x54021c50, 0xe51821c0, 0x087002bc, 0x00d7202d, 0xc8087002, 0xdc40e700, + 0x39c40b70, 0x02dc00e7, 0x002dc00b, 0x7042ea44, 0x60000000, 0x00000000, + 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b7002, 0xd020b700, + 0x6dc00b70, 0x225005b5, 0x002dc009, 0x61869400, 0xb32020c0, 0x0a70025c, + 0x00870125, 0xc0197002, 0xdc00b700, 0x2dc00b70, 0x02dc00b7, 0x002dc11b, + 0x7002c000, 0x20000000, 0x00000000, 0x2014cc00, 0xb30028c0, 0x0b3002cc, + 0x0033000c, 0xc00a3002, 0xc328b380, 0x2cc00b30, 0x020201b1, 0xe10c400b, + 0x2e020720, 0xb14000f1, 0x0a3002cc, 0x0093002c, 0xc0083002, 0xcc08a300, + 0x28c00b30, 0x02cc00a3, 0x002cc00b, 0x3002c804, 0x30000000, 0x00000000, + 0xa805fc00, 0xfb002ec0, 0x0fb003ec, 0x00fb002e, 0xc00bb002, 0xcd007ad0, + 0x2ec00ff0, 0x136f40d9, 0x820e2809, 0x9c02a584, 0xfa8422d2, 0x2ef0026c, + 0x00cf003f, 0xc00db003, 0xec00ff00, 0x2ec00fb0, 0x03fc00fb, 0x003ec00f, + 0xb003ea04, 0x70000000, 0x00000000, 0x8011ac00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0xc04fb003, 0xed00f850, 0x3ec00bf0, 0x03e140f8, 0x403e000f, + 0x8403e500, 0x62403cc2, 0x0df005ad, 0x00fb003e, 0xc00fb003, 0xec00fb00, + 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, 0xb003e000, 0x60000000, 0x00000000, + 0x2110bc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xfe00ec80, + 0x3fc00ff0, 0x113c00fc, 0x003b400f, 0xf0023400, 0xfd083bc0, 0x0cf0133e, + 0x00f70034, 0xc00df003, 0xfc01ff00, 0x3bc00ff0, 0x03fc00ff, 0x003fc00f, + 0xf003c044, 0x20000000, 0x00000000, 0xa1046c00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0xec688880, 0x2ec00bb0, 0x02a280b8, 0x802e300b, + 0x20036700, 0xe84022c0, 0x08b002ec, 0x00bb0022, 0xc00cb002, 0xec00db00, + 0x2ec00bb0, 0x02ec00bb, 0x002ec00e, 0xb002e040, 0x10000000, 0x00000000, + 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc00bb002, 0xec00a828, + 0x2ec00b30, 0x02ac41b9, 0x802ee00b, 0x9802aa01, 0xbb182ac0, 0x0a30026d, + 0x80bb0026, 0xc009b002, 0xec00bb00, 0x2ec00bb0, 0x06ec00bb, 0x002ec00b, + 0xb002e000, 0x40000000, 0x00000000, 0x08140c00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc0093002, 0x6c008000, 0x2cc08b30, 0x128010b1, 0x006c400b, + 0x0002c801, 0xa10028c1, 0x0a3006cc, 0x00b30020, 0xc0083002, 0xcc008300, + 0x2cc00b30, 0x06cc00b3, 0x002cc00a, 0x3012c201, 0x00000000, 0x00000000, + 0x000d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb017, 0xec08e804, + 0x2ec00b70, 0x03a000f8, 0x003ec00f, 0xa047a000, 0xb9003ac0, 0x0a70032c, + 0x007b0036, 0xc00db003, 0xec00bb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, + 0xb003c003, 0x50000000, 0x00000000, 0xa015fc00, 0xff003fc0, 0x0ff003fc, + 0x00ff007f, 0xc00ff013, 0xfc00fc00, 0x3fc00ff0, 0x03f000fd, 0x003f401f, + 0xe0037000, 0x6d0037c0, 0x4df007bc, 0x00ff003f, 0xc00ef003, 0xfc10ff00, + 0x3fc00ff0, 0x03fc00ff, 0x043fc00e, 0xf003e806, 0x70000000, 0x00000000, + 0xc005f000, 0xf4913120, 0x4dc82352, 0x00c7003d, 0x244c4903, 0x5200e480, + 0x73208fc8, 0x03fc806c, 0x823b200e, 0xc803f000, 0xcc240f00, 0x4ed0233e, + 0x00fc0423, 0x0007d203, 0xf244cc20, 0x3de00df8, 0x037e00ff, 0x803fe08c, + 0xf2037000, 0x70000000, 0x00000000, 0x8010e400, 0xb8202220, 0x0ba802a2, + 0x008fd02e, 0x08088222, 0x22048880, 0x2a200b88, 0x02fe4888, 0x803a200b, + 0x8802c310, 0x88d02e30, 0x889c47ae, 0x00e8c22a, 0x30499906, 0xe0848990, + 0x2ee00cb8, 0x02ae00bb, 0x802ec280, 0x3182a004, 0x30000000, 0x00000000, + 0x0805c800, 0xb0202000, 0x0bb00240, 0x0083006c, 0x00088212, 0x80008000, + 0x2c000a00, 0x42cc1020, 0x0028000b, 0x0802c100, 0x90002c10, 0x0814120c, + 0x10b04060, 0x110b1002, 0xc4808100, 0x28c009b0, 0x028c00b3, 0x002cc82a, + 0x32024201, 0x70000000, 0x00000000, 0xc015ae00, 0xb319aac2, 0x0ba842a7, + 0x008b002c, 0x20288202, 0x2612a884, 0x2e200390, 0x00ec10a8, 0x202e201b, + 0x9806ec00, 0x9b002e10, 0xc89802ec, 0x18ba2002, 0x821bb042, 0xec0489c0, + 0x2ec409b0, 0x82ac00bb, 0x002cc002, 0xb002b804, 0x60000000, 0x00000000, + 0x0014e280, 0xf88032a4, 0x8d080342, 0x10cb001e, 0x220c8003, 0x2224e8c9, + 0x2e200e82, 0x02ec00e8, 0x403a300f, 0x8843e150, 0xd8c13e20, 0x2e9c422c, + 0x00f840b2, 0x300f9902, 0xe900c9c0, 0x38f80d30, 0x236c00fb, 0x003ec006, + 0xb0134004, 0x20000000, 0x00000000, 0xe100b020, 0xfd803780, 0x0be08370, + 0x00ff0a1f, 0x000fc81b, 0xf400dc00, 0x3b000fea, 0x42dc04dc, 0x021b404f, + 0xc013d602, 0xe8453fc4, 0x1f3003bc, 0x00ed013f, 0x449d9023, 0xf800fd00, + 0x3fc08efa, 0x03fc00ff, 0x003fc14d, 0xf003f860, 0x20000000, 0x00000000, + 0xc010ad40, 0xfa0136c3, 0x0e900367, 0x06cb1036, 0x000c8403, 0xe004e801, + 0x3a140cb1, 0x83fc80f8, 0x083e500f, 0x92032820, 0xdb0030c4, 0x8bb4032c, + 0x50b34876, 0xd41f9043, 0x2c80f90c, 0x36c80cb4, 0x03ac80cb, 0x003ec00d, + 0xb003b004, 0x20000000, 0x00000000, 0xc8052f00, 0xbb0022d0, 0x08aa02e4, + 0x008fc022, 0x00080002, 0x055050c0, 0x02308db8, 0x02fe008a, 0x4022710e, + 0x9c03ed00, 0x8b8022e4, 0x0bbc022e, 0x10bbc82e, 0xe00bb403, 0x2c00b900, + 0x2e420db5, 0x836c00db, 0x000ec00b, 0xf1837200, 0x00000000, 0x00000000, + 0xe2054900, 0x10002480, 0x0a0c12c0, 0x00a3042c, 0x00080002, 0x814180d8, + 0x28220a00, 0x524d0010, 0x40682c0b, 0x0c12c000, 0x904c2020, 0x8b14c20f, + 0x80b0812c, 0x220b10c2, 0x2100b1d0, 0x2cf00830, 0x020d0083, 0x002cc009, + 0xb802b800, 0x50000000, 0x00000000, 0x62011e40, 0xbe8023e0, 0x087802d6, + 0x00a7856f, 0x2068c800, 0x32000c80, 0x21200b78, 0x02ce0894, 0x8021600a, + 0x5802fac0, 0x878421e4, 0x4b68a21e, 0x0197852d, 0xe0095882, 0x5600b780, + 0x6fe409f8, 0x025e0097, 0x802de00b, 0x78025800, 0x40000000, 0x00000000, + 0x48080800, 0xd1123400, 0x4a3407c0, 0x00a3003c, 0x008c0403, 0xc400a032, + 0x28040e22, 0x03cce0f0, 0x1038400f, 0x00834480, 0xd048a0c0, 0x0f32030c, + 0x40b1402c, 0x400b1213, 0x0540f110, 0x2cc00c30, 0x038c00c3, 0x003cc00d, + 0x32039202, 0x00000000, 0x00000000, 0x401dbc04, 0xff003fc0, 0x0ff007f4, + 0x00df1a33, 0x440fc003, 0xf443fc10, 0x3d050df0, 0x07fd40e4, 0x003b408f, + 0x50037c80, 0x3f103fc0, 0x07f009fc, 0x00ff103f, 0xc40ff02b, 0xbc10ff00, + 0x3fc00f51, 0x03dc40ff, 0x103fc01f, 0xf003d006, 0x60000000, 0x00000000, + 0xa805ee00, 0xcb002ec0, 0x0fa003e4, 0x00cb0832, 0x004b8002, 0xe400f800, + 0x3a000f90, 0x033cc0f8, 0x013e2001, 0x9803ac00, 0xcb003200, 0x4c10012c, + 0x00ea8032, 0x80059003, 0xec00f900, 0x3ac00cb0, 0x230e00cb, 0x003ec00f, + 0xb103e200, 0x70000000, 0x00000000, 0xc811bc00, 0x87002dc0, 0x8b7002d4, + 0x02a70025, 0x800b4002, 0xd400b400, 0x6d400b70, 0x129c00b7, 0x002d4080, + 0x50069c08, 0x870021c0, 0x0860021c, 0x08370028, 0xc0085002, 0xdc40b701, + 0x2dc00a60, 0x029c00a7, 0x002dc00b, 0x7002f204, 0x60000000, 0x00000000, + 0xc0009a00, 0x87802df0, 0x4b7802d6, 0x00a3a021, 0x630b4802, 0xd600b480, + 0x6de00bf8, 0x021e80b5, 0x882d628b, 0xd8a24e02, 0x838120e0, 0x78f8025e, + 0x00b38025, 0xf0087802, 0xde01b580, 0x2da00878, 0x021e0087, 0x802de00b, + 0x7a02f800, 0x20000000, 0x00000000, 0x4814c903, 0x834a2cc0, 0x8b3902ce, + 0x80a30064, 0xe00b3a46, 0xcd24b300, 0x2ce24b38, 0x428c10b3, 0x802cf808, + 0x3602cc20, 0x83d020e4, 0x0030024c, 0x0093e020, 0xe1883906, 0xce24b340, + 0x2cd00a33, 0x028c00a3, 0x002ec00b, 0x3002d204, 0x30000000, 0x00000000, + 0xe815b800, 0xce202f90, 0x0f6803d9, 0x00e204b3, 0x940fe803, 0xf880be70, + 0x3f92036b, 0x022800fe, 0x403f810f, 0xe8037820, 0xce00b3b4, 0x88620268, + 0x00fe40b7, 0x802ca803, 0xea00fe00, 0x3fb00cec, 0x032802ca, 0x003e800f, + 0xa002fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e10, 0x0f8003e1, + 0x42f8403a, 0x000f8143, 0xe000b800, 0x7e100f80, 0x03e100f8, 0x083e1087, + 0x8402a004, 0xf8403c01, 0x0f840ba0, 0x10f8103e, 0x121e8413, 0xe148f848, + 0x3e0c0f80, 0x03e000f8, 0x003e000f, 0x8403d200, 0x30000000, 0x00000000, + 0x0810e520, 0xf9003242, 0x0f9c0366, 0x40d90032, 0x400f9003, 0xe448d944, + 0x3e604f91, 0x03850ad9, 0x403e600f, 0x9c03c400, 0xd1083240, 0x0c992365, + 0x01f9007c, 0x400c1023, 0x2c00f940, 0x3e400c91, 0x132400f9, 0x003e400c, + 0x19438204, 0x30000000, 0x00000000, 0x80046500, 0xb9042a52, 0x0b920225, + 0x00892022, 0x40439002, 0xe600e901, 0x2e420b98, 0xe3658089, 0x402e420b, + 0x9e02e400, 0x89012278, 0x08908224, 0x01b9806e, 0x70089882, 0x25009940, + 0x2c620d18, 0x836500b9, 0x002e4008, 0x90022000, 0x10000000, 0x00000000, + 0x18042420, 0xb1002260, 0x0b900264, 0x24998022, 0x40039006, 0xe421b900, + 0x2ec40b90, 0x02a4008b, 0x002ec40b, 0x9046ec00, 0x99c02244, 0x08b01264, + 0x00b9202e, 0x541a9202, 0x2600b900, 0x2e440990, 0x022420b9, 0x002e4028, + 0x90828600, 0x40000000, 0x00000000, 0x080004a0, 0xb1402840, 0x0b100204, + 0x008100a0, 0x510b1402, 0xc400a100, 0x2c400b10, 0x22440091, 0x812c408b, + 0x1002cc00, 0x8100a040, 0x68900206, 0x00b1802c, 0x40381012, 0x04409100, + 0x2c400910, 0x124400b1, 0x002c4408, 0x11020200, 0x00000000, 0x00000000, + 0x38086080, 0xf8047200, 0x0b800360, 0x08d80422, 0x000f8023, 0xe011fa00, + 0x3e008f80, 0x23a000c8, 0x003e008f, 0x8043e0a0, 0xd828320a, 0x4c828b60, + 0x04b8282e, 0x0b0e8283, 0x2900fa28, 0x3e000d80, 0x032000f8, 0x003e100c, + 0x86838e02, 0x10000000, 0x00000000, 0x981dfca0, 0xfd002f40, 0x0fd003dc, + 0x00f9433f, 0x410fd003, 0xf4007d00, 0x3f401f50, 0x03a5006d, 0x003dc00f, + 0x5013f404, 0xfd042f41, 0x99f007e4, 0x10fd003f, 0xc00fd00b, 0xe480dd00, + 0x2d404f50, 0x03e40cf9, 0x003e484f, 0x9203e606, 0x70000000, 0x00000000, + 0x1805f400, 0xc9013341, 0x0ed043d4, 0x00cd0032, 0x400f9003, 0xb400fd00, + 0x7f400fd0, 0x03f480cd, 0x003f400f, 0xd023e400, 0xf9003e48, 0x2492c324, + 0x00f90032, 0x40089003, 0xf400b900, 0x3f400450, 0x037400c9, 0x003e400f, + 0xd2830600, 0x70000000, 0x00000000, 0x3810e000, 0x88202201, 0x088002e0, + 0x0888102a, 0x0a0b8202, 0x2800b802, 0x3a000ba0, 0x02e00488, 0x002e000b, + 0x8002e000, 0x3a102e00, 0x08800220, 0x00ba407a, 0x000ac002, 0xe000b800, + 0x2e802880, 0x02200288, 0x002e0a0b, 0x82020e04, 0x30000000, 0x00000000, + 0x0805e400, 0xa1286640, 0x081812c4, 0x00810460, 0x480b1282, 0x8410b100, + 0x2c400b10, 0x52c44481, 0x006c401b, 0x1000d448, 0xb5002d44, 0x08d00214, + 0x04b51029, 0x44085012, 0xc401b100, 0x2e400910, 0x02440081, 0x002c480b, + 0x128a0201, 0x70000000, 0x00000000, 0x1815a400, 0xa94026c4, 0x2ab002e4, + 0x8089002a, 0x400b1012, 0x2c00b911, 0x2a420b90, 0x02e40189, 0x282e408b, + 0x9082f501, 0xbd022f50, 0x08d00a3c, 0x00bf002f, 0x480ad002, 0xed083940, + 0x2e480992, 0x022c0089, 0x002e400b, 0x10020604, 0x60000000, 0x00000000, + 0xa210a500, 0xe9403658, 0x0c9813c7, 0x02c90032, 0x520f9883, 0xa400f960, + 0x2e505790, 0x03e40289, 0x013e608f, 0x9c02e700, 0xf9402e40, 0x0c910324, + 0x00f9402a, 0x400c9003, 0xe6007900, 0x3e600d9e, 0x034400c9, 0x003e400f, + 0x90022804, 0x20000000, 0x00000000, 0xa800a442, 0xd9c0ba62, 0x0d9c03e6, + 0x02f9002e, 0x400f9223, 0xe4a0f901, 0x3e650792, 0x03c400f9, 0x813e680f, + 0x9183e480, 0xf9493c64, 0x0f9803e4, 0x00f91838, 0x400f9943, 0xe680fb00, + 0x3e600c90, 0x23e400f9, 0x003e400f, 0x9083ea00, 0x20000000, 0x00000000, + 0x2a10a100, 0xf8413e00, 0x8f8203e1, 0x80d0003e, 0x100c8403, 0xe000f800, + 0x3e100f84, 0x83e000d8, 0x203e100f, 0x8503e100, 0xf840b202, 0x068c2320, + 0x20f040b2, 0x100c8003, 0xe080f834, 0x3e020c84, 0x43e000f8, 0x003e000d, + 0x8003ca04, 0x20000000, 0x00000000, 0x28051808, 0x3a012d90, 0x03e007b9, + 0x808e882e, 0x800aa062, 0xf900bec0, 0x2f900be6, 0x42fa408e, 0x002fa203, + 0xe403a840, 0xba083298, 0x18280228, 0x80bacc22, 0x9c8daa02, 0xf900eac0, + 0x2da8086e, 0x033a00ba, 0x002e8008, 0xe482ca00, 0x00000000, 0x00000000, + 0x28054c00, 0xbb002cd0, 0x0b31028f, 0x0093082c, 0xc0883002, 0xce00b388, + 0x2cfc0b3c, 0x02ce0083, 0x042cc20b, 0x30429340, 0xb4402120, 0x0a494212, + 0x00b4c021, 0x00084082, 0xcc00b300, 0x2cf00836, 0x028e80b3, 0x002cc008, + 0x3c02ca00, 0x50000000, 0x00000000, 0x21011c08, 0xb7202dc0, 0x0b5002bc, + 0x0097002d, 0xe40a7202, 0xd420b408, 0x2d000b40, 0x02dc2286, 0x022dc01b, + 0x70029410, 0xb78024c0, 0x88f0261c, 0x04b70221, 0xc0097042, 0xdc00a700, + 0x2d400870, 0x021c20b7, 0x002de828, 0x7002c800, 0x40000000, 0x00000000, + 0x20081a00, 0xf7aa3d60, 0x0f58039e, 0x00d7803f, 0xe40c7a43, 0xd6007484, + 0x2d200f48, 0x42c600c4, 0x803de00f, 0x78039600, 0xb38031e0, 0x4a780b1e, + 0x00f38120, 0xe04c7803, 0xd600f790, 0x3de00c78, 0x039e00f7, 0x803ff40c, + 0x7803c802, 0x00000000, 0x00000000, 0x081da400, 0xfb303e00, 0x4b9003a4, + 0x00eb003e, 0xd80fb683, 0xe400f804, 0x3e005f80, 0x03e000e8, 0x003e800f, + 0xa003a40c, 0xf8003ac0, 0x0f3001e0, 0x00fa043e, 0xc00fb020, 0xe400fb00, + 0x3cc00fb0, 0x03ac00fb, 0x003ec00f, 0x9003c206, 0x60000000, 0x00000000, + 0x4005fe00, 0xc7913be0, 0x4fd913fe, 0x406f801b, 0xe00df88b, 0x7600fc82, + 0x3f240fc9, 0x13fa804e, 0x803fe04c, 0xf303fe40, 0x7f8013e0, 0x0e78423e, + 0x48ef8093, 0xe10cf802, 0xfe404f80, 0x33c00c68, 0x033a00cf, 0x803fe00c, + 0xf8031004, 0x70000000, 0x00000000, 0xac119c00, 0xd71021c4, 0x0b4006dc, + 0xc0a60429, 0xc00bf002, 0x1401b410, 0x3d040b41, 0x02d18286, 0x402d428d, + 0x51239c60, 0xb7202180, 0x0b60121c, 0x40651029, 0xc00a6103, 0xbc44a600, + 0x21d40a70, 0x029c0087, 0x002dc00c, 0xe10a2a06, 0x60000000, 0x00000000, + 0x80009840, 0xaf526d40, 0x0b5482d8, 0x2aa50025, 0xc0097102, 0x9040b400, + 0x29008b41, 0x12c0c884, 0x002fc009, 0x70069810, 0x33002d40, 0x0ad0021c, + 0x50b70828, 0x00095802, 0xd4009600, 0x21c408f0, 0x021c0087, 0x102dc008, + 0x70022000, 0x20000000, 0x00000000, 0x64144590, 0xbb802414, 0x0b0802c3, + 0x00a0002c, 0xc04b3802, 0x8118b048, 0x2c101b08, 0x02c01080, 0x902c2209, + 0x08028d11, 0xb30024cc, 0x4934020c, 0x00a3c008, 0xd20b3002, 0x8660b200, + 0xa0d80233, 0x428c0083, 0x002cc009, 0x00021800, 0x30000000, 0x00000000, + 0x2815a500, 0xef803c50, 0x0f1003ee, 0x40eb003f, 0xd40df703, 0xe741f802, + 0x3a040b00, 0xa2c00080, 0x101ce00d, 0xb4038c08, 0xfbd03ec0, 0x0e390b2c, + 0x00eb9122, 0xe281b883, 0xc700dbd0, 0x30a88c14, 0x072c02cb, 0x003fc02c, + 0xb0030a04, 0x60000000, 0x00000000, 0x8000e100, 0x9b103a50, 0x079003ec, + 0x00f1403a, 0xe00fb012, 0x6140f850, 0x3a004f86, 0x03e000f8, 0x003ed00f, + 0xb183a900, 0xf3543840, 0x0f9113ed, 0x00fb4036, 0x114e9003, 0xe500e980, + 0x3ec00fb4, 0x03ec00fb, 0x003ec00e, 0xb403e000, 0x30000000, 0x00000000, + 0x0110d800, 0xcf01b342, 0x0dc0037c, 0x00ca8033, 0xc00ff001, 0xf400bc00, + 0x1f000cc0, 0x033000cc, 0x0033600c, 0xd1033e20, 0xcf003380, 0x0dea0b3e, + 0x00718033, 0xf00f6a03, 0x3400c310, 0x33e40cf1, 0x033d00ff, 0x003fc00f, + 0x600b8044, 0x30000000, 0x00000000, 0xc1046130, 0x8b002230, 0x088c1207, + 0x28f8c822, 0xc00bb002, 0xe300b8c8, 0x2c221a8a, 0x46230088, 0x80220008, + 0x08c26e20, 0xdb40bee4, 0x48b0236f, 0x41bbc636, 0xd08bb003, 0x6300a902, + 0x36d00fb8, 0x022d00bb, 0x002ec10b, 0x84022040, 0x10000000, 0x00000000, + 0x80002600, 0x8b006220, 0x0b980266, 0x00ab2022, 0xc00bb012, 0xe6003880, + 0x2e208888, 0x12221088, 0x80229408, 0xa0026480, 0x881822d0, 0x48b00220, + 0x04ba2126, 0xc28bb082, 0x26008b00, 0x22c009b0, 0x826400bb, 0x002ec00b, + 0x92822000, 0x00000000, 0x00000000, 0x0c000000, 0x83042000, 0x0b800244, + 0x00b00020, 0xc00b3002, 0xc000b000, 0x2e000880, 0x020000a8, 0x01a00029, + 0x004a6400, 0x930620c1, 0x48b80a0c, 0x08b30024, 0xc1093002, 0x64018002, + 0xa6c00bb0, 0x024400b3, 0x002cc00b, 0x00020201, 0x00000000, 0x00000000, + 0x00084800, 0x4f003200, 0x0f800364, 0x00e800b3, 0xc00ff031, 0xe000f800, + 0x3e000880, 0x0a2002c8, 0x0022000c, 0x80022400, 0xcb0022c0, 0x2cb00a2c, + 0x04bb0136, 0xc01fb043, 0x2402c800, 0x32c049b0, 0x0b6400fb, 0x003dc00f, + 0x80038002, 0x10000000, 0x00000000, 0xa41df000, 0xff003700, 0x0cc04394, + 0x00fc003f, 0xc00ff013, 0xf004fc00, 0x3f000fc0, 0x63f008dc, 0x003d000e, + 0xc047b000, 0xfc003f00, 0x4ec003f0, 0x08fc0037, 0x000fc043, 0xf4007c00, + 0x3dc00ff0, 0x039400ff, 0x003fc08f, 0xc003e807, 0x30000000, 0x00000000, + 0xc005fe00, 0xff803fe0, 0x0ff003fe, 0x04ff823f, 0xe00ff683, 0xbc00fc82, + 0x39200cfc, 0x131c80dc, 0x803b200f, 0xc8233200, 0xdf803be0, 0x0ff00378, + 0xa0cf803f, 0xe00ff803, 0xfe00ff80, 0x3fe00ff8, 0x03fe00dd, 0x283fe00f, + 0xf803f000, 0x70000000, 0x00000000, 0x8010ee00, 0xbb802ee0, 0x0bfc02cc, + 0x20bb802e, 0xe10bb412, 0xaf10f82a, 0x222088b0, 0x12be4288, 0x002a200b, + 0x90322200, 0xa98022e1, 0x8bbd022d, 0x058b802e, 0xe00bb802, 0xee00bb80, + 0x2ee00bb2, 0x82ee00b9, 0xc02ee00b, 0xb802e004, 0x30000000, 0x00000000, + 0x0805cc00, 0xb3002cc0, 0x0b34028c, 0x88b3002c, 0xc00b3202, 0x8c41b000, + 0x2a003a32, 0x020c00a8, 0x0820000b, 0x12c62004, 0x83042cc0, 0x0b301248, + 0x32a3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x02cc0093, 0x002cc00b, + 0x3002c201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec, + 0x00bb042e, 0xc00b3002, 0x2c01a308, 0x22208330, 0x02ac00b9, 0x012a140b, + 0x18022c08, 0xab8222c4, 0x0b91420c, 0x20ab002e, 0xc00bb002, 0xec00bb00, + 0x2ec00bb0, 0x02ec00b9, 0x002ec00b, 0xb000f004, 0x60000000, 0x00000000, + 0x0015ec00, 0xfb003ec0, 0x0fb003ec, 0x10fb003e, 0xc08fb583, 0xaf40b800, + 0x38280eb0, 0x132c02f0, 0x483a1007, 0x8c032200, 0xc3403ac0, 0x0fb00368, + 0x00ab003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec0099, 0xc03ec00f, + 0xb003c004, 0x70000000, 0x00000000, 0xe001bc00, 0xff013fc0, 0x0fb003fc, + 0x00bf003f, 0xc00be823, 0xf800fd10, 0x3f008cf0, 0x83fc00cc, 0x201fe10f, + 0xf013f110, 0xfd083fe0, 0x0f7841f4, 0x00df003f, 0xc00ff003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00fe, 0xc03fc00f, 0xf003f800, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb0036c0, 0x0fb00bac, 0x20eb003e, 0xc00fc403, 0xf480fa00, + 0x3e100db0, 0x03cc00d9, 0x483ec205, 0xb4132d40, 0x6b043ec0, 0x8bf403e9, + 0x00db003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ac00f9, 0x003ec00f, + 0xb003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bf0022f, + 0x208b002e, 0xc00ba502, 0xef00bb70, 0x6e220ab4, 0xd23fc089, 0x4022f10d, + 0xb0020d40, 0x89e02ec0, 0x0bb002ec, 0x80bb003a, 0xc00bb002, 0xec00bb00, + 0x2ec00bb0, 0x022c00b8, 0x002ec00b, 0xb002f200, 0x40000000, 0x00000000, + 0xe0054c00, 0xb3002cc0, 0x4b30020f, 0x00a3002c, 0xc00b3000, 0x4e409080, + 0x28200a38, 0x024d00b0, 0x80282009, 0x10024200, 0xa2006c40, 0x1a3002c8, + 0x0093006c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x028c00b3, 0x002cc00b, + 0x3002f800, 0x50000000, 0x00000000, 0x60011e00, 0xb7802de0, 0x0b78021e, + 0x4087802d, 0xe00b7902, 0xde00b680, 0x2f602878, 0x025e00ad, 0x9021e20b, + 0x78025e00, 0xa5902d60, 0x1b6802de, 0x00b78129, 0xe00b7802, 0xde00b780, + 0x2de00b78, 0x021e00b7, 0x802de00b, 0x7802d800, 0x40000000, 0x00000000, + 0x48080c00, 0xf3003cc0, 0x0f30038c, 0x00e3003c, 0xc00f30c7, 0xc5189100, + 0x38040eb1, 0x03cc98f0, 0x0838c40d, 0xb4024040, 0xe2003cc4, 0x8f1003c8, + 0x00d3003c, 0xc00f3003, 0xcc00f300, 0x3cc01fb0, 0x038c00f3, 0x403cc00f, + 0x3003d202, 0x00000000, 0x00000000, 0x400dbc00, 0xff003fc0, 0x0ff083fc, + 0x00ff003f, 0xc48ff003, 0xfc08ff00, 0x3f440ef0, 0x07bc00d5, 0x007dc50c, + 0xf0039c00, 0xdf043f41, 0x0fd003f8, 0x40ff103b, 0xc00ff003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000, + 0xa805ec00, 0xfb003ec0, 0x0fb203ee, 0x00bb003e, 0xc01fd003, 0xb804e300, + 0x16000fb0, 0x03ec42c9, 0x0032000f, 0x10032c00, 0xf2003240, 0x0fe003ea, + 0x02cb021e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x001ec00f, + 0xb003ea04, 0x70000000, 0x00000000, 0xc8119c00, 0xb7042dc0, 0x0b7303bc, + 0x0087002d, 0xc00b7802, 0x1a008700, 0x01400b70, 0x02dcc085, 0x0229c00b, + 0x700a9c00, 0xb600a1c0, 0x0b6802f4, 0x0087002d, 0xc00b7002, 0xdc00b700, + 0x2dc00b70, 0x02dc00b7, 0x002dc00b, 0x7002f204, 0x60000000, 0x00000000, + 0xc0009e00, 0xb7802de0, 0x0b7802de, 0x00a7822d, 0xe00b1902, 0x87c0af80, + 0x05200b78, 0x02ce8085, 0x8d21e08b, 0xf8929e21, 0xb7c025e0, 0x0b7d02da, + 0x00a7802d, 0xe00b7802, 0xde00b780, 0x2de00b78, 0x02de00b7, 0x802de00b, + 0x7802f040, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc1, 0x0b30028c, + 0x0083002c, 0xc00bb502, 0x0f0083a0, 0x20c00b30, 0x02cc128b, 0x8c28f80b, + 0x30428f08, 0xb3c124c0, 0x0b3882cc, 0x80a3002c, 0xc00b3002, 0xcc00b302, + 0x2cc00b30, 0x02cc00b3, 0xc82cc00b, 0x3002d200, 0x30000000, 0x00000000, + 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800fe902, 0x9840eea0, + 0x37a00fa0, 0x03c802ce, 0x4031a80f, 0xe803ba00, 0xf6c02680, 0x0fe403f9, + 0x20aa003e, 0x800fa003, 0xe800fa00, 0x3e800fa0, 0x03e800fe, 0xc03e800f, + 0xa003fa00, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003a0, + 0x00f8013e, 0x000f8003, 0xe100f800, 0x3e048f84, 0x03e000f8, 0x003e000f, + 0x8023e180, 0xf8203a00, 0x0f8003e0, 0x0098013e, 0x000f8003, 0xe000f800, + 0x3e000f80, 0x03e000f8, 0x103e000f, 0x8003d200, 0x30000000, 0x00000000, + 0x0810e400, 0xf9003e40, 0x0f100326, 0x40f9003e, 0x408f980b, 0xa602c9c0, + 0x3e60079a, 0x02e500c9, 0x4032609e, 0x9003a440, 0xf900b240, 0x0f100324, + 0x04f9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f, + 0x90030200, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b900aa4, + 0x00b9002e, 0x400bd802, 0x34088100, 0x2271899e, 0x12e62489, 0x08a25248, + 0x10022704, 0xb90a2240, 0x0bd00224, 0x00f9002e, 0x400b9002, 0xe400b900, + 0x2e400b90, 0x02e400b9, 0x002e400b, 0x100a2000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b900224, 0x00b9002e, 0x400b9102, 0x24808900, + 0x2a580b90, 0x12e40089, 0x0026480a, 0x9002ad00, 0xbb012240, 0x4bb00025, + 0x00b9002e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400b9, 0x002e400b, + 0x90020604, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b10020c, + 0x40b1002c, 0x400b3102, 0x0c048910, 0x20400111, 0x02c40281, 0x10264008, + 0x94020400, 0xb1002040, 0x0b102a04, 0x40b1002c, 0x400b1002, 0xc400b100, + 0x2c400b11, 0x02c400b1, 0x002c400b, 0x10020201, 0x00000000, 0x00000000, + 0x380d6000, 0xf8003e00, 0x0f828321, 0x00f8003e, 0x000f8683, 0x20a0c840, + 0x3a000f84, 0x03e0a8c0, 0x4136000a, 0x8023a018, 0xf8023200, 0x4f82a321, + 0x00f8003e, 0x000f8003, 0xe000f800, 0x3e000f84, 0x03e000f8, 0x283e000f, + 0x80032e03, 0x50000000, 0x00000000, 0x980de400, 0xf9003e40, 0x0f9003e4, + 0x80f90136, 0x400fd207, 0x7400fd23, 0x3b400d92, 0x03e4003d, 0x213b400f, + 0xd003fc00, 0xfd047f40, 0x0fd013f5, 0x80e9003e, 0x400f9003, 0xe400f900, + 0x3e400f92, 0x03e400fd, 0x003e400f, 0x9003e606, 0x70000000, 0x00000000, + 0x1815e400, 0xf9003e40, 0x0f9003f4, 0x00f9043e, 0x400fd003, 0xb400d900, + 0x3f400cd0, 0x03f40ccd, 0x003f404d, 0x90033410, 0xfd0272c0, 0x8f9023f4, + 0x08c9013e, 0x410f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f, + 0x9003e600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e01, 0x0b8002e0, + 0x01b8002e, 0x000b8012, 0x20128a00, 0x2e000d80, 0x22200888, 0x002e000b, + 0x80822000, 0xb8002200, 0x0b8002e0, 0x0088002e, 0x000b8002, 0xe000b800, + 0x2e000b80, 0x82e000b8, 0x102e000b, 0x8002ce04, 0x30000000, 0x00000000, + 0x0805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0x84008100, + 0x2c400b10, 0x02840081, 0x002c400b, 0x12120401, 0xb9006040, 0x0b1002c4, + 0x00a1002c, 0x400b1002, 0xc400b100, 0x2c400b12, 0x02c400b1, 0x006c400b, + 0x1002c201, 0x70000000, 0x00000000, 0x18052400, 0xb9002e40, 0x0b9002e4, + 0x00b9042e, 0x400b9422, 0x24088900, 0x2e480a10, 0x02640289, 0x102e408b, + 0x94022480, 0xb9206260, 0x0b9102e4, 0x00b9002e, 0x400b9002, 0xe400b900, + 0x2e400b90, 0x02e400b9, 0x006e400b, 0x9002c604, 0x60000000, 0x00000000, + 0xa004a400, 0xf9003e40, 0x0f9003f4, 0x00b9003e, 0x408fd062, 0xa680d941, + 0x2e603bd0, 0x03e410cd, 0x203e684b, 0x9d0b2500, 0xf960a240, 0x8b9e03e4, + 0x22e9003e, 0x400b9003, 0xe400f900, 0x3e400f90, 0x03e400b9, 0x903e400f, + 0x9002e824, 0x70000000, 0x00000000, 0xa800a400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400b9101, 0xc640fb10, 0x3e400d90, 0x138400f9, 0x043e700f, + 0x9023e430, 0xf9043e41, 0x0f9813c4, 0x80c9003e, 0x400f9003, 0xe400f900, + 0x3e400f90, 0x03e400f9, 0x803e400f, 0x9003ea00, 0x60000000, 0x00000000, + 0x2800a000, 0xf8003e00, 0x0f8003e0, 0x00d8003e, 0x000f0503, 0xe150f840, + 0x3e044f80, 0x27e042c8, 0x0032100f, 0x8013a100, 0xf8003a00, 0x4f8003e0, + 0x00c8003e, 0x000f8003, 0xe000f800, 0x3e000e80, 0x03e000f8, 0x003e000f, + 0x8003ca84, 0x20000000, 0x00000000, 0x28142800, 0xba002e80, 0x0ba002f9, + 0x008a002e, 0x800be002, 0xf800baa0, 0x2d800be3, 0x02fb008e, 0x44b3b00b, + 0xa003b908, 0xb6003a80, 0x0ba002f8, 0x105a002e, 0x800ba002, 0xe800ba00, + 0x2e800ba0, 0x03a800ba, 0x002e800b, 0xe002ca00, 0x40000000, 0x00000000, + 0x28054c00, 0xb3002cc0, 0x0b3002cd, 0x8093002c, 0xc00b3082, 0xcc00b380, + 0x2cc01b3c, 0x02cf2083, 0x6024e819, 0xb0028e00, 0xb00828c0, 0x0b3002cc, + 0x0183002c, 0xc00b3002, 0xcc00b300, 0x2cc00a30, 0x028c00b3, 0x002cc00b, + 0x2002ca00, 0x50000000, 0x00000000, 0x20011c00, 0xb7002dc0, 0x0b7002db, + 0x8087002d, 0xc04b7002, 0xd400b601, 0x2d400b61, 0x02d00086, 0xc201420b, + 0xf0529900, 0xb50029c0, 0x4b7002cc, 0x0197002d, 0xc00b7002, 0x5c00b700, + 0x2dc00b70, 0x029c00b7, 0x002dc00b, 0x6022e840, 0x40000000, 0x00000000, + 0x28081e00, 0xf7803de0, 0x0f7803ff, 0x00d7803d, 0xe00f6802, 0xde00f590, + 0x2de08f78, 0x02ca10cf, 0x8035e00b, 0x78839e10, 0xf58019e0, 0x8f7803de, + 0x0047802d, 0xe00f7803, 0xde00f780, 0x3de00e7a, 0x039e00f7, 0x803de00f, + 0x6803e802, 0x00000000, 0x00000000, 0x080dac00, 0xfb003ec0, 0x0fb003fa, + 0x00eb003e, 0xc11fe913, 0xe800f800, 0x7ec00ff8, 0x03e800ff, 0x903ec00f, + 0x7603a400, 0xf9003ec0, 0x0fb003ec, 0x10fb003e, 0xc00fb003, 0xec00fb00, + 0x3ec00fb0, 0x03ac00fb, 0x003ec00f, 0xa003c206, 0x60000000, 0x00000000, + 0x4005fe00, 0xff803fe0, 0x0ff80336, 0x00ff803f, 0xe00ff803, 0x3e40cf90, + 0x3fe40fd9, 0x033a00fd, 0x803fa10f, 0xf383be00, 0xdd813be0, 0x0cf8033e, + 0x04ff803f, 0xe00ff803, 0xfe00ff80, 0x3fe00ff8, 0x83fe00ff, 0x8033e00f, + 0xe803f000, 0x70000000, 0x00000000, 0xa8019c00, 0xb7002dc0, 0x0b700211, + 0x00b7002d, 0xc00bf002, 0x14608400, 0x3d404bf0, 0x02504036, 0x002d440e, + 0xf0021840, 0x850029c0, 0x0a70421c, 0x00b7002d, 0xc00b7002, 0xdc00e700, + 0x3dc00b70, 0x03dc00b7, 0x0835c00b, 0x6002fa04, 0x60000000, 0x00000000, + 0x00109c00, 0xb7002dc0, 0x0b30021c, 0x00b7002d, 0xc00b6102, 0x04008702, + 0x2d404b70, 0x065c00b5, 0x002d400b, 0x7326b820, 0x9d0023c0, 0x0930021c, + 0x20b70025, 0xc00b7002, 0xdc00b700, 0x2dc00b70, 0x02dc00b3, 0x0021c00b, + 0x6002d400, 0x20000000, 0x00000000, 0x6014cc00, 0xb3002cc0, 0x0b30000c, + 0x0033002c, 0xc08b3e06, 0x01208040, 0x28680b30, 0x024800b3, 0x812c400b, + 0x38820804, 0x019008c0, 0x0b30020e, 0x80b3002c, 0xc00b3002, 0xcc00a300, + 0x28c00b30, 0x02cc00b3, 0x4024c00b, 0x2002d804, 0x30000000, 0x00000000, + 0x2c15ac00, 0xfb002ec0, 0x0fb0032c, 0x00fb003e, 0xc0039482, 0x2700c9f0, + 0x2e500f80, 0x092000bb, 0x883e521b, 0xfc23a140, 0x5b4022c1, 0x89bd8a0d, + 0x00fb003e, 0xc00bb003, 0xec00fb00, 0x2ec00ff0, 0x03ec00fb, 0x4032c00f, + 0xa003da04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0f3007fc, + 0x00fb013e, 0xc00ff40f, 0xe402f800, 0x3e540ff4, 0x238404fe, 0x203e080e, + 0xb123e000, 0xf9403ec4, 0x0e3003e4, 0x00fb003e, 0xc00fb003, 0xec00fb00, + 0x3ec00bb0, 0x03ac00fb, 0x003ec00f, 0xa003e400, 0x30000000, 0x00000000, + 0x0510fc00, 0xff003bc0, 0x0ff0033c, 0x80ff003f, 0xc00f5903, 0x3c10eda0, + 0x3f804ff0, 0x03f010cf, 0x9033c00e, 0xf0037c10, 0xff083bc0, 0x4ff003fa, + 0x00cf003f, 0xc00ff003, 0xfc00ff00, 0x3fc00ff0, 0x43fc00f7, 0x0833c00f, + 0xe003f004, 0x30000000, 0x00000000, 0x81006c00, 0xbb002ec0, 0x0bb00b2c, + 0x00bb002e, 0xc00bb202, 0xea10b880, 0x3aa00bb7, 0x0263488b, 0x0a20f308, + 0xb0022780, 0xb9c92ec0, 0x03b002a2, 0x428b002e, 0xc00bb002, 0xec009b00, + 0x2ec00bb0, 0x02ec00bb, 0x002ac00b, 0xa002e140, 0x10000000, 0x00000000, + 0x80056c00, 0xbb002ec0, 0x0bb00264, 0x00bb002e, 0xc00b9002, 0x2600bb00, + 0x2e620bb0, 0x02e90481, 0x0022210a, 0x3002ea14, 0xbb802ec0, 0x0bb002ac, + 0x018b042a, 0xc00bb002, 0xec00bb00, 0x2ec00bb0, 0x02ec00bb, 0x0022c00b, + 0xa002e000, 0x40000000, 0x00000000, 0x08000c00, 0xb3002cc0, 0x0b30020c, + 0x00b3002c, 0xc09b3002, 0x8400b000, 0x20400b30, 0x02c00083, 0x00a20108, + 0x30024800, 0xb1002cc0, 0x0b3002a6, 0x0083002c, 0xc00b3002, 0xcc009300, + 0x2cc00b30, 0x12cc00b3, 0x0028c00b, 0x2002c201, 0x00000000, 0x00000000, + 0x00006c00, 0xfb003ec0, 0x0fb0026c, 0x00fb003e, 0xc00fb003, 0x2410eb00, + 0x3e000fb0, 0x03e802cb, 0x0032400e, 0xf0036800, 0xfb003ac0, 0x1fb003a8, + 0x00cb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x0032c00f, + 0xa003e003, 0x50000000, 0x00000000, 0xa015fc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc09ff007, 0xf010fc01, 0x3b000ff0, 0x237c00ff, 0x023f400f, + 0xf0139800, 0xf5007dc1, 0x0ff00330, 0x00ff003f, 0xc00ff003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xe003f806, 0x70000000, 0x00000000, + 0xc005fc20, 0xe4803320, 0x0ff343d2, 0x40cf0431, 0x200d5803, 0xf200f480, + 0x3d200ef8, 0x03d200fd, 0x0037200f, 0xd8033200, 0xfc943310, 0x0ec0023e, + 0x40cc4033, 0xf00cc003, 0x3200cf80, 0x3fe01cf8, 0x037e00f7, 0x8037c00d, + 0xf2033000, 0x70000000, 0x00000000, 0x8018dd00, 0x8a002260, 0x2df552e0, + 0x00afd022, 0x83089802, 0xe208b881, 0x2e2028a8, 0x02e200b8, 0x9022200b, + 0x9800a200, 0xe0203210, 0x088c022c, 0x80a8503e, 0xc0888481, 0xe202db80, + 0x2ee00ab8, 0x02ee00bb, 0x802bd008, 0x7302a006, 0x30000000, 0x00000000, + 0x0805cca0, 0xa0002200, 0x023232c0, 0x80a30020, 0x080a3006, 0xc000b000, + 0x2c000830, 0x02c009b1, 0x0060000b, 0x90020000, 0xb800a019, 0x0a04024c, + 0x0010a020, 0xc8080b26, 0x8c008304, 0x2cc01830, 0x124c01ab, 0x0028ce09, + 0x30820201, 0x70000000, 0x00000000, 0xc005ac00, 0x89002ae0, 0x0bb042ec, + 0x202b0020, 0xd90ab002, 0xe220b8c0, 0x2e2288b8, 0x02e208b9, 0x2026600b, + 0x9802a200, 0xbb042240, 0x08b0220c, 0x048a022c, 0xc00a8802, 0x6c029b00, + 0x2ec01ab0, 0x02ec00bb, 0x002ac190, 0xb002b000, 0x60000000, 0x00000000, + 0x0015ec00, 0xe010b212, 0x2eb001e0, 0x00e30012, 0x202e9002, 0xe200f881, + 0x3c2008b8, 0x03e220f8, 0x00b2300b, 0x0a232320, 0xf0603210, 0x2e84032c, + 0x00d88032, 0xc00c8013, 0xa182cb00, 0x3cf608b0, 0x236c00e3, 0x803ec00d, + 0xb0231004, 0x70000000, 0x00000000, 0xa001bc00, 0xff803740, 0x2df023f5, + 0x00fb00bf, 0x0005fc01, 0x7000dc00, 0x3f000ce0, 0x03f000f6, 0x803b400f, + 0xe003f408, 0xec4278a4, 0x8f410bfc, 0x22f7a8bf, 0xc26df003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00ff, 0x903ec08f, 0xf003e800, 0x60000000, 0x00000000, + 0xc010ac00, 0xc8003a88, 0x0fb003e9, 0x00df0836, 0xd00cb103, 0x6080f860, + 0x72100db0, 0x83e140eb, 0x003e1008, 0xb50b2510, 0xfb4872d4, 0x2cb003ec, + 0x00c90002, 0xc50cb803, 0x2d20cb00, 0x3ecc0cb0, 0x23ec00fb, 0x003ac80d, + 0xb0c33004, 0x20000000, 0x00000000, 0xc8053c02, 0x895020c1, 0x03f002ec, + 0x080fe02a, 0xc00db543, 0x2200b860, 0x16030898, 0x02e0098b, 0x002e600c, + 0xb5036400, 0xbb8822c4, 0x0db252ef, 0x08db083e, 0xe08db043, 0x4c02db00, + 0x2ef08ab0, 0x02ec0039, 0x8037d008, 0xf0837200, 0x40000000, 0x00000000, + 0xc0046c00, 0x80002850, 0x0b3000e0, 0x11b3002c, 0x80003404, 0x4200b040, + 0x20004930, 0x428084b1, 0x00282018, 0x18224200, 0xb0402020, 0x880812cc, + 0x48a041ec, 0xd0088042, 0x43508305, 0x2cf10830, 0x12cc0013, 0xb062d00a, + 0xb8123800, 0x10000000, 0x00000000, 0x60105e40, 0x8c8821e0, 0x0b7902fa, + 0x05a7802b, 0xe109d802, 0x5220bc80, 0x2730086a, 0x06f20896, 0x802d3049, + 0x78021e00, 0xb78021e4, 0x087902de, 0x04959025, 0xe0097402, 0x16421780, + 0x2fc00a78, 0x02de00b7, 0x8065e40a, 0x78125804, 0x10000000, 0x00000000, + 0x48084c00, 0x81402846, 0x0f3002c4, 0x00f3003c, 0x800c3243, 0x4040b000, + 0x20040d30, 0x83c040b3, 0x013cce28, 0x300244e0, 0xb020a094, 0x080503ec, + 0x04eb023e, 0xc00cb10a, 0x4c00c302, 0x2cc40c30, 0x03cc00d3, 0x0038c00e, + 0x30031a02, 0x10000000, 0x00000000, 0x4015bd00, 0xfd0037c1, 0x0ff043fc, + 0x489f000f, 0xc00ff003, 0xbc10fe00, 0x3f008ff2, 0x03f0006f, 0x003dc50e, + 0x7003fc40, 0xff001fc5, 0x0ff102fc, 0x08bf003f, 0xc00ff003, 0xdc02ff00, + 0x3dc80ef0, 0x03fc40ff, 0x117fc20c, 0xf183d004, 0x60000000, 0x00000000, + 0x0805ec42, 0xcb8036c0, 0x0fb5136c, 0x09c73836, 0xe00cb027, 0xe000f802, + 0x7e001fb8, 0x07a000f0, 0x80b2400e, 0x90032000, 0xe3003240, 0x0d3003ae, + 0x00ca0032, 0xc00f8003, 0x2120cb02, 0x3ec01cb0, 0x036c00fb, 0x0036c20d, + 0xb4030200, 0x70000000, 0x00000000, 0xc8199c80, 0x870021c1, 0x0e73021c, + 0x00a70023, 0xc14a7022, 0xd410b400, 0x2d004b60, 0x021000b6, 0x00254083, + 0x70021c00, 0xb70035c0, 0x4870021c, 0x08230021, 0xc08e7023, 0x5c00d700, + 0x2d008a70, 0x02dc00b7, 0x0061c908, 0x33023206, 0x60000000, 0x00000000, + 0x21009e00, 0x95c021e0, 0x0b78069e, 0x00878021, 0xe3087802, 0xd208b480, + 0x6d208bf8, 0x029200bf, 0x802de00b, 0x780a1600, 0xbf8021e0, 0x0878029e, + 0x10078261, 0xe00b3c02, 0x5e108780, 0x2de20878, 0x22de00bf, 0x8025e809, + 0x7a020800, 0x20000000, 0x00000000, 0x6804cc00, 0x818020e0, 0x0a30028e, + 0x00a30020, 0xe08a3802, 0xcd30b340, 0x2ce00b30, 0x020d80b3, 0x582cc00b, + 0x31820d80, 0xbb9020c4, 0x0834620c, 0x04a388a8, 0xc00a3812, 0x4f549300, + 0x2cd80a30, 0x42cc01b3, 0x9060c048, 0x30023200, 0x30000000, 0x00000000, + 0xe815e800, 0xde4035a8, 0x4fa0039b, 0x80ca0133, 0x909ca083, 0xf801f640, + 0x3fb20fea, 0x03b891be, 0xc03b840e, 0xec021904, 0xfe50a3a0, 0x6ce013a8, + 0x10ce4832, 0x800fec03, 0x49508a00, 0x3f804ca0, 0x03e800fa, 0x00368005, + 0xa00a3a04, 0x70000000, 0x00000000, 0x4801a000, 0xf84abe00, 0x0e000920, + 0x20f800ba, 0x020f8423, 0xe100f848, 0x3e121f80, 0x03a100f8, 0x00321087, + 0x8003e008, 0xf8403e10, 0x0e8153e0, 0x00f80036, 0x100f8203, 0xe000f800, + 0x3e000f80, 0x00e000f8, 0x003e010f, 0x8003d200, 0x60000000, 0x00000000, + 0x08108400, 0xd9003e40, 0x0d900324, 0x10d91032, 0x400f9463, 0xe680f900, + 0x32400f91, 0x03e680f9, 0x003e6087, 0x900b2444, 0xc9803262, 0x4e10a364, + 0x00f94032, 0x640f9103, 0x6c80c900, 0x3e500c90, 0x03e404f9, 0x80384808, + 0x18030204, 0x20000000, 0x00000000, 0x80046402, 0x89002674, 0x08900224, + 0x088180b2, 0x400b9c02, 0xe700b9c0, 0x2a545b98, 0x13a608b9, 0x002e7c0e, + 0x18022604, 0xd9802278, 0x089042a7, 0x01b90836, 0x400b9402, 0xa720a900, + 0x2c700d90, 0x02e400b1, 0xd0224068, 0x9c022000, 0x10000000, 0x00000000, + 0x38052400, 0x99002e42, 0x59904a24, 0x00990022, 0x400a9402, 0xe400b928, + 0x62400b90, 0x02e400b9, 0x032ec00b, 0x920a2400, 0x89102044, 0x08900264, + 0x40b10022, 0x404b10c2, 0x24008901, 0x2e410990, 0x02e400b9, 0x402a420a, + 0x96020e00, 0x40000000, 0x00000000, 0x28140500, 0x83422440, 0x09140225, + 0x10810020, 0x500b1002, 0xcc15b100, 0x28c00b30, 0x028400b1, 0x002c400a, + 0x100a0400, 0x91122045, 0x38100204, 0x40b11024, 0xc44b1102, 0x8400a100, + 0x0ec08910, 0x02c400b9, 0x0420440a, 0x110a0a05, 0x00000000, 0x00000000, + 0xb80d4000, 0xd8003e00, 0x0d000300, 0x00d800a2, 0x004e8013, 0xe000b800, + 0x32000b80, 0x43e800f8, 0x293e000f, 0x80162000, 0xca40b01a, 0x2c828349, + 0x00b86832, 0x104f86c3, 0x2000c800, 0x3e000d80, 0x03e000f8, 0x00381a0e, + 0x86870e03, 0x50000000, 0x00000000, 0x9801e500, 0xf7003740, 0x0e9401f4, + 0x10f9403b, 0x400fd003, 0xfc00fd00, 0x3f400f70, 0x03fc01fd, 0x013f410f, + 0x5013f400, 0xfd203f48, 0x0fd003e4, 0x80fd203e, 0x480fd203, 0x8401f904, + 0x3dc10f90, 0x43e410f5, 0x003e490d, 0x9207e604, 0x70000000, 0x00000000, + 0x9805e440, 0xcd003940, 0x0e9303e4, 0x00f50432, 0x440dd003, 0x9400fd00, + 0x3f410fd0, 0x033400c9, 0x203b404f, 0x500bf408, 0xfd003344, 0x0cd20334, + 0x00cd3033, 0x402cd023, 0x1400c900, 0x3d400c90, 0x03e404f5, 0x0237440c, + 0xd2030600, 0x70000000, 0x00000000, 0x3818e044, 0xd8292200, 0x288302e0, + 0x24e80036, 0x000d8006, 0xe0041800, 0x2e008b80, 0x436008a8, 0x002e0003, + 0x8013e000, 0xb8080204, 0x0e8002a0, 0x82a830a2, 0x0208a082, 0xa008d800, + 0x2e000a80, 0x02e000b8, 0x00220408, 0x828a0e06, 0x30000000, 0x00000000, + 0x48058400, 0x8120aa40, 0x021202c4, 0x80b11420, 0x40081002, 0x8400b100, + 0x0c404b90, 0x06840081, 0x10284003, 0x900ac41c, 0xb104a240, 0x08110204, + 0xa0812220, 0x48081102, 0x06008100, 0x2c400810, 0x16c404b1, 0x002c4028, + 0x13021200, 0x20000000, 0x00000000, 0x1800a400, 0x99102240, 0x0a9002e6, + 0x20a90026, 0x44199102, 0xe4809940, 0x2e600b91, 0x426c00a9, 0x202e4391, + 0xb00ae410, 0xb1402244, 0x0a9082a4, 0x00830122, 0xc0089062, 0xa6109900, + 0x2e401b90, 0x06e400b9, 0x10284048, 0x10020600, 0x20000000, 0x00000000, + 0xa015e400, 0xc1003a60, 0x0e9003e5, 0x00f100f2, 0x520c9043, 0xa400f9c1, + 0x2e624f10, 0x03a440c9, 0x493a544f, 0x9303e480, 0xf9103268, 0x0c9c0324, + 0x00c9a032, 0x400c9403, 0x0400c904, 0x3e400c90, 0x03e405f9, 0x013e400c, + 0x90032804, 0x70000000, 0x00000000, 0xc801a400, 0xf9803e48, 0x2d9043e4, + 0x00f9043a, 0x410f9807, 0xe430f9a0, 0x3e420f98, 0x036601f9, 0x823e620f, + 0x9883e404, 0xf9023640, 0x0e920be4, 0x01f9283e, 0x400f9a03, 0xe420f900, + 0x3e500e90, 0x03e400f9, 0x80364007, 0x9003f200, 0x60000000, 0x00000000, + 0x08108008, 0xf8013601, 0x0c8003e0, 0x00f81432, 0x100d8003, 0xe102c800, + 0x3e104f80, 0x0ba100f8, 0x403e140f, 0x8043a100, 0xf8083208, 0x0c000320, + 0x80c84032, 0x084f8703, 0x2040c800, 0x3e000e80, 0x03e000f8, 0x203a000e, + 0x80010204, 0x20000000, 0x00000000, 0x20052800, 0xbe5021a1, 0x28a002e8, + 0x084e8122, 0x8008e602, 0xfb008e82, 0x0f800be4, 0x021900ba, 0x022fa10b, + 0x64062880, 0xee40a1b0, 0x28a802ba, 0x80cecc37, 0xa24bec02, 0x3b00aa00, + 0x2db688a0, 0x00e800e6, 0x2027a028, 0xec0a0a00, 0x40000000, 0x00000000, + 0x28054c00, 0xb34124e6, 0x003002cc, 0x00a3882a, 0xc0093482, 0xcd0083a0, + 0x2cd40b3a, 0x004d20b3, 0x002cf00b, 0x3d028c14, 0xa31020f0, 0x0a38022e, + 0x02a34022, 0xc00bb002, 0x0c008301, 0x2cf10a30, 0x00cc00a3, 0x402ce028, + 0x32020a00, 0x50000000, 0x00000000, 0x90111c80, 0xbf0963c0, 0x087002dc, + 0x80870023, 0xc0095006, 0xd2309508, 0x2d010b44, 0x065d00b7, 0x002d404b, + 0x700a1c00, 0xa70021d0, 0x0a50a29c, 0x08870005, 0xc08b3002, 0x1c00a701, + 0x2f800870, 0x02dc00af, 0x0065c308, 0x70922004, 0x40000000, 0x00000000, + 0x88081e20, 0xf78035e0, 0x0c7a23de, 0x21e780b9, 0xe00d5863, 0xd2004784, + 0x3d208b48, 0x035e00f7, 0x803d600b, 0x78029e00, 0xef8433e0, 0x0e38033e, + 0x08e38011, 0xe00b780b, 0x1602c780, 0x3de00e78, 0x03de00e6, 0x8038a00e, + 0x38232202, 0x00000000, 0x00000000, 0x0815ac88, 0xf3003ec0, 0x0fb303ec, + 0x00eb043c, 0xd80e8013, 0xe000ea06, 0x1e000f00, 0x03ac00bb, 0x003e408b, + 0xb00ae400, 0xab003ec0, 0x0d9003ec, 0x00eb003e, 0xc00fa003, 0xec00fb00, + 0x3ec00eb0, 0x03ec00eb, 0x003ac00f, 0x9003c204, 0x60000000, 0x00000000, + 0xc004be20, 0xff923fe8, 0x4ffc233e, 0x20cf803b, 0xf31f5903, 0x92c8ef80, + 0x3f240fc8, 0x13fe08ff, 0x90336408, 0xf9077c50, 0xcf803be0, 0x2cd903fe, + 0x00ff8133, 0xe02df801, 0x3a02cf80, 0x3de00df9, 0x03fe40fd, 0x80336008, + 0xf8030000, 0x20000000, 0x00000000, 0xa8189c40, 0xbf302100, 0x0ef0023c, + 0x60872029, 0xc01e5502, 0x90c08710, 0x2d154344, 0x025400b7, 0x0039110d, + 0x53071c20, 0xfd0003c0, 0x085393d4, 0x00b51023, 0x84085200, 0x9c008700, + 0x2dc18a70, 0x02dc00b7, 0x00294008, 0x720a2a06, 0x20000000, 0x00000000, + 0x10009c00, 0xb70809c8, 0x1b70021d, 0x0081040d, 0xc00b5112, 0xd0c0a700, + 0x2d040b40, 0x825860b7, 0x01674009, 0x700a3c40, 0x86022100, 0x285006d8, + 0x00b60021, 0x400870c2, 0x5000a700, 0x2fc00870, 0x12dc01bf, 0x0821840a, + 0x60220000, 0x20000000, 0x00000000, 0x60048c00, 0xb3c82010, 0x1a30220c, + 0x0481002c, 0xd00a0902, 0x4201a08a, 0x2c108304, 0x804100b3, 0x05281209, + 0x18220580, 0xa0c0a820, 0x08180080, 0x04b8d020, 0x00000c2a, 0x4000a304, + 0x2ce80a30, 0x02cc01b3, 0x802ac042, 0x80020800, 0x20000000, 0x00000000, + 0x7815bc00, 0xf9413ed2, 0x0ff00b3c, 0x00cb003f, 0xf00f9803, 0xe0c1e9e0, + 0x2e261f8c, 0x03ed40fb, 0xa036400c, 0xb8032e00, 0x0b082ad4, 0x0cb402ec, + 0x00fbc032, 0xc04cb803, 0x4360ab04, 0x3e500cb0, 0x03ec00fb, 0x8032c12e, + 0xb0022a04, 0x60000000, 0x00000000, 0x8000cc00, 0xfb003ed0, 0x0fb003ec, + 0x00f8400a, 0xc40e9023, 0xa0009940, 0x3e001f80, 0x03e9047b, 0x0a3e411f, + 0xb10bac04, 0xfa402614, 0x0f9203e9, 0x04fa20be, 0x500e3483, 0xa000db00, + 0x3ec40fb0, 0x03ec00fb, 0x003e9041, 0xa403e000, 0x30000000, 0x00000000, + 0xa010fc00, 0xcd003f22, 0x0d70033c, 0x00df10b3, 0xc29cd003, 0xf040dd00, + 0x3f040fc0, 0x11f500c3, 0x0033000f, 0xd00b3c01, 0xfd4837d0, 0x4f700335, + 0x008dc033, 0x880cd803, 0x3000cf02, 0x3fd00cf0, 0x03fc00ff, 0x203b000c, + 0xb0230844, 0x30000000, 0x00000000, 0xa5046c00, 0x8bc02428, 0x08b0122c, + 0x04800936, 0xc0088c42, 0xc1008880, 0x2e100b8c, 0x12c310db, 0x002a300b, + 0x1c022650, 0xb8c13e20, 0x0b9042a1, 0x00a8c622, 0x100d8343, 0xe0648b00, + 0x38d80db0, 0x02ec00b3, 0xc0223508, 0x89022840, 0x10000000, 0x00000000, + 0x80052c02, 0x8bc02ec4, 0x08b0020c, 0x00ab0064, 0xc1088802, 0xe100a8c1, + 0x2e000a88, 0x06ec048b, 0x0422601b, 0xb8222400, 0xb30822c2, 0x0b90020d, + 0x04bb0420, 0xc008a002, 0x20008b00, 0x2ec008b0, 0x02ec00bb, 0x082e4208, + 0x90822000, 0x40000000, 0x00000000, 0x08140c04, 0x82002c00, 0x9830020c, + 0x10910064, 0xc0480012, 0xe000b000, 0x24010b00, 0x42c00093, 0x00680009, + 0x00020400, 0xb0002001, 0x0b100200, 0x04b00520, 0x0019000a, 0xe0008300, + 0x22c00930, 0x02cc00bb, 0x00240008, 0x00020205, 0x00000000, 0x00000000, + 0x800d7c00, 0xcb003e00, 0x0cf00b3c, 0x00e90237, 0xc1088003, 0xe000f800, + 0x3e000f80, 0x00e000cb, 0x0012000f, 0x90032400, 0xb8002200, 0x4f900a20, + 0x00900032, 0x000c0003, 0x2000cb02, 0x3ec00cb0, 0x03ec00fb, 0x003c002c, + 0x800b0003, 0x50000000, 0x00000000, 0xa011fc00, 0xff003700, 0x07f003fc, + 0x026d00bf, 0xc02fc013, 0xf012cc04, 0x7f010fc0, 0x43f004ff, 0x003d004f, + 0x4003d400, 0xfc003f00, 0x0fd007f0, 0x184c003f, 0x000fc001, 0xd005ff00, + 0x3bc00ff0, 0x03fc00f7, 0x003b000f, 0xc003e804, 0x70000000, 0x00000000, + 0xc005fe00, 0xff803fe0, 0x0ff0033e, 0x00ffc03b, 0xc80ef3a3, 0x9200f480, + 0x07200fc8, 0x037a00ac, 0x803da00f, 0xc803f200, 0xd7923fcb, 0x0c70033e, + 0x12d7803f, 0xe00ff003, 0xbe00f780, 0x3fe00ff8, 0x03fe00fc, 0x803f202c, + 0x5803f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb4022e, + 0x04b32020, 0xd808b402, 0x2200b881, 0x22204a88, 0x02e200ba, 0x8026a008, + 0x9803a080, 0x89052ed2, 0x08f902ac, 0x208b802e, 0xe00bbc03, 0x6e00bb80, + 0x2ee00bb8, 0x03ae00b8, 0x002e0008, 0x9802f004, 0x30000000, 0x00000000, + 0xc805cc00, 0xb30028c0, 0x0b34020c, 0x00a30028, 0xc60a3026, 0x4004b000, + 0x2e000a00, 0x020810b3, 0x002ec18a, 0x0002e0a1, 0xb2202cc9, 0x0930028c, + 0x80830028, 0xc00b3102, 0x8c00b300, 0x2cc00b30, 0x02cc00b0, 0x002c400a, + 0x0002f201, 0x70000000, 0x00000000, 0xc011ac00, 0xbb002ec0, 0x1b30222c, + 0x00bb0022, 0x800bb2ca, 0x62003b20, 0x22800a80, 0x02ea003b, 0x0426d008, + 0x9402a220, 0x89012e45, 0x08b022ac, 0x008b002e, 0xc00bb042, 0x2c00bb00, + 0x2ec00bb0, 0x02ac00b8, 0x002c408a, 0x8002f004, 0x60000000, 0x00000000, + 0x0415ec00, 0xfb003ac0, 0x0fb0032c, 0x00fb003a, 0xc28eb002, 0x6280f848, + 0x34000f8c, 0x036f30e9, 0x001c1047, 0xa003c300, 0xfac01ec0, 0x0cb0018c, + 0x00cb003e, 0xc00fb002, 0xac00fb00, 0x3ec00fb0, 0x03ec00fa, 0x203e000e, + 0xb003f404, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff00bfc, + 0x007f001f, 0x8a04e043, 0xb400fc80, 0x1f484df2, 0x07f0009f, 0x0a3f648f, + 0xf900f400, 0xdcc43d40, 0x0ff002fc, 0x00ff003f, 0xc00f3003, 0xfc00ff08, + 0x3fc00ff0, 0x03fc00fe, 0x003f040d, 0xf003e800, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb003ec0, 0x0fb803ec, 0x08fb0835, 0xd00d5487, 0xe500eb10, + 0x3ae05fb6, 0x03ed14db, 0x1036180e, 0xa607e500, 0xfa703789, 0x0fb0932c, + 0x02cb1032, 0xc00fb003, 0x2c00fb10, 0x3ac00db0, 0x03ec00fa, 0x803a620f, + 0xa00b3004, 0x20000000, 0x00000000, 0xd8052c00, 0xbb002ec0, 0x0bf002ec, + 0x00fb0822, 0x9000bc00, 0xe42083c0, 0x22f10eb6, 0x0221808b, 0xc43e6808, + 0xb053a488, 0x68420250, 0x0878036d, 0x808b8036, 0xc00cf002, 0x2c00bb40, + 0x22c00bb0, 0x02ec00ba, 0xd022600b, 0xa0023600, 0x40000000, 0x00000000, + 0xe0054c00, 0xb3002cc0, 0x4b3002cc, 0x00bb4024, 0xf5033d04, 0xc2102008, + 0x28080b04, 0x06899590, 0x800c800a, 0x3402c000, 0x91002ce0, 0x083c028e, + 0x80830020, 0xc00b3002, 0x0c04b3c0, 0x28c00930, 0x02cc0431, 0x0428800b, + 0x10023800, 0x50000000, 0x00000000, 0xf0011e00, 0xb7802de0, 0x0b7d02de, + 0x00b78021, 0xe0086906, 0xf700b784, 0x29e00af8, 0x061200a6, 0x8029a05a, + 0x78029600, 0xaf802de2, 0x287886de, 0x00878025, 0xe008782a, 0x1e00b780, + 0x21e00b78, 0x02de00b5, 0x8021a08b, 0xd8023c00, 0x40000000, 0x00000000, + 0x48080c00, 0xf3003cc0, 0x0f3003cc, 0x40b30034, 0x410f1002, 0xc408e004, + 0x28404b35, 0x43c84453, 0x042ccc0e, 0x3242c440, 0xb0103ec0, 0x0e3107ac, + 0x01c30030, 0xc00f3003, 0x0c00f300, 0x38c00d30, 0x03cc00f9, 0x0038c40f, + 0x00031202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc, + 0x102f003f, 0xc08ff043, 0xfc00cf10, 0x37c00670, 0x17dc00df, 0x113fc41d, + 0xf003f441, 0xff0573c4, 0x0ef1037c, 0x40ff003f, 0xc00ef003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00fd, 0x003fc40f, 0xc803d002, 0x60000000, 0x00000000, + 0xa805ec00, 0xfb003ec0, 0x0fb90b2c, 0x00fb003f, 0x400af003, 0xc200d380, + 0x36800f80, 0x03ac04f9, 0x8036c04e, 0x30002000, 0xf9003f84, 0x0cb003ac, + 0x00cb003e, 0xc00ff803, 0x2c007b00, 0x3ec00fb0, 0x03ec00fb, 0x0032800f, + 0xb003ea00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7042dc0, 0x0b72021c, + 0x00b7042f, 0xe088e802, 0x14088700, 0x21c04f70, 0x02d810b7, 0x00a1410b, + 0x70021c00, 0xb7002ce0, 0x087702fc, 0x00a7002d, 0xc00b7803, 0x5c00b700, + 0x2dc00b70, 0x02dc00b7, 0x0021800b, 0x7002f024, 0x60000000, 0x00000000, + 0x80009e00, 0xb7802de0, 0x0b78021e, 0x00a7802d, 0x640a5902, 0x96059f80, + 0x21e00b78, 0x829f04bf, 0x8421e003, 0x780ade00, 0xb4802da0, 0x487a02de, + 0x0087802d, 0xe00b3802, 0x1e00b780, 0x2de00b78, 0x02de00b7, 0x8021e00b, + 0x6802e010, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b30020c, + 0x00b3002c, 0xf4083406, 0x0d008309, 0x20f20a3c, 0x82cf00b3, 0x4060f40b, + 0x38028c80, 0xb3002cc0, 0x083012ec, 0x00a3002c, 0xc00b3002, 0x4c00b300, + 0x2cc00b30, 0x02cc00b3, 0x80a0c00b, 0x2802d204, 0x30000000, 0x00000000, + 0xe815a804, 0xfa013e81, 0x0ba00328, 0x00ea002f, 0xb40eed83, 0xb904dec1, + 0xb3b00be8, 0x01ba00fe, 0x5031944e, 0xe8a3fa80, 0xf6403fb0, 0xa8a043a8, + 0x02ca003e, 0x800ba003, 0x2800fa00, 0x3e800fa0, 0x03e800fa, 0xa032800f, + 0x2803fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8403e0, + 0x04f8403e, 0x100f8403, 0xe100f853, 0x3a040f80, 0x03e181f8, 0x003a101f, + 0x84026004, 0xf8443e06, 0x0f8003e1, 0x00f8003e, 0x000f8003, 0xe000f840, + 0x3e000f80, 0x03e000f8, 0x003e000f, 0xc103d200, 0x10000000, 0x00000000, + 0x0810e400, 0xf9003e40, 0x0f9803e4, 0x00f9903c, 0x600d1003, 0x6460f900, + 0x3e400f90, 0x03e400f9, 0x013e418c, 0x90432500, 0xe9883040, 0x0e9113e4, + 0x00c9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x0032400c, + 0x90031204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9c02e4, + 0x0039402f, 0x4008dd10, 0x2400b984, 0x2e400b90, 0x02e600b9, 0xc12e5808, + 0x14022408, 0xc9302374, 0x089a22e5, 0x2089002e, 0x400b9002, 0xe400b900, + 0x2e400b90, 0x02e400b9, 0x40225088, 0x90022000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0a9602e4, 0x00b9082e, 0x4a09900a, 0x2404a910, + 0x2ed40b92, 0x02e460b9, 0x226a4408, 0x90020511, 0xab0022c0, 0x8a9002a4, + 0x0089602e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400b1, 0x00214008, + 0xd0020600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1102c4, + 0x00b1102c, 0x44081102, 0x0c00b300, 0x2c409b30, 0x02c40031, 0x000e4028, + 0x90020441, 0x891020c4, 0x081002c5, 0x0081002c, 0x401b1002, 0xc400b100, + 0x2c400b10, 0x02c400b5, 0x90216408, 0x50020201, 0x00000000, 0x00000000, + 0xb80d6000, 0xf8003e00, 0x0e0683e0, 0x00f8417e, 0x1a4da6a3, 0x2008f800, + 0x3e000b80, 0x03e000fa, 0x003e000c, 0xa0032100, 0xe840b21a, 0x0e8293e0, + 0x02c8003e, 0x000f8a83, 0xe000fa00, 0x3e000f80, 0x03e000f0, 0x40b2100c, + 0xc00b0e03, 0x50000000, 0x00000000, 0x980de400, 0xf9003e40, 0x0f9203e4, + 0x00f92437, 0x480ff20b, 0xf400fd00, 0x3f410fd0, 0x03f400f5, 0x003f400f, + 0xd00bf490, 0xef213fc8, 0x0f900364, 0x00f9003e, 0x401f9003, 0xe400f900, + 0x3e400f90, 0x03e400f9, 0x2216482f, 0x9003f602, 0x70000000, 0x00000000, + 0x9805e400, 0xf9003e40, 0x0f900324, 0x00fd007f, 0x400ed003, 0xb400fd00, + 0x3f400dd0, 0x07b400d5, 0x0437400f, 0xd013e400, 0x3d013740, 0x8fd00374, + 0x04c1003e, 0x400f9003, 0xe400f500, 0x3e400f90, 0x03e400fd, 0x0033400f, + 0xd003c604, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b802220, + 0x04b8042e, 0x00088022, 0x2000b804, 0x2e000380, 0x22200088, 0x002e000b, + 0x8002e000, 0x90002000, 0x0b804220, 0x00a8002e, 0x000b8002, 0xe000b800, + 0x2e000b80, 0x02e000b8, 0x0022800b, 0x8002de04, 0x30000000, 0x00000000, + 0x4805c408, 0xb1002c40, 0x0b100a04, 0x00b1002c, 0x400a1002, 0x8400a100, + 0x2c408390, 0x02241091, 0x002c4003, 0x1042c401, 0xb1002440, 0x8b100644, + 0x0081002c, 0x400b1102, 0xc400b100, 0x2c400b10, 0x02c400b1, 0x0020400b, + 0x1802d201, 0x70000000, 0x00000000, 0x18152400, 0xb9002e40, 0x0b900224, + 0x00bb002e, 0xc0083142, 0x2400bb02, 0x0e511b94, 0x0225808b, 0x204e580b, + 0x9002e4a8, 0x19022240, 0x0b900224, 0x00a9002e, 0x400b9002, 0xe400b900, + 0x2e400b90, 0x02e400b9, 0x0022400b, 0x9002d600, 0x60000000, 0x00000000, + 0xa015e400, 0xf9003e40, 0x0b900324, 0x04fd002f, 0x780ad803, 0xa6d0e9e0, + 0x3e400f1c, 0x020510d9, 0x202e504f, 0x9042e508, 0xfd403754, 0x0f900764, + 0x02c9003e, 0x401f9003, 0xe400f900, 0x3e400f90, 0x03e400fd, 0x00b3500f, + 0x9003f800, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f3083e4, + 0x04f9022e, 0x680f9823, 0xe600f928, 0x3e440f99, 0x0b661079, 0x883e408f, + 0x9023ee14, 0xd9085e60, 0x071023e4, 0x00fb003e, 0x400f9003, 0xe400f900, + 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003fa00, 0x60000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f800b20, 0x00f80036, 0x104f8403, 0x2020f800, + 0x3e090f80, 0x036050f8, 0x4036020e, 0x8107e000, 0xe8543a08, 0x4c830b60, + 0x40c80032, 0x000f8003, 0xe000f830, 0x3a000f80, 0x03e000f8, 0x1032102c, + 0x8003ca00, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba40228, + 0x00bee023, 0x8c0be002, 0x3880bea0, 0x6fa01be0, 0x203810be, 0xc223b098, + 0xe403e800, 0xee402390, 0x0de00239, 0x40da0036, 0x800ba002, 0xe800be00, + 0x22800ba0, 0x02e800ee, 0x00a38008, 0xe002ca00, 0x40000000, 0x00000000, + 0x28054c00, 0xb3002cc0, 0x0b30024c, 0x00b3e026, 0xd00b3082, 0x0f0cb3c6, + 0x2cf00930, 0x024c80b3, 0xc42ce00a, 0x0482ce40, 0xab8068d0, 0x183c062e, + 0x00830020, 0xc00b3002, 0xcc00b240, 0x28c00b30, 0x02cc00bb, 0x0020c008, + 0x3802ca04, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0934025c, + 0x00b7a021, 0xc00b7502, 0x1410b701, 0x25500b70, 0x021c00b6, 0xc029e24a, + 0x50069c00, 0xa62021f0, 0x09604218, 0x10978825, 0xc00b7002, 0xdc00b780, + 0x21c00b70, 0x02dc00a5, 0x20216008, 0x7082e800, 0x40000000, 0x00000000, + 0xa8081e04, 0xf7803de0, 0x0f79035e, 0x04ffc075, 0xe00f3a03, 0x1e04f780, + 0x2de10b78, 0x035e04b6, 0x801de00a, 0x5806d220, 0xe5c039e0, 0x0c38033a, + 0x00c68a31, 0xe00b7803, 0xde00f682, 0x39e00f78, 0x03de00fe, 0xc033a00c, + 0x7803ea22, 0x00000000, 0x00000000, 0x084dac00, 0xfb003ec0, 0x0fb003ac, + 0x00ff803f, 0xe40ff82b, 0xe800fb00, 0x3e000f00, 0x03e800fa, 0x0130c00d, + 0x9003e180, 0xff802fe4, 0x0fb003a8, 0x00f8003e, 0xc00fb003, 0xec00fa00, + 0x3ec00fb0, 0x03ec00ed, 0x823f640f, 0xb003c206, 0x60000000, 0x00000000, + 0x4005fe00, 0xff803fe0, 0x0ff803be, 0x00ff803f, 0xe10cd803, 0x7650cf91, + 0x39e40cfa, 0x033e00e6, 0x80b7e14d, 0xf8477440, 0xff80b320, 0x0cf80336, + 0x08cf801f, 0xe00ff803, 0xbe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x803fe00f, + 0xf903c000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b50021c, + 0x00b7002d, 0xc00d5002, 0xd4428404, 0x2dc42872, 0x021c00b6, 0x0c25c80b, + 0x7006d420, 0xb7102311, 0x087043fc, 0x0087002d, 0xc00f7003, 0x9c00b500, + 0x2dc00b70, 0x02dc00b7, 0x003d480b, 0x7002ea84, 0x60000000, 0x00000000, + 0x10009c00, 0xb7002dc0, 0x0b50029c, 0x40b70028, 0xc0095102, 0xdc088702, + 0x05c50a73, 0x4a9440b4, 0x00290309, 0x7002d040, 0xb7002144, 0x08510210, + 0x40a4002d, 0xc00b7002, 0x9c00b600, 0x2dc00b70, 0x02dc00b6, 0x002d804b, + 0x7012c000, 0x20000000, 0x00000000, 0x6014cc08, 0xb3002cc0, 0x0b00220c, + 0x00b3002c, 0xd4993000, 0xc90880e6, 0x2cf10a0c, 0x060200b0, 0x800c108b, + 0x3482c320, 0x3ba020c0, 0x881006a8, 0x00b0002c, 0xc00a3002, 0x8c00b000, + 0x2cc00b30, 0x00cc00b3, 0x002a400b, 0x3402c804, 0x30000000, 0x00000000, + 0x2815ac00, 0xfb003ec0, 0x0ba003ac, 0x00f8003e, 0x200daa13, 0xec488b20, + 0x7e560ebc, 0x032d60f2, 0x003ad04d, 0x14126e00, 0xf8e032e2, 0x08b0222c, + 0x02eb003e, 0xc00bb003, 0xac007200, 0x3ec00fb0, 0x03ec00fb, 0x002ec00f, + 0xb903ea04, 0x60000000, 0x00000000, 0x9000ec00, 0xfb003ec0, 0x0fa013ec, + 0x05fd433f, 0x820fe487, 0xef00fb42, 0x7e5001b3, 0x03e400f8, 0x4002088b, + 0x90036401, 0xff403dd0, 0x2f0023ec, 0x008b003e, 0xc00fb003, 0xec00fb00, + 0x3ec00fb0, 0x23ec01fd, 0x003fc00f, 0xb843e000, 0x30000000, 0x00000000, + 0x9010fc00, 0xff003fc0, 0x0fe9037c, 0x00ee003f, 0x200ff403, 0xff08fca0, + 0x33c097f0, 0x03fe406e, 0x00b3c007, 0xd02b3a00, 0xff0003e2, 0x20a01338, + 0x00cca03f, 0xc00ff007, 0xfc00fe00, 0x33c01ff0, 0x03fc00fe, 0x003fa80c, + 0xfa03c044, 0x30000000, 0x00000000, 0x80046c00, 0xbb002ec0, 0x0bac022c, + 0x00eb802e, 0xe40bb443, 0xa824b002, 0x2a300b80, 0x06c11088, 0x0222340b, + 0x9c002008, 0xebf036f4, 0x00849368, 0x0088002e, 0xc01bb006, 0xec00bb00, + 0x2ac00fb0, 0x02ec00e9, 0x003ac008, 0xb002e000, 0x10000000, 0x00000000, + 0x80012c00, 0xbb002ec0, 0x0b04026c, 0x00a8102e, 0x400ba006, 0xe000bb00, + 0x2ab04bb0, 0x02e828aa, 0x2062c20b, 0x9c102c90, 0xbb002e80, 0x08b2022c, + 0xa08b002e, 0xc00bb012, 0xec04bb08, 0x22c00bb0, 0x02ec04bb, 0x042ec028, + 0x9002e000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b00020c, + 0x00a3002c, 0xc00b3062, 0x8008b804, 0x20804930, 0x02c000a8, 0x0020000b, + 0x90020401, 0xa300acc0, 0x0a10024c, 0x0983002c, 0xc00b3006, 0xcc00b100, + 0x68c00a30, 0x024c00a3, 0x0228c008, 0x1002c211, 0x00000000, 0x00000000, + 0x800d6c00, 0xfb002ec0, 0x0f00036c, 0x00eb003e, 0xc00fb003, 0xec00f800, + 0x7a800bb0, 0x02e000e8, 0x0022000f, 0x90032800, 0xf30032c0, 0x0c900328, + 0x0288003e, 0xc00bb002, 0xec00fb00, 0x32c00bb0, 0x03ec00fa, 0x003e800c, + 0x9003c003, 0x00000000, 0x00000000, 0xa00dfc00, 0xff003fc0, 0x0fc003fc, + 0x00ff003f, 0xc00ff043, 0x9800fc04, 0x3f804f40, 0x23f0041c, 0x043f000f, + 0xd013f000, 0x7f0033c0, 0x0dd003f8, 0x04fc003f, 0xc00ff003, 0xfc00fd00, + 0x3fc00ff0, 0x03fc00ff, 0x003bc00f, 0xd003e807, 0x70000000, 0x00000000, + 0xc015fc20, 0xfc8037cb, 0x0cf30352, 0x12c70537, 0x240e7003, 0xd200ff82, + 0x2b200fc8, 0x037e08fd, 0x203f200c, 0xc0071210, 0xf4803d04, 0x07c413be, + 0x40d7803b, 0x300dd203, 0x34a0cc30, 0x33e408f9, 0x0b7c00cf, 0x20b30a0c, + 0xc0033000, 0x70000000, 0x00000000, 0x8000fe00, 0xb98021c2, 0x48f10a22, + 0x008fc02e, 0x0808fc02, 0xe200b980, 0x22200b98, 0x022e0039, 0xd02e600a, + 0x8c022200, 0xb8800e1c, 0x0985034c, 0x808b800a, 0x080c9903, 0xe7008820, + 0x3ac808b2, 0x02bf508f, 0xc022100a, 0x8002a006, 0x30000000, 0x00000000, + 0x0805cc09, 0xb00024c9, 0x08322280, 0x0083422c, 0x080a3402, 0x8000bb00, + 0x28000b90, 0x06cc0881, 0x002e0018, 0x01080010, 0xb0046c08, 0x8a0202ac, + 0x0c9304aa, 0x0009100e, 0x0000a040, 0x20400800, 0x028c0083, 0x10200008, + 0x00020201, 0x70000000, 0x00000000, 0xe015ac00, 0xb95022c0, 0x08b002a2, + 0x008b002c, 0x2008b002, 0xe200bb82, 0x02210bbc, 0x12ac003b, 0x802ee00a, + 0xb0822400, 0xbb142e00, 0x09b08a2c, 0x509b002a, 0x00019c42, 0xe2300909, + 0xa0d008a0, 0x82ac008b, 0x0022c00a, 0x8842b000, 0x60000000, 0x00000000, + 0x0001ec00, 0xf90036c0, 0x2cb013c3, 0x00cb0036, 0x300eb003, 0xa2007be0, + 0x3a288b88, 0x13ec08e8, 0x803c2208, 0x8c022180, 0xf8803e30, 0x0e0802ac, + 0x10da0c3a, 0x200d1843, 0x26106800, 0x32a40cb4, 0x03ac00cb, 0x00222624, + 0x8a030004, 0x70000000, 0x00000000, 0xa001bc00, 0xff023bc0, 0x8ff00270, + 0x00ff003f, 0x000ff003, 0xf000ff02, 0x3f000bd0, 0x023c20fa, 0x003fc00f, + 0x2c03fc40, 0xfe023fe6, 0x8dd943fc, 0x04ee103f, 0x908eb003, 0xdc12f74c, + 0xbb812ff9, 0x03cc02f7, 0x003de00f, 0x4003e800, 0x60000000, 0x00000000, + 0xc000ac20, 0xeb003bc1, 0x4c300320, 0x00df8432, 0x400ff003, 0x6100eb00, + 0x32105fb4, 0x03ec40f9, 0x4032008d, 0x9003a810, 0xc94032c0, 0x0ea0032c, + 0x00cb003a, 0xc00cb407, 0x2c00ca40, 0x32584c94, 0x0bac00cb, 0x003e080e, + 0x90033004, 0x20000000, 0x00000000, 0xc8453d00, 0x832123c0, 0x28f04160, + 0x008f0022, 0x408bfd83, 0x2000c300, 0x22610b3d, 0x102d00bb, 0x0262c188, + 0xb023ef60, 0xdb0076d8, 0x88b0034e, 0x80831834, 0x940fb603, 0x2c008bc0, + 0x22d808b0, 0x223c00df, 0x0032c00d, 0x95037200, 0x40000000, 0x00000000, + 0xc0040e41, 0xb0002ac0, 0x08304203, 0x60932060, 0x010b3806, 0x4000b300, + 0x28244b14, 0x0a8f00b0, 0x04206088, 0x0a020201, 0x80012430, 0x0a002280, + 0x2881c028, 0x204a0482, 0x4600a040, 0x20c008b0, 0x020c0083, 0x00a8204a, + 0x19423800, 0x10000000, 0x00000000, 0x60001e00, 0x9fc021e0, 0x08380252, + 0x00878021, 0xa00b7102, 0x32088f90, 0xa9209bf8, 0x8a1e00b4, 0x84237608, + 0x5822fa04, 0x9d8025ed, 0x182802de, 0x40858025, 0x220b7052, 0x3e028680, + 0xe9e018f8, 0x029e0097, 0x9020200b, 0x78025804, 0x10000000, 0x00000000, + 0x48180c40, 0xf30028c4, 0x08311300, 0x02d310b0, 0xd00f3103, 0x4040f310, + 0x68000b12, 0x02cc40f3, 0x40a0c10c, 0x20828c00, 0x827624d8, 0x4e10878d, + 0x12c3063a, 0x490a3302, 0x4c208b28, 0x22c00c32, 0x030c02c3, 0x0038c206, + 0x90031a02, 0x10000000, 0x00000000, 0x401c9d00, 0xe7003fc4, 0x0ff003f0, + 0x00ff003f, 0xc40ff313, 0xb800d714, 0x77840f70, 0x01bc00ff, 0x003dc00e, + 0xf1037c00, 0xff143fc8, 0x0ff1237c, 0x009f513f, 0x400ff00b, 0xdc029f00, + 0x37c42f70, 0x037c40f7, 0x443fc00d, 0xf007d004, 0x60000000, 0x00000000, + 0x2805ec80, 0xf8003fc8, 0x0fb203e0, 0x00df203e, 0x800ff603, 0x6000fb00, + 0x1a212d30, 0x13ac007a, 0x003cc08c, 0xb003e400, 0xeb013e01, 0x0cb00320, + 0x10c38432, 0x0008000b, 0x04108981, 0x32d80cb6, 0x032d60cb, 0x5032e00c, + 0x9003c200, 0x70000000, 0x00000000, 0xc8019c80, 0xb7002dc4, 0x0b7102d0, + 0x08f7102d, 0x008b3482, 0x1004b700, 0x21401870, 0x161c00b6, 0x002dc005, + 0x7012dc00, 0xb7002cc0, 0x0a70429c, 0x20a70215, 0x004f700a, 0x1c00d700, + 0x21c40871, 0x029c00a3, 0x02a3c008, 0x7002f206, 0x60000000, 0x00000000, + 0x00009e40, 0xa7802dec, 0x0b7902d3, 0x0087b02d, 0xe00b7802, 0x1201bfc0, + 0x2ba008f8, 0x06de1037, 0x802fe008, 0x7802de01, 0xb7846df0, 0x0938121e, + 0x04878003, 0xe0007812, 0x3e008780, 0x25e01a78, 0x120e8187, 0xa021e008, + 0x7802c840, 0x20000000, 0x00000000, 0x6814cc00, 0xb3a02ec0, 0x4b3002ce, + 0x08b3022c, 0xf40b3002, 0x0d08b221, 0x20c20838, 0x0a8c00b3, 0x946ce049, + 0x3402ce81, 0xb3222cd1, 0x0b3e02ec, 0x01a32164, 0xf80b3052, 0x0d019300, + 0xa0d00a34, 0x928c05a3, 0x0020d4a8, 0xbc82d200, 0x30000000, 0x00000000, + 0xe804a800, 0xfe403e80, 0x8fa003d9, 0x00c2003f, 0x800fa00b, 0x3900fec0, + 0x3ba80c60, 0x07e808fe, 0x002d800c, 0xe403da00, 0xfec03fb4, 0x09ec0b28, + 0x00ca08b3, 0x804c624a, 0x3884ce24, 0x34802ea4, 0x032806ca, 0x0033a40c, + 0xe403fa04, 0x70000000, 0x00000000, 0x48108000, 0xf8512e00, 0x0f8003e0, + 0x22f8003e, 0x000f8003, 0xa084f801, 0x3e010f81, 0x016100f8, 0x083e040f, + 0x0503e148, 0xf8103e00, 0x0e0113a0, 0x00f800be, 0x040f8003, 0xe120f800, + 0x3a000180, 0x03e000f8, 0x003e000f, 0x8103d200, 0x60000000, 0x00000000, + 0x0810a400, 0xc9003640, 0x0c900326, 0x00d91032, 0x424e1803, 0x2400f901, + 0x36448f90, 0x63260019, 0x0036400a, 0x91ab2400, 0xc9043e60, 0x0e98036e, + 0x00cb423e, 0x684c9003, 0x0482c91a, 0x3eca0cb0, 0x030402c1, 0xa032600f, + 0x91030204, 0x20000000, 0x00000000, 0x80006500, 0x81402240, 0x08900b25, + 0x20898830, 0x400d950a, 0x24087102, 0x22400b9d, 0x0b2480b9, 0x002e400a, + 0x9082a500, 0x89012c74, 0x089c0227, 0x04d9c03a, 0x703e9d8a, 0x66048940, + 0x2e410890, 0x022400c9, 0x8022700b, 0x900a2000, 0x10000000, 0x00000000, + 0x18052500, 0x89012641, 0x0810022c, 0x40990022, 0x408a9402, 0x6c00b900, + 0x26400b90, 0x00644099, 0x002e4008, 0x90022480, 0x89002e40, 0x1a912624, + 0x8489012c, 0xc108900a, 0x6404890c, 0x6e400810, 0x02240089, 0x0022460b, + 0x90024e00, 0x40000000, 0x00000000, 0x08040401, 0x89002050, 0x18140604, + 0x01810062, 0x50091006, 0x4400b900, 0x24400bb0, 0x0a0401b1, 0x0026c00a, + 0x10008400, 0x81002cc4, 0x08310204, 0x40930028, 0x444a9002, 0x44008114, + 0x2e440811, 0x4a040081, 0x0020440b, 0x11024a05, 0x00000000, 0x00000000, + 0x381d6000, 0x8a003600, 0x28800320, 0x00d80222, 0x000e8003, 0x6000f804, + 0x36010f80, 0x032000d8, 0x2c7e0008, 0x82922802, 0x88003e1a, 0x1e868b09, + 0x00c8023e, 0x9088828b, 0x28a0c069, 0x3c902c04, 0x1322a2c8, 0xa8b21a0f, + 0xa6836e03, 0x50000000, 0x00000000, 0xb819e502, 0xff002e50, 0x0f940394, + 0x00f940bb, 0x400e9403, 0xb400e700, 0x39c01ff0, 0x03e400fd, 0x003f400f, + 0xd0037408, 0xbd013f48, 0x2fd2032c, 0x90f90139, 0x480ed00b, 0xb410bd21, + 0x1ec80f9a, 0x13e410e9, 0x003f480f, 0xd203a604, 0x70000000, 0x00000000, + 0x3805f480, 0xfd00364c, 0x0c900314, 0x00ed003e, 0x400ed283, 0xe400f901, + 0x3b404fd0, 0x0b3400a9, 0x283b400e, 0xd0033400, 0xc9003d48, 0x0cd28374, + 0x40cd0037, 0x4008d003, 0x24008d00, 0x33400c90, 0x0b2400cd, 0x00b1480d, + 0xd2832600, 0x70000000, 0x00000000, 0x1800e000, 0xb8002e0c, 0x488482a8, + 0x0888102e, 0x0a088002, 0xe000b800, 0x36010e80, 0x022018a8, 0x002e010e, + 0x8412a008, 0xa8002e0a, 0x0aa20220, 0x80aa0122, 0x024f8002, 0xa000d800, + 0x32010800, 0x836000a8, 0x10220a48, 0x82020e06, 0x30000000, 0x00000000, + 0x48008440, 0xb1002c48, 0x28130264, 0x04a3006c, 0x480a1012, 0xc401b900, + 0x28400b90, 0x02040491, 0x000c400b, 0x11024400, 0x81002c4c, 0x081292c4, + 0x84890124, 0x41429002, 0x24018101, 0x28400812, 0x42044081, 0x00204c09, + 0x12821200, 0x20000000, 0x00000000, 0x1814a400, 0xb9222c40, 0x181006e4, + 0x0009002e, 0x40089000, 0xe424b910, 0x26400a90, 0x022400b9, 0x082e400a, + 0xb402a501, 0xa9612640, 0x4a900204, 0x84a92260, 0x40ca9052, 0xa4329941, + 0x2a400895, 0x026400a9, 0x00224808, 0x90020600, 0x20000000, 0x00000000, + 0xa040a404, 0xf9803640, 0x0c900347, 0x40e9003e, 0x480e9003, 0xe700f180, + 0x1a600f95, 0x13241079, 0x503a600f, 0x98034700, 0x89803e62, 0xac9503e5, + 0x00894036, 0x6c4a9c83, 0x2700c980, 0xba502c98, 0x0b2400c9, 0x0032780d, + 0x9a0b2804, 0x70000000, 0x00000000, 0xe810a400, 0xf9801e40, 0x0f9003a6, + 0x00f9023e, 0x480f9013, 0xe500f980, 0x3e680f98, 0x03e400e9, 0x803e680e, + 0x9103e680, 0xf9003c68, 0x0f9083e4, 0x00f9023e, 0x420f9223, 0xec80f920, + 0x32641f98, 0x0be400f1, 0x003c400f, 0x1203f200, 0x60000000, 0x00000000, + 0x2810a040, 0xf8003e00, 0x4f800b60, 0x00c80032, 0x100f8083, 0x6000f840, + 0x3a008f84, 0x836080f8, 0x4036008d, 0x0403e020, 0xf8002e10, 0x8c840321, + 0x80c800b6, 0x144c848b, 0x20804020, 0xb2084f80, 0x0b4000c8, 0x0032100c, + 0x8483c204, 0x20000000, 0x00000000, 0x08043800, 0x9e802e80, 0x0ba0133b, + 0xc08e00a2, 0x804bea02, 0x28083a00, 0x2a800b68, 0x021900ba, 0x002f8008, + 0xe4a33b00, 0xba002fa0, 0x0ae00a3a, 0x00d65023, 0x90026222, 0x0800aec0, + 0x23a10ba0, 0x03a800da, 0x0023b428, 0xe882ca00, 0x40000000, 0x00000000, + 0x08054f20, 0xb3e02cc0, 0x0b30020f, 0x02a36026, 0xc01b3002, 0xcc00b300, + 0x28e00b3d, 0x024c4093, 0x002cd818, 0x3a2a0d00, 0xb3002ce0, 0x08b8020e, + 0x00930020, 0xd040300a, 0x0d009300, 0x42e00bb0, 0x020c0083, 0x80a0c008, + 0x3002ca00, 0x50000000, 0x00000000, 0x20011401, 0x95082dc0, 0x0b32021c, + 0x00a78025, 0xc80b7802, 0x9c00bf00, 0x29d11be0, 0x4a1c00b7, 0x002f6008, + 0x10029d00, 0xb7006dc3, 0x2274021c, 0x20974023, 0xc00a5002, 0x3c00b708, + 0x61c20b70, 0x128c0097, 0x4021d008, 0x7012e004, 0x40000000, 0x00000000, + 0x28181e00, 0xf7813df0, 0x0f7a031e, 0x04e38035, 0xe80f3807, 0xde00f780, + 0x29e00f78, 0x035e00d7, 0x8035e008, 0x58031e10, 0xf7803de0, 0x0cf8133e, + 0x04d78021, 0xe0087803, 0x1e00df80, 0x31e00f79, 0x031e14c3, 0x8031600c, + 0x7803e002, 0x00000000, 0x00000000, 0x081da408, 0xd9003eda, 0x0fb023a4, + 0x00d9003b, 0xd99f9003, 0x6c00f300, 0x16c00f00, 0x03e400fb, 0x001c00aa, + 0x80032418, 0xfb001e80, 0x0f902360, 0x001300b8, 0xc00f1023, 0xcc80eb00, + 0x2ec00fb5, 0x032c00fb, 0x003e004f, 0x8003c204, 0x60000000, 0x00000000, + 0x6004be00, 0xcd9033e4, 0x0cfc833e, 0x00cf803f, 0xf28cf803, 0xfe00ff84, + 0x21e40cd8, 0x127e403f, 0x9031e00e, 0xd3137e08, 0xff903fe4, 0x0ce8027e, + 0x00d480ad, 0xec4c6803, 0x3f00df80, 0x03e405f8, 0x033e00cf, 0x8033e00c, + 0xf9033000, 0x60000000, 0x00000000, 0xa8009c00, 0xd51821c4, 0x08f0021c, + 0x8487403d, 0xc0086242, 0x1c00e700, 0x21c40d41, 0x029d00b7, 0x0035410e, + 0x52021d00, 0xb7002fcc, 0x8a62083d, 0x08040421, 0x160d4202, 0x1d80a520, + 0x290009f1, 0x035c40d7, 0x0023440a, 0xe002aa06, 0x20000000, 0x00000000, + 0x00008800, 0x950120c4, 0x1970021c, 0x0196002d, 0xc0097002, 0x9c60bf08, + 0x214088c0, 0x021800b7, 0x0227c40a, 0x11061860, 0xb7012d40, 0x4170425c, + 0x00861023, 0xc848c002, 0x1c049600, 0x05c00970, 0x021c0087, 0x00a10008, + 0x50020600, 0x20000000, 0x00000000, 0x40148c01, 0x910020c0, 0x09302a03, + 0x2090022e, 0xe0890000, 0x0e00a3e0, 0x60580808, 0x028000b3, 0x8024140a, + 0x00060100, 0xb3402c10, 0x0b984202, 0x40800062, 0x30890506, 0x0c1010c0, + 0x24000930, 0x064c0093, 0x0000104a, 0x00029800, 0x20000000, 0x00000000, + 0x2805a400, 0xdb80b3c0, 0x0df0032d, 0x22db023f, 0xc2ad3003, 0xad00f3c0, + 0xb2c8080d, 0x822c00fb, 0xa034448e, 0x1f2b0d10, 0xf3c82ee2, 0x29bc036e, + 0x02480032, 0xc04c3c0a, 0x0c10db81, 0xb6c30df0, 0x872c00cb, 0x0032c00c, + 0x98121a04, 0x60000000, 0x00000000, 0xa010e400, 0xfb4a3ec0, 0x0eb003ec, + 0x00ea403b, 0xc00eb423, 0xac80fb00, 0xbe400f80, 0x03a800fb, 0x003e500f, + 0x9003a900, 0x3b203c58, 0x8eb583ec, 0x00e8003a, 0xd80f8003, 0xef04e25c, + 0x3ad007b0, 0x13cc00f3, 0x013c620f, 0x9103e400, 0x30000000, 0x00000000, + 0x0110d400, 0xcf903dc0, 0x0c70133e, 0x80c70033, 0xc00ca803, 0x3c05ff00, + 0x73e007c0, 0x033c01cb, 0x003f400c, 0xd0037ea0, 0xcf0477c0, 0x0cf0033f, + 0x20fd823f, 0x001cea8b, 0x3480ad80, 0x33200ff0, 0x032c00cb, 0x0013400c, + 0xd003e804, 0x30000000, 0x00000000, 0x81006700, 0x8ac02ec0, 0x08b02304, + 0x00a8d022, 0xc0088a43, 0x6c00bb00, 0x3e440f8a, 0x0340008b, 0x002e280d, + 0x8c036100, 0xdb013662, 0x0d98a362, 0x00b090a2, 0x34488003, 0x6f00d840, + 0x22100bb0, 0x02ac00db, 0x90222008, 0x8802e840, 0x10000000, 0x00000000, + 0x80056620, 0x880c2ec0, 0x08b00a64, 0x01890006, 0xc0289112, 0x2c00bb00, + 0x22c00388, 0x002480ab, 0x002e2008, 0x88022400, 0x8b042ae0, 0x2a981220, + 0x04b84422, 0xc0088402, 0x28008b60, 0x26d84b30, 0x026c008b, 0x002ec408, + 0x9802e000, 0x40000000, 0x00000000, 0x08040001, 0x81002cc0, 0x28300204, + 0x00a00024, 0xc0180006, 0x4c00bb00, 0x2c408a00, 0x024000a3, 0x002c0109, + 0x00026001, 0x9b042440, 0x18100240, 0x01b00420, 0x00080002, 0x6811b000, + 0xac000b30, 0x0acc0093, 0x002c40a8, 0x0012c205, 0x00000000, 0x00000000, + 0x00196000, 0xc8002fc0, 0x0cf00264, 0x028800a5, 0xc00c8003, 0x2c00bb00, + 0x22404b80, 0x022002ab, 0x002e000c, 0x80032000, 0xcb006a40, 0x18900320, + 0x04f800b2, 0x0028800b, 0x2400c000, 0x36000ff0, 0x0b6c00c9, 0x00be000c, + 0x9003e003, 0x50000000, 0x00000000, 0xa01df002, 0xf4003fc0, 0x8ff00390, + 0x00fc003b, 0xc00fc043, 0xfc007700, 0x3b400f40, 0x437000df, 0x003f010f, + 0xc003f000, 0xff043f40, 0x0f5003f0, 0x04fc020f, 0x000fc002, 0xdc00dc02, + 0x33000ff0, 0x03bc00fd, 0x0033000f, 0xc007e804, 0x70000000, 0x00000000, + 0xc005fe10, 0xff803fe0, 0x0ff913bc, 0x80ff303b, 0xd80ff403, 0xd090fe80, + 0x3ff00e78, 0x03fc00ff, 0x9039640d, 0xfc037200, 0xff843bc9, 0x0ff8023e, + 0x00ec8031, 0xe00ff843, 0xfe40f791, 0x3dd10ff8, 0x03fe00ff, 0x803d200c, + 0xf8033000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb2422e, + 0x408b3222, 0xd00b3442, 0x2300b880, 0x2e8008a8, 0x02ff00bb, 0x001a0008, + 0xb0022210, 0xbb802cda, 0x0bb082ae, 0x00b8002a, 0xe00bb802, 0xec80bb20, + 0x2ec808b8, 0x02ee00bb, 0x802e4008, 0xb0022004, 0x30000000, 0x00000000, + 0xc805cc00, 0xb3002cc0, 0x0b32028c, 0x00a32068, 0xcc8a3602, 0x8450b201, + 0x64480b10, 0x06cd00a3, 0x222c0009, 0x12068008, 0xa3002cc4, 0x0a32420c, + 0x00b00820, 0xc00b3002, 0xcc00b300, 0x2ccc0a30, 0x02cc00b3, 0x002cc008, + 0x30020201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0b30022d, + 0x008a0022, 0x008b8102, 0xa4013984, 0x6e024381, 0x16ec183b, 0x002c2008, + 0xb012a200, 0xbb002ec5, 0x0b3042ac, 0x00b8002a, 0xc01bb002, 0xec00bb00, + 0x6ec008b0, 0x02ec00bb, 0x000ec008, 0xb0023004, 0x60000000, 0x00000000, + 0x4015ec00, 0xfb003ec0, 0x0fb003ad, 0x04fbc83a, 0xf00fbc03, 0xe800fac0, + 0x7e444fac, 0x43ec00fb, 0x003a300d, 0x980ba211, 0xfb013a20, 0x0fb0032c, + 0x00eb6032, 0xc00fb043, 0xec00fb00, 0x3ec08eb0, 0x03ec00fb, 0x003e482c, + 0xb0031004, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff02371, + 0x08f5c03f, 0xc40ff803, 0x7840fe00, 0x3fc20ce8, 0x23ec00ff, 0x007b000b, + 0xdc473000, 0xff013fc0, 0x0ff003fc, 0x00ff003f, 0xc08ff043, 0xfc08ff02, + 0x3fc00ef0, 0x03fc00ff, 0x043f640f, 0xf003f800, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb003ec0, 0x0fb083dd, 0x01fe103f, 0xd00ef4a3, 0x6c00eb62, + 0x3e408d95, 0x036c00fb, 0x013a580d, 0x90032420, 0xfb083e00, 0x0fb083ec, + 0x00fb003a, 0xcc0fb003, 0xec00fb20, 0x3ac00cb0, 0x03ec00fb, 0x003ec00c, + 0xb0033004, 0x20000000, 0x00000000, 0xd8052c00, 0xbb002ec0, 0x0bb602ec, + 0x00ba802e, 0xf608b800, 0x2d0089a0, 0x32620c8d, 0x003e008b, 0x61223008, + 0x90002600, 0xbb642e60, 0x48bc42ec, 0x00bb0022, 0xd01cb002, 0xee00bbc0, + 0x21e028b0, 0x02ec00bb, 0x002ee00d, 0xb0023200, 0x40000000, 0x00000000, + 0xe0054c00, 0xb3002cc0, 0x0b3802cc, 0x00b3482c, 0xd05ab404, 0xc12093c0, + 0x26b10b1c, 0x12ce0083, 0xc8280009, 0xb042c100, 0x33002ce0, 0x0a3906cc, + 0x00b80028, 0xe00a3002, 0xcf60b300, 0x2cc00830, 0x02cc00b3, 0x002e4408, + 0xb0023800, 0x50000000, 0x00000000, 0xf8011e00, 0xb7802de0, 0x0b7802d2, + 0x00b7802c, 0xa41a5986, 0x9200b580, 0x21a00a58, 0x205e40a7, 0x92236208, + 0x78025260, 0xb7802de0, 0x087802de, 0x00bc8021, 0xe0087812, 0xde00b780, + 0x25e40878, 0x02de00b7, 0x802fe009, 0x78021800, 0x40000000, 0x00000000, + 0x48080c00, 0xf3003cc0, 0x0f3002cc, 0x00b3003c, 0x400e2403, 0xc400f240, + 0x3ec00736, 0x134c22eb, 0x0038800d, 0x900bc000, 0xb3003cc2, 0x0e3003cc, + 0x00f10838, 0xc08e3003, 0xcc00b308, 0x3cc20c30, 0x03cc00f3, 0x003cc00c, + 0xb00b1202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0x008dc003, 0x3c00c500, 0x3b800cf0, 0x03bc08cf, 0x0037001f, + 0xf003b010, 0xff003fc4, 0x0ef003fc, 0x00f4003f, 0xc00ef003, 0xfc00ff00, + 0x3bc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000, + 0xa805ec00, 0xfb003ec0, 0x0fb803bc, 0x40fd003b, 0xc01ef103, 0x6000fb01, + 0x3e000508, 0x436cb1eb, 0x0036000f, 0xb0036200, 0xcb003e00, 0x0fb003ec, + 0x00fb003e, 0xc007b003, 0xec00fb00, 0x2ce00eb0, 0x03ec00fb, 0x003ec00f, + 0xb003ea00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0bf00212, + 0x80bda063, 0xf9083802, 0x1020b700, 0x2d812940, 0x021c8087, 0x00230008, + 0xf0421000, 0x87002dc4, 0x097002dc, 0x00b7102d, 0xc0097002, 0xdc00b700, + 0x2dc00870, 0x00dc00b7, 0x002dc00b, 0x7002f204, 0x60000000, 0x00000000, + 0x80009e00, 0xb7802de0, 0x0b78029f, 0x80b7b029, 0xe00b7c02, 0x9601b780, + 0x2b6008f8, 0x020e4087, 0x8025200a, 0x58023622, 0xa7802da0, 0x097842de, + 0x09b7802d, 0xe00b7802, 0xde00b780, 0x2de48a78, 0x02de00b7, 0x802de00b, + 0x7800f000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b30020d, + 0x04b35420, 0xc0013802, 0x8c40b300, 0x2cc40030, 0x020c00ab, 0x0024f808, + 0x31024d00, 0xa3002cf8, 0x09b002cc, 0x00b3106c, 0xc0093002, 0xcc00b300, + 0x2cc00830, 0x02cc00b3, 0x022ee40b, 0x3002d204, 0x10000000, 0x00000000, + 0xe815a800, 0xfa003e80, 0x0fa003b8, 0x10fe803b, 0xb20fed03, 0xaa04fe02, + 0x3bb00de4, 0x0a2800aa, 0x0037b00e, 0xa8037b00, 0xea003e88, 0x09a003e8, + 0x00fa003e, 0x800ba003, 0xe800fa00, 0x3e800ea0, 0x03e800fa, 0x003fb00f, + 0xa003fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0, + 0x00f8483e, 0x020e800b, 0x2000f820, 0x3e120f82, 0x038002d8, 0x403a140e, + 0x800ba120, 0x48407e00, 0x0f841360, 0x00f8083e, 0x000d8003, 0xe100f800, + 0x3e100f80, 0x03e000f8, 0x003e020f, 0x8003d200, 0x30000000, 0x00000000, + 0x0810e400, 0xf9003e40, 0x0f9203c4, 0x20d98034, 0x500e1903, 0x6c00f900, + 0x3e400d90, 0x03e400c9, 0x4076700c, 0x90022600, 0xf9002ee0, 0x0f9903a4, + 0x00fbc02e, 0x500f9003, 0xe440f980, 0x3e400f90, 0x03e400f9, 0x000e442c, + 0x9203c204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9802f4, + 0x008d2003, 0x5008d602, 0x2501b901, 0x3a648894, 0x02e500d9, 0xc0a24845, + 0x90022600, 0xb9802e60, 0x0e920224, 0x00b9402e, 0x620b9002, 0xe600b900, + 0x2e480b90, 0x02e400b9, 0x002e4008, 0x9002e000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b9402e4, 0x00911026, 0xc20a9002, 0x6401b900, + 0x64424892, 0x02244089, 0x0060c008, 0x1006a580, 0xb9502e48, 0x0b9002a4, + 0x00b9082e, 0x400b9002, 0xe500b920, 0x2e400b90, 0x02e400b9, 0x002e4008, + 0x9002c600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1102c4, + 0x00811020, 0x441a1142, 0x0c00b100, 0x28440930, 0x20cc0081, 0x11204409, + 0x11468400, 0xb1022c44, 0x0a110204, 0x00b1102c, 0x400b1002, 0xc440b110, + 0x2c440b10, 0x02c400b1, 0x002c4408, 0x1102c201, 0x00000000, 0x00000000, + 0x380d6000, 0xf8003e00, 0x0f8402e0, 0xa0d86836, 0x1a8a8683, 0x60b0b800, + 0x1e102d80, 0x13a0a282, 0x4136100c, 0x840ba004, 0xf8043e1a, 0x0f8403a0, + 0x00f8403e, 0x000f8003, 0xe100f840, 0x3e1a0f80, 0x03e000f8, 0x003e100c, + 0x8403ce03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9203fc, + 0x00fd203f, 0x480dd203, 0xe410ff00, 0x3d484ed0, 0x03e400f9, 0x203f480f, + 0xd2025400, 0xb9023e48, 0x0e9201e4, 0x00f9203e, 0x400f9003, 0xe480f920, + 0x3e480f90, 0x03e400f9, 0x003f480f, 0x9203e606, 0x70000000, 0x00000000, + 0x1805e400, 0xf9003e40, 0x0fd003e4, 0x00ed0037, 0x401fd003, 0x3400ff00, + 0x33400fd0, 0x03b408dd, 0x003b400f, 0x90011400, 0xfd013a40, 0x0dd001e4, + 0x00ed003f, 0x400f9003, 0xf400fd00, 0x3f400f90, 0x03e400f9, 0x003f400f, + 0xd003c600, 0x70000000, 0x00000000, 0x3810a000, 0xb8002e00, 0x0b8002e0, + 0x008a0022, 0x000ba002, 0x2000b800, 0x20000b80, 0x22200280, 0x002e000b, + 0x80022010, 0xb8002e00, 0x888002e0, 0x08b8002e, 0x000b8002, 0xe000b800, + 0x2e000b80, 0x02e008b8, 0x042e000b, 0x8282ce04, 0x30000000, 0x00000000, + 0x4804c400, 0xb1002c40, 0x0b1002c4, 0x00a10024, 0x400b1002, 0x0400b902, + 0x24404b10, 0x06840881, 0x0428410b, 0x90020608, 0xb1002c41, 0x0b1006c4, + 0x00b1002c, 0x400b1006, 0xc400b100, 0x2c400b10, 0x02c400b1, 0x002c400b, + 0x1202c201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4, + 0x008b0022, 0xc00b9002, 0x2700b900, 0x26d00b90, 0x96241089, 0x002ec40b, + 0x920a2400, 0xb9002e40, 0x089002e4, 0x01b9002e, 0xc04b9002, 0xec00b900, + 0x2e400b90, 0x02e400b9, 0x002e460b, 0x9002c604, 0x60000000, 0x00000000, + 0xa015e400, 0xf9003e40, 0x0fd003e6, 0x00ed0037, 0x6c0bdd03, 0x2600f1c0, + 0xb7700f94, 0x03a400dd, 0x003b720f, 0x10022540, 0xf9007a40, 0x0fd003e4, + 0x00e9087e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x043f700f, + 0x9003e804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003c4, + 0x80f91b3a, 0x6007900b, 0xe400f920, 0x3a480f9a, 0x03a400f9, 0x013e400f, + 0x9803e414, 0xf9007ec8, 0x079003e4, 0x00f9003e, 0x400f9003, 0xe400f900, + 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003ea00, 0x60000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e1, 0x00f0007e, 0x080e8403, 0x2000e840, + 0x3e080e80, 0x838008c8, 0x102a020e, 0x800b2024, 0xc8943000, 0x0f8083e0, + 0x00f8103a, 0x030f8013, 0xe208f808, 0x2e080d80, 0x03e000f8, 0x003e100f, + 0x8003ca04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0be902e8, + 0x00be816f, 0xa008ee02, 0x39008e5a, 0x2fa20860, 0x03b8008e, 0xc037b00b, + 0xa0037b00, 0xce0022a2, 0x0eee02e8, 0x00be8023, 0x800ba002, 0xfa80be40, + 0x2fb008a0, 0x02e800ba, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000, + 0x28054c00, 0xb3002cc0, 0x1b3c02cc, 0x04b3952c, 0xd00ab62a, 0x8c90a300, + 0x24d10a38, 0x028c0183, 0x0820f00b, 0x30020d40, 0x830020c0, 0x0b3c02cc, + 0x00b28028, 0xf00b3002, 0xcc00b350, 0x2ce00930, 0x02cc00a3, 0x002cc00b, + 0x1002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7702dc, + 0x00b5202c, 0x74087102, 0x9e218700, 0x2d281870, 0x829c0186, 0xa4658a0b, + 0x70027e10, 0x8781a1c0, 0x4a7102dc, 0x00be8021, 0xd00b7002, 0xdc00b600, + 0x25620870, 0x02dc00b7, 0x006d400b, 0x5002e800, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7803de0, 0x0f7a03de, 0x00f7c02d, 0xe80e3a02, 0x8e00e780, + 0x2de00278, 0x138e0285, 0xa039e00e, 0xfb131202, 0xc78311e0, 0x0f6a03de, + 0x00f78039, 0x600f7803, 0xd600f780, 0x3de00d78, 0x03de00e7, 0x803de80f, + 0x5803ea02, 0x00000000, 0x00000000, 0x080dac04, 0xfb003ec0, 0x0ff803ec, + 0x00ff803f, 0x608ff813, 0x6c00fb00, 0x3fe48fb0, 0x03e400ff, 0x803fe40f, + 0xb501ac00, 0xe3003e5a, 0x0fe803ec, 0x00f3013e, 0x000fb003, 0xe800fa00, + 0x3c400fb0, 0x03ec00fb, 0x013fe00f, 0xd003c206, 0x60000000, 0x00000000, + 0x0005fe00, 0xff903fe0, 0x0fe803fe, 0x00fe803b, 0xe40ac902, 0xfe00ff80, + 0x35a00cf9, 0x03fe00ef, 0x883f204c, 0xf227f400, 0xfd813f60, 0x0fd803fe, + 0x00fe8031, 0xa40ef803, 0xfa00ce90, 0x3fa00cf8, 0x03fe00ff, 0x803fe60f, + 0xd803c000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b6102dc, + 0x10b40023, 0xcd085702, 0xdca0b400, 0x21c00851, 0x02dc0086, 0x003bc008, + 0x7302d404, 0xb6002dc2, 0x0b7002dc, 0x04be0035, 0xc0087002, 0xf000d600, + 0x3d800870, 0x02dc00b7, 0x002d400b, 0x5002ea04, 0x60000000, 0x00000000, + 0x00009c00, 0xb7006dc0, 0x0b6002dc, 0x40b70829, 0xc29b6002, 0xd800b700, + 0x27c22861, 0x029c00b5, 0x102dc028, 0x7042d0c0, 0xb5002d44, 0x0b4002dc, + 0x00b74021, 0x810a7002, 0xd4008400, 0x6dc00870, 0x02dc00b7, 0x002dc00b, + 0x5002c000, 0x20000000, 0x00000000, 0x2014cc00, 0xb3002cc0, 0x0b3002ce, + 0x00b3c220, 0xf0013802, 0xc8003049, 0x20c00802, 0x02c400a3, 0x0428f008, + 0x3902c411, 0xb3042c41, 0x0b3002cc, 0x09b30224, 0x00083002, 0xc0009800, + 0x2ac00830, 0x02cc00b3, 0x002ce40b, 0x9002c804, 0x30000000, 0x00000000, + 0xa815ac00, 0xfb003ec0, 0x0f9004ef, 0x00fb403a, 0xa40bb983, 0xec00fbe0, + 0x36400cb0, 0x03cc00fb, 0x001e6c08, 0xf002ea00, 0xb9003e04, 0x1fb002ec, + 0x00fb4030, 0xc00ab003, 0xe400c900, 0x2ec02cb0, 0x03ec00fb, 0x003cc00b, + 0xb003ea04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0ff003ec, + 0xc1fd083f, 0x110ef003, 0xe900fb00, 0x3bc00fa4, 0x07ec01de, 0x413bc04e, + 0xb003ea00, 0xfb013e90, 0x0ff403ec, 0x00fb403e, 0xc00fb003, 0xec00fa00, + 0x3e400fb0, 0x03ec00fb, 0x003e400f, 0xb003e000, 0x30000000, 0x00000000, + 0x0110fc00, 0xff003fc0, 0x0fdc03bc, 0x00ff007f, 0xc00df003, 0xfe00bf00, + 0x3ff20ddc, 0x037800dd, 0x127ff00f, 0xf0033280, 0xde033f01, 0x0ff043fc, + 0x00ff003f, 0x400cf003, 0xf500cf90, 0x22c00cf0, 0x03bc00ff, 0x003fc20c, + 0xd0030044, 0x30000000, 0x00000000, 0x80006c00, 0xbb002ec0, 0x0bbc83ac, + 0x00eb006e, 0xd088b522, 0xea40bb02, 0x2ed00b0c, 0x2321008b, 0x006ec00e, + 0xb0022820, 0xbac02e08, 0xcbb603ac, 0x00bbe12e, 0x500eb002, 0xeb00aa80, + 0x2a4008b0, 0x02ec00bb, 0x042ec008, 0x99022040, 0x10000000, 0x00000000, + 0x80012c00, 0xbb002ec0, 0x0b9002ac, 0x04ba202c, 0x89998022, 0xe421bb00, + 0x2ec00bb4, 0x026d089b, 0x082ec00b, 0x300aac00, 0xb9c02e08, 0x1991066c, + 0x00b9802e, 0x8008b002, 0xc4008800, 0x2a8008b0, 0x02ac00bb, 0x002ec018, + 0xb0022000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b30028c, + 0x0083002c, 0xc0083002, 0xc001b000, 0x2cc08b80, 0x060c0003, 0x002cc01b, + 0x300a8c01, 0xb2042c80, 0x033002cc, 0x00b3002c, 0x800b3012, 0xc400a200, + 0x28800830, 0x02cc00b3, 0x006e4038, 0x30020201, 0x00000000, 0x00000000, + 0x000d6c00, 0xfb003ec0, 0x0fb007ac, 0x00f3002e, 0xc08db003, 0xe010bb00, + 0x3ec10d80, 0x036804db, 0x042ec00f, 0xf00ba008, 0x98023e00, 0x0fb003ec, + 0x04fb013e, 0x801cb003, 0xe400c800, 0x3ac028b0, 0x03ac00fb, 0x003ec00c, + 0x900b0003, 0x00000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc01ff043, 0xf000f400, 0x3fc00fc0, 0x239004ff, 0x063fc08e, + 0xf0073c01, 0xfe003f00, 0x8ff003bc, 0x00ff003f, 0x000ef043, 0xf000fc00, + 0x7fc00ff0, 0x03fc00ff, 0x003fc00f, 0xd003e807, 0x70000000, 0x00000000, + 0xc005fe00, 0xff203f60, 0x0df8033e, 0x00ff803f, 0xe00ff803, 0xfe00ff80, + 0x3d300fc8, 0x03d600ec, 0x8095200c, 0xc0023e40, 0xf480330c, 0x0cf803f0, + 0x80f42931, 0x080cc003, 0x3e04ff90, 0x37000cf0, 0x13fe48ff, 0x803fc808, + 0xc0a27000, 0x70000000, 0x00000000, 0xa010ee00, 0xbfc02e60, 0x08b0022e, + 0x00bb202e, 0xe00bb802, 0xee00bb84, 0x2e010682, 0xc2e600a9, 0x80222108, + 0x84802c10, 0xb8842a14, 0x20320262, 0x40988016, 0x0e8f80c2, 0x2c00b320, + 0x22b40af6, 0x028c80bb, 0x002ec00a, 0x8c02a004, 0x30000000, 0x00000000, + 0x0805cc00, 0xa3402ec0, 0x0b32828c, 0x00b3082c, 0xc00b3002, 0xcc00b300, + 0x2c081b00, 0x06e40089, 0x002c0028, 0x034a0c84, 0xb0022008, 0x483082c0, + 0x00a00128, 0x08680106, 0x0c00b825, 0x28000811, 0x824c00b3, 0x002cc40a, + 0x3062c201, 0x70000000, 0x00000000, 0xe015ac08, 0xbb002ec9, 0x0ab002ac, + 0x00bb002e, 0xc00bb012, 0xec00bb00, 0x2e204a88, 0x426e30ab, 0x802ac008, + 0x10422c00, 0x9a082a94, 0x08b002ec, 0x489a2026, 0x440bb182, 0x2c009904, + 0x2a020ab0, 0x02ac00bb, 0x062ec00a, 0xb002b004, 0x60000000, 0x00000000, + 0x0015ec00, 0xfb003cc1, 0x0fb00bac, 0x00fb003e, 0xc00fb003, 0xec00fb00, + 0x3e328f8c, 0x13e702c8, 0x803e000c, 0x810b2c10, 0xf8003030, 0x4cb013e2, + 0x24e8c43a, 0x100c8c03, 0x2c84fba0, 0xba902cb0, 0x036c00fb, 0x003ec04e, + 0x8c134004, 0x20000000, 0x00000000, 0xe001bc00, 0xff003fc0, 0x0df0037c, + 0x00ff003f, 0xc00ff003, 0xfc00ff00, 0x3f000fc0, 0x23fc14fd, 0x0033080f, + 0xa803fc20, 0xff283fc0, 0x0df02366, 0x08d7003f, 0xa00f88ab, 0xfe80ff90, + 0x37800f7a, 0x03fc00ff, 0x013ec00b, 0x4c037860, 0x20000000, 0x00000000, + 0xc010ac00, 0xfb00b2c4, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec04fb02, + 0x3e080c84, 0xc3e400cb, 0x087ec09c, 0xb2032c02, 0xc9015240, 0x08b00328, + 0x02c940f8, 0xd00c310b, 0x2d00ea40, 0x34900d90, 0x032c00cb, 0x0832c04e, + 0xb403f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbf0022f4, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0xec00bb00, 0x2e388d88, 0x06cf41f3, 0x402ce04d, + 0xbe022e00, 0x83883ee0, 0x9db0032c, 0x088b3022, 0xd48ab007, 0x6c00d370, + 0x32800c90, 0x036c80db, 0x6037d708, 0xb1823200, 0x00000000, 0x00000000, + 0xe0054c00, 0xb3002060, 0x0bb002cc, 0x00b3002c, 0xc00b3002, 0xcc00b300, + 0x64300908, 0x46424081, 0x442c2008, 0x00020c00, 0x80402000, 0x8a3e1240, + 0x04a0c008, 0x00080822, 0x42408300, 0x20400910, 0x000d8083, 0x0022c00a, + 0x0002b800, 0x50000000, 0x00000000, 0x60011e00, 0xb38021e0, 0x0b7802de, + 0x00b7802d, 0xe00b7802, 0xde00b780, 0x2f244949, 0x02f200b7, 0x802fe209, + 0x78121e24, 0x8d802542, 0x0978021a, 0x40858421, 0xe10a7802, 0x16409780, + 0xa0e00878, 0x025e0097, 0x9065e008, 0x29021800, 0x40000000, 0x00000000, + 0x48080c40, 0xf3003040, 0x0f3003cc, 0x00b3003c, 0xc08b3103, 0xcc00b310, + 0x34010d01, 0x86cc0081, 0x006c009c, 0x24072c00, 0xc31022c4, 0x0a308244, + 0x00a340a8, 0x82080202, 0x6c00c320, 0x30400db0, 0x030c00cb, 0x0030c00e, + 0x05039202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc, + 0x08ff003f, 0xc00ff003, 0xfc447f00, 0x3f011fc1, 0x03fc41ef, 0x003fc04f, + 0xf000fc00, 0x7f001fc0, 0x4bf013fc, 0x00ff0237, 0xc00ff00a, 0xfc00ff00, + 0x3f540ff1, 0x03fc00ff, 0x003fc00f, 0xe1439006, 0x60000000, 0x00000000, + 0x8805ec00, 0xfb103ec0, 0x0fb003ec, 0x01cb003e, 0xc00fb003, 0xec00fb00, + 0x3e005c90, 0x138c10c3, 0x0036c00d, 0x90032c00, 0xfa003e80, 0x0cb0036e, + 0x02d20022, 0x406cb023, 0x2b84cb84, 0x32980c10, 0x0b2c00fb, 0x8032c40f, + 0x90032a04, 0x70000000, 0x00000000, 0xc8119c00, 0xb73021c0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xdc003702, 0x278008d0, 0x425c0907, 0x02a5c00a, + 0x70009c00, 0xb70027c1, 0x0cf0429c, 0x00870029, 0xc008300b, 0x3c40c710, + 0x20c10851, 0x021c00bf, 0x0121c00b, 0x70023206, 0x60000000, 0x00000000, + 0xc0009e00, 0xb38029f0, 0x0b7802de, 0x00b7802d, 0xe00b7802, 0xde00b784, + 0x2d202850, 0x227e008f, 0x8225e008, 0x78505e10, 0xb7882de0, 0xe978120e, + 0x29878021, 0xe28a7812, 0x1f089780, 0x21a00878, 0x021e00b7, 0x8021e80b, + 0x5802b000, 0x20000000, 0x00000000, 0x4814cc00, 0xb30024c0, 0x0b3002cc, + 0x00b3012c, 0xc00b3002, 0xcc00b300, 0x66f0003c, 0x064e4803, 0x0124f0aa, + 0x3a02cc00, 0xb3022cf0, 0x0930028c, 0x0083d028, 0xc00a3982, 0x4e028300, + 0x20c60830, 0x020c00b3, 0x00a2c00b, 0x36269200, 0x30000000, 0x00000000, + 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00da003e, 0x800fa013, 0xe800fa00, + 0x7fa40ce4, 0x821802c6, 0x8837984c, 0xea036810, 0xfe403f80, 0x0da0023a, + 0x40ce0033, 0xa04ee803, 0x2a005a82, 0xb2b02ca8, 0x032800fa, 0x0032804f, + 0xe40bba04, 0x60000000, 0x00000000, 0x4800e000, 0xf0013a00, 0x0f8003e0, + 0x00f8003e, 0x000f8007, 0xe0007800, 0x36040f82, 0x432100e8, 0x023a000e, + 0x8003a100, 0xf8083606, 0x0c8403a0, 0x01e8443e, 0x02098403, 0xa000f850, + 0x3c000f01, 0x0be000f8, 0x003e100f, 0x04015200, 0x30000000, 0x00000000, + 0x0810e400, 0xf9003640, 0x0f900324, 0x00b9003e, 0x400f9003, 0xe408f900, + 0x3e400c98, 0x03e6a0c9, 0x8072420d, 0x1203a700, 0xf9207c40, 0x0e980324, + 0x00f19832, 0x402c9843, 0x2c00fb00, 0x3ec00c91, 0x232400f9, 0x803e400c, + 0x90030204, 0x30000000, 0x00000000, 0x80046400, 0xb9002a54, 0x0b900224, + 0x00f9002e, 0x40099002, 0x6400b900, 0x2e701a9c, 0x26e58159, 0xc028620e, + 0x90076501, 0xf9887e71, 0x2c9d03e4, 0x00b90034, 0x504f1403, 0x6710b9d0, + 0x2e402898, 0x136500b9, 0x402e5068, 0x90822000, 0x10000000, 0x00000000, + 0x18012400, 0xb9006250, 0x0b100224, 0x00b9002e, 0x400b9002, 0xe400b900, + 0x6e5488b5, 0x06e400ab, 0x182ac841, 0x9402e400, 0xb9012e46, 0x0b100224, + 0x01b90826, 0xca089502, 0x2460b908, 0x2e400890, 0x126500b9, 0x282e4809, + 0x98020600, 0x40000000, 0x00000000, 0x08040400, 0xb1002840, 0x0b140244, + 0x00b1402c, 0x40891002, 0x4400b102, 0x2c448a11, 0x02c41091, 0x0028400a, + 0x11024440, 0xa1006844, 0x49310244, 0x01b104a4, 0x44ab1102, 0x4440b110, + 0x2c400811, 0x024440b1, 0x102c4409, 0x100a0200, 0x00000000, 0x00000000, + 0x380d6000, 0xf8003200, 0x0f800b20, 0x00f8003e, 0x000b8003, 0xe000b800, + 0x2e100884, 0x02e000a8, 0x002a000d, 0x068ae900, 0xb8002e1a, 0x4e840720, + 0xa0f82826, 0x1a0c868b, 0x2100f042, 0x3e0a0c8e, 0x836100f8, 0x403e9a0d, + 0x82832e02, 0x10000000, 0x00000000, 0x981de400, 0xf9403f40, 0x0f9003a4, + 0x00e9003e, 0x400d9003, 0xe400f900, 0x3f488fd2, 0x13f400bd, 0x003d400a, + 0xd203a490, 0xff003f48, 0x069243fc, 0x00ff043d, 0x484ff203, 0xe480f920, + 0x3e402fda, 0x03e480f9, 0x203e480e, 0x5003e606, 0x70000000, 0x00000000, + 0x1805e400, 0xf9283f40, 0x0f9003e4, 0x00f9103e, 0x400f9003, 0xe400f900, + 0x3f401f51, 0x033400cd, 0x0431400e, 0xd0031400, 0xfd003f48, 0x0cd003e4, + 0x80fd0013, 0x400c5003, 0x3400cd00, 0x12480cd0, 0x032400fd, 0x103f490d, + 0xd2832604, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8082e0, + 0x00b8002e, 0x000b8002, 0xe008b800, 0x2e020b80, 0x02e80088, 0x00260018, + 0xa4862028, 0xe8002e8a, 0x2a0202e0, 0x44b8460a, 0x00288002, 0x20a0a800, + 0x22040884, 0xa2a030b8, 0x002e0a48, 0x80020e06, 0x30000000, 0x00000000, + 0x0805c400, 0xb1002c40, 0x0b1202c4, 0x00b1002c, 0x400b1002, 0xc400b100, + 0x28400b90, 0x02641089, 0x0024400a, 0x130e0400, 0xb1062c4c, 0x0a1282c4, + 0x04b11060, 0x44481022, 0x04808100, 0x20402813, 0x028400b1, 0x002c4d09, + 0x102e0201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x400b9002, 0xe400b900, 0x2e504b90, 0x02e40389, 0x09264008, + 0x90022400, 0xb9100e48, 0x2a9022e4, 0x84bb22a2, 0x51089002, 0x2c20a961, + 0x22400818, 0x02a400b9, 0x042e4008, 0xb5020600, 0x60000000, 0x00000000, + 0xa010e400, 0xf9003e40, 0x0f9013e4, 0x08f9003e, 0x400f9003, 0xe400b904, + 0x3a400b10, 0x02254089, 0xc130480a, 0x9c022400, 0xf9403c50, 0x0e9003e7, + 0x00f14030, 0x502c9003, 0x2400c9c0, 0xb2600c90, 0x03a400f9, 0x003e400d, + 0x98032800, 0x30000000, 0x00000000, 0xa800a400, 0xf9003e70, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e400f9a, 0x03a400f9, 0x20ba520f, + 0x9213e420, 0xe9003e40, 0x0f9013e4, 0x00f9003e, 0x650f921b, 0xe500f900, + 0x3e500f90, 0x03ec00f9, 0x033c400f, 0x9803ea04, 0x20000000, 0x00000000, + 0x2810a000, 0xf8003e02, 0x0c800360, 0x00f8003e, 0x000f8003, 0xe000f800, + 0x3e100f80, 0x832000e8, 0x4832104c, 0x004b6000, 0xc8407210, 0x2c820320, + 0x05c840b2, 0x000c8403, 0x2080c840, 0x3c000e80, 0x23e000f8, 0x053e0083, + 0x020b0a04, 0x20000000, 0x00000000, 0x28042800, 0xba002f90, 0x0aa04728, + 0x00ba002e, 0x800ba002, 0xe800ba00, 0x2f801be8, 0x0a1901c6, 0x4023a80d, + 0xe9033900, 0xdec423ad, 0x0de82228, 0x00de4023, 0x802ae003, 0x7b808e88, + 0x2e800fa0, 0x832800be, 0x822f880b, 0xe4820a00, 0x00000000, 0x00000000, + 0x28054c00, 0xb3002cd4, 0x0830020c, 0x00b3002c, 0xc00b3002, 0xcc00b300, + 0x2cc44b38, 0x020c80a3, 0x40a0e028, 0x3c028f00, 0x83302cd0, 0x203c020c, + 0x0583f024, 0xc008b102, 0x2c028b08, 0x2cc00a18, 0x028e00b3, 0x002ce00b, + 0x38024a00, 0x50000000, 0x00000000, 0x20011c00, 0xb7002de0, 0x0a7a021c, + 0x00b7002d, 0xc00b7002, 0xdc00b700, 0x2dc00b70, 0x863d008f, 0x0021c008, + 0x74421e20, 0x9f802dc0, 0x0b78823e, 0x01950024, 0x820a7012, 0x7c008700, + 0x2dc00b50, 0x121820b7, 0x412dc00b, 0x30524800, 0x40000000, 0x00000000, + 0x28081e00, 0xf7803de0, 0x0cfb0b1e, 0x00f7a83d, 0xe00b7803, 0xde00b780, + 0x2da10b68, 0x031e00a5, 0x8131e008, 0x38039e04, 0xc780ace0, 0x0c780b1e, + 0x048780a5, 0xe00c7803, 0x1e00c780, 0x3ce04ef9, 0x139e40f7, 0x823de00f, + 0x78034802, 0x00000000, 0x00000000, 0x081dac00, 0xfb023c80, 0x0fb003ac, + 0x00ff303e, 0xc00fb003, 0xec00bb00, 0x3e808f80, 0x03cc00e1, 0x003ec00f, + 0x9032a000, 0xf30032c0, 0x09b023cc, 0x00f1013a, 0x400fb043, 0xcc001900, + 0x3ec00fb0, 0x03a880f8, 0x003e000f, 0x90038206, 0x60000000, 0x00000000, + 0x4005fe00, 0xff8033e0, 0x0df883fe, 0x08ff8033, 0xe00ff803, 0xfe00ff90, + 0x3fe40df8, 0x031e01d7, 0x9033e02d, 0xf0037ec4, 0xcf803fec, 0x0cf8033e, + 0x40ef2033, 0xc40cfa03, 0x3e10cf80, 0x3fe00fd8, 0x033e00ff, 0x803fe00c, + 0xe803d004, 0x70000000, 0x00000000, 0xa8119c00, 0xb70031d8, 0x0b7002dc, + 0x00bf0021, 0xc00b7002, 0xdc00b700, 0x2fc40af2, 0x421c0286, 0x70a1c028, + 0xf203fdc4, 0x47280dd4, 0x0ae1221c, 0xc0b40109, 0x84285602, 0xb400d600, + 0x2dc00b50, 0x029000b5, 0x002f444a, 0x6002ea04, 0x60000000, 0x00000000, + 0x00009c00, 0xb7002140, 0x0b7002dc, 0x00b70025, 0xc00b7002, 0xdc00b703, + 0x2d060860, 0x8270009d, 0x08215028, 0x63061cc0, 0x94022d48, 0x1850025c, + 0x01b20821, 0xdc487702, 0x10008700, 0x2dc00b10, 0x021c00b7, 0x002dc008, + 0x6102e440, 0x20000000, 0x00000000, 0x6014cc00, 0xb3002020, 0x8b3002cc, + 0x00b30024, 0xc00b3002, 0xcc00b300, 0x2c101a18, 0x02400100, 0xc0204008, + 0x8820a000, 0x80c02c60, 0x0a80004e, 0xc0b0c062, 0x40089002, 0x80209821, + 0x2cf20b19, 0x128000b0, 0x002c000a, 0x3100da00, 0x30000000, 0x00000000, + 0x2815ac00, 0xfb0032c2, 0x0df003ec, 0x00ff0036, 0xc00fb003, 0xec00bb00, + 0x1ed018b0, 0x0b6c22d9, 0x8020c008, 0xb80a2c02, 0xdb103ed6, 0x28b00b6f, + 0x00f84032, 0xf008bc0b, 0x2500cb43, 0x2ee80bb8, 0x012408f9, 0x003e400c, + 0x3003ca00, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003a40, 0x4fb003ec, + 0x00ff003a, 0xc00fb003, 0xec01fb00, 0x3e580eb0, 0x03a100f9, 0x203e700e, + 0xa1a3ed08, 0xf8003e50, 0x2f9403ac, 0x08f0403e, 0xf00dbc03, 0xe500fb40, + 0x3ec00fb0, 0x23ec00f9, 0x403e000f, 0xb002e400, 0x30000000, 0x00000000, + 0x0150fc08, 0xfb003fc8, 0x0df0033c, 0x10ff0003, 0xc00ff007, 0xfc00ff01, + 0x37800fe0, 0x07fc80dc, 0x0033c00c, 0xf80b7c01, 0xcf1133c0, 0x0ce00b1c, + 0x00cc083b, 0xc00cd003, 0x3008fe00, 0x33c00ff0, 0x0b3000fc, 0x003f400f, + 0xd4032000, 0x30000000, 0x00000000, 0x81046c00, 0xbb002c30, 0x08b0022c, + 0x009b047e, 0xc00bb002, 0xec00bb00, 0x2e680e88, 0x038004a0, 0xc036600f, + 0x84026048, 0xa0403c60, 0x0d8902ac, 0x00a8c02a, 0x620c8c0a, 0xa20098a1, + 0x22c00b38, 0x622b20b8, 0xe02e220b, 0x90022040, 0x10000000, 0x00000000, + 0x80056c00, 0xbb002e80, 0x1930026c, 0x00b3022a, 0xc00bb002, 0xec00bb00, + 0x2ee00b91, 0x02ed00a9, 0x8026e208, 0x9506a000, 0x8b0822e0, 0x08b4022c, + 0x00881426, 0x6008b842, 0x2600b910, 0x22c08bb1, 0x0a6440b9, 0x802e600b, + 0xb0022004, 0x40000000, 0x00000000, 0x08000c00, 0xb3002c00, 0x1830024c, + 0x00b30028, 0xc00b3002, 0xcc00b302, 0x2c400a10, 0x068008a8, 0x0026400b, + 0x00060008, 0xa0012440, 0x4900060c, 0x00a0002c, 0x40481002, 0x0408b000, + 0x20c00bb0, 0x024400b1, 0x002c000b, 0x302a0200, 0x00000000, 0x00000000, + 0x00086c00, 0xfb003e00, 0x0df00b6c, 0x00bf002a, 0xc18fb002, 0xec00bb00, + 0x3e000f80, 0x02e000b8, 0x0236001c, 0x8003e000, 0x88013200, 0x1c80032c, + 0x00ca003e, 0x400c9043, 0x2000f800, 0x32c08ff0, 0x2b6000f8, 0x003e400f, + 0x90032002, 0x10000000, 0x00000000, 0xa019fc00, 0xff003f00, 0x0ff023bc, + 0x00df003f, 0xc00ff003, 0xfc00ff04, 0x3f401fd0, 0x13b000ec, 0x003d004e, + 0xc002f004, 0xfc013d00, 0x0bc001fc, 0x00fc04b9, 0x406e4003, 0xf0005c00, + 0xbfc00ff0, 0x4bb000fc, 0x003f000f, 0xd003e806, 0x70000000, 0x00000000, + 0xc005fe00, 0xff803fe0, 0x0ff803f0, 0x00cf8137, 0xc80ed463, 0x7e00cf40, + 0x33200fe9, 0x035a00fc, 0x943ba00e, 0x78037a00, 0xfc4037e0, 0x0ff803d2, + 0x02cf873f, 0xd80cf203, 0x3840ce06, 0x3fe00c78, 0x033200ff, 0x803fe00f, + 0xf803f000, 0x70000000, 0x00000000, 0x8010ee00, 0xbb802ee0, 0x0bb802e8, + 0x808b812e, 0xe448b500, 0xcc028b50, 0x02200b10, 0x022e00b0, 0x202aa088, + 0xb802aa00, 0xba6020ca, 0x0bb802e8, 0x208b802e, 0xd048bc02, 0x29008ac0, + 0x2ee128b8, 0x036200bb, 0x802ee00b, 0xb802e004, 0x30000000, 0x00000000, + 0x0805cc00, 0xb3002cc0, 0x0b3002c0, 0x2083002c, 0xc00b1202, 0xcc109323, + 0x20004b22, 0x02c000b0, 0x0120010a, 0x30020804, 0xb01424c0, 0x0b3002e0, + 0x84a3002c, 0x98083106, 0x09808140, 0x2cc01830, 0x020400b3, 0x002cc00b, + 0x3002c201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002cc, + 0x008b022e, 0x440b9100, 0xcc008a08, 0x22610380, 0x02a600b0, 0x012ac008, + 0xb022ae04, 0xb24042c0, 0x0bb002e8, 0x00ab002e, 0x8108b106, 0x28008910, + 0x2ec018b0, 0x426080bb, 0x002ec00b, 0xb002f004, 0x60000000, 0x00000000, + 0x4015ec00, 0xfb003ec0, 0x0fb003e3, 0x82cb003e, 0xf00f9803, 0xec00db10, + 0xb2380ba4, 0x03eb04fa, 0xc072840e, 0x30032700, 0xf81036c1, 0x4fb043e9, + 0x20eb007e, 0xc02cb48b, 0x2210ca80, 0x3ec00cb0, 0x032d80fb, 0x003ec00f, + 0xb003d004, 0x70000000, 0x00000000, 0xe001bc00, 0xff003fc0, 0x0ff003f8, + 0x80df003d, 0xe00cb801, 0xfc10ef00, 0x3f000fd1, 0x037c01be, 0x403fa04f, + 0xf003f401, 0xfc803fc0, 0x0ff003fc, 0x01df017d, 0xe44ff003, 0xf240fa80, + 0x3fc00ff0, 0x03f200ff, 0x003fc00f, 0xf003f800, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb003ac0, 0x0fb003e4, 0x00db003f, 0x100d900b, 0x6c40df40, + 0x3e520fb4, 0x43e920fa, 0x183a520d, 0xb0036910, 0xf8623ec3, 0x0eb003e9, + 0x00eb003e, 0xc20fb043, 0x0400f908, 0xb2c00cb2, 0x03ad80fb, 0x043ec00f, + 0xb003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec, + 0x000b042e, 0x4188b012, 0x2f008b00, 0x2e400b93, 0x0226008a, 0xc020e108, + 0xb8122404, 0xb8e02ee0, 0x08b012cc, 0x000b012e, 0xe04b3d12, 0x24c0b909, + 0x20c22830, 0x022b20bb, 0x002ec00b, 0xb002f200, 0x40000000, 0x00000000, + 0xe0054c00, 0xb30028c0, 0x0b3002c0, 0x0413002c, 0xc0093012, 0x0f84bb00, + 0x2c0018a0, 0x028b00a0, 0x406cc008, 0x30024800, 0xb1002ce0, 0x0a3002c4, + 0x00a3002c, 0x648b0042, 0x0804b2c0, 0x20c0093d, 0x22890093, 0x002cc00b, + 0x3002f800, 0x50000000, 0x00000000, 0x60011e00, 0xb7802de0, 0x0b7802ca, + 0x0887802c, 0xe0087802, 0x5e00a490, 0x2d600b78, 0x123a2015, 0x8167e208, + 0x78021a00, 0xb7806de0, 0x087802fe, 0x0087802d, 0x600b488a, 0x5a00b682, + 0x21e43978, 0x021200b7, 0x802de00b, 0x7802d800, 0x40000000, 0x00000000, + 0x48080c00, 0xf30038c0, 0x0f3003c4, 0x00d3103c, 0xc44d100b, 0x4c00f110, + 0x3c8c0f30, 0x158008f2, 0x103c082d, 0x31834c00, 0xf1103cc2, 0x0e3003c4, + 0x00e3003c, 0x000f3003, 0x0880f300, 0x30c00d30, 0x038c00f3, 0x003cc00f, + 0x3003d202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc10fd007, 0x3c00cc10, 0x3fc40fd1, 0x03b800ef, 0x0139400f, + 0xf023fc00, 0xff003fc4, 0x0ff003fc, 0x00ff003f, 0x040f7103, 0xb800ff80, + 0x3dc00ef0, 0x03fc00ff, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000, + 0xa805ec00, 0xfb003ec0, 0x0fb002e0, 0x80fb001f, 0x840fb003, 0xec00ff10, + 0x32400ba0, 0x03a810f8, 0x603ec00f, 0xb003e400, 0xf9283ec0, 0x0fb003ec, + 0x00fb003e, 0xc00f8003, 0x2800ca00, 0x3cc10cb0, 0x03ec00fb, 0x003ec00f, + 0xb003ea00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7042d8, + 0x30b7002d, 0xe00b7022, 0xdc00b3a0, 0x21400b70, 0x22d800b5, 0x086dc00b, + 0x7002d410, 0xf5002dc0, 0x0b7002dc, 0x00b7002d, 0xc08b4002, 0x18008600, + 0x2dc00870, 0x20d400b7, 0x002dc00b, 0x7002f204, 0x60000000, 0x00000000, + 0xc0009e00, 0xb7802de0, 0x0b7802de, 0x04b7842d, 0xa00b7802, 0xde00a7a0, + 0xe1e00b78, 0x029e00b6, 0xc32d601b, 0x7802de00, 0xb7c02de0, 0x0b7802de, + 0x20b7802d, 0xe00b3802, 0x0e008784, 0x2de00a78, 0x10de00b7, 0x802de00b, + 0x7802f000, 0x00000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002ce, + 0x00b3012c, 0xe00bb802, 0xcc00bb20, 0x20d10b3a, 0x02cf80b3, 0x802cfc0b, + 0x3002cc90, 0xa3802cc0, 0x0b3002cd, 0x20b3000c, 0xdc0b3002, 0x0c408300, + 0x2cc00a30, 0x02cc80b3, 0x002cc00b, 0x3002d204, 0x30000000, 0x00000000, + 0xe815a800, 0xfa003e80, 0x0fa003eb, 0x80fa003f, 0x860fa083, 0xe800eea2, + 0xb3950f6a, 0x039920fa, 0x823f900f, 0x2003f800, 0xba003e80, 0x0fa003f8, + 0x00fa003e, 0xb00fa00b, 0x2b02ca00, 0x3c800ea0, 0x03d820fa, 0x003e800f, + 0xa003fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0, + 0x20f8003e, 0x000f8003, 0xe000f800, 0x7e000f84, 0x03e000f8, 0x423e000f, + 0x8403e040, 0xf8003e00, 0x0f8013e0, 0x00f8013c, 0x100f8403, 0xc120fc00, + 0x3e002580, 0x03e100f8, 0x003e000f, 0x8003d200, 0x30000000, 0x00000000, + 0x0810e400, 0xf9003e40, 0x0f9003ec, 0x00c9003e, 0x400f9003, 0x2400e900, + 0x36500f9a, 0x232400cb, 0xa03e640f, 0x98032400, 0xfb803e40, 0x0f9003e4, + 0x00e9003e, 0x600c1103, 0x2600c940, 0x36601c98, 0x03e500c9, 0x003e400f, + 0x9003c204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4, + 0x0289002f, 0x400b9002, 0x2620bd00, 0x02410b94, 0x82240089, 0x412e400b, + 0x94022400, 0xb9802e44, 0x0b9002c4, 0x0089002e, 0x70089c02, 0x27008180, + 0x22400891, 0x02e680a9, 0x002e400b, 0x9002e000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b900284, 0x0089002e, 0xc00b9002, 0x24903900, + 0x22400bb0, 0x122c118b, 0x402ed00b, 0x9502ac00, 0xb9102e40, 0x0b9002e4, + 0x00a9002e, 0x4408d002, 0x35808d00, 0x26440890, 0x12e40089, 0x022e400b, + 0x9002c600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4, + 0x4081002c, 0x400b1102, 0x0440b114, 0xa4400b91, 0x02041081, 0x102c400b, + 0x10020400, 0xb3132c44, 0x0b1002e5, 0x0081002d, 0x4408700a, 0x14428502, + 0x20404810, 0x42e401a1, 0x006c400b, 0x1002c200, 0x00000000, 0x00000000, + 0x380d6000, 0xf8003e00, 0x0f8003a1, 0xa2c8003e, 0x0a0f8683, 0x2100e868, + 0x36000f84, 0x0b2002c8, 0x403e000f, 0x80032000, 0xf86d3e10, 0x8f8003e0, + 0x00e8003e, 0x9a2c8283, 0x21a0cc28, 0x36000880, 0x23e000c8, 0x003e000f, + 0x8003ce03, 0x10000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4, + 0x80f9003f, 0x400fd20b, 0xe484fd24, 0x3b408ff2, 0x03f400f9, 0x213f400f, + 0x900bf400, 0xf9213e48, 0x0f9003f4, 0x00f9013e, 0x480f9003, 0xe480f904, + 0x3e402f90, 0x03f400f9, 0x003e400f, 0x9003e607, 0x70000000, 0x00000000, + 0x1805a400, 0xf9003e40, 0x0f9003e4, 0x01c90036, 0x404f9283, 0xe400c900, + 0x38401fd0, 0x13f402cd, 0x0035400f, 0xd0202400, 0xfd003e40, 0x0f9003c4, + 0x40c9003f, 0x400cd011, 0x3410fd00, 0x33400dd0, 0x03f400f9, 0x003e400f, + 0x9003c600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e8, + 0x0088002e, 0x000b0002, 0xe0028800, 0x22000b80, 0x02e00088, 0x0022000b, + 0x80022000, 0xb8002e00, 0x0b8002e0, 0x8088002e, 0x00088022, 0x2010b800, + 0x22000880, 0x02e000b8, 0x003a000b, 0x8002ce04, 0x10000000, 0x00000000, + 0x0804c400, 0xb1002c40, 0x0b1002c4, 0x0081002c, 0x400b1002, 0xc4008100, + 0x28400b10, 0x02441481, 0x0024400b, 0x10020400, 0xb1002c40, 0x0b1002c4, + 0x8281002c, 0x40281002, 0x0400b100, 0x20404130, 0x02c400b1, 0x006c400b, + 0x1002c201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e6, + 0x0089002e, 0x500b9042, 0xc40c8900, 0x22421b92, 0x02e42089, 0x10224a4b, + 0x90222580, 0xb9002e40, 0x0b9002e4, 0x0089002e, 0x4008920a, 0x2504b902, + 0x224008b0, 0x22ec00b9, 0x002a400b, 0x9002c604, 0x60000000, 0x00000000, + 0xa015e400, 0xf9003e40, 0x0f9003e5, 0x0289007e, 0x640f9803, 0xe400c9a2, + 0x3a440bd4, 0x03c500cd, 0x00364007, 0x100b2500, 0xbd102e40, 0x0f9043e4, + 0x00c9003e, 0x520c9203, 0x2400f9d8, 0xb2400d90, 0x03e4c0f9, 0x002e400f, + 0x9003e804, 0x70000000, 0x00000000, 0xa801a400, 0xf9003e40, 0x0f9003e4, + 0x00f9023e, 0x600f9c03, 0xec00f110, 0x2ee28f98, 0x83e480f9, 0x003e400f, + 0x90036408, 0xf9803ec0, 0x0f9043e4, 0x00f9003e, 0x408f9003, 0xe400f100, + 0x3e400f90, 0x23e620f9, 0x003e400f, 0x9003ea00, 0x60000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e1, 0x02c8043e, 0x100f8003, 0x2060b840, + 0x3e100f85, 0x03e108f8, 0x0422040d, 0x8043e100, 0xf8103204, 0x0f8003e0, + 0x00e8003c, 0x000d0583, 0x2008c800, 0x1e000788, 0x03e002c8, 0x023e000f, + 0x8003ca04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8, + 0x008a002e, 0x800ba002, 0x2900ba00, 0x2e8008e4, 0x02f800be, 0x4823b008, + 0xe802e800, 0xbe4022a0, 0x0ba000e8, 0x008a002f, 0x9c08ec02, 0x39008ed2, + 0x2c800be0, 0x02f8008a, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000, + 0x28054c00, 0xb3002cc0, 0x0b3002ac, 0x00830028, 0xc00b3002, 0x0e01b300, + 0x24c00a30, 0x02cc00bb, 0x8820f20b, 0x20828c00, 0xb38860c0, 0x0b3002ec, + 0x00b3002c, 0xf0093c02, 0x0e208390, 0x2ce00b30, 0x02cf4083, 0x002cc00b, + 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x4b7002dc, + 0x4087002d, 0xc01b780a, 0x1c01b720, 0x2fa20862, 0x02dc00b5, 0x0023e00a, + 0x6082dc00, 0xb7822181, 0x0b7002fc, 0x8097002c, 0xc0087002, 0x0f008500, + 0x6dd00940, 0x02de0087, 0x002dc00b, 0x7002e800, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7803de0, 0x0f78038e, 0x80c7803d, 0xe00f7903, 0x1a40f7e0, + 0x3de08e58, 0x03de00fe, 0x80b1e00f, 0x78019e00, 0xfc80b1e0, 0x0f7803de, + 0x00f7803d, 0xe00d380b, 0x1e02c782, 0x3de00f78, 0x03de00c7, 0x803de00f, + 0x7803ea02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ed, + 0x00fb003e, 0xc00fb60b, 0xe000fb04, 0x7e820ee9, 0x03ec007c, 0x923ec00d, + 0x9003ec00, 0xfd803e00, 0x0fb003ec, 0x40eb003e, 0x800fb003, 0xec00f900, + 0x3ec00fa0, 0x03c000fb, 0x003ec00f, 0xb003c206, 0x60000000, 0x00000000, + 0x0005fe00, 0xff803fe0, 0x0ff803ff, 0x00cf803f, 0xe00ff883, 0xbe04ff80, + 0x2fa00ff9, 0x027e40f7, 0x8033e00f, 0xf2133e00, 0xcf883370, 0x0ff901fe, + 0x00cf903f, 0x600cf803, 0xb6080f90, 0x39600ef8, 0x03fe00ff, 0x803fe00f, + 0xf803c000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002fc, + 0x0087042d, 0xc00bf202, 0x9c00b700, 0x2d880b75, 0x031c40b5, 0x4029080b, + 0x700a1c12, 0x8f402184, 0x0b7002fc, 0x60d7002f, 0xc00d7002, 0x3000d700, + 0x21c00d40, 0x02dc40b7, 0x0039c00b, 0x7002ea04, 0x60000000, 0x00000000, + 0x00009c00, 0xb7002dc0, 0x0b7002dd, 0x0087002d, 0xc20b704e, 0x1000a700, + 0x2d004bd1, 0x22dc00be, 0x0021c01b, 0x71023c00, 0x86082140, 0x0b7046dc, + 0x0087042d, 0xc0087002, 0x9c008742, 0x29c00a70, 0x02dc00b7, 0x002dc00b, + 0x7002c000, 0x20000000, 0x00000000, 0x2014cc00, 0xb3002cc0, 0x0b3002ce, + 0x4083002c, 0xf80b3002, 0x4008b3f0, 0x6c0003b6, 0x028d84b3, 0x4028100b, + 0x10020e44, 0x83802000, 0x0b3002ec, 0x2093002c, 0x80093002, 0x08019380, + 0x60c00820, 0x02cb80b3, 0x0028c00b, 0x3002c804, 0x30000000, 0x00000000, + 0xa815ac00, 0xfb003ec0, 0x0fb003fc, 0x02cb003e, 0xc00ff803, 0x2c00ff00, + 0x2e400bbc, 0x03ef00fb, 0x4012e08b, 0xb0022f00, 0xcb00b240, 0x0fb003fe, + 0x00cb003e, 0x800c3023, 0xa800c220, 0x2ac00ab0, 0x03e720fb, 0x003ec00f, + 0xb003ea04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0fb003cc, + 0x00fb003e, 0xc00fb143, 0xad00fb01, 0x3e020fe1, 0x016140ff, 0x003ef80f, + 0xb403ec00, 0xf7003e80, 0x0fb003ec, 0x00fb003e, 0x900fb003, 0xe500f940, + 0x3ec08580, 0x03ed00fb, 0x003ac00f, 0xb003e000, 0x30000000, 0x00000000, + 0x0110fc00, 0xff003fc0, 0x0ff003fc, 0x00cf003f, 0xc00ff003, 0x3001ff00, + 0x3f4444dc, 0x033e50df, 0x483f088f, 0xf0537c30, 0xfc403b60, 0x0ff003fc, + 0x00cf003f, 0x600cf00b, 0x3e00cc00, 0x33c00df8, 0x03f4000f, 0x001fc00f, + 0xf003c044, 0x30000000, 0x00000000, 0x81046c00, 0xbb0026c0, 0x0bb002ec, + 0x08ab012e, 0xc00bb002, 0x2081bb00, 0x2c200fb8, 0x022088bb, 0x023e380e, + 0x18022c00, 0xbb402220, 0x0bb002ec, 0x028b002e, 0x350ab882, 0x2444a9e0, + 0x2ac00ba4, 0x02c300ab, 0x002ec00b, 0xb002e040, 0x10000000, 0x00000000, + 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x008b002e, 0xc00b300a, 0x2c84bb00, + 0x2e800ab0, 0x0e2c00bb, 0x002ec00b, 0x98822c00, 0xbb002a48, 0x0bb002ec, + 0x008b002c, 0x4208a102, 0x09008b80, 0x22400982, 0x42ea00ab, 0x002ec00b, + 0xb002e000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc, + 0x0283002c, 0xc04b3002, 0x0800b300, 0x2c801b30, 0x060000b3, 0x002c000a, + 0x100a0c04, 0xb3002080, 0x0b3002cc, 0x0083002c, 0xc10a3002, 0x0000a304, + 0x28c00b00, 0x02e800a3, 0x002cc00b, 0x3002c201, 0x00000000, 0x00000000, + 0x000d6c00, 0xfb003ec0, 0x0fb003fc, 0x008b043e, 0xc08ff002, 0x2000bb00, + 0x3e000eb0, 0x132c04db, 0x013e001f, 0x90032c00, 0xfb003a40, 0x0fb003ec, + 0x00cb003e, 0x400c9003, 0x2c08c900, 0x72c05d80, 0x13ec00eb, 0x003ec00f, + 0xb003c003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff0037c0, 0x0ff003fc, + 0x00ff013f, 0xc00ff003, 0xf000ff02, 0x3f001e70, 0x13f000ff, 0x073b008e, + 0x50039c00, 0xff003f00, 0x0ff003fc, 0x00ff003f, 0x000f7043, 0xf000f500, + 0x3fc00fc0, 0x03f800ff, 0x003fc00f, 0xf003e806, 0x70000000, 0x00000000, + 0xc015fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xfe00fc80, + 0x3f200cf8, 0x03d204d4, 0x8033300f, 0xc903f200, 0x4cc03324, 0x0cc903f0, + 0x80c42033, 0x0c0dd607, 0x3e44dc28, 0x33e00ff2, 0x01fe00df, 0x803d020c, + 0xc3433000, 0x70000000, 0x00000000, 0xa000ae00, 0xbb802ee0, 0x0bb802ee, + 0x00bb802e, 0xe00bb802, 0xee10b880, 0x2e2008b8, 0x02ee048b, 0x8136c80b, + 0xb213cca0, 0x8b2022c0, 0x0a3002e2, 0x40a8903e, 0x1c089013, 0x2c80b840, + 0x2ae00bb1, 0x0a2e00bb, 0x002eb007, 0x0702a800, 0x30000000, 0x00000000, + 0x0804cc00, 0xb3002cc0, 0x0b30028c, 0x00b3002c, 0xc00b3002, 0xcc00b080, + 0x0e003830, 0x02e40033, 0x0200c08b, 0x3202cc04, 0x830220c8, 0x883222c0, + 0x00a00020, 0x00281302, 0x0c00b004, 0x20c00b30, 0x020c00a0, 0x002c4138, + 0x02020201, 0x70000000, 0x00000000, 0xe015ac00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0xec10b880, 0x2e2008b0, 0x02ec00ab, 0x0626c089, + 0xa0422080, 0x8a542280, 0x0ab00268, 0x00ab142e, 0x40083002, 0x6c10b888, + 0x2ac01bb0, 0x402c00bb, 0x026ec02b, 0x9000b804, 0x60000000, 0x00000000, + 0x0015ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00f881, + 0x2c300cb0, 0x03ec28fb, 0x4032f00f, 0xb842ec82, 0x8b80b2c2, 0x8cba03e2, + 0x20e8a032, 0x040c9802, 0x2c00f880, 0x32c00f30, 0x432c00eb, 0x403e2204, + 0xb8090000, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff003fc, + 0x00ff007f, 0xc00ff001, 0xfc00fd04, 0x3f0007f0, 0x23d4045f, 0x913fe48f, + 0xf123fe00, 0xff823f64, 0x0fe923d5, 0x00f601bc, 0x800fba53, 0xbc00f900, + 0x3fc08ff0, 0x03fc00ff, 0x021f040f, 0xc983e804, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec01d900, + 0x3e104fb0, 0x13e902c8, 0x403a100c, 0x94032d04, 0xc90032c6, 0x4f94132d, + 0x04c948ba, 0xc0ac9003, 0xac30f940, 0x32c00fb0, 0x032c00fa, 0x507a190e, + 0xb00b3004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec, + 0x00bb022e, 0xc00bb002, 0xec04b900, 0x2e140bb8, 0x12e40083, 0x4162f40d, + 0xb0862f40, 0xdb0036d0, 0x0bb0036c, 0x005b4036, 0xc008b582, 0x2f288900, + 0x36c00bf8, 0x036c00bb, 0xd0202008, 0x9c837200, 0x40000000, 0x00000000, + 0xc0040c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc00b000, + 0x2c100b31, 0x82c52483, 0x182cc029, 0x301a2f50, 0x8b1022f0, 0x0b3e02c0, + 0x00008028, 0x3608182a, 0x0d00b890, 0x28c00b30, 0x028c00b3, 0x0028340b, + 0x8802b800, 0x00000000, 0x00000000, 0x60001e00, 0xb7802de0, 0x0b7802de, + 0x00b7802d, 0xe00b7842, 0xde00b5c4, 0x2d220b78, 0x22da0084, 0xa0252408, + 0x58021ec0, 0x959025e4, 0x0b5992cc, 0x40958821, 0xe0885802, 0x1e008590, + 0x21e00b78, 0x02de00bf, 0x9025a009, 0x6a02d800, 0x00000000, 0x00000000, + 0x48180c00, 0xf3003cc0, 0x0f3003cc, 0x00f3003c, 0xc00f3003, 0xcc50b300, + 0x3c140b30, 0x02c460c3, 0x002ed629, 0xb3020c80, 0xcb123041, 0x0f2102c4, + 0x00c22028, 0x800c3003, 0xac00f100, 0xa8c10fb0, 0x838c00f1, 0x0038400f, + 0x00039a06, 0x00000000, 0x00000000, 0x401cbc00, 0xff003fc0, 0x8ff003fc, + 0x00ff003f, 0xc00ff003, 0xfc00ff01, 0x3f400ff0, 0x03fc04ff, 0x203bc50f, + 0xf103fc80, 0xbf103fc0, 0x0ff9037c, 0x40ff003f, 0xc44ff003, 0xfc00ff00, + 0x3fc00ff0, 0x817c00f7, 0x003bc00c, 0xf2435006, 0x20000000, 0x00000000, + 0x0805ec00, 0xfb003ec0, 0x0fb007ec, 0x00fb003e, 0xc00fb003, 0xec10f800, + 0x3e004cb0, 0x03ac00fb, 0x0236c00c, 0xa003e200, 0xca803280, 0x2eb00328, + 0x00fb00b2, 0x400fb003, 0xec00f880, 0x32c00fb0, 0x032c00fb, 0x0032c00c, + 0xb0030200, 0x70000000, 0x00000000, 0xc8019c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0xc00e7002, 0xdc00b500, 0x2dc00370, 0x42d400b7, 0x0021c008, + 0x7002fc00, 0xaf0021c0, 0x08f0421c, 0x00b30031, 0xc00b7002, 0xdc00bf00, + 0x21c00bf2, 0x021c00b7, 0x0020c028, 0x200a3200, 0x60000000, 0x00000000, + 0x00009e00, 0xb7802de0, 0x0a7812de, 0x00b7802d, 0xe00b7802, 0xde00b780, + 0x2da00b78, 0x02de00b7, 0xc2a5e088, 0x7c02de00, 0x978021e0, 0x0978821e, + 0x20b78025, 0xe00b78a2, 0xde11b580, 0x21e00b78, 0x025e00bf, 0x8029e008, + 0x78060000, 0x20000000, 0x00000000, 0x6814cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00a3002, 0xcc08b344, 0x2cc80b30, 0x02d160b4, 0x00213408, + 0x4c02d141, 0xb4182112, 0x09c8020c, 0x20b30824, 0xe00b3042, 0xcc00b3d0, + 0xa0c00b30, 0x0a4c00bb, 0x8028c408, 0xb9061204, 0x30000000, 0x00000000, + 0xe805a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800fa001, 0xe800fe40, + 0x3fa20fa0, 0x03e900fa, 0x803680ac, 0xa803eb00, 0xdac092a8, 0x0da40b39, + 0x08f6c8b7, 0x824fa823, 0xe800be40, 0x02800fa0, 0x036808fe, 0x003bb11c, + 0xec0a3a00, 0x20000000, 0x00000000, 0x4810a000, 0xf8003e00, 0x4f8003e0, + 0x00f8003e, 0x000e8003, 0xe010f801, 0x3e100f80, 0x53e100f8, 0xc03e000f, + 0x8203e080, 0xe8003e10, 0x048203e0, 0x00f8403a, 0x204f8003, 0xe000f820, + 0x3e000f80, 0x03a000f8, 0x50b6020f, 0x8003d204, 0x20000000, 0x00000000, + 0x0810a400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe401e908, + 0x3e400c90, 0x03e500f9, 0x0212520c, 0x9213e610, 0xf9807e48, 0x0c980304, + 0x04c98136, 0x400f9903, 0x2700f900, 0x3e400f10, 0x03a400f9, 0x8030682c, + 0x98838204, 0x20000000, 0x00000000, 0x80046400, 0xb9002e40, 0x039042e4, + 0x00b9002e, 0x400b9002, 0xe400b902, 0x2c704890, 0x02e700b1, 0x8076522a, + 0x9802e740, 0xb9806e68, 0x089c0364, 0x00899236, 0x444b900b, 0x2500b9c0, + 0x2e400b95, 0x022400b9, 0xb0a27028, 0x9a022000, 0x00000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9002, 0xe400a908, + 0x2e581898, 0x02f504bf, 0x20094008, 0xf002f500, 0xbd142d40, 0x08d50224, + 0x009908a2, 0xc08b1002, 0x2410a918, 0x2e400b90, 0x82a400bb, 0x00224208, + 0x92028600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4, + 0x00b1002c, 0x400b1002, 0xc400b100, 0x2c400810, 0x02d400b7, 0x002d4408, + 0x51025440, 0xb5102d44, 0x38510244, 0x02910024, 0x640b1102, 0x0c40b110, + 0x2c400b11, 0x260400b1, 0x10204008, 0x11020201, 0x00000000, 0x00000000, + 0x381d6000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8002, 0xe000e800, + 0x3e002ca0, 0x23e000f8, 0x0028100c, 0x8402e100, 0xf8402c10, 0x4cc44320, + 0xa8d82832, 0x1a0fa693, 0x2111e868, 0x3e000f86, 0x83a000f8, 0x40320a0c, + 0x86838e07, 0x50000000, 0x00000000, 0xb81de400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xe400fd00, 0x3f400f90, 0x43e410f1, 0x0036c80f, + 0x9203e480, 0xfb243e49, 0x0f9243f4, 0x00ef00bf, 0x480fd203, 0xa491fd20, + 0x3e400f92, 0x03e400f5, 0x203f400f, 0xd243ee06, 0x70000000, 0x00000000, + 0x3805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400fd00, + 0x3f400fd0, 0x033400f5, 0x02b3440f, 0xd003b400, 0xcd103f40, 0x0cd00724, + 0x80cd0433, 0x408cd003, 0x3400fd00, 0x3e400fd0, 0x03e400f5, 0x1033494e, + 0xd2eb4e00, 0x70000000, 0x00000000, 0x1800e000, 0xb8002e00, 0x0b8002e0, + 0x00b8002e, 0x000b8002, 0xe000b800, 0x3a000b80, 0x036010ba, 0x0022080f, + 0x80922022, 0x88002c0a, 0x28820a20, 0x48a84122, 0x00288152, 0xa000b820, + 0x2e000b84, 0xc2e000b8, 0x00320048, 0x82420600, 0x30000000, 0x00000000, + 0x48008400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0xc400b100, + 0x6c400b10, 0x02cc00b1, 0x04204803, 0x12020404, 0x81002c48, 0x08128204, + 0x00a11020, 0x40081002, 0x0400b129, 0x2c400b13, 0x02c40099, 0x002c4528, + 0x1a825200, 0x20000000, 0x00000000, 0x1814a400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x400b9002, 0xe400b950, 0x2a4a0b90, 0x02e420b9, 0x1022400a, + 0x900e0420, 0x89022e48, 0x08140225, 0x80a90422, 0x48089142, 0xa410b900, + 0x2e400b90, 0x02e400b9, 0x40aa4008, 0x90000604, 0x20000000, 0x00000000, + 0xa004a400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f900, + 0x3e708b90, 0x02e500f1, 0x8232700b, 0x9e032650, 0xc9103e58, 0x0c9c0225, + 0x04e9c0b2, 0x480c9003, 0x2408f9e0, 0x7e400b90, 0x12e40099, 0xc43e480c, + 0x90036800, 0x20000000, 0x00000000, 0xe810a400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xe400f908, 0x3a400b90, 0x136410f9, 0x803a504f, + 0x9a436400, 0xf9023e40, 0x0f9a03e4, 0x08f9203e, 0x402f1003, 0xe420f990, + 0x7e400f90, 0x03e400f9, 0xa024400d, 0x1003fa14, 0x20000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe000f800, + 0x32088f80, 0x03e201c8, 0x0236140f, 0x8002e002, 0xc8003e11, 0x0c860300, + 0x10c80830, 0x01008083, 0x2000c840, 0x3a000e80, 0x03e000f8, 0x003a100c, + 0x82030a04, 0x20000000, 0x00000000, 0x08042800, 0xba002e80, 0x0ba002e8, + 0x00ba002e, 0x800ba007, 0xe800be80, 0x2b900b60, 0x02f800de, 0x8a33840b, + 0xa081bb00, 0x8a082789, 0x0dec0a28, 0x008600a3, 0x9008ee02, 0x39008eb0, + 0x22800be1, 0x83a800b6, 0x90238400, 0xec0a0200, 0x00000000, 0x00000000, + 0x08054c00, 0xb3002cc0, 0x0b3002cc, 0x01b3002c, 0xc00b3002, 0xcc00b340, + 0x24c40b30, 0xa0cc0083, 0x00a0e00b, 0xb0028d20, 0x83002ec8, 0x483c024c, + 0x0283d020, 0xe8083802, 0x0f048340, 0x28c00a34, 0x028c00b3, 0x806cd028, + 0x31028200, 0x50000000, 0x00000000, 0x20011c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0x9c00b7c0, 0x2dc00b50, 0x82de1097, 0x0021c00b, + 0x70029c20, 0x87002dc0, 0x4970821c, 0x00860221, 0xd018700a, 0x17008380, + 0x21c00b70, 0x029c00bf, 0x40254308, 0x70028804, 0x40000000, 0x00000000, + 0x28181e00, 0xf7802de0, 0x0f7803de, 0x00f7803d, 0xe00b7802, 0xde00f780, + 0x25e04f58, 0x43de0087, 0x8031e00f, 0x7803be00, 0xc7803de0, 0x0cf8034e, + 0x04c580a3, 0xe02cf803, 0x3e02c780, 0x39e00e58, 0x239e04f7, 0x807c602c, + 0x38038a00, 0x00000000, 0x00000000, 0x081dac00, 0xfb023ec0, 0x0fb003ec, + 0x00fb003e, 0xc00fb003, 0xec00f301, 0x3a800f80, 0x13cc10f9, 0x003ec00f, + 0x9003ac04, 0xfb0036c0, 0x0fa003ec, 0x00f0003e, 0xc12fb003, 0xe400f904, + 0x3ec00f90, 0x03ac00fa, 0x003a400f, 0xa0234204, 0x60000000, 0x00000000, + 0x6004be00, 0xff807fe4, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xfe00fd80, + 0x33e40fd8, 0x13fe88ff, 0x8233e40c, 0xf1033e04, 0xef913fe0, 0x4ff801fe, + 0x00ff9033, 0xe004f813, 0x3e009f80, 0x33e00ff8, 0x033e00ff, 0x8031202c, + 0xf803d800, 0x20000000, 0x00000000, 0xa8009c00, 0xb70039c0, 0x0b7002dc, + 0x00b7002d, 0xc08b7002, 0xdc00b502, 0x15c40b51, 0x02d804b7, 0x403d0048, + 0xf0249400, 0xb5020d80, 0x0b50035c, 0x00b63029, 0x8088c488, 0x9000bf60, + 0x35c00bd4, 0x035c00bc, 0x00294408, 0x52826a00, 0x20000000, 0x00000000, + 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b7002, 0xdc00bc00, + 0x21400b50, 0x02d490b7, 0x10a1c018, 0x75061800, 0xa7086d42, 0x0b7402dc, + 0x00b50221, 0x442b7102, 0x1400b400, 0x21c00b40, 0x021c00b5, 0x00294008, + 0x7016c000, 0x20000000, 0x00000000, 0x40148c00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xcc00b060, 0x24000b00, 0x02c380b1, 0x002a3508, + 0x10028220, 0x31812e30, 0x0b08020d, 0x40b04028, 0x10090802, 0x0000b0c0, + 0x24c01b00, 0x224c00b8, 0xa0284408, 0x8026d004, 0x20000000, 0x00000000, + 0x2805ac00, 0xfb003ec0, 0x0bb003ec, 0x00fb003e, 0xc00fb002, 0xec01b940, + 0x10f00f90, 0x02ee10fb, 0x4822d028, 0xb8222f20, 0xeb801ec0, 0x0fb882ed, + 0x00f080a2, 0xd00fb003, 0x24009922, 0x22c00bb0, 0x022c00f9, 0x60384028, + 0xb043ca00, 0x60000000, 0x00000000, 0xa010ec00, 0xfb003ac0, 0x0fb003ec, + 0x00fb0036, 0xc00fb003, 0xec00f840, 0x3e4c0f94, 0x13e440fa, 0x203ec20f, + 0xb133e800, 0xfb0d3e42, 0x0fb4036c, 0x90f8583e, 0x460eb013, 0xe500f940, + 0x3ec00fb4, 0x03ec10f9, 0x003e402f, 0xb2036804, 0x30000000, 0x00000000, + 0x0110fc00, 0xff003fc0, 0x0ef003fc, 0x00ff003f, 0xc00ff003, 0xfc00fd00, + 0x7fc00cd0, 0x03fa80ff, 0x01b3000c, 0xf933f650, 0xcd903f80, 0xccd203dc, + 0x04cc8033, 0x800c4013, 0x3000f408, 0x9bc00fc0, 0x01fc00fd, 0x0133400e, + 0xdc030044, 0x30000000, 0x00000000, 0x81046c00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0xec00b880, 0x2e100a8c, 0x82e184b1, 0xc062240b, + 0x9003e000, 0x89002e10, 0xa88803ac, 0x1488d8b6, 0x00688442, 0xa300b880, + 0x32c00b80, 0x12ec04b8, 0x8136600a, 0x84822040, 0x10000000, 0x00000000, + 0x80056c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc00bb002, 0xec00b9c0, + 0x2e980888, 0x02ec00b9, 0x8122c209, 0x9042cc20, 0x8b002ed4, 0x18a082ec, + 0x00880020, 0xe018b202, 0xa7003980, 0x22c00b91, 0x02ec0099, 0x81222002, + 0xa0022000, 0x50000000, 0x00000000, 0x08000c00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xcc00b000, 0x2c000a00, 0x02c004b0, 0x00200009, + 0x10028004, 0x81006c00, 0x1800028c, 0x02820024, 0x20880002, 0x8000b100, + 0x24c00b10, 0x02cc00b0, 0x0024416a, 0x00020200, 0x00000000, 0x00000000, + 0x00186c00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec11f800, + 0x2e000c80, 0x03e000f9, 0x00a0002d, 0x9002e002, 0xc9003e00, 0x0c8002ec, + 0x00c90070, 0x000c8012, 0xa011f800, 0x32c11f80, 0x27ec04d9, 0x0032402e, + 0x80030006, 0x10000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x07f003fc, + 0x00ff003f, 0xc00ff007, 0xfc01f400, 0x3f000bc0, 0x47f004f5, 0x003f004e, + 0xd003f000, 0x7d003f00, 0x0fc063bc, 0x00f4003f, 0x008fc003, 0xf000fc00, + 0x33c00fc0, 0x03fc04fc, 0x013f400f, 0xc003e806, 0x70000000, 0x00000000, + 0x00000284, 0x00a10028, 0x400a1002, 0x8400a100, 0x28400a10, 0x028400a1, + 0x0028400a, 0x10028400, 0xa1002840, 0x0a100284, 0x00a10028, 0x400a1002, + 0x8400a100, 0x28400a10, 0x028400a1, 0x0028400a, 0x10028400, 0xa1002840, + 0x0a100000, 0x00000000, 0x00000000, 0x00000004, 0x00010000, 0x40001000, + 0x04000100, 0x00400010, 0x00040001, 0x00004000, 0x10000400, 0x01000040, + 0x00100004, 0x00010000, 0x40001000, 0x04000100, 0x00400010, 0x00040001, + 0x00004000, 0x10000400, 0x01000040, 0x00100000, 0x00000000, 0x00000000, + 0x00000084, 0x00210008, 0x40021000, 0x84002100, 0x08400210, 0x00840021, + 0x00084002, 0x10008400, 0x21000840, 0x02100084, 0x00210008, 0x40021000, + 0x84002100, 0x08400210, 0x00840021, 0x00084002, 0x10008400, 0x21000840, + 0x02100000, 0x00000000, 0x00000000, 0x00000004, 0x00010000, 0x40001000, + 0x04000100, 0x00400010, 0x00040001, 0x00004000, 0x10000400, 0x01000040, + 0x00100004, 0x00010000, 0x40001000, 0x04000100, 0x00400010, 0x00040001, + 0x00004000, 0x10000400, 0x01000040, 0x00100000, 0x00000000, 0x00000000, + 0x00000080, 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020, + 0x00080002, 0x00008000, 0x20000800, 0x02000080, 0x00200008, 0x00020000, + 0x80002000, 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800, + 0x02000000, 0x00000000, 0x00000000, 0x00000200, 0x00800020, 0x00080002, + 0x00008000, 0x20000800, 0x02000080, 0x00200008, 0x00020000, 0x80002000, + 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800, 0x02000080, + 0x00200008, 0x00020000, 0x80002000, 0x08000000, 0x00000000, 0x00000000, + 0x00000080, 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020, + 0x00080002, 0x00008000, 0x20000800, 0x02000080, 0x00200008, 0x00020000, + 0x80002000, 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800, + 0x02000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000284, 0x00a10028, 0x400a1002, 0x8400a100, 0x28400a10, 0x028400a1, + 0x0028400a, 0x10028400, 0xa1002840, 0x0a100284, 0x00a10028, 0x400a1002, + 0x8400a100, 0x28400a10, 0x028400a1, 0x0028400a, 0x10028400, 0xa1002840, + 0x0a100000, 0x00000000, 0x00000000, 0x00000004, 0x00010000, 0x40001000, + 0x04000100, 0x00400010, 0x00040001, 0x00004000, 0x10000400, 0x01000040, + 0x00100004, 0x00010000, 0x40001000, 0x04000100, 0x00400010, 0x00040001, + 0x00004000, 0x10000400, 0x01000040, 0x00100000, 0x00000000, 0x00000000, + 0x00000084, 0x00210008, 0x40021000, 0x84002100, 0x08400210, 0x00840021, + 0x00084002, 0x10008400, 0x21000840, 0x02100084, 0x00210008, 0x40021000, + 0x84002100, 0x08400210, 0x00840021, 0x00084002, 0x10008400, 0x21000840, + 0x02100000, 0x00000000, 0x00000000, 0x00100007, 0x3001cc00, 0x73001cc0, + 0x073001cc, 0x0073001c, 0xc0073001, 0xcc007300, 0x1cc00730, 0x01cc0073, + 0x001cc007, 0x3001cc00, 0x73001cc0, 0x073001cc, 0x0073001c, 0xc0073001, + 0xcc007300, 0x1cc00730, 0x01cc0073, 0x001cc004, 0x00000000, 0x00000000, + 0x00000084, 0x00210008, 0x40021000, 0x84002100, 0x08400210, 0x00840021, + 0x00084002, 0x10008400, 0x21000840, 0x02100084, 0x00210008, 0x40021000, + 0x84002100, 0x08400210, 0x00840021, 0x00084002, 0x10008400, 0x21000840, + 0x02100000, 0x00000000, 0x00000000, 0x00000200, 0x00800020, 0x00080002, + 0x00008000, 0x20000800, 0x02000080, 0x00200008, 0x00020000, 0x80002000, + 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800, 0x02000080, + 0x00200008, 0x00020000, 0x80002000, 0x08000000, 0x00000000, 0x00000000, + 0x00000080, 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020, + 0x00080002, 0x00008000, 0x20000800, 0x02000080, 0x00200008, 0x00020000, + 0x80002000, 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800, + 0x02000000, 0x00000000, 0x00000000, 0x04108000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000104, 0x20000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x3c3c0000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000f0f, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f, + 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000, + 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff, + 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000, + 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff, + 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f, + 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000, + 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f, + 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000, + 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff, + 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000, + 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff, + 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f, + 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000, + 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f, + 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000, + 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff, + 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000, + 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff, + 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f, + 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000, + 0x00000000, 0x00000000, 0x00000000, 0x00000284, 0x00a10028, 0x400a1002, + 0x8400a100, 0x28400a10, 0x028400a1, 0x0028400a, 0x10028400, 0xa1002840, + 0x0a100284, 0x00a10028, 0x400a1002, 0x8400a100, 0x28400a10, 0x028400a1, + 0x0028400a, 0x10028400, 0xa1002840, 0x0a100000, 0x00000000, 0x00000000, + 0x00000004, 0x00010000, 0x40001000, 0x04000100, 0x00400010, 0x00040001, + 0x00004000, 0x10000400, 0x01000040, 0x00100004, 0x00010000, 0x40001000, + 0x04000100, 0x00400010, 0x00040001, 0x00004000, 0x10000400, 0x01000040, + 0x00100000, 0x00000000, 0x00000000, 0x00000084, 0x00210008, 0x40021000, + 0x84002100, 0x08400210, 0x00840021, 0x00084002, 0x10008400, 0x21000840, + 0x02100084, 0x00210008, 0x40021000, 0x84002100, 0x08400210, 0x00840021, + 0x00084002, 0x10008400, 0x21000840, 0x02100000, 0x00000000, 0x00000000, + 0x00000004, 0x00010000, 0x40001000, 0x04000100, 0x00400010, 0x00040001, + 0x00004000, 0x10000400, 0x01000040, 0x00100004, 0x00010000, 0x40001000, + 0x04000100, 0x00400010, 0x00040001, 0x00004000, 0x10000400, 0x01000040, + 0x00100000, 0x00000000, 0x00000000, 0x00000080, 0x00200008, 0x00020000, + 0x80002000, 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800, + 0x02000080, 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020, + 0x00080002, 0x00008000, 0x20000800, 0x02000000, 0x00000000, 0x00000000, + 0x00000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800, 0x02000080, + 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020, 0x00080002, + 0x00008000, 0x20000800, 0x02000080, 0x00200008, 0x00020000, 0x80002000, + 0x08000000, 0x00000000, 0x00000000, 0x00000080, 0x00200008, 0x00020000, + 0x80002000, 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800, + 0x02000080, 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020, + 0x00080002, 0x00008000, 0x20000800, 0x02000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000284, 0x00a10028, 0x400a1002, + 0x8400a100, 0x28400a10, 0x028400a1, 0x0028400a, 0x10028400, 0xa1002840, + 0x0a100284, 0x00a10028, 0x400a1002, 0x8400a100, 0x28400a10, 0x028400a1, + 0x0028400a, 0x10028400, 0xa1002840, 0x0a100000, 0x00000000, 0x00000000, + 0x00000004, 0x00010000, 0x40001000, 0x04000100, 0x00400010, 0x00040001, + 0x00004000, 0x10000400, 0x01000040, 0x00100004, 0x00010000, 0x40001000, + 0x04000100, 0x00400010, 0x00040001, 0x00004000, 0x10000400, 0x01000040, + 0x00100000, 0x00000000, 0x00000000, 0x00000084, 0x00210008, 0x40021000, + 0x84002100, 0x08400210, 0x00840021, 0x00084002, 0x10008400, 0x21000840, + 0x02100084, 0x00210008, 0x40021000, 0x84002100, 0x08400210, 0x00840021, + 0x00084002, 0x10008400, 0x21000840, 0x02100000, 0x00000000, 0x00000000, + 0x00100007, 0x3001cc00, 0x73001cc0, 0x073001cc, 0x0073001c, 0xc0073001, + 0xcc007300, 0x1cc00730, 0x01cc0073, 0x001cc007, 0x3001cc00, 0x73001cc0, + 0x073001cc, 0x0073001c, 0xc0073001, 0xcc007300, 0x1cc00730, 0x01cc0073, + 0x001cc004, 0x00000000, 0x00000000, 0x00000084, 0x00210008, 0x40021000, + 0x84002100, 0x08400210, 0x00840021, 0x00084002, 0x10008400, 0x21000840, + 0x02100084, 0x00210008, 0x40021000, 0x84002100, 0x08400210, 0x00840021, + 0x00084002, 0x10008400, 0x21000840, 0x02100000, 0x00000000, 0x00000000, + 0x00000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800, 0x02000080, + 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020, 0x00080002, + 0x00008000, 0x20000800, 0x02000080, 0x00200008, 0x00020000, 0x80002000, + 0x08000000, 0x00000000, 0x00000000, 0x00000080, 0x00200008, 0x00020000, + 0x80002000, 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800, + 0x02000080, 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020, + 0x00080002, 0x00008000, 0x20000800, 0x02000000, 0x00000000, 0x00000000, + 0x04108000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000104, 0x20000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x3c3c0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000f0f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff, + 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f, + 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000, + 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f, + 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000, + 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff, + 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000, + 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff, + 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f, + 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000, + 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f, + 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000, + 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff, + 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000, + 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff, + 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f, + 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000, + 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f, + 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000, + 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff, + 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000, + 0xc005fe00, 0xfc403310, 0x0cfc03fd, 0x80dc1033, 0xe00ff023, 0x7c00e480, + 0x3fc40ff3, 0x033240ee, 0x2c33e00f, 0xf8033e10, 0xfc2037e0, 0x0ef8037e, + 0x00ff803f, 0xc008f843, 0xfe00f500, 0xb3e00ff8, 0x033a00cf, 0x803fe00f, + 0xf803f000, 0x70000000, 0x00000000, 0x8010ee00, 0xba002200, 0x08b022ec, + 0x40880222, 0xe10bfc02, 0x2d008880, 0x2fd08b31, 0x0280008a, 0xc02ac3cb, + 0xb202ae00, 0xbac022e0, 0x0bb802ee, 0x009b802e, 0xf428b042, 0xee00bd80, + 0x22e04bb8, 0x022200db, 0x802ee00b, 0xb802e004, 0x30000000, 0x00000000, + 0x0805cc00, 0xb0202008, 0x093202cc, 0x80a0202c, 0xc04b3400, 0x0d02b003, + 0x2cd84a32, 0x122080a2, 0x0020c009, 0x3082cc00, 0xb14060c0, 0x0b3002cc, + 0x00b3002c, 0xc0483006, 0xcc00b900, 0x20c00b30, 0x06880083, 0x002cc00b, + 0x3002c201, 0x70000000, 0x00000000, 0xc015ac00, 0xb2102058, 0x09b002ec, + 0x00a1182e, 0xc00bb00a, 0x4c009881, 0x26c08bb1, 0x02a400aa, 0x002ac01b, + 0xb002ec00, 0xbb0022c0, 0x0bb002ec, 0x009b002e, 0x8448b002, 0xec00b900, + 0x22c01bb0, 0x0222009b, 0x002ec00b, 0xb002f004, 0x60000000, 0x00000000, + 0x4015ec00, 0xf800b2b0, 0x29b003ec, 0x10e840be, 0xc10fb003, 0x6c00e8c0, + 0x3ec00fb8, 0x030000ea, 0x6432c00f, 0xb002ec00, 0xb800b6c0, 0x0eb003ec, + 0x08fb003c, 0x6204b003, 0xec00fd00, 0x32c00f30, 0x432f00cb, 0x003ec00f, + 0xb003c004, 0x70000000, 0x00000000, 0xe001bc00, 0xff803f80, 0x0ef023fc, + 0x00cc8013, 0xc107b001, 0xbc00ec00, 0x3fc08f68, 0x42fc4096, 0x903fc00d, + 0xf043bc00, 0xf4003fc0, 0x0bf003fc, 0x00bf023e, 0xe007f013, 0xfc00bd00, + 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003f800, 0x60000000, 0x00000000, + 0xc010ac00, 0xf9403ec0, 0x4db00b2c, 0x00c94036, 0xc00f300b, 0x2c80f840, + 0x32c407c3, 0x43e800da, 0x4036c20f, 0xb0836c10, 0xf8003ec0, 0x0fb003ec, + 0x00fb003a, 0x502cb00b, 0x2c00f910, 0x32c00fb0, 0x03ac80fb, 0x003ec00d, + 0xb003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x08b0023c, + 0x148b0122, 0xc049f002, 0x3f20b800, 0x37c009a4, 0x022e108a, 0x003ac00e, + 0xb601ac04, 0xb8042ec0, 0x0bb002ec, 0x00bb002e, 0x8008b002, 0x2c00b100, + 0x22c08bb0, 0x020600bb, 0x002ec00b, 0xb002f200, 0x40000000, 0x00000000, + 0xe0054c00, 0xb0012c00, 0x4930122c, 0x00920024, 0xc0093012, 0x8e009004, + 0x00f25a38, 0x0283c993, 0x002cd00b, 0xb0404c00, 0x900024c0, 0x0b3002cc, + 0x00b30028, 0x000a3002, 0x4c00b100, 0x20c00b35, 0x82cb0093, 0x0024c009, + 0x3002f800, 0x50000000, 0x00000000, 0x60011e00, 0xb6802c20, 0x0878021e, + 0x00928221, 0xe0097802, 0x9e00bc80, 0x24e00978, 0x26da4087, 0x8029e01a, + 0x78029e00, 0xb6802de1, 0x0b7802de, 0x00b7842d, 0x200a7802, 0x5e01bd80, + 0x21e00b78, 0x225648b7, 0x802de00b, 0x7802d800, 0x40000000, 0x00000000, + 0x48080c00, 0xf0403c40, 0x2db0022c, 0x00d30034, 0xc00d3202, 0x8c009010, + 0x20c40e36, 0x13cd40d1, 0x0034c00f, 0x30034c00, 0xf1003cc0, 0x0f3103cc, + 0x48f30238, 0x000eb003, 0x4c00f100, 0x30c40f30, 0x03cd60f3, 0x003cc00d, + 0x3003d202, 0x00000000, 0x00000000, 0x401dbc00, 0xfe003fc4, 0x0ff103fc, + 0x00ef107f, 0xc005f003, 0x7c00fc04, 0x3fc44ef0, 0x023c40ff, 0x013fc00f, + 0xf003fc00, 0xff001fc0, 0x0ff003fc, 0x00ff003f, 0x000df003, 0xbc00fd80, + 0x3fc04f71, 0x03bc40ff, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000, + 0xa805ec00, 0xf9203a88, 0x0fb8032c, 0x00fa2102, 0xc00fb203, 0xac40e800, + 0x3ed20fd8, 0x032400fb, 0x003ac00f, 0xb003ec00, 0xf8003ec0, 0x0fb001ec, + 0x00fb003c, 0x400eb003, 0xec00f930, 0x3ac00fb0, 0x03ea04cb, 0x001ec00f, + 0xb003ea00, 0x70000000, 0x00000000, 0xc8119c00, 0xb30a2182, 0x0bf0021c, + 0x80b60821, 0xc00b7532, 0xdc00b400, 0x2dc88bf8, 0x0a3c0406, 0x002dc10b, + 0x7003dc00, 0xb4002dc0, 0x0b7002dc, 0x00b7002d, 0x40287002, 0xdc00b508, + 0x21c00b70, 0x02dc0087, 0x002dc00b, 0x7002f204, 0x40000000, 0x00000000, + 0xc0009e00, 0xb78029e0, 0x0a78025e, 0xc0b78021, 0xe00b7a02, 0x1e80b4c0, + 0x2dec0b5b, 0x121e04a5, 0x8129e003, 0x7802de00, 0xb4806de0, 0x0b7802de, + 0x00b7802d, 0x620a7806, 0xde00b580, 0x29e00b78, 0x12ff0087, 0x802de00b, + 0x7802f040, 0x20000000, 0x00000000, 0x4814cc00, 0xb37020e4, 0x0b30020c, + 0x00b35820, 0xc10b3002, 0xcc00b380, 0x2cc01b38, 0x020d2083, 0x402ec00b, + 0x30028c00, 0xb0306cc0, 0x0b3002cc, 0x0493002c, 0x32083042, 0xcc00b100, + 0x20c00930, 0x02ce0083, 0x002cc00b, 0x3002d204, 0x30000000, 0x00000000, + 0xe815a800, 0xfac03a90, 0x0ea00b68, 0x00fac0b2, 0x800fa003, 0xa800fe40, + 0x2e805be3, 0x131b04ee, 0x103a800f, 0xa002e801, 0xbe803e80, 0x0fa001e8, + 0x00fa003d, 0xb00ea003, 0xe800be00, 0x3a800fa0, 0x03fa02ca, 0x003e800f, + 0xa003fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf0003e02, 0x0f8003e0, + 0x00f8003e, 0x000b0003, 0xe000f800, 0x3e001f80, 0x03e140e8, 0x0036000f, + 0x8003e000, 0xf8003e00, 0x0d8003e0, 0x00f8003e, 0x100f8023, 0xe000f040, + 0x3e000f80, 0x43e000f8, 0x003e000f, 0x8003d200, 0x30000000, 0x00000000, + 0x0810e400, 0xfb0032c0, 0x4c9003c4, 0x00db0032, 0x400f9043, 0x0702c908, + 0x3a504790, 0x53e450e9, 0x003e400c, 0x90016400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x702c9003, 0xe400f900, 0x22400f90, 0x03e52039, 0x003e400f, + 0x9003c204, 0x30000000, 0x00000000, 0x80046400, 0xb9002240, 0x289002e4, + 0x00890022, 0x400b9002, 0x27008901, 0x2e420bd5, 0x02e48089, 0x002e4008, + 0x9402e400, 0xb9002e40, 0x0b9000e4, 0x00b9002e, 0x40089012, 0xe400bd88, + 0x22400b90, 0x22e680b9, 0x002e400b, 0x9002e000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002040, 0x089002e4, 0x00a10022, 0x400b900a, 0x25008b00, + 0x2e400a94, 0x02e40129, 0x006e4008, 0x94026400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x40099002, 0xe404b920, 0x2a400b90, 0x02e400b9, 0x002e400b, + 0x9002c600, 0x40000000, 0x00000000, 0x08040400, 0xb1102044, 0x081102c4, + 0x40a11020, 0x400b1002, 0x04408100, 0x2c440b11, 0x12e44081, 0x002c4428, + 0x1402c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0xc0091002, 0xc400b128, + 0xa8400b10, 0x42c400b1, 0x002c400b, 0x1002c201, 0x00000000, 0x00000000, + 0x380d6000, 0xf868b21a, 0x0c8403e1, 0xa0e068b2, 0x000f8283, 0x21a0c800, + 0x3e1a1f86, 0x93e110e8, 0x003e100c, 0x80036000, 0xf8a83e00, 0x0f8003e0, + 0x00f8003e, 0x2a0d8003, 0xe001f8a0, 0x3a000f80, 0x03e008f8, 0x003e000f, + 0x8003ee03, 0x50000000, 0x00000000, 0x981de400, 0xf9203e48, 0x0f9203e4, + 0x82d9203e, 0x400f9003, 0xe480fd01, 0x3e4807d2, 0x03f480fd, 0x403e480f, + 0x9003e400, 0xfd003e40, 0x0f9003e4, 0x00f9003f, 0x400e9a83, 0xe400f504, + 0x36404f90, 0x13d400f9, 0x003e400f, 0x9003e602, 0x70000000, 0x00000000, + 0x1805e400, 0xf9003240, 0x049003a4, 0x00f90032, 0x400f9003, 0xe400c900, + 0x1f400cd0, 0x033400e9, 0x003b400b, 0xd003e401, 0xf9003e40, 0x0f9003e4, + 0x00f9003f, 0x400c9003, 0xa400f5a0, 0x32400f50, 0x031400f9, 0x003e400f, + 0x9003e600, 0x70000000, 0x00000000, 0x3810e000, 0xb0002280, 0x088002e0, + 0x00ba0022, 0x000b8002, 0xc0028a01, 0x2e100880, 0x0228008a, 0x002e008b, + 0x8002e000, 0xba002e00, 0x0b8002e0, 0x0098002e, 0x100d8062, 0x2000b840, + 0x22000b80, 0x022008b8, 0x002e000b, 0x8002ce04, 0x30000000, 0x00000000, + 0x0805c400, 0xb1002440, 0x08100284, 0x00b10028, 0x400b1002, 0xc4018100, + 0x2c440b10, 0x024410b1, 0x0028400b, 0x1002c400, 0xb1002c40, 0x0b1002c4, + 0x00b1012c, 0x44081002, 0x8400b110, 0x20400b10, 0x060400b1, 0x022c400b, + 0x1002c201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002660, 0x089002e4, + 0x00b9202a, 0x400b9042, 0xe4008900, 0x2e400ab2, 0x924440b9, 0x002e400b, + 0x9002e400, 0xb9002e40, 0x0b9002e4, 0x0099002e, 0x42099002, 0x2400b900, + 0x22400b90, 0x0a2580b9, 0x002e400b, 0x9002c604, 0x60000000, 0x00000000, + 0xa015e400, 0xf988b650, 0x2c9003a4, 0x00f940ba, 0x400f9003, 0xe400c940, + 0x3f408fd8, 0x037700f9, 0xc03a400f, 0x9003e400, 0xb9003e40, 0x0f9002e4, + 0x00f9003e, 0x400c9003, 0xa404f900, 0xb2400710, 0x032600f9, 0x013e400f, + 0x9003e804, 0x70000000, 0x00000000, 0xa801a400, 0xf9403a40, 0x0f9003e4, + 0x00f90036, 0x400f9003, 0xcc00f9c0, 0x3c400890, 0x03a600c9, 0xa43e400f, + 0x9003e400, 0xf9003e40, 0x0f9003e4, 0x00f9003c, 0x400f9003, 0xe400f900, + 0x3e400f90, 0x03e600f9, 0x003e400b, 0x9003ea00, 0x60000000, 0x00000000, + 0x2810a000, 0xf8403210, 0x2c8023e0, 0x00d840b2, 0x000f8003, 0x2082c800, + 0x3e009f00, 0x03a12078, 0x0032000f, 0x800b2000, 0xf8043e00, 0x0f8003e0, + 0x00f8003e, 0x000c8003, 0xe000f030, 0x36000f82, 0x032040e8, 0x003e000f, + 0x8003ca04, 0x20000000, 0x00000000, 0x28052800, 0xba002280, 0x08a002e8, + 0x008a0022, 0x800ba022, 0x2b008a00, 0x2f840be0, 0x823a00ba, 0x0023a00b, + 0xe5822800, 0xea002e80, 0x0ba002e8, 0x04ba003b, 0xa008a002, 0xe800be80, + 0x22808bec, 0xc238408a, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000, + 0x28054c00, 0xbb00a2c0, 0x083002cc, 0x008b0024, 0xc00b3002, 0x0c009300, + 0x2cc40b38, 0x828c40b3, 0x0020e00b, 0x3002cc00, 0xa3002cc0, 0x1b3002cc, + 0x00b3002c, 0x8028b002, 0xcc00b340, 0x24c00b30, 0x0a4b01a3, 0x002cc00b, + 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb72021cc, 0x487202ce, + 0x42871025, 0xc00b3802, 0x18209700, 0x2dec0b7a, 0x021800b3, 0x80a1c20b, + 0x7802dc00, 0xb7002dc0, 0x037002dc, 0x00b70029, 0x90087002, 0xdc00b500, + 0x21c00b70, 0x025a0187, 0x002dc00b, 0x7002e800, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7a230e0, 0x0c7e03de, 0x00c3a035, 0xe00f7803, 0x1e00d780, + 0x3d880bc4, 0x039e00f7, 0x8031e00f, 0xf802de00, 0xe7803de0, 0x0f7803de, + 0x04f7823d, 0xa00c7a43, 0xde00f780, 0x35e09f78, 0x035600e7, 0x803de00f, + 0x7803e802, 0x00000000, 0x00000000, 0x081dac00, 0xfb50bed0, 0x0fb003ec, + 0x00fb403a, 0xc00fb00b, 0xe980eb04, 0x3fa00fd8, 0x03fa40fb, 0x003ec00f, + 0xb0032c00, 0xeb001ec0, 0x0fb003ec, 0x00fb003c, 0x804fb003, 0xec00fb00, + 0x3ec00fb0, 0x03a000fb, 0x003ec00f, 0xb003c206, 0x60000000, 0x00000000, + 0x0005fe00, 0xffc033f0, 0x4cf803fe, 0x00ffc033, 0xe00ff803, 0xff00ff80, + 0x2fe40af8, 0x037640ff, 0x803fe00f, 0xe807fc40, 0xf78033e0, 0x0ff803fe, + 0x00ff803f, 0x202cf983, 0x3e00fe86, 0x33e00fd8, 0x033a00ff, 0x903fe00f, + 0xf803f000, 0x70000000, 0x00000000, 0xa8119c00, 0xbf0023c0, 0x087002dc, + 0x00bf0021, 0xc00b7002, 0xd040b710, 0x2dd00872, 0x021400b7, 0x082dc00b, + 0x70065c00, 0xb70029c0, 0x0b7002dc, 0x00b7002d, 0x0008f103, 0x5c00b400, + 0x35c00b54, 0x021000b7, 0x002dc00b, 0x7002ea04, 0x60000000, 0x00000000, + 0x00009c00, 0xb70021d0, 0x087002dc, 0x00b70021, 0xc00b7002, 0xd400b700, + 0x2d800a20, 0x12dc00b7, 0x002dc00b, 0x7102dc50, 0xbf0821c0, 0x0b7002dc, + 0x00b7002d, 0x80087106, 0x1c00b300, 0x21c00b50, 0x025020b7, 0x0229c00b, + 0x7002c400, 0x20000000, 0x00000000, 0x2014cc00, 0xb3d020e4, 0x083002cc, + 0x00b34020, 0xc00b3002, 0xc000b340, 0x2ec00830, 0x028f01b3, 0xc82cc00b, + 0x30024c00, 0xb30028c0, 0x0b3006cc, 0x00b3002c, 0xa418b002, 0x0c04b300, + 0x24c00b10, 0x024200b3, 0x002cc00b, 0x3002da04, 0x30000000, 0x00000000, + 0xa815ac00, 0xff40b3c0, 0x2cf003fc, 0x00ff08b2, 0xc00bb002, 0xec00fb40, + 0x3e401eb5, 0x03ecc1b3, 0x003ec00f, 0x8002ec00, 0xfb0032c0, 0x0fb002ec, + 0x00fb002c, 0xa40cf002, 0x2c00b300, 0xb2c00fa0, 0x036a00fb, 0x007ac00f, + 0xb003da04, 0x60000000, 0x00000000, 0x8000ec00, 0xf3203ec0, 0x0fb003ec, + 0x00f3003e, 0xc04f3013, 0xe800fb31, 0x3f501ff1, 0x137800fb, 0x003e900f, + 0xa000ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0x900fb003, 0xec00f940, + 0x3ec00f90, 0x0ba820fb, 0x003ec00f, 0xb003e400, 0x30000000, 0x00000000, + 0x0110fc00, 0xff0033c0, 0x0cf003fc, 0x00ef0833, 0xc00ff003, 0x3d00ff00, + 0x3f400ec0, 0x03fe00ff, 0x0033c00c, 0xcc033c10, 0xf70033c0, 0x0ff003fc, + 0x00df003e, 0x400cf003, 0x3c04ef00, 0x33c00fe0, 0x033a80ff, 0x003fc00f, + 0xf003e004, 0x30000000, 0x00000000, 0x81046c00, 0xbb0022c0, 0x08b002ec, + 0x04bb00a2, 0xc00bb002, 0x2a00bb00, 0x2ec448b5, 0x12ec00bb, 0x00a29808, + 0x280a2c00, 0xeb002ac0, 0x0bb002ec, 0x04bb002e, 0x644ab002, 0x2c00bba4, + 0x2ac00b18, 0x022800bb, 0x002ec00b, 0xb002e040, 0x10000000, 0x00000000, + 0x80052c00, 0xbb0020c0, 0x08b002ec, 0x00ab0022, 0xc00ab002, 0x2420bb00, + 0x2ec00ab0, 0x02e464bb, 0x0460480a, 0xa0822c00, 0xbb0022c0, 0x0bb002ec, + 0x00bb002e, 0x1008b002, 0x6c00b980, 0x22c01b98, 0x062820bb, 0x002ec00b, + 0xb002e000, 0x40000000, 0x00000000, 0x08040c00, 0xb300a0c0, 0x283002cc, + 0x00b30020, 0xc00b3002, 0x0000b300, 0x2cc00830, 0x12cc08bb, 0x00280108, + 0x20020c00, 0xa30028c0, 0x0b3002cc, 0x00b3002e, 0x000a3002, 0x0c10b100, + 0x28c00910, 0x220000b3, 0x002cc00b, 0x3002c201, 0x00000000, 0x00000000, + 0x000d6c00, 0xff0033c0, 0x0cb003ec, 0x0cef0032, 0xc00eb003, 0x2000fb00, + 0x3cc00ab0, 0x23ec01fb, 0x0032400c, 0xa0032c00, 0xfb0032c0, 0x0fb003ec, + 0x00db013e, 0x400cb00b, 0x6c09f900, 0x32c00f90, 0x032810fb, 0x003ec00f, + 0xb003e003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff00b, 0xf000ff00, 0x3fc00ff0, 0x03fc00bf, 0x01370027, + 0xe013fc00, 0xff003fc0, 0x0ff003fc, 0x00ff007f, 0x400ff023, 0xfc01fd04, + 0x3fc00f50, 0x0bf000ff, 0x003fc00f, 0xf023e802, 0x70000000, 0x00000000, + 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff853, 0xfc00dd80, + 0x33200dc8, 0x03b200ff, 0x80332005, 0xc933f030, 0xc4303350, 0x1ef803f0, + 0x80dc8033, 0x4a0cc403, 0x7001cc00, 0x33428cc2, 0x83fc80cc, 0x0033044f, + 0xf1033000, 0x70000000, 0x00000000, 0x8000ee00, 0xeb802ee0, 0x0bb802ee, + 0x00bb802e, 0xe00bb802, 0xee08e880, 0xa2210888, 0x036200bb, 0x20a00208, + 0x0202e1a0, 0xa8702a4c, 0x08b802e0, 0xa088802a, 0x48088002, 0x20a0a800, + 0xa2000a84, 0x821cc288, 0x01280808, 0xf616a004, 0x30000000, 0x00000000, + 0x0805cc00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xec00b900, + 0x22000980, 0x100010b3, 0x08200888, 0x0010c000, 0x80002040, 0x583002c0, + 0xc1980028, 0x0a080402, 0x40808000, 0x2402080a, 0x024c2080, 0x28280009, + 0x34020201, 0x70000000, 0x00000000, 0xe015ac00, 0xab002ec0, 0x0bb002ec, + 0x00bb002e, 0xc00bb006, 0xec08a880, 0x222008a0, 0x226400b3, 0x0022c418, + 0xb002ed10, 0xab0028c8, 0x48b006e6, 0x2088242a, 0x40089882, 0x2220a984, + 0x26200ab8, 0x022c0080, 0x8068624a, 0xb002b004, 0x60000000, 0x00000000, + 0x0005ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00f9c0, + 0x30220d84, 0x232000fb, 0x0132108c, 0x8802e302, 0xc8c03240, 0x08b023e3, + 0x08d0203a, 0x0c2c8c03, 0x671088a0, 0x36730c80, 0x036c00c8, 0xa03a308d, + 0xb0021004, 0x70000000, 0x00000000, 0xa011bc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff003, 0xfe44ff00, 0x3f000ffa, 0x83faa0ff, 0x003f800f, + 0xe403f8a0, 0xfca03fe0, 0x2df003d4, 0x00fc093d, 0x400f4003, 0xc400fc04, + 0x38400f90, 0x337c00fd, 0x023f000d, 0x7003f800, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb003ec0, 0x0db003ec, 0x00fb003e, 0xc00fb003, 0xe880ebc0, + 0x32000f90, 0x03ed438b, 0x203e502d, 0x90034502, 0xcb003243, 0x0db003e1, + 0x00f84036, 0x040c9583, 0x6414c810, 0x3e500e20, 0x03cc00c8, 0x1832120c, + 0xb085b004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0xc9008340, 0x2a000b38, 0x03ee008b, 0x407ef808, + 0xb9036f20, 0x8b2236d8, 0x0cb003a6, 0x20da0c36, 0x40289803, 0xe6808980, + 0x2e640ab0, 0x023d00d9, 0x04367028, 0xfe023200, 0x40000000, 0x00000000, + 0xc0040c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc01a100, + 0x20009b00, 0x02c30093, 0x92260208, 0x000e0202, 0x8880a040, 0x023020c2, + 0x80a0c020, 0x68090802, 0xc1808981, 0x2c600800, 0x028ec081, 0xc0247500, + 0x3402f800, 0x50000000, 0x00000000, 0x60001e00, 0xb7802de0, 0x0b7802de, + 0x00b7802d, 0xe00b7802, 0xde2087d0, 0x29200b58, 0x12fe4197, 0x802d6418, + 0x58865604, 0x87806560, 0x0a780292, 0x00949025, 0x64095802, 0xd6008580, + 0x2d620a69, 0x021e0095, 0x8025e848, 0x79021800, 0x40000000, 0x00000000, + 0x48180c00, 0xf3003cc0, 0x0f3003cc, 0x00f3002c, 0xc00f3002, 0xc440e340, + 0x20001f35, 0x82c90093, 0x22249008, 0x260228c4, 0xc04222c0, 0x0e3003e4, + 0x00e00032, 0x40090202, 0xc002c100, 0x3c400c10, 0x038c00c9, 0x0034402c, + 0xb003d202, 0x00000000, 0x00000000, 0x401cbc00, 0xff003fc0, 0x0ff023fc, + 0x00ff003f, 0xc00ff103, 0xd4407704, 0x3f000ff0, 0x239c00ef, 0x003bc00e, + 0xf003fc50, 0xff00bfc0, 0x0df103fc, 0x40e4063f, 0xc00ed012, 0xbc08ff00, + 0x3f400ff0, 0x01bd407f, 0x003fc80f, 0xf4c3d006, 0x60000000, 0x00000000, + 0x2815ec00, 0xfb003ec0, 0x0fb007ec, 0x00fb003e, 0xc00fb003, 0xec00f100, + 0x76800fa0, 0x07c400eb, 0x003ec004, 0xb0032c00, 0xfb0432c1, 0x0cb003e4, + 0x01fa0072, 0x400c980f, 0x2c00cb80, 0x32400cb0, 0x032c40cb, 0x0032400c, + 0xb0032a00, 0x70000000, 0x00000000, 0xc8099c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xdc00e700, 0x21800b70, 0x06dc00d7, 0x016fc00d, + 0xf013dc00, 0xbf0029c0, 0x287012d4, 0x01b7006b, 0xc0187002, 0x3c08df00, + 0x37c00ff0, 0x021c018f, 0x0121c108, 0x72123204, 0x60000000, 0x00000000, + 0x00009e00, 0xb7802de0, 0x0b7802de, 0x00b7802d, 0xe00b7802, 0xda00bf80, + 0x25a04b78, 0x02de0087, 0x802de208, 0x7c025f01, 0xb78021e0, 0x0a7802de, + 0x00be8021, 0x60293806, 0x5e088700, 0x61e00a7c, 0x024e0087, 0xc020e008, + 0x7a0a3000, 0x20000000, 0x00000000, 0x6804cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xc840a310, 0x20e40b32, 0x02cd009b, 0x042cd229, + 0xbc22ce08, 0xb350a8e0, 0x083002cd, 0x00b3a02a, 0xd4283202, 0x2f409305, + 0x24f00b3c, 0x0a4c0283, 0x40a0c008, 0x30021204, 0x30000000, 0x00000000, + 0xe814a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800ba003, 0xfa40fe80, + 0x37948fe4, 0x83fa918a, 0x023f900c, 0xe0037b00, 0xfe4032a8, 0x0ea003f8, + 0x20f6a433, 0xa00dec03, 0x7a00ce00, 0x33a80cec, 0x436802ce, 0x8033802c, + 0xa0033a04, 0x60000000, 0x00000000, 0x4800a000, 0xf8003e00, 0x0f8003e0, + 0x00f8003e, 0x000b8003, 0xe000e809, 0x3a000f84, 0x03e080d8, 0x001e100f, + 0x8603c000, 0xf8483e00, 0x078003e1, 0x80f8003a, 0x180e8103, 0xe020f810, + 0x3e020f82, 0x038000f8, 0x403e000f, 0x8003d200, 0x30000000, 0x00000000, + 0x0810a400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400e9013, 0xe410f900, + 0x36400f90, 0x032440c9, 0x9232440e, 0x981326b0, 0xc1103040, 0x3e9017e6, + 0x00f98036, 0x400c9843, 0xe600c140, 0x30600c90, 0x032442c1, 0x1820440c, + 0x91038204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x400b9002, 0xe400b142, 0x2a400b1c, 0x138780a9, 0x48207248, + 0x9492a480, 0x89c82a42, 0x0d9002e4, 0xc0b93022, 0x600a9882, 0xe448f988, + 0x32440890, 0x02262089, 0xc02a400d, 0x9c022000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9002, 0xe501b980, + 0x22400b91, 0x02241089, 0x0022400a, 0x9102a400, 0x89002244, 0x089002e4, + 0x00b90022, 0x44089102, 0xe5008900, 0x22500010, 0x0a240089, 0x002a4008, + 0x10028600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4, + 0x00b1002c, 0x400b1002, 0xc400b904, 0x28400b90, 0x228400a1, 0x10224408, + 0x110a0446, 0x81102844, 0x491002c4, 0x50b90060, 0xc40a1102, 0xc440a110, + 0x20442811, 0x02044081, 0x1028c409, 0x11020201, 0x00000000, 0x00000000, + 0x381d6000, 0xf8003e00, 0x0f8003e0, 0x00f8002e, 0x000f8003, 0xe000fa00, + 0x32004fa0, 0x43200188, 0x40b2100e, 0x840ba1a2, 0xc86cb01a, 0x288002e1, + 0xa0f800b2, 0x1b0c8683, 0xe1a08869, 0x321a0c86, 0x8321a0ca, 0x683a1a0c, + 0x26838e03, 0x50000000, 0x00000000, 0xb81de400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xf500fd00, 0x3b400fd0, 0x03b40079, 0x203f4889, + 0xd200f490, 0xff20bf48, 0x8f9003f4, 0x80f5003b, 0x488fd201, 0xf480fd20, + 0x3b480ff2, 0x03e480fd, 0x203f480f, 0x9203e606, 0x70000000, 0x00000000, + 0x3805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xf480fd00, + 0x1e408bd0, 0x03d400ed, 0x0433440f, 0xd003b400, 0xc510b348, 0x0c9003f4, + 0x00f50033, 0x400fd003, 0x7480fd29, 0x33400390, 0x033400dd, 0x1033c80d, + 0xd2830600, 0x70000000, 0x00000000, 0x1800a000, 0xb8002e00, 0x0b8003a0, + 0x00b8003a, 0x000b8002, 0xe040b800, 0x2e000b80, 0x02e000e8, 0x20a2080f, + 0x00872020, 0xd810200a, 0x088002e0, 0x00b804b6, 0x008b8002, 0x2000e820, + 0x2a000b84, 0x82002088, 0x10228a08, 0x82020e04, 0x30000000, 0x00000000, + 0x48048400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0xc400b100, + 0x2c400b10, 0x02c400b1, 0x29a0480b, 0x12020441, 0x8100204c, 0x081002c4, + 0x00a90060, 0x408b1042, 0x4440b128, 0x20410b13, 0x0a044091, 0x00244c19, + 0x12820201, 0x70000000, 0x00000000, 0x1814a400, 0xb9002e40, 0x0b9002a4, + 0x00b9002a, 0x400b9002, 0xe500b900, 0x2e400bb0, 0x02e410b9, 0x0022400a, + 0x31122505, 0x9b022240, 0x089002e4, 0x40b91026, 0x400b9002, 0x2444bb0a, + 0x2a480b90, 0x02240089, 0x06264009, 0x90020604, 0x60000000, 0x00000000, + 0xa004a400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f900, + 0x3e580b96, 0x03e780f9, 0x0232620b, 0x9a0a0400, 0xc9903264, 0x2c9037e4, + 0x20e90032, 0x660f9a43, 0x6600f9c0, 0xb2480f90, 0x032400d9, 0x10b6700d, + 0x90032804, 0x70000000, 0x00000000, 0xe810a400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xe640f940, 0x3e400f9a, 0x03e520e9, 0x00364a8f, + 0x9803a680, 0xf900be40, 0x0f9003e6, 0x20f9003e, 0x600f9203, 0xe400e110, + 0x3e400f9a, 0x03e400f1, 0x003a484e, 0x900bea00, 0x60000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe120f800, + 0x3e008f84, 0x03e01088, 0x002a040f, 0x80016004, 0xe020b209, 0x0c8003e0, + 0x00d8103a, 0x080c8c03, 0x2000c848, 0x32122c00, 0x02609048, 0x1832084d, + 0x800b0a04, 0x20000000, 0x00000000, 0x08042800, 0xba002e80, 0x0ba002e8, + 0x00ba002e, 0x800ba002, 0xf808be40, 0x2e800be9, 0x02fa242e, 0xc82f908e, + 0xe403b900, 0x8e487780, 0x0da002f9, 0x04868023, 0x9288e80b, 0x7900ae80, + 0x2ba008a0, 0x033a008e, 0x81379008, 0xe00a0a00, 0x40000000, 0x00000000, + 0x08054c00, 0xb3002cc0, 0x0b30028c, 0x00b3002c, 0xc00b3002, 0xcd00b320, + 0x0cc00b34, 0x02cd008b, 0xca28d01a, 0x3a120ec0, 0xb30322e4, 0x883002cf, + 0x0183802c, 0xe029b002, 0x0f608300, 0x20e00830, 0x022d4083, 0x4022c008, + 0xb0020a00, 0x50000000, 0x00000000, 0x20011c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xdc00b508, 0x2dc00b74, 0x06fe00a7, 0x002fe058, + 0x70828c00, 0xb70025c0, 0x097002d7, 0x008c0027, 0x61097402, 0x0e00a309, + 0x29620832, 0x021c0083, 0x0025c028, 0x50022800, 0x40000000, 0x00000000, + 0x28181e00, 0xf7803de0, 0x0f78039e, 0x00f7803d, 0xe00f7803, 0xde00b580, + 0x2de04f78, 0x02de0087, 0x8039e00e, 0x78031e02, 0xf780a1e1, 0x0c7801fe, + 0x02c4802d, 0xe00df822, 0x1e10c783, 0x33e00c7c, 0x0b1e02c7, 0x8033600c, + 0x38032a02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0xc00fb003, 0xec00f804, 0x3ec00fa0, 0x03e400b9, 0x023c804f, + 0x8003ac00, 0xcb003e80, 0x0fb003e0, 0x00e80038, 0x404c9013, 0xe404fb02, + 0x3e000fb2, 0x43ac00fb, 0x003e800e, 0xa003c206, 0x60000000, 0x00000000, + 0x6004be00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xfe00c580, + 0x17e00f78, 0x033e08ff, 0x803be00c, 0xf2037e02, 0x4f8437e0, 0x84f803fe, + 0x10ff8033, 0xe00ed813, 0xf6402fa0, 0x33ec0cfc, 0x033e01ff, 0x80b3a08f, + 0xf8030000, 0x70000000, 0x00000000, 0xa8009c00, 0xb7002dc0, 0x0b70039c, + 0x00b7002d, 0xc00b7002, 0xdc10d540, 0x35c04351, 0x03dd00f7, 0x002d5a8d, + 0x7003f400, 0xc7002bc0, 0x2a7002d4, 0x00b400b5, 0x02084202, 0xf4e0dd20, + 0x2b444871, 0x061800b6, 0x2421c80b, 0x51022a04, 0x60000000, 0x00000000, + 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b7002, 0xd8008d00, + 0x21c00b70, 0x021820b6, 0x0029c089, 0xf1821820, 0xb1102544, 0x0a7002d4, + 0x00a40029, 0x440b5006, 0xd0018436, 0x21480870, 0x021400b5, 0x0121008b, + 0x70020000, 0x20000000, 0x00000000, 0x40148c00, 0xb3002cc0, 0x0b30028c, + 0x00b3002c, 0xc00b3002, 0xc8109040, 0x24c00b0c, 0x024100a0, 0x040c1009, + 0x0c02e204, 0xa1882a20, 0x48300243, 0x40b0802c, 0x20090402, 0xe2002000, + 0x083c08b8, 0x002000b0, 0x4022b00b, 0x20720804, 0x30000000, 0x00000000, + 0x2805ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00bb003, 0xec00c1c8, + 0x12c40fbe, 0x532d00bb, 0x003ad06d, 0x3d222e00, 0xbb0036e2, 0x0ab003e5, + 0x40f2303a, 0x640f9a01, 0xe70289c8, 0x22502cf8, 0x8b2c00fb, 0xc832c80f, + 0xa00b2a04, 0x60000000, 0x00000000, 0xa010ec00, 0xfb003ec0, 0x0fb003ac, + 0x00fb003e, 0xc00fb003, 0xe004f900, 0x3ec00fb4, 0xc3e9287a, 0x013ec00f, + 0xb447a880, 0xd9103e40, 0x0bb003e4, 0x00f84036, 0x500e9083, 0xe424d960, + 0x3e500fb0, 0x83e500f9, 0x603e400f, 0x9003e000, 0x30000000, 0x00000000, + 0x0110fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ef003, 0xdd00cd08, + 0x3fc00fd4, 0x037c80ff, 0x9233420f, 0xf1037604, 0xce0233c0, 0x8cf01554, + 0x00ce4030, 0x400cc013, 0xf402c400, 0x31400cf0, 0x003800ce, 0x803f424c, + 0x8c0b0044, 0x30000000, 0x00000000, 0x81046c00, 0xbb002ec0, 0x0bb002ec, + 0x00bb0026, 0xc00bb002, 0xe300a8c0, 0x22c00b04, 0x02a30198, 0xc862000b, + 0x8c42a208, 0xd0802206, 0x0eb01363, 0x2088882a, 0x60888802, 0xe68888c0, + 0x36380ab0, 0x02224088, 0x802e2408, 0x88022040, 0x10000000, 0x00000000, + 0x80056c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc00bb002, 0xec208880, + 0x2ec00ba0, 0x022400b1, 0x0022840b, 0x80022d84, 0x8b802280, 0x08b002e2, + 0x008a0022, 0x700898e2, 0xe6008984, 0x2a6108b0, 0x22ec208b, 0x182e8088, + 0x24022000, 0x40000000, 0x00000000, 0x08000c00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xc000a800, 0xe8c00b00, 0x020001b0, 0x00200019, + 0x80028001, 0x9100a000, 0x0b300280, 0x02880028, 0x00080002, 0xc4008100, + 0x24400a30, 0x02c00080, 0x002c4000, 0x10120201, 0x00000000, 0x00000000, + 0x00186c00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xe800c804, + 0x3ec00b80, 0x032000b8, 0x00a0000f, 0x80072000, 0xc9013200, 0x0cb002e0, + 0x00c80032, 0x40048013, 0xe002c800, 0x7a400c70, 0x0be002c0, 0x003e002c, + 0x80030003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc, + 0x00ff0037, 0xc00ff013, 0xd000fc00, 0x37c10fc0, 0x03f000dc, 0x003f000f, + 0x4003b001, 0xbd013f00, 0x1ef00370, 0x00f4003f, 0x408fc003, 0xf400fc00, + 0x3f400ff0, 0x033000fc, 0x003f000f, 0xc003e806, 0x70000000, 0x00000000, + 0xc005fe00, 0xff803fe4, 0x0cc4033c, 0x80ff803f, 0xe00df803, 0x74a0ff80, + 0x3bc00df8, 0x077e00ff, 0x803fe00f, 0xf803be00, 0xff803f48, 0x0cf0033e, + 0x00ff113f, 0xe10ff003, 0x3200dc80, 0x73204fc8, 0x23d200ff, 0x803fe00f, + 0xf803f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ec8, 0x0882122e, + 0x00bb802e, 0xe10bb202, 0x2704bb82, 0x2ff008b8, 0x12ee00bb, 0x822ee00b, + 0xb8026e00, 0xbb802c8a, 0x0fa082ae, 0x00bf622e, 0xc10bb802, 0x2a00d880, + 0x36e00b88, 0x02e200bb, 0x802ee00b, 0xb802f004, 0x30000000, 0x00000000, + 0xc800cc00, 0xb3002cc0, 0x0802020c, 0x40b30028, 0xc1493092, 0x4c10b300, + 0x2cd00930, 0x02cc00a3, 0x002cc00b, 0x3002cc00, 0xb3002ccc, 0x0a31020c, + 0x00b3402c, 0xc00a0002, 0x2000a800, 0x20c00b00, 0x02c000a3, 0x002cc00b, + 0x3002f201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0810022c, + 0x00bb002e, 0xc00bb002, 0x2c40bb00, 0x0ec019b0, 0x42ec009b, 0x002ec00b, + 0xb0026c00, 0xbb002ec8, 0x0a3402ac, 0x00bb042e, 0xc00b8182, 0x2a249800, + 0x26400b98, 0x20e220bb, 0x002ec00b, 0xb002f004, 0x60000000, 0x00000000, + 0x4015ec00, 0xfb003ec0, 0x0cae0b2c, 0x00fb003e, 0xc00db013, 0x6c10bb01, + 0x3ac00db0, 0x12ec10fb, 0x003ec10f, 0xb003ac00, 0xfb007ec8, 0x0ab5032c, + 0x00fb003e, 0xc00f6c0b, 0x2200e0c8, 0x22340f8a, 0x03e300fb, 0x003ec00f, + 0xb003f004, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff903fc, + 0x00ff005f, 0xc00ff001, 0xfc007f00, 0x3dc00af0, 0x03fc00ff, 0x003fc00f, + 0xf003fc00, 0xff013de0, 0x0fd003fc, 0x08ff0037, 0xc00ba803, 0xf800fc48, + 0x3fe00fd0, 0x03f420ff, 0x003fc00f, 0xf003e800, 0x60000000, 0x00000000, + 0xc410ac00, 0xfb003ac0, 0x0ca403ec, 0x00fb003a, 0xc00eb203, 0xec00fb00, + 0x3ac00fb0, 0x03ec14fb, 0x043ec00f, 0xb0036c00, 0xfb003ed0, 0x0db6032c, + 0x00fb003e, 0xc00f8c0b, 0x2200c842, 0x32d20c80, 0x03e500db, 0x003ec00f, + 0xb003f004, 0x20000000, 0x00000000, 0xd8052c00, 0xbb002ec0, 0x08b0023c, + 0x00bb002e, 0xc00bbc02, 0xec00bb00, 0x2fc008b0, 0x02ec10bb, 0x002ec00b, + 0xb002ec00, 0xbb002ee8, 0x05b8036c, 0x00bf003a, 0xc00f8002, 0x8a10a800, + 0xa2d02898, 0x0265008b, 0x002ec00b, 0xb002f000, 0x40000000, 0x00000000, + 0xe0054c00, 0xb3002ec0, 0x0800024c, 0x00b30028, 0xc00ab002, 0x4400b300, + 0x64c04a30, 0x020c0093, 0x002cc00b, 0x3002cc00, 0x93002cd8, 0x0031060c, + 0x08b3002c, 0xc00b048a, 0x01208010, 0x20800800, 0x02c00093, 0x002cc00b, + 0x3002fa00, 0x50000000, 0x00000000, 0xf0011e00, 0xb7802de0, 0x0818021e, + 0x01b7802d, 0xe00b7802, 0xd600b780, 0x6ce00878, 0x02de00b7, 0x802de00b, + 0x7802de00, 0xb7800de0, 0x0938025e, 0x00b78029, 0xe00b4802, 0xb250ac90, + 0x21a10849, 0x12760087, 0x802de00b, 0x7806fc00, 0x40000000, 0x00000000, + 0x48080c00, 0xf3003ac0, 0x0c0003cc, 0x00f30038, 0xc00e3183, 0xc400f310, + 0x34c04e32, 0x07cc4093, 0x002cc00f, 0x3002cc00, 0x93003cc0, 0x4c30070c, + 0x40f3003c, 0xc00f3003, 0x0400c210, 0x30d4cc10, 0x83c400d3, 0x003cc00f, + 0x3003d202, 0x00000000, 0x00000000, 0x400dbc40, 0xff003fc0, 0x0ff103fc, + 0x00ff003f, 0xc00ff003, 0xfc00ff01, 0x7fc00ef0, 0x03fc11ff, 0x003fc00f, + 0xf003fc00, 0xff003fc0, 0x0ff007fc, 0x11ff023b, 0xc00ef103, 0xdc00f650, + 0x3d045ff0, 0x03f444ff, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000, + 0xa805ec00, 0xfb007ec0, 0x0fa2032c, 0x40fb003e, 0xc00fb003, 0xe400fb00, + 0x3ecc0fb0, 0x03ec01eb, 0x007ac00f, 0xb003ec00, 0xfb003ec0, 0x0cb003ac, + 0x08fb783e, 0xc00e9003, 0x2000e961, 0x32930f98, 0x032000fb, 0x003ec00f, + 0xb003ea00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7006dc0, 0x0b70821c, + 0x00b7002d, 0xc00b7006, 0xdc00b700, 0x2dc2cb70, 0x02dc00b7, 0x002dc00b, + 0x7016dc00, 0xb7002fc0, 0x0af0029c, 0x10b7202d, 0xc00b1002, 0x1000d500, + 0x35c00b70, 0x021c00b7, 0x002dc00b, 0x7002f024, 0x60000000, 0x00000000, + 0x80009e00, 0xb78029e0, 0xcb68c21e, 0x80b7802d, 0xe00b7802, 0xd600b780, + 0x2de10b78, 0x02de00b7, 0x822de0cb, 0x7822de00, 0xb7802de2, 0x0878021e, + 0x00b7802d, 0xe10a780a, 0x1200a480, 0x21e08b58, 0x021600b7, 0x822de00b, + 0x7802e000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b30020c, + 0x00b3002c, 0xc10b3002, 0xce00b302, 0x2cc00b30, 0x02cc00b3, 0x0024c00b, + 0x3002cc00, 0xb3002cd0, 0x4a39028c, 0x00bb002e, 0xc00b3402, 0x08009000, + 0x04c00b3a, 0x020e00b3, 0x002cc00b, 0x3002d204, 0x30000000, 0x00000000, + 0xe815a800, 0xfa003e80, 0x0fac0b28, 0x00fa003e, 0x800fa003, 0xea80ba04, + 0x3e800fa0, 0x02e804fa, 0x003e800f, 0xa003e800, 0xfa003fa0, 0x08e00328, + 0x04ba002e, 0x800e610b, 0x3900ee0b, 0x12840fe8, 0x033b80fa, 0x023e800f, + 0xa003fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8083e0, + 0x00f8003e, 0x000f8003, 0xe000f800, 0x1e000b80, 0x03e004f8, 0x001e000f, + 0x8003e000, 0xf8003e12, 0x0f8083e0, 0x00f8001e, 0x000f8003, 0xd100fc40, + 0x3e040f81, 0x0be100f8, 0x003e000f, 0x8003d200, 0x30000000, 0x00000000, + 0x0810e408, 0xf9003e40, 0x0fb00304, 0x00c9003e, 0x400f9403, 0x4400c900, + 0x3e400f90, 0x43e400d9, 0x003e400f, 0x9003e400, 0xf9003c40, 0x0e140364, + 0x00f90036, 0x400c9003, 0x2520c909, 0x32d09f91, 0x03e720f9, 0x003e400f, + 0x9003c204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b900224, + 0x0089002e, 0x400b9402, 0xe4008900, 0x2e400f90, 0x03e40039, 0x002e400b, + 0x9002e400, 0xb9002e60, 0x08980224, 0x04b9012a, 0x40089002, 0x2720a1a0, + 0x2a700b90, 0x026700b9, 0x002e400b, 0x9002e000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b100a24, 0x0089002e, 0x400b9402, 0xe4008900, + 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002e400, 0x99002e54, 0x0a908264, + 0x00b90022, 0x40089002, 0x24008d20, 0x22400b90, 0x82e400b9, 0x002a400b, + 0x9002c600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c44, 0x0b110204, + 0x0281002c, 0x400b1106, 0xc4018100, 0x2c400b10, 0x32c400b1, 0x002c400b, + 0x1002c400, 0xb1002c44, 0x08110204, 0x00b11028, 0x44081282, 0x3400a500, + 0x28c00b10, 0x024c00b1, 0x002c400b, 0x1002c201, 0x00000000, 0x00000000, + 0x380d6000, 0xf8003e10, 0x0f068320, 0xa088002e, 0x000f8403, 0xe0a2c800, + 0x3e0a0f80, 0x03e000f8, 0x003e000f, 0x8003e000, 0xd8003e1a, 0x0e868360, + 0x00f86a32, 0x102c8a0b, 0x2000cc00, 0x32000b80, 0x03e000f8, 0x003a000f, + 0x8003ce03, 0x10000000, 0x00000000, 0x981de400, 0xf9003e48, 0x0f9203e4, + 0x00f9003e, 0x400f9203, 0xf400f900, 0x3e400e90, 0x03a400f9, 0x003e400f, + 0x9003e400, 0xf9003f48, 0x0fd203e4, 0x00f9203a, 0x480fd003, 0xd400f502, + 0x3e400f50, 0x23fc00f9, 0x003e400f, 0x9003e607, 0x60000000, 0x00000000, + 0x1805e400, 0xf9003e40, 0x0f900324, 0x00f9003e, 0x400fd003, 0x2480f900, + 0x3e400f90, 0x07a400f9, 0x003e400f, 0x9003e400, 0xf9003f40, 0x0fd00364, + 0x00f90032, 0x400fd803, 0x7400c501, 0x03408f90, 0x03f400c9, 0x003e400f, + 0x9003c600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b800220, + 0x00b8002e, 0x000b820a, 0x2040b801, 0x2e000b80, 0x12e000b8, 0x002e000b, + 0x8002e000, 0xb8002e00, 0x088002e0, 0x08b80036, 0x2a0b8002, 0x20028c00, + 0x36000b80, 0x00e00288, 0x002e000b, 0x8002de04, 0x30000000, 0x00000000, + 0x4805c400, 0xb1002c40, 0x0b100204, 0x00b1002c, 0x400b1282, 0x0400b102, + 0x2c440b10, 0x028400b1, 0x002c400b, 0x1002c400, 0xb1002c40, 0x091002c4, + 0x08b10020, 0x400b1402, 0x74008d01, 0x28401b10, 0x00cc0081, 0x002c400b, + 0x1002d201, 0x50000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b908224, + 0x00b9002e, 0x400b1042, 0x2480b900, 0x2e400b90, 0x12e400b9, 0x002e400b, + 0x9002e400, 0xb9002ed0, 0x089002e4, 0x00b10026, 0x400bb422, 0x2d408d00, + 0x26421b95, 0x02e40009, 0x002e400b, 0x9002c604, 0x60000000, 0x00000000, + 0xa011e400, 0xf9003e40, 0x0f9c0b24, 0x00f9003e, 0x400f9003, 0x2600f900, + 0x3e410f90, 0x03a400f9, 0x003e400f, 0x9002e400, 0xf9003e70, 0x0d9e02e4, + 0x00b90132, 0x40071003, 0x6400c9b0, 0x3a400f94, 0x23c400c9, 0x003e400f, + 0x9003e804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9103e4, + 0x00f9003e, 0x400f9003, 0xe400f904, 0x3e400f90, 0x03e400f9, 0x003e400f, + 0x9003e400, 0xf9003e70, 0x0d9c03e4, 0x00f9003e, 0x400b9c03, 0xe400f980, + 0x3e640fb0, 0x03e400f9, 0x003e400f, 0x9003fa00, 0x60000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f800360, 0x00f8003e, 0x000f8003, 0x2000e800, + 0x3e000f80, 0x03e018f8, 0x003e000f, 0x8003e000, 0xf8003c18, 0x0e8603e0, + 0x08f80032, 0x010f8703, 0x31049c08, 0x32040c80, 0x83e000c8, 0x003e000f, + 0x8003ca04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba00b28, + 0x00ba002e, 0x800be402, 0x28088a00, 0x0e800ba0, 0x02e800ba, 0x002e800b, + 0xa003a800, 0xba002fb0, 0x08ee02e8, 0x00ba002a, 0x800be402, 0x99408680, + 0x2ba008ac, 0x12f800da, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000, + 0x28054c01, 0xb3002cc0, 0x0bb0020c, 0x00b3002c, 0xc00b3882, 0x0c00a300, + 0x2cc00b30, 0x22cc00b3, 0x002cc00b, 0x3002cc00, 0xb3002cc0, 0x0a3402cc, + 0x00b30020, 0xc00b3002, 0x08089000, 0x60c0093d, 0x06cc00a3, 0x002cc00b, + 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc4, 0x0b73021c, + 0x00b7002d, 0xc00b7402, 0x0e008700, 0x2dc00b70, 0x02dc04b7, 0x002dc00b, + 0x70029c00, 0xb7002dd0, 0x087002dc, 0x10b32029, 0xc00b7002, 0x99008408, + 0x2ba02970, 0x02dc00b7, 0x002dc00b, 0x7002e800, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7803de0, 0x0f3a031e, 0x00f7803d, 0xe00fd80b, 0x1e00e780, + 0x2de01f78, 0x03de00f7, 0x803de14f, 0x7843de00, 0xf7803fe0, 0x0e7823de, + 0x10f78031, 0xe00b3803, 0x1200d494, 0x31e08d78, 0x83de00e7, 0x803de00f, + 0x7803ea02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb403ec, + 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, + 0xb003ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb603e, 0xc00fb003, 0xc810f840, + 0x3c800e92, 0x03c800db, 0x043ec00f, 0xb003c206, 0x60000000, 0x00000000, + 0x0005fe00, 0xff803fe0, 0x0ffc033e, 0x00cf803f, 0xe00fe803, 0x7e00ff80, + 0x3be00ff8, 0x03fe00ff, 0x907fe40f, 0xf103fe00, 0xff803fe0, 0x0ff803fe, + 0x00ffc833, 0xe00fd803, 0x3200c490, 0x33604ff8, 0x23fe00ff, 0x803fe00f, + 0xf803c000, 0x70000000, 0x00000000, 0xa8111c00, 0xb7002dc0, 0x0bf0021c, + 0x0087002d, 0xc00b7002, 0x1c40b710, 0x2dc10b71, 0x02dc00b7, 0x0039c40b, + 0x7002dc00, 0xb7002dc0, 0x0b7002dc, 0x40b70035, 0xc00b7002, 0x1000d432, + 0x35084b70, 0x00dc40b7, 0x002dc00b, 0x7002ea04, 0x60000000, 0x00000000, + 0x00009c00, 0xb7002dc0, 0x0b70821c, 0x0087002d, 0xc00b4002, 0x5c00b700, + 0x2dc00b70, 0x029c00b7, 0x046dc08b, 0x7106dc00, 0xb7002dc2, 0x0b7002dc, + 0x00b30021, 0xc00b5102, 0x2000a403, 0x61408b70, 0x82d400b7, 0x002dc00b, + 0x7002c000, 0x20000000, 0x00000000, 0x2014cc00, 0xb3002cc0, 0x0b34020c, + 0x0083002c, 0xc00b3002, 0x0c00b302, 0x2cc00b30, 0x02cc10b3, 0x0168c00b, + 0x3002cc00, 0xb3002cd2, 0x0b3402cc, 0x00b30026, 0xc00b300a, 0x01009010, + 0x24300b38, 0x82c100b3, 0x002cc00b, 0x3002c804, 0x10000000, 0x00000000, + 0xa815ac00, 0xfb002fc0, 0x0ff80b2c, 0x02cb003e, 0xc00bb003, 0x6e80fb00, + 0x3ac00fb0, 0x03ac00fb, 0x003ec00f, 0xb003ec00, 0xbb003ed0, 0x0fba01ec, + 0x00bf0033, 0xc00f900b, 0x2a802810, 0x22e20fb0, 0x03e108bb, 0x003ec00f, + 0xb003ea04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0f3083ec, + 0x00fb003e, 0xc00fb413, 0xec00fb01, 0x36c00fb0, 0x33ec00fb, 0x003ac00f, + 0xb003ec00, 0xfb003ed0, 0xcfb483ec, 0x00fb003e, 0xc00f1403, 0xe808f840, + 0x3ec00fb4, 0x03e700fb, 0x003ec00f, 0xb003e000, 0x30000000, 0x00000000, + 0x0110fc00, 0xff001fc0, 0x0ff0032c, 0x00ff003f, 0xc00fc903, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00df, 0x003fc00f, 0xf003fc00, 0xff003fe4, 0x0ff003fc, + 0x00ff003f, 0xc00c9003, 0x3028ce10, 0x33020ce0, 0x01b320ff, 0x003fc00f, + 0xf003c044, 0x30000000, 0x00000000, 0x80046c00, 0xbb002ec0, 0x0bb0022c, + 0x00bb002e, 0xc00ba002, 0xec00bb00, 0x3ec04bb0, 0x12ec00bb, 0x002ec00b, + 0xb003ac00, 0xbb002e80, 0x0bbe02ec, 0x00bb002f, 0xc00a9c0a, 0x0b00a262, + 0x20108a04, 0x22a300bb, 0x002ec00b, 0xb002e000, 0x10000000, 0x00000000, + 0x80052c00, 0xbb002ec0, 0x0bb0026c, 0x00bb002e, 0xc00b8082, 0xec00bb00, + 0x2ec00bb0, 0x02ec09bb, 0x002ec00b, 0xb002ec00, 0xbb002ec0, 0x0bb102ec, + 0x00bb002e, 0xc0089802, 0x2e009900, 0x22e288a4, 0x066820bb, 0x002ec00b, + 0xb002e000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b300a4c, + 0x00b3002c, 0xc00b1002, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x002cc00b, + 0x30028c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00a0012, 0x2c00a900, + 0x20c00aa0, 0x22cc00b3, 0x002cc00b, 0x3002c201, 0x00000000, 0x00000000, + 0x000d6c00, 0xfb003ec0, 0x0ff0026c, 0x00fb003e, 0xc00f0003, 0xec00fb00, + 0x2ec00fb0, 0x57ec00db, 0x003ec00f, 0xb003ec00, 0xfb003ec0, 0x0fb003ec, + 0x00ff003e, 0xc00c9003, 0x2000d800, 0x32000ca0, 0x136009fb, 0x003ec00f, + 0xb003c003, 0x50000000, 0x00000000, 0xa00dfc00, 0xff003fc0, 0x0ff003bc, + 0x00ff003f, 0xc007c003, 0xfc00ff00, 0x3bc00ff0, 0x07fc00ff, 0x003fc00f, + 0xf003fc00, 0xff003f40, 0x0fc003fc, 0x00ff003f, 0xc00fc003, 0xf801fc00, + 0xbf000fe0, 0x03b000ff, 0x043fc00f, 0xf003e806, 0x70000000, 0x00000000, + 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xf2004c80, + 0x332047c8, 0x023308b4, 0x803d200f, 0xcc037240, 0xcc903724, 0x0ff803fe, + 0x00f48433, 0xe00ff903, 0xf000cc00, 0x33000cc0, 0x63fc80fd, 0x8033080d, + 0x5c037000, 0x50000000, 0x00000000, 0x8010ee00, 0xbb802ee0, 0x0bb802ee, + 0x00bb802e, 0xe00bb802, 0xe6008880, 0x36208bb0, 0x436c00bb, 0x802ee08b, + 0x30002c95, 0x8320a2c8, 0x0bb803ae, 0x00b88022, 0xc00bb023, 0xa010a800, + 0x2a000a88, 0x223d40bb, 0x21223448, 0xb002a004, 0x30000000, 0x00000000, + 0x0805cc00, 0xb3002cc0, 0x0b30028c, 0x00b30028, 0xc00b3002, 0xa4008002, + 0x2c200b32, 0xe2cc80a3, 0x002cc10b, 0x32100c08, 0x830020c1, 0x0b3002cc, + 0x00b000a8, 0xc00b3222, 0xc000a000, 0x20000900, 0x428c00b9, 0x89a0004b, + 0x1242c201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0xef028b20, 0x2e000b84, 0x02ec80b9, 0x006ec50b, + 0x36020c00, 0x8a002208, 0x0bb002ec, 0x00b88022, 0xc00bb002, 0xa210a880, + 0x2a200b88, 0x462c10ba, 0x0022cb02, 0xb102b004, 0x60000000, 0x00000000, + 0x4015ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003a, 0xc00fb013, 0xe300c001, + 0x3e004f10, 0x03af00eb, 0x083ef20f, 0xb4132f82, 0x8b98b2e2, 0x0fb003ec, + 0x00f0e03a, 0xc00fb003, 0xe310e8a1, 0x32608d18, 0x63ec00f3, 0x9032108f, + 0x9c035004, 0x70000000, 0x00000000, 0xe001bc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff002, 0xfc087e84, 0x37c80ff0, 0x067200ff, 0x203f200f, + 0xf003be84, 0xff8a3fe2, 0x0ff003bc, 0x00fc003f, 0xc00ff003, 0x8000f400, + 0x1d420ed0, 0x02fc00fe, 0x003da009, 0xf001f800, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003a, 0xc00fb003, 0xe400c902, + 0x7ec00fb0, 0xa2ec40fa, 0x703ad04e, 0x86132002, 0xc940a2d0, 0x0db0036c, + 0x00d82032, 0xc00cb103, 0xe502c900, 0x32500c94, 0x036c02cb, 0x003a400c, + 0x90037004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0xcd00dbc0, 0x2ec00b98, 0x92ef00bb, 0x803ad508, + 0xb003ef41, 0x8be022e0, 0x09b003ec, 0x015820b6, 0xdc0db802, 0xe5c08950, + 0x36420d94, 0x023e008a, 0xb022f00a, 0xb582b200, 0x40000000, 0x00000000, + 0xe0054c00, 0x93002cc0, 0x0930024c, 0x00b3002c, 0xc00b3002, 0xc52080b0, + 0x04211b10, 0x02cc2093, 0xc024e00a, 0x31020c01, 0x8b0020f4, 0x0b3002cc, + 0x00b00420, 0xc0083c82, 0xc4008190, 0x2c200804, 0x820f2481, 0x02280888, + 0xb0023800, 0x50000000, 0x00000000, 0x60011e00, 0xb7802de0, 0x0b7802de, + 0x00b7802d, 0xe00b7802, 0xd6409580, 0x2de21b79, 0x02de00b6, 0x8029e008, + 0x480292e0, 0x858061e4, 0x8b78029e, 0x00b69025, 0xe0097802, 0xd6108580, + 0x25a00978, 0x020e6087, 0x8021600a, 0x69029800, 0x40000000, 0x00000000, + 0x48080c00, 0xf3003cc0, 0x0b3003cc, 0x00f30038, 0xc00f3002, 0xcc00c210, + 0x2cc00f31, 0x03c008f3, 0x002c025a, 0x32022c80, 0x831230c0, 0x0f3042cc, + 0x00b00032, 0xc00c3103, 0xc500cb00, 0x3e400c05, 0x0b0c00c9, 0x00388a0c, + 0x24071202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff003, 0xdc00ff00, 0x3fc00fd1, 0x03fc00ff, 0x103fc00f, + 0xf003fc80, 0xff003fe0, 0x0df003fc, 0x00cd003b, 0xc00df003, 0xfc00ff00, + 0x3fc00f70, 0x17bd04ff, 0x001dc00f, 0xe0039006, 0x60000000, 0x00000000, + 0xa805ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00cb00, + 0x1e000c80, 0x032c02c9, 0x003ac18f, 0xb0032c10, 0xca013e00, 0x4cb003ec, + 0x00e20232, 0xc08fb003, 0xec080900, 0x3e400f90, 0x03ec80d1, 0x80b2c06c, + 0x90432a00, 0x70000000, 0x00000000, 0xc8119c00, 0xb70039c0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xdc00d700, 0x2dc00df0, 0x431c00a7, 0x002dc10b, + 0xf0223c00, 0x87012fc0, 0x4d70239c, 0x08b60029, 0xc00b7002, 0xfc00a700, + 0x6dc00b70, 0x42dc8487, 0x0021c108, 0x70037204, 0x60000000, 0x00000000, + 0xc0009e00, 0xb7802de0, 0x0b7802de, 0x00b78029, 0xe00b7802, 0xff008780, + 0x2fe00978, 0x025e00a7, 0x806de00b, 0x7802de00, 0x97802de0, 0x0b7802de, + 0x00b68021, 0xe00b7802, 0xde0097c4, 0x2de00b7c, 0x42ce489f, 0x8120e008, + 0xf8023000, 0x20000000, 0x00000000, 0x4814cc00, 0xb30028c0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xce0093c8, 0x2ce209c4, 0x06330084, 0x802d364b, + 0x40029244, 0x0c032f24, 0x893000cc, 0x00b3802a, 0xc00bb002, 0xef60bb4d, + 0x2cf8433a, 0x42cc0083, 0x8820f049, 0xb0025204, 0x30000000, 0x00000000, + 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800fa003, 0xda00c680, + 0x3d830da4, 0x0b6b20ea, 0x083eb04f, 0xa40bea0a, 0x5aa03eb5, 0x0fa022e8, + 0x00f60832, 0x800fa003, 0xfb00dec0, 0x3fb20fec, 0x03e800de, 0xa033900c, + 0xe8833a04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003a00, 0x0f8003e0, + 0x00f8003e, 0x000f8003, 0xe000f850, 0x3e000f82, 0x03e020b8, 0x001e100f, + 0x85016000, 0xf8803e00, 0x0f8003a0, 0x00f8013e, 0x000f8003, 0xe100e800, + 0x3e000f80, 0x03e100f8, 0x403e060e, 0x8c03d200, 0x30000000, 0x00000000, + 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe600d940, + 0x32700c9c, 0x0ba600c9, 0xaa3e600f, 0x948b2420, 0xc9003270, 0x2c9003e4, + 0x00f90032, 0x400c9803, 0xa400c980, 0x30440c10, 0x030600e9, 0xc03c489c, + 0x98030204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x400b9002, 0xe70089c0, 0x2a400a9e, 0x02270089, 0x203a500b, + 0x9c422402, 0x89142260, 0x089002e4, 0x00b9003e, 0x74289c02, 0x270289a0, + 0xa2500894, 0x03654489, 0xc02e4008, 0x950a2000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9002, 0xe4a29b08, + 0x264018d0, 0x063c808d, 0x002f440b, 0x50029580, 0x8d412340, 0x0a9002e4, + 0x00b91026, 0x50089182, 0xa4808920, 0x22d00898, 0x026400a9, 0x002e4009, + 0x90020600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4, + 0x00b1002c, 0x400b1002, 0xe4008900, 0x2c400a51, 0x06144885, 0x0229c00b, + 0x71421444, 0x851221c4, 0x3a1002c4, 0x00b9002c, 0x44081102, 0x04408110, + 0x20440810, 0x024c4083, 0x102c4028, 0x31020201, 0x00000000, 0x00000000, + 0x380d6000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8002, 0xe000d800, + 0x36000c84, 0x238902c8, 0x003e000f, 0x8402a104, 0xc840b310, 0x0e8007e0, + 0x00f80026, 0x100c8403, 0xa9a0c868, 0x321a2ca2, 0x8321a0e8, 0x403e8a0d, + 0x84030e03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xd402fd00, 0x29c00f92, 0x03ec80fb, 0x003a400f, + 0x9213e480, 0xfb203e48, 0x0d9003e4, 0x00fd003a, 0x480f9203, 0xf480fd20, + 0x3f480fd0, 0x03e490fd, 0x213f401f, 0x5203e606, 0x70000000, 0x00000000, + 0x1805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xf400ed00, + 0x3f400fd1, 0x07f400cd, 0x003f400f, 0xd0433400, 0xcd103340, 0x089003e4, + 0x00fd0033, 0x400fd013, 0x7484bd2a, 0x334c0ed0, 0x033400fd, 0x10374829, + 0xd0030600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0, + 0x00b8002e, 0x000b8002, 0xe0008800, 0x3a000ba0, 0x22c0b0d8, 0x002e000b, + 0xa0934020, 0x8800340a, 0x8a8002e0, 0x00b8043a, 0x020b8002, 0x20a0b820, + 0x220c2884, 0x0aa020b0, 0x00220008, 0x82034e04, 0x30000000, 0x00000000, + 0x0805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0xe401a102, + 0x2c410b10, 0x02c489a1, 0x002ce00b, 0x12028400, 0xb1002048, 0x081002c4, + 0x00b10024, 0x400b1002, 0x44c0b128, 0x20480811, 0x628440b1, 0x00244449, + 0x92c20201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x400b9002, 0xe4028920, 0x6a400b90, 0x04e48099, 0x002e400b, + 0x9212c404, 0x99012640, 0x0a9002e4, 0x00b91026, 0x400b9002, 0x2450b910, + 0x22400890, 0x02a400b1, 0x00224808, 0xb1824604, 0x60000000, 0x00000000, + 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9002e, 0x400f9003, 0xe780e960, + 0x3e500f99, 0x02e700e9, 0x902e600f, 0x9412a682, 0xf9803278, 0x0c9040e4, + 0x00f148b6, 0x400f9003, 0x6790f920, 0xb26c0c90, 0x03a400f9, 0xc836580d, + 0x9c032804, 0x70000000, 0x00000000, 0xa801a400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xe440f908, 0x3e640f98, 0x83e400f9, 0x003e440f, + 0x98436720, 0xe9223e44, 0x0f9003e4, 0x00f9003a, 0x400f9003, 0xe404f182, + 0x3e400d1c, 0x436400f9, 0x123e420f, 0x9003ea00, 0x60000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe180c800, + 0x3e104f84, 0x13e1c0c8, 0x483e0044, 0x84a3e000, 0xc8413e00, 0x2c8003e0, + 0x00f87032, 0x000f8003, 0xe000f801, 0x3e040780, 0x03e060e8, 0x6038100f, + 0x8403ca04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8, + 0x00ba002e, 0x800ba002, 0xd8008ec0, 0x2e800be8, 0x823a108e, 0x802f9508, + 0xee2b3b80, 0x8e982fa0, 0x0aa002e8, 0x00be802b, 0xa00bec02, 0xfb40bec0, + 0x2fa003e0, 0x013a048e, 0xe223820b, 0x6c02ca00, 0x40000000, 0x00000000, + 0x28054c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc0293c0, + 0x2ce00b30, 0x02af0213, 0x052cc069, 0xb0000c00, 0x8bc02ee2, 0x083002cc, + 0x00b3c020, 0xe40bba02, 0xcc00b360, 0x2ec00b32, 0x008c00a3, 0x0028e00b, + 0x3c82ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xf8009740, 0x2dd00b78, 0x529c0097, 0x402de009, + 0x70021c08, 0x87002dd0, 0x0a7002dc, 0x00bc0029, 0xc00b7082, 0xdd00b741, + 0x25400b70, 0x021e1487, 0x0021c00b, 0x6082e800, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7803de0, 0x0f7803de, 0x00f7803d, 0xe00f7803, 0xd200d781, + 0x2de00ff8, 0x039e00d7, 0x843de04d, 0xf8431c00, 0xc7803de0, 0x0c7803de, + 0x00f58221, 0xe00f5803, 0xde00f780, 0x3de08f48, 0x178e04e7, 0x8239e00f, + 0x7803ea02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0xc00fb003, 0xc00ae900, 0x0e400fb0, 0x032404e8, 0x003c010e, + 0xb023a000, 0xfa043680, 0x0bb003ec, 0x00f0003e, 0x000f9003, 0xe008f802, + 0x3e000f00, 0x13a000fa, 0x043e400f, 0xb003c206, 0x60000000, 0x00000000, + 0x0005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xda00ef91, + 0x71e40cfb, 0x03bec0cf, 0x903fe90b, 0xf2023e80, 0xcf9433e0, 0x0ff803fe, + 0x00fe8033, 0xe00cf803, 0x3e00cf90, 0x3fe40468, 0x007e40cf, 0x8033e00c, + 0xf9030000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xd8008701, 0x61c08d61, 0x431840d7, 0x502dc20b, + 0xe3863d80, 0xa7002946, 0x4b7002dc, 0x00b44037, 0x400dc002, 0x1000a600, + 0x2d402870, 0x1230c0a7, 0x04214028, 0xc1022a04, 0x60000000, 0x00000000, + 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b7002, 0xb060ae01, + 0x2bc009d2, 0x129c81a7, 0x002dd84b, 0x520a9cc0, 0x850221d0, 0x0b7002dc, + 0x00b40029, 0xc0095002, 0x1c008508, 0x6d401840, 0x025c1085, 0x0020c009, + 0x70420000, 0x20000000, 0x00000000, 0x2014cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xc32380c8, 0x28660908, 0x122320b0, 0xc12c000b, + 0x0c028380, 0x20002800, 0x0b3002cc, 0x01b0a02c, 0x00990000, 0x2200a004, + 0x6c000800, 0x002000a8, 0x10a07009, 0x18020804, 0x30000000, 0x00000000, + 0xa815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xc200e30c, + 0x3af00db4, 0x02af22e3, 0x943ec04b, 0xbd02ae20, 0x8be0b2e0, 0x0fb003ec, + 0x00fa603a, 0x400d902a, 0x26808980, 0x2ec2081c, 0xab6400cb, 0x4032920d, + 0xb48b2a04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0xc00fb003, 0xe000fa00, 0x26c00f91, 0x03ac009b, 0x503ec18f, + 0x90016d00, 0xf9003ec0, 0x0fb003ec, 0x00f80036, 0x000f9003, 0xe400f901, + 0x3e500f90, 0x83e400f9, 0x483e880e, 0xa203e000, 0x30000000, 0x00000000, + 0x0110fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ff007, 0xf000cfa1, + 0x33e00fa0, 0x80f842cf, 0x0233e00f, 0xe1133f04, 0xff083340, 0x8cf003fc, + 0x00fc4033, 0x400dc003, 0xe400c500, 0x31210cd0, 0x037400cf, 0x80b3800c, + 0xd003c044, 0x30000000, 0x00000000, 0x81046c00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0xe30088c0, 0x22600984, 0x42e10088, 0x803e280b, + 0x80066200, 0xb8002a12, 0x08b002ec, 0x10b0c036, 0x28098c02, 0xe200a880, + 0x36320a88, 0x42220288, 0x92205008, 0x9802e040, 0x10000000, 0x00000000, + 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc00bb002, 0xe2228940, + 0x22480bb2, 0x82e50088, 0x10220949, 0x30826000, 0xb2812084, 0x98b002ec, + 0x00ba0022, 0x600b9882, 0xe6008980, 0x22c8088c, 0x0266008a, 0x4622d818, + 0xb202e000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xe0008001, 0x20400b00, 0x02c00280, 0x042c000b, + 0x00024000, 0xb0802800, 0x183002cc, 0x00b80024, 0x000b0002, 0xc000a000, + 0x24400a00, 0x02000080, 0x0020c008, 0x1002c201, 0x00000000, 0x00000000, + 0x000d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb002, 0xe000c800, + 0x32400f80, 0x07c008c8, 0x0032000d, 0x800a2001, 0xf0003200, 0x2cb002ec, + 0x00fa0032, 0x400f8007, 0xe400c900, 0x32000c80, 0x036400c0, 0x0032c04c, + 0x9043c003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff003, 0xf000f400, 0x3f400dc0, 0x03f000fc, 0x003b000f, + 0xc007b000, 0xfc003f00, 0x0ff003fc, 0x00f40037, 0x000dc003, 0xf000fc00, + 0x7d005fc0, 0x03b000fc, 0x003f400f, 0xd003e806, 0x70000000, 0x00000000, + 0xc045fe08, 0xff803be0, 0x0ff803fe, 0x00ff803f, 0x0a0fc3c3, 0xfe00cc29, + 0x3fe00fc1, 0x037e00ff, 0x8037200c, 0xc8033000, 0xcf803de4, 0x0cc4033c, + 0x20ef903f, 0xe00ff803, 0xfe00f680, 0x39210cc8, 0x031600cf, 0x803fe00f, + 0xf803f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb802ee, + 0x00bb802c, 0x5a8b1402, 0x0e000bc6, 0x2ee00b85, 0x0aae00bb, 0x0036200a, + 0x8802ab40, 0xab802ec0, 0x28a4422c, 0x008b202e, 0xe00bb802, 0xee00b880, + 0x36200d88, 0x0226008b, 0x802ee00b, 0xb802e006, 0x30000000, 0x00000000, + 0xc805cc00, 0xb30028c0, 0x0b30028c, 0x00b3002c, 0xc00b0002, 0x64038000, + 0x2c400b02, 0x0a4c00a3, 0x00200018, 0x80060404, 0x830128c8, 0x88160a04, + 0x20b3002c, 0xc00b3002, 0x8c00b200, 0x28000900, 0x06a000a3, 0x012cc01b, + 0x3002c201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc10b8022, 0x0c648820, 0x26c00b22, 0x06ec10bb, 0x0026800a, + 0xa082ac01, 0xab002ec0, 0x2890022f, 0x009b042e, 0xc00bb000, 0xec14ba04, + 0x26020988, 0x422e00ab, 0x002ec00b, 0xb002f000, 0x60000000, 0x00000000, + 0x0015ec00, 0xfb003ac0, 0x0fb003ac, 0x00fb003e, 0x380faa13, 0x68008b40, + 0x3e400f88, 0x036c00eb, 0x00302c0c, 0x0d032280, 0xcb003cc0, 0x0c8c032f, + 0x04fb023e, 0xc00fb003, 0xac00fa40, 0x3a200c0c, 0x83a6006b, 0x003ec00f, + 0xb003c004, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff001fc, + 0x00ff003f, 0x260f79a0, 0x7e28ff80, 0x3fe40f90, 0x01bc00ff, 0x003f400f, + 0xf003d104, 0xff003fc0, 0x0fe903fc, 0x00ef003f, 0xc00ff003, 0xfc00fc00, + 0x3f100fc0, 0x0bf400df, 0x003fc00f, 0xf003e800, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb003ec0, 0x0fb0036c, 0x00fb003e, 0x100e800b, 0xed00d870, + 0x3ec00cb6, 0x03ec20cb, 0x003ed20c, 0x94032000, 0xcb213ec0, 0x8c0403ad, + 0x00fb003e, 0xc00fb003, 0xec00fa40, 0x36320c80, 0x03ec00cb, 0x003ec00f, + 0xb003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0x8205be12, 0x2f03a840, 0x2ed48dbe, 0x022d10db, 0x002ec00d, + 0xb0036c00, 0xdb802ef6, 0x08bd822c, 0x00ab003a, 0xc00bb002, 0xef00b270, + 0x20210880, 0x02cc088b, 0x022ec00e, 0xb002f200, 0x40000000, 0x00000000, + 0xe0054c00, 0xb3002cc0, 0x0b3002cc, 0x0093002c, 0xa00a3002, 0x02048000, + 0x2ce00908, 0x028e408b, 0x00242009, 0x00024d20, 0x93c02cc0, 0x083802aa, + 0x02b3002c, 0xc00b3002, 0xccc0b202, 0x24100810, 0x02c401a3, 0x002cc00b, + 0x3002f000, 0x10000000, 0x00000000, 0xe0011e00, 0xb7802de0, 0x0b7802de, + 0x00b7802d, 0xe0887b42, 0x3e80a790, 0x2de24978, 0x021e0097, 0x822de209, + 0xd8024e00, 0x97802de4, 0x0838021e, 0x00a78029, 0xe00b7802, 0xde00b480, + 0x21200858, 0x06fe00a7, 0x802de00a, 0x7802d804, 0x10000000, 0x00000000, + 0x48080c00, 0xb3003cc0, 0x0f3003cc, 0x00b3003c, 0xc00a0203, 0x8c248050, + 0x6cc00914, 0x0b8c41c3, 0x0034400d, 0x30024c2c, 0xd3083cc0, 0x0c1203a8, + 0x28f3043c, 0xc00f3003, 0xcc00b240, 0x34080c12, 0x03c000e3, 0x003cc00f, + 0x3003d202, 0x10000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc40fe213, 0xbc80af14, 0x7dc00ff0, 0x039c00ff, 0x003dc40f, + 0x7103fc00, 0xff003fc0, 0xafd003fc, 0x00ff003b, 0xc00ff003, 0xfc007e01, + 0x3f102fd0, 0x03fc00df, 0x003fc00f, 0xf003d004, 0x60000000, 0x00000000, + 0xa805ec00, 0xfb003ec0, 0x0fb003ec, 0x01eb003e, 0x000db803, 0x0c08cb80, + 0x36c00fa0, 0x032c00fb, 0x003e800f, 0xa003e000, 0xf38232c0, 0x0ca00328, + 0x00cb003e, 0xc00fb003, 0xee00e200, 0xb0000c28, 0x432c00fb, 0x003ec00f, + 0xb003c200, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0xc0087002, 0x1c008300, 0x21c01b70, 0x029c00b7, 0x002dc00b, + 0x7002d400, 0xb70021c0, 0x8870023c, 0x0087002d, 0xc00b7002, 0xdc108400, + 0x35000550, 0x021c00b7, 0x002dc00b, 0x7002f206, 0x60000000, 0x00000000, + 0x80009e00, 0xb7802de0, 0x0b7802de, 0x00b7822c, 0x60091802, 0x7e01a7c0, + 0x2de20b38, 0x025e00b7, 0x802de01a, 0x7812da11, 0xb78021e0, 0x08280218, + 0x0087802d, 0xe00b7802, 0xde00af80, 0x23e08a68, 0xc01e20b7, 0x802de00b, + 0x7802c840, 0x00000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xf0083a22, 0x4d68a360, 0x28e00bb2, 0x2acc00b3, 0x002cd20b, + 0x3c82cf01, 0xb30020c0, 0x283a120c, 0x0083002c, 0xc00b3002, 0xcc008308, + 0x24c82b3e, 0x420d00b3, 0x002cc00b, 0x3002da00, 0x30000000, 0x00000000, + 0xe815a800, 0xfa003e80, 0x0fa002e8, 0x00fa003f, 0xb63dec3b, 0x7a0aee00, + 0x3e800fec, 0x136804fa, 0x003f880f, 0xe003fb60, 0xfa003280, 0x0cea0b1a, + 0x84ca003e, 0x800fa003, 0xe800ee01, 0x33920ee4, 0x0b1a40fa, 0x003e800f, + 0xa003fa04, 0x50000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0, + 0x00f8003e, 0x000f8503, 0xa100d800, 0x36000f81, 0x03a000f8, 0x003e000b, + 0x8101e100, 0xf802be00, 0x0f8043e0, 0x00f8001e, 0x000f8003, 0xe100f443, + 0xbf010584, 0x03e000f8, 0x003e000f, 0x8003d200, 0x60000000, 0x00000000, + 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x500c9a03, 0xe700c984, + 0x3e700c90, 0x032600f9, 0x003e400c, 0x9003e480, 0xf9803e64, 0x0c1203a7, + 0x02c9003e, 0x400f9003, 0xe400f9c0, 0x32604c98, 0x00e400c9, 0x003e400f, + 0x9003c204, 0x20000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x708d9a22, 0xc5008940, 0x2c700d9c, 0x022700b9, 0x002c440d, + 0x9002e600, 0xb9c82c58, 0x08901224, 0x0089002e, 0x400b9002, 0xe520b920, + 0x28650a9d, 0x02e40089, 0x002e400b, 0x9002e000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002c, 0x40009012, 0xe4008918, + 0x2e500896, 0x02258839, 0x002e4008, 0x9002e400, 0xb9202e40, 0x08b002a4, + 0x0089002e, 0x400b9002, 0xe400b900, 0x23400a90, 0x12e40089, 0x006e400b, + 0x9002ce00, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4, + 0x00b1002c, 0xc4291106, 0xe4028100, 0x2e408911, 0x0a0400b1, 0x102e4009, + 0x1002cc0c, 0xb1002c44, 0x08114224, 0x5081102c, 0x400b1002, 0xc410bd00, + 0x2b400a30, 0x02e40281, 0x002c400b, 0x1002ca05, 0x00000000, 0x00000000, + 0xb80d6000, 0xb8003e00, 0x0f8003e0, 0x00b8003e, 0x1a0c8683, 0xe8108828, + 0x3e000c86, 0x8b2000f8, 0x403e800c, 0x8043e0a0, 0xf8003e10, 0x4ca683a1, + 0xa2c8403e, 0x000f8003, 0xe000f800, 0x33004a80, 0x03e000c8, 0x003e000f, + 0x8003ee03, 0x00000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4, + 0x00f9003f, 0x480ef223, 0xf4003d00, 0x3f400fd2, 0x03e400f9, 0x213fc00f, + 0xd003f400, 0xf9003c49, 0x2fd203f4, 0x80f9243e, 0x400f9003, 0xc400fd00, + 0x3f400fd0, 0x03f400f9, 0x002e400f, 0x9003e601, 0x70000000, 0x00000000, + 0x9805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003f, 0x480dd28b, 0x2400c900, + 0x37400fd1, 0x237400f9, 0x0037400f, 0x9003f400, 0xc5003f40, 0x0cd283f4, + 0x00d9003e, 0x400f9003, 0xd400f500, 0x31400ad0, 0x03e400f9, 0x003e400f, + 0x9003e601, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0, + 0x00b8002e, 0x0a888202, 0x2800ac40, 0x22000b01, 0x02a000b8, 0xa82e000b, + 0x8002e000, 0x88022e0a, 0x480202c0, 0x0088002e, 0x000b8002, 0xe004bc00, + 0xa2004080, 0x02e804b8, 0x002e000b, 0x8002ce06, 0x30000000, 0x00000000, + 0x4805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x6c091286, 0x34019510, + 0x68401b10, 0x0a4400b1, 0x002c400b, 0x1002c440, 0x81002c48, 0x281282c4, + 0x0091002c, 0x400b1002, 0xd400b500, 0x22400a10, 0x02c400b1, 0x0068400b, + 0x1002d201, 0x60000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x60089006, 0x1400ad00, 0x2ac00b94, 0x02a400b9, 0x002ec00b, + 0x9202e620, 0x0b002e40, 0x289512e4, 0x0089002e, 0x400b9002, 0xec00bd08, + 0x22408892, 0x12e400b9, 0x000e400b, 0x9002c600, 0x20000000, 0x00000000, + 0xa015e410, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x408d9c03, 0x2610d9f0, + 0x3e600b90, 0x136404f9, 0x0036640f, 0x9a03e702, 0x49023c41, 0x0c9003e4, + 0x00d9003e, 0x400f9003, 0xe400f1c1, 0x32490e98, 0x03e700f9, 0x003a400f, + 0x9003e804, 0x70000000, 0x00000000, 0xe841a400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x420b9c03, 0xe490f184, 0xb6680f92, 0x01e420f9, 0x002e600f, + 0x9003e410, 0xf9003e42, 0x079003c5, 0x00f9003e, 0x400f9003, 0xe400f9c4, + 0x3e660f90, 0x13e680f9, 0x003e400f, 0x9003f200, 0x60000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x040e8643, 0xa040f800, + 0x36024f84, 0x0b2040f8, 0x003e000e, 0x8403c100, 0xf8003200, 0x0c8203a0, + 0x08c8003e, 0x000f8002, 0xf040cc40, 0x32000c88, 0x03e002c8, 0x003e000f, + 0x8003c204, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8, + 0x00ba002f, 0xa008ec02, 0x2a00ba60, 0x03b00be4, 0x023a00ba, 0x002fb808, + 0xa003b840, 0xbe802380, 0x08e00228, 0x00aa002e, 0x800ba002, 0xfb40ae10, + 0x29a808e8, 0x02e80c8a, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000, + 0x28054c00, 0xb3002cc0, 0x0b30028c, 0x00b3002e, 0xf00ab00a, 0xd180b420, + 0xa0d003be, 0x020e00b3, 0x002cd80a, 0x30028e00, 0xb33120f0, 0x883d428e, + 0x0483022c, 0xc00b3002, 0xca0080c2, 0x20900830, 0x42cc0083, 0x006cc00b, + 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0x80087402, 0x5c00b300, 0x21020b70, 0x821004b7, 0x002fe008, + 0x70029d08, 0xb78021d0, 0x0878001c, 0x20a7202d, 0xc00b7002, 0xd200a440, + 0x29c02870, 0x82fe0087, 0x002dc00b, 0x7002e004, 0x60000000, 0x00000000, + 0xa8081e00, 0xf7803de0, 0x0f78039e, 0x00f7803c, 0xe0de2833, 0xde00f782, + 0x21200f78, 0x031201f7, 0x803de00e, 0x78039e08, 0xf7803320, 0x2c780b9e, + 0x00c7b03d, 0xe00f7803, 0xda00c485, 0x31a04858, 0x03de00c7, 0x803de00f, + 0x7803e002, 0x00000000, 0x00000000, 0x080dac00, 0xfb003ec0, 0x0fb003ec, + 0x00fb002e, 0x005f8043, 0xac00bb01, 0x7a000f90, 0x03e000fb, 0x003cc00f, + 0xb003ac00, 0xfb00be81, 0x0fb003ed, 0x04fb003e, 0xc00fb043, 0xe004f820, + 0x3e400f90, 0x03cc04fb, 0x001ec00f, 0xb003c204, 0x60000000, 0x00000000, + 0x4005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0x600cfb43, 0x7e40cf96, + 0x3f240ff8, 0x033200ff, 0x803fe00f, 0xf203fe40, 0xff8037e0, 0x4fd8035f, + 0x00cf9833, 0xe00ff803, 0x5200c7d0, 0x3b648ef8, 0x033e00ff, 0x903fe00f, + 0xf803f000, 0x20000000, 0x00000000, 0xa8019c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002f, 0x00287102, 0x1c00a538, 0x2d020b71, 0x021100b7, 0x022dc00b, + 0x7002dc00, 0xb7202dd0, 0x0bd0421c, 0x408f0035, 0xc00b7002, 0xd040d730, + 0x21cc4070, 0x035c40b7, 0x002dc00f, 0x7002ea02, 0x20000000, 0x00000000, + 0x10109c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0x00087222, 0x70059680, + 0x2d008b24, 0x025000b7, 0x002dc00b, 0x7102dd01, 0xb7022544, 0x0b6082dc, + 0x20870061, 0xc00b7002, 0xd0009c00, 0x2b408ac0, 0x025c00b7, 0x006dc00b, + 0x7002c404, 0x20000000, 0x00000000, 0x6814cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0x10089c02, 0x0c88b3c0, 0x2c000b00, 0x224000b3, 0x002c801b, + 0x3006ca01, 0xb2002e80, 0x0ba8028c, 0x10830024, 0xc00b3002, 0xc0009040, + 0x2040280a, 0x024d40b3, 0x002cc00b, 0x3002da00, 0x20000000, 0x00000000, + 0x2815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00c9423, 0x6f02dbd0, + 0x2e000fb0, 0x0b6000ff, 0x003ec60b, 0xb183ef20, 0xfb003680, 0x4fac03cd, + 0x02cf0032, 0xc00fb003, 0xec0018a0, 0x2af80ea4, 0xa26d00fb, 0x002ec00f, + 0xb003da04, 0x60000000, 0x00000000, 0x9000ec00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003c, 0xd70f8313, 0xe144e200, 0x3e100f28, 0x03a000fb, 0x003ec00f, + 0xb003ec00, 0xfb001e91, 0x1f908164, 0x80fb003e, 0xc00fb003, 0xc410f800, + 0x3ec20fa4, 0x43ec80fb, 0x003ec00e, 0xb003e400, 0x10000000, 0x00000000, + 0x8010fc10, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xe80cc91b, 0x3e01cd80, + 0x33000ff0, 0x03b000ef, 0x003fc00f, 0xf003dc40, 0xcf803f00, 0x0ee0033e, + 0x008f0033, 0xc00ff003, 0xf800dca8, 0x33c000e0, 0x03fc00bf, 0x002fc00f, + 0xf003e804, 0x30000000, 0x00000000, 0x80046c00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0x78088c42, 0x2c81ab40, 0x22200b80, 0x036300bf, 0x002e100f, + 0xb002ef80, 0x89c02eb0, 0x089d122c, 0x008b003a, 0xc00bb002, 0xe3008020, + 0x28f238a2, 0x03ac00bb, 0x002ec00b, 0xb002e840, 0x10000000, 0x00000000, + 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc008b412, 0x0c918b60, + 0x22200b98, 0x02a200bb, 0x002ec80b, 0xb002ec00, 0x8b202e20, 0x1a80922c, + 0x40a30022, 0xc00bb002, 0xea159801, 0x26600a98, 0x02ec01bb, 0x002ec00b, + 0xb002e000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc0282022, 0x2c00a300, 0x20000b08, 0x0e4004b3, 0x002c400b, + 0x3002c000, 0x80002c00, 0x0810022c, 0x02a30028, 0xc00b3002, 0xe0098800, + 0x2ac04810, 0x02cc01b3, 0x0024c00b, 0x3002c200, 0x00000000, 0x00000000, + 0x80056c00, 0xfb003ec0, 0x0fb003ec, 0x00fb002e, 0x800c3003, 0x0c008b00, + 0xb2000f80, 0x0ba000eb, 0x003ec00f, 0xb002e402, 0xcb003e00, 0x0ea00b3c, + 0x02ef0022, 0xc00fb003, 0xe800d805, 0x76400a80, 0x07ec00fb, 0x003ec00f, + 0xb003e001, 0x10000000, 0x00000000, 0xa015fc00, 0xff003fc0, 0x0ff003fc, + 0x00ff001f, 0x008fc003, 0xf000fc00, 0x3f000fc0, 0x03f000ff, 0x003fc00e, + 0xf003fc00, 0xff003f01, 0x0fc003fc, 0x00df003b, 0xc00ff003, 0xf000fc00, + 0x7dc00d40, 0x03bc00ff, 0x006fc00f, 0xf023e805, 0x70000000, 0x00000000, + 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xfe00ff84, + 0x1fe40cc8, 0x03f600fc, 0x8037020c, 0xd8033028, 0xccc20160, 0x07c2037e, + 0x00ff803f, 0xe00ff803, 0xfe01dc00, 0x3d210f40, 0x031010dc, 0x203f604d, + 0x42033000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb802ee, + 0x00bb802e, 0xe00bb803, 0xae00bb82, 0x2cc88e88, 0x42e480b8, 0x01221a25, + 0x88002300, 0x8a0022e1, 0x8b8822ae, 0x00bb8026, 0xe00bb802, 0xee18b803, + 0x2e200e88, 0x02a200a8, 0xd42e6028, 0x8812a004, 0x30000000, 0x00000000, + 0xc805cc00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00a3002, 0xcc00b300, + 0x2cc80800, 0x02c4a1b8, 0x08280848, 0x10024010, 0x81202040, 0x4b04028c, + 0x00b3002c, 0xc00a3002, 0xcc00b000, 0x2c000b10, 0x06400080, 0x0028404a, + 0x04420201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0xac00bb00, 0x6ec00ab0, 0x02e410bb, 0x00a60509, + 0x90226d8d, 0x8b00a2c0, 0x8ba102ac, 0x00bb0026, 0xc009b002, 0xec00b881, + 0x26480a98, 0x00e300a9, 0x002e008a, 0x8802b004, 0x60000000, 0x00000000, + 0x4015ec10, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00fb00, + 0x3ec00c82, 0x43e644f0, 0x483e3188, 0x95036300, 0xc85a3260, 0x0f0a03ec, + 0x00fb003e, 0xc00eb002, 0xec00b8a0, 0x3e400f88, 0x416600d8, 0xe23cc28e, + 0x88031004, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff003, 0xfc00ff02, 0x3fc00ee4, 0x13f410fe, 0x9139c02f, + 0xc00ba000, 0xfe003fe8, 0x4fd803fc, 0x009f003f, 0xc00ff003, 0xfc00fd00, + 0x3f600f40, 0x2394007a, 0x282fd30d, 0xf013f800, 0x60000000, 0x00000000, + 0xd010ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00fb80, + 0x3ec10e94, 0x07e441f9, 0x0032c80e, 0x94030c84, 0xc9201241, 0x8cb003ac, + 0x00fb0036, 0xc00fb003, 0xec00f802, 0x3a868e96, 0x036500fb, 0x003ad00f, + 0xa1003004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0xec003b40, 0x2ee008b0, 0x03e704bb, 0x0036d80f, + 0x25222f88, 0x8b0876f8, 0x0db8836c, 0x00bb0026, 0xc00bb003, 0xec00b9d0, + 0x16f04890, 0x0226028b, 0x0202c00b, 0x30037200, 0x40000000, 0x00000000, + 0xe8054c00, 0xb30024c0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0x4c00b320, + 0x2ef20a00, 0x02c42490, 0x1000000a, 0x3c024302, 0x9b0020f8, 0x0808020c, + 0x00b3002c, 0xc0093002, 0xcc00b100, 0x28b00a00, 0x02c00890, 0x902cc113, + 0x00863800, 0x50000000, 0x00000000, 0xf0011e00, 0xb7802de0, 0x0b7802de, + 0x00b7802d, 0xe00b7802, 0xde01b780, 0x2de00858, 0x02d640b5, 0x8024ec4b, + 0xe8825e41, 0xb780a3e4, 0x0978025e, 0x00b7802d, 0xe00b7802, 0xde00b58a, + 0x23a00849, 0x02524087, 0x9221228b, 0x69025800, 0x40000000, 0x00000000, + 0x48080c00, 0xf3003cc0, 0x0f3003cc, 0x00f3002c, 0xc00f3002, 0x4c00b300, + 0x3cc20e20, 0x02cc00ba, 0x2020d82e, 0x110b4010, 0xdb0020c5, 0x0c12020c, + 0x90f3003c, 0xc00d3003, 0xcc00fb00, 0x28000e34, 0x03cc20f2, 0x0038cd1f, + 0x20031202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff003, 0xfc00ff02, 0x3fc003f0, 0x03bc10ff, 0x033fc90e, + 0x5003bc00, 0x4f102fc4, 0x0f7003fc, 0x00ff0037, 0xc00ff003, 0xbc00ff00, + 0x3f408ff0, 0x43bc00ef, 0x027f840f, 0xe003d006, 0x60000000, 0x00000000, + 0xa815ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xac00fb00, + 0x3ec00db0, 0x03e400cb, 0x0032000c, 0xb041ec00, 0xcb0022c1, 0x0ca00b2c, + 0x00fb003e, 0xc00fb003, 0xec00f900, 0x3eda0610, 0x03a408c9, 0x0032c087, + 0x00022a00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7006dc0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xdc00b700, 0x2fc00870, 0x06d404df, 0x0023c008, + 0x70038c00, 0xaf0035c0, 0x0830021c, 0x00b7002d, 0xc00b7002, 0xdc00f703, + 0x2dd00b70, 0x421c0087, 0x0069c01b, 0x700bf204, 0x60000000, 0x00000000, + 0x80009e00, 0xa7802de0, 0x0b7802de, 0x00b7802d, 0xe00b7802, 0xde00b780, + 0x2de04978, 0x069e0487, 0x8861e008, 0x5802de02, 0x978021e1, 0x0878021e, + 0x00b7802d, 0xe00b7802, 0xde00b780, 0x2da00a78, 0xc28e0083, 0x8421e04b, + 0xe846f000, 0x20000000, 0x00000000, 0x4804cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc01839, 0x02ec1093, 0x0020d128, + 0x3f028e20, 0xb300a4c0, 0x483c020c, 0x00b3000c, 0xc00b3002, 0xcc00ab80, + 0x4cd60b38, 0x028c2683, 0x6028e50b, 0x3c8ad204, 0x30000000, 0x00000000, + 0xe805a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800fa003, 0xe800fa00, + 0x3e800de0, 0x03e800ce, 0x80b3a228, 0xe400d880, 0xde043081, 0x2cea0228, + 0x00fa003e, 0x800fa003, 0xe800be48, 0x3ea00ee4, 0x03b9204e, 0xc971b08f, + 0xee037a04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0, + 0x00f8003e, 0x000f8003, 0xe000f840, 0x3e000f80, 0x83e004f8, 0x813e020f, + 0x8403e000, 0xe8403e00, 0x0f8483e0, 0x00f8003e, 0x000f8003, 0xe000f84c, + 0x3e000f84, 0x0b6000f0, 0x407e080f, 0x84025200, 0x30000000, 0x00000000, + 0x0800e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f990, + 0x3e400e90, 0x032400d9, 0x803a440c, 0x9403e642, 0xc9923240, 0x0c1a1324, + 0x08f9003e, 0x400f9003, 0xe400f910, 0x32600f10, 0x832700d9, 0x403a6008, + 0x18030204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x400b9002, 0xe400b940, 0x2e540810, 0x02a70881, 0x89227048, + 0x9802e400, 0x81c02240, 0x889203a4, 0x00b9002e, 0x404b9002, 0xe400b9c0, + 0xa2c40b92, 0x02040289, 0x4836610a, 0x99422000, 0x10000000, 0x00000000, + 0x18152400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9002, 0xe400b900, + 0x2c402a90, 0x02244099, 0x20285008, 0xb442e420, 0x89412250, 0x08902224, + 0x00b9002e, 0x400b9002, 0xe400b940, 0x22408990, 0x02240299, 0x0522440a, + 0x90060600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4, + 0x00b1002c, 0x400b1002, 0xc400b104, 0x2c440890, 0x02844081, 0x10204408, + 0x1026c401, 0x89102040, 0x281002c4, 0x00b1002c, 0x400b1002, 0xc400b110, + 0x20401b10, 0x0a040081, 0x0026c00a, 0x30060201, 0x00000000, 0x00000000, + 0x380d6000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe000fa00, + 0x3e900e80, 0x030900d8, 0x412a1a1c, 0x8007e0a4, 0xc840b200, 0x0c828b20, + 0x00f8003e, 0x000f8012, 0xe005f86a, 0x32000d82, 0x8320a8d8, 0x28ba000e, + 0x828b0e03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e480fd0, 0x43f480fd, 0x202fc92f, + 0xd003f404, 0xfd213d40, 0x4ff007a4, 0x00f9003e, 0x400f9003, 0xe401fd20, + 0x3e400fd0, 0x03f412fd, 0x013b400f, 0xd003e606, 0x70000000, 0x00000000, + 0x1805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe401fd00, + 0x3f410f90, 0x03f40185, 0x00b74c0c, 0xd017f400, 0xcd103340, 0x0fd28324, + 0x04f9002e, 0x400f9003, 0xe400fd28, 0x22404fd0, 0x0194006d, 0x00b7410c, + 0xd2890600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0, + 0x00b8002e, 0x000b8000, 0xe005b800, 0x3a020b80, 0x1260b588, 0x216a0c28, + 0x8016e804, 0xa0002200, 0x8b800220, 0x00380026, 0x000b8002, 0xe000b820, + 0x2a000b84, 0x02200288, 0x1022010a, 0x80120e04, 0x30000000, 0x00000000, + 0x4805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0xc400b100, + 0x2c401b10, 0x06c48281, 0x28204809, 0x1802c450, 0x9100a040, 0x0b100204, + 0x00b1002c, 0x400b1002, 0xc400b128, 0x28401b31, 0x06844481, 0x04284008, + 0x90060201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x400b9002, 0xe400b900, 0x2a401b94, 0x22440089, 0x02284189, + 0xb142e402, 0xb1002240, 0x0b901224, 0x10990026, 0x400b9002, 0xe400b900, + 0x2a400b95, 0x0a2c0189, 0x242a4282, 0x92000604, 0x60000000, 0x00000000, + 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400b9003, 0xe400b900, + 0x2e400f98, 0x03e40081, 0xa122700d, 0x9002e500, 0xd9203240, 0x0f900b24, + 0x00f9003e, 0x400f9003, 0xe400b900, 0xb2480f90, 0x4387c0c9, 0xe23e7004, + 0x900b2804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xe408f900, 0x3a420f9a, 0x016488f9, 0x403a648e, + 0x9813c500, 0xe9003e40, 0x0f9c03e4, 0x00f90036, 0x400f9003, 0xe408f1a0, + 0x36690d90, 0x0be600f1, 0x00366607, 0x9803ea00, 0x60000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000e8003, 0xe000e801, + 0x3e010f84, 0x03e01088, 0x0c3e124c, 0x8001e140, 0xf8603200, 0x0f0403e0, + 0x0078003e, 0x000f8003, 0xe000f800, 0x12180f80, 0x836128c8, 0x0e3a100f, + 0x80130a04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8, + 0x00ba002e, 0x800ba006, 0xe800be30, 0x2fa00ba0, 0x72f9008e, 0x0033b008, + 0xe803ba00, 0xbe802380, 0x0be002e8, 0x00ba002e, 0x800ba002, 0xe800bec2, + 0x16808b60, 0x033800ae, 0x8081a20b, 0x6003ca00, 0x40000000, 0x00000000, + 0x28054c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3012, 0xcc08b340, + 0x2ce00930, 0x02ce8893, 0xc028c54b, 0x31868e80, 0xb38020e4, 0x0b3002cc, + 0x0093002c, 0xc00b3002, 0xcc00b348, 0x20f00b34, 0x020c0193, 0x0120d009, + 0x3602ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xdc00b702, 0x2dc20b70, 0x26dd0087, 0x4021c009, + 0x40069400, 0xb74621c0, 0x0b7002dc, 0x00b7002d, 0xc00b7002, 0xdc00b309, + 0x25508b70, 0x021d03b6, 0x0821c08b, 0xf402e800, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7803de0, 0x0f7803de, 0x00f7803d, 0xe00f7802, 0xde00f780, + 0x2de00d78, 0x03fe02d7, 0x80bbc08f, 0x78039e00, 0xf780b1e0, 0x4f7842de, + 0x00f7802d, 0xe00f7803, 0xde00f780, 0x21e00f78, 0x031e18d7, 0x8179e08f, + 0x7823ea02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0xc00fb003, 0xec00bb00, 0x3ec007b0, 0x03ec00fb, 0x001ec00e, + 0x9003a800, 0xfb041e80, 0x0b9003ec, 0x08fb003e, 0xc00fb003, 0xec10f801, + 0x3e584f20, 0x0aac00e2, 0x007ec00f, 0x3003c206, 0x60000000, 0x00000000, + 0x0005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xfe00f780, + 0x33e004f8, 0x03fe00c7, 0x8033e40c, 0xf213fa04, 0xc78423e4, 0x0ff8033e, + 0x00ff903f, 0xe00ff803, 0xfe047f81, 0x33f40f49, 0x013e848f, 0x9037648f, + 0x48080000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7006dc0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xdc40b540, 0x37000871, 0x42d84087, 0x002bde88, + 0x60065100, 0xd7113540, 0x0b71039c, 0x00b7002d, 0xc00b7002, 0xdc00fc00, + 0x29800b43, 0x029c80a6, 0x3021540b, 0x7103ea04, 0x60000000, 0x00000000, + 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b7002, 0xdc00b600, + 0x21c00870, 0x02d4008c, 0x10210108, 0x5182c440, 0x8c0021c1, 0x0b30821c, + 0x00b7000d, 0xc00b7002, 0xdc00b708, 0x21408b40, 0x1214c0a1, 0x0325448b, + 0xd0820000, 0x20000000, 0x00000000, 0x2014cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xcc00b000, 0x24000934, 0x02c00280, 0xe1203100, + 0x1242c300, 0x90022000, 0x0b1202cc, 0x00b3002c, 0xc00b3002, 0xcc003840, + 0x48120b08, 0x028c00a3, 0x5020f01b, 0x3c028804, 0x30000000, 0x00000000, + 0xa815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb002, 0xec00fb00, + 0x32c02c34, 0x83ec008b, 0xc032c028, 0x9c02e768, 0xcba0a2e8, 0x0fb0032c, + 0x00fb003e, 0xc00fb002, 0xec007940, 0x22900f90, 0x020c30eb, 0xc036c90f, + 0xb8022a04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0xc00fb003, 0xec00fa40, 0x3ed00eb0, 0x43e510f9, 0x52be084f, + 0x94036400, 0xf8403ec0, 0x0fb003ac, 0x00fb003e, 0xc00fb003, 0xec00e920, + 0x3e000f85, 0x13ed003b, 0x003e80c3, 0xb213e000, 0x30000000, 0x00000000, + 0x0110fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xfc00fd20, + 0x33080cf0, 0x833a00df, 0x0033e40c, 0xd0039c04, 0xcfc033c0, 0x0f60033c, + 0x00ff003f, 0xc00ff003, 0xfc00fd00, 0x33800fd0, 0x032c00cd, 0x0833c20c, + 0x78038044, 0x30000000, 0x00000000, 0x80046c00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0xec00b000, 0x2a2068b0, 0x12830081, 0x5036210a, + 0x18226f00, 0xa8412a80, 0x0b84022c, 0x00bb002e, 0xc009b002, 0xec009880, + 0x2a180b08, 0x026e0081, 0x0080d10a, 0xb5822040, 0x10000000, 0x00000000, + 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc00bb002, 0xec00bb00, + 0x20d018b0, 0x022ca49b, 0x0820c008, 0xa802e600, 0x830822c0, 0x0ab4022c, + 0x00bb002e, 0xc00bb002, 0xec00b980, 0x22c00b88, 0x8262008b, 0x60228808, + 0xa042a000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xcc00b000, 0x280008b0, 0x02a00081, 0x04a4002a, + 0xa0224400, 0xa0002840, 0x0b300a8c, 0x00b3002c, 0xc00b3002, 0xcc009000, + 0x28800b00, 0x12400283, 0x0022808a, 0x30020201, 0x00000000, 0x00000000, + 0x000d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb002, 0xec00f800, + 0x32000cb0, 0x230001d9, 0x0032004c, 0x9023a400, 0xc80332c0, 0x0fa0032c, + 0x00fb003e, 0xc00fb003, 0xec00f900, 0x32400f90, 0x032000c9, 0x0032800c, + 0x80078003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff003, 0xfc00fc00, 0x3f008df0, 0x43f0003d, 0x023f000f, + 0xd003b400, 0xfc003f00, 0x0fc0037c, 0x00ff003f, 0xc00df003, 0xfc005c00, + 0x7f000fc0, 0x03b0087d, 0x003f800f, 0xf003e806, 0x70000000, 0x00000000, + 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00dc6033, 0xe00cd243, 0xf200cc80, + 0x33084cc1, 0x2370c0ec, 0x8037200f, 0xf803d080, 0xdf90b720, 0x0cc80370, + 0xc0df0137, 0xc80ff803, 0xfe00ff80, 0x3fe00e58, 0x039200ff, 0x803fe00f, + 0xf803f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb802ec, + 0x228b3022, 0x08889922, 0xee02db80, 0xa2342887, 0x0208c08b, 0x8022e04b, + 0xb802e300, 0x8b0020c1, 0x28b08224, 0x408b8023, 0xe40bb802, 0xee00bb80, + 0x2ee10b98, 0x022200bb, 0x802ee00b, 0xb802f004, 0x30000000, 0x00000000, + 0xc805cc00, 0xb3002cc0, 0x0b3002cc, 0x80800028, 0x820a1002, 0xec008300, + 0x28000900, 0x02c4008b, 0x0020c00a, 0x3002c100, 0xa1002aca, 0x2a3202c0, + 0x80b34064, 0xc00b3016, 0xcc04b304, 0x2cc00bb0, 0x020001b3, 0x002cc00b, + 0x3002f201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec, + 0x10aa042a, 0xca8a9100, 0xe8009940, 0x22408828, 0x02a81129, 0x0ce6c20b, + 0xb002e802, 0xb3002a88, 0x0a2202a4, 0x40aa8162, 0xc00bb002, 0xec00bb01, + 0x2ec00bb8, 0xc22800bb, 0x042ec00b, 0xb002f004, 0x60000000, 0x00000000, + 0x0415ec00, 0xfb003ec0, 0x0fb003ec, 0x18c9c8b8, 0xc04cb801, 0xec02cb80, + 0x30300d88, 0x03e782eb, 0x4432c10f, 0xb002e004, 0xea483ec8, 0x0eb263e9, + 0x00fb8036, 0xc00fb002, 0xec00fb00, 0x3ec00f98, 0x122160fb, 0x003ec00f, + 0xb003f004, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff003fc, + 0x089d9037, 0xe00dd812, 0xc484fe20, 0x17e60ed0, 0x537244d7, 0x423b480f, + 0xf003fd00, 0x8f2035e0, 0x0dd8237a, 0x00d5003f, 0xc00ff003, 0xfc00ff00, + 0x3fc00fd0, 0x837200ff, 0x003fc00f, 0xf003e800, 0x60000000, 0x00000000, + 0xd010ac00, 0xfb003ec0, 0x0fb003ec, 0x00e0483a, 0xc00eb003, 0x2d80cb41, + 0x36802db0, 0x0b0500ea, 0x4032900f, 0xb0034400, 0xfb103644, 0x0eb403a1, + 0x02eb1032, 0xc00fb003, 0xac00fb00, 0x3ec44fa0, 0x032090db, 0x203ec00f, + 0xb003f104, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ed, + 0x008aa022, 0xfc08be07, 0x6c128308, 0x0ee08dbe, 0x222b608b, 0x5036f40b, + 0xb002ed60, 0xcb5022c4, 0x08bf222c, 0x800ad033, 0xc00bb002, 0xec00bb40, + 0x2ee40b26, 0x0a28008b, 0xa02ec00b, 0xb002f600, 0x40000000, 0x00000000, + 0xe0054c00, 0xb3002cc0, 0x0b3002ef, 0x8422412c, 0x400a3c86, 0xce008384, + 0x04000800, 0x820a00b3, 0x9064d00b, 0x30024000, 0xa00024e0, 0x2a3000ac, + 0x01a3c0a4, 0xc00b3002, 0x8c00b322, 0x2cd00b10, 0x02050093, 0x402cc00b, + 0x3002f800, 0x50000000, 0x00000000, 0xf0011e00, 0xb7802de0, 0x0b7802de, + 0x20879025, 0xe4085802, 0xfe048780, 0x2ca449e8, 0x221a4036, 0x8025a00b, + 0x7802d600, 0x8f802161, 0x0878120e, 0x00879021, 0xe00b7802, 0xde00b781, + 0x2de01b79, 0x02360497, 0x802de00b, 0x7806fc00, 0x40000000, 0x00000000, + 0x48080c10, 0xf3002cc0, 0x0f3003ec, 0x00aa103e, 0xc10e3102, 0xc422c200, + 0x34d64800, 0x430c40f3, 0x0030460f, 0x30024c00, 0xe30034c0, 0x0e901385, + 0x00e31030, 0xc00f3003, 0x8c00f300, 0x3cc00f10, 0x030400d3, 0x003cc00f, + 0x3003d202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc, + 0x00ff103b, 0xc00f7043, 0x7c08ff80, 0x3fc40e61, 0x03fc51c7, 0x103fe00f, + 0xf003fc00, 0xf7103bc4, 0x9ff803fc, 0x00f6103b, 0xc40ff003, 0xfc00ff00, + 0x3fc00ff0, 0x23f440ef, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000, + 0xa805ec00, 0xfb003ec0, 0x0fb003ec, 0x00f90032, 0xc00cb003, 0xea18c904, + 0x3e409ca0, 0x032400c9, 0x0032c00f, 0xb003e802, 0xcb003680, 0x0ca80b2a, + 0x01cb0032, 0xec0cb003, 0xec00fb80, 0x32c00f18, 0x072000fb, 0x003ec00f, + 0xb003ea00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7002dc, + 0x00b50021, 0xc1005002, 0xdc008701, 0x2dc00870, 0x0a1400a7, 0x0029c00b, + 0x7002cc00, 0x8f0229c0, 0x0d700218, 0x00870029, 0xc40d7002, 0xdc10b700, + 0x35c04b70, 0x061000b7, 0x002dc00b, 0x7002f024, 0x60000000, 0x00000000, + 0x80009e00, 0xb7802de0, 0x0b7802de, 0x00a38021, 0xe2087882, 0xde208780, + 0x2cc00a78, 0x420e20ab, 0x8029e00b, 0x7802dc01, 0x878022f0, 0x3b785286, + 0x0297c220, 0xe0087802, 0xde00bf80, 0x21e00bd8, 0x0a1600b7, 0x802de00b, + 0x7802e000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b30020, 0xd1083002, 0xd20084a2, 0x2cf10a34, 0x820e10a4, 0x00290c0b, + 0x3002cc81, 0x83442908, 0x2b49468c, 0x80928028, 0xc0093002, 0xcc00b300, + 0x24c00b36, 0x020c00b3, 0x042cc00b, 0x3002d204, 0x30000000, 0x00000000, + 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fee0b3, 0xa40ca803, 0xe812caa0, + 0x3fb72a6a, 0x133902ea, 0xc03ab00f, 0xa013fa80, 0xce847680, 0x0fa543b9, + 0x00d680b2, 0x800ca002, 0xe800fa00, 0x32800fe4, 0x033900fa, 0x003e800f, + 0xa003fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0, + 0x00f8483e, 0x006f8403, 0xe000f800, 0x3e108984, 0x03e02018, 0x181e000f, + 0x8003e110, 0xf8597e00, 0x05800360, 0x40e8007e, 0x000f8003, 0xe000f800, + 0x3e104f84, 0x03e060f8, 0x003e000f, 0x8003d200, 0x30000000, 0x00000000, + 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00e94032, 0x702e1c03, 0xa460f900, + 0x3c680c91, 0x036480c1, 0x00b2500c, 0x9003e440, 0xf9013040, 0x0c9203e4, + 0x80f90032, 0x410f9003, 0xe400f900, 0x3e400f90, 0x03e408f9, 0x003e400f, + 0x9003c204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e5, + 0x48810020, 0x40089002, 0x2400b900, 0x2e41089a, 0x0a260289, 0x18a84008, + 0x9002e700, 0xb9a0a277, 0x089042e4, 0x04b94022, 0x400b9003, 0xa400b901, + 0x2e404b96, 0x02e400b9, 0x002e400b, 0x9002e000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b9002c5, 0x00a90022, 0x420a9002, 0xbc04bd21, + 0x0e400890, 0x0244008d, 0x01234008, 0x9002ac00, 0xb1112340, 0x00d002e4, + 0x00b94026, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400b9, 0x002e400b, + 0x9002c600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4, + 0x408110a0, 0x44081022, 0x1c00b502, 0x2c40a891, 0x0a04408d, 0x0029c0a8, + 0x1002c400, 0xb1152345, 0x285102c4, 0x40b10024, 0x400b1002, 0xc400b101, + 0x2c400b10, 0x02c400b1, 0x002c400b, 0x1002c201, 0x00000000, 0x00000000, + 0xb80d6000, 0xf8003e00, 0x0f8003e1, 0x00ea68b2, 0x100ea2c3, 0xa000fc01, + 0x3e8a4c06, 0xa369a0c8, 0x0033000c, 0x8003a8a0, 0xf8402210, 0x0c6403e1, + 0xa0f828b6, 0x0a0f8003, 0xe000f000, 0x3e808f80, 0x03e000f8, 0x003e000f, + 0x8003ce03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4, + 0x80fd203d, 0x480fd003, 0xc410f900, 0x3f4083d2, 0x03f488f9, 0x003e400b, + 0x9003fc00, 0xfd223e48, 0x0b9203f4, 0x84f5003a, 0x400f9003, 0xa400f900, + 0x3e400fd0, 0x13f400f9, 0x003e400f, 0x9023e606, 0x70000000, 0x00000000, + 0x9805e400, 0xf9003e40, 0x0f9003f4, 0x00cd1237, 0x402cd283, 0xf400dd00, + 0x37400cd1, 0x133480cd, 0x0033400f, 0x9003b402, 0xcd143340, 0x8cd003f4, + 0xc0fd0436, 0x400c9003, 0xe400f900, 0x3e400fd0, 0x032400f9, 0x003e400f, + 0x9003c600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0, + 0x22881022, 0x0b888050, 0xe8008802, 0x2e804aa1, 0x12a0a4a8, 0x002a000b, + 0x8002e002, 0xa000328b, 0x08a202e0, 0xc0b8002a, 0x000d8002, 0xe000b800, + 0x2f000b80, 0x022000bc, 0x00260009, 0x8002de04, 0x30000000, 0x00000000, + 0x4805c400, 0xb1002c40, 0x0b1002c4, 0x00910024, 0x68093012, 0xc4049104, + 0x64440a10, 0x0a04c0a1, 0x0264400b, 0x10028441, 0x89002048, 0x0a3282c4, + 0x80b90024, 0x40081002, 0xc400b500, 0x2d400b90, 0x0a1400b5, 0x002c400b, + 0x1002d201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002c4, + 0x00998022, 0xc0099002, 0xe4108904, 0x6e408a12, 0x028400ab, 0x286e620b, + 0x9012e405, 0xa9182460, 0x089002e4, 0x20b9802a, 0x40099002, 0xe400b900, + 0x2f411bb1, 0x026620bf, 0x002e4009, 0x9002c604, 0x60000000, 0x00000000, + 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00d92034, 0x400d9803, 0xe440d922, + 0x36740e9c, 0x03248861, 0x8036510f, 0x9003a600, 0xc1c23250, 0x2e9c13e6, + 0x40f9e036, 0x400c9003, 0xe400f900, 0x3e400f90, 0xc32500f9, 0x003e400f, + 0x9003e804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003e4, + 0x08e9003e, 0x682e9402, 0xe620f990, 0x3e608f98, 0x03e640b9, 0x803a404f, + 0x9003c508, 0xd980ba40, 0x0f9a03e6, 0x00f9003e, 0x400f9003, 0xe400f900, + 0x3e400f90, 0x03a400f9, 0x0136400f, 0x9003fa00, 0x60000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f0213a, 0x082c8803, 0x2100f842, + 0x3e122e87, 0x032020e8, 0x003e160f, 0x8003e082, 0xc8403a12, 0x2e8623e0, + 0x08e84030, 0x000f8003, 0xe000fc00, 0x3f000f85, 0x033000fc, 0x003e000f, + 0x8003ca04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002fa, + 0x80be4023, 0xb008e00a, 0x1a00ba80, 0x2db80dec, 0x237800de, 0x802f900b, + 0xa003bb80, 0xce802bb0, 0x40e002ea, 0x0006c022, 0x800ba002, 0xe800ba00, + 0x2e800b68, 0x022840ba, 0x082e800b, 0xa002ca00, 0x40000000, 0x00000000, + 0x28054c00, 0xb3002cc0, 0x0b30028e, 0x20b31028, 0xc0083026, 0x0e15b304, + 0x6cc04a30, 0x420e4023, 0xc82cc00b, 0x30028c00, 0x93e028c4, 0x023400ce, + 0x00a23020, 0xc00b3002, 0xcc00b300, 0x2cc00b38, 0x020d10b3, 0x812cc003, + 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc, + 0x00b30023, 0xd0081802, 0x1c20b740, 0x6dc00930, 0x225c0a97, 0x0e6dc009, + 0x70228c04, 0x870829c1, 0x087002ce, 0x308f0021, 0xc00b7002, 0xdc10b704, + 0x2dc00bd0, 0x0a1c10b7, 0x002dc00b, 0x7002e800, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7803de0, 0x0f78039e, 0x00b48029, 0x20085803, 0x1e00f780, + 0x2ce00a78, 0x233e00e7, 0x803de00f, 0x78039e00, 0xd7803be1, 0x0e7823de, + 0x00e780b1, 0xe00f7803, 0xde00f780, 0x3da00f68, 0x031e04f7, 0x823de00f, + 0x7803e202, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003e0, + 0x00f8003c, 0x400f9001, 0xec04bb00, 0x0ec05fb0, 0x6bec11db, 0x021ec00f, + 0xb002ac00, 0xfb003600, 0x07b003ec, 0x00f3003e, 0xc00fb003, 0xec00fb00, + 0x3e8a0710, 0x02ec0cfb, 0x603ec00f, 0xb003c202, 0x60000000, 0x00000000, + 0x4005fe00, 0xff803fe0, 0x0ff803fe, 0x00fe8033, 0xe00cda03, 0xfe42cf94, + 0x3fe40c7b, 0x43be00df, 0x8433e48f, 0xf103fe00, 0xcfb033e0, 0x0cc803fe, + 0x00cf8233, 0xe00ff803, 0xfe00ff80, 0x3fe04f78, 0x233a00cd, 0xd03fe40f, + 0xf803c000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002dc, + 0x00b72121, 0xc4085002, 0xdd008702, 0x2dcc0a41, 0x43540087, 0x10a1c00b, + 0x70079c88, 0x865c21c0, 0x085012f4, 0x40850029, 0xc00b7002, 0xdc40b710, + 0x2dc44b50, 0x835858d5, 0x002dc00b, 0x7002ea00, 0x60000000, 0x00000000, + 0x10009c00, 0xb7002dc0, 0x0b7002dc, 0x00b64227, 0x80085222, 0xfc089701, + 0x2cc11af2, 0xa288209f, 0x4025c00b, 0x71068034, 0x852021c4, 0x0a6002dc, + 0x00870021, 0xc00b7002, 0xdc00b700, 0x2d800b60, 0x02680085, 0x012dc01b, + 0x7002c004, 0x20000000, 0x00000000, 0x6814cc00, 0xb3002cc0, 0x0b3002c0, + 0x00ba0522, 0x90080042, 0xc0489350, 0x2cb21a82, 0x02430080, 0x0024920b, + 0x30028280, 0x88c02210, 0x08b602c7, 0x0481e028, 0xc00b3002, 0xcc00b300, + 0x2c800b18, 0x004a4091, 0x002cc00b, 0x3002c004, 0x30000000, 0x00000000, + 0x2815ac00, 0xfb003ec0, 0x0fb003e0, 0x00fbc036, 0x80689003, 0xec10db40, + 0x3ec82ebc, 0x73af00db, 0x80b4c00f, 0xb0038f00, 0xcb0032c0, 0x2eb402e4, + 0x82c20032, 0xc00bb002, 0xec00fa00, 0x3e400fb8, 0x014c00ca, 0x002ec00f, + 0xb003e204, 0x60000000, 0x00000000, 0x9000ec00, 0xfb003ec0, 0x0fb003e1, + 0x00f9c03e, 0x280f9510, 0xed84eb00, 0x3ed005b0, 0x03e920fb, 0x503ae00f, + 0xb003a100, 0xf9403ee8, 0x039821e4, 0x20fb103e, 0xc00fb003, 0xec00fa46, + 0x3e400fb0, 0x03ec00fa, 0x003ec00f, 0xb003e000, 0x30000000, 0x00000000, + 0x8010fc00, 0xff003fc0, 0x0ff003f2, 0x00fc01b3, 0x002cd003, 0x0e80cfa9, + 0x3de40cc0, 0x0b9682c3, 0x0033e80c, 0xf0037e00, 0xce2cb3e0, 0x2ce80b3c, + 0x40ff00b3, 0xc00ff003, 0xfc00fe00, 0x3f000ff0, 0x033c00ce, 0x003fc00f, + 0xf003c044, 0x30000000, 0x00000000, 0x80446c00, 0xbb002ec0, 0x0bb002e3, + 0x80b88022, 0x21880002, 0x23108b00, 0x2ed00880, 0x4360808a, 0xc0221008, + 0xb002e320, 0xd8002228, 0x2084022e, 0x00bb8022, 0xc00bb002, 0xec00ba40, + 0x2e051b3c, 0x02ac088a, 0x002ec00e, 0xb002e800, 0x10000000, 0x00000000, + 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x40ba8822, 0xa0089602, 0x2c028b01, + 0x2ec200b8, 0x02ac009b, 0x12a2d00a, 0xb002ec80, 0x8b002204, 0x0a860224, + 0x00bb2022, 0xc00bb002, 0xec00ba40, 0x2e400b98, 0x06680088, 0x002ec00b, + 0xb002e000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc, + 0x00b00020, 0x00081022, 0x2c018102, 0x2c402808, 0x0240008b, 0x0020c00a, + 0x3006c008, 0x90002000, 0x88100204, 0x00b30020, 0xc00b3002, 0xcc00b200, + 0x24400b90, 0x06680280, 0x002cc00a, 0x3002ca01, 0x00000000, 0x00000000, + 0x800d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fa0022, 0x800c900b, 0x2c00c900, + 0x3e004880, 0x0ba000c9, 0x0132402e, 0xb0036000, 0xc0003000, 0x0ca0032c, + 0x00fb0032, 0xc00fb003, 0xec00ba00, 0x3e000b90, 0x0b6800c8, 0x027ec00f, + 0xb003c001, 0x00000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003f0, + 0x00f4003d, 0x000fd001, 0xfc00ff00, 0x3fc00fc0, 0x13f000ff, 0x003fc00d, + 0xf001f000, 0xfc013f00, 0x0bc003f4, 0x00f7003f, 0xc00ff003, 0xfc00fe00, + 0x3f000fd0, 0x03b810fc, 0x003fc00e, 0xf003e805, 0x70000000, 0x00000000, + 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xfe10bf90, + 0x3f200ddc, 0x03b204fc, 0x903f200f, 0x49233200, 0xcc80b324, 0x0ec90b3e, + 0x00ff803f, 0xe00ff803, 0xfe00dc10, 0x37200ff1, 0x039a42fc, 0x30334008, + 0xd902f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb802ee, + 0x00bb802e, 0xe00bb802, 0xee00bb00, 0x2e082c82, 0x022610b3, 0x2126e04e, + 0xb003ee00, 0x832222c8, 0x8ab2032e, 0x08bb802e, 0xc00bb802, 0xee003842, + 0x22610b75, 0x022c80a8, 0x60b61d8a, 0x9002e004, 0x30000000, 0x00000000, + 0xc805cc00, 0xb30028c0, 0x0b30028c, 0x00b3002c, 0xc00a3002, 0x8c00b320, + 0x2c028890, 0x028c00b3, 0x202cc01b, 0x32020c00, 0x838820e0, 0x0830020c, + 0x00b3002c, 0xc00a3002, 0xcc00b061, 0x24004a32, 0x222c04a1, 0x92244248, + 0x2202c201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0xec00bb04, 0x2ec009b8, 0x422828bb, 0x042e508a, + 0xa0466830, 0x8b0020c8, 0x1a98822c, 0x00bb002e, 0xc00bb002, 0xec04bb00, + 0x2248cbb0, 0x022e00a9, 0x0226400a, 0xa286f004, 0x60000000, 0x00000000, + 0x8015ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00eb003, 0xac00fb00, + 0x3e2c0c18, 0x03a710fb, 0x0b3ed007, 0xbc032e00, 0xcb0332e0, 0x0cb0032c, + 0x00fb003e, 0xc00eb002, 0xec00f8c0, 0x36000eb0, 0x012a00e8, 0x8030600c, + 0xbc03d004, 0x70000000, 0x00000000, 0xb001bc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff003, 0xfc00df00, 0x3f800ed0, 0x23f680ff, 0xa037c90e, + 0xd403fd06, 0xfd103f41, 0x0bf003bc, 0x00ff0027, 0xc00ff003, 0xfc00f690, + 0x3fa04ff0, 0x027c02f6, 0x921fe48f, 0xd003f800, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb003ec0, 0x0db003ec, 0x00fb003e, 0xc00fb003, 0xec00fb00, + 0x7a420cb4, 0x036d00f8, 0x01729007, 0xb401a480, 0xfa221280, 0x0ca483ac, + 0x00fb003e, 0xc00cb003, 0xac01f940, 0x32000fb0, 0x03ac00c8, 0x003ac94c, + 0xb5433004, 0x20000000, 0x00000000, 0xd8052c00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0xec14bb80, 0x76e00db0, 0x022e20bb, 0x20a2f48b, + 0xb0034c00, 0xbbe0a2d6, 0x08b4036c, 0x00bb002e, 0xe20db002, 0xec00bb00, + 0x36800bf0, 0x120c04da, 0x7222d80d, 0xa4037200, 0x40000000, 0x00000000, + 0xe0054c00, 0x930024c0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc00b3a1, + 0x2a200910, 0x024c20b3, 0xc800e01b, 0xbd824d40, 0xbbc020c0, 0x29b9020c, + 0x00b3002c, 0xc0083002, 0x8c00b002, 0x20801bb0, 0x0a400082, 0x00284009, + 0x1c827800, 0x50000000, 0x00000000, 0xf0011e00, 0xb7802de0, 0x0b7802de, + 0x00b7802d, 0xe01b7806, 0xde00b784, 0x216a09f8, 0x221e01b4, 0xa021a009, + 0x78025604, 0xb68021a4, 0x0968025e, 0x00b7802d, 0xe0097802, 0xde00b580, + 0x25621b79, 0x02fe0096, 0x9423a049, 0xd802d800, 0x40000000, 0x00000000, + 0x48080c00, 0xf3003cc0, 0x0f3002cc, 0x00b3003c, 0xc00f3003, 0xcc00fb08, + 0x2a800d14, 0x074441f3, 0x0020c60f, 0x17034c40, 0xb1103244, 0x2db2028c, + 0x00f3003e, 0xc0083003, 0x8c00ba40, 0xa0954f30, 0x074480cb, 0x10b8c00d, + 0x32035202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff003, 0xfc00ff00, 0x3fc81b70, 0x17f448bf, 0x203fc00f, + 0xf103fc44, 0xff003fc5, 0x02f803fc, 0x40ff003f, 0xc00ff003, 0xfc00ff10, + 0x1b500ff0, 0x813400ff, 0x143dc40f, 0x70035006, 0x60000000, 0x00000000, + 0xa805ec04, 0xfb023ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00fb00, + 0x2ec04c38, 0x23a804eb, 0x0012400f, 0xa002e800, 0xeb003ec0, 0x0e9007ec, + 0x00fb003e, 0xe02cb003, 0xec00fb00, 0x32c80fb4, 0x834800c9, 0x0032400c, + 0xb0032a00, 0x70000000, 0x00000000, 0xc8919c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xdc10b701, 0x2dc00870, 0x121c003f, 0x0631c00b, + 0x7002dc00, 0xb7002fc0, 0x0f7002dc, 0x00b7002f, 0xc0087003, 0x9c00b702, + 0xa9c00b32, 0x021c00a7, 0x0621818a, 0x7012b204, 0x60000000, 0x00000000, + 0x90009e00, 0xa7802de0, 0x0b7802de, 0x00b7802d, 0xe00b7802, 0xde00b780, + 0x2de048f8, 0x829610a7, 0x8c21e00b, 0x7802de00, 0xb7822de0, 0x087802de, + 0x00b7802d, 0xe0097802, 0xde00b380, 0x21e40b78, 0x027e0081, 0xc020e008, + 0x7802f000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x6ef48832, 0x221000b4, 0x20a5000b, + 0xcc02d000, 0xb4802d24, 0x4b4d02cc, 0x00b3002c, 0xc0083002, 0x8c00bb90, + 0x20d48b30, 0x020c00a3, 0xc022d18a, 0xb202d204, 0x30000000, 0x00000000, + 0xe015a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800fa003, 0xe800fa04, + 0x2f90ace0, 0x03a800ea, 0xc422b20f, 0xae02e980, 0xfaa13e80, 0x0ca923e8, + 0x00ba003e, 0x800da003, 0xe800fe40, 0xa2a44ba0, 0x035a22ce, 0xc0b3b02c, + 0xec43fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0, + 0x00f8003e, 0x000f8003, 0xe000f800, 0x3e180f80, 0x43e024f8, 0x403a120b, + 0x8241e024, 0xf8803e20, 0x058003e0, 0x00f8003e, 0x000f8003, 0xe000f800, + 0x3e000f80, 0x03e000f0, 0x213e042f, 0x85039200, 0x30000000, 0x00000000, + 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f9c0, + 0x7a400c90, 0x03e400f9, 0x9232480b, 0x90432508, 0xf9803270, 0x4c911324, + 0x08e9003e, 0x700f9003, 0xe400f908, 0x32600f10, 0x03a402d9, 0x10326a0c, + 0x98030204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x400b9022, 0xe400b94a, 0x664c0890, 0x02e780b9, 0x406a7089, + 0x99432420, 0xb9102250, 0x28100364, 0x00b9002e, 0x520b9002, 0xe400b900, + 0x22fc0b90, 0x02240889, 0x40226188, 0x930a2000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9002, 0xe414b104, + 0x2e400890, 0x02f48835, 0x4023400b, 0xd0023401, 0xb5002140, 0x40d00224, + 0x00b9002e, 0x400b9002, 0xe400b900, 0xa2400b90, 0x02a40099, 0x4022c008, + 0x90060600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4, + 0x00b1002c, 0x400b1002, 0xc400b114, 0x24442814, 0x02d401b5, 0x1229c089, + 0x510a1400, 0xb7102144, 0x08510a44, 0x00b1002c, 0x440b1002, 0xc400b110, + 0x20400b11, 0x02244081, 0x12a044c8, 0x11060201, 0x00000000, 0x00000000, + 0xb80d6000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe010f840, + 0x28110c80, 0x03e000f8, 0x4022000f, 0x84072000, 0xf840b290, 0x0cc40320, + 0x00f8003e, 0x100f8003, 0xe000f868, 0x32011f86, 0x83a100d8, 0x69329a0c, + 0x84030e03, 0x50000000, 0x00000000, 0x981de401, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xe400f924, 0x3b480fd0, 0x23e404f9, 0x203e400f, + 0x9227a400, 0xf9213e48, 0x4f9253a4, 0x00f9003e, 0x480b9003, 0xe400fd20, + 0x2e400f92, 0x11f480fd, 0x243f48af, 0x7203e606, 0x70000000, 0x00000000, + 0x9805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400fd00, + 0x73414c91, 0x233400cd, 0x00b3404f, 0xd0217400, 0xfd10b340, 0x0fd00324, + 0x00f9003d, 0x400c9002, 0xe400f928, 0x36400c90, 0x032402cd, 0x103348cc, + 0xd0430600, 0x70000000, 0x00000000, 0x7810e000, 0xb8002e00, 0x0b8002e0, + 0x00b8002e, 0x000b8002, 0xe008b008, 0x2a020880, 0x02201088, 0x202200cb, + 0x8080a804, 0xc001220a, 0x0b8206a0, 0x00e80026, 0x020d8002, 0xe010b820, + 0x22000a84, 0xb2082188, 0x10aa8a0a, 0x82160e04, 0x30000000, 0x00000000, + 0x4805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0xc400b120, + 0x24408910, 0x02440181, 0x2920410b, 0x12020c04, 0x31002048, 0x0b128204, + 0x00b1002c, 0x40081002, 0xc400b128, 0x26400813, 0x02040081, 0x00204ca8, + 0x128a0201, 0x70000000, 0x00000000, 0x1815a410, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x400b9042, 0xe400b300, 0x20585990, 0x82640289, 0x0822400b, + 0x9006a400, 0x89002246, 0x0b9402a4, 0x00a90026, 0x40099002, 0xe400b908, + 0x22400a90, 0x02241089, 0x402ac00a, 0x92420604, 0x60000000, 0x00000000, + 0xa015e410, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9002, 0xe400f900, + 0x36402d9c, 0x036580c9, 0x5132628f, 0x96236704, 0xf9882260, 0x4f180a24, + 0x00f9003e, 0x400c9003, 0xe400f902, 0x34400c90, 0x0b274489, 0x0032702c, + 0x90022804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xe400f900, 0xbe400e9a, 0x03a680f9, 0x803e700f, + 0x9c03e720, 0xe9103e40, 0x0f9203e4, 0x00f9003e, 0x400d9003, 0xe400f9a0, + 0x3e400f90, 0x03e600f9, 0x083e480f, 0x9003ea00, 0x60000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe000f81c, + 0x12154c80, 0x03e044f8, 0x40b2000f, 0x80a3e100, 0xf8003202, 0x0c8603e0, + 0x00f8003e, 0x001c8003, 0xe000f000, 0x32024300, 0x136100d8, 0x0032102c, + 0x84030a04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8, + 0x00ba002e, 0x800ba002, 0xe800be01, 0x2b800aa0, 0x02db00be, 0xd823b14b, + 0xe003b800, 0xbe903bb8, 0x0dea03e8, 0x00ba002f, 0x9408a002, 0xe800ba00, + 0x22800ba0, 0x032810ce, 0x4123a00d, 0xe0020a00, 0x40000000, 0x00000000, + 0x28054c00, 0xb3002cc0, 0x0b30028c, 0x00b3002c, 0xc00b3002, 0xcc00b380, + 0x20c209b0, 0x02ce20bb, 0xc128f603, 0xb8128d01, 0x3bc020f0, 0x083402cc, + 0x00b3002e, 0xe0083002, 0x4c00b300, 0xa0c00930, 0x262c008b, 0xc0a2c209, + 0xbc820a00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xdc00b702, 0x2bc00b79, 0x12dc04b7, 0x0021c01b, + 0x70869c00, 0xb7402de0, 0x097002dc, 0x00b7002d, 0xd0087002, 0xdc00b722, + 0x21400932, 0x021c8087, 0x40209009, 0x74022800, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7803de0, 0x0f78039e, 0x00f7803d, 0xe00f7803, 0xde00f780, + 0x21e00d72, 0x02da00bf, 0x8029e08f, 0x78279610, 0xf78433e0, 0x0c7803de, + 0x00f7802d, 0xe0287803, 0x5e00b3d0, 0x31a08d7c, 0x0b1ec2c2, 0x80b1a01d, + 0xf80b2a02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0xc007b003, 0xec00fa00, 0x3cc10eb0, 0x03e400f9, 0x001e400f, + 0xb013a800, 0x78013a80, 0x0f9003ac, 0x00fb003e, 0x400fb003, 0xec10db60, + 0x3e980fb6, 0x81adc8f9, 0x043e800f, 0xb003c206, 0x60000000, 0x00000000, + 0x4005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xbe00ffb0, + 0x33e00478, 0x033644ef, 0x8435200d, 0xf3033a40, 0xff9033ec, 0x86f9073e, + 0x40ff803f, 0x600bf903, 0xfe00ff80, 0xb3f40ff8, 0x433e00af, 0x903fa00c, + 0xf8030000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7012dc0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xdc00bd32, 0x09880d70, 0x0314008f, 0x6109c408, + 0x50029060, 0xbf3135c6, 0x0d70069c, 0x00b7002d, 0x400b7103, 0xdc00b700, + 0x21400b71, 0x021c0087, 0x382f000a, 0x51836a04, 0x60000000, 0x00000000, + 0x10009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b7002, 0x9c00b731, + 0x2b4088f1, 0x023c08a6, 0x00614009, 0x71421404, 0xb7006148, 0x187012dc, + 0x00b7002d, 0x400b7002, 0xdc00b700, 0x21808b70, 0x021c00b6, 0x002d8008, + 0xf0020000, 0x20000000, 0x00000000, 0x6014cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xcc00b800, 0x28200938, 0x20440080, 0x20285308, + 0x1c008100, 0x38c00420, 0x411c02cc, 0x00b3002c, 0x400b3002, 0x8c0833c2, + 0x20800bb0, 0x000e2091, 0x812c300a, 0x94804804, 0x30000000, 0x00000000, + 0x3815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xac00fb00, + 0x32c2887e, 0x012500eb, 0x6222500d, 0xbc632504, 0xfb4a32d0, 0x0ea083ec, + 0x00fb003e, 0xc00fb012, 0xec08ff60, 0xa2e00ff0, 0x0b1c00fb, 0x813e800c, + 0xac022a04, 0x60000000, 0x00000000, 0x8400ec00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0xc00fb003, 0xec00fb40, 0x26484fb0, 0x0ba120fa, 0x403ab00f, + 0xb103ed80, 0xfb003e58, 0x8fb483ac, 0x00fb003e, 0x400fb003, 0xec04fb20, + 0x3e444fb0, 0x03ac50eb, 0x003e9c0f, 0xa403e000, 0x30000000, 0x00000000, + 0x8010fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xfc00fd00, + 0x33801cf0, 0x832808ff, 0x0033400f, 0xd083f400, 0xff0833f0, 0x2ce003fc, + 0x00ff003f, 0x880ff003, 0xfc01ff00, 0x7f460ff0, 0x037c00ee, 0x0033000e, + 0xda010044, 0x30000000, 0x00000000, 0x80046c08, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0x6c00b8d2, 0x2a040db0, 0x022200b8, 0x10a2780b, + 0x9882ef20, 0xd8f02212, 0x0a9882ec, 0x00bb002e, 0x100fb002, 0xec00bb00, + 0x6e500bb0, 0x12ac0081, 0x0228200d, 0x94036040, 0x10000000, 0x00000000, + 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc00bb006, 0xec00ba00, + 0x20d008b0, 0x02270831, 0x0066200b, 0xb802e601, 0x98002080, 0x089802ec, + 0x00bb0026, 0x100bb002, 0xec00bb01, 0x2e820bb0, 0x062c02a9, 0x1822a02a, + 0xb082a000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xcc00b004, 0x200009b0, 0x020400b0, 0x0060800b, + 0x0002c400, 0x80042000, 0x081002cc, 0x0093002c, 0x000b3042, 0xcc009300, + 0x2c000b30, 0x02ac0081, 0x00280009, 0x0002c201, 0x00000000, 0x00000000, + 0x800d6c00, 0xfb043ec0, 0x0fb003ec, 0x00bb003e, 0xc00fb003, 0xec00f800, + 0xb20018b0, 0x032c08f8, 0x0036400f, 0x9013e408, 0x9800b000, 0x0c9043ec, + 0x00fb003e, 0x000fb003, 0xec00b702, 0x6e000f70, 0x031c02e9, 0x0332004e, + 0x90278003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff003, 0x7c00fc00, 0x3d010ff0, 0x0bf400bc, 0x007f400f, + 0x4003f400, 0x9c003f00, 0x4f5003fc, 0x00ff003f, 0x000ef003, 0xfc00ff00, + 0x3f000ff0, 0x01bc04fd, 0x003f000f, 0x50036806, 0x70000000, 0x00000000, + 0xc005fe00, 0xff803fe0, 0x0ff803f4, 0x00ffc433, 0x0c8d5003, 0x7200cc90, + 0x334d0dd2, 0x137012ff, 0x903f0e4d, 0x40033e00, 0xfc2133e4, 0x0df9033f, + 0x00cd0033, 0xe00ff803, 0xfe007f80, 0x3fe00cf8, 0x01f200cc, 0x803fe00f, + 0xf803f000, 0x70000000, 0x00000000, 0x8010ee00, 0xbb802ee0, 0x0bb802e7, + 0x00880022, 0x0d488c52, 0x2e04a300, 0x221c489d, 0x0221a283, 0x00361828, + 0x89028e00, 0xb8d0a008, 0x48321228, 0x00a8802a, 0xe00bb802, 0xee00bb80, + 0x2e6108b8, 0x42e20088, 0x802ee00b, 0xb802e006, 0x30000000, 0x00000000, + 0x0805cc00, 0xb3002cc0, 0x0b3002cc, 0x409b2528, 0x40191402, 0xcc00a322, + 0xac004900, 0x068100a3, 0x00280009, 0x00020c00, 0xa0002040, 0x09800204, + 0x80820028, 0xc00b3002, 0xcc00b304, 0x2e802830, 0x02c00080, 0x002cc00b, + 0x3002c201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec, + 0x80ab082c, 0x02089002, 0xa080a310, 0x2cd04aa8, 0x06ac0083, 0x00024009, + 0xb002ac00, 0xbb1022ca, 0x08b0020c, 0x11aa082a, 0xc00bb002, 0xec01bb00, + 0x6e4418b1, 0x02e21088, 0x842ec00b, 0xb002f000, 0x60000000, 0x00000000, + 0x4015ec00, 0xfb003ec0, 0x0fb003ec, 0x00d2803a, 0xe00d9413, 0xcc80eb48, + 0x3e602d98, 0x0ba148eb, 0x002a200d, 0x82032c00, 0xe8c032c0, 0x0d24032a, + 0x80c8443a, 0xc00fb003, 0xec00fb02, 0x3c488c98, 0x03e604c9, 0x803ec00f, + 0xb003d004, 0x70000000, 0x00000000, 0xe001bc00, 0xff003fc0, 0x0ff003de, + 0x10dfc033, 0xa40f7103, 0x6c00bc00, 0x33680d50, 0x031000ff, 0x033de52e, + 0xd103fc08, 0xf2003fe0, 0x0ff403fe, 0x40fc003f, 0xc00ff003, 0xfc00ff00, + 0x3f400fd8, 0x03f400fc, 0x003fc00f, 0xf003e800, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb803e, 0x400fb203, 0x2c4aeb70, + 0x32d20fb0, 0x0b2d22fb, 0x2032820c, 0xa003ae80, 0xd91032d0, 0x0fb1032c, + 0x40fa4032, 0xc00fb003, 0xec00fb01, 0x3a84cfb0, 0x03e108f9, 0x083ec00f, + 0xb003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb0026c0, 0x0bb002ec, + 0x003b012e, 0xb408b402, 0x2f408b42, 0x16d803b0, 0x022f008b, 0x4036c108, + 0x3d836c00, 0x8b00a2dd, 0x08b0036c, 0x00b20036, 0xc00bb002, 0xec00bb50, + 0x2e640bb0, 0x82c060b9, 0x042ec00b, 0xb002f200, 0x40000000, 0x00000000, + 0xe0054c00, 0xb3002cc0, 0x0b3002c4, 0x0031002c, 0x809a0802, 0x0c02a381, + 0x2c400b10, 0x024042a3, 0xd128048a, 0x00028d00, 0xb08122a0, 0x081c8247, + 0x20b12020, 0xc00b3002, 0xcc00b340, 0x28900b1a, 0x02c301b0, 0xd02cc00b, + 0x3002f000, 0x10000000, 0x00000000, 0x60011e00, 0xb78025e0, 0x0b7802d6, + 0x00b7d02d, 0xa4087992, 0x3e8287b0, 0x25e01bf8, 0x024e0087, 0x802ca088, + 0x68023e02, 0xa5c021e1, 0x0879065e, 0x00b18025, 0xe00b7802, 0xde00b781, + 0x2da00b78, 0x02da00b6, 0x802de00b, 0x7802d804, 0x10000000, 0x00000000, + 0x48080c00, 0xf3003cc0, 0x0f3002c4, 0x00f3003e, 0x460e340a, 0x0c00e036, + 0x2c400f00, 0x034100e3, 0x0428c04e, 0x10028c80, 0xf25030c0, 0x0c35034c, + 0x00f32030, 0xc00f3003, 0xcc00f300, 0x38800f11, 0x03c100f0, 0x003cc00f, + 0x3003d202, 0x10000000, 0x00000000, 0x401dbc00, 0xff0037c0, 0x0ff003fc, + 0x00ff001f, 0xc52ef003, 0xfc98ffb0, 0x3fc00f60, 0x03bc40ef, 0x0037c44f, + 0xf1037c02, 0xdf003fc0, 0x0ef123fc, 0x40ff013f, 0xc00ff003, 0xfc00ff00, + 0x3f800ff0, 0x43f800fc, 0x003fc00f, 0xf003d004, 0x60000000, 0x00000000, + 0xa805ec00, 0xfb003ec0, 0x0fb003e4, 0x00fb0036, 0xc00d9043, 0x0000cb00, + 0x32c00c30, 0x032c00db, 0x0032600c, 0xb003ec00, 0xfb013ec0, 0x0cb0132c, + 0x00c92032, 0xc00fb003, 0xec00fb00, 0x3c600c90, 0x01e400f9, 0x8036c00f, + 0xb003c200, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7002dc, + 0x10bf0021, 0xc0c87002, 0x1c00af00, 0xa1c00870, 0x435c008f, 0x0021c00a, + 0x7002dc00, 0xb7012dc0, 0x08f0423c, 0x00a10921, 0xc00b7002, 0xdc00b700, + 0x2d400850, 0x02d400b6, 0x0021c00b, 0x7002f206, 0x60000000, 0x00000000, + 0xc0009e00, 0xb7802de0, 0x0b7802d6, 0x00b78024, 0x70093802, 0x9f008782, + 0x29e018f8, 0x0a9e02b7, 0x80a9c028, 0x78869e00, 0xb7802de0, 0x0878021e, + 0x00868021, 0xe01b7802, 0xde00b780, 0x27a00858, 0x40d600bd, 0x8025e00b, + 0x7802c800, 0x00000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002ce, + 0x40b38020, 0xf048344a, 0x9200acca, 0x28e42831, 0x02ed03a3, 0x0068c00a, + 0x3482cc00, 0xb3082ed2, 0x28bc0a0f, 0x81a30020, 0xc00b3002, 0xcc01b300, + 0x6ccc0838, 0x02ce60b3, 0x2020c00b, 0x3002da00, 0x30000000, 0x00000000, + 0xe815a800, 0xfa003e80, 0x0fa003ea, 0x00fe0837, 0xb02de803, 0xa800ca20, + 0x3b904c6c, 0x033a22fa, 0x003bb20c, 0xec03e800, 0xfe883fb8, 0x4ce4831b, + 0x00ca40b2, 0x800fa003, 0xe800fa00, 0x37b00c28, 0x03fb00fe, 0x4036800f, + 0xa003fa05, 0x70000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0, + 0x00f8083e, 0x180f8101, 0x6180f840, 0x16002f80, 0x016080d8, 0x4004080f, + 0x0003e000, 0xf8003e00, 0x0f8203e0, 0x40f8083e, 0x000f8003, 0xe000f800, + 0x3e002f81, 0x03e110f8, 0x503e000f, 0x8003d200, 0x20000000, 0x00000000, + 0x0810e400, 0xf9003e40, 0x0f9003c4, 0x00c9403a, 0x500c1483, 0x0406c982, + 0x38522e90, 0x8ba640c9, 0x003e410c, 0x91232408, 0xf1403268, 0x0c9843a4, + 0x88cb103a, 0x400f9003, 0xe400f900, 0x3e400f9a, 0x03660079, 0x807e400f, + 0x9003c204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4, + 0x00894022, 0x70689602, 0x27608980, 0x22704890, 0x222700a9, 0xa2225008, + 0x90022540, 0xb9002270, 0x089c2225, 0x00810022, 0x400b9002, 0xe400b900, + 0x2e400b9c, 0x022460b9, 0x502e400b, 0x9002e000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00810828, 0x40089002, 0x34108d10, + 0x2e420a90, 0x40242081, 0x2022c80a, 0x90822511, 0xb900a243, 0x489542a5, + 0x0089002e, 0x400b9002, 0xe400b908, 0x2e420b94, 0x026400b9, 0x402e400b, + 0x9002ce00, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4, + 0x02811020, 0x44081002, 0x34008710, 0x24452890, 0x420440a1, 0x12a04428, + 0x10020400, 0xb1802044, 0x08110224, 0x42810024, 0x400b1002, 0xc400b100, + 0x2c400b10, 0x020400b1, 0x002c401b, 0x1002ca05, 0x00000000, 0x00000000, + 0x380d6000, 0xf8003e00, 0x0f8003e0, 0xa0c8403a, 0x9a0c8293, 0x2002cc41, + 0x3c1a2e82, 0x8301a2c8, 0x40389b0e, 0x82832000, 0xf8281010, 0x2c8403a1, + 0x00c8283e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x036000f8, 0x002e000f, + 0x8003ce03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003f4, + 0x00fd202f, 0x480fd00b, 0xe400f920, 0x3b480fd0, 0x63f490f9, 0x203f480d, + 0xd00be400, 0xfd003f48, 0x8fd213f4, 0x80f9043a, 0x400f9003, 0xe400f900, + 0x3f400fd0, 0x03f410f5, 0x043e400f, 0x9003e604, 0x70000000, 0x00000000, + 0x1805e400, 0xf9003e40, 0x0f9003e4, 0x00fd143f, 0x480fd283, 0x3400fd00, + 0xb3410c90, 0x033480dd, 0x00334c0c, 0xd0032400, 0xe9003340, 0x0cd00334, + 0x40cd003e, 0x400f9003, 0xe400f900, 0x1e408ed0, 0x031400cd, 0x003e400f, + 0x9003c601, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0, + 0x00b0002e, 0x8a0b8002, 0x2000b008, 0x22020a81, 0x4280a888, 0x24a20c4a, + 0x84030000, 0x8c10200b, 0x08a20a20, 0x8288412e, 0x000b8002, 0xe000b800, + 0x2f811b80, 0x02200088, 0x002e000b, 0x8002ce06, 0x30000000, 0x00000000, + 0x0805c400, 0xb1002c40, 0x0b100284, 0x40b1002c, 0x4c0b9022, 0x0c00b120, + 0x2c444990, 0x0684c091, 0x2820480a, 0x11027400, 0xa5042248, 0x28128204, + 0x80819024, 0x400b1002, 0xc400b500, 0x2d400a90, 0x02040081, 0x002c400b, + 0x1002d201, 0x60000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4, + 0x80b9002e, 0x400b9402, 0x2580b108, 0x26510b90, 0x06a48089, 0x0020500a, + 0x90821406, 0x8d10a242, 0x08110205, 0x0189102e, 0x400b9002, 0xe400b900, + 0x6f418b90, 0x0a248289, 0x282e400b, 0x9002c600, 0x20000000, 0x00000000, + 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9c83e, 0x500f9c03, 0x2510f900, + 0x3e402d9c, 0x832620d9, 0x00326024, 0x940b6400, 0xe9601260, 0x0c943127, + 0x08c98436, 0x400f9003, 0xe400f900, 0x3e508e18, 0x030520c9, 0x003e400f, + 0x9003e804, 0x70000000, 0x00000000, 0xa801a400, 0xf9003e40, 0x0f9003e4, + 0x00f9183e, 0x700f940b, 0xe600f944, 0x3a686e92, 0x40e402f9, 0x082e648f, + 0x9203e400, 0xf980be6a, 0x0f9083e7, 0x20f9803e, 0x400f9003, 0xe400f900, + 0x3e480f91, 0x03e600f9, 0x003e400f, 0x9003f200, 0x60000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x01f800b2, 0x182e8003, 0xe088f810, + 0x3a000c84, 0x032000c8, 0x003a000c, 0x01036000, 0xc048b210, 0x4e802321, + 0x02c800b2, 0x000f8003, 0xe000fc04, 0x1b100f80, 0x03e140d8, 0x003e000f, + 0x8003c204, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8, + 0x01be4823, 0xb0086b02, 0xf910bec1, 0x23940c20, 0x003904ae, 0x2023a008, + 0xe80b2900, 0x8a4021b0, 0x08ec0a3a, 0x008ee022, 0x800ba002, 0xe8009a00, + 0x2e801be8, 0x42f8008e, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000, + 0x28054c00, 0xb3002cc0, 0x0b30028c, 0x04b38020, 0xf00a3002, 0xcd0033a1, + 0x2ad08930, 0x126fc08b, 0xc028d82a, 0x3e0213c2, 0x848028f0, 0x0a3c0a8d, + 0x0093c824, 0xc0033002, 0xcc00b300, 0x28e10b30, 0x02cd2193, 0x002cc00b, + 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc, + 0x00b78021, 0xf0087002, 0xdc00b700, 0x20e208f0, 0x025c00a7, 0x0021d04a, + 0x30123c08, 0x874029c3, 0x0870829c, 0x20978025, 0xc00b7002, 0xdc009700, + 0x2dd00b70, 0x82f00184, 0x002dc00b, 0x7006e000, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7803de0, 0x0f78039e, 0x00b48030, 0xe00e7803, 0xde00f780, + 0x29c02d78, 0x0b5e09cf, 0x8038e08e, 0x78031e00, 0xc38099e0, 0x8ef823be, + 0x18d18035, 0xe00f7803, 0xde00f680, 0x39a10b48, 0x03d200d7, 0x803de00f, + 0x7803e202, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec, + 0x00f8003e, 0x4007b002, 0xec08ba00, 0x3e810f30, 0x01a800fb, 0x013e000d, + 0xb003ac10, 0xfb003640, 0x0f80036c, 0x00e9003a, 0xc00fb003, 0xec00fa00, + 0x3e980f80, 0x03e000fb, 0x003ec00f, 0xb003c206, 0x60000000, 0x00000000, + 0x0005fe00, 0xff803fe0, 0x0ff803fe, 0x00f78033, 0xe00f7803, 0x3e00ffb0, + 0x31e40cf8, 0x037e00cf, 0x8033ec0d, 0xf2037e00, 0xcf8133e0, 0x0c78233a, + 0x00ce8033, 0xe00ff803, 0xfe00ff80, 0x337007d8, 0x03fe00f7, 0x8033e00f, + 0xf803c000, 0x20000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002dc, + 0x40b600a1, 0x840b7402, 0x1c00bf3c, 0x294e8e71, 0x029c64ae, 0x00a3c428, + 0x51039402, 0x84042380, 0x08740a1c, 0x028714b5, 0xc00b7002, 0xdc00f700, + 0x35460b70, 0x02d800b4, 0x0035c00b, 0x7002ea06, 0x20000000, 0x00000000, + 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00be1821, 0xc00b710a, 0x1c00b531, + 0x2bc01970, 0x02440085, 0x0021c809, 0x20023840, 0x979021c6, 0x08f00230, + 0x40b60021, 0xc00b7002, 0xdc00ba00, 0x21000b40, 0x025420b7, 0x0825c00b, + 0x7002c000, 0x20000000, 0x00000000, 0x2014cc00, 0xb3002cc0, 0x0b3002cc, + 0x00ba0022, 0x200b0a02, 0x016cb800, 0x28084a38, 0x428282a0, 0x02220909, + 0x00228c00, 0x93912022, 0x08014207, 0x50b30c20, 0xc00b3002, 0xcc00a200, + 0x64120b00, 0x02c200b3, 0xc024c00b, 0x3002c800, 0x20000000, 0x00000000, + 0xa815ac00, 0xfb003ec0, 0x0fb003ec, 0x80fb8032, 0xd00fbe03, 0x2d00fb40, + 0x3ad00d38, 0x036f00cb, 0x0222d00d, 0xbd8b2c00, 0xdbc0b2e0, 0x0cb00326, + 0x00fb0022, 0xc00fb003, 0xec00bb00, 0x22f00f88, 0x836e00fb, 0xc036c00f, + 0xb003ea04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0fb003ec, + 0x00f9083e, 0xdc0fb403, 0xec00f921, 0x0ec00fb1, 0x03e400f9, 0x423ec40e, + 0xa003a800, 0xeb607ec0, 0x0fb0b3ec, 0x808b003e, 0xc00fb003, 0xec00fb00, + 0x3ec00f94, 0x03e500fa, 0x203ec00f, 0xb003e000, 0x30000000, 0x00000000, + 0x0110fc00, 0xff003fc0, 0x0ff003fc, 0x00fd0033, 0x808cf003, 0xde50cf84, + 0x33490cb0, 0x035f00ce, 0xa03fc44c, 0x58037706, 0xc8403f81, 0x4cf10330, + 0x00ff047f, 0xc00ff003, 0xfc00fe00, 0x3f801fc0, 0x03f840ff, 0x0033c00b, + 0xf003c844, 0x30000000, 0x00000000, 0x81046c00, 0xbb002ec0, 0x0bb002ec, + 0x00b99022, 0x3408b122, 0xe6048818, 0xa23808b0, 0x02220088, 0x063e0008, + 0x8c822e00, 0xabe02c02, 0x088c0228, 0x00bb002e, 0xc00bb002, 0xec00ba00, + 0x2e811b8c, 0x83a320b3, 0x802ac00b, 0xb002e840, 0x10000000, 0x00000000, + 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb4022, 0x4208b002, 0xec008a00, + 0x208008b0, 0x0269008b, 0x402a0208, 0xb1020c01, 0x8b002a48, 0x0a004aa2, + 0x30bb802e, 0xc00bb002, 0xec00bb00, 0x2a404b88, 0x22ec00bb, 0x1022c00b, + 0xb002e000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc, + 0x00b00020, 0x00080002, 0xee068000, 0x200008b0, 0x02000080, 0x002c0008, + 0x00022e04, 0xa3002e00, 0x0800020c, 0x01b3802c, 0xc0093002, 0xcc009300, + 0x24400b10, 0x028c01b2, 0x0068c00b, 0x3002c205, 0x00000000, 0x00000000, + 0x000d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fb00b2, 0x002cb002, 0xe810c801, + 0x32002cb0, 0x036000c8, 0x003a004c, 0x800b0c00, 0xcb003e00, 0x0c802320, + 0x00fb002e, 0xc00fb003, 0xec00fa00, 0x3a000b80, 0x03ec00fb, 0x0032c00f, + 0xb003c003, 0x00000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc, + 0x00fc003f, 0x0007f002, 0xfc083c00, 0x1f000ff0, 0x03f000dc, 0x023b002f, + 0xc007b000, 0xfc003f00, 0x2fc003d0, 0x00f7003f, 0xc00ff003, 0xfc00fe00, + 0x3f000fc0, 0x23fc00ff, 0x003fc00f, 0xf003e805, 0x70000000, 0x00000000, + 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xf1807d92, + 0x3f080dc6, 0x123108fd, 0x0033600e, 0xc0135600, 0xc4903308, 0x0cf9033e, + 0x00ff803f, 0xe00fc003, 0x3e00ff80, 0x3f0803c2, 0x033d00dc, 0x3037080c, + 0xc4c37000, 0x70000000, 0x00000000, 0x8010ee00, 0xbb802ee0, 0x0bb802ee, + 0x00bb802e, 0xe00bb802, 0xe000b920, 0x221ec885, 0x02214089, 0xc22a2002, + 0x88122604, 0x8b202234, 0x0a3212ae, 0x00bb802e, 0xe00b8816, 0xac10bb00, + 0x2e304b04, 0x0a3d848a, 0x62221f48, 0x84022004, 0x30000000, 0x00000000, + 0x0805cc00, 0xb3002cc0, 0x0a3002cc, 0x00b3002c, 0xc00a3012, 0xc0c03321, + 0xa0008902, 0x02408091, 0x102e4008, 0x01020800, 0x83006000, 0x4230228c, + 0x00b3002c, 0xc00b0002, 0x0c00b300, 0x28040b03, 0xa20c4090, 0x102c002a, + 0x02024201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0xe840b180, 0x22c008b2, 0x064c818b, 0x102e220a, + 0xa1022a00, 0x8b002240, 0x08b002ac, 0x00bb002e, 0xc00b9802, 0xac00bb00, + 0x2e440b80, 0x062c008a, 0x0228c20a, 0xb0023004, 0x60000000, 0x00000000, + 0x0015ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00eb003, 0xe100f8e2, + 0x32200d88, 0x936300d9, 0x843cf10c, 0x8c0b2720, 0xc8003200, 0x0cb003ac, + 0x04bb003e, 0xc00b9802, 0x2c00fb01, 0x3e208f94, 0x0b2c10d8, 0x523e114e, + 0x88835004, 0x70000000, 0x00000000, 0xe001bc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff003, 0xfc04fc01, 0x37a90f48, 0x0bba0ad1, 0x803b400f, + 0x9803f400, 0xff083cb0, 0x2ff003fc, 0x00df0027, 0xc00f1013, 0xfc04df00, + 0x3ea00fd2, 0x23fc00fc, 0x8037f005, 0xe911f800, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0x6502eb22, + 0x32404cb5, 0x8ba580db, 0x08b2c40f, 0x300b2020, 0xcb0032d0, 0x8cb1432c, + 0x00fb0036, 0xc00f9003, 0x2c00fb00, 0x3ad02c34, 0x432c22c9, 0x48b2180c, + 0x1003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc18bb002, 0xee30a948, 0x36c40ab8, 0x23ac00fb, 0x44227003, + 0xb5120524, 0xdb0032c0, 0x0fbc022c, 0x00bb002e, 0xc00b9482, 0x2d61bb59, + 0x22f408b9, 0x823d0089, 0x2022f005, 0xb8023200, 0x40000000, 0x00000000, + 0xe0054c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xc030a180, + 0x22000804, 0x1a434081, 0x4020780b, 0x00020700, 0x98002c00, 0x08bc820c, + 0x00b30024, 0xc00b0612, 0x0e00b300, 0x28344824, 0x4a6c0089, 0x44a00009, + 0x088ab800, 0x50000000, 0x00000000, 0x60011e00, 0xb7802de0, 0x0b7802de, + 0x00b7802d, 0xe00b7802, 0xc600a580, 0x24660a39, 0x028600b7, 0x8021209b, + 0x78023600, 0x9f8829e0, 0x0b7a021e, 0x00b7802d, 0xe00b4802, 0x1e00b780, + 0x21e0086b, 0x024e0483, 0x90202289, 0x58021800, 0x40000000, 0x00000000, + 0x48080c00, 0xf3003cc0, 0x0f3002cc, 0x00f3002c, 0xc00b3003, 0xcd80eb00, + 0x30800800, 0x02c80081, 0x0030440f, 0x16830cc0, 0xd3003c84, 0x8c300b0c, + 0x00f30034, 0xc00f000b, 0x0c00bb10, 0x38980c12, 0x134ca2c1, 0x4030c00d, + 0xa0839202, 0x00000000, 0x00000000, 0x401dbc01, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff013, 0xfc00fd12, 0x3fc00ff0, 0x03fc00ff, 0x003fc10f, + 0xf001fc48, 0x7f0217c0, 0x0bf203fc, 0x00ff003f, 0xc00ff003, 0xfc00ff04, + 0x3fc04fd2, 0x43bc00ff, 0x013fc44f, 0xf11f9006, 0x60000000, 0x00000000, + 0xa805ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xe800c800, + 0x12c06cb0, 0x012c03db, 0x003ec00f, 0x20136400, 0x3800b240, 0x0fb0032c, + 0x00fb003e, 0xc00fb003, 0xec007b00, 0x3c400ca0, 0x032d20ca, 0x01b6c10d, + 0xb0132a00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xcc008700, 0x03c00870, 0x237c0287, 0x002d000b, + 0x70021c00, 0xbf0021c0, 0x0bf0035c, 0x00b7002d, 0xc10b7002, 0xdc00b702, + 0x2dc04860, 0x021c9086, 0x0028c108, 0x70023204, 0x60000000, 0x00000000, + 0xc0009e00, 0xb78029e0, 0x0b7802de, 0x00a7846d, 0xe00b7802, 0xde049680, + 0x01e2093c, 0x029e0097, 0x802de00b, 0x78c6d200, 0xb78021f0, 0x4a78061e, + 0x00b7802d, 0xe00b7802, 0xde00b780, 0x2df00838, 0x224e40a7, 0xc025e119, + 0x3c023000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc10b3002, 0xcc2093c0, 0x00c808b8, 0x72ec2003, 0x002ce00b, + 0x30020e40, 0xb30120d8, 0x4b30024c, 0x00b3002c, 0xc00b3402, 0xec043b00, + 0x2cd008b1, 0x024c05a3, 0xc028c198, 0x32021204, 0x30000000, 0x00000000, + 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800fa003, 0xf802de87, + 0xb3a00de0, 0x07b810da, 0x002fbc4f, 0xe003fa40, 0xf60033b0, 0x0fa00328, + 0x00fa002e, 0x800fe082, 0xe8007a00, 0x2f942ced, 0x036802ee, 0xc037802d, + 0xe80b3a04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0, + 0x00f8003e, 0x000f8003, 0xe150e870, 0x3e100f80, 0x0b6040e8, 0x103e000f, + 0x8410e000, 0xf8403c00, 0x0f8403e0, 0x00f8003e, 0x010f8483, 0xe000f800, + 0x3e000f84, 0x0ba10058, 0x203e200f, 0x0403d200, 0x30000000, 0x00000000, + 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe600e9c0, + 0x38600e90, 0x83a400c9, 0xa03e500f, 0x18a32510, 0xf9803240, 0x0c902324, + 0x00f9003e, 0x400f9003, 0xe400c920, 0x30640e94, 0x132680c9, 0x0030400c, + 0x9a030204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x400b9022, 0xe5c08904, 0x6a410a9d, 0x122760a9, 0xa02e700b, + 0x98032400, 0xb9c83640, 0x089c0aa4, 0x00b9002e, 0x400b9c82, 0xe503a980, + 0xa2500890, 0x0a260489, 0xc122414d, 0x9c0a2000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002a, 0x400b9002, 0xc400a100, + 0x2ec48a94, 0x02ac1489, 0x002e421b, 0x91422400, 0xb91022c0, 0x08110224, + 0x00b9002e, 0x400b9202, 0xe4608900, 0x22400ab4, 0x02042081, 0x28224008, + 0x90020600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4, + 0x00b1002c, 0x400b1002, 0xc4408310, 0x2c440a11, 0x220444a1, 0x042c400b, + 0x10020400, 0xb9102440, 0x08110284, 0x00b1002c, 0x400b1002, 0xc4408110, + 0x20400811, 0x02044281, 0x10204489, 0x11020201, 0x00000000, 0x00000000, + 0xb80d6000, 0xf8003e00, 0x0f8003e0, 0x00f8003a, 0x000f8003, 0xe1a0e040, + 0x2e9a0e86, 0x82a1a0c8, 0x287e004f, 0xa2a32800, 0xf840320a, 0x2ca40320, + 0x00f8047e, 0x000f8283, 0xe1008840, 0x328a0e86, 0x8321a0c0, 0x68b21a2c, + 0xa6830e03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9013, 0xf484fd24, 0x3bc82ff2, 0x0bf480fd, 0x003f404f, + 0xd00bbc00, 0xfd203f40, 0x4f9203e4, 0x00f9003e, 0x410fd003, 0xe480f924, + 0x3f408bd2, 0x03e480fd, 0x203f490f, 0xd243e606, 0x70000000, 0x00000000, + 0x9805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xf4c2cd00, + 0x374025d1, 0x037480dd, 0x2873400f, 0xd0033400, 0xfd102248, 0x0cd00324, + 0x00f9003e, 0x400fd023, 0xf400fd00, 0x3f480dd0, 0x033400cd, 0x1033c80d, + 0xd2834600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0, + 0x00b8002e, 0x000b8002, 0xe8c0da08, 0x22020d81, 0x0b60a0d8, 0x002a801c, + 0x84016001, 0xb2006200, 0x8a020220, 0x00b8002e, 0x000b8102, 0xe0a0b820, + 0x2e040884, 0xa28020a8, 0x10a28a08, 0x02020e04, 0x30000000, 0x00000000, + 0x0805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0xc4828920, + 0x24440910, 0x42c4c091, 0x0064404b, 0x11068408, 0xb100a044, 0x48128e04, + 0x00b1002c, 0x400b1002, 0xc480b128, 0x2c400933, 0x028444a1, 0x01a84c29, + 0x12824201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4, + 0x00b9006e, 0x400b9012, 0xc4489b00, 0x20c40910, 0x02e42099, 0x002e4048, + 0xb606e480, 0xb1042240, 0x0ab00224, 0x00b90026, 0x40cb9892, 0xe400b900, + 0x2e400890, 0x9aa400a9, 0x082a4008, 0x94020604, 0x60000000, 0x00000000, + 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x410f9003, 0xe600c110, + 0x36500d90, 0x03e600d9, 0x0426700b, 0x9c23a510, 0xb9c02262, 0x0c904324, + 0x00f9003e, 0x400f9803, 0xe400f900, 0x3e6c0d94, 0x0ba404e9, 0x003a600d, + 0x9c036804, 0x70000000, 0x00000000, 0xa801a400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xe600f980, 0x3e622f99, 0x034442f1, 0x483a480c, + 0x10826408, 0xf9203e48, 0x0f9003e4, 0x00f9003e, 0x408f9003, 0xe400f908, + 0x3e400f19, 0x034430f9, 0x0c34700f, 0x1903ea00, 0x60000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe002c84c, + 0x3e110e80, 0xa36180c8, 0x003e018c, 0x8043e140, 0xf840b010, 0x0f808320, + 0x00f8003e, 0x000f8013, 0xe0840800, 0x3c100c82, 0x13e00068, 0x40b2000d, + 0x83038a04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8, + 0x00ba002e, 0x800ba002, 0xfb418e80, 0x2fa848e4, 0x023a088e, 0x0023840d, + 0xe4113a00, 0xbe1a3680, 0x09e00a28, 0x00ba002e, 0x804be402, 0xf900ae60, + 0x2fa408e4, 0x013a000e, 0xc003a00a, 0xe84a0a00, 0x40000000, 0x00000000, + 0x28054c00, 0xb3002cc0, 0x0b30028c, 0x00b3002c, 0xc00b3002, 0xcf0483c0, + 0x2cd00a38, 0x020c4283, 0x4028d108, 0x3c0a0e80, 0xb30020c0, 0x0bbd024c, + 0x00b3002c, 0xc00b3c82, 0xcc408380, 0x2ce10830, 0x088f00ab, 0x8024e228, + 0x38028a00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xcc208708, 0x2dc00874, 0x021c0087, 0x0021e209, + 0x74021800, 0xb70025c0, 0x0970025c, 0x00b7002d, 0xc10b6082, 0xdc008700, + 0x2dc20870, 0x021c2487, 0x0925c20a, 0x70522800, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7803de0, 0x0f78039e, 0x00f7803d, 0xe00f7803, 0xde008780, + 0x2ce00ef8, 0x0a0e00c7, 0x8139a10c, 0x38031600, 0xf78231e0, 0x0f78035e, + 0x00f7802d, 0xe00f7803, 0xfc00c780, 0x3ce02cf8, 0x239e10e3, 0x8134e01c, + 0x7803aa02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0xc10fb003, 0xe810fa00, 0x3e0007b0, 0x09ac00f3, 0x0038010f, + 0xb013ac00, 0xf8003ec0, 0x09a003ac, 0x00fb003e, 0xc00fa003, 0xe000f900, + 0x2e808fb0, 0x03a400f9, 0x043ac08c, 0xb003c202, 0x60000000, 0x00000000, + 0x4005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xfe00df80, + 0x33e40cf8, 0x437e44cf, 0x8033600f, 0xf103be40, 0xbf8033e0, 0x4cf8233e, + 0x00ef803f, 0xe00ff803, 0xfe00cf80, 0x33600cf8, 0x037e04cf, 0x8433600c, + 0xf9430000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xf400df10, 0x23cd0c60, 0x0294c086, 0x5235000f, + 0x72035060, 0xb72121c0, 0x0ff0021c, 0x00b7002d, 0xc40e6002, 0xf080ac00, + 0x3dc00f72, 0x0a3c0086, 0x00218008, 0x47022a04, 0x60000000, 0x00000000, + 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b7102, 0xdc409500, + 0x21c0a950, 0x02180a87, 0x0021c60b, 0x21069408, 0xb70224c0, 0x0951021c, + 0x00b7002d, 0xc00b5002, 0xdc01a700, 0x21000840, 0x06584087, 0x10214408, + 0x30020000, 0x20000000, 0x00000000, 0x6014cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xc24018c1, 0x0034080c, 0x02834002, 0x80243013, + 0x0c02c421, 0xb84024c2, 0x0900020c, 0x00b3002c, 0xc00a3602, 0xc000a000, + 0x28844a00, 0x06001480, 0x94228408, 0x04020804, 0x30000000, 0x00000000, + 0x2815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb023, 0xef02db20, + 0x92e009b0, 0x826f044b, 0xa232658f, 0xb403a700, 0xfb0036c0, 0x0db0032c, + 0x00eb003e, 0xc00fbc02, 0xe400e900, 0x22c008b0, 0x236c028b, 0x00b2902c, + 0xbf4a2a04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0xc00fb003, 0xed84f945, 0x3cd28f90, 0x03a880fb, 0x033e400a, + 0xa7136d08, 0xfbc83ac4, 0x0f9403ec, 0x00fb003e, 0xc00fbc03, 0xe408f800, + 0x3ed00f00, 0x03e800fb, 0x013e182f, 0xb013e000, 0x30000000, 0x00000000, + 0x8010fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ff043, 0xd400ffa8, + 0x33c00c61, 0x832400c8, 0x8033c00f, 0x70037400, 0xff0031c0, 0x08f903fc, + 0x10ff003f, 0xc00f5803, 0xb400fd00, 0x3eea4cf2, 0x137e40f2, 0x0033800c, + 0xc8030044, 0x30000000, 0x00000000, 0x81046c00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc04bb012, 0xe30088c1, 0x2a304884, 0x036380a0, 0xc236720b, + 0xbc022f20, 0xb8c02ac0, 0x088c026c, 0x00fb002e, 0xc00b9802, 0xa200b880, + 0x38d80a80, 0x026208b8, 0x40222428, 0x8502a040, 0x10000000, 0x00000000, + 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc00bb002, 0xe8a0ba00, + 0x220808b0, 0x820c808b, 0x2022610b, 0x98006200, 0xb82822c0, 0x0aa002ec, + 0x00bb0026, 0xc00bb602, 0x2600b988, 0x2e4008b4, 0x02a420b9, 0x50225008, + 0x30022000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc10b3002, 0xc0058000, 0x28006800, 0x424000a2, 0x02244009, + 0x20224000, 0xb00028c0, 0x180002cc, 0x00b3002c, 0xc00b3002, 0x8000b004, + 0x2cc00a00, 0x020000b0, 0x00a00088, 0x00128201, 0x00000000, 0x00000000, + 0x800d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fb002e, 0xc00fb022, 0xe004f800, + 0xb2001c00, 0x072008c8, 0x0232c00b, 0x80036400, 0xf00032c0, 0x0e8002ec, + 0x00fb003e, 0xc00f9003, 0x2400f900, 0x3e800c00, 0x03e008f8, 0x0430402c, + 0x80030003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc08ff003, 0xf000bc00, 0x3f010fc0, 0x07f0007c, 0x003f400f, + 0xc0033400, 0xfc003fc0, 0x0dc0237c, 0x00ef003f, 0xc00fd003, 0xf000fc00, + 0x3b801fc0, 0x0bf010fc, 0x003f004f, 0xc003e806, 0x70000000, 0x00000000, + 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff903, 0x70089c10, + 0x33080dc9, 0x237200fc, 0x2d37080c, 0xc1037060, 0xff803d48, 0x0cf9033e, + 0x42cf8033, 0xe00ff803, 0xfe00ff80, 0x3f210f58, 0x03f600ff, 0x803fe00e, + 0xf803f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb802ee, + 0x009b802e, 0xe00b3202, 0x23408812, 0x2a9a08b2, 0x022e00b0, 0xc0322408, + 0x81420184, 0x8b802e74, 0x0ab2022c, 0x808300a2, 0xe00bb802, 0xee00bb80, + 0x2e200b98, 0x22e200bb, 0x802ee00b, 0xb802e006, 0x30000000, 0x00000000, + 0xc805cc00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc08b2222, 0xc0068a22, + 0x20180932, 0x02cc00b2, 0x00240009, 0x00024800, 0xa3002cc0, 0x0830022c, + 0x10830020, 0xc00b3002, 0xcc00b300, 0x2c001b20, 0x02c400b3, 0x002cc00a, + 0x3002c201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc08bb182, 0xa8008b84, 0x2aa00834, 0x22ec00ba, 0x002ec028, + 0x11022a00, 0x0b042e44, 0x0a30082c, 0x00830022, 0xc00bb002, 0xec00bb00, + 0x6e020bbc, 0x02e620bb, 0x042ec00b, 0xb002f000, 0x60000000, 0x00000000, + 0x4015ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00f8813, 0xe290d8c0, + 0x32200db8, 0x23ec60f9, 0xc0b6000d, 0x88036280, 0xeb003ee0, 0x0cb00300, + 0x80cb0032, 0xc01fb003, 0xec00fb00, 0x3e24cf9c, 0x02e710fb, 0x003ec00e, + 0xb003c004, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff003fc, + 0x00df003f, 0xc08ff803, 0x5f20fc00, 0x3d000f89, 0x033200fc, 0xc030d20f, + 0xb803f020, 0xff003d60, 0x0ff01bfd, 0x08ff013f, 0xc00ff003, 0xfc00ff00, + 0x3f000ff0, 0x03f000ff, 0x003fc00f, 0xf003e900, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb803, 0xa410c840, + 0x3e000eb6, 0x032c84d3, 0x48f6000d, 0xa40b2002, 0xdb003ee0, 0x2cb0032c, + 0x00cb0832, 0xc00fb003, 0xec00fb00, 0x3ad00fa4, 0x03a500eb, 0x043ec00f, + 0xb003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb0026c0, 0x0bb002ec, + 0x00bb012e, 0xc04bbc02, 0x2f008220, 0x2e8208b6, 0x036d003b, 0x003af248, + 0xb8836b80, 0x8b022e54, 0x08b0036f, 0x408b4022, 0xc00bb002, 0xec00bbb0, + 0x2ec30bb2, 0x0227008b, 0x042ec00e, 0xb002f200, 0x40000000, 0x00000000, + 0xe0054c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc0099240, 0x81518248, + 0x2c808a30, 0x020c01b1, 0xc2201008, 0x008a2812, 0xa3002c50, 0x08300283, + 0x00834020, 0xc00b3002, 0xcc00b380, 0x28c80b20, 0x028281a3, 0x002cc00b, + 0x3002f000, 0x10000000, 0x00000000, 0xe0011e00, 0xb78025e0, 0x0b7802de, + 0x00b7802d, 0xe00b7802, 0x064086a0, 0x2de008fa, 0x025e00bc, 0x80292048, + 0x68025e01, 0xa7802d60, 0x887838fe, 0x20878021, 0xe00b7802, 0xde00b780, + 0x2de00be8, 0x061a0087, 0x802de00b, 0x7802d800, 0x10000000, 0x00000000, + 0x48080c00, 0xf3003cc0, 0x0f3003cc, 0x00f3102c, 0xc40d3302, 0x8c05c300, + 0x2ec00e00, 0x030020f3, 0x1820c02c, 0x360b0800, 0xe3003cc0, 0x0cb0038c, + 0x00c30030, 0xc00f3003, 0xcc00b300, 0x38c00f20, 0x038020e3, 0x003cc00f, + 0x3003d202, 0x10000000, 0x00000000, 0x401dbc00, 0xff0037c0, 0x0ff003fc, + 0x00ff043f, 0xc007f113, 0xfc04ff26, 0x3fc00ff2, 0x03fe00ff, 0x023fc40e, + 0xf003f800, 0xdf103fc0, 0x0ff0035c, 0x00ff003f, 0xc00ff003, 0xfc00ff00, + 0x3fe00ff0, 0x03d840ff, 0x003fc00e, 0xf003d006, 0x60000000, 0x00000000, + 0xa805ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xe800d800, + 0x32000fb8, 0x032c00fb, 0x213ae08d, 0x900b0400, 0xeb003ec0, 0x0fb04b2c, + 0x00cb0032, 0xc00fb003, 0xec00fb00, 0x3e0a8390, 0x03e400fb, 0x003ec00f, + 0xb003c200, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7002dc, + 0x00b70039, 0xc00b7002, 0xdc008604, 0x21408b70, 0x021c0896, 0x0c38c008, + 0x70021c00, 0x87012dc0, 0x0b70023c, 0x00a700a1, 0xc00b7002, 0xdc00b700, + 0x2d000b70, 0x02d000b7, 0x002dc00b, 0x7002f206, 0x60000000, 0x00000000, + 0x80009e00, 0xb7802de0, 0x0b7802de, 0x00b7802d, 0xe00b7802, 0xde089580, + 0x29a10b70, 0x021e00b7, 0x8029e009, 0x7c023600, 0xa7802de0, 0x0b78025e, + 0x00878021, 0xe00b7802, 0xde00b780, 0x2de00b68, 0x02d600b7, 0x802de00b, + 0x7802c840, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b3712, 0xce1083b0, 0x28d00bcc, 0x02110093, 0x002cec08, + 0xbc020e00, 0x83002ce1, 0x0bb0426f, 0x20ab0420, 0xc00b3002, 0xcc00b300, + 0x6cf41b31, 0x02cd0033, 0x042cc00b, 0x3002da00, 0x30000000, 0x00000000, + 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800fe803, 0xf8c8de00, + 0xbbb20fa6, 0x1b2a20fa, 0xca3b810d, 0xe50b3b28, 0xaa003ea8, 0x0fa0037b, + 0x80ca0032, 0x800fa003, 0xe800fa00, 0x3c800fec, 0x03f800fa, 0x003e800f, + 0xa003fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0, + 0x00f8013a, 0x000f8003, 0xc000f800, 0x16020784, 0x83e08070, 0x483a000f, + 0x8423e122, 0xf8003e10, 0x0f8003a0, 0x00f8003e, 0x000f8003, 0xe000f804, + 0x3e020f80, 0x03e1c4f8, 0x003e000f, 0x8003d200, 0x70000000, 0x00000000, + 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9a43, 0xe500e1c0, + 0x3a600f98, 0x032600fb, 0x4032404d, 0x99038640, 0xc9023c44, 0x0c900127, + 0x02c9803a, 0x400f9003, 0xe400f900, 0x3ec00e92, 0x832511f9, 0x003e400f, + 0x9003c204, 0x20000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x400b9402, 0xe5208940, 0x22600b9c, 0x02a610b9, 0x4a22508b, + 0x9e1a2480, 0xd9002e73, 0x08900227, 0x008940a2, 0x400b9002, 0xe400b9d0, + 0x2e789810, 0x022680b9, 0x002e400b, 0x9002e001, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9402, 0xe400ab00, + 0x2ec80bd1, 0x023440bb, 0x0022d80b, 0x9002a402, 0x89002e40, 0x08900aa5, + 0x0089102e, 0x400b9002, 0xe400b940, 0x2e440a90, 0x8a2400b9, 0x002e400b, + 0x9002ce00, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4, + 0x00b1002c, 0x400b1142, 0xc40c8110, 0xa4450b51, 0x029614b1, 0x03a0400b, + 0x11120440, 0x91002c40, 0x28110684, 0x40831024, 0x400b1002, 0xc400b100, + 0x2c400810, 0x020400b1, 0x002c400b, 0x1002ca04, 0x00000000, 0x00000000, + 0x380d6000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8403, 0xe0a0e268, + 0x3e1a0b24, 0x033000f8, 0x28320b0f, 0x0683a1a1, 0xc8013e0a, 0x0c8403a1, + 0x02c0403e, 0x000f8003, 0xe000f800, 0x3e000a80, 0x232000b8, 0x003e000f, + 0x8003ee03, 0x10000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x404fd203, 0xdc08fd20, 0x2b690f92, 0x43e410f9, 0x003f400f, + 0xd203f484, 0xf9003f40, 0x0f120374, 0x90f9203a, 0x400f9003, 0xe400f900, + 0x3e400fd0, 0x03f410f9, 0x003e400f, 0x9003e605, 0x70000000, 0x00000000, + 0x1805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f5003, 0x7480dd01, + 0x37408dd1, 0x031400f9, 0x2932490c, 0xd0033402, 0xc9053f49, 0x4c905334, + 0x52cd0032, 0x400f9003, 0xe4007d00, 0x1f40cfd0, 0x033400f9, 0x003e400f, + 0x9023e600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0, + 0x00b8002e, 0x000b8208, 0x20408a48, 0x228008a0, 0x022000b0, 0x00838408, + 0x84828020, 0x88002e00, 0x080242a0, 0x82880022, 0x000b8002, 0xe000b802, + 0x2e008ba0, 0x022800b8, 0x002e000b, 0x8002ce06, 0x30000000, 0x00000000, + 0x4805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x408b12a2, 0x04089130, + 0x66441910, 0x028401bd, 0x80214008, 0x13020440, 0x81002c44, 0x0a128204, + 0x80810020, 0x404b1002, 0xc4009101, 0x24404b10, 0x220400b1, 0x022c400b, + 0x1002d200, 0x20000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x400b3022, 0x24449324, 0x62400830, 0x02ac10b5, 0x20234408, + 0x9012a500, 0x89002e48, 0x0a104285, 0x80810022, 0x400b9002, 0xe400b900, + 0x2ed90b90, 0x28240039, 0x002e400b, 0x9002c600, 0x20000000, 0x00000000, + 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9883, 0x2602d902, + 0x36604d90, 0x03a580f9, 0x00b2500c, 0x92032409, 0xc9013e40, 0x2e900324, + 0x00cd0032, 0x409f9003, 0xe400d900, 0x36400f9c, 0x032540f9, 0x002e400f, + 0x9003e804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003e4, + 0x00f9013e, 0x400f9203, 0xe600e900, 0xbe480f94, 0x0b6440f9, 0x003e40ef, + 0x9403e502, 0xf9003e42, 0x0d9003e6, 0x00f901be, 0x401f9003, 0xe400f908, + 0x3e400f9a, 0x03e600f9, 0x003e410f, 0x9003f200, 0x60000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8483, 0x0080f841, + 0x3e008e86, 0x032040c8, 0x08301c2c, 0x83036008, 0xc8023e00, 0x0f800321, + 0x20f8003e, 0x000f8003, 0xe000f800, 0x3e004f84, 0x03e108f8, 0x003e000f, + 0x8003c204, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8, + 0x00ba012e, 0x805bec02, 0x3824be41, 0xa0800de4, 0x023b005a, 0x20228008, + 0xe4033b02, 0x8a002d80, 0x03e00238, 0x00be002e, 0x800ea002, 0xe800be40, + 0x2f920b60, 0x02fb00ba, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000, + 0x28054c00, 0xb3002cc0, 0x0b30028c, 0x00b3002c, 0xc00b3402, 0x0e00b3e0, + 0x28c02a3c, 0x0a0f2094, 0x81211088, 0xb0022cc0, 0xa3022cc0, 0x8b30220c, + 0x40b3902c, 0xc00b3002, 0xcc00b310, 0x2ce80b32, 0x42cf80b3, 0x002cc00b, + 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0xc00bd402, 0x1c00b740, 0x23400974, 0x021e009f, 0x0221c008, + 0x70021c00, 0xa7002dd1, 0x0b72001c, 0x00b7202d, 0xc00a7002, 0xdc00b500, + 0x2dc00b50, 0x02d420b7, 0x002dc00b, 0x7002e004, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7803de0, 0x0f78039e, 0x00b7803d, 0xe00b780b, 0x1e00ff80, + 0xa9e00ef8, 0x0b1e00d7, 0x80b0e04c, 0xf80b1e00, 0xa7803de0, 0x0f7b091e, + 0x00f7803d, 0xe00f7803, 0xde00f680, 0x3de04f78, 0x43d200f7, 0x843de00f, + 0x7803e002, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0xc04fa043, 0xec08fa00, 0x38c00790, 0x13ec08bb, 0x003ec08f, + 0xb003a810, 0xdb003ec0, 0x0fb323ec, 0x00fa903e, 0xc00eb003, 0xec00fb00, + 0x3ec10fb0, 0x03e400fb, 0x003ec00f, 0xb003c204, 0x60000000, 0x00000000, + 0x0005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00fe803, 0xfe009fa6, + 0x3fe00df8, 0x031e40cf, 0x90b3e04d, 0xf2431e00, 0xdf8237e0, 0x0ff8133e, + 0x40cd8037, 0xe00ff803, 0xfe00fd90, 0x2fa40fe8, 0x03fe00ff, 0x802fe40f, + 0xf803f000, 0x20000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7042d, 0xc00b4202, 0xdd208501, 0x2d4a4c71, 0xa35cd086, 0x30318088, + 0x52029474, 0xd7042dd3, 0x0bf04abc, 0x608d1021, 0xc00f7003, 0x9c00f500, + 0x2d840b40, 0x02d500b7, 0x102dc00b, 0x7002ea02, 0x20000000, 0x00000000, + 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b6022, 0xdc009720, + 0x2dc0a860, 0x021c219d, 0x00256629, 0x61a63c00, 0x97002dc4, 0x0b710a50, + 0x428500a5, 0xc00b7002, 0xdc00b401, 0x2d000b71, 0x02d820b7, 0x002dc08b, + 0x7002c404, 0x20000000, 0x00000000, 0x2014cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc04bad02, 0xc8909080, 0x6ce0080c, 0x020f2893, 0x4020d008, + 0x08068020, 0x93002ce0, 0x0b3002c3, 0x00800020, 0xc00a3002, 0x8c00a100, + 0x2c800b30, 0x02c620b3, 0x002cc00b, 0x3002da00, 0x20000000, 0x00000000, + 0xa815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xcc04d308, + 0x3cc10cbd, 0x422d00db, 0x5036e00d, 0xb0030c08, 0xdb0136c0, 0x0ff0036e, + 0x008a0036, 0xc00bb003, 0xec00b000, 0x1cc08bb8, 0x83e3007b, 0x002ec00f, + 0xb003da04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0fb003ec, + 0x08fb003e, 0xc00f94e3, 0xed00eb48, 0x1e420fa4, 0x03ed00e9, 0x013c424f, + 0x2083ac00, 0xeb043ed0, 0x1fb003a0, 0x00fa003e, 0xc00fb003, 0xec00f840, + 0x3e800f90, 0x83e100fb, 0x003ec00f, 0xb003e400, 0x30000000, 0x00000000, + 0x0110fc00, 0xff003fc0, 0x0ff003fc, 0x00ff007f, 0xc00ff003, 0x2e80cd21, + 0x72c18c79, 0x033f00fe, 0x4032b02c, 0xd81b3688, 0xdf003fe0, 0x8ff013bc, + 0x344c203f, 0xc00ff003, 0xfc00fc00, 0x33c00cf0, 0x03f000cf, 0x003fc00f, + 0xf013e804, 0x30000000, 0x00000000, 0x80046c00, 0xbb002ec0, 0x0bb002ec, + 0x00bb006e, 0xc01ba902, 0x25008840, 0x22c08a8c, 0x036f04eb, 0xc076c008, + 0x840b6300, 0x8b042eb0, 0x4bb04360, 0x60d8c02e, 0xc00bb002, 0xec00b880, + 0x2a600db0, 0x02c204ab, 0x002ec00b, 0xb002e840, 0x10000000, 0x00000000, + 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb022e, 0xc04b9002, 0x2c048a00, + 0x62c02890, 0x022c00a3, 0x0d22c208, 0xb5066900, 0x9b0006c4, 0x4b30068c, + 0x00a8402e, 0xc00bb002, 0xec00b9c0, 0x22e008a0, 0x02a6008b, 0x002ec00b, + 0xb002e000, 0x40000000, 0x00000000, 0x08040c00, 0xb30024c0, 0x0b3002cc, + 0x00b3002c, 0xc00b1002, 0x04018800, 0xa2400980, 0x024000ab, 0x0024c008, + 0x000a6000, 0x83002c40, 0x0b300a40, 0x00b0002c, 0xc0093002, 0xcc009100, + 0x2a800900, 0x02e400a3, 0x002cc01b, 0x3002c201, 0x00000000, 0x00000000, + 0x000d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fb002e, 0xc00b900a, 0x2802c800, + 0x22c00c00, 0x132010e3, 0x0022c008, 0x00032000, 0xdb003e00, 0x0ff00ba0, + 0x00a8003e, 0xc00fb003, 0xec00f800, 0x32405cb0, 0x23a000cb, 0x047ec00f, + 0xb003e001, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00fc003, 0xfc00fc00, 0x3fc00ec0, 0x03fc006c, 0x003f000f, + 0xc043f000, 0x7f013fc0, 0x0ff003f0, 0x05dc003f, 0xc00ff003, 0xfc00fd00, + 0x3f400ff0, 0x23f400ff, 0x003fc04f, 0xf003e804, 0x70000000, 0x00000000, + 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0x204fc903, 0x3300dc80, + 0x33300cc9, 0x02f200fc, 0x8037080d, 0xc00b1640, 0xc5823fe0, 0x0ff803fe, + 0x00df800b, 0x200fc003, 0x3008c680, 0x3f400cd8, 0x13f028cf, 0x90310c0c, + 0xc3033000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb802ee, + 0x00bb802e, 0x600bb202, 0x2c008b00, 0x34c880b2, 0x00ee14b3, 0x082e1040, + 0x878be488, 0xe9802ee0, 0x03b820ee, 0x00bb002a, 0x800b9021, 0xa200aa80, + 0x2a200a98, 0x02e120ab, 0x002a1c0a, 0x83022004, 0x30000000, 0x00000000, + 0xc805cc00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0x400a3200, 0x8c848329, + 0x00e08b30, 0x10cc08b3, 0x21201a03, 0x000a0480, 0x83002cc0, 0x0b3002cc, + 0x00b30020, 0x001a0026, 0x00102300, 0xac404a10, 0x12c081ab, 0x222c0008, + 0x80020201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0x080bb002, 0x8c408b10, 0x24c00b90, 0x22e430ba, 0x442a465b, + 0xa0226600, 0xbb8826c0, 0x4bb002ec, 0x009b002a, 0xd00b9c42, 0xe201ab00, + 0x2af00a9c, 0x22e018aa, 0x202e831a, 0x88023004, 0x60000000, 0x00000000, + 0x0015ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xe00eb603, 0xae82cb4a, + 0x32e00fb5, 0x83ee40fb, 0xc136102f, 0x84030f00, 0xc9803ec0, 0x0bb003ec, + 0x04fb00ba, 0x200f8c01, 0x2280c232, 0x3e600eb0, 0x03e30061, 0xc13e200c, + 0x88031004, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff003fc, + 0x00ff023f, 0xc00ffa03, 0x7c00fe82, 0x3f65acf8, 0x03fc00ff, 0xa03da00c, + 0x5123fc30, 0xed003fc0, 0x0ff003fc, 0x00ff0037, 0x884f5043, 0x9400fc08, + 0x3d420ff0, 0x13de50ff, 0x00099087, 0xb00bf800, 0x60000000, 0x00000000, + 0xd410ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xd20f8407, 0x2040f942, + 0x36820ca4, 0x032810f9, 0x0832dd0d, 0xb0032400, 0xc94832c0, 0x8fb023ec, + 0x00fb0832, 0x810d8003, 0xe000fb44, 0x3a500f86, 0x036d00c9, 0x493e082c, + 0xa1413004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec, + 0x00bb012e, 0xe248b622, 0x2f08bb50, 0x36f00fba, 0x036c04bb, 0xcd36c168, + 0xbc076580, 0xd94036c0, 0x09b002ec, 0x00bb8036, 0xf0089402, 0xe600bbc0, + 0x36f28bbc, 0x02ec00db, 0x602e8228, 0x31037200, 0x40000000, 0x00000000, + 0xe0054c04, 0xb3000cc0, 0x0b3002cc, 0x00b3002c, 0xf00abe00, 0x0e28bb80, + 0x2cf50832, 0x020c04bb, 0x01241048, 0x0e020000, 0x804020c0, 0x0b30024c, + 0x00bbd020, 0x68120242, 0x46049340, 0xa8714b31, 0x024000b3, 0xc40c2029, + 0x08223800, 0x50000000, 0x00000000, 0xf0011e00, 0xb7802de0, 0x0b7802de, + 0x00b7802d, 0xe1084906, 0x1200b584, 0x29a81a69, 0x021a00b5, 0x8025e808, + 0x79023204, 0x9d8025e0, 0x4b7802de, 0x00b78027, 0xe2385a82, 0xde20b798, + 0xa5210b78, 0x02ce89b7, 0x942d2529, 0x69005800, 0x40000000, 0x00000000, + 0x48080c40, 0xf3003cc0, 0x0f3002cc, 0x00b3002c, 0xd00eb00a, 0x0c80f208, + 0x2c4008b1, 0x020c40f3, 0x0036800c, 0x94820148, 0xc21030c0, 0x0f3002cc, + 0x00fb0030, 0x400a3003, 0xc400f300, 0x28440f31, 0x034d08f2, 0x003c800d, + 0x210b1202, 0x00000000, 0x00000000, 0x401dbc10, 0xff003fc0, 0x0ff003fc, + 0x00ff003d, 0xc04ef013, 0xfc00ff00, 0x37c827f1, 0x03fc08bf, 0x900fc80a, + 0xf04bfc00, 0xfe0427c0, 0x0df003fc, 0x00ff003d, 0xd00ef203, 0xfc00ff00, + 0x1f804ff1, 0x03fc81de, 0x003f800e, 0xe103d006, 0x60000000, 0x00000000, + 0xa805ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0x000fb01b, 0x2c00cb00, + 0xb6e10d90, 0x136400fa, 0x003e4084, 0xa0036c00, 0xf8003ec0, 0x0fb003ec, + 0x00fb8026, 0xa00c8013, 0x04004000, 0x32400fa0, 0x03e000cb, 0x8032802c, + 0x00032a00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0x400b7002, 0x1c028700, 0x23c00070, 0x225c04b7, 0x002fc108, + 0xf0021800, 0xb7002dc0, 0x0b7002dc, 0x00bf0023, 0x800af042, 0x9c00d500, + 0x35c00b70, 0x02dc0087, 0x0029802a, 0x700bf204, 0x60000000, 0x00000000, + 0x80009e00, 0xb7802de0, 0x0a7802de, 0x00b7802d, 0x620b7806, 0x1e088780, + 0x21e00b78, 0x025e00b7, 0x842de028, 0x78a61700, 0xb5802de0, 0x0b7802de, + 0x00b78021, 0xe0097c02, 0x5e0187c0, 0x25600b68, 0x02ce0085, 0x8028a008, + 0xe80a3000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3012d, 0x100b4402, 0x32008c80, 0x21181ac8, 0x265120bc, 0x102cf008, + 0x360e0f20, 0x930024c0, 0x0b3002cc, 0x00b300a4, 0xd8aab802, 0xcc4093c1, + 0x04c05b34, 0x82ed0083, 0xc028c10a, 0xb900d204, 0x30000000, 0x00000000, + 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0xa00fa003, 0x2b00ca04, + 0x32820fa5, 0xc36b80fa, 0x003fbc0c, 0xec033b00, 0xfe483e80, 0x0fa003e8, + 0x00fa0036, 0x880de803, 0x7a40ce82, 0x15940fe6, 0x42fa82ce, 0x84399208, + 0xe4033a04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0, + 0x00f8003e, 0x120f81cb, 0xe170f818, 0x3a000980, 0x2ba000f8, 0x802e000f, + 0x0003a100, 0xf8083e00, 0x0f8003e0, 0x00f8003a, 0x010f8403, 0xa000f841, + 0x3e000784, 0x03e080f8, 0x301e020f, 0x8093d200, 0x30000000, 0x00000000, + 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x640f9403, 0x2608c9c0, + 0x32504f92, 0x03a400f9, 0xa230500c, 0x98032700, 0xc9003e40, 0x1f9003e4, + 0x00f9003e, 0xc80f912b, 0x0400c988, 0x32600c9c, 0x23e402c9, 0x803e600c, + 0x904b0204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x700b9402, 0xa6018960, 0x22410b9e, 0x122405f9, 0x40a2710e, + 0x9c2b8780, 0xd9002640, 0x0f9002e4, 0x00b9c02e, 0x500b9402, 0x24c0d14c, + 0x2a40cd90, 0x80e40089, 0x442e602e, 0x9002a000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002f, 0x400b5402, 0x346a8d00, + 0x27400bd0, 0x02b414bd, 0x41625008, 0x91022410, 0x89002e40, 0x0b9002e4, + 0x00b9182e, 0x420b9022, 0x24008910, 0x22480890, 0x0264008b, 0x502e4408, + 0x90220600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4, + 0x00b1002d, 0x400b5102, 0x94408510, 0xe5c48b51, 0x021401a5, 0x1060448a, + 0x31028440, 0x91002c40, 0x0a1002c4, 0x00b1102c, 0x440b3106, 0x04009900, + 0x28c00910, 0x16c44081, 0x102e442b, 0x11028201, 0x00000000, 0x00000000, + 0xb80d6000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x800b0403, 0x01048042, + 0x26100b04, 0x03a000bc, 0x44321a2c, 0x868b2100, 0xc8003e00, 0x0b8003e0, + 0x00b8403e, 0x100f8693, 0x20b08800, 0x320a0c80, 0x0761a0c8, 0x403e9a0c, + 0x86830e03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9213, 0xec80f920, 0x3ac90f92, 0x03ec00f9, 0x200f4802, + 0xd203b480, 0xfd003640, 0x0f9001e4, 0x00f9203e, 0x480fd203, 0xf400fd00, + 0x3f410dd0, 0x03f48075, 0x203f482e, 0xd2036606, 0x70000000, 0x00000000, + 0x9805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003f, 0x400fd003, 0x3440fd00, + 0x37410fd1, 0x0324007d, 0x00334c2c, 0xd0221400, 0xcd002240, 0x0f9003e4, + 0x00fd0033, 0x4007d143, 0x3480cd00, 0x3bc80c50, 0x032402cd, 0x1033486c, + 0xd2a30600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0, + 0x00b8002e, 0x000b820a, 0x2088b00a, 0x22020e00, 0x032000ba, 0x20a00c0f, + 0x04822028, 0xa8002200, 0x0b8023a0, 0x00980822, 0x024b8102, 0x20108800, + 0x22040d80, 0x436824c8, 0x04aa0b88, 0x82020e04, 0x30000000, 0x00000000, + 0x4805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1282, 0x4484b120, + 0x64400310, 0x220400b1, 0x2828480a, 0x13024600, 0x83002040, 0x0b1002c4, + 0x00b12020, 0x400b1012, 0x04418100, 0x28404890, 0x02044081, 0x00284c0a, + 0x92820201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x421b1282, 0x6400b910, 0x62418b10, 0x022400b1, 0x10284009, + 0x104a6c80, 0xa9002240, 0x0b9002a4, 0x00990022, 0x500b9602, 0x2c408900, + 0xaa410995, 0x02640089, 0x082a4828, 0xb0020604, 0x60000000, 0x00000000, + 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9c13, 0x6540f961, + 0x36640f90, 0x8b2740f9, 0x803a429e, 0x96036602, 0xc930b240, 0x0f9003e4, + 0x04f900b2, 0x700f9c03, 0x2402c160, 0xb8680c94, 0x02270409, 0x0038588e, + 0x900a2804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9083, 0xa600f984, 0x3e604e99, 0x03a400f9, 0x80364a0f, + 0x9c83a400, 0xf9803e40, 0x0f9003a4, 0x00f9003e, 0x500f180b, 0xc400f943, + 0xb6640f98, 0x13e490e9, 0x201e400d, 0x910bea00, 0x60000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x040f8403, 0xe100d822, + 0x36124f86, 0x032000e8, 0x503e102c, 0x80036000, 0xd8003e00, 0x0f8003e0, + 0x00f80032, 0x001f8043, 0x2080f800, 0x7a080e80, 0x036102c8, 0x20320906, + 0x80030a04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8, + 0x00ba012f, 0xb00bec32, 0xfb20cec1, 0x23a00be0, 0x02a800be, 0x900f90a8, + 0xe003b800, 0x86402e80, 0x0ba002e8, 0x00be882b, 0xb109e403, 0x7901be08, + 0x2b990868, 0x03a800de, 0x8013982d, 0x684b8a00, 0x40000000, 0x00000000, + 0x28054c00, 0xb3002cc0, 0x0b30028c, 0x00b3002c, 0xc80b3502, 0xcf209b82, + 0xa0f0033d, 0x020c04a3, 0x000ce482, 0x30062e04, 0x93202cc0, 0x0b3002cc, + 0x01bb8020, 0xcc0b3302, 0x0d10b380, 0x20f01a38, 0x822c01ab, 0xd3a4e082, + 0x388a0a00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7006d, 0x400b7002, 0xde008708, 0x21c28b70, 0x029c00b7, 0x002dc088, + 0x70aa9c20, 0x87002dc0, 0x0b7002dc, 0x00b70029, 0xc0897022, 0x5d00bd00, + 0x284008f0, 0xa29c0097, 0x04218109, 0xe0a06800, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7803de0, 0x0b78039e, 0x00f7803d, 0xe00f7803, 0xfe08d780, + 0x21e00f78, 0x031e00e7, 0x803de00e, 0x78131e08, 0xd7802de0, 0x0f7803de, + 0x00ff8021, 0xe00bf802, 0x1a00b680, 0x29e00e78, 0x030f04ee, 0x8037a04e, + 0x78092a02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0x400fb003, 0xe000fb00, 0x3ac00fb0, 0x31ec00db, 0x003ec00f, + 0x9003a400, 0xfb001ec0, 0x0fb003ec, 0x00f8003e, 0x00098023, 0xe800f100, + 0x3ec007b0, 0x02ac00fb, 0x043e800f, 0x20038206, 0x60000000, 0x00000000, + 0x4005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ef903, 0x3e004f80, + 0x33e46cf8, 0x433e40ff, 0x8033ec2c, 0xf2037e08, 0xff8033e0, 0x0ff803fe, + 0x00df803f, 0xe00ffa01, 0x1e480fb0, 0xbbe00ff8, 0x033e48ff, 0x843fa00c, + 0xd81b8000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0e7002dc, + 0x00b7002d, 0xd008c403, 0x5c10dd02, 0x214108c1, 0x835c00bc, 0x08370c0d, + 0x71071c00, 0xb60001c0, 0x0b7003dc, 0x00b5003d, 0xc40b5202, 0x9c00d710, + 0xb50a0f42, 0x135cc8b7, 0x102d002d, 0x51022a04, 0x60000000, 0x00000000, + 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002f, 0x000a7046, 0x1c008600, + 0x21821874, 0x021c00b7, 0x0021cc98, 0x60029c20, 0xa70021c0, 0x0b7002dc, + 0x00b7002d, 0x000b6306, 0x18048661, 0x29800970, 0x961c00b4, 0x002d8409, + 0x50820000, 0x20000000, 0x00000000, 0x6014cc00, 0xb3002cc0, 0x0a3002cc, + 0x00b3002c, 0x50088a06, 0x61c090c8, 0x22018880, 0x024d00b0, 0x40241019, + 0x890aa480, 0xb24020c0, 0x0b3002cc, 0x00b0002e, 0x010b0802, 0x88601300, + 0x20b20a08, 0x064c00b1, 0xc02c000b, 0x9c020804, 0x30000000, 0x00000000, + 0x2815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0x100eb403, 0x2f08cbe0, + 0xb2d40cb8, 0x032c00fb, 0x1032c00c, 0xb503ae00, 0xfb00b2c0, 0x0fb003ec, + 0x00f9002e, 0x5c0f9603, 0x26008bc0, 0xaae04b38, 0x423d00b3, 0x403cb809, + 0xbc0a2a04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0eb003ec, + 0x00fb003e, 0x400fb143, 0xed08fa00, 0x3e800fb0, 0x03ee20fb, 0x023cd70d, + 0xa4032c00, 0xfb803ec0, 0x0fb003ac, 0x00f9003a, 0x400f9203, 0xe410f980, + 0xbec00f84, 0x03ecc0f9, 0x1a3e920d, 0x80a36000, 0x30000000, 0x00000000, + 0x8010fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003e, 0x020fc003, 0x3c00cd10, + 0xb3400cc0, 0x0b3c00fc, 0x8037310e, 0xf0437c00, 0xcfa83fc0, 0x4ff043fc, + 0x00fc003f, 0x400c9003, 0xf004fe00, 0xbbc04ff0, 0x833c003e, 0x4023080c, + 0xf82b0044, 0x30000000, 0x00000000, 0x80006c00, 0xbb002ec0, 0x0bb003ec, + 0x00bb002e, 0x700b8d42, 0x22c08840, 0x2a350a80, 0x422c00b8, 0xc122300a, + 0x8d122200, 0xab0026c0, 0x0bb002ec, 0x00b8c02e, 0x200d8812, 0xe200b380, + 0x22f40bbb, 0x02ac0499, 0x4a363008, 0x840aa040, 0x10000000, 0x00000000, + 0x80052c01, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xe00bb002, 0x20088340, + 0x2ad008b5, 0x122c00b3, 0x5026c22a, 0x90826600, 0x89002ec0, 0x0bb002ec, + 0x00b9c02e, 0x60089802, 0x6600bb80, 0xaed08bb0, 0x026c01bb, 0x002a9018, + 0xa1022000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b0002, 0x00008000, 0x28000a00, 0x020c00b0, 0x0020000a, + 0x0002040c, 0xa0002cc0, 0x0b3006cc, 0x00b1002c, 0x40091002, 0xc4009300, + 0xa0400300, 0x028c0099, 0x002e0028, 0x00028201, 0x00000000, 0x00000000, + 0x800d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0x000f800b, 0x0002c800, + 0x38002c80, 0x032c04f8, 0x0436002e, 0x000b6408, 0x89003ec0, 0x0fb003ec, + 0x00f8003e, 0x000c8002, 0xec04fa00, 0xbe804fb0, 0x036c00f9, 0x003a002c, + 0x20450003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003bc, + 0x00ff003f, 0x408fc003, 0xf010fc01, 0x3f002fc0, 0x01fc00fc, 0x003f008f, + 0xc007b000, 0xf40237c0, 0x0ff003fc, 0x00fc003f, 0x000fc023, 0xf400f701, + 0x3f800f40, 0x02bc00fd, 0x0035010f, 0xc0036806, 0x70000000, 0x00000000, + 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00fc3137, 0xe40fc403, 0x7080cf90, + 0x334c2ff8, 0x03fe40ef, 0x80735b4d, 0xf813fd80, 0xdf1035e5, 0x0cf00338, + 0x00ff8037, 0xe00ff803, 0xd200ff28, 0x33e00f52, 0x83fc00c7, 0x3033c12c, + 0xe013f000, 0x70000000, 0x00000000, 0x8000ee00, 0xbb802ee0, 0x0bb802ee, + 0x00b03020, 0xc80b1402, 0x2300a900, 0x2a504a12, 0x02cc04bb, 0x8020190c, + 0xb842fc00, 0xab702240, 0x0dfd022a, 0x00bb0122, 0xe009b802, 0xe200bf60, + 0x2ae00bdc, 0x12e20088, 0x60223008, 0x9c02f004, 0x30000000, 0x00000000, + 0x0805cc00, 0xb3002cc0, 0x0b3002cc, 0x00b32024, 0xc80b1602, 0xc1018300, + 0x28102a30, 0x82cc01b3, 0x002c4808, 0x3002ccc0, 0xb30026c8, 0x48300e0c, + 0x01b30024, 0xc00b3002, 0x8000b308, 0x20c00b10, 0x02c840a1, 0x6224c488, + 0x3402f201, 0x70000000, 0x00000000, 0xe015ac00, 0xbb002ec0, 0x0bb002ec, + 0x00bb6022, 0xc00b9022, 0xac00ab02, 0x2ae00ab8, 0x02ec04bb, 0x04282009, + 0xb002ec01, 0xab0122c0, 0x49b0022c, 0x20bb0022, 0xc00bb022, 0xe900bb00, + 0x6ac00b90, 0x02e482aa, 0x41a60008, 0x8002f004, 0x60000000, 0x00000000, + 0x0005ec00, 0xfb003ec0, 0x0fb003ec, 0x00f80036, 0xc00f8c83, 0xe360cb01, + 0x3a604ea6, 0x23ec00fb, 0x001e680c, 0xb013ec03, 0xfb0036c0, 0x0cb00322, + 0x40fb0036, 0xc00fb003, 0xe040fb01, 0x32c00fb0, 0x03fc00af, 0x0037002c, + 0xc003e004, 0x70000000, 0x00000000, 0xa011bc00, 0xff003fc0, 0x0ff003fc, + 0x08fc803f, 0xc20fe903, 0x6400ff10, 0x1e404ef0, 0x13fc00ff, 0x0833c02e, + 0xf043dc02, 0xf7003f64, 0x0fb003f0, 0x00ff003f, 0xc04df003, 0xf000ff00, + 0x3fc00fdc, 0x23e000dc, 0x003bc30f, 0xf003e800, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb003ec0, 0x0fb003ec, 0x00d24c3a, 0xc00a0403, 0xa982cb20, + 0x3e812db0, 0x03ac00fb, 0x003ed30e, 0xb003ec00, 0xfb003ec0, 0x4eb10bac, + 0x00eb2032, 0xc00fb003, 0xe480e700, 0xb2c00fb0, 0x038820e1, 0x003a000c, + 0x9003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec, + 0x013ba022, 0xc00aa702, 0x0c008b64, 0x22d00cb6, 0x122c0083, 0xe01ad008, + 0xb002fc08, 0x8f0020c0, 0x0c75032c, 0x008b6032, 0xc00eb002, 0xec008f00, + 0x22d20b91, 0x0227200a, 0xa020f00d, 0xa002f600, 0x40000000, 0x00000000, + 0xc0040c00, 0xb3002cc0, 0x0b3002cc, 0x04b18028, 0xd00a2004, 0x81009940, + 0x2e660800, 0x028c04a3, 0x044c500b, 0x3002cc00, 0xa3002880, 0x1b300ecc, + 0x00bb00a0, 0xc0093002, 0xcd00a300, 0x24c20b34, 0x028500a2, 0x0028e408, + 0x2002f900, 0x50000000, 0x00000000, 0x60001e00, 0xb7802de0, 0x0b7802de, + 0x00b59021, 0xe0087906, 0x1a2097b0, 0x21e4087c, 0x021f0587, 0x8029e009, + 0x7802de00, 0xa7802320, 0x0878023e, 0x00978021, 0xe00a7802, 0xf6008380, + 0x25e00bd8, 0x021a0085, 0x90212429, 0x5802fe00, 0x40000000, 0x00000000, + 0x48180c00, 0xf3003cc0, 0x0f3003cc, 0x00b31038, 0xc40e3102, 0x84c2db20, + 0x3c002c31, 0x438c80a3, 0x252cca0f, 0x3002ec00, 0xab2038c0, 0x4f3213cc, + 0x04fb0130, 0xc00d3103, 0xc800a300, 0x34c00f30, 0x038000e0, 0x1038c40c, + 0x3003d202, 0x00000000, 0x00000000, 0x401cbc00, 0xff003fc0, 0x0ff003fc, + 0x00ff101f, 0xc007f101, 0xfc50ef21, 0x3fc00ff1, 0x63fc00ef, 0x021bc02e, + 0xf003fc00, 0xcf003bc4, 0x0ff002dc, 0x40ef003b, 0xc40ef003, 0xf800ff00, + 0x3bc00fd8, 0x03fc02ff, 0x103d040f, 0xc003d006, 0x60000000, 0x00000000, + 0x2805ec00, 0xdb003ec0, 0x0fb003ec, 0x00fa2032, 0xc00fa403, 0x2c00fb00, + 0x3ec02cb0, 0x03ec08fb, 0x003e402c, 0xb003ec40, 0xdb003e80, 0x0db4836c, + 0x00fb0032, 0xc00fb003, 0xecc0ff20, 0x3ce00eba, 0x032402ca, 0x0332000c, + 0x8483ea00, 0x70000000, 0x00000000, 0xc8019c00, 0xb7002dc0, 0x0b7002dc, + 0x00b71021, 0xc10b3082, 0x1c00bf00, 0x21c02d70, 0x22dc0437, 0x0025c02c, + 0x7022cc44, 0xa7402d80, 0x0a32121c, 0x00ef0121, 0xc00b7002, 0xd440b748, + 0x2dc00870, 0x8358008d, 0x0035c008, 0x7000f024, 0x60000000, 0x00000000, + 0x00009e00, 0xb7802de0, 0x0b7802de, 0x00b6c025, 0xe0097802, 0x1e00b780, + 0x29a01878, 0x12de11b7, 0x802cc309, 0x7802de00, 0xb7a02de0, 0x2b7b0ade, + 0x19b780a1, 0xe10b7802, 0xde80b7a0, 0x2de00b38, 0x06020084, 0x80213008, + 0x5802e040, 0x20000000, 0x00000000, 0x6814cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b34024, 0xc08b3902, 0x8e60b382, 0x28e01932, 0x02cc01b3, 0x0024f008, + 0x3002cc05, 0xa3006ee4, 0x0b30028c, 0x00a30020, 0xc00b3002, 0xcd00bb00, + 0x2cc00938, 0x024c0083, 0x0024d808, 0x2802d204, 0x30000000, 0x00000000, + 0xe804a800, 0xda003e80, 0x0fa003e8, 0x00fac0b6, 0x800fa50b, 0x3800faa2, + 0xb9880ce6, 0x03e800fa, 0x003d802d, 0xa002e800, 0xfa043f80, 0x0fa003f8, + 0x80fa0032, 0x800fa003, 0xe800fa00, 0x3e800fa2, 0x032800ca, 0x0432b02c, + 0xaa03fa04, 0x60000000, 0x00000000, 0x4810a000, 0xf8003e00, 0x0f8003e0, + 0x00f0243a, 0x000f8003, 0x6100f842, 0x32000f84, 0x03e100b8, 0x0036120f, + 0x8003c002, 0xa8007e00, 0x8a840a60, 0x00f8407e, 0x008f8003, 0xe000f800, + 0x3e000e80, 0x03f000fc, 0x403f002f, 0xc003d200, 0x30000000, 0x00000000, + 0x0810a400, 0xf9003e40, 0x0f9003e4, 0x00fb0032, 0x501fb803, 0x2610c910, + 0x12402c99, 0x13e64459, 0x107e442c, 0x9003e402, 0xc9003e40, 0x2e110ba4, + 0x00f91036, 0x400f9003, 0xe620f900, 0x32600f90, 0x03c700c1, 0x8132602c, + 0x9003c204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4, + 0x00990022, 0x701b99aa, 0x0620d180, 0x3640089c, 0x02e700e9, 0x066e5808, + 0x9002e400, 0x89003e40, 0x0c920364, 0x00b90432, 0x400b9007, 0xed40b900, + 0x22640b90, 0x02e60089, 0xd0b44408, 0x9002e000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b90062, 0x405b1002, 0x24408900, + 0x6e400b90, 0x82e420b9, 0x09264108, 0x9006e403, 0x89012ec1, 0x2a901224, + 0x04b10126, 0x404b9002, 0xe420b900, 0x26400b90, 0x02e4028d, 0x002b40a8, + 0xd002c600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4, + 0x009310a0, 0xc40b1102, 0x04009b10, 0x2ec40911, 0x02c440a1, 0x002e4408, + 0x1006c440, 0x81122844, 0x08101244, 0x01b31020, 0x400b1022, 0x8401b128, + 0x24400b10, 0x02d40085, 0x102d4008, 0x5002c201, 0x00000000, 0x00000000, + 0x381d6000, 0xf8003e00, 0x0b8002e0, 0x00f06832, 0x100b86a3, 0x20a4c840, + 0x3c1a0f84, 0x02e100b8, 0x00261a0c, 0x8002e1a0, 0xc86c2c10, 0x0e8283a0, + 0xa0f84036, 0x000f8002, 0xe000f8a0, 0xb6000f82, 0x83e0a0ca, 0x693a8a2c, + 0xc283ee03, 0x50000000, 0x00000000, 0xb81de400, 0xf9003e40, 0x0f9003e4, + 0x0059203e, 0x480f9213, 0xfc04fd20, 0x374846d2, 0x13e484e9, 0x013f480f, + 0x9003e486, 0xf9223f48, 0x4e9013f4, 0x00f9203e, 0x400f9003, 0xe400f9a8, + 0x3a400fd0, 0x03ec00f9, 0x20b0402f, 0x9003e606, 0x70000000, 0x00000000, + 0x3805e400, 0xf9003e40, 0x0f9003e4, 0x00f9103e, 0x400f9283, 0x3480cd00, + 0xbf400e11, 0x032400cd, 0x013a4c2c, 0x9003e400, 0xf9102e40, 0x0fd28b24, + 0x88fd003e, 0x400f9003, 0xe400f900, 0x37400f90, 0x03e400cd, 0x0033480c, + 0x92832600, 0x70000000, 0x00000000, 0x1800e000, 0xb8002e00, 0x0b8002e0, + 0x00b8102c, 0x0a0ba202, 0x20500808, 0x2a020aa0, 0x0220a888, 0x040e0c4a, + 0x8002e020, 0x88102c8a, 0x0b8023a0, 0x40b8002e, 0x001b8002, 0xe000e800, + 0x3a000380, 0x02f00288, 0x10220008, 0x80021e04, 0x30000000, 0x00000000, + 0x48008400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x490b1286, 0xc4029120, + 0xae641a10, 0x12048381, 0x002e4808, 0x1002c440, 0xb1012c49, 0x0b100204, + 0x00b1002c, 0x400b1002, 0xc400b100, 0x2c400a50, 0x02d44181, 0x00a04428, + 0x102a1201, 0x70000000, 0x00000000, 0x1814a400, 0xb9002e40, 0x0b9002e4, + 0x00b9502e, 0x400b1006, 0xe4109100, 0x2a488a10, 0x02040ca9, 0x002e400a, + 0x9002e406, 0xa9012e44, 0x0bb002a4, 0x00bb002e, 0x400b9002, 0xe4a0a900, + 0x6a400bb0, 0x02fc0089, 0x00224028, 0x94020604, 0x60000000, 0x00000000, + 0xa004a400, 0xf9003e40, 0x0f9003e4, 0x00f9803e, 0x400f940b, 0xe700d900, + 0xbe600e9c, 0x0b240049, 0x011e402c, 0x9001e400, 0xf9003e40, 0x0f900324, + 0x84fd003e, 0x400b9003, 0xe600f901, 0x36400f90, 0x23e50049, 0x0032400c, + 0x90032804, 0x70000000, 0x00000000, 0xe810a400, 0xf9003e40, 0x0f9003e4, + 0x00fb803e, 0xc20fb043, 0x0440e9c0, 0xbe402fba, 0x83ec00d9, 0x003ec80f, + 0x9003c410, 0xd9003e60, 0x0f9043a4, 0x80f9003e, 0x404f9003, 0xe600e900, + 0x1a400790, 0x03e400f9, 0x903c402f, 0x9003fa00, 0x40000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f820b2, 0x002c840b, 0x2100c801, + 0x3a008e84, 0x032080c8, 0x013e082c, 0x8003e000, 0xc8013e10, 0x2e008320, + 0x00e80032, 0x000e8003, 0xe120f800, 0x3e080fc0, 0x035000c0, 0x0832000e, + 0x00030a04, 0x20000000, 0x00000000, 0x08042800, 0xba002e80, 0x0ba002e8, + 0x00ba0262, 0x9008a400, 0x38008e01, 0x218108a4, 0x136b003e, 0xa06c820a, + 0xa003a800, 0xda002e80, 0x08e40368, 0x008e0022, 0x800ea002, 0xe920ba00, + 0x2fa28ba0, 0x0368008e, 0x0023a808, 0xa0020a00, 0x40000000, 0x00000000, + 0x08054c00, 0xb3002cc0, 0x0b30028c, 0x00b3c020, 0xe0083c82, 0x4d208300, + 0x28e08b34, 0x020e0083, 0xcb2ce0e8, 0x30228c01, 0x83002cc0, 0x0a04060c, + 0x00a300a0, 0xc00a3002, 0xcd00b300, 0x2cd00b30, 0x020c00b3, 0x00a02028, + 0x300a0a00, 0x50000000, 0x00000000, 0x20011c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7c021, 0xa2087082, 0x5d008702, 0x210209e0, 0x025820b7, 0x046fc00a, + 0x70068c00, 0x97202de8, 0x185002fe, 0x00848021, 0xc00b7002, 0xd800b700, + 0x2dc00bf8, 0x024c00b3, 0x0021c008, 0x30422800, 0x40000000, 0x00000000, + 0x28181e00, 0xf7803de0, 0x0f78039e, 0x00f38221, 0xe00c3803, 0x4e02cf80, + 0x2be04b78, 0x031e00c7, 0x822de00c, 0x78039e84, 0x87c23df0, 0x0e48031e, + 0x04efe0a1, 0xe00e7803, 0xde20f780, 0x3d600f38, 0x231600f6, 0x8030200e, + 0x78032802, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec, + 0x00fb483e, 0x90079200, 0xac10f800, 0x3e400e82, 0xa0e924fb, 0x003c580f, + 0xb003ac02, 0xfb003ed8, 0x0f30034c, 0x00f8803e, 0xc00eb003, 0xe880ff70, + 0x3e401fb0, 0x07e5a2c8, 0x001e000f, 0xb003c206, 0x60000000, 0x00000000, + 0x6004be00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xf00fec03, 0xfe00cf84, + 0x33ec0df8, 0x033e40cf, 0x9035f00c, 0xf207fc20, 0xff813ff0, 0x0cd8033e, + 0x00ff8033, 0xe40ff803, 0xf600ffc2, 0x23240ff8, 0x03be08fe, 0x823f202d, + 0xf8033000, 0x70000000, 0x00000000, 0xa8009c00, 0xb7002dc0, 0x0b7002dc, + 0x00b6002d, 0x900b4082, 0xdd028f1c, 0xa1842a60, 0x121c0487, 0x10210028, + 0x71079c82, 0xe7002dc0, 0x0850029c, 0x40b40129, 0xc00b7002, 0xd400b710, + 0x21840b70, 0x115c00b6, 0x682d4608, 0x71822a04, 0x60000000, 0x00000000, + 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0x800b7102, 0xcc00b700, + 0x21c8a960, 0x02140187, 0x122bc409, 0x70028c42, 0x87002dc0, 0x0a50021c, + 0x00b70021, 0xc10b7002, 0xd800b700, 0x25008b30, 0x821400b6, 0x006c0008, + 0x30020400, 0x20000000, 0x00000000, 0x4014cc00, 0xb3002cc0, 0x0b3002cc, + 0x01b2402c, 0x800b1422, 0xcb80b800, 0x20c01a00, 0x02041181, 0x00281009, + 0x30068c00, 0xb3002ec0, 0x0a30228c, 0x00b00028, 0xc00b3002, 0xca00b300, + 0x24000b38, 0x064500b8, 0x802c1028, 0x38021804, 0x10000000, 0x00000000, + 0x2c05ac00, 0xfb003ec0, 0x0fb003ec, 0x00fa403e, 0xc00fb403, 0xef02f880, + 0x30f20db9, 0x0b2c02cb, 0x0038b80d, 0xb043bc00, 0xef007fc0, 0x2e80032c, + 0x00fb0032, 0xc00fb002, 0xec80ff00, 0x860007a8, 0x032a80f9, 0x803eb00d, + 0xb8031a04, 0x60000000, 0x00000000, 0xa010ec00, 0xfb003ec0, 0x0fb003ec, + 0x04f8203e, 0xc00fa023, 0xec404940, 0x3e024e95, 0x03e900fb, 0x40a2820e, + 0xb0038c10, 0xeb043ec5, 0x051403ec, 0x00f8403e, 0xc00fb003, 0xe800ff00, + 0x3a500fa0, 0x03c820f9, 0x083e180f, 0xb083e400, 0x30000000, 0x00000000, + 0x0510fc00, 0xff003fc0, 0x0ff003fc, 0x00ff1033, 0x440cf083, 0xde40ce00, + 0x33800ff8, 0x03fb00ff, 0x103fc06c, 0xf013fc04, 0xcf003fc0, 0x0ec0091c, + 0x00cc8033, 0xc01ff003, 0xb600fb00, 0x33000fe0, 0x03f000cf, 0x00b38000, + 0x70032004, 0x30000000, 0x00000000, 0x81046c00, 0xbb002ec0, 0x0bb002ec, + 0x00b90022, 0x50088402, 0xe90088d1, 0x22300895, 0x03a901ba, 0x443e5308, + 0xb002ec00, 0x8b012ec0, 0x0da0036c, 0x00d81022, 0xc00bb002, 0xe20cbb00, + 0x22620ba0, 0x02e000c9, 0xc020a008, 0xb0022100, 0x10000000, 0x00000000, + 0x80056c00, 0xbb002ec0, 0x0bb002ec, 0x00b04020, 0x4008a082, 0x6c018808, + 0x224a1bb0, 0x82a434bb, 0x086e8028, 0xb012ec01, 0x9b012ec0, 0x0a90026c, + 0x00830022, 0xc00bb002, 0xe440b300, 0x22201ba0, 0x02e80099, 0x8022a20a, + 0xb0026000, 0x40000000, 0x00000000, 0x08000c00, 0xb3002cc0, 0x0b3002cc, + 0x00b000a0, 0x40280042, 0xc4068100, 0x22000810, 0x028400b3, 0x002a0018, + 0x3002cc02, 0x930424c0, 0x29100acc, 0x00900020, 0xc00b3002, 0xc400b300, + 0xa0000b20, 0x02c80281, 0x0020800a, 0x30024201, 0x00000000, 0x00000000, + 0x00186c00, 0xfb003ec0, 0x0fb003ec, 0x00f90022, 0x000cb002, 0x6400ca00, + 0xb0002f20, 0x038004b8, 0x042ec008, 0xb003ec00, 0xdb003dc0, 0x4e800b6c, + 0x04c000b2, 0xc00bb003, 0xe000ff00, 0x72000fa0, 0x03e000da, 0x0032802e, + 0xb0036003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc, + 0x00fc053f, 0x000fc022, 0xfc00fc04, 0x3f010fc0, 0x03b000f7, 0x040f000f, + 0xf007fc00, 0xcf003fc0, 0x0b60037c, 0x00fc003f, 0xc00ff003, 0xf000ff00, + 0x3f000fe0, 0x03f000fc, 0x003f800d, 0xf003a806, 0x70000000, 0x00000000, + 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff8033, 0x080cd803, 0xf600fc09, + 0x33008dc2, 0x833004cc, 0x0431080c, 0xc3a21e00, 0xff803fe0, 0x07f803fe, + 0x00dc003f, 0x002c6803, 0xf600cd80, 0x3f204cd9, 0x0b3658cc, 0x803fe00f, + 0xc2033000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb802ee, + 0x00bb8022, 0x35289800, 0xe210b8c0, 0x0230088c, 0x02230088, 0xd02a3028, + 0x86036c00, 0xbb802ee0, 0x0eb802ee, 0x0038040e, 0x2008b802, 0xe404d982, + 0x2ee04a90, 0x0aa88088, 0x802ee00b, 0x8d136004, 0x30000000, 0x00000000, + 0xc805cc08, 0xb3002cc0, 0x0b3002cc, 0x00b300a4, 0x00183002, 0xc4002004, + 0x08100800, 0x02405080, 0x00200408, 0x00028ca0, 0xb3022cc0, 0x0b3002cc, + 0x00b0002c, 0x00483006, 0xe4048302, 0x2cc00832, 0x028c0882, 0x002cc10b, + 0x00028201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec, + 0x00bb0026, 0xc0089806, 0xe200bb18, 0x228108a4, 0x0260008b, 0x102a8008, + 0xa1226c00, 0xbb002ec0, 0x0ab012ec, 0x00b9802e, 0x20889002, 0xe4009a08, + 0x2ec00ab0, 0x82ac4088, 0x002ec04b, 0xb282f004, 0x60000000, 0x00000000, + 0x0015ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb0036, 0x360c8c23, 0xef00f880, + 0xba002d88, 0x036200c8, 0xa032108c, 0x8c03ac00, 0xfb003ec0, 0x0fb003ec, + 0x00d8a03c, 0x604ca001, 0xce40c942, 0x3c120c80, 0x03a600c8, 0x503ec00f, + 0x00239004, 0x70000000, 0x00000000, 0xa001bc00, 0xff043fc0, 0x0ff003fc, + 0x00ff0039, 0x400fc003, 0xf4107b80, 0x3f500ff9, 0x2b9e82f8, 0x883f710d, + 0x98037c20, 0xff003fc0, 0x0ef003fc, 0x00fc003e, 0x408fc901, 0xf004fc43, + 0x3fe80bd4, 0x037e10fc, 0x843fa4cf, 0xf0027800, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb203e, 0x820cb303, 0xec00f008, + 0xb0c01f14, 0x03ad02c3, 0x10b2c00c, 0x300b2c40, 0xcb003ec0, 0x0fb053ec, + 0x00f80432, 0x500cb40b, 0x2c88c900, 0x3ec80fb4, 0x032d10ca, 0x403ec20c, + 0x84233004, 0x20000000, 0x00000000, 0xd8052c00, 0xbb000ec0, 0x0bb002ec, + 0x00b3002e, 0xc0088022, 0xe4409b00, 0x22c80bbf, 0x422f04ab, 0x8020c008, + 0xb5822d00, 0xdb002ec0, 0x0bb002ec, 0x00b9d276, 0x610d9003, 0x6c008a02, + 0x2ef38bb7, 0x216c10d8, 0x502ee20a, 0xb182b200, 0x40000000, 0x00000000, + 0xe8054c00, 0xb3002cc0, 0x093002cc, 0x00b3002c, 0x00091c02, 0xc740b0c0, + 0x20220b00, 0x02802080, 0x82600008, 0x08000e00, 0x83002cc0, 0x193006cc, + 0x04b10028, 0x00092082, 0xcd008300, 0x2cc00bb8, 0x02240091, 0x002ce008, + 0x0c003800, 0x50000000, 0x00000000, 0xf0011e00, 0xb7802de0, 0x0b7802de, + 0x00b7802c, 0xae095802, 0xd200b480, 0x21e40b18, 0x020e00a7, 0x8021e008, + 0x79021e00, 0x97802de0, 0x0b7812de, 0x01b58825, 0x24087802, 0xda008780, + 0x2de40bfa, 0x02728097, 0x802fa04a, 0x48029800, 0x40000000, 0x00000000, + 0x48080c40, 0xf3003cc0, 0x0f3003cc, 0x00f3083c, 0x480d3503, 0xc580f308, + 0x30400b30, 0x038d20c0, 0x1030488c, 0x15020c88, 0x83102cc0, 0x0f3003cc, + 0x00fb0028, 0x42293403, 0xed02c330, 0x3cc00f30, 0x030d00d3, 0x083c481c, + 0x30031202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc80ad103, 0xfc00df00, 0x3fc00ff1, 0x02fc00ff, 0x023fc00f, + 0xf103fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ff107, 0x3c00bf12, + 0x3fc10f72, 0x47dc80ff, 0x003dc00f, 0x7003d006, 0x60000000, 0x00000000, + 0xa805ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb8032, 0xc0008003, 0xec00fb00, + 0xb2800da0, 0x032000cb, 0x003e800d, 0xa00f2c00, 0xdb003ec0, 0x0fb003ec, + 0x00f9003e, 0xc00ca003, 0xee024b00, 0x3ee00c80, 0x032600c9, 0x283e408f, + 0xb0032a00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7002dc, + 0x00b70020, 0xc00d7002, 0xd000b704, 0x21c10870, 0x021c04c7, 0x002cc108, + 0x30061c00, 0x87002dc0, 0x0b7042dc, 0x00b7002d, 0xc0187006, 0xf8008700, + 0x2dc00ae0, 0x0a180287, 0x602d800b, 0x70123204, 0x60000000, 0x00000000, + 0x80009e00, 0xb7802de0, 0x0b7802de, 0x00b78021, 0xe0087802, 0xde20b3c0, + 0x68e10838, 0x020e2397, 0x822df089, 0x78121e00, 0x87802de0, 0x0b7802de, + 0x00b78029, 0xe0187802, 0xde008781, 0x2fe0187c, 0x069f0087, 0x802d700b, + 0x38023000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b30520, 0xf4093a02, 0xce00b384, 0x20e0a839, 0x020e0183, 0x406cc908, + 0x3c060c00, 0x83002cc0, 0x0b3002cc, 0x00bb002c, 0xf4083522, 0xce0083c2, + 0x6cc00a3c, 0x028f0093, 0x062ce00b, 0x3c021204, 0x30000000, 0x00000000, + 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fa0033, 0xb00cea03, 0xf904fe40, + 0x3bb20ce1, 0x0a3a00de, 0xc03fa02d, 0xed932802, 0x8a003e80, 0x0fa003e8, + 0x00fe003f, 0xa00ce843, 0xfac4ce18, 0x3f810ce5, 0x0bb900ca, 0x013f840f, + 0xee033a04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0, + 0x00f800bc, 0x020f8403, 0xe020f000, 0x1e030e80, 0x03c020f8, 0x303e000f, + 0x8013e100, 0xe8003e00, 0x0f8003e0, 0x00f8143e, 0x122f8603, 0xe004f802, + 0x3e000f80, 0x126000e8, 0x003e004f, 0x808bd200, 0x30000000, 0x00000000, + 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x500c9413, 0xe710f988, + 0x70601c18, 0x032400c1, 0x8034500e, 0x90132480, 0xc9003e40, 0x0f9003e4, + 0x00f99036, 0x680c9823, 0xe700f904, 0x3e400f90, 0x032420f9, 0x003e640f, + 0x11030204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x40089082, 0xe788b970, 0x2a562896, 0x02242089, 0x003e6048, + 0x9ca98580, 0xd9002e40, 0x0b9002e4, 0x00b901a0, 0x60189582, 0xe400b900, + 0x6e524b93, 0x0a2400fb, 0x402e708b, 0x9c016000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x42089012, 0xe408b900, + 0x26c01892, 0x02248089, 0x5222d00a, 0x12002400, 0x89002e40, 0x0b9002e4, + 0x00b90022, 0xc1289002, 0xe400b904, 0x2e600b10, 0x022400bb, 0x082ed00b, + 0x90820600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4, + 0x00b1002c, 0x40281042, 0xc400b104, 0xa4402810, 0x0a040281, 0x00644088, + 0x11228441, 0x91002c40, 0x0b1002c4, 0x00b11020, 0xc0081042, 0xc440b104, + 0x2c410b11, 0x020448b1, 0x012c400b, 0x10024201, 0x00000000, 0x00000000, + 0xb80d6000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x0a4c8002, 0xe000f82c, + 0x260a0882, 0x8320a0c8, 0x28320a0e, 0x868b2100, 0xc8003e00, 0x0f8003e0, + 0x00f86d32, 0x0b088013, 0xe900f800, 0x2e000f84, 0x230100f8, 0x003e000f, + 0x82830e03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4, + 0x00f1023f, 0x4127d003, 0xf400fd00, 0x3b400fd0, 0x03f400fd, 0x003f400f, + 0xf2438481, 0xf9003e40, 0x0f9003e4, 0x00fd2039, 0x400fd001, 0xfc98fd00, + 0x3d400fd2, 0x03f490e9, 0x013f400f, 0xd043e606, 0x70000000, 0x00000000, + 0x9805e400, 0xf9003e40, 0x0f9003e4, 0x00fd003e, 0x480c9003, 0x2402c901, + 0x3a400890, 0x03a480f9, 0x283b488c, 0xd0031400, 0xf9003e40, 0x0f9003e4, + 0x00fd0033, 0x400e1043, 0xf4007901, 0x3f400050, 0x032400f1, 0x003f400f, + 0xd2ab0600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0, + 0x00b8002e, 0x00088002, 0x20108a40, 0x22800d81, 0x122000be, 0x0022840d, + 0x848b6020, 0xb8002e00, 0x0b8002e0, 0x00b84822, 0x00288002, 0xe0a0b803, + 0x0e000880, 0x822020b8, 0x002e000b, 0x80028e04, 0x30000000, 0x00000000, + 0x4805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002d, 0x4408d806, 0x34009512, + 0x69440850, 0x029440b5, 0x00a04008, 0x13120400, 0xb1002c40, 0x0b1002c4, + 0x00a13020, 0x442b1052, 0x8480b180, 0x2c40aa12, 0x120400b1, 0x002c400b, + 0x18420201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4, + 0x00b9002f, 0x5009d202, 0x34009d00, 0x634809d0, 0x023504bd, 0x10224109, + 0xb00e6410, 0xb9002e40, 0x0b9002e4, 0x00bb2c22, 0x40289202, 0xe480b900, + 0x2e480ab1, 0x822410b9, 0x012e430b, 0x91028604, 0x60000000, 0x00000000, + 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x602c1803, 0x0720d942, + 0x3a500c9f, 0x03a600f9, 0xc0a2700c, 0x90032408, 0xf9003e40, 0x0f9003e4, + 0x00f9c0b0, 0x680f9083, 0xe700f990, 0x1e490e90, 0x0b2480f9, 0x103e500f, + 0x90032804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003e4, + 0x00f9003c, 0x500e980b, 0xe480e918, 0x3e404f98, 0x03e480f9, 0x8036500f, + 0x9483e400, 0xf9003e40, 0x0f9003e4, 0x00f1003e, 0x508fb803, 0xe608f980, + 0x3e404d90, 0x23e480f9, 0x003e650f, 0x9013ea00, 0x60000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8083e, 0x000c8003, 0xe130f040, + 0xb0001c00, 0x032002c0, 0x5220182c, 0x80116010, 0xc8003e00, 0x0f8003e0, + 0x00f8003e, 0x100c8403, 0x2100c801, 0x3e010f80, 0x836000c8, 0x003a084c, + 0x018b0a04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8, + 0x00be402e, 0x9088ac82, 0xeb80ba8c, 0x22920da5, 0x862a408a, 0x800b8008, + 0xe003bb61, 0xfa003a80, 0x0ba002e8, 0x00bec02f, 0x800fa882, 0xbb00fa01, + 0x2d984be2, 0x03a800aa, 0xa023a00d, 0xe0020a00, 0x40000000, 0x00000000, + 0x28054c00, 0xb3002cc0, 0x0b30028c, 0x00b3402d, 0x08284e02, 0xd200b442, + 0x25284844, 0x021104a4, 0xe120f05a, 0xb0120d00, 0x83002cc0, 0x0b3006cc, + 0x00b3186c, 0xc4083000, 0x0b208300, 0x2ce803b8, 0x020c0093, 0x8028e408, + 0x34424a00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002c, 0xc0887006, 0xdc04b700, 0x25c00970, 0x020f0087, 0x0629d008, + 0x30c29e00, 0xb70029c0, 0x0b7002dc, 0x00b7002c, 0xc08bf822, 0x9a20a702, + 0x2dc00bf0, 0x029e80bc, 0x8221e009, 0x30126800, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7803de0, 0x0f78039e, 0x00b7803d, 0xe00c7803, 0xde00f380, + 0x24e00838, 0x0a1e00e3, 0x8030e00e, 0x78131e02, 0x87803de0, 0x0b7803de, + 0x00f7802d, 0xe00c6817, 0x3e008780, 0x3de00f78, 0x033f50d7, 0x8039e09c, + 0x78036a02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0x404fb003, 0xec00fb01, 0x3ac00fa0, 0x43e400fa, 0x043ec00f, + 0xb003a400, 0xeb063ec0, 0x0fb003ec, 0x04f9013e, 0x400fb683, 0xec08fb00, + 0x3ec00fb0, 0x03ac80e8, 0x483cc00f, 0xb0038206, 0x60000000, 0x00000000, + 0x4005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0x600cf913, 0xfe007f90, + 0x37e04cf8, 0x433e00cf, 0x803fe04f, 0xf2017e00, 0x5f843fe4, 0x0ff803fe, + 0x00ff9037, 0xe00ef813, 0xf2003f90, 0x37e00ffb, 0x033e00cf, 0x803fa04c, + 0xf8010000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002dc, + 0x00b6002d, 0x920d5102, 0xdc00b63a, 0x21180851, 0x221800d5, 0x1925c80b, + 0x6083f800, 0xe7002dc0, 0x0e7002dc, 0x40be0029, 0xd8087202, 0xd000d711, + 0x35c00b51, 0x0a1c4084, 0x042dc0ca, 0x70022a04, 0x60000000, 0x00000000, + 0x18009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc0086186, 0xd000b502, + 0x80c00070, 0x021c2097, 0x802d011b, 0x110a1c00, 0xa7002dc1, 0x0b7002dc, + 0x00a50229, 0xc00a4086, 0xd400bf10, 0x21400b62, 0x0e1c20b7, 0x002d800a, + 0x20020000, 0x20000000, 0x00000000, 0x6014cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b2002c, 0x70093e02, 0xcc00b300, 0x20f80830, 0x020c0093, 0x0064240b, + 0x0a026400, 0xb3002cc0, 0x0a3002cc, 0x00b06128, 0xc0081c12, 0xc7009360, + 0x24700b0c, 0x060f0090, 0x902cf40a, 0x34020804, 0x30000000, 0x00000000, + 0x2815ac08, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0x600cbc03, 0xecc0fb10, + 0x32c80cb1, 0xcb2c00db, 0x902ec40f, 0xb4032c00, 0xeb003ec0, 0x0fb003ec, + 0x00f90838, 0xe00e1d03, 0xcb80f300, 0x30a80fb4, 0x133e02fb, 0x013e600e, + 0xb40b2a04, 0x60000000, 0x00000000, 0x9000ec00, 0xfb003ec0, 0x0fb003ec, + 0x00f9003e, 0xc80fa003, 0xe000f901, 0x32d00fb0, 0x23cd00fb, 0x4036c00f, + 0x9403ec00, 0x6b003ec0, 0x0fb003ec, 0x00f8003a, 0xd42d8403, 0xe900cb80, + 0x3ec01fa1, 0x83ec886b, 0x003e4087, 0x3103e000, 0x30000000, 0x00000000, + 0x8010fc00, 0xff003fc0, 0x0ff003fc, 0x00ff203e, 0x800dd903, 0xfe40f2c0, + 0x31200c1a, 0x032822d5, 0x0035c00e, 0x64033c00, 0xcf003fc0, 0x0ff003fc, + 0x00e50073, 0x000ce043, 0x3420cf00, 0x03e24cdc, 0x03fc00ce, 0x103fc20c, + 0xd1830044, 0x30000000, 0x00000000, 0x80046c00, 0xbb002ec0, 0x0bb002ec, + 0x00b9802e, 0x5008bc02, 0xed00bbc0, 0x2ae088b8, 0x22ae708b, 0x8c2ac00a, + 0x84036602, 0x8b002ec0, 0x09b022ec, 0x00b8c076, 0x200aa202, 0xa220ab00, + 0x6af80888, 0x434c00aa, 0x002cf00a, 0xb0036040, 0x10000000, 0x00000000, + 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002c, 0x4009b082, 0xec20bb41, + 0x22c408a0, 0x0224098a, 0x2422c00a, 0xb0026600, 0x8b002ec0, 0x0ab0026c, + 0x00b98522, 0xe1089202, 0x22008b02, 0x220808b0, 0x02ec0089, 0x082e8608, + 0xb0822000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc, + 0x00b0042e, 0xc0083002, 0xcc00b300, 0x28c02a38, 0x028c0183, 0x0028c16a, + 0x006a0001, 0x83002cc0, 0x093002cc, 0x00b00024, 0xc10a8006, 0xa000ab00, + 0x2a800800, 0x026c1021, 0x042e400a, 0x30024201, 0x00000000, 0x00000000, + 0x800d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc08db003, 0xec00fb00, + 0x22c00cb0, 0x432c00db, 0x0032000e, 0x80026400, 0xcb003ec0, 0x0fb003ec, + 0x10e90022, 0x000c8003, 0x2000cb00, 0x22400c00, 0x03dc00c8, 0x003ec00c, + 0xb0230003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc, + 0x00fc003f, 0x0003c033, 0xf000fc00, 0x3f0109c0, 0x03f0003c, 0x003f000f, + 0xc003f400, 0xff003fc0, 0x0df002fc, 0x00fc001d, 0x008fc023, 0xf000f702, + 0x0f400fc0, 0x033c00fc, 0x003dc04f, 0xf003e806, 0x70000000, 0x00000000, + 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00fc6837, 0xe00ff203, 0x3f00cc90, + 0x37200cc2, 0x035e00de, 0x21330d0c, 0xc2033080, 0xfc103304, 0x2c410372, + 0x00dcc033, 0x200fc803, 0x1600ff00, 0x3fe14ff9, 0x03fe00ff, 0x803fe00f, + 0xf803f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb802ee, + 0x10b04022, 0xe08bfd02, 0x2c808120, 0x2a210a93, 0x0aac908a, 0xc0361028, + 0x8c02a300, 0xb0402018, 0x0d860200, 0x00890028, 0x000b0002, 0x26009f30, + 0x2ee00bb2, 0x02ee00bb, 0x802ee10b, 0xb802f004, 0x30000000, 0x00000000, + 0xc805cc00, 0xb3002cc0, 0x0b3002cc, 0x00b12024, 0xc00a3042, 0x0c00a800, + 0x26008810, 0x824020b2, 0x10240408, 0x21020040, 0xb0402010, 0x08140204, + 0x00920020, 0xc00a0002, 0x0400b30e, 0x2cc00a32, 0x02cc00a3, 0x002cc00b, + 0x3802f201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec, + 0x00ba0022, 0xc00bb002, 0x0c00a880, 0x22a00a10, 0x0aec01aa, 0x08660008, + 0xa0022020, 0xb8022200, 0x08900224, 0x0083002a, 0xc00b8022, 0x2468bb00, + 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xb002f004, 0x60000000, 0x00000000, + 0x0015ec00, 0xfb003ec0, 0x0fb003ec, 0x00f98836, 0xc00e300b, 0x2c00e1e1, + 0x36208ca8, 0x036c20f2, 0x4036448c, 0x900b2900, 0xf980b202, 0x08a00b20, + 0x40d80032, 0x004ea20b, 0x2700bb00, 0x2ec00fb0, 0x03ec00eb, 0x003ed00f, + 0xa003e104, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff003fc, + 0x00fc903f, 0xc00ff003, 0xfc02dd08, 0x3f00afe1, 0x13bd02de, 0x003e620f, + 0xd003f800, 0xfd903d04, 0x0f6083f2, 0x00fd003f, 0x000fe083, 0xf400df00, + 0x3fc00ff0, 0x13fc00ff, 0x003f400f, 0xc003e800, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb003ec0, 0x0fb0036c, 0x00d1603a, 0xc00fb007, 0xac80f800, + 0x3a400ea0, 0x03ac08da, 0x4030400c, 0x3007e940, 0xc1203200, 0x2cb10366, + 0x00ca103a, 0xe04ea80a, 0x2510cf00, 0x3ec00fb1, 0x03ec00fb, 0x003ec20f, + 0xa003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec, + 0x00ba0022, 0xc09bf542, 0x2c20b824, 0x34d048a5, 0x022dc05a, 0x58364808, + 0xb006e800, 0x89002208, 0x2db80226, 0x008b8032, 0xe40dac02, 0x2400df00, + 0x2ec00bb0, 0x02ec00bb, 0x002e700b, 0x8002f600, 0x40000000, 0x00000000, + 0xe0054c00, 0xb3002cc0, 0x0b3002cc, 0x00b24028, 0xc00b3002, 0x8f009200, + 0x28162a04, 0x12a10003, 0x00248028, 0x0006c610, 0x02c120c0, 0x48004268, + 0x02808028, 0x000a9402, 0x08008300, 0x28c00b38, 0x02cc00b3, 0x002ce00b, + 0x3002f800, 0x50000000, 0x00000000, 0xe0011e00, 0xb7802de0, 0x0b7802de, + 0x00b68021, 0xe00b7802, 0x1e00b690, 0x27280838, 0x123e0097, 0x8025a008, + 0x4802d400, 0x86b021e0, 0x0948021a, 0x00858061, 0x24095802, 0x3a009790, + 0x2de00b78, 0x02de00b7, 0x802da00b, 0x7c02fc00, 0x40000000, 0x00000000, + 0x48080c00, 0xf3003cc0, 0x0f3002cc, 0x40f30038, 0xc00b3042, 0x8c00d010, + 0x38800e10, 0x0b8c0083, 0x2034800c, 0x2102c440, 0x8228b0c4, 0x0810034c, + 0x00ca0038, 0xc40e1103, 0x0840c310, 0x3cc00f30, 0x03cc00f3, 0x003cd20f, + 0x3003d202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc, + 0x00ff513f, 0xc04f7003, 0xfc003d14, 0x3d884ff4, 0x03fc00f7, 0x003f840f, + 0xe003d4c0, 0xfe203fc4, 0x0fd103fc, 0x00ff1033, 0xc40fd143, 0xfa40ff10, + 0x3fc00ff0, 0x03fc00ff, 0x013f800f, 0xf003d006, 0x60000000, 0x00000000, + 0xa805ec00, 0xfb003ac0, 0x0fb003ec, 0x00fb4032, 0xc00fb003, 0xae00c800, + 0xb2008fa0, 0x0b2c008b, 0x9036c00c, 0x9103ac40, 0xcb1032c4, 0x0fa10328, + 0x00d88032, 0x000db003, 0xe800ff20, 0x32c00fb0, 0x03ec00fb, 0x003ec00f, + 0xb003ea00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7002dc, + 0x10b30421, 0xc00b7502, 0xfc00a400, 0x21000a30, 0x021c0083, 0x8021e008, + 0x5a12ce80, 0x87a021e0, 0x0b680218, 0x008500a1, 0x01087002, 0xd800b312, + 0x21c00b70, 0x02dc00b7, 0x002d000b, 0x5002f024, 0x60000000, 0x00000000, + 0x80009e00, 0xb78029e0, 0x0b7802de, 0x00b78021, 0xe01b7802, 0x9e008780, + 0x27e00b78, 0x129f0987, 0x8029ec09, 0x7a02de80, 0x838029e0, 0x0b78021e, + 0x009e8021, 0xe0097802, 0xda00b7b0, 0x21e00b78, 0x02de00b7, 0x802de00b, + 0x7802e000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b30020, 0xc05b3006, 0xcc10a380, 0xa4c00a3f, 0x028c0283, 0x0228c029, + 0x3002ce18, 0x830028c0, 0x0bb1422c, 0x00830020, 0xc0083842, 0xc800bb00, + 0x20c00b30, 0x02cc00b3, 0x016c000b, 0x1102d304, 0x30000000, 0x00000000, + 0xe815a800, 0xfa003a80, 0x0fa003e8, 0x00fa10b2, 0x800fa003, 0xa800ce00, + 0xb7808fa0, 0x03b800ca, 0x00ba942d, 0xa403aa82, 0xca40ba81, 0x0fa80b28, + 0x00da0032, 0x800daa03, 0xe800ba00, 0xa2800fa0, 0x03e800fa, 0x003e880f, + 0xa803fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0, + 0x00f8003e, 0x000f0003, 0xe100f810, 0x3a120f80, 0x036090e8, 0x4036000e, + 0x8083e000, 0xf80a1400, 0x0f8003e0, 0x04f8003e, 0x000f8003, 0xf000f800, + 0x3e000f80, 0x03e000f8, 0x003e100f, 0x8803d200, 0x30000000, 0x00000000, + 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00eba032, 0x400f9203, 0xa600f908, + 0x3e410cb0, 0x03e400e9, 0x2006600c, 0x10030400, 0xc9003250, 0x4c940326, + 0x00c9013e, 0x504c9013, 0x2400f900, 0x32400f90, 0x03e400f9, 0x003e400f, + 0x9003c204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4, + 0x00e9c022, 0x400e9a0a, 0x2600b940, 0x204c0891, 0x022740cd, 0x002f6008, + 0xd0023400, 0x8d40a360, 0x28d81225, 0x0089002e, 0x50089c02, 0x2404b900, + 0x22400b90, 0x02e410b9, 0x012e580b, 0x9002e000, 0x10000000, 0x00000000, + 0x18012400, 0xb9002e40, 0x0b9002e4, 0x00a14022, 0x400b9002, 0x2460b108, + 0xee402830, 0x0a8420a9, 0x00254618, 0xd0023400, 0x95002340, 0x48d00234, + 0x408d802d, 0x40085102, 0x3400b900, 0x22400b90, 0x02e400b9, 0x002f400b, + 0xd002c600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1006c4, + 0x00a11020, 0x400a1002, 0x0440b110, 0x24400811, 0x02044181, 0x002d4428, + 0x500a1410, 0x9713a1c4, 0x08510a16, 0x42859025, 0x64285902, 0x1400b128, + 0x20400b11, 0x02c400b1, 0x042d400b, 0x5842c201, 0x00000000, 0x00000000, + 0xb80d6000, 0xb8003e00, 0x0f8003e0, 0x00e868b2, 0x000b8283, 0x2100f040, + 0x3e000c86, 0x838100ea, 0x28341a0c, 0x828320a2, 0xd868321a, 0x0c868301, + 0x08c8403c, 0x100c840b, 0x3000f8a0, 0xb2000f84, 0x03e000f8, 0x003e000f, + 0xc003ce03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4, + 0x00f9201e, 0x400e9003, 0xe484fd22, 0x39400f92, 0x03f480e9, 0x023e480f, + 0x9003e400, 0xe9a23e68, 0x0f1a03e4, 0x88f1203e, 0x480f9203, 0xe404f9a8, + 0x3e400f92, 0x03e400f9, 0x003e400f, 0x9003e606, 0x70000000, 0x00000000, + 0x9805e400, 0xf9003e40, 0x0f9003e4, 0x00f91032, 0x410fd003, 0x3440c900, + 0x33400dd1, 0x0374028d, 0x0033450c, 0x9003f404, 0xf914b240, 0x0c100334, + 0x00dd003f, 0x400fd003, 0x2400dd00, 0x32400fd0, 0x03e400f9, 0x003e400f, + 0x9003c600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0, + 0x00ba10a2, 0x008b8000, 0x2080a008, 0x22000801, 0x02a0a488, 0x0022084d, + 0x8022e008, 0xb802220a, 0x08c20220, 0x0088002e, 0x804b8002, 0x2010b800, + 0x22000b80, 0x03e000b8, 0x002e000b, 0xc002de04, 0x30000000, 0x00000000, + 0x4805c400, 0xb1002c40, 0x0b1002c4, 0x00b10020, 0x400b1002, 0x04808120, + 0x22400910, 0x02c48181, 0x002c480a, 0x1002c400, 0xb5002149, 0x08d29204, + 0x0491012c, 0x410b1002, 0x0400b100, 0x20400b10, 0x02c400b1, 0x002d400b, + 0x5002d201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4, + 0x10b10022, 0x400bb002, 0x2400a188, 0x22600990, 0x02acb189, 0x0026408b, + 0x9202e400, 0xb10623c0, 0x88d0020d, 0x0089002e, 0xc80b9002, 0x2400b902, + 0x22400b90, 0x02e400b9, 0x002f400b, 0xd002c604, 0x60000000, 0x00000000, + 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f94032, 0x400f900b, 0x2400c900, + 0xb2580d90, 0x83e502c9, 0x043e402e, 0x9003e404, 0xf900b240, 0x2c948334, + 0x00d9802f, 0x504fd00b, 0x2400f900, 0xa2400f90, 0x03e400f9, 0x003e400f, + 0x9003e804, 0x30000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003e4, + 0x08fb203e, 0x400f1003, 0xe400fb00, 0x3e420e90, 0xa3a600f9, 0x083a420d, + 0x9023e400, 0xf9083e42, 0x0f904be4, 0x20f9203e, 0x400f9003, 0xe400f100, + 0x3e400f90, 0x03a400f9, 0x003e404f, 0x9003fa00, 0x20000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f840b2, 0x000f8003, 0xe080f800, + 0x3a108c84, 0x0ba020c0, 0x003e000c, 0x8043e040, 0xc8103200, 0x2cc40b20, + 0x10f8083a, 0x102e8041, 0x2000f800, 0xb2000f80, 0x03e000f8, 0x003e000f, + 0x8003ca04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8, + 0x00ba6022, 0x800be902, 0xf800baf0, 0x21b20dec, 0x123b20ce, 0xa00f8008, + 0xa003aa02, 0x8a002280, 0x0d640238, 0x80be482f, 0x8008e003, 0x6800ba00, + 0x22800ba0, 0x026800ba, 0x012e804b, 0xa882ca00, 0x00000000, 0x00000000, + 0x28054c00, 0xb3002cc0, 0x0b30028c, 0x00b30820, 0xc01b3c02, 0xee109340, + 0x68d108b8, 0x02ac0493, 0xc40ed000, 0x30068e00, 0x83c022c0, 0x883b020c, + 0x01b2402c, 0xc00ab002, 0x0c00b102, 0x20c00b10, 0x02cc00b3, 0x002c000b, + 0x0002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc, + 0x00b70021, 0xc00b6086, 0xdd00b700, 0xa1c00970, 0xc23c0087, 0x802dc208, + 0x70029600, 0x8700a140, 0x09701214, 0x80b6002d, 0x68085202, 0x5c00b520, + 0x21c00b74, 0x025c10b7, 0x002dc00b, 0x5002c800, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7803de0, 0x0f78039e, 0x00b38031, 0xe00b5803, 0xde00d690, + 0x29e00c78, 0x239e0297, 0x003fe02c, 0x78038e00, 0xcf8023a0, 0x0c78031b, + 0x00f7803f, 0xa00eec03, 0x1e00f590, 0x31e00f58, 0x23de00f7, 0x803d600f, + 0x5803ca02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec, + 0x00fa4826, 0xc00f8003, 0xe4007a40, 0x3cc003b0, 0x03cc00fb, 0x003ec00f, + 0xb003a400, 0xfb003e00, 0x0fb003e2, 0x00f9003e, 0x240f8803, 0xec00f540, + 0x3ec00fb0, 0x03ec00fb, 0x043ec00f, 0x9003c206, 0x60000000, 0x00000000, + 0x4005fe00, 0xff803fe0, 0x0ff803fe, 0x00fe803f, 0xe00fc803, 0x3e00cf80, + 0x33e10dc8, 0x0b3e004f, 0x903fe00f, 0xf113f600, 0x7e80b3e0, 0x0cc80b3e, + 0x08f78033, 0xe00ef803, 0xfe00fd88, 0x3fe40ff9, 0x03fe00ff, 0x812f240c, + 0xe803d000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002dc, + 0x00b6002d, 0xc00b5002, 0x38028400, 0x21d808c0, 0x4a1c4287, 0x002dc40b, + 0x70039c00, 0xbf002340, 0x0ac00214, 0x00b700b7, 0x410a5402, 0xdc08f501, + 0x2dc00b70, 0x02dc44b7, 0x002dc208, 0x7002ea04, 0x60000000, 0x00000000, + 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b4002d, 0xc00b6002, 0x1c009600, + 0x23c03941, 0x02100087, 0x046d000b, 0x7106d400, 0xb6002180, 0x09490210, + 0x40bf0021, 0x84086002, 0xdc00b500, 0x2dc05b70, 0x42dc00b7, 0x002f4088, + 0x7082c000, 0x20000000, 0x00000000, 0x6014cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b0002c, 0xc00b3012, 0x00009040, 0x20e0888a, 0x22002083, 0x022e008b, + 0x30028c00, 0xba052000, 0x0b800200, 0x00b34020, 0x000a0002, 0xcf80a102, + 0x2cc05bb0, 0x02cc00b3, 0x002cf008, 0x3802d804, 0x30000000, 0x00000000, + 0x2815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb303e, 0xc00f900b, 0x2c00db00, + 0xb2e20db4, 0xcb2f06cb, 0x002ec00f, 0xb003ec00, 0xf900b2c0, 0x2db0032c, + 0x00fb1022, 0xc00cb003, 0xed80bd00, 0x2ec00f90, 0x03ec00fb, 0x003e900c, + 0xa803ca04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0fb003ec, + 0x00fb403e, 0xc00f8403, 0xec08ed08, 0xbed00fa4, 0x03e140fb, 0x003e000f, + 0xb023c400, 0xfb003ec0, 0x8eb403e5, 0x00fb007e, 0x000f8003, 0xec10fd00, + 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, 0xb003e000, 0x30000000, 0x00000000, + 0x8010fc00, 0xff003fc0, 0x0ff003fc, 0x00fd203f, 0xc00f8003, 0xfa00cea0, + 0xbbc42cd8, 0x033e00ff, 0x003fc00c, 0xf003fc00, 0xcd1033e0, 0x0cf42338, + 0x04ef013f, 0x104fc003, 0x3c00fd00, 0x03c00fd0, 0x033c00ff, 0x003ee20c, + 0xfa03c044, 0x30000000, 0x00000000, 0x80046c00, 0xbb002ec0, 0x0bb002ec, + 0x00b8082e, 0xc00b8802, 0xe020d880, 0x20a00981, 0x832100ba, 0x802e0408, + 0xb002e40a, 0x8b02a270, 0x2dbe0221, 0x0089602e, 0x100b8402, 0x2c00b904, + 0x22c00bb9, 0x02ac00bb, 0x002ee008, 0xb002e000, 0x10000000, 0x00000000, + 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc00b8802, 0xc4418300, + 0x2ac009b0, 0x0a2c40bb, 0x502ed008, 0xb002a404, 0x880020c4, 0x08b00208, + 0x00ab002e, 0xc00b3202, 0x2c00b100, 0x2ac00b90, 0x026c00bb, 0x002c8808, + 0xa002e000, 0x50000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc, + 0x00b3006c, 0xc00b1002, 0xc0009000, 0x22408920, 0x020000b0, 0x002c0008, + 0x3002cc04, 0xa100a0c0, 0x09300a00, 0x0083002c, 0x00090002, 0x0c00b100, + 0xa8c00b10, 0x02cc00b3, 0x042ec108, 0x3002c204, 0x00000000, 0x00000000, + 0x800d6c00, 0xfb003ec0, 0x0bb003ec, 0x00f9002e, 0xc00f8003, 0xe000c200, + 0x3a000c90, 0x030000b9, 0x003e000c, 0xb003a400, 0xc800b280, 0x2c900320, + 0x00eb003e, 0x004f800b, 0x2c00fd00, 0x3ac00f90, 0x0b6c00fb, 0x003ec00c, + 0xb003c002, 0x10000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc, + 0x00fc003f, 0xc00fc003, 0xf004fc01, 0x3dc04ec0, 0x03b000ff, 0x003f000f, + 0xf001fc08, 0xdc023f00, 0x0ed003f0, 0x00ff003f, 0x000fc003, 0xfc00fd00, + 0x37c00fd0, 0x03bc00ff, 0x003fc00f, 0xf003e804, 0x70000000, 0x00000000, + 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0x200cc803, 0xf600ed80, + 0x3fe00fc2, 0x037e00df, 0x80b5200f, 0xd803fa00, 0xcf803fe0, 0x0fc00334, + 0x00cc803f, 0x204fe823, 0xf200cc80, 0x2d604c78, 0x0330d0cc, 0x823f102c, + 0xc2237000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb802ee, + 0x00bb842e, 0xa008b802, 0xe600a980, 0x2ee10b88, 0x02ae008b, 0x8422a00b, + 0xb802ea00, 0xdb802ee0, 0x0b800a24, 0x00a8802e, 0xa003b842, 0xee028b80, + 0x2e6028b8, 0x02a180a8, 0x802c1428, 0x86022004, 0x30000000, 0x00000000, + 0xc805cc04, 0xb3012cc0, 0x1b3002cc, 0x00b30028, 0x40083012, 0x8400a004, + 0x2cc00b04, 0x0a8c0093, 0x00208003, 0x1006e400, 0x93002cc0, 0x0b000204, + 0x0082000c, 0x001b3022, 0xe0008300, 0x6c400830, 0x0200c082, 0x002c0808, + 0x23868201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc028b002, 0xe6108988, 0x6ec00bb0, 0x10ac008b, 0x0022a009, + 0xb812ee00, 0x9b002ec0, 0x0b980226, 0x01aa002e, 0x100bb002, 0xec008b29, + 0x2e000890, 0x02a400aa, 0x082e0208, 0xb002b004, 0x60000000, 0x00000000, + 0x0015ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc04c8003, 0xeb20eb80, + 0x3ec00f88, 0x038c10db, 0x0032220f, 0x9883ce00, 0xdb003ec0, 0x0f8c0323, + 0x30c9803e, 0x300fb483, 0xe004c8c0, 0x3cd02cb0, 0x032004c9, 0x923e100c, + 0x8c03c804, 0x70000000, 0x00000000, 0xa001bc00, 0x7f003fc0, 0x0ff003fc, + 0x00ff003f, 0xc20ff003, 0xf800ff01, 0x3fc00f79, 0x03bc00ff, 0x003b800f, + 0xd003fc00, 0xff003fc0, 0x0f8003dc, 0x007d223f, 0x890ff043, 0xfa48ff02, + 0x2fd00ff9, 0x03dc90fd, 0x8025c60f, 0x49037800, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb007e, 0xc00fb003, 0x2408f800, + 0x7ee00f85, 0x032c08fb, 0x003e000c, 0x9403ec08, 0x7b003ec0, 0x0f840ba0, + 0x00f9103e, 0x141fb403, 0xe400fb54, 0x32542cb1, 0x032900c9, 0x483ed02c, + 0x840b7004, 0x20000000, 0x00000000, 0xd8052c00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002c, 0xd00bbe02, 0x02009900, 0x2ec40bb4, 0x036c5083, 0xc12ee028, + 0x9003ec00, 0xbb0026c0, 0x0b9a162e, 0x80b9522e, 0x144bb462, 0xcd44bb04, + 0x36c42a38, 0x036c00d9, 0xc22ed85d, 0x970a3200, 0x40000000, 0x00000000, + 0xe8054c00, 0xb3002cc0, 0x0930024c, 0x00b3002c, 0x300b0602, 0x0440b100, + 0x24c00b04, 0x828c0483, 0x88246008, 0x0002c800, 0xb3002cc0, 0x49900204, + 0x20b0802c, 0x600b3e02, 0xc100b3c8, 0x24d00838, 0x02008090, 0xd02c0009, + 0x10023000, 0x50000000, 0x00000000, 0xf0011e00, 0xb7802de0, 0x0b7802de, + 0x00b7802d, 0xa20bf802, 0x1709b580, 0x2de04b48, 0x0a5e0187, 0x882df088, + 0x6802da00, 0xb78025e0, 0x0b580216, 0x00b4802d, 0xe00b7802, 0xd620bf80, + 0x25a80a58, 0x064a2094, 0x802de089, 0x09021800, 0x40000000, 0x00000000, + 0x48080c00, 0xf3003cc0, 0x0f3003cc, 0x00f3002c, 0x400f3003, 0x0480f000, + 0x2cc14f32, 0x038c80e3, 0x003c860c, 0x0003cc04, 0xf3007cc0, 0x0f140284, + 0x00f2002c, 0xc00b3183, 0xc804b320, 0x34c18c31, 0x030d00d3, 0x003cc80c, + 0x35431a02, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc, + 0x00ff002f, 0xc00f700b, 0xfc009e00, 0x3fc00f70, 0x035c02ef, 0x003f800f, + 0xf003bc00, 0xff0037c0, 0x4ff003f4, 0x00fe003f, 0xc00ff043, 0xfc00f700, + 0x2f880bd0, 0x17fc00ff, 0x013fc01f, 0xf1039006, 0x60000000, 0x00000000, + 0xa805ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb007c, 0xe00e0803, 0x2800fb00, + 0x1ce00cb0, 0x032c00fb, 0x013ec00f, 0x9023ec00, 0xfb003ec0, 0x0fb00226, + 0x00db283a, 0x5c4fb0a2, 0xc100db00, 0x3ec02eb0, 0x03e400da, 0x283e001c, + 0xb0012a00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7046d, 0xc0087002, 0x1c00b700, 0x0dc02870, 0x021c00b7, 0x002dc00b, + 0x5002dc00, 0xb7042dc0, 0x0bf0037c, 0x0087412d, 0xc20b7002, 0xd0208700, + 0x2dc02870, 0x12cc0086, 0x602cc00a, 0x20023204, 0x60000000, 0x00000000, + 0x80009e00, 0xb7802de0, 0x0b7802de, 0x00b7802f, 0xe08b7802, 0x5600b588, + 0x2de00838, 0x029e00b7, 0x8029a00b, 0x6806de00, 0xa7802de0, 0x0b78021a, + 0x0087e06d, 0xe80b7802, 0xfe089780, 0x2de00a78, 0x02de0897, 0x802de038, + 0x78223000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xf4093002, 0x4c00b360, 0x24c00a35, 0x028c00b3, 0x002ce00b, + 0x3622cd00, 0xb3002cc0, 0x0b30024c, 0xc283082c, 0xc00b3406, 0xcc008304, + 0x6cd40a39, 0x02ce8093, 0x002cd00a, 0x38021204, 0x30000000, 0x00000000, + 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fa003f, 0xb00fe003, 0x7a00fec0, + 0x1e808c6c, 0x4b8800fa, 0x013fa00f, 0xe483f804, 0xfa043e80, 0x0fe2033a, + 0x00da803e, 0x804fa403, 0xc840de00, 0x3da02ea8, 0x03fb80da, 0x883fa02c, + 0xe00b3a04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0, + 0x00f8003e, 0x120e800b, 0xa2407800, 0x1e100d84, 0x836000f8, 0x003e340f, + 0x800360c0, 0xf8003e00, 0x0f8003e0, 0x00f8403e, 0x000f8203, 0xe000f800, + 0x3e100584, 0x23e100e8, 0x063e1c0f, 0x8103d200, 0x30000000, 0x00000000, + 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x600f9803, 0xe408f900, + 0x3a600f91, 0x03a508c9, 0x0022500f, 0x90032400, 0xc9003e40, 0x0f1a0724, + 0x00f9003e, 0x400fb803, 0xec80c912, 0x326a0c90, 0x03c640c9, 0x082c602c, + 0x9a030204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x740b9c82, 0xe500b100, 0x36720e90, 0x03e70081, 0x0022508b, + 0x10034400, 0xa9002e40, 0x0b9882a7, 0x00bb402e, 0xc08b9502, 0xe700a144, + 0x76400a90, 0x02e5008b, 0x402e4088, 0x980b6000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x401b9202, 0xe448b900, + 0x26484bb0, 0x42240289, 0x1022504b, 0x90022400, 0x89002e40, 0x09900224, + 0xa0b9002e, 0x400b9080, 0x64248940, 0x22c00890, 0x02e40089, 0x282e4a48, + 0x10020600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4, + 0x00b1002c, 0x400b1006, 0xcc11b904, 0x20408a10, 0x02c40081, 0x0028400b, + 0x90226400, 0xa1002c40, 0x0b110284, 0x40b3002c, 0x410b1022, 0xc400a901, + 0x26400a10, 0x02c44081, 0x006c4408, 0x310a4201, 0x00000000, 0x00000000, + 0xb80d6000, 0xf8003e00, 0x0f8002e0, 0x00b8002e, 0x800f8023, 0xe004f800, + 0x26000fa2, 0x83a800c8, 0x0032000f, 0x80032000, 0xc8003e01, 0x4f868221, + 0xa0f8003e, 0x000f8013, 0xe010c800, 0x228008a0, 0x03e9a2c8, 0x003e1a0c, + 0x86830e03, 0x10000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4, + 0x00f9003f, 0xc003f013, 0xf400ff00, 0xbe400ef0, 0x03e40039, 0x00b7400f, + 0xd003f400, 0xf9003e40, 0x0fd243f4, 0x80f9003e, 0x400f9003, 0xe400ff01, + 0x3d400fd0, 0x01f480f9, 0x003f480f, 0xd203e607, 0x60000000, 0x00000000, + 0x9805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003f, 0x400ed003, 0xf400c900, + 0x37400fd0, 0x0b3412cd, 0x003f410f, 0x9003c400, 0xc9003e40, 0x0fd28314, + 0xc049003e, 0x400fd003, 0x3400cd00, 0x3f400fd0, 0x02f412c9, 0x043f480d, + 0xd2830600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0, + 0x00b8001a, 0x00088022, 0xe8008802, 0x2e000b81, 0x0be00088, 0x003a800b, + 0x8043a000, 0x88002e00, 0x03a20360, 0xc8a8002e, 0x00038002, 0x20008800, + 0x0e000880, 0x12c020a8, 0x042e8a08, 0x82028e04, 0x30000000, 0x00000000, + 0x4805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002e, 0x400a1002, 0xe4008100, + 0x6c411b10, 0x02040081, 0x022c400b, 0x1002e409, 0x81002c40, 0x43128204, + 0x80810028, 0x400b9012, 0x24008100, 0x2c403a10, 0x02cc40a1, 0x002c4c18, + 0x12868201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x40489002, 0xe4008900, 0x0e400b90, 0x02e40009, 0x002a4419, + 0x9292a540, 0x89002e40, 0x4bb00264, 0x20a9142e, 0x400b9022, 0x24008901, + 0x2e406890, 0x42e580a9, 0x600ec408, 0x95028604, 0x60000000, 0x00000000, + 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9003c, 0x500e9903, 0xc750c980, + 0x3e404f94, 0x03040049, 0x003e400f, 0x9423e702, 0xc9003e40, 0x1f9c0326, + 0x40c9043e, 0x640f9203, 0x2620c910, 0x3c760e98, 0x33e600e9, 0x403e402d, + 0x9c0ba804, 0x20000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003e4, + 0x00f9003a, 0x420f9883, 0xe402f922, 0x3e400f91, 0x826400f9, 0x003a400f, + 0x9003a600, 0xf9003e40, 0x0f1983e4, 0x00f9003e, 0x400f900b, 0xe482d900, + 0x3e608e92, 0x80e400f9, 0x8036400f, 0x9803ea00, 0x20000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x101f8003, 0xe080f840, + 0x3e01c700, 0x432010d8, 0x003e104f, 0x8423e000, 0x48003e00, 0x0f8103e0, + 0x00c8043e, 0x001d8483, 0x2130f860, 0x32110c80, 0x23e028c8, 0x083e000f, + 0x840b0a04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8, + 0x00ba002f, 0xa20be482, 0xfa00ba04, 0x2f820be4, 0x037b80ce, 0x000fb209, + 0xa0038800, 0xda002680, 0x0bec02f8, 0x008a802e, 0xb64b6c02, 0x1800be01, + 0x2ba80ae0, 0x00f8025a, 0x412f9088, 0xec020a00, 0x00000000, 0x00000000, + 0x28054c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc00b301, + 0x2ce80320, 0x024e28b1, 0x002cf80b, 0x30008c00, 0x93002cc0, 0x0b3802ee, + 0x0083802c, 0xf00b380a, 0x0c50b3d2, 0x60c00938, 0x40ad0083, 0x402eed0a, + 0xbe024a00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xdd09b700, 0x2dc00964, 0x225c00a7, 0x082dc04b, + 0x7002bc00, 0x970025c0, 0x0b7002dd, 0x0087082d, 0x800be08a, 0x1c00b780, + 0x29400b74, 0x42dc0097, 0x002cc008, 0x30824800, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7803de0, 0x0f7803de, 0x00f7802d, 0xe00b5803, 0xd200f780, + 0x2de00b28, 0x235e00f7, 0x803d600f, 0x78039e00, 0xd7803de0, 0x0f7803de, + 0x02c7803d, 0xe40b7827, 0x1e04f780, 0x31e00d78, 0x039e10c5, 0x803de01e, + 0x78034a02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0x000fa033, 0xec00fb02, 0x3e808fa0, 0x02c808db, 0x003ec04d, + 0xb003ac00, 0xfb0036c0, 0x0f9003e0, 0x10fa4c2e, 0x990f3003, 0xe408f300, + 0x3c0006b0, 0x23e800ba, 0x4c7e408e, 0xb0038206, 0x60000000, 0x00000000, + 0x4005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0x200ff803, 0xfe487f80, + 0x1fa40fe8, 0x031e04ef, 0x923fa00c, 0xf303de00, 0xdf803fe0, 0x0ff90336, + 0x00cd8037, 0xe02cf842, 0x3e40cf92, 0x33e00cf9, 0x03fec0ce, 0x823fe00c, + 0xf8211000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7012d, 0x400b5002, 0xd450b718, 0x25900b72, 0x435c0087, 0x040d5006, + 0x71039c00, 0xc7002dc0, 0x0bf002b4, 0x20a5002d, 0x40084103, 0x5c40d732, + 0x35440d71, 0x12f440a7, 0x002dc828, 0x62022a04, 0x60000000, 0x00000000, + 0x10009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0x800b5002, 0x9401b700, + 0x2dc01b50, 0x065c00a7, 0x000f4209, 0x7082bc00, 0x97002dc0, 0x0b402214, + 0x00850027, 0xc0087002, 0x9c209704, 0x23d20870, 0xc65c8194, 0x002d8088, + 0x50060000, 0x20000000, 0x00000000, 0x6814cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0x000b1482, 0xc640b30c, 0x24018b34, 0x264c0083, 0x002c600a, + 0x3c828c00, 0x83002cc0, 0x0b040281, 0x00a0002c, 0x40083486, 0xcf209310, + 0x24a04938, 0x06c240b2, 0x012e3008, 0x84021804, 0x30000000, 0x00000000, + 0x3815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0x400f8e03, 0xe540fb80, + 0x3e800fa7, 0x036c00eb, 0x003c440d, 0xb403ac00, 0xdb003ec0, 0x0f9c032d, + 0x40ca0036, 0x620c3003, 0xab00da40, 0x32d00cb8, 0x03ef00db, 0x003ec22c, + 0xb10b0a04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0x700fb403, 0xec007b00, 0x36100fa4, 0x03ec10fa, 0x403e800f, + 0xb043ac40, 0xfb003ec0, 0x0f9103ed, 0x00f8013e, 0x000f8401, 0x6d00f920, + 0x3ec00fb4, 0x03cc20e9, 0x003e804f, 0x9403e000, 0x30000000, 0x00000000, + 0x8010fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00fc003, 0x3001ff00, + 0x3fc00fa0, 0x237400ff, 0x107f400c, 0xf001fc00, 0xcf003fc0, 0x0f408331, + 0x00ff4237, 0x400ff003, 0x3000fe40, 0x3fc00df0, 0x033600cd, 0x803bf204, + 0xa0030044, 0x30000000, 0x00000000, 0x80006c00, 0xbb002ec0, 0x0bb003ec, + 0x00bb002e, 0x600b2822, 0x2f20bb00, 0x2e308b26, 0x022208ba, 0x603ed00d, + 0xb002cc00, 0x8b002ec0, 0x0b8c0362, 0x20b04222, 0x348b9d02, 0xa760b9c0, + 0x2ca0483f, 0x22a30280, 0x8422100d, 0x8c032040, 0x10000000, 0x00000000, + 0x80052c05, 0xbb022ec0, 0x0bb002ec, 0x00bb002e, 0x620b9882, 0x2200bb00, + 0x2ea01ba0, 0x026e00bb, 0x002e2008, 0xb002ec00, 0x8b002ec0, 0x0b980224, + 0x00ba0826, 0x9009b402, 0x2801b808, 0x2ee009b0, 0x2269808a, 0x102a400a, + 0xb2822000, 0x50000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0x400b9002, 0x0400b300, 0x2c800b20, 0x020c00b2, 0x00280009, + 0x3002ec02, 0x83002cc0, 0x0b100244, 0x00b80120, 0x010b1002, 0x8c00b100, + 0x2cc00890, 0x06c00189, 0x0060002b, 0x00020200, 0x00000000, 0x00000000, + 0x800d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00f9002, 0x2000bb00, + 0x3ec00f80, 0x036c00fb, 0x042e400c, 0xb003ec00, 0xcb003ec0, 0x0f800320, + 0x08fb0036, 0x800fb013, 0x2400bb00, 0x2ec00da0, 0x036010c8, 0x0038004e, + 0x800b0002, 0x10000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003bc, + 0x00ff003f, 0x400bd00b, 0xf400ff00, 0x3f000fe0, 0x01fc00fe, 0x003d400f, + 0xf007fc00, 0xdf003fc0, 0x0fc003f0, 0x00fc003d, 0x008f5003, 0xd400f500, + 0x1d800fc0, 0x03b008fc, 0x043f000d, 0xc003a806, 0x70000000, 0x00000000, + 0xc005fe00, 0xff802fe0, 0x0fec0312, 0x00ff803f, 0xe00ff803, 0xfe00ff22, + 0x37400cc4, 0x03f064dc, 0x1021200d, 0xe8033e00, 0xfc8035c8, 0x0cd90336, + 0x00ff803f, 0xe00ff803, 0xfe02cf80, 0x3fe00ff8, 0x03fe00ff, 0x803f600c, + 0xf803f000, 0x70000000, 0x00000000, 0xc000ee00, 0xbb802ee0, 0x0b220a22, + 0x00bb802e, 0xe00bb802, 0xee00bf90, 0x22700894, 0x02e58889, 0x603a002c, + 0xa8222200, 0xb9843ee4, 0x0a92022e, 0x00bb802e, 0xe00bb802, 0xee008b80, + 0x2ee00bb8, 0x02ee00bb, 0x802e400d, 0xb802e000, 0x30000000, 0x00000000, + 0xc805cc00, 0xb3002cc0, 0x0ba00240, 0x00b3002c, 0xc00b3002, 0xcc00b300, + 0x20500906, 0x02c00491, 0x42620008, 0x10020400, 0xb98020c1, 0x08900204, + 0x00b3002c, 0xc00b3002, 0xcc008300, 0x2cc00b30, 0x02cc00b3, 0x002e4008, + 0x3002c201, 0x60000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0ba00262, + 0x18bb002e, 0xc00bb002, 0xec00bb00, 0x22c08990, 0x82e40889, 0x002e2009, + 0x85422210, 0xbb802e40, 0x4a9c122c, 0x80bb002e, 0xc04bb002, 0xec008b00, + 0x2ec00bb0, 0x02ec00bb, 0x002e6209, 0xb002f005, 0x70000000, 0x00000000, + 0x0015ec00, 0xfb003ec0, 0x0fa00367, 0x10fb003e, 0xc00fb003, 0xec00fb00, + 0x32600da4, 0x03c200d8, 0xc022620c, 0xb80b2a10, 0xf18030f8, 0x4c980b2e, + 0x00fb003e, 0xc00fb003, 0xec00cb00, 0x2ec00bb0, 0x03ec00fb, 0x003e700c, + 0xb003c000, 0x70000000, 0x00000000, 0xa001bc08, 0xff003fc0, 0x0fe003b0, + 0x00ff003f, 0xc00ff003, 0xfc00f700, 0x3fd00eea, 0x03f240ec, 0x903b000e, + 0xe803f800, 0xfd043fc4, 0x0fd003fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00ff, 0x003f400f, 0xf003e804, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb003ec0, 0x0fa003a1, 0x84eb043e, 0xc00fb003, 0x6c00fb08, + 0x3e480ca6, 0x17a802c0, 0x403e100d, 0x90932528, 0xcb003250, 0x0c81132c, + 0x007b003e, 0xc00fb023, 0xec00fb00, 0x3ec00fb0, 0x07ec00fb, 0x003e700c, + 0xb003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0b204227, + 0x008b002e, 0xe80bb002, 0xec00bf60, 0x38e00db4, 0x262e02d8, 0x00205408, + 0x04022010, 0xdb003660, 0x080d022c, 0x00bb002e, 0xc00bb002, 0xcc00bb00, + 0x2ec00bb0, 0x02ec00bb, 0x002c400a, 0xb002f200, 0x40000000, 0x00000000, + 0xe0054c00, 0xb3002cc0, 0x0b20828c, 0x04a3022c, 0xc01b3002, 0xcc00b300, + 0x6c544810, 0x028828a2, 0x0028c009, 0x30020f00, 0x819220e0, 0x08300204, + 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x002cd208, + 0x3002f000, 0x00000000, 0x00000000, 0xe0111e00, 0xb7802de0, 0x0b68223a, + 0x2087802d, 0xe00b7802, 0xde00b780, 0x69654918, 0x229e8493, 0x9223a408, + 0x69121a28, 0x958025c0, 0x0879021e, 0x00b7802d, 0xe00b7802, 0xde00b780, + 0x2de00b78, 0x02de00b7, 0x802fa00a, 0x7802d800, 0x00000000, 0x00000000, + 0x48000c00, 0xf3003cc0, 0x0f200280, 0x40a3003c, 0xc00b3003, 0xcc00f300, + 0x3cc40830, 0x02a022e3, 0x5038000d, 0x10030404, 0xc320b046, 0x0cb00b0c, + 0x00f3003c, 0xc00f3003, 0xcc00f300, 0x3cc00f30, 0x02cc00f3, 0x003c400c, + 0x3003d206, 0x00000000, 0x00000000, 0x4015bc00, 0xff003fc0, 0x0fe003f4, + 0x04ff003f, 0xc00ff003, 0xfc00ff00, 0x39c483f5, 0x237488ff, 0x503b400f, + 0x404bd000, 0xf7003f89, 0x0ff003fc, 0x00ff003f, 0xc04ff003, 0xfc01ff00, + 0x7fc00ff0, 0x03fc00ff, 0x003d440f, 0xf003d006, 0x20000000, 0x00000000, + 0xa805ec00, 0xfb003ec0, 0x0f200324, 0x10eb003e, 0xc00fb003, 0xec00fb80, + 0x32c0aca6, 0x012804ca, 0x4232404d, 0x18032800, 0xc90432c0, 0x2c900b2c, + 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ee00c, + 0xb003c200, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b600210, + 0x00b7002d, 0xc00b7002, 0xdc00b749, 0x21c12820, 0x020808a2, 0x00090000, + 0x600a1810, 0x850021c0, 0x2ad00a9c, 0x0097002d, 0xc00b7002, 0xdc00b700, + 0x6dc00b70, 0x02dc00b7, 0x002f8008, 0x7002f204, 0x60000000, 0x00000000, + 0x80009e00, 0xb7802de0, 0x0be8021a, 0x00b7806d, 0xe00b7802, 0xde00b380, + 0x24e00978, 0x121a2007, 0x8063a009, 0xdc023602, 0x878820e2, 0x087c021f, + 0x00b7802d, 0xe00b7822, 0xde00b780, 0x2de00b78, 0x02de00b7, 0x802d6008, + 0x7802c800, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b200a0f, + 0x00b3002c, 0xc00b3002, 0xcc00b300, 0xa4c02838, 0x820d30ab, 0x0420d008, + 0x08220700, 0x83c020a0, 0x8a3c328c, 0x00b3002c, 0xc00b3042, 0xcc00b300, + 0x2cc00b30, 0x02cc00b3, 0x002c4008, 0x3002da04, 0x30000000, 0x00000000, + 0xe815a800, 0xfa003e80, 0x0f60033b, 0x20fa003e, 0x800fa003, 0xe800fa00, + 0x34a02dae, 0x0b3a02ca, 0x52b3800d, 0xec031a00, 0xce40b180, 0x8ce80328, + 0x00fa003e, 0x800fa003, 0xe800fa00, 0x2e800ba0, 0x03e800fa, 0x003f802c, + 0xa003fb00, 0x30000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8403e1, + 0x20f8003e, 0x000f8003, 0xe000f800, 0x3a040f00, 0x43c000f8, 0x003e080f, + 0x80c3e140, 0xf8483e00, 0x2f8203e0, 0x04d8003e, 0x000f8003, 0xe000f800, + 0x3e000f80, 0x03e000f8, 0x003e000f, 0x8003d204, 0x20000000, 0x00000000, + 0x0810e400, 0xf9003e40, 0x0f990327, 0x02c9003e, 0x400c9003, 0xe400f980, + 0x3e400eb9, 0x032440eb, 0x0032500d, 0x9003e420, 0xc9003240, 0x0c940324, + 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f, + 0x9003c204, 0x20000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9c8a06, + 0x0089002e, 0x600b9002, 0xe400b9c0, 0x2e40089c, 0x02241089, 0x04224028, + 0x9002e400, 0x81482240, 0x08900a24, 0x00b9002e, 0x400b9002, 0xe400b900, + 0x2e400b90, 0x02e401b9, 0x002e400b, 0x9002e001, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b90022c, 0x2089002e, 0x440a9002, 0xe400b918, + 0x26400a94, 0x022400a9, 0x00204008, 0x9002ec80, 0x8980a260, 0x09100224, + 0x00b9002e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e410b9, 0x002e600b, + 0x9002c600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b910204, + 0x0081002c, 0x400b1002, 0xc400b100, 0x2c404811, 0x020c46a1, 0x1020c408, + 0x1002e400, 0x81002260, 0x09310a04, 0x00b1002c, 0x400b1002, 0xc400b100, + 0x24400b10, 0x02c400b1, 0x002c440b, 0x1002c201, 0x00000000, 0x00000000, + 0xb80d6000, 0xf8003e00, 0x0f840320, 0x00c8003e, 0x000e8003, 0xe000f828, + 0x360a0e86, 0x8b21a0e8, 0x6832100c, 0xa003e802, 0xc801322a, 0x2d842320, + 0x08f8003e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000b8, 0x003e100f, + 0x8003ce03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9203f4, + 0x00f9003e, 0x400f9003, 0xe410f904, 0x3f400792, 0x03f480d9, 0x20bdc80e, + 0xd001dc08, 0x7500af40, 0x0eda03f4, 0x00f9003e, 0x400f9003, 0xe400f900, + 0x3e400f90, 0x03e400f9, 0x003f480f, 0x9003ee06, 0x70000000, 0x00000000, + 0x9805e400, 0xf9003e40, 0x0f9003f4, 0x00f9043f, 0x400e9043, 0xe400f500, + 0x37400d91, 0x033480c9, 0x2833c40e, 0x5003d400, 0xfd003349, 0x4cd06324, + 0x00f9003e, 0x400f9003, 0xf400f900, 0x3e400f90, 0x03e400f9, 0x003f400f, + 0x9003ce00, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b0082e0, + 0x00b8002e, 0x000b8002, 0xe000b800, 0x22000801, 0x0a20a0aa, 0x00220848, + 0x8012e008, 0xb800a200, 0x0a820a20, 0x00b8002e, 0x004b8002, 0xe000b800, + 0x2e000b80, 0x02e000b8, 0x002e0a0b, 0x8002c604, 0x30000000, 0x00000000, + 0x4805c400, 0xb1002c40, 0x0b1222c4, 0x00b1002c, 0x400b1002, 0xc400b100, + 0x20440910, 0x0244c0b1, 0x0020480a, 0x1002c400, 0xb1002044, 0x08928204, + 0x00b1002c, 0x400b1002, 0xc400b100, 0x2c400b10, 0x02c400b1, 0x002c480b, + 0x1002d200, 0x20000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e6, + 0x00b9002e, 0x400b9002, 0xe400b901, 0x22480910, 0x026550a1, 0x00a04808, + 0x9002e440, 0xb9102242, 0x0a941224, 0x40b9002e, 0x400b9002, 0xe400b900, + 0x2e400b90, 0x02e400b9, 0x002e440b, 0x9002c604, 0x20000000, 0x00000000, + 0xa011e400, 0xf9003e40, 0x0f9003e4, 0x28f9043e, 0x400f9003, 0xe400f900, + 0xb0600d94, 0x834400e9, 0x4032400e, 0x9883e700, 0xf1489054, 0x0c150326, + 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e480f, + 0x9003e800, 0x20000000, 0x00000000, 0xe800a400, 0xf9003e40, 0x0fb087e4, + 0x0cf9003e, 0x408f9003, 0xe400f900, 0x3e628eb2, 0x13a400f9, 0x013e400f, + 0x9c03e420, 0xf9883e42, 0x0f980be4, 0x00f9003e, 0x400f9003, 0xe400f900, + 0x3e400f90, 0x03e400f9, 0x003e600f, 0x9003fa04, 0x20000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f800b23, 0x00f8003e, 0x000d8003, 0xe000f008, + 0x72002c84, 0x03a000c8, 0x40ba180f, 0x84036002, 0xc8003e00, 0x0e8403e0, + 0x0078003e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x003e100c, + 0x8003ca04, 0x20000000, 0x00000000, 0x28043800, 0xba002e80, 0x8ba4033a, + 0x80ba002e, 0x800ba002, 0xe800be60, 0xa38208ac, 0x023a02da, 0x0023808b, + 0xe9033a00, 0x8e002f80, 0x08e182f8, 0x00ba006e, 0x800ba002, 0xe800ba00, + 0x2e800ba0, 0x03a800ba, 0x002f8208, 0xa002c200, 0x00000000, 0x00000000, + 0x28054800, 0xb3002cc0, 0x0b38020c, 0x00b3002c, 0xc00b3002, 0xcc00b3c0, + 0x20c0083a, 0x128e0023, 0x0028300b, 0x210a0f40, 0x83002cd0, 0x0a1002c8, + 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x028c00b3, 0x002ce228, + 0x3002c200, 0x50000000, 0x00000000, 0xa0011800, 0xb7002dc0, 0x0b7c021c, + 0x00b7002d, 0xd00b7002, 0xdc00b600, 0x61000870, 0x82090497, 0x2021500b, + 0x68021a00, 0x87002dc0, 0x486012d8, 0x0037002d, 0xc00b7002, 0xdc00b700, + 0x2dc00b70, 0x029c00b7, 0x002da018, 0x7002c804, 0x40000000, 0x00000000, + 0xa8081a00, 0xf7803de0, 0x0f690b1e, 0x00f7803d, 0xe00b7803, 0xde00f680, + 0x21e00c78, 0x039a00e3, 0x8839200f, 0x78031e00, 0xc7803de0, 0x4e5843da, + 0x0077802d, 0xe10f7803, 0xde00f780, 0x3de00f78, 0x039e00f7, 0x803f608c, + 0x7803ca02, 0x00000000, 0x00000000, 0x081da800, 0xfb003ec0, 0x0fb203a8, + 0x00fb003e, 0x400fb003, 0xec04fb00, 0x3c008fa6, 0x83e000fb, 0x703e400f, + 0xb003ac04, 0xfb003c40, 0x0fa003e8, 0x00fb003e, 0xc00fb003, 0xec00fb00, + 0x7ec00fb0, 0x03ac00fb, 0x007f000f, 0xb003c204, 0x60000000, 0x00000000, + 0x4005fa00, 0xff803fe0, 0x0f78031a, 0x00cf803d, 0xe00cf803, 0xfc80ff80, + 0x33200ce8, 0x03fe00df, 0x8233200c, 0xe203be00, 0xc79433e0, 0x2cf8033a, + 0x04cf803f, 0xe00ff803, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x803fe00f, + 0xf803d800, 0x20000000, 0x00000000, 0xa8119800, 0xb7002dc0, 0x0b700218, + 0x0087102d, 0x44087002, 0xdc003620, 0xa1110866, 0x12f840af, 0x0023440a, + 0x6002d440, 0x871129c0, 0x08f10218, 0x0287003d, 0xc40b7002, 0xdc01b700, + 0x6dc00b70, 0x02dc01b7, 0x002dc00b, 0x7002ea00, 0x20000000, 0x00000000, + 0x10009800, 0xb7002dc0, 0x0bc00219, 0x0087002d, 0xc0087002, 0xdc40b202, + 0x21000960, 0x06d00097, 0x0021c008, 0x71829c00, 0x97022d82, 0x28500218, + 0x0087002d, 0xc00b7002, 0xdc00b700, 0x2dc00b70, 0x02dc00b7, 0x002dc00b, + 0x7002c000, 0x20000000, 0x00000000, 0x6014c800, 0xb3002cc0, 0x0b100a08, + 0x0283002c, 0x40083002, 0xcc04b300, 0x20001920, 0x02c010a3, 0x40e2d00a, + 0x3402cc00, 0x93812c00, 0x08200208, 0x40830228, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002d004, 0x30000000, 0x00000000, + 0x2815a800, 0xfb003ec0, 0x0f300328, 0x00cb043e, 0xc00cb003, 0xec007300, + 0x32220db4, 0x03e000df, 0x0032900c, 0x8c03ad02, 0xd2c03cc0, 0x0c80032a, + 0x00cb002e, 0xc00fb003, 0xec00bb00, 0x3ec00fb0, 0x02ec00fb, 0x001ed40b, + 0xb003ca00, 0x60000000, 0x00000000, 0x8000e800, 0xfb003ec0, 0x0fb003e0, + 0x00fb003e, 0x402fb003, 0xec00f840, 0x3a002eb4, 0x23e028f3, 0x203ec00f, + 0x8443ecc8, 0xe8703ac0, 0x8fb003e8, 0x00fb003e, 0xc00fb003, 0xec00fb00, + 0x3ec00fb0, 0x03ec00fb, 0x003e000f, 0xb003e804, 0x30000000, 0x00000000, + 0x8010f800, 0xcf003fc0, 0x0fe20332, 0x00ff003f, 0xf00ff003, 0xfc00fc40, + 0x3b040cd1, 0x933309df, 0x0073860c, 0xd0837800, 0xff0032ea, 0x0cc00338, + 0x00cf003f, 0xc00ff003, 0xfc00ff00, 0x3fc00ff0, 0x03fc00ff, 0x003f400c, + 0xf003c044, 0x30000000, 0x00000000, 0x80044800, 0x8b002ec0, 0x0bbe0221, + 0x88bb012e, 0xe08bb002, 0xec00b920, 0xa0300880, 0x030304cb, 0x0276c008, + 0x16022e00, 0xbbc922d3, 0x0db40348, 0x00db002e, 0xc00bb022, 0xec00bb00, + 0x2ec00bb0, 0x02ec00bb, 0x002d200a, 0xb002e040, 0x10000000, 0x00000000, + 0x80052800, 0x9b002ec0, 0x0b800264, 0x80bb002e, 0xc00bb002, 0xec01b800, + 0x22000810, 0x0220268b, 0x00228008, 0xa1022c60, 0xbb8122c1, 0x08340228, + 0x009b002e, 0xc00bb002, 0xec00bb00, 0x2ec00bb0, 0x02ec00bb, 0x002ee008, + 0xb002e000, 0x50000000, 0x00000000, 0x08040800, 0x93002cc0, 0x0b80024c, + 0x00b3002c, 0x400b3002, 0xcc09b200, 0x20001810, 0x0a000083, 0x0024c028, + 0xa0020c04, 0xb90520c0, 0x09300a68, 0x00930024, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x02cc00b3, 0x002ec04a, 0x3002c201, 0x00000000, 0x00000000, + 0x800d6800, 0xdb003ec0, 0x0f800364, 0x00fb012e, 0xc00bb002, 0xec00f800, + 0x32008c90, 0x1320088f, 0x0222c048, 0xa00b2800, 0xfb00b2c0, 0x0c800328, + 0x00db003e, 0xc00fb003, 0xec01fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00c, + 0xb003c006, 0x00000000, 0x00000000, 0xa01df800, 0xef003fc0, 0x0fc003b0, + 0x00ff003f, 0x400ff003, 0xfc00fc00, 0x3d010fc0, 0x23b000ff, 0x003fc00b, + 0xf0039c00, 0xff003fc0, 0x0ff003d8, 0x00ff003f, 0xc00ff003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00ff, 0x003fc01f, 0xf003e806, 0x70000000, 0x00000000, + 0xc005fe08, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xf00dc813, 0x9600cd80, + 0x3fe00cf8, 0x039200cf, 0x803fe00f, 0xd8033e00, 0xfc003fe0, 0x0fd00374, + 0x10fd0033, 0x210ff803, 0xf402ed80, 0x3f200cc8, 0x03f200fc, 0x8033020c, + 0x78023000, 0x70000000, 0x00000000, 0xc010ee00, 0x3b802ec0, 0x0bb802ee, + 0x00bb802e, 0xc02ab802, 0x22088b81, 0x26e008b8, 0x222200ab, 0x842ee00e, + 0xb8022e00, 0xb8802ee0, 0x0b980224, 0x04b98022, 0x200bb843, 0xa608fb80, + 0x2e800a98, 0x52ea00b9, 0x802a3008, 0xa00a2004, 0x30000000, 0x00000000, + 0xc805cc00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc81a0002, 0xac018101, + 0x2e0009b0, 0x028c0083, 0x0028c00b, 0x20020c00, 0xb0002cc0, 0x83104884, + 0x10b10120, 0xc09b3022, 0xc004a304, 0x6c400820, 0x02c010b3, 0x00200188, + 0x328a0201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ee0, 0x0bb002ec, + 0x00bb002e, 0xc048b002, 0x2e228bc4, 0x268001b0, 0x022c248b, 0x042ec000, + 0xb8822c00, 0xb8882ec0, 0x199c02a6, 0x009bc122, 0xc10bb002, 0x6600bb01, + 0x2ee20a90, 0x00ec00bb, 0x002a0048, 0x91023004, 0x60000000, 0x00000000, + 0x0015ec00, 0xfa003ec0, 0x0fb003ec, 0x00fb003e, 0xc00f9803, 0x8600c904, + 0x3eec8d12, 0x038002cb, 0x003ec04f, 0x9c232c00, 0xf8c03ec0, 0x0f8813e6, + 0x00f180b2, 0x300fb003, 0xe702e9b1, 0x3ed00c80, 0x03e340fa, 0x4832280c, + 0xbc030004, 0x70000000, 0x00000000, 0xa001bc00, 0xfe003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff203, 0xf000ff00, 0x3fc22ad1, 0x03f044ff, 0x003fc006, + 0xf003fc00, 0xfc003fc0, 0x0fd02774, 0x00fd003f, 0x324ff003, 0x9402fd04, + 0x37c00be0, 0x03f8007f, 0x243f252f, 0xf803f800, 0x60000000, 0x00000000, + 0xc010ac00, 0xfa003684, 0x0cb003ec, 0x00fb003e, 0xc20d9203, 0xe500c940, + 0x72400fb2, 0x032c00eb, 0x0036c01f, 0xa5832c00, 0xf9403ec0, 0x0fa103ec, + 0x00c9403e, 0xd04fb20b, 0x2180cb40, 0x3ad80cb0, 0x03e090fb, 0x403cc00f, + 0xb0033004, 0x20000000, 0x00000000, 0xd8052c00, 0xba002280, 0x08b002ec, + 0x00bb002e, 0xf2803822, 0xe000db00, 0x20190bbc, 0x822c408b, 0xc022c00b, + 0x34036c00, 0xb90026c0, 0x0b2c02ed, 0x05db0226, 0xf00bb012, 0x25908bd0, + 0x0ef00db0, 0x00ec00b3, 0xe02ef50b, 0xb802b200, 0x40000000, 0x00000000, + 0xe0054c00, 0xb30024c0, 0x083002cc, 0x00b3002e, 0xe0082402, 0xc4009000, + 0x20f00b24, 0x0a400083, 0x6024c00b, 0x30020c00, 0xb1002cc0, 0x0b1c8241, + 0x20806424, 0x11033932, 0x04000184, 0x0ad00800, 0x42c500b3, 0x2024f40b, + 0xb2023800, 0x50000000, 0x00000000, 0xf8011e00, 0xbb8021f0, 0x087802de, + 0x01b7806d, 0xe0087882, 0xd2429d80, 0x21e00be8, 0x02120087, 0x8821e00b, + 0xf8025e00, 0xb78025e0, 0x0b5802d2, 0x00958225, 0x600b7802, 0x16008688, + 0x2fe20958, 0x02d601b7, 0x812de44b, 0xf8029800, 0x40000000, 0x00000000, + 0x48080c00, 0xf30036c0, 0x083003cc, 0x00f3003e, 0xc00c2003, 0xcc40d000, + 0xa0000f20, 0x030c02e3, 0x0034c00b, 0x30030c00, 0xf1003cc4, 0x0f1003e4, + 0x2081083c, 0x074f3103, 0x0c00c301, 0x38c10c21, 0x93c950f3, 0x117cc44f, + 0x30a31202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x2ff003fc, + 0x00ff003f, 0xc00af003, 0xfc50f410, 0x3fc00f70, 0x027c04f7, 0x003fc00f, + 0x7103fc00, 0xff1007c0, 0x0ff103f0, 0x007f1217, 0x400f7003, 0xd408ff00, + 0x3dc40fd1, 0x03fc51ff, 0x017fc40f, 0xf103d006, 0x60000000, 0x00000000, + 0xa805ec00, 0xfa003e40, 0x0cb043ec, 0x00fb003e, 0xc00fb003, 0xc408c800, + 0x3cc00c18, 0x036c00cb, 0x003ec00c, 0xb0032c00, 0xf98032c0, 0x0f900024, + 0x00f8043e, 0x9807b013, 0xec06d800, 0x0ec00f82, 0x23e490fb, 0x003e000c, + 0xb0012a00, 0x70000000, 0x00000000, 0xc8119c01, 0xb6002f40, 0x087002dc, + 0x00b7022d, 0xc00b7006, 0xdc008504, 0x2dc04860, 0x021c00a7, 0x012dc00c, + 0x70035c00, 0xb70021c0, 0x0350435c, 0x00b7002d, 0xc28b7002, 0xdc00f600, + 0x2dc08b66, 0x82d520b7, 0x002d0008, 0xf0023204, 0x60000000, 0x00000000, + 0x80009e00, 0xb6802d20, 0x287802de, 0x00b7802d, 0xe08b7802, 0xd6008780, + 0x2fe22858, 0x06de0097, 0x802de008, 0x78025e00, 0xb38025e1, 0x4338021e, + 0x00b4802d, 0xac1b7802, 0xce0497c0, 0x65e0cb7a, 0x22da80b7, 0xc02ce048, + 0x78223000, 0x20000000, 0x00000000, 0x4814cc00, 0xb2002e18, 0x083002cc, + 0x00b3002c, 0xc00b3042, 0xcf0083f0, 0x2ce2083a, 0x228f30b3, 0x002cc009, + 0x30024c10, 0xb38824c0, 0x0b36224d, 0x00b3c02c, 0xe41b3002, 0xcc08b340, + 0x2cc00b3e, 0x02cc00b3, 0x802ced08, 0x3c821204, 0x30000000, 0x00000000, + 0xe815a800, 0xfa003e80, 0x0ca003e8, 0x00fa003e, 0x800f6403, 0xf962ce42, + 0x3f900cea, 0x03d800da, 0x003e800c, 0xe0036800, 0xfe08b680, 0x0fe60338, + 0x00fe643e, 0xa00fa003, 0xf800d6c0, 0x37880fac, 0x03e800fe, 0x803f802c, + 0xec0b3a04, 0x60000000, 0x00000000, 0x4800e000, 0xf8803e00, 0x0f8003e0, + 0x00f8043e, 0x000f8003, 0xe100f800, 0x3e100f84, 0x012040e8, 0x013e002e, + 0x8003e000, 0xf8003a00, 0x1f8003e1, 0x40f8403e, 0x000f8003, 0xe002f841, + 0x3e200f85, 0x12e000f8, 0x013e000f, 0x8103d200, 0x30000000, 0x00000000, + 0x0810e400, 0xf9003e60, 0x2c9003e4, 0x00f9003e, 0x400c9483, 0x2400c902, + 0x3e402c90, 0x03e680d9, 0x903e400c, 0x9a232400, 0xf9003e40, 0x0f182304, + 0x60c18a32, 0x400f9003, 0xe600c9a8, 0x32684f91, 0x23251079, 0x903c480c, + 0x92030204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e64, 0x089002e4, + 0x00b9002e, 0x4c089812, 0x05088900, 0x2c444c94, 0x02e50089, 0x206c400f, + 0x1c07e400, 0xb9002e40, 0x0b900365, 0x00d93436, 0xc8cb9002, 0xc640a920, + 0x2a624b30, 0x036d0099, 0x002e78a8, 0x90022000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002f40, 0x089002e4, 0x00b9002c, 0x40089406, 0x24068900, + 0x2e408992, 0x02e40499, 0x002e5048, 0x90822400, 0xb9002e40, 0x0b92022c, + 0x00890022, 0xc00b9102, 0xec008900, 0x26400b90, 0x022500b9, 0x002e4008, + 0x30820600, 0x40000000, 0x00000000, 0x08040400, 0xb5002d44, 0x081002c4, + 0x00b1002c, 0x44289002, 0x0c008100, 0x2e400830, 0x02e40081, 0x002c400a, + 0x10028400, 0xb1002c40, 0x0b104244, 0x48910024, 0x400b1002, 0xc401a904, + 0x2c440b90, 0x02440091, 0x002c4008, 0x11020201, 0x00000000, 0x00000000, + 0xb80d6000, 0xf8003f10, 0x0c8003e0, 0x00b8003e, 0x100c8003, 0x20088800, + 0x2e800d80, 0x03e800d8, 0x002e0008, 0x80022000, 0xf8283e00, 0x0fa2c329, + 0xb0c82822, 0x000f8003, 0xe0a0c801, 0x36100fa0, 0x032000f8, 0x003e0a0c, + 0x840b2e03, 0x50000000, 0x00000000, 0x981de400, 0xf9003ec8, 0x0f9003e4, + 0x00f9003e, 0x480fd00b, 0xf400fd00, 0x1f400ed0, 0x03d400f9, 0x003c410f, + 0x5003e400, 0xff003e40, 0x0fd003f4, 0x80fd0006, 0x400f9003, 0xf400fd00, + 0x3b480f90, 0x03e400fd, 0x043fc00f, 0xd203e606, 0x70000000, 0x00000000, + 0x9805e400, 0xf9003fc0, 0x0f9003e4, 0x00f9003f, 0x440cd013, 0xd400c102, + 0x3d400ed0, 0x035400e5, 0x003d400e, 0x5003e400, 0xf9003e40, 0x0f5203b4, + 0xa0bd203e, 0x400bd003, 0xfc00c502, 0x0d40cf90, 0x03e410fd, 0x0033400c, + 0xd0032600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e08, 0x0b8002e0, + 0x00b8002c, 0x010d8002, 0xe008e800, 0x3a8108a0, 0x022000d8, 0x003a0008, + 0x8003a000, 0xb8002e00, 0x0b800220, 0x80b8142e, 0x800b8022, 0xe044d800, + 0x26888b80, 0x02e800b8, 0x002a0408, 0x02820e04, 0x30000000, 0x00000000, + 0x4805c400, 0xb1002c4a, 0x0b1042c4, 0x00b1002c, 0x40891002, 0xc4048100, + 0x6c400a10, 0x024400a1, 0x002c400b, 0x1002c400, 0xb1102c40, 0x0b110284, + 0xa4b1802c, 0x404b1000, 0xc4008100, 0x244a8b10, 0x02c400b9, 0x0020402a, + 0x12020201, 0x70000000, 0x00000000, 0x1811a400, 0xb9002e40, 0x0b9002e4, + 0x00b9042c, 0x41099002, 0xe400b928, 0x2e400890, 0x02251099, 0x000ec00a, + 0xb002e400, 0xb9102e40, 0x0bb20224, 0x00b9202e, 0x410b9012, 0xe440991a, + 0x26400b90, 0x06e40139, 0x002a400a, 0x10020604, 0x60000000, 0x00000000, + 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400d9013, 0xc682c941, + 0x3c400e1c, 0x036400e9, 0x003c400f, 0x9701e400, 0xf9003e40, 0x0f1c83a6, + 0x80f9c03e, 0x608f9003, 0xc680c900, 0x76500f90, 0x83e500f1, 0xb632702e, + 0x9a0b2804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x428f9083, 0xe690e900, 0x3a720f9a, 0x03e640f9, 0x003a400d, + 0x9003a400, 0xf9003e40, 0x0f9007e5, 0x00f90a3e, 0x684f9023, 0xe600f980, + 0x3e400f91, 0x03e448f9, 0x803e4805, 0x9903ea00, 0x60000000, 0x00000000, + 0x2810a000, 0xf8003e10, 0x0c8003e0, 0x00f8003e, 0x002c8003, 0xe000c800, + 0x32100c82, 0x03a010c8, 0x0036000c, 0x80032000, 0xf8403e00, 0x0f840360, + 0x61c80032, 0x000f8243, 0xe000c860, 0x3214cc84, 0x43e030f8, 0x003c000c, + 0x8c0b0a04, 0x20000000, 0x00000000, 0x28052800, 0xba002fa0, 0x08a002e8, + 0x00ea012f, 0xb208e202, 0xf8008a04, 0x238008e0, 0x021904ae, 0x80239128, + 0xec02a800, 0xba002680, 0x0bec023a, 0x00ae40a2, 0x9509e402, 0xf8048e04, + 0x0b900da4, 0x02e800ee, 0x402f800a, 0xe8020a00, 0x40000000, 0x00000000, + 0x28054c00, 0xb3002ce0, 0x283002cc, 0x00a3002c, 0xe0083802, 0xcd808300, + 0x24142830, 0x028c6083, 0x902cc280, 0x13028c00, 0xa3002cc0, 0x0b3da24c, + 0x00835020, 0xf40b3002, 0xc80683c0, 0x00e80836, 0x02cc00a3, 0x602cc000, + 0x30424a00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002da2, 0x087002dc, + 0x00a7002d, 0xc0086012, 0xdd008f80, 0x27800850, 0x821c04a7, 0x8029d008, + 0xf8029c00, 0xb70025c0, 0x0b70021e, 0x08a78021, 0x80097042, 0xfc008ec2, + 0x2b600970, 0x02d908a7, 0x042cc10a, 0x70a06800, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7803fe0, 0x0c7803de, 0x00e7803d, 0xe00c7803, 0xde02c780, + 0x35200c78, 0x139e02c7, 0x803de00c, 0x78039e00, 0xe7803de0, 0x0f78037a, + 0x00878331, 0xe40b7803, 0xda00c780, 0x31e00c58, 0x83de00e7, 0x807de04c, + 0x78436a02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003e80, 0x0fb003ec, + 0x00eb001e, 0xc00f9003, 0xec00fb00, 0xba400f30, 0x03ec00da, 0x0036c00f, + 0xb003ec00, 0xfb003ec0, 0x0fb003e0, 0x00f3003e, 0x9903b043, 0xcc08fb00, + 0x3e400f90, 0x03e9a0eb, 0x027ec04f, 0x80038206, 0x60000000, 0x00000000, + 0x4005fe00, 0xff803fe0, 0x0cf803fe, 0x00ff803f, 0xe00ed803, 0xfa00cf80, + 0x3da04c78, 0x033e00cf, 0x803fe00c, 0x78073c40, 0xff8033e0, 0x0fe30336, + 0x00f78013, 0x600df803, 0x1a005f80, 0x33a10ff8, 0x03f640ff, 0x8431e48c, + 0x49131000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002f90, 0x087002dc, + 0x00b7000f, 0xc0086083, 0xd8008721, 0x0d980860, 0x0a9c80d5, 0x022dc00d, + 0x70079c00, 0xb70039c0, 0x83702014, 0xa0b72021, 0xc0087123, 0x5c42a620, + 0x35484b70, 0x23d400b7, 0x5269cc0a, 0x4383ea04, 0x60000000, 0x00000000, + 0x18009c00, 0xb7002dc0, 0x087002dc, 0x00b7002d, 0x000a5102, 0xdd008705, + 0x0d0008f0, 0x02181085, 0x002d800b, 0xe0025c40, 0xb70025c0, 0x0b565014, + 0x00b70867, 0x00087002, 0xf8009701, 0x2d021b40, 0x02d021b7, 0x0021c018, + 0xf0060600, 0x20000000, 0x00000000, 0x6014cc00, 0xb3002c80, 0x083002cc, + 0x00b3002c, 0x00081022, 0xcc0083a0, 0x2c12083c, 0x820c1090, 0x002c800b, + 0x3e028c00, 0xb30028c0, 0x0b300203, 0x00b1a2e4, 0x99083002, 0xcf0193c0, + 0x24600b0e, 0x06c208b3, 0x0228c01a, 0x0006d804, 0x30000000, 0x00000000, + 0x2815ac08, 0xfb003ec0, 0x2cb003ec, 0x00fb003e, 0xc00e9403, 0xef22cb44, + 0x3e300cae, 0x132c06cb, 0x013cc00f, 0x30836c00, 0xfb0836c0, 0x0f3c832e, + 0x00fbc036, 0xc00cb003, 0xea40d361, 0x3ee00fa4, 0x83ed40f3, 0x5032c00c, + 0xbd030e04, 0x60000000, 0x00000000, 0x9000ec00, 0xfb003e40, 0x0fb003ec, + 0x00fb013e, 0x100fb423, 0xad00fb11, 0x3e140f84, 0x03ec00fa, 0x413ec005, + 0xb013ac00, 0xfb003ec0, 0x1fb443e4, 0x00fb003a, 0x002eb003, 0x6940e840, + 0x5e500f84, 0x03a800fb, 0x443ec08f, 0xb0036000, 0x30000000, 0x00000000, + 0x8010fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xe00fd0c3, 0x3c00cf00, + 0x3f600fd4, 0x137c00df, 0x003fc00c, 0xf0033c00, 0xfb003fc0, 0x0fb8135c, + 0x28cf0037, 0xe88ff803, 0xda02cd08, 0x37400ff2, 0x03f400cf, 0x9033c00c, + 0xf0032004, 0x30000000, 0x00000000, 0x80046c00, 0xbb002ee0, 0x0bb002ec, + 0x00bb002e, 0x244b1a13, 0x0f208b00, 0x2e500b1c, 0x020e008a, 0x002ee008, + 0xbc002c00, 0xbb002ec0, 0x0bb50226, 0x00d32022, 0x200b91c2, 0x6340f9a0, + 0x2a690e94, 0x02c000d9, 0x8034254d, 0x00002040, 0x10000000, 0x00000000, + 0x80052c00, 0xbb002ee0, 0x0bb002ec, 0x00bb002e, 0xc20b8802, 0x66008b04, + 0x2e040bb4, 0x1266109b, 0x402e6018, 0xb8022c00, 0xbb002ec0, 0x0bb00266, + 0x208a1126, 0x408bb002, 0xe8208b14, 0x22e00ba0, 0x82ec419b, 0x0022c208, + 0x80026000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0x010ba002, 0x040a8300, 0x2c010ba0, 0x02240080, 0x002c4008, + 0xb00a0c00, 0xb3002cc0, 0x0b300244, 0x00930060, 0x400b2006, 0xc800a300, + 0x68400a00, 0x02ec019a, 0x0024c009, 0x800a4201, 0x00000000, 0x00000000, + 0x800d6c00, 0xfb002ec0, 0x0fb003ec, 0x00fb003e, 0x000f900b, 0x6408cb00, + 0x3e000fb0, 0x036800d9, 0x023e4108, 0xb0032c00, 0xfb003ec0, 0x0bb00364, + 0x108b0036, 0x000bb022, 0xe8008900, 0x32004fa0, 0x23e000db, 0x0032c08c, + 0xb0136003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0x008fd003, 0xd4025f00, 0x3f010ff0, 0x03dc007c, 0x003d400d, + 0xf003fc00, 0xff003fc0, 0x0ff003b4, 0x04ff013d, 0x000b4003, 0x7002f502, + 0x3f410ec0, 0x03f000b4, 0x003f000f, 0xc003a806, 0x70000000, 0x00000000, + 0xc001fe00, 0xff803f00, 0x0ff803f4, 0xe0df10b3, 0xc000e403, 0x3c00ff80, + 0x33200d78, 0x23f094dc, 0x203f000d, 0xf9035e00, 0x5f203f80, 0x0df8037e, + 0x00ff803f, 0xe00ff803, 0xfe00cf80, 0x37e00ff8, 0x037e00ff, 0x803fe00f, + 0xf803f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802e34, 0x0bb802f5, + 0x000a6022, 0x160d9703, 0x6a00bb20, 0x2a200ab8, 0x02eb4488, 0x1d22cc48, + 0xb002ec20, 0xab002230, 0x08b2822e, 0x00bb802e, 0xe08bb802, 0xee008b80, + 0x2ee00bb8, 0x02ee00bb, 0x822ee00b, 0xb802e004, 0x30000000, 0x00000000, + 0xc805cc00, 0xb3002c80, 0x4b3000c4, 0x908b1020, 0xc8490202, 0x4400b308, + 0x2a000920, 0x02c01090, 0x202c4249, 0xb0422c00, 0x83402851, 0x0930024c, + 0x00a3002c, 0xc00b3002, 0xec008300, 0x28c00b30, 0x02cc00b3, 0x002cc00b, + 0x3002c201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb602e00, 0x0bb00264, + 0x008800a2, 0x0009b002, 0x6200bb00, 0x222008b0, 0x02e0648a, 0x80a6e018, + 0xb002ac00, 0x2b002200, 0x08b0022c, 0x003b002e, 0xc00bb042, 0xe8808900, + 0x2ec00bb0, 0x02ec00bb, 0x002ec003, 0xb002f004, 0x60000000, 0x00000000, + 0x1015ec00, 0xfb003f00, 0x0fb803e4, 0x00c60033, 0xc00df023, 0x7e00b300, + 0x38200db3, 0x03cb00d0, 0x803ea08d, 0x3a236800, 0xcb003890, 0x0d30036c, + 0x00eb003e, 0xc00fb013, 0xec02ca00, 0x3ec00fb0, 0x03ec00fb, 0x003ec10f, + 0xb003c000, 0x70000000, 0x00000000, 0xa001bf00, 0xff803fc0, 0x0ff403d4, + 0x00efc03f, 0x300f4003, 0xfc10ff00, 0xbf010fd0, 0x03f824fc, 0x013bc00f, + 0xf903fc40, 0xf3003f08, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xde00fe00, + 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003e804, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb403280, 0x0fb003e4, 0x80ce0031, 0xd60ed003, 0xe400fb00, + 0x3a000cb4, 0x032148cb, 0x12bac00d, 0xa4832c00, 0xeb043652, 0x2db803ec, + 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00db, 0x003ec00f, + 0xb003f004, 0x20000000, 0x00000000, 0xd8052c00, 0x9b0f22c8, 0x0bb202f5, + 0x108b0036, 0x300da002, 0xec00bb80, 0x762108be, 0x036100da, 0x0022c008, + 0xa8074c00, 0xdf022238, 0x2cb002ec, 0x00bb003a, 0xc00bb002, 0xe800b900, + 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xb002f200, 0x40000000, 0x00000000, + 0xe0054c00, 0xb3a22052, 0x1b3802c4, 0x00a10020, 0x309a2002, 0x4c00b390, + 0x2804083e, 0x12070080, 0xe0aec009, 0x3c020400, 0xa3002480, 0x083002cc, + 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x02cc0093, 0x002cc00b, + 0x3002f000, 0x00000000, 0x00000000, 0xf0011e00, 0x97802160, 0x1b7806c6, + 0x40808025, 0xe0085802, 0xda00b780, 0x23a028f8, 0x025e089e, 0x9061e008, + 0x7a027e00, 0xb78020a4, 0x087c02de, 0x00b78029, 0xe00b7802, 0xd600b780, + 0x2de00b78, 0x02de00b7, 0x802de00b, 0x7802d804, 0x00000000, 0x00000000, + 0x48080c00, 0xb30030c0, 0x0f3002c4, 0x00e10022, 0x000a0003, 0x4400fb00, + 0x28880832, 0x03048081, 0x00bec00d, 0xb0820400, 0xe3003454, 0x0c3003cc, + 0x00f3003c, 0xc00f3003, 0xcc00f300, 0x3cc00f30, 0x03cc00d3, 0x003cc00f, + 0x3003d202, 0x00000000, 0x00000000, 0x401dbc00, 0xd700bf40, 0x0ff003f5, + 0x00fe003f, 0xc00ff003, 0xf800ff10, 0x3d800ff0, 0x03d408f7, 0x063fc44e, + 0xf243fc00, 0xdf003fc4, 0x0ff013fc, 0x00ff003b, 0xc00ff003, 0xf040fd00, + 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003d004, 0x20000000, 0x00000000, + 0xa805ec00, 0xfb483e00, 0x0fb003e6, 0x00580033, 0x000cf20b, 0x3c00fb00, + 0x3c000c38, 0x032c80da, 0x0136c01d, 0x10032800, 0xeb103880, 0x0cb003ac, + 0x00eb003e, 0xc00fb003, 0xec00fa00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, + 0xb003c200, 0x70000000, 0x00000000, 0xc8119c88, 0x37202dc0, 0x0b7002f5, + 0x80850035, 0xc00a4082, 0x1c00b700, 0x2d800870, 0x028c4426, 0x0121c04c, + 0x50035c00, 0xb7022d80, 0x4af0021c, 0x00b7002d, 0xc00f7022, 0xd400b600, + 0x2dc00b70, 0x02dc00b7, 0x002dc00b, 0x7002f200, 0x60000000, 0x00000000, + 0x80009ed0, 0xb7b22da0, 0x0b7902d6, 0x009c8200, 0x20081802, 0x1600b780, + 0x2d6009f8, 0x025e0817, 0xc125e018, 0xf8821f00, 0xb7a02d60, 0x0878029e, + 0x01a7802d, 0xe00b7802, 0xde00b780, 0x2de00b78, 0x029e00b7, 0x802de00b, + 0x7802c800, 0x20000000, 0x00000000, 0x4814cc08, 0xb3d22cf0, 0x0b3002c4, + 0x00917024, 0xc00a2402, 0x0c00b300, 0x2cc21838, 0x02cc0683, 0xc820e008, + 0xb0024d00, 0xbb002cc0, 0x0a30028c, 0x00b3002c, 0xc00a3002, 0xc000b108, + 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002da04, 0x30000000, 0x00000000, + 0xe815a000, 0xfc003fa4, 0x0f0003e8, 0x00da4032, 0x800ca403, 0x3a00fa00, + 0x3fa22dee, 0x036a02de, 0xc635a02c, 0xe0033a41, 0xea047b80, 0x08a003a8, + 0x00ea003e, 0x800ba007, 0xe800fa40, 0x2e800fa0, 0x03a800fa, 0x003e800f, + 0xa003fa00, 0x20000000, 0x00000000, 0x4800e000, 0xf84a3e04, 0x8f8003e0, + 0x04e0043d, 0x100fc083, 0xe060f804, 0x3e010e82, 0x038140f8, 0x003a141f, + 0x8403e000, 0xf8007e00, 0x8f800360, 0x00f8003e, 0x000f8007, 0xe000f800, + 0x3e000f80, 0x03e000f8, 0x003e000f, 0x8003d204, 0x20000000, 0x00000000, + 0x0810e001, 0xc8207044, 0x0c800324, 0x00f90036, 0x400c1003, 0x0400d901, + 0x3e400d91, 0x13ee42c9, 0x00b2400c, 0x90832400, 0xe900b660, 0x0e9003a4, + 0x00f9003e, 0x400b9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f, + 0x9003c204, 0x20000000, 0x00000000, 0x80044401, 0x81002240, 0x28900224, + 0x00b90036, 0x501d9007, 0x64008900, 0x2c504894, 0x02e508d1, 0x00365008, + 0x95020404, 0x89002044, 0x08100224, 0x00b9002e, 0x400b9002, 0xe408b900, + 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002e000, 0x00000000, 0x00000000, + 0x18052406, 0x8900a2c2, 0x88982224, 0x41b90023, 0xc008d012, 0x24009940, + 0x26e20990, 0x12a402ab, 0x0462c228, 0x90022400, 0xa9002240, 0x0a9842a4, + 0x01b9002e, 0x400b9002, 0xf400bd00, 0x2e400b90, 0x02e400b9, 0x002e400b, + 0x9002c600, 0x40000000, 0x00000000, 0x08042400, 0x88102044, 0x18110604, + 0x40b11025, 0xc4095102, 0x44008114, 0x2c401810, 0x02cc0291, 0x14264418, + 0x310a2440, 0x81102040, 0x08190204, 0x00b1002c, 0x400b1002, 0xd400b500, + 0x2c400b10, 0x02c400b1, 0x002c400b, 0x1002c201, 0x00000000, 0x00000000, + 0xb80d60a0, 0x8a6a221a, 0x4c868b29, 0xa0f868b2, 0x1a08c682, 0x20a0d840, + 0x36000da0, 0x03e0a0e0, 0x6c321a0c, 0x84032100, 0xe86a360a, 0x0e8403a0, + 0x00f8003e, 0x000f8003, 0xe000fc00, 0x7e000f80, 0x03e000f8, 0x003e000f, + 0x8003ce07, 0x50000000, 0x00000000, 0x9819f000, 0xfc243f48, 0x0fc200f4, + 0x80f5203e, 0x480f9203, 0xf404f920, 0x2f40cfd0, 0x13e412fd, 0x213d480f, + 0xd203f680, 0xf9223f41, 0x0f9203e4, 0x00f9003e, 0x400f9013, 0xe400f900, + 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003ef06, 0x70000000, 0x00000000, + 0x9805ce80, 0xfca03f10, 0x0fecc3d4, 0x02c10031, 0x400c9003, 0x6400fd00, + 0x3d400dd0, 0x4b1480dd, 0x2833480a, 0x50430400, 0xf9007d40, 0x0cd00324, + 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f, + 0x9003ce00, 0x70000000, 0x00000000, 0x3810e100, 0x38c41a20, 0x0b8c02e0, + 0x00880022, 0x000a8000, 0xa000b800, 0x2e000a80, 0x42200088, 0x202a048c, + 0x80822800, 0xb8002e00, 0x08820220, 0x00b8002e, 0x004b8002, 0xe000b800, + 0x2e000b80, 0x02e000b8, 0x002e000b, 0x8002c604, 0x30000000, 0x00000000, + 0x4805c500, 0xb04c0c08, 0x0b1202c4, 0x00810020, 0x40081002, 0x0400b100, + 0x2c400910, 0x02044091, 0x2826400b, 0x920a0400, 0xb1002c60, 0x28128e04, + 0x00b1002c, 0x400b1002, 0xc600b100, 0x28400b10, 0x02c400a1, 0x002c400b, + 0x1002d200, 0x20000000, 0x00000000, 0x1815a404, 0xb9022e60, 0x0b9002e4, + 0x00890022, 0x400a9002, 0xa480bb00, 0x2e584a91, 0x02248089, 0x182e5008, + 0xb2022410, 0xb9002e40, 0x08900224, 0x00b9002e, 0x400b9002, 0xe400b9c0, + 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002c604, 0x20000000, 0x00000000, + 0xa011e400, 0xf9343e60, 0x0f9803e4, 0x04c900b2, 0x404c9043, 0x2400f900, + 0x3c400d1c, 0x830608d9, 0x8036400f, 0x96432400, 0xf9002e60, 0x2c900324, + 0x00f9003e, 0x400b9003, 0xe400f940, 0x3e400f90, 0x03e400f9, 0x003e400f, + 0x9003e000, 0x20000000, 0x00000000, 0xe801a688, 0xf8093a00, 0x0f8207e4, + 0x00f9a03e, 0x402f9103, 0xe400f900, 0x3e610e98, 0x03e600f9, 0x813a408e, + 0x9003e400, 0xf9003c72, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f900, + 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003fa04, 0x20000000, 0x00000000, + 0x2810a000, 0xc8407e00, 0x0c8023c0, 0x01c80034, 0x000c0003, 0xa000f808, + 0x7e000c80, 0x83e204e8, 0x40b21184, 0x870b6100, 0xe8003200, 0x4c8143a0, + 0x00f8003e, 0x000f8003, 0xe000f840, 0x3e000f80, 0x03e000f8, 0x003e000f, + 0x8003ca04, 0x20000000, 0x00000000, 0x28053808, 0x8c806f30, 0x288003b8, + 0x008a0023, 0x9208a003, 0x6800bec0, 0x2f800dec, 0x02f81086, 0x0021a008, + 0x60032800, 0x8a003780, 0x8de002e8, 0x00ba002e, 0x800ba022, 0xe800ba00, + 0x2e800ba0, 0x02e800ba, 0x002e800b, 0xa002c200, 0x00000000, 0x00000000, + 0x2805480e, 0x83422ce2, 0x883002c4, 0x008b0024, 0x52283002, 0x0c01b1d0, + 0x2c802830, 0x12ce00a1, 0x08204208, 0x30020c00, 0xa30028c0, 0x08bc828c, + 0x00b3002c, 0xc01b3002, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x002cc00b, + 0x3002c200, 0x50000000, 0x00000000, 0xa0011a00, 0x87082de2, 0x087082b4, + 0x008f3021, 0x40087302, 0x5c00b500, 0x2f800974, 0x02d82080, 0x00204308, + 0x70223e48, 0x83a42dc0, 0x097002dc, 0x0037002d, 0xc00b7002, 0xdc00b700, + 0x2dc00b70, 0x02dc00b7, 0x002dc00b, 0x7002c800, 0x40000000, 0x00000000, + 0xa8081a02, 0xc7886cea, 0x8c7c03d6, 0x02878035, 0x200c3803, 0x1e00f580, + 0x2d200c78, 0x02da00a5, 0x0031202c, 0x78131e04, 0xe78239e0, 0x0c78039e, + 0x00f7803d, 0xe00f7803, 0xde00f780, 0x3de00f78, 0x03de00f7, 0x803de00f, + 0x7803ca02, 0x00000000, 0x00000000, 0x081da80a, 0xfb407ecc, 0x0fb001a4, + 0x00fb803e, 0x000fb803, 0xec00f900, 0x3e000bb0, 0x03e800f8, 0x00be000f, + 0xb003ac00, 0xfb1036c0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00fb00, + 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, 0xb003c206, 0x60000000, 0x00000000, + 0x4005fa00, 0xf79833e0, 0x0ff803f6, 0x00cf803b, 0x604cf823, 0x3e00cd80, + 0x3da02e78, 0x033e00c5, 0x8033604f, 0x6003be40, 0x4f801fe0, 0x0ff803be, + 0x00ff803f, 0xe00ff803, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x803fe00f, + 0xf803d800, 0x20000000, 0x00000000, 0xa8019820, 0x370051c0, 0x0b7002d4, + 0x00870021, 0xc40af000, 0x9c04a700, 0x2d908871, 0x029900a5, 0x0079500b, + 0x62063ce0, 0x87102d80, 0x0bf1021c, 0x00b7002d, 0xc40b7002, 0xdc00b700, + 0x2dc00b70, 0x02dc00b7, 0x002dc00b, 0x7002ea00, 0x20000000, 0x00000000, + 0x18109800, 0xbf0801d0, 0x0b7002f4, 0x009f0028, 0x00087002, 0x5c008500, + 0x2f000b70, 0x02182295, 0x4025040b, 0xe3069c01, 0x87002dd0, 0x0b70029c, + 0x00b7002d, 0xc00b7002, 0xdd20b700, 0x2dc00b70, 0x02dc00b7, 0x0029c00b, + 0x7002c000, 0x20000000, 0x00000000, 0x6014ca00, 0xb3c224c0, 0x0b3802c4, + 0x088b8020, 0xe40a3402, 0xcd00a300, 0x2c04080c, 0x428200a1, 0x0028200b, + 0x20020d21, 0x83002c80, 0x0b30020c, 0x00b3002c, 0xc00b3002, 0xce00b300, + 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002d004, 0x20000000, 0x00000000, + 0x3815aa00, 0xfb0032f0, 0x0fb083e0, 0x00df203a, 0x500cfa03, 0x6e00c800, + 0x3cc00eb9, 0x022c00db, 0x2036690f, 0x3002bf02, 0xcf003ec0, 0x0f9013ac, + 0x08fb003e, 0xc00fb003, 0xee00fb00, 0x3ec00fb0, 0x02ec00bb, 0x003ec00f, + 0xb003ca00, 0x60000000, 0x00000000, 0x8000e808, 0xfb003ac4, 0x0fb003e1, + 0x00eb203e, 0x480f3083, 0xacc0f800, 0x3e400fb5, 0x03e904f8, 0x003e580f, + 0xa403ec00, 0xfb003ef0, 0x0f9403ec, 0x00fb003e, 0xc00fb003, 0xec00fb80, + 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, 0xb003e804, 0x30000000, 0x00000000, + 0x8010f801, 0xffa873c8, 0x4ff02338, 0x01cf0031, 0x000cf003, 0x2c00bc00, + 0x3f003ef4, 0x03fe82cf, 0x001b040f, 0xe0437c00, 0xff003f60, 0x0ada03fc, + 0x00ff003f, 0xc00bf003, 0xfc00ff00, 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, + 0xf003c044, 0x30000000, 0x00000000, 0x80046801, 0xb34022c8, 0x0b30020e, + 0x428b0036, 0x000db003, 0x6c00b804, 0x2e300db6, 0x02c80080, 0x8122000b, + 0xac0a6c00, 0xeb022ce8, 0x08a002ec, 0x00bb002e, 0xc00bb002, 0xec00bb00, + 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xb002e040, 0x10000000, 0x00000000, + 0x80052808, 0xbb0922c0, 0x0bb10261, 0x008b0022, 0x4008b002, 0x2c009800, + 0x2ee10ab0, 0x02ec008b, 0x80aac08b, 0xa8026c00, 0xbb002ec8, 0x0ab402ec, + 0x00bb002e, 0xc00bb002, 0xec00bb00, 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, + 0xb002e000, 0x50000000, 0x00000000, 0x08040808, 0xb30020c0, 0x1bb00640, + 0x01830024, 0xc029302e, 0x4c00b200, 0x2c400800, 0x42c00081, 0x0068c00b, + 0xb0024c00, 0xa3042cc0, 0x1a1002cc, 0x00b3002c, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002c200, 0x00000000, 0x00000000, + 0x80056808, 0xbb0022c0, 0x0fb00b68, 0x088b0032, 0x000cb003, 0x2c00d900, + 0x3e008ab0, 0x03e800cb, 0x003ac00f, 0x90036c00, 0xfb003e41, 0x0e9003ec, + 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, + 0xb003c006, 0x10000000, 0x00000000, 0xa011f800, 0xff003fc0, 0x0ff0019c, + 0x00f7001f, 0xc00ff003, 0xfc00ff02, 0x2f010ff0, 0x03d800fd, 0x0537c08f, + 0xf023bc00, 0xef003fc0, 0x0dd003fc, 0x00ff043f, 0xc00ff003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc01ff, 0x003fc00f, 0xf003e806, 0x70000000, 0x00000000, + 0xc005fe00, 0xf72033c8, 0x0f600b3c, 0x00ec803f, 0xe00ff803, 0xfe00f580, + 0x33a00e60, 0x039200ec, 0x0021204e, 0xf820fe00, 0xb4803fe0, 0x0f7803f4, + 0x00fd0033, 0x200fd003, 0xf008ef80, 0x3f000e40, 0x033200f4, 0x803f200f, + 0xf803f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbbc02230, 0x0b9c0222, + 0x0088802e, 0xe00bb802, 0xee08ba80, 0xa2208898, 0x22221008, 0x80220008, + 0xb8006e00, 0xb8802ee0, 0x0bb002e0, 0x04b8002a, 0x200b8803, 0xaa00ab80, + 0x2e202888, 0x0a2e00bb, 0x802e200b, 0xb800e004, 0x30000000, 0x00000000, + 0xc805cc00, 0xb2402490, 0x0b21020c, 0x00a0002c, 0xc00b3002, 0xcc00b101, + 0x20803920, 0x02cc0828, 0x01204002, 0x3002cc00, 0x900024c0, 0x433002c4, + 0x00810228, 0xc00b1012, 0xc000a301, 0x2c000a00, 0x020c00b3, 0x002c000b, + 0x3002c201, 0x70000000, 0x00000000, 0xc015ac00, 0xba882640, 0x0b902220, + 0x2088002e, 0xc00bb002, 0xec08bb80, 0x22a00990, 0x02ec3088, 0x1020c008, + 0xb0226c00, 0xbb002ec0, 0x09b010ea, 0x00ab8c2a, 0xc00b9812, 0xea02ab10, + 0x2e60088c, 0x022c00bb, 0x000ec00b, 0xb402f004, 0x60000000, 0x00000000, + 0x0015ec10, 0xfd40b7e0, 0x4fc40b3f, 0x00ebc03e, 0xc00fb003, 0xec00f180, + 0x30e00fa4, 0x83e002e8, 0xe0b23c0e, 0xb001ec00, 0xf9003ec0, 0x0fb003e7, + 0x11f9c03a, 0x044f9c47, 0xe326e8c4, 0x3e200e1c, 0x012140fb, 0x003e900f, + 0x9c03d004, 0x70000000, 0x00000000, 0xb001bc00, 0xbd003b10, 0x07f003f3, + 0x00ff203f, 0xc00ff003, 0xfc00ff00, 0x2f400ec4, 0x133048f8, 0x803f200f, + 0xf0437c00, 0xfda03fc0, 0x8ff005f4, 0x04f4003f, 0x400fd003, 0x9002ff00, + 0x3c000fd0, 0x03fc00ff, 0x001f000f, 0xf103f800, 0x60000000, 0x00000000, + 0xc010ac00, 0xf0403280, 0x4f848b2d, 0x00cb403e, 0xc40fb003, 0xec00f900, + 0xb2800d20, 0x032c00da, 0x08b6480f, 0xb0a3ec08, 0xf90036c0, 0x0fb00325, + 0x88f94032, 0x090fb403, 0xe020f950, 0x3e600c90, 0x032c80fb, 0x0032988f, + 0xb043f004, 0x20000000, 0x00000000, 0xd8052c00, 0xb8502240, 0x8b3c8202, + 0x008b002e, 0xc00bb882, 0xec04bb00, 0x220888aa, 0x020c0082, 0x6022c008, + 0xb4066c00, 0xbb0222c0, 0x09bd1a2b, 0x84baf036, 0x504bb106, 0xea00b901, + 0x2e400d98, 0x0a2f80bb, 0x0036d00b, 0xb082f200, 0x40000000, 0x00000000, + 0xe0054c00, 0xb2002040, 0x0b380a08, 0x0083002c, 0xf80b3482, 0xcc00b300, + 0x20a00920, 0x00022090, 0xc02c9409, 0x3442cc00, 0xb2002cc0, 0x023d02a7, + 0x00b18000, 0x044b1d02, 0xc500b302, 0x2c002800, 0x828c00b0, 0x0028400b, + 0x2802f800, 0x50000000, 0x00000000, 0xf0011e00, 0xbe0021a0, 0x8b490230, + 0x2087802d, 0xe40b7802, 0xde08b680, 0x21204958, 0x12326085, 0x806be00a, + 0x7802de00, 0xbe8021e0, 0x0b790296, 0x00b58065, 0x200b4806, 0xde20b780, + 0x2de00968, 0x029e40bf, 0x802d600b, 0x7802d800, 0x40000000, 0x00000000, + 0x48080c00, 0xf3103000, 0x0f340b08, 0x40c3003c, 0xc49f3003, 0xcc40f300, + 0x30800d20, 0x030c50d3, 0x003cc00d, 0x3102cc00, 0xf2103cc0, 0x0f300384, + 0x40b91030, 0xc80f1000, 0xc400f300, 0x7c00d411, 0xa38d44f3, 0x1078100f, + 0x3003d202, 0x00000000, 0x00000000, 0x401dbc00, 0xff307fc0, 0x0fc003d8, + 0xc0ff003f, 0xc51ff003, 0xfc08ff00, 0xbdc00ed1, 0x03fc40bf, 0x1037c40d, + 0xf0207c00, 0xff0037c0, 0x0df0037c, 0x00ff142f, 0xc01fe003, 0xfc00ff01, + 0x3fc04ff1, 0x037c49ff, 0x0037c00f, 0xf003d006, 0x60000000, 0x00000000, + 0xa805ec08, 0xfa003260, 0x2c969b3e, 0x00cb003c, 0xe04eb022, 0xec00f300, + 0x0ac00fa2, 0x03cc00c1, 0x00b68003, 0xb043ec00, 0xfb003ec0, 0x0fb80324, + 0x00f9003e, 0x900f9003, 0xe012ca80, 0x30c00c90, 0x43ce00cb, 0x003ec60f, + 0xb003ea00, 0x70000000, 0x00000000, 0xc8119c00, 0xb2002080, 0x08600218, + 0x0087002d, 0xc0087002, 0xdc00b700, 0x3dc00b60, 0x82dc0085, 0x0035c00b, + 0x70039c01, 0xb7042dc0, 0x0bf0121c, 0x08e5002d, 0xd20b5002, 0xd8088601, + 0x35c00f70, 0x02dc0087, 0x002d480b, 0x7002f204, 0x60000000, 0x00000000, + 0x80009e00, 0xb7802120, 0x0818020e, 0x0087882d, 0xe00a7802, 0xde04bf80, + 0x21a08b68, 0x06de0087, 0x8021e00b, 0x7802de01, 0xb7802de0, 0x0b780256, + 0x0027802d, 0xa80b7882, 0xd2008780, 0x21e00978, 0x12de0197, 0x802da00b, + 0x7802f000, 0x20000000, 0x00000000, 0x4814cc00, 0xb31020c0, 0x08290a09, + 0x2083482c, 0xc0083002, 0xcc00b348, 0x2cc00b33, 0x06cf2083, 0x50a4c00b, + 0x3002cc00, 0xb3402cc0, 0x0b300a4c, 0xc0b3122c, 0xf40b3c02, 0xca848302, + 0x24d20b36, 0x22cc0893, 0x022ce40b, 0x3c02d204, 0x30000000, 0x00000000, + 0xe815a800, 0xfa80b280, 0x0ca00339, 0x22c6803e, 0x800ea003, 0xe800f640, + 0x33800fa8, 0x23d802ce, 0x9033810f, 0xa003e800, 0xfe403e80, 0x0fa0077a, + 0x00ee003e, 0xb10fec03, 0xdb80ce01, 0x33a20de4, 0x23f802d6, 0xa03e800f, + 0xe483fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf0003f00, 0x8f4003e0, + 0x00f8003e, 0x000f8003, 0xe000f800, 0x3e024f84, 0x03e040f8, 0x40be0007, + 0x8403a000, 0xf8213e00, 0x0f8003a0, 0x00e8413e, 0x020f8083, 0xe100f886, + 0x3e100f85, 0x03e100e8, 0x003e100f, 0x8083d200, 0x30000000, 0x00000000, + 0x0810e400, 0xf9003240, 0x0f900324, 0x00f90036, 0x688f9003, 0xe400f900, + 0x32400db8, 0x13e40059, 0x0232600f, 0x9003e400, 0xe9007e40, 0x0f9407e5, + 0x00e9493e, 0x400f1203, 0x2600c990, 0x3a482d14, 0x132400f9, 0x2832600c, + 0x9003c204, 0x30000000, 0x00000000, 0x80046400, 0xb900a240, 0x0b900224, + 0x00b90222, 0x70099802, 0xe400b920, 0x20490892, 0x02e40081, 0x0022400e, + 0x9002e400, 0xb9002e40, 0x0b9402e5, 0x00b9002e, 0xc20b9c27, 0x6470a900, + 0x38520892, 0x022500b9, 0x4134d008, 0x9802e000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002740, 0x0bd20224, 0x00bb0026, 0x420b9602, 0xe400b900, + 0xaec40991, 0x06e400b9, 0x4062440b, 0x9402e400, 0xa9002e40, 0x0a9086ec, + 0x00b9022e, 0x404bb402, 0x24008b00, 0x2ec02890, 0x122400b9, 0x08624408, + 0x9202c600, 0x40000000, 0x00000000, 0x08040400, 0xb1002540, 0x4b500a04, + 0x00b90020, 0x40091002, 0xc401b100, 0x2e410810, 0x06e40021, 0x0024500a, + 0x1002c400, 0xb1002c40, 0x0b1142cc, 0x40b3146c, 0x400b1012, 0x6410a100, + 0x28402810, 0x020c01b1, 0x00264008, 0x1002c201, 0x00000000, 0x00000000, + 0xb80d6000, 0xf828360a, 0x0fc28320, 0xa0f80036, 0x000f8003, 0xe000b800, + 0x3e000d80, 0x03e000f8, 0x00b2808f, 0x8003e000, 0xe8002e00, 0x0f8402e1, + 0xa0f8683e, 0x000f8282, 0x20a0c800, 0x3a0a0d82, 0x8b2000f8, 0x0032802c, + 0x8003ce03, 0x50000000, 0x00000000, 0x981de400, 0xfd003a40, 0x0f9003f4, + 0x00fd003e, 0x40019003, 0xe400fd00, 0x33c04f94, 0x03f41cdd, 0x413b400e, + 0x9003e400, 0xfd003e40, 0x0f9243f4, 0x84fd203e, 0x400fd001, 0xd400f504, + 0x3f40afd0, 0x03f400fd, 0x003e400f, 0xd003e606, 0x70000000, 0x00000000, + 0x9805e400, 0xf9283e48, 0x0c501334, 0x00fd0033, 0x410fd003, 0xe400fd00, + 0x31c00fd0, 0x431400cd, 0x0002400f, 0xd000e400, 0xf9003e41, 0x0fd00334, + 0xc0fd003e, 0x400c5003, 0xf480cf00, 0xb1480c50, 0x03f400c5, 0x003e400f, + 0xd0030600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002f04, 0x08840220, + 0x00b80022, 0x000b8023, 0xa000b800, 0x22000b80, 0x022000b8, 0x002a800b, + 0x80026000, 0xb8003a00, 0x0b821360, 0xc0b8482e, 0x80088102, 0xe000a800, + 0x220408a4, 0x02e000d8, 0x002e800b, 0x80034e04, 0x30000000, 0x00000000, + 0x4805c400, 0xb5002d40, 0x28110a44, 0x40b100a0, 0x400b1002, 0xc400b900, + 0x20400b18, 0x02040091, 0x0060400b, 0x3002c400, 0xb1002c40, 0x0b128204, + 0x80b1312e, 0x40381842, 0xc4428100, 0x20400811, 0x02c40081, 0x002c400b, + 0x10020201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002f40, 0x08900264, + 0x00b90022, 0x400b9002, 0xa400b900, 0x22400b90, 0x022400b9, 0x082a400b, + 0xb0226400, 0xb9002e40, 0x0b90026d, 0x00b9002e, 0x40089102, 0xec00a910, + 0x22c00891, 0x02ed0099, 0x402e400b, 0x90824604, 0x60000000, 0x00000000, + 0xa011e400, 0xf9083e42, 0x0c900b64, 0x00f90032, 0x400f9003, 0xe404f160, + 0xb2500f94, 0x0b0760c1, 0x0032440f, 0x9003e400, 0xf9483e40, 0x0f900326, + 0x40f9183c, 0x600c9443, 0xc600c1a0, 0x32520c90, 0x03c400c9, 0x403e540f, + 0x95032804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003c40, 0x8f9007a4, + 0x80f9003e, 0x400f9003, 0xa400f900, 0x3e444f92, 0x03e618e9, 0xc03ee08f, + 0x90036400, 0xf9c03a40, 0x0f9023e4, 0x00f9843e, 0x681f9003, 0xe484f900, + 0x3c402f98, 0x03e730f9, 0x243e600f, 0x9003ea00, 0x60000000, 0x00000000, + 0x2810a000, 0xf8403212, 0x0c000360, 0x00f8203e, 0x020f8303, 0x2000f848, + 0x36000c00, 0x03e004c8, 0x40b20c8f, 0x8043e000, 0xf8003e00, 0x0f8103e1, + 0x00f8183e, 0x040f8003, 0x20c0c840, 0x32104d80, 0x0b2000f8, 0x1032000f, + 0x8043ca04, 0x20000000, 0x00000000, 0x28052800, 0xba002290, 0x08e0032a, + 0x00b6202f, 0x820be002, 0x2800be08, 0x2b950fe0, 0x02fb288e, 0x0022900b, + 0xe402e800, 0xba002e80, 0x0be806fa, 0x20bec02e, 0xb00ee90e, 0x3804aed0, + 0x37a22ae8, 0x033900be, 0x0016a60b, 0x2082ca00, 0x40000000, 0x00000000, + 0x28054c00, 0xb2002070, 0x4800020e, 0x00b3802c, 0xf00b3806, 0x0c00b3c0, + 0x24440830, 0x02cc8183, 0x10a4c00b, 0x24828c00, 0xb3002cc0, 0x0bb802ce, + 0x80b3402c, 0xc20b3d02, 0x4f108301, 0x20c00939, 0x120f10b3, 0x8860d04b, + 0x3802ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb780a150, 0x08700214, + 0x20b7002d, 0x000b7806, 0x1c00bf00, 0x29e00b70, 0x02d4008f, 0x0025800b, + 0x6002dc00, 0xb7002dc0, 0x0b7012d4, 0x00b6002d, 0x810a7802, 0x5c04af44, + 0x25c02a78, 0x021d00b7, 0x8065c00b, 0x7002e800, 0x40000000, 0x00000000, + 0xa8081e00, 0xf2803060, 0x2c480b1e, 0x00b7803d, 0xe00f580b, 0x1e00f780, + 0x35e00c78, 0x13de02c7, 0x8035e00f, 0x68039e00, 0xb7803de0, 0x0f5802da, + 0x00f7822d, 0xe20f5802, 0x5e00c784, 0x71e00d78, 0x031e10f7, 0x8031e40f, + 0x7803ea02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003e40, 0x0f9003a4, + 0x00fb003e, 0x400f1003, 0xec00f302, 0x2ec00b90, 0x03e40473, 0x003a500f, + 0xb003ec00, 0xfb003ec0, 0x0f8013e4, 0x00f9001e, 0x800eb003, 0x8c02f300, + 0x3ec00fa0, 0x13ac00fb, 0x003e980f, 0xb003c206, 0x60000000, 0x00000000, + 0x4005fe00, 0xfe803be0, 0x0cc8033e, 0x00cf8033, 0xe00ff803, 0xfe00fe80, + 0x33e00cf8, 0x03fe00c7, 0x8033300c, 0xf203fe00, 0xff803fe0, 0x0ff8037e, + 0x40cd803f, 0xe40f7813, 0xde04c780, 0x33e06ff8, 0x033e40cf, 0x863fa40f, + 0x78030000, 0x70000000, 0x00000000, 0xa8119c00, 0xb70021c0, 0x0870021c, + 0x20870021, 0xc0034402, 0xdc00b600, 0x29d80d70, 0x12dc00a7, 0x20350002, + 0x7002dc00, 0xb7002dc0, 0x0bd04294, 0x44a4402d, 0x440b7003, 0x1c088510, + 0x35c40a70, 0x029c40a7, 0x042d840b, 0x70036a04, 0x60000000, 0x00000000, + 0x10009c00, 0xba0028c0, 0x0800021c, 0x00870021, 0x400b7002, 0xdc00b700, + 0x21c00870, 0x82dc0087, 0x0021400a, 0x7102dc00, 0xb7002dc0, 0x0b510294, + 0x0195082d, 0x808b7182, 0xb4408700, 0x2dc02a70, 0x023c2897, 0x002d410b, + 0xf0820000, 0x20000000, 0x00000000, 0x6814cc00, 0xb30020cc, 0x0810020f, + 0x008300a0, 0x400b1002, 0xcc00b350, 0xa8c88916, 0x02cc00a3, 0x60e47808, + 0x3002cc00, 0xb3202cc0, 0x0b000287, 0x18b00024, 0x180b2812, 0x0c028360, + 0x2cf00a20, 0x028e20b3, 0xc02c220b, 0x3c024804, 0x30000000, 0x00000000, + 0x3815ac00, 0xfa003a90, 0x0caa0b2f, 0x02cb0032, 0x400f8003, 0xec00f340, + 0xb2d20cb4, 0x03cc00c2, 0x0030b82e, 0x3003ec00, 0xf3003ec0, 0x0fb003ae, + 0x01db423e, 0x400fb423, 0xac00cbc0, 0x3ee00e38, 0xa30900d3, 0xc03e780f, + 0x91032a04, 0x60000000, 0x00000000, 0x8000ec00, 0xf3003e80, 0x8f8083e4, + 0x00fb003e, 0x000f9003, 0xec00fb60, 0x3ed08fb0, 0x23ed00f9, 0x403e800b, + 0xb003ec00, 0xfb103ec1, 0x0f9411a5, 0x44eb403e, 0x000fb207, 0xeb00f9c0, + 0x16d40e90, 0x03e910eb, 0x183e404f, 0xb013e000, 0x30000000, 0x00000000, + 0x8010fc18, 0xfe003180, 0x0c60030c, 0x204f1037, 0x400fd003, 0xfc00ff00, + 0x33800fe0, 0x03fc80cf, 0x0033a00d, 0xf0033c00, 0xff0037c1, 0x0fc003c8, + 0x21cd083f, 0x490ff003, 0x1c04cfa2, 0x338209b8, 0x033840cf, 0x1023608f, + 0xf8030044, 0x30000000, 0x00000000, 0x80006c00, 0xbb0022bc, 0x08a80364, + 0x0083a022, 0x600b9c02, 0xec009b88, 0x2aa04b84, 0xa26d2689, 0x80228408, + 0xa8022c00, 0x9b0022c0, 0x098487a7, 0x00a9c02e, 0x200d308a, 0x2d08a104, + 0x34302d88, 0x02ad00db, 0x8036240b, 0x3902a040, 0x10000000, 0x00000000, + 0x80052c08, 0xba0022c0, 0x08ac026c, 0x00a80026, 0xa00ba802, 0xec04b980, + 0x22e00bb0, 0x12e8008a, 0xc0228209, 0x98026c01, 0xbb0026c0, 0x0bb202e6, + 0x0089800e, 0xc00bb102, 0x2c408a40, 0x26e00b92, 0x526c008b, 0x086a800b, + 0xb0026000, 0x40000000, 0x00000000, 0x08040c01, 0xb30020c0, 0x08000a4c, + 0x02a80020, 0xa00b0002, 0xcc01b900, 0xa8c04b30, 0x024c028b, 0x002a8008, + 0x1002cc00, 0x9b0020c1, 0x09100684, 0x10a1042c, 0x410a3006, 0x0c00a800, + 0x24c10b10, 0x12e4019b, 0x006c800b, 0xb062c201, 0x00000000, 0x00000000, + 0x800d6c00, 0xfa0032c0, 0x2ca00b6c, 0x00e80036, 0x400fb003, 0xec00f900, + 0x32c00fa0, 0x03e802cb, 0x00a0804d, 0x900b6c00, 0xbb0036c0, 0x0f8002e0, + 0x0089003e, 0x804bb00a, 0x2c10ca04, 0x32800fb0, 0x036c08c8, 0x003a400f, + 0xb0034003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x8fe003bc, + 0x00d4003f, 0x4003d003, 0xfc08d500, 0x1dc00fc0, 0x035c00ff, 0x00b7804f, + 0xd0033c00, 0xdf0237c0, 0x0dc053f4, 0x10fd063f, 0x010df001, 0xfc00fc00, + 0x3d802dc0, 0x239400fc, 0x0137000f, 0xf003a806, 0x70000000, 0x00000000, + 0xc005fe10, 0xfc103d20, 0x0ec803de, 0x40cf803f, 0xc80ffc03, 0x3c00f780, + 0x3fe00ff8, 0x033e40ff, 0x2073600f, 0xe20b3e40, 0xff803de4, 0x0cf803fe, + 0x00ff802d, 0xa00cf903, 0x3f00cf80, 0x33e00ff8, 0x03fe00ff, 0x803fe00f, + 0xf803f000, 0x70000000, 0x00000000, 0xc010ee18, 0xb9620e60, 0x08b802ec, + 0x008b282e, 0xf00bb202, 0xaf40bb80, 0x2ee00ba8, 0x428c808f, 0x3022600b, + 0xa4922c00, 0xbb802ec0, 0x08b802ee, 0x00bb802e, 0x8008b002, 0x2c808b28, + 0x22c20bb8, 0x02ee00bb, 0x812ee00b, 0xb802e006, 0x30000000, 0x00000000, + 0xc805cc00, 0xb2422e40, 0x0a3002cc, 0x0083202c, 0xd00b3202, 0x0c109300, + 0x2cc00ba0, 0x020c90b3, 0x0860c00b, 0xa3024c00, 0xb3012cc1, 0x183002cc, + 0x00b2002e, 0x80083202, 0x0c808320, 0x20c00b30, 0x02cc00b3, 0x002cc00b, + 0x3002c201, 0x70000000, 0x00000000, 0xc015ac20, 0xba012e40, 0x88a022ee, + 0x008b002e, 0xc00bb002, 0xac00bb08, 0x2e800ba8, 0x22ac008b, 0x2022400b, + 0xa1006c00, 0xbb002ec0, 0x08b002ec, 0x00ba002e, 0xb028304a, 0x0c008300, + 0x22c00bb0, 0x02ec04bb, 0x002ec00b, 0xb002f000, 0x60000000, 0x00000000, + 0x0015ec08, 0xfc003e40, 0x4eb603ec, 0x02cb003e, 0xc00fb023, 0x2c00f900, + 0x3ec00fb8, 0x032c04f9, 0x00a2c40f, 0xa0036c00, 0xfb003ec0, 0x0cb003ec, + 0x00fba03c, 0xb00cb003, 0x2ec0cb40, 0x32c00fb0, 0x03ec00fb, 0x003ec00f, + 0xb003c004, 0x70000000, 0x00000000, 0xa001be40, 0xff003f41, 0x0fd913fc, + 0x00ff003e, 0xc00ff003, 0xfc08ff02, 0x3fc00fe0, 0x23fc12fb, 0x00bfe00f, + 0xa803bc00, 0xff003fc0, 0x0ff003fc, 0x08ff403f, 0x000ff003, 0xfc00ff20, + 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003e800, 0x60000000, 0x00000000, + 0xc010ad00, 0xc8802000, 0x0cb547ec, 0x10cb003e, 0xc00cb007, 0xec00f940, + 0x32400fa2, 0x032c03e1, 0x0036c90c, 0x85032c00, 0xeb003ec0, 0x0cb003ec, + 0x00fa4032, 0x800db003, 0x2c40cb00, 0x32c00cb0, 0x03ec00fb, 0x043ec00f, + 0xb003f004, 0x20000000, 0x00000000, 0xc8052e84, 0x8a002260, 0x08b806cc, + 0x008b002f, 0xc00db007, 0xfc08fb50, 0x36200b20, 0x036c00db, 0x5832f00d, + 0x00022c08, 0x8b002cf2, 0x0db002ec, 0x00ba0022, 0xa008b582, 0x2d408b50, + 0x22d608b0, 0x02ec00bb, 0x002ec00b, 0xb002f200, 0x40000000, 0x00000000, + 0xe0054d80, 0x80042040, 0x083802cc, 0x0083002c, 0xc008b002, 0xcc009340, + 0x20e40b1c, 0x02ae00a3, 0x40207008, 0x28028c00, 0xa3902ce2, 0x093002cc, + 0x00b30020, 0x0009300a, 0x0e008310, 0x20c02930, 0x02cc00b3, 0x0028c00b, + 0x3002f000, 0x10000000, 0x00000000, 0xf0013e00, 0x85a02322, 0x087816fe, + 0x0187802d, 0xe0097802, 0x9e08af82, 0x65e11b48, 0x02de2097, 0x80256001, + 0x68029e00, 0x87102de4, 0x097802de, 0x00bf8023, 0x20087802, 0x14008680, + 0x21e00978, 0x02de00b7, 0x802de00b, 0x7802d804, 0x10000000, 0x00000000, + 0x48080c00, 0x8b002044, 0x081312cc, 0x02c3002c, 0xc0083002, 0xcc009200, + 0x30c00f21, 0x938c02a3, 0x00304204, 0x200b8c00, 0xe3103cc0, 0x0d3003cc, + 0x00f10030, 0x420db003, 0x2800c900, 0x32c00d30, 0x03cc00f3, 0x0038c00f, + 0x3003d202, 0x10000000, 0x00000000, 0x401d9d02, 0xff20bf44, 0x2ff103fc, + 0x407f003f, 0xc00ff003, 0xfc00fe00, 0x3f800f60, 0x037c00ff, 0x1039c00f, + 0xe0035c00, 0xff203fc1, 0x0ff003fc, 0x00f700bf, 0x400ff003, 0xf000fc10, + 0x3fc00ef0, 0x03fc00ff, 0x003fc00f, 0xf003d004, 0x60000000, 0x00000000, + 0xa805ed40, 0xf8003240, 0x0fa483ec, 0x00cb003e, 0xc00eb803, 0x2c40f900, + 0x3ec00f90, 0x13ec08c9, 0x2032c00f, 0x80432c00, 0xfb0032e0, 0x0eb003ec, + 0x00fb8038, 0x000cb003, 0x2c00fb00, 0x32c00fb0, 0x03ec00fb, 0x003ac00f, + 0xb003c200, 0x70000000, 0x00000000, 0xc8119c80, 0xb7000141, 0x8b7002fd, + 0x0087002d, 0xe10bf002, 0x9e80b700, 0x2dc00b40, 0x02fc0085, 0x0821c00b, + 0xd0421c00, 0xb700a1c0, 0x0a7002dc, 0x00b70029, 0x8008700a, 0x1400be00, + 0x21c00b70, 0x02dc00b7, 0x002dc00b, 0x7002f206, 0x60000000, 0x00000000, + 0x80009e00, 0xb1802160, 0x0b7802df, 0x0087802d, 0xe40b7802, 0x5e00b480, + 0x2d600b68, 0x02de029d, 0x8025f00b, 0x58421e00, 0xb78021e0, 0x0a7802de, + 0x00bd8023, 0x20087802, 0x1a00b580, 0x21e00b78, 0x02de00b7, 0x802de00b, + 0x7802c840, 0x20000000, 0x00000000, 0x4814cf00, 0xb3932012, 0x8b0802cc, + 0x0083002c, 0xc00b3002, 0x8c00b280, 0x2c204b20, 0x02ec0281, 0x1024c00b, + 0x990a4c00, 0xb30020c0, 0x0a3002cc, 0x00b3022a, 0x30083002, 0x0000b000, + 0x20c00b30, 0x02cc00b3, 0x002cc00b, 0x3002da00, 0x30000000, 0x00000000, + 0xe815b360, 0xfe803090, 0x0f2e03c2, 0x02ca003e, 0x800fa003, 0x6800fa80, + 0x3ea00f60, 0x02e800da, 0x80b6800f, 0xe0032800, 0xfa003280, 0x0ea003e8, + 0x00fe0033, 0xa80ca003, 0x2800fa00, 0xb2800fa0, 0x03e800fa, 0x003e800f, + 0xa003fa04, 0x70000000, 0x00000000, 0x4800e000, 0xf800be00, 0x4f80e3e0, + 0x04f8003e, 0x000f8003, 0xa010f010, 0x3e044f80, 0x03e000e8, 0x003a100f, + 0x8483a000, 0xf8403e10, 0x0f8003e0, 0x00f8003e, 0x122f8003, 0xe100f800, + 0x3e000f80, 0x03e000f8, 0x003e000f, 0x8003d200, 0x60000000, 0x00000000, + 0x0810e280, 0xc9013268, 0x8c901320, 0x02c9003e, 0x400f9003, 0xe400f900, + 0x72400f90, 0x07a442c9, 0xc0ba400f, 0x92032680, 0xc9003240, 0x0f9003e4, + 0x00f9002e, 0x400c9003, 0x2400c900, 0x32400c90, 0x03e400f9, 0x003e400f, + 0x9003c204, 0x20000000, 0x00000000, 0x80044500, 0x89002260, 0x48900a24, + 0x0189002e, 0x400b9002, 0xe400b900, 0x36400f91, 0x86260089, 0xc022680b, + 0x94836400, 0xd1883644, 0x0b9002e4, 0x00b9002e, 0x4008900a, 0x25828900, + 0xa2402890, 0x02e400b9, 0x002e400b, 0x9002e000, 0x10000000, 0x00000000, + 0x18052422, 0x9380a2c0, 0x28d10224, 0x0089002e, 0x400b9002, 0xe400b900, + 0x27400b90, 0x42a40081, 0x002a481b, 0xb0020400, 0x89102e40, 0x0b9002e4, + 0x00b9002e, 0x44091002, 0x1400b700, 0x20400890, 0x02e400b9, 0x002e400b, + 0x9002ce00, 0x40000000, 0x00000000, 0x08042044, 0x91102140, 0x08511204, + 0x4081102c, 0x400b1102, 0xc400bd00, 0xa1400a90, 0x02044181, 0x14a0401b, + 0x11024440, 0x91002444, 0x0b1002c4, 0x00b1002c, 0x44091102, 0x1440b510, + 0x20440810, 0x00c400b1, 0x002c400b, 0x1002ca05, 0x00000000, 0x00000000, + 0xb80d61a0, 0xda683200, 0x0cc40221, 0xa088403e, 0x0a0f8403, 0xe0a0f800, + 0x27000b80, 0x02a100ca, 0xe93a010f, 0x86832100, 0xc8003490, 0x0f8003e0, + 0x00f8003e, 0x902d0413, 0x2100fc40, 0x32100c80, 0x03e000f8, 0x003e000f, + 0x8003ee03, 0x50000000, 0x00000000, 0x981df080, 0xed213fc0, 0x0f9203f0, + 0x80f9203e, 0x400f9203, 0xe400fd00, 0x3e400fd0, 0x43e688e5, 0x203f400f, + 0xd202e480, 0xf1003e48, 0x079003e4, 0x00f5003f, 0x480e9203, 0xe480c920, + 0x3e480f90, 0x03e400f9, 0x003e400f, 0x9003e604, 0x70000000, 0x00000000, + 0x9855d200, 0xfd043d40, 0x0fc403b6, 0x00c9002e, 0x400f9003, 0xe400c100, + 0x36400f50, 0x03b400d9, 0x2831400f, 0x5013f400, 0xcd003f40, 0x0f9003e4, + 0x00f9003f, 0x400e9003, 0x2400c900, 0x32400c90, 0x01e400f9, 0x003e400f, + 0x9003e600, 0x70000000, 0x00000000, 0x3810e320, 0xba002e00, 0x0b8a02e0, + 0x00a8003a, 0x000b8002, 0xe010a800, 0x23000b80, 0x0240a088, 0x2022004b, + 0x8486e002, 0x88002e0a, 0x0b8002e0, 0x00b8002e, 0x00088002, 0x28008004, + 0x23000880, 0x22e000b8, 0x002e000b, 0x8002ce06, 0x30000000, 0x00000000, + 0x4805c0c0, 0xb1002c40, 0x431002c4, 0x4081002c, 0x400b1002, 0xc4008d00, + 0x21600b90, 0x02c48099, 0x2824401b, 0x1302c400, 0x91002c48, 0x0b1002c4, + 0x04b1002e, 0x400a5002, 0x14008500, 0x21400810, 0x02c400b1, 0x002c400b, + 0x1002d200, 0x20000000, 0x00000000, 0x1811a400, 0xb9272e40, 0x8b90c2e6, + 0x00a9002a, 0x400b9002, 0xe400a900, 0x23400b90, 0x02640089, 0x0026c00b, + 0x9082c404, 0x99002e40, 0x0b9002e4, 0x00b9002e, 0xc208900a, 0x14108d10, + 0x03400890, 0x06e400b9, 0x002e400b, 0x9002c600, 0x20000000, 0x00000000, + 0xa005e780, 0xf9c03e50, 0x0f9803e6, 0x00c9003e, 0x400f9003, 0xe400c920, + 0xb2400f18, 0x83a410d1, 0x00b6600f, 0x9002e400, 0xd9003e40, 0x0f9003e4, + 0x00f9483e, 0x640e9003, 0x2502c980, 0xb2402c90, 0x03e400f9, 0x003e400f, + 0x9003e804, 0x70000000, 0x00000000, 0xe801a118, 0xf9893e40, 0x0f8903e4, + 0x10f9003a, 0x400f9003, 0xc408f902, 0x3a480f92, 0x03a400fb, 0x083a4b0f, + 0x9203e401, 0xe9003e42, 0x0f9003e4, 0x00f9903e, 0x600f9003, 0xe400f982, + 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003f200, 0x60000000, 0x00000000, + 0x2800a120, 0xc8413e01, 0x0c8043e0, 0x00c8003e, 0x000f8003, 0xe000f000, + 0x32210f84, 0x83a000c8, 0x003a000c, 0x80036000, 0xc8003200, 0x0c8003e0, + 0x00f8403e, 0x100dc003, 0x31028c00, 0xb3000c80, 0x03e008f8, 0x003e000f, + 0x8003c204, 0x20000000, 0x00000000, 0x28053000, 0xde002e80, 0x088802e8, + 0x00da002e, 0x800ba002, 0xe800fa00, 0x36800bec, 0x822a018a, 0x0023900d, + 0xe24f2a22, 0xce8463a9, 0x0da012e8, 0x00ba002d, 0x8008a003, 0x68008aa1, + 0x228008a0, 0x02e800ba, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000, + 0x28054f40, 0x83002c60, 0x083902e4, 0x0083002c, 0xc00b3002, 0xcc00b200, + 0x20400b3c, 0x02ae5283, 0x40a8d009, 0x22020e04, 0x830020e0, 0x083002cc, + 0x00b3002c, 0xc009b012, 0x0c008bc8, 0x6a800830, 0x02cc00b3, 0x002cc00b, + 0x3002ca00, 0x50000000, 0x00000000, 0xa0011e40, 0x97006ff0, 0x287102d4, + 0x0097002d, 0xc00b7002, 0xdc04af00, 0x25c00bd0, 0x021c0086, 0x0821e20b, + 0x68021c04, 0x878821a0, 0x097002dc, 0x00b7022f, 0x50284002, 0x50008402, + 0x69400870, 0x02dc00b7, 0x002dc00b, 0x7002e000, 0x40000000, 0x00000000, + 0xa8081ea0, 0xc5803de0, 0x087a22f6, 0x00c7807d, 0xe00f7803, 0xde00b680, + 0x21600b78, 0x03960283, 0x88b9e00d, 0x58033600, 0xc780a1e0, 0x0c7803de, + 0x00f7803d, 0xa10df803, 0x3a00c780, 0x3ba22c78, 0x03de00f7, 0x803de00f, + 0x7803e002, 0x00000000, 0x00000000, 0x0819ac02, 0xe9001e40, 0x4fb003e6, + 0x40fb903e, 0xc00fb903, 0xec00fb00, 0x3ec00fb0, 0x03ed00f8, 0x223ec00d, + 0x9003a5a0, 0xe3003cc0, 0x0fb003ec, 0x08fb003d, 0x802f8003, 0xe400f800, + 0x36400fb0, 0x03ec00fb, 0x003ec00f, 0xb003c206, 0x60000000, 0x00000000, + 0x4005fe00, 0xff8033e0, 0x0ff903f6, 0x00ff8033, 0xe00cf803, 0xfe00fe80, + 0x3f200ff8, 0x035700df, 0x8037e40f, 0xf2077c00, 0x7f803fe0, 0x0ff803fe, + 0x00ff9033, 0xe007f803, 0x3e00cc80, 0x3fa00cf8, 0x02fe40ff, 0x803fe00f, + 0xf803f000, 0x20000000, 0x00000000, 0xa8119c84, 0xe70121c0, 0x0b7002d4, + 0x00bf0029, 0xc00a7012, 0xdc04b742, 0x2d800b60, 0x021c0086, 0x0021cc0b, + 0x71429c80, 0xb7002dc0, 0x0b7002dc, 0x00b70029, 0x420bc002, 0x10008700, + 0x2d400870, 0x02dc00b7, 0x002dc00b, 0x7002ea06, 0x20000000, 0x00000000, + 0x10009c30, 0x3000a5c0, 0x0b7002d4, 0x00b70025, 0xc0097002, 0xdc00b600, + 0x2d100bf0, 0x025c0080, 0x0025c30b, 0x50021e40, 0xb7002dc0, 0x0b7002dc, + 0x00bf0861, 0x840b700a, 0x38208400, 0x2d800870, 0x02dc08b7, 0x002dc00b, + 0x7002c600, 0x20000000, 0x00000000, 0x6014cd04, 0xa04124d2, 0x8b3c02c4, + 0x00bb002c, 0xc00b3002, 0xcc00b380, 0x2c810b34, 0x122c0480, 0x8020e00b, + 0x32068c00, 0xb3002cc0, 0x4b3002cc, 0x00b380aa, 0x800b8002, 0x26088300, + 0x0c400930, 0x02cc00b3, 0x002cc00b, 0x3002d800, 0x20000000, 0x00000000, + 0x28158e10, 0xfa8036d0, 0x0fb607d4, 0x00ff0036, 0xc00df003, 0xec08fba0, + 0x3ec10bb4, 0x036c02cb, 0x0836e00f, 0xa0022400, 0xfb003ec0, 0x0fb003ec, + 0x00fb8022, 0xe00f8003, 0x26020b40, 0x2e402cb0, 0x03ec00fb, 0x002ec00f, + 0xb003da04, 0x60000000, 0x00000000, 0x8000ed80, 0xf85c3ac1, 0x8fb003e6, + 0x08fb063a, 0xc00eb063, 0xec00fb40, 0x3ec00fb0, 0xc3ec10e3, 0x403ed00f, + 0xa003a400, 0xfb403e80, 0x0fb003ec, 0x00fb003e, 0x500fb003, 0xe800f804, + 0x3e900eb0, 0x03ec00fb, 0x003ec00f, 0xb003e400, 0x30000000, 0x00000000, + 0x8010fc00, 0xcea43fe8, 0x9ff087f4, 0x00cf0032, 0xc00ff043, 0xdc00cf02, + 0x33c00ff2, 0x037601cf, 0x0033d00c, 0x9003f640, 0xfe003f40, 0x0cf003fc, + 0x00ff0033, 0xc00cc813, 0x2000df08, 0x3f600cf0, 0x03fc00ff, 0x003fc00f, + 0xf003e804, 0x30000000, 0x00000000, 0x80006c40, 0x8cc02ec0, 0x0bb007e4, + 0x00cb0036, 0xc00bb002, 0xec00d300, 0x76c00b3e, 0x03664489, 0x2120f128, + 0x9013a600, 0xba802ce0, 0x0db022ec, 0x08b30023, 0xf008f803, 0x7c028c00, + 0x2fa008b0, 0x02ec08bb, 0x002ec00b, 0xb002e840, 0x10000000, 0x00000000, + 0x80012c21, 0x8b402e40, 0x9bb212e4, 0x009b0122, 0xc04bb012, 0xec158b00, + 0x22c80bb0, 0x0224068b, 0x0022c008, 0xb002ec00, 0xbbc02e60, 0x09b002ec, + 0x01bb0022, 0x60088602, 0x24808800, 0x2c5808b0, 0x02ec00bb, 0x002ec00b, + 0xb002e000, 0x40000000, 0x00000000, 0x08040c10, 0x01046cc0, 0x0b301284, + 0x00830024, 0xc00b3042, 0xcc009b02, 0x24e00b30, 0x02440483, 0x00a2c008, + 0x30028c00, 0xb3002cc0, 0x493002cc, 0x00bb0020, 0x40083002, 0x48008300, + 0x2c802830, 0x06cc00b3, 0x012cc00b, 0x3022c205, 0x00000000, 0x00000000, + 0x800d6c00, 0xca003ec0, 0x0bb002e4, 0x02db0022, 0xc00fb003, 0xec00cb00, + 0x22c00fb0, 0x033c0888, 0x00b2808c, 0x9003f408, 0xf8002e40, 0x0db003ec, + 0x04fb00b2, 0xc02c800b, 0x2000c800, 0x3c400cb0, 0x03ec00fb, 0x037ec08f, + 0xb003e003, 0x50000000, 0x00000000, 0xa019fc12, 0xfc013f40, 0x0ff001f4, + 0x00ff003f, 0xc08ff003, 0xfc04ff00, 0x3fc00f70, 0x03fc007c, 0x013f400f, + 0xf007b400, 0xfe003f41, 0x07f003fc, 0x00f7007f, 0xc08ff003, 0xfc01ff00, + 0x7f800ff0, 0x03fc00ff, 0x007fc00f, 0xf003e804, 0x70000000, 0x00000000, + 0xc005fe00, 0xff8033e0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xfe00ff80, + 0x3de00ee0, 0x03b800f6, 0x003b800e, 0xf003fe00, 0xff803d20, 0x0ff813fe, + 0x00ed0033, 0x400cd003, 0xf200cd02, 0x35000cf8, 0x03fe02cc, 0x813f200f, + 0x7803f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb0022e0, 0x4bb802ee, + 0x00bb822e, 0xe00bb822, 0xee00bb80, 0x2ee008a8, 0x022a00ba, 0x8022a008, + 0xb802ee00, 0xbb802e20, 0x0bb8226c, 0x04e80022, 0x600c8803, 0xa0108984, + 0x6b200ab8, 0x02ee008b, 0x822ea00b, 0xb802e804, 0x30000000, 0x00000000, + 0xc805cc04, 0xb30220c0, 0x4b3022cc, 0x00b3006c, 0xc00b3006, 0xcc00b300, + 0x2cc00b20, 0x12c801b3, 0x002c400a, 0x3002cc00, 0xb3002c40, 0x0b30024c, + 0x04390028, 0x40281042, 0xc4029102, 0x20000830, 0x02ec0883, 0x002c000b, + 0x3006c201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb00a2c0, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0xec00bb00, 0x2ec009a5, 0x026800bb, 0x000e5808, + 0x9822ec00, 0xbb002e44, 0x0bb0026c, 0x00b80022, 0xf0899882, 0xe4001910, + 0x2a600ab0, 0x02ec008b, 0x002ec00b, 0xb842f804, 0x60000000, 0x00000000, + 0x0015ec00, 0xfb0032c0, 0x0fb003ec, 0x00fb003e, 0xc04fb003, 0xec00fb00, + 0x3ec00fbc, 0x0be000fa, 0xe01eb00e, 0xbc03ec00, 0xfb063ea0, 0x0fb003ec, + 0x10f98030, 0x706c9813, 0xc200d100, 0x36208cb0, 0x03cc00ca, 0x083e400f, + 0xb483d004, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff002, 0xfc00bf00, 0x3fc00ef0, 0x01b100fe, 0x2033800f, + 0xf003fc20, 0xff001f00, 0x0ff043fc, 0x00edc0be, 0x414ef003, 0xb100eb80, + 0x2f404ff0, 0x03fc10ff, 0x003fa40f, 0xf000f800, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00fb00, + 0x3ec00c30, 0x03e102c3, 0x2038002c, 0xb003ec00, 0xfb003ec7, 0x0db003ec, + 0x00f9203e, 0x510c94c3, 0xec08cb00, 0x32002cb0, 0x03ec00fb, 0x403e400f, + 0x9c833004, 0x20000000, 0x00000000, 0xd8052c00, 0xbb002ec0, 0x0bb002ec, + 0x04bb002e, 0xc04bb002, 0xec10bb00, 0x2cc008b0, 0x02e8008b, 0x40222008, + 0xb802ef01, 0xbb002e60, 0x00b042ee, 0x00e0892e, 0xd44db202, 0xef448b80, + 0x284108b0, 0x22ee80bb, 0x502ed10b, 0xb4437200, 0x40000000, 0x00000000, + 0xe8054c14, 0xbb012cc0, 0x033000cc, 0x00b3002c, 0xc00b3002, 0xcc04b300, + 0x0ce00800, 0x22cc1010, 0x4400a80a, 0x3002cc00, 0xb3002c10, 0x093002cc, + 0x20b1802c, 0x100a1c02, 0xcc00a164, 0x20020830, 0x02cc21b1, 0x002c138b, + 0x30027800, 0x50000000, 0x00000000, 0xf0011e00, 0xb7802de0, 0x0b7802de, + 0x00b7802d, 0xe00b7802, 0xde00b780, 0x2de0a840, 0x02ce0094, 0x8020a00a, + 0x6802de20, 0xb7836fa0, 0x087802de, 0x0035906d, 0x204b4802, 0xde42a790, + 0x2ba80878, 0x02de00b7, 0x802d200b, 0x68025800, 0x40000000, 0x00000000, + 0x48080c00, 0xf3103cc0, 0x0f3103cc, 0x00f3003c, 0xc41f3003, 0xcc00f300, + 0x3cc21c00, 0x03c901d0, 0x0030430a, 0x3583cc00, 0xb3001c40, 0x0d3023cc, + 0x20f1003c, 0x4c0e1213, 0xcc30e108, 0x00410c31, 0x03cc44f3, 0x017c808f, + 0x30035202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x4ff003fc, + 0x00ff003f, 0xc00ff003, 0xfc00ff00, 0x3fc00fe6, 0x03f840ee, 0x0037c00d, + 0xf003fc00, 0x7f003fc2, 0x0ff103fc, 0x00ef003f, 0xc401d003, 0xdc18df00, + 0x3fc80ff0, 0x43fc01ff, 0x003fc60f, 0xf003d006, 0x60000000, 0x00000000, + 0xa805ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00fb00, + 0x2ec02e84, 0x136681e8, 0x203e8803, 0xb003ec00, 0xfb003e88, 0x1fb003ec, + 0x00fb8032, 0x410f9003, 0x0802c900, 0xb6c90cb0, 0x03ec00fb, 0x8072400f, + 0xb003e200, 0x70000000, 0x00000000, 0xc8119c00, 0xb7006dc1, 0x0b7002dc, + 0x01b7002d, 0xc00b7042, 0xdc00b700, 0x2dc00840, 0x02c44084, 0x0839840b, + 0x7022dc04, 0xb7002d8c, 0x0b7000dc, 0x00bf0039, 0x800b6003, 0x58028700, + 0x39c40a70, 0x02dc00b7, 0x0029040b, 0x7012f204, 0x60000000, 0x00000000, + 0x80009e00, 0xb7802de0, 0x0b7842de, 0x00b7802d, 0xe00b7802, 0xde00b780, + 0x2de00a68, 0x02da00a6, 0x812da00b, 0x7882de00, 0xb7802de1, 0x4b7802de, + 0x11b7c025, 0x600b7882, 0x7e018780, 0x21e00878, 0x02de00b7, 0xc021e88b, + 0x7802f000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3022c, 0xc00b3002, 0xcc00b300, 0x2cc02834, 0x22cd2083, 0x4068f20b, + 0x32024c05, 0xb3002cc0, 0x8b3042cc, 0x00b3c068, 0xec8b3002, 0xce818380, + 0x2cf40a30, 0x02cc00b3, 0x0028c00b, 0x3802d204, 0x30000000, 0x00000000, + 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800fa003, 0xe800fa00, + 0x3e800ead, 0x136b20ea, 0x243eb80f, 0xe003e800, 0xfa003e80, 0x0fa003e8, + 0x00fe8237, 0x900fe813, 0x7a80caa1, 0x33a00ca0, 0x03e810fe, 0x8032900f, + 0x6883fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0, + 0x00f8003e, 0x000f8003, 0xe000f800, 0x3e000f81, 0x02e000f8, 0x401e000f, + 0x8003e010, 0xf8023e14, 0x0b8013e1, 0x00f8407e, 0x100f8013, 0x6100f840, + 0x3a022d80, 0x03e004f8, 0x413e020f, 0x8c03d200, 0x30000000, 0x00000000, + 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f900, + 0x3e440db0, 0x03ee01fb, 0x880ec80b, 0x9403e700, 0xf9003e70, 0x1f9003e4, + 0x81f9483e, 0x410c90c3, 0x2600c120, 0x30508890, 0x03e400f9, 0x803e410f, + 0x99030204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x400b9002, 0xe400b900, 0x24482890, 0x02e52199, 0x212e400b, + 0x10022780, 0xb9002ef2, 0x1f900266, 0x80b9002c, 0x40081603, 0x6602f941, + 0x22500d90, 0x02e400e9, 0x202ef40b, 0x94c3e000, 0x10000000, 0x00000000, + 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9002, 0xe400b900, + 0x2e402990, 0x02e440b9, 0x106e400b, 0x90066404, 0xb9012e40, 0x0b9012e4, + 0x04bb012e, 0x61289202, 0x4d808900, 0x22c00a90, 0x02e421b9, 0x102e500b, + 0x90020600, 0x40000000, 0x00000000, 0x08040400, 0xb1102c40, 0x1b1002c4, + 0x00b1002c, 0x400b1002, 0xc400b100, 0x2c400810, 0x02c40091, 0x026c400b, + 0x30060400, 0xb1002c40, 0x0a1002c4, 0x41b3112c, 0x40081006, 0xc450b300, + 0x60c00b10, 0x22c404a1, 0x002c400b, 0x1012c201, 0x00000000, 0x00000000, + 0xb80c6000, 0xf8403e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe000f800, + 0x3e000d80, 0x03e000b8, 0x003e000f, 0x80036000, 0xf8002e00, 0x038003e1, + 0x00b8683e, 0x8a088283, 0x6102c828, 0xa20a2e80, 0x23e000f8, 0x003e000f, + 0x80030e03, 0x50000000, 0x00000000, 0x981ce400, 0xf9203e40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xe400f900, 0x34400f94, 0x23e50099, 0x403e500f, + 0xd4036400, 0xf9003e40, 0x4f904364, 0x80fd203f, 0x400f5001, 0x7480f504, + 0x3d400490, 0x03f400e5, 0x023e400f, 0xd003a606, 0x70000000, 0x00000000, + 0x9805e400, 0xf9003a40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f900, + 0x3d400090, 0x13f400fd, 0x0433400f, 0xd002d400, 0xb9003e40, 0x0f9003f4, + 0x40fd013e, 0x404fd003, 0xf400e529, 0x33482e90, 0x03f400f9, 0x003e410f, + 0xd0030604, 0x70000000, 0x00000000, 0x3810e000, 0xb8202200, 0x0b8002e0, + 0x00b8002e, 0x000b8002, 0xe000b800, 0x2e0008a0, 0x02e800b8, 0x0432000e, + 0xa402e000, 0xf8003e00, 0x0b8022e0, 0x84384c2e, 0x800b8122, 0xc0a48800, + 0x22040a80, 0x02e004b8, 0x002e808b, 0x80008e04, 0x30000000, 0x00000000, + 0x4805c400, 0xb1282c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0xc400b100, + 0x2c402810, 0x02c400b1, 0x8024400b, 0x1102c400, 0xb1002c40, 0x0b1002c4, + 0x80b1302c, 0x440b1022, 0xee80a100, 0x20400a10, 0x22c400b1, 0x002c401b, + 0x90400201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002640, 0x0b9002e4, + 0x0039002e, 0x400b9002, 0xe400b900, 0x2e40a890, 0x12ec00b9, 0x1022440a, + 0x9002e400, 0xb9002e40, 0x0b9002e4, 0x00b9006e, 0x410b9002, 0xe6008900, + 0x22400a90, 0x02e400bb, 0x020e408b, 0x90428604, 0x60000000, 0x00000000, + 0xa011e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f900, + 0x3c400c90, 0x03e500f9, 0x00b6480f, 0x9403e400, 0xf9003e58, 0x4f9013e4, + 0x10f9883e, 0x400f98c3, 0xc404e180, 0xb2480e90, 0x03e400f9, 0x203e70cf, + 0x9c832800, 0x30000000, 0x00000000, 0xe801a400, 0xf9003a40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xe400f902, 0x3e408f91, 0x03e4a0f9, 0x033a600e, + 0x92a3e420, 0xe9003a40, 0x0f9013e4, 0x30f9283e, 0xc41f9103, 0xe408f940, + 0x3e400f90, 0x03e4107b, 0x223e700f, 0x9102ea00, 0x20000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe000f800, + 0x3e040d80, 0x03e100d0, 0x003e000f, 0x80036000, 0xd8003e00, 0x0f8007e0, + 0x40f8503e, 0x000f8643, 0x2020d820, 0x30000c80, 0x03e000c8, 0x003e100f, + 0x85c3ca00, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba003a8, + 0x00ba002e, 0x800ba002, 0xe800ba00, 0x2f9408a0, 0x42f8008e, 0x002f800b, + 0xe003b800, 0x8a007e80, 0x0ba006fb, 0x009e402e, 0x8813e803, 0x7910ae00, + 0x378008a0, 0x033800da, 0x842ea20b, 0x6802ca00, 0x00000000, 0x00000000, + 0x28054c00, 0xbb002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc00b300, + 0x2cd00830, 0x22cf0093, 0x002cc00b, 0x30020d00, 0x93002cc0, 0x0a3032cf, + 0x00b3c12c, 0xe01b3d02, 0x0c049394, 0x20c40830, 0x06cc4083, 0x902ce103, + 0x3422ca00, 0x50000000, 0x00000000, 0xa0011c08, 0xb7202dc0, 0x0b70029c, + 0x00b7002d, 0xc00b7002, 0xdc00b700, 0x2dc02870, 0x02de2087, 0x082dc00b, + 0x38829e00, 0x87002940, 0x0b7002d8, 0x00b7006d, 0xc00b3802, 0x5000a500, + 0x24c00870, 0x021e0496, 0x002d800b, 0x7002c800, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7e03de0, 0x0f7803de, 0x00f7803d, 0xe00f7803, 0xde00f780, + 0x2de04c78, 0x06de00d7, 0x803de00f, 0x78031e00, 0xd7802da0, 0x0f7802de, + 0x00f7802d, 0x200b7813, 0x1e10d584, 0x31e02c78, 0x03de00c7, 0x883d640f, + 0x7807ca02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ac, + 0x00fb003e, 0xc04fb003, 0xec00fb00, 0x3e400fb0, 0x03cc00fa, 0x003e400f, + 0x9003a800, 0xfb003e12, 0x0fb043e0, 0x04d9003e, 0x0a0fb000, 0xe400f905, + 0x3ec10fb0, 0x238c00da, 0x203e188f, 0xb043c206, 0x60000000, 0x00000000, + 0x4005fe00, 0xff8033e0, 0x0ff803fe, 0x00ff803f, 0xe00ff903, 0xfe00ff80, + 0x3f200ff8, 0x03fe00f7, 0x8033e00f, 0xf013de00, 0x6f803fe0, 0x0ff803f6, + 0x41cd9033, 0xcc0cf803, 0x1a40c790, 0x33e02ef8, 0x03fe40fd, 0x8033e00f, + 0xf9031000, 0x70000000, 0x00000000, 0xa8119c00, 0xbf0021c0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xdc00b700, 0x2d800f70, 0x039c00b7, 0x0021c003, + 0x5202dc80, 0x87002d40, 0x4b7002f4, 0x40250129, 0xc0087423, 0xd0ca8530, + 0x35ca2f70, 0x02dcc0e4, 0x1029810b, 0x70116a00, 0x60000000, 0x00000000, + 0x10009c00, 0xb70021c0, 0x0b7002dc, 0x00b7002d, 0xc00b7006, 0xdc00b700, + 0x2d400b74, 0x82d000b5, 0x0021d00b, 0x7106d801, 0xa7002d80, 0x0b7002d4, + 0x50050021, 0x808a7002, 0x78068502, 0x24c00b70, 0x02dc00bf, 0x002d420b, + 0xf0804000, 0x20000000, 0x00000000, 0x6814cc00, 0xb30020c0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xcc00b302, 0x2c400b38, 0x02c000b0, 0x80204009, + 0x13024800, 0x83002c20, 0x0b3002c0, 0x00a1a428, 0x810a3822, 0x40008180, + 0x24f20b30, 0x02cc00a2, 0x102c398b, 0x2c425804, 0x30000000, 0x00000000, + 0x2815ac00, 0xff0032c0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00fb00, + 0x3ec00fb8, 0x03ed88fb, 0x5cb0d00f, 0x3803ec00, 0xeb003ec2, 0x0fb003ec, + 0x00ca6072, 0xf40e3083, 0x4c00cb25, 0x36d08fb0, 0x03ec00f3, 0x003ef00f, + 0x30234a04, 0x60000000, 0x00000000, 0x9000ec00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ed00eb0, 0x03ac00fb, 0x003e940f, + 0xb003e404, 0xfb003e90, 0x1fb013e4, 0x00fb403e, 0x8409b623, 0xf008f900, + 0x3cc00fb0, 0x03ed00fb, 0x081ad00f, 0xb003e010, 0x30000000, 0x00000000, + 0x8010fc08, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00, + 0x3fc00cf0, 0x03f120df, 0x003fc00c, 0xe0037400, 0xff003f60, 0x0ff023fc, + 0x00f9043e, 0x680ff403, 0x3f00cd00, 0x73e00df0, 0x03fd00cc, 0xa023a80c, + 0xf0830044, 0x30000000, 0x00000000, 0x80046c00, 0xbb002ec0, 0x0bb002ec, + 0x00bb002e, 0xc00bb002, 0xec009b00, 0x24f82cb0, 0x02c3008a, 0x002e0008, + 0x84222240, 0xbb002e36, 0x03b002e6, 0x00b9802e, 0x380bb802, 0xa41881c0, + 0x22900db0, 0x02c900d8, 0x0034b808, 0x90036040, 0x10000000, 0x00000000, + 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc00bb002, 0xec00bb00, + 0x2ee009b0, 0x02ec009b, 0x002ec208, 0xa4026c00, 0xbb002ec1, 0x4bb062e7, + 0x00b8882e, 0x404ba006, 0x2012898c, 0x22c609b0, 0x02ec2099, 0x006e4008, + 0xb6022000, 0x50000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00830, 0x02cc0083, 0x002c802a, + 0x00024400, 0xb3002c80, 0x0b3002c4, 0x00b1002c, 0x0003100e, 0x80008100, + 0x20c00930, 0x02c40099, 0x002e4008, 0x3006c200, 0x00000000, 0x00000000, + 0x800d6c00, 0xfb003ec0, 0x0fb003ec, 0x00bb003e, 0xc00fb003, 0xec00fb00, + 0x3ec00db0, 0x03e000d9, 0x003ec00c, 0xa0036000, 0xfb003e40, 0x0fb003e4, + 0x00b8003e, 0x400bb022, 0x2804c904, 0x22400db0, 0x03ec00c8, 0x003e002c, + 0xb0030000, 0x10000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc, + 0x00ff003f, 0xc00ff003, 0xfc00df00, 0x37c00ff0, 0x03f0109c, 0x003f000d, + 0xc003b000, 0xff003f00, 0x0ff053f4, 0x107d003f, 0x004f7000, 0xf000fc00, + 0x3f010ff0, 0x03f000f4, 0x0037000f, 0x70436806, 0x70000000, 0x00000000, + 0xc005de00, 0xfe9033e0, 0x0ff8431e, 0x00ff803f, 0xe00ff803, 0xfe02ff80, + 0x3fe00c58, 0x10be40f5, 0x803fe00f, 0xf803fe00, 0xff903f85, 0x0fc103f0, + 0x40cd0033, 0xe00ff803, 0xfe00ff80, 0x37e00ff8, 0x03f808dc, 0x21330c08, + 0xd3833000, 0x70000000, 0x00000000, 0x8000ee00, 0xba2022e0, 0x0bb8022e, + 0x00bb802e, 0xe00bb802, 0xcca08b08, 0x2ec00898, 0x222c80bb, 0x802ee00b, + 0xb802ee00, 0xbb012e98, 0x4b3602ed, 0x00aad02a, 0xe08bb802, 0xee08bb84, + 0x2ee00bb8, 0x02e820b3, 0x18a0d008, 0x2002a006, 0x30000000, 0x00000000, + 0x0805cc00, 0xb22120c1, 0x0b30020c, 0x00b3002c, 0xc00b3002, 0xcc00a320, + 0x2cca08b0, 0x028c80b3, 0x006cc09b, 0x3002cc00, 0xb3202c8c, 0x0b0302c0, + 0x40810420, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x02c8c0b0, 0x20201828, + 0x12020201, 0x70000000, 0x00000000, 0xc015ac08, 0xb20022d8, 0x0bb0022c, + 0x009b002e, 0xc00bb002, 0xec009b00, 0x2cc08ab2, 0x022c00bb, 0x006ec00b, + 0xb002ec00, 0xbb002e80, 0x0bb002ec, 0x00aa042a, 0xc00bb002, 0xec00bb00, + 0x2ec00bb0, 0x02e800b3, 0x0022c018, 0x2000b000, 0x60000000, 0x00000000, + 0x0005ee00, 0xfa0032f0, 0x4f380b2c, 0x00fb003e, 0xc00fb003, 0xec00eb00, + 0x3ec00c18, 0x03ac10f9, 0x002ec10f, 0xb003ec00, 0xfb003f90, 0x0fc003f0, + 0x00cd0032, 0xc00fb043, 0xec18fb04, 0x3ec08fb0, 0x03f900fc, 0x0033000c, + 0xd0030004, 0x70000000, 0x00000000, 0xa011bd00, 0xfe00bfe0, 0x8ff413fc, + 0x00ff003f, 0xc00ff003, 0xfc00ef00, 0x3fc00dd8, 0x03fc00ff, 0x003fc00f, + 0xf003fc00, 0xff003f81, 0x0ff083fc, 0x04f6003f, 0xc00ff003, 0xfc00ff00, + 0x3fc00ff0, 0x43f800ff, 0x003dc00f, 0xe083e800, 0x60000000, 0x00000000, + 0xc010ac10, 0xca023ed2, 0x0fb0832c, 0x00cb003e, 0xc00fb007, 0xec00cb00, + 0x32c40cb0, 0x472c10fb, 0x0416c00f, 0xb003ec00, 0xfb003e90, 0x2c800b20, + 0x40c9003e, 0xc00fb003, 0xec00fb00, 0x36c00fb0, 0x03e902c8, 0x0032000c, + 0x900b3004, 0x20000000, 0x00000000, 0xc8052c80, 0x0a402ec0, 0x0bbc022c, + 0x008b002e, 0xc00bb002, 0xec008b00, 0x22e008b0, 0x036c04bb, 0x0036c00b, + 0xb002ec04, 0xbb003a80, 0x08be036e, 0x40ca002e, 0xc00bb002, 0xec00bb00, + 0x22c00bb0, 0x02e8008b, 0x1522ec4c, 0xa6423200, 0x40000000, 0x00000000, + 0xc4040e02, 0x82482cf4, 0x0b31020c, 0x0083002c, 0xc00b3002, 0xeec28330, + 0xa0c80810, 0x028c00b1, 0x0020c00b, 0x3002cc01, 0xb3006ccc, 0x08080221, + 0x0081002c, 0xc00b3002, 0xcc00b300, 0x24c00b30, 0x02cc01a0, 0x10a00028, + 0x1002b000, 0x10000000, 0x00000000, 0x60003e00, 0x86802de0, 0x0b78021e, + 0x0087802d, 0xe00b7802, 0xde008780, 0x21e408d8, 0x42de00bf, 0x8025e003, + 0x7842de00, 0xb78028e8, 0x0878024e, 0x0086802d, 0xe00b7802, 0xde00b780, + 0x25e00b78, 0x02ce00a7, 0x8021e008, 0x68009800, 0x10000000, 0x00000000, + 0x4c180c40, 0xc2203cc8, 0x4f320b0c, 0x00c3002c, 0xc00f3002, 0xcc00cb00, + 0x32c00c10, 0x028c00f3, 0x0020c403, 0x3003cc00, 0xf3003cd0, 0x0c000300, + 0x02c1003c, 0xc00f3003, 0xcc00b300, 0x34c00f30, 0x03cd00e0, 0x0430000c, + 0x10039202, 0x10000000, 0x00000000, 0x401cac00, 0xfa002ec0, 0x0f3003ec, + 0x00fb003e, 0xc00fb023, 0xec00fb10, 0x3ec00f90, 0x036c00fb, 0x003ec00f, + 0xb003ec00, 0xfb002ec9, 0x0bb003ec, 0x00ea803e, 0xc00fb023, 0xec04f302, + 0x3ac00fb0, 0x03ec009b, 0x103ec40f, 0xa8035006, 0x60000000, 0x00000000, + 0x0805ec00, 0xf28032d4, 0x0cb9032c, 0x00fb003e, 0xc00fb003, 0xec00cb00, + 0x32e00c90, 0x03ee0049, 0x003ec00f, 0xb013ec00, 0xfb80b2c0, 0x0c800322, + 0x00c9003e, 0xc00fb003, 0xec00fb00, 0x2ec00fb0, 0x03ee02c8, 0x0032000c, + 0x900b0200, 0x70000000, 0x00000000, 0xc8019c80, 0xb60021c2, 0x0872021c, + 0x00b7002d, 0xc00b7002, 0xfc008f00, 0x23c02850, 0x02fc0287, 0x002dc00b, + 0x7002dc00, 0xb70023c0, 0x083002bc, 0x0286002d, 0xc00b7002, 0xdc00b700, + 0x2dc00b70, 0x02cc008f, 0x0023c008, 0x60023206, 0x60000000, 0x00000000, + 0x20009e60, 0xbe8021f8, 0x08f8821e, 0x00b7802d, 0xe00b7802, 0xde068782, + 0x21e00858, 0x02de0087, 0x802de00b, 0x7802de00, 0xb78021e0, 0x09480212, + 0x0085802d, 0xe00b7802, 0xde04b782, 0x2de00b78, 0x02de0094, 0x80212008, + 0x18020840, 0x20000000, 0x00000000, 0x6814ce00, 0xb20020c0, 0x0838020c, + 0x00b3002c, 0xc00b3002, 0xec008b00, 0x20c00810, 0x02cc0083, 0x002cc00b, + 0x3002cc10, 0xb30022c0, 0x09b0228c, 0x0082002c, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x02cc089b, 0x0020c008, 0x20021a00, 0x30000000, 0x00000000, + 0xe8058000, 0xfe00b300, 0x2c800b28, 0x00fa002e, 0x800fa003, 0xe800ca00, + 0xb2800ca0, 0x03e800ca, 0x002e800f, 0xa003e800, 0xfa003280, 0xada00328, + 0x00ca003e, 0x800fa003, 0xe800fa00, 0x3e800fa0, 0x03e800da, 0x00b2802c, + 0xa0233a04, 0x70000000, 0x00000000, 0x4810a000, 0xf8043e18, 0x0f8003e0, + 0x00f8003e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x003e000f, + 0x8013e000, 0xf8003e00, 0x0ec003f0, 0x00f4003e, 0x000f8003, 0xe000f800, + 0x3e000f80, 0x03e008ec, 0x003f000f, 0x4003d200, 0x60000000, 0x00000000, + 0x0810a002, 0xc9903e24, 0x0c8203e4, 0x00f9003e, 0x400f9003, 0xe402c900, + 0xb2400f90, 0x03e400f9, 0x003e400f, 0x9003e400, 0xf9003e40, 0x0c900324, + 0x00f90032, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x0032400c, + 0x90030204, 0x20000000, 0x00000000, 0x80046400, 0x89002c40, 0x089c02e4, + 0x00b9002e, 0x400b9002, 0xe4008990, 0x22400b90, 0x02e400b9, 0x002e400b, + 0x9002e400, 0xb9002e40, 0x28900224, 0x00b90036, 0x400b9002, 0xe400b900, + 0x2e400b90, 0x02e400b9, 0x00224008, 0x90036000, 0x10000000, 0x00000000, + 0x18052480, 0x99002e42, 0x089002e4, 0x00b9002e, 0x400b9002, 0xe4009900, + 0x26400b90, 0x02e400b9, 0x002e400b, 0x9002e400, 0xb9002e40, 0x08d00234, + 0x00bd0026, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400bd, 0x00214028, + 0xd0020e00, 0x40000000, 0x00000000, 0x08040440, 0x91142e04, 0x283102c4, + 0x00b1002c, 0x400b1002, 0xc4409110, 0x24440b10, 0x02c440b1, 0x002c400b, + 0x1002c404, 0xb1122c44, 0x18510214, 0x40b50024, 0x400b1002, 0xc400b100, + 0x2c400b10, 0x12c441b5, 0x10a14408, 0x51024a05, 0x00000000, 0x00000000, + 0x381d61a0, 0xd8403e1b, 0x0c8683e0, 0x00f8003e, 0x000f8003, 0xe100d840, + 0x36100f80, 0x03e100f8, 0x003e000f, 0x8002e000, 0xf0403e1a, 0x0c868321, + 0xa0fc2836, 0x000f8003, 0xe000f800, 0x2e000f80, 0x03e1a0f8, 0x68321a0c, + 0xc6832e03, 0x50000000, 0x00000000, 0xb81df080, 0xe9203d08, 0x0f4203e4, + 0x00f9003e, 0x400f9003, 0xe480e924, 0x3a480fd0, 0x03e680fd, 0x003e400f, + 0x9003e400, 0x79203e48, 0x0f920be4, 0x80f9003e, 0x400f9003, 0xe400f900, + 0x3e400f90, 0x03e480f9, 0x223e480f, 0x9203e604, 0x70000000, 0x00000000, + 0x3805f280, 0xfd003f30, 0x0fcc03c4, 0x00f9003e, 0x400f9003, 0xe400c904, + 0x32400c90, 0x03e400c9, 0x003e400f, 0x9003f400, 0xf9003e40, 0x0c900324, + 0x00c90032, 0x400fd003, 0xe400fd00, 0x3e400f90, 0x03e400f9, 0x1032480c, + 0x92832600, 0x70000000, 0x00000000, 0x1800e3f0, 0xb8002e30, 0x0b8c42e0, + 0x00b8002e, 0x000b8002, 0xe0008000, 0x23010880, 0x02e0a088, 0x002e000b, + 0x8002e004, 0xb8002e00, 0x28800230, 0x00880022, 0x000b8002, 0xe000b800, + 0x2e000b80, 0x12c020b8, 0x10220a08, 0xc2020e06, 0x30000000, 0x00000000, + 0x48008400, 0xb1002c10, 0x0b0602c4, 0x10b1002c, 0x400b1002, 0xd4008500, + 0x21400810, 0x02c48081, 0x002c400b, 0x1002c400, 0xb1012d40, 0x08500214, + 0x00810020, 0x400b1002, 0xc400b100, 0x2c400b10, 0x02c440b5, 0x00254c89, + 0x528a1200, 0x20000000, 0x00000000, 0x1814a400, 0xbb022e44, 0x0b9002e4, + 0x00b9002e, 0x400b9002, 0xc4008500, 0x21408890, 0x22e40089, 0x202e400b, + 0x9002e400, 0xb9002d41, 0x08d00234, 0x00890022, 0x400b9002, 0xe410b900, + 0x2e400b90, 0x02e400bd, 0x00a74009, 0xd0020600, 0x20000000, 0x00000000, + 0xa004a600, 0xf9023e68, 0x0f9043e4, 0x00f9003e, 0x400f9003, 0xe402c900, + 0xb2402c90, 0x13e402c9, 0x003e400f, 0x9003e400, 0xf9003e40, 0x2c900324, + 0x00c90032, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x0076400d, + 0x900b2804, 0x70000000, 0x00000000, 0xe810a100, 0xf9023e22, 0x0f8983e4, + 0x00f9003e, 0x400f9003, 0xe408f900, 0x3e400f99, 0x03e400f9, 0x803e400f, + 0x9003e400, 0xf9083e40, 0x4f900be4, 0x02f900be, 0x400f9003, 0xe400f900, + 0x3e400f90, 0x03e420f1, 0x003a402e, 0x9003f200, 0x60000000, 0x00000000, + 0x2810a000, 0xf800b200, 0x0f8043e0, 0x02c8003e, 0x000f8003, 0xf000cc00, + 0x33040f80, 0x23e010e8, 0x003e010f, 0x8003e000, 0xf8003f00, 0x0f400310, + 0x00c0003e, 0x000f8003, 0x6000f800, 0x3e000f80, 0x03e000cc, 0x0031000c, + 0xc0030204, 0x20000000, 0x00000000, 0x08042080, 0xbe702322, 0x0bce02f8, + 0x008a002e, 0x800ba002, 0xe8008a00, 0x22b00ba0, 0x02e8008a, 0x002e800b, + 0xa043a808, 0xba412e81, 0x0ba00a28, 0x00da002e, 0x800ba002, 0x2800ba00, + 0x2e800ba0, 0x02e9028a, 0x00a28008, 0xa0020a00, 0x40000000, 0x00000000, + 0x08054e00, 0xb38020c0, 0x0b3022c8, 0x0883002c, 0xc00b3002, 0xcc028300, + 0xa0820b30, 0x02ec00a3, 0x002cc00b, 0x3002cc18, 0xb3406cc0, 0x0b300208, + 0x0283002c, 0xc00b3002, 0x4c00b300, 0x2cc00b30, 0x028d0083, 0x00a4c038, + 0xa00a0a00, 0x50000000, 0x00000000, 0x20011c00, 0xbf8021c8, 0x0b7002da, + 0x0087002d, 0xc00b7002, 0xd0008400, 0x21400b70, 0x02dc8087, 0x002dc00b, + 0x70029c00, 0xb7002d00, 0x0b000204, 0x0897012d, 0xc00b7802, 0x1c00b700, + 0x2dc00b70, 0x02de0084, 0x02240008, 0x50022004, 0x40000000, 0x00000000, + 0x28181e80, 0xf780b1e0, 0x8f7d03da, 0x02c7803d, 0xe00f7803, 0xfe00c580, + 0x21a40f78, 0x03fe80e7, 0x803de00b, 0x7803de00, 0xf7803de0, 0x0f78031a, + 0x00c7823d, 0xe00f7813, 0x5e08f780, 0x3de00f78, 0x039e00c3, 0x8035e00c, + 0x28032002, 0x00000000, 0x00000000, 0x081dac40, 0xf3003ecc, 0x0fb003e8, + 0x00fb003e, 0xc00fb003, 0xe000fa00, 0x3e580fb0, 0x03ec00fb, 0x003ec00f, + 0xb043ac10, 0xfb003e00, 0x0f8003e4, 0x00fb003e, 0xc00f3003, 0xec10fb00, + 0x3ec00fb0, 0x03ec00f8, 0x003a000f, 0x9003c204, 0x60000000, 0x00000000, + 0x6005be00, 0xff8031f0, 0x0cf803fa, 0x00ff803f, 0xe00ff803, 0xfe00ff80, + 0x33600ff8, 0x23fe20cf, 0x803fe00f, 0xf003de02, 0xce8033e0, 0x2cf8033a, + 0x00cf801f, 0xe00ff803, 0xfe00f780, 0xb3e00ff8, 0x03fa00cf, 0x803fe004, + 0xe803f000, 0x20000000, 0x00000000, 0xa8009c00, 0xbe0421c0, 0x087002d8, + 0x00b7002d, 0xc00b7002, 0xd000b400, 0xa1800b70, 0x02fc0087, 0x002dc40b, + 0x7002dc00, 0x86002100, 0x08c10214, 0x6287102d, 0xc00b7002, 0xdc00b700, + 0x21c00b70, 0x02d80084, 0x002d0608, 0x5002ea06, 0x20000000, 0x00000000, + 0x00009c00, 0xb50021c0, 0x087002d8, 0x00b7002d, 0xc00b7002, 0xdc00b500, + 0x21400b70, 0x02dc0087, 0x002dc00b, 0x7002dc40, 0x860024c0, 0x0870021a, + 0x0087002d, 0xc00b7002, 0xdc00b700, 0x21c00b71, 0x02d80087, 0x002cc008, + 0x6802c400, 0x20000000, 0x00000000, 0x40148e00, 0xb00020d0, 0x083802c8, + 0x00b3002c, 0xc00b3002, 0xc000b200, 0x20800b30, 0x02ec0083, 0x802cc00b, + 0x3002cc02, 0x82002400, 0x08090a06, 0x0083926c, 0xc00b3002, 0xcc003300, + 0x20c00b30, 0x02c81080, 0xd02e2028, 0x1d02da00, 0x20000000, 0x00000000, + 0x2805ae80, 0xf00010e2, 0x2cba03e8, 0x00fb003e, 0xc00fb003, 0xe000fa04, + 0x32810bb0, 0x02fc02cb, 0xa02ec00f, 0xb003ec00, 0x8b00b6c0, 0x0cb4032b, + 0x00cb403e, 0xc003b002, 0xec00bb00, 0x32c00fb0, 0x03ec02cb, 0x403ef00c, + 0xa403da04, 0x60000000, 0x00000000, 0xa010ec00, 0xf844bec0, 0x0fb003e8, + 0x00fb003e, 0xc00fb003, 0xed00f902, 0x3e400fb0, 0x03ec00fb, 0x003ec00f, + 0xb003ec00, 0xfb003a00, 0x1f8203e4, 0x80fb203e, 0xc00fb003, 0xec00fb00, + 0x3ec00fb0, 0x03ec00f8, 0x203e080f, 0x9203e400, 0x30000000, 0x00000000, + 0x0110fe80, 0xfe8033ca, 0x0cf003f8, 0x08cf003f, 0xc00ff003, 0xf000cc02, + 0x3f800ff0, 0x03fc00cf, 0x003fc00f, 0xf003fc10, 0xff0037c0, 0x0f700338, + 0x00c70033, 0xc00ff003, 0xfc00ff00, 0x3fc00ff0, 0x03fc00f7, 0x0033c02c, + 0x60032804, 0x30000000, 0x00000000, 0x81046e00, 0xbe8022f8, 0x08b182c8, + 0x008b002e, 0xc00bb022, 0xfc808f08, 0x2f400bb0, 0x02ec008b, 0x003ac00b, + 0xb012ec00, 0xbf002f00, 0x0ec00234, 0x10db0022, 0xc14bb002, 0xec00bb00, + 0x2ec00bb0, 0x02fc00bc, 0x00230008, 0xd0022840, 0x10000000, 0x00000000, + 0x80056c00, 0xb91022c0, 0x09b002e8, 0x008b002e, 0xc00bb002, 0xc0428a00, + 0x2e408bb0, 0x02ec008b, 0x002ec00b, 0xb002ec00, 0xba002ec0, 0x0bb00208, + 0x008b0022, 0xc00bb002, 0xec00bb00, 0x2ec00bb0, 0x02e800bb, 0x0022c009, + 0xa0022000, 0x40000000, 0x00000000, 0x0c000c00, 0xb801a2c0, 0x293002c8, + 0x0283002c, 0xc00b3042, 0xcc008100, 0x2c801b30, 0x12cc0083, 0x002cc00b, + 0x3002cc00, 0xb2006c00, 0x0a000a04, 0x009300a0, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x02c800b0, 0x01a00009, 0x100a0205, 0x00000000, 0x00000000, + 0x00186c00, 0xf90432c0, 0x4db043e8, 0x02cb003e, 0xc00fb002, 0xe010c000, + 0x3e400fb0, 0x03ec028b, 0x003ec00b, 0xb053ec01, 0xf20036c0, 0x0fb00308, + 0x00cb0032, 0xc00fb007, 0xec05fb02, 0x3ec00fb0, 0x03c800fb, 0x0032c00d, + 0xa0032003, 0x50000000, 0x00000000, 0xa41dfc00, 0xfc003fc0, 0x0ef023f8, + 0x00ff003f, 0xc00ff003, 0xfc14ff00, 0x3f800ff0, 0x13fc04ff, 0x007bc00f, + 0xf023fc00, 0xfe003f00, 0x8fc003f4, 0x00ff003f, 0xc01ff003, 0xfc10ff00, + 0x3fc00ff0, 0x03f810fc, 0x003f000e, 0xd023e804, 0x70000000, 0x00000000, + 0xc005fe00, 0xff803fe0, 0x0ff843fe, 0x00ff803f, 0xe00cf803, 0xfe00ff80, + 0x3fe00ff8, 0x23fe19ee, 0x0033e00f, 0xf803fe00, 0xfc863fe1, 0x2cc20374, + 0x10fe803b, 0x210f4803, 0xf000c400, 0x33a00cc8, 0x03f600ff, 0x803f204f, + 0xf8233000, 0x70000000, 0x00000000, 0x8010ee00, 0xbb842ee0, 0x4bb802ee, + 0x00bb802e, 0xe00ab802, 0xee00bb80, 0x2ee00bb8, 0x42ee01ba, 0x8022e04b, + 0xb802ee00, 0xb8802cc8, 0x4cb7022b, 0x54ba8022, 0xa10ba802, 0xf2028c80, + 0xa2808898, 0x42e600bb, 0x002ee00b, 0xb802a004, 0x30000000, 0x00000000, + 0x0805cc10, 0x33002cc0, 0x0b3002cc, 0x00b3002c, 0xc0193012, 0xcc10b300, + 0x2cc10b30, 0x02cc00b3, 0x0160c10b, 0x3002cc00, 0xb00428c2, 0x080086c4, + 0x00ba8428, 0x000b0002, 0xc0028100, 0x20c02800, 0x024010b3, 0x002cc00b, + 0xb0020201, 0x70000000, 0x00000000, 0xc015ac04, 0xbb012ec0, 0xcbb002ec, + 0x00bb002e, 0xc02bb002, 0xec00bb00, 0x2ec00bb0, 0x02ec00bb, 0x0022c00b, + 0xb002ec00, 0xb9402cc0, 0x09b002a8, 0x10ba802a, 0x484b8002, 0xe6000980, + 0xa2c00890, 0x02e008bb, 0x002ec603, 0xb802b004, 0x60000000, 0x00000000, + 0x0015ec00, 0xfb003ec0, 0x8fb003ec, 0x00fb003e, 0xc00db003, 0xec00fb00, + 0x3ec00fb0, 0x03ec09e8, 0x50b2c00f, 0xb003ec00, 0xfa503ac0, 0x0cc043f4, + 0x00fa00ba, 0x408f8403, 0xe300c8a0, 0x32800c80, 0x03ec00fb, 0x003e300f, + 0xa80b1004, 0x70000000, 0x00000000, 0xe001bc00, 0xff003fc1, 0x0ff013fc, + 0x00ff003f, 0xc00ef013, 0xfc00ff00, 0x3fc10ff0, 0x03fc10fc, 0x003fc00f, + 0xf003fc00, 0xfc803fc2, 0x4ef00278, 0x04fe0037, 0xe00be401, 0xe020f400, + 0x3f808fd9, 0x02fc00ff, 0x023fe00f, 0xf003f800, 0x60000000, 0x00000000, + 0xc010ac00, 0xfb013ec0, 0x03b003ec, 0x00fb003e, 0xc12db003, 0xec00fb00, + 0x3ec00fb0, 0x03ec00f1, 0x0532c10f, 0xb003ec00, 0xfa583ec0, 0x2c000b64, + 0x20ca003e, 0x000f9403, 0x0400c840, 0xb2c40c80, 0x03e800fb, 0x013ed00f, + 0xa0033004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec, + 0x10bb012c, 0xc108b002, 0xec10bb01, 0x2ec00bb0, 0x02ec103b, 0x0422c00b, + 0xb002ec08, 0xb9802ed8, 0x48bd202a, 0x90d2000e, 0x600b9102, 0x26008988, + 0x22d00d90, 0x12e800bb, 0x002ef80b, 0x100eb200, 0x40000000, 0x00000000, + 0xe0054c00, 0xb3002cc1, 0x0b3002cc, 0x00b3002c, 0xc0093002, 0xcc00b300, + 0x2cc00b30, 0x02cc00b2, 0x0024c00b, 0x3002cc00, 0xb1402cc0, 0x08004246, + 0x1082002c, 0x060b1006, 0x0100a102, 0x22a00820, 0x02c400b3, 0x020cf20b, + 0x30023800, 0x50000000, 0x00000000, 0x60011e00, 0xb7802de0, 0x0b7842de, + 0x00b7802d, 0xe0097802, 0xde00b780, 0x6de00b78, 0x02de00b2, 0x0025e00b, + 0x7802de40, 0xb6812de0, 0x8878c20a, 0x0096802d, 0xa01bf802, 0x1e42af80, + 0x21b40978, 0x00d600b7, 0x802de00b, 0xfb029800, 0x00000000, 0x00000000, + 0x48080c00, 0xf3003cc4, 0x0f3003cc, 0x00f3003c, 0xc00d3003, 0xcc00f300, + 0x3cc00f30, 0x03cc04f2, 0x1034c01b, 0x3003cc00, 0xf1003cc0, 0x0c800344, + 0x0081003c, 0x840f240b, 0x0860e100, 0x32c00c21, 0x03c040f3, 0x003cc00f, + 0x32021202, 0x00000000, 0x00000000, 0x401dbc04, 0xff003fc0, 0x0ff003fc, + 0x00ff003d, 0xc00ef003, 0xfc00ff00, 0x3fc00ff0, 0x03fc00fe, 0x603bc00f, + 0xf003fc10, 0xff403fc0, 0x8ff003ba, 0x40fd013f, 0xc40fe0a3, 0xfc52df10, + 0x3fc10ff0, 0x53f200bf, 0x003fc40f, 0x72035007, 0x20000000, 0x00000000, + 0xa805ec00, 0xfb003ec0, 0x1db003ec, 0x08fb003e, 0xc00fb003, 0xec00fb00, + 0x3ec00fb0, 0x03ec00f8, 0x403ec00f, 0xb003ce00, 0xcbe03ac0, 0x0e8043e4, + 0x06ca02b6, 0x580f9603, 0xe520ca20, 0x3a800ea0, 0x03ec00fb, 0x003ec00c, + 0xa00b2a00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7022dc0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xdc00b700, 0x2dc00b70, 0x02dc00b4, 0x002dc00b, + 0x7002dc04, 0x860021c0, 0x887042d8, 0x00a60421, 0xc40b7302, 0xdc008310, + 0x2b800a70, 0x039c00b7, 0x002dc10d, 0x70023204, 0x60000000, 0x00000000, + 0xc0009e00, 0xb7812de0, 0x4b7802de, 0x00b7862d, 0xe00b7802, 0x9e00b780, + 0x2de00b78, 0x02de00b6, 0xc02de00b, 0x7802de02, 0x8f9029e0, 0x4a4810c6, + 0x008d8021, 0xa40b7a02, 0xfe038680, 0x2de00a68, 0x02da10b7, 0x802de008, + 0x68023000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x06cc00b3, 0x422cc00b, + 0x3002cc00, 0x830020c1, 0x083002c8, 0x00a10024, 0xc88b3002, 0xcd808340, + 0xaec00a30, 0x028840b3, 0x002cc009, 0x34021204, 0x30000000, 0x00000000, + 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800fa003, 0xa800fa00, + 0x3e800fa0, 0x03e800fa, 0x003e800f, 0xa003e800, 0xca003a80, 0x0ea003e8, + 0x04c60436, 0x800fa403, 0xf810c6d0, 0xbe800ea0, 0x03ea00fa, 0x003d800c, + 0xec473a04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0, + 0x00f8003e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x083e000f, + 0x8003e000, 0xf8503e00, 0x0fc013f0, 0x00f8013a, 0x000f8493, 0xc000f810, + 0x3a100f80, 0x03f000f8, 0x003e000f, 0x8587d200, 0x30000000, 0x00000000, + 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9002e, 0x600f9003, 0xe400f900, + 0x3e400f90, 0x03e400fb, 0x003e400f, 0x9003e400, 0xf9003e40, 0x2c900304, + 0x8ae90092, 0x410f9903, 0xe404c900, 0x36400c90, 0x03e400c9, 0x102e400c, + 0x90130204, 0x30000000, 0x00000000, 0x80046400, 0xb9006e40, 0x0b9002e4, + 0x00b9002e, 0x600b9003, 0xa400b900, 0x2e400b90, 0x02e400b9, 0x002e400b, + 0x9002e400, 0xbb492c40, 0x08900a24, 0x80890022, 0xe109b402, 0xe520d900, + 0x2a400890, 0x02c400d9, 0x802e520d, 0x100aa000, 0x10000000, 0x00000000, + 0x18052400, 0xb9042e40, 0x0b9002e4, 0x00b9002e, 0x440b9002, 0xe400b900, + 0x2e400b90, 0x02e400bb, 0x002e400b, 0x9002e400, 0xb9002e40, 0x08100a34, + 0x0089022a, 0x440b9002, 0xec808910, 0x664288d0, 0x02f400a9, 0x002e4808, + 0x90920600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4, + 0x00b1002c, 0x400b1002, 0xc400b100, 0x2c400b10, 0x12c400b1, 0x002c400b, + 0x1012c400, 0xb1002e44, 0x48510294, 0x00810068, 0x41093000, 0xc4029100, + 0x2c440850, 0x02f401b1, 0x102c4009, 0x10008201, 0x00000000, 0x00000000, + 0xb80d6000, 0xf8002e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe000f800, + 0x3e000f80, 0x03e000f8, 0x003e000f, 0x8003e000, 0xf8003c10, 0x88868330, + 0xa0c8003a, 0x000b8013, 0xe0a28829, 0x36102c80, 0x03f000e8, 0x403e000c, + 0x80010e03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xa400f900, 0x3e400f90, 0x03e400f9, 0x403e400f, + 0x9003e400, 0xf1002f49, 0x0f920364, 0x00d70036, 0x4005b001, 0xd400fd00, + 0xba480f90, 0x03e400d9, 0xa23dc00f, 0x5003e606, 0x70000000, 0x00000000, + 0x9805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003f, 0x400f9043, 0xe400f900, + 0x3e400f90, 0x03e404f9, 0x003e400f, 0x9003f402, 0xc9003e44, 0x0c920b14, + 0xa0cd00b2, 0x400f9003, 0xf400cd20, 0x33400e10, 0x03e400fd, 0x0231400c, + 0x50030600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0, + 0x00b8002e, 0x000b8002, 0xe000b800, 0x2e000b80, 0x02e000b8, 0x002e000b, + 0x8002e000, 0x88002e00, 0x08c28220, 0x02880022, 0x000b8002, 0xe0428802, + 0x2a880880, 0x03a800e8, 0x0222000a, 0x80014e04, 0x30000000, 0x00000000, + 0x0805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0xc400b100, + 0x2c400b10, 0x02c400b1, 0x002c401b, 0x1002c400, 0x81002d40, 0x08530a04, + 0x00810020, 0x400b1002, 0xc4020114, 0xa04a8a10, 0x02c400b1, 0x00264008, + 0x10220201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4, + 0x00b9002e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x42e400b9, 0x002e400b, + 0x9002e400, 0x89002e40, 0x08d02224, 0x00890022, 0xc80b9002, 0xe4a08908, + 0xaa400890, 0x02a400a9, 0x0006400a, 0xb2024604, 0x60000000, 0x00000000, + 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f900, + 0x3e400f90, 0x03e400f9, 0x603e400f, 0x9003e400, 0xc9603e40, 0x2c900324, + 0x00c94032, 0x620f9c03, 0xc504c940, 0xb2500e90, 0x03e500fd, 0x0036501c, + 0x90032804, 0x70000000, 0x00000000, 0xa801a400, 0xf9003e40, 0x0f9003e4, + 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x203e400f, + 0x9003e400, 0xf9003e40, 0x0f1003e4, 0x00f9903e, 0x400f9403, 0xe400f900, + 0x1e400b90, 0x03a408e9, 0x003a501b, 0x9803ea00, 0x60000000, 0x00000000, + 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe000f800, + 0x3e000f80, 0x03a000f8, 0x403e000f, 0x8003e000, 0xf8003f00, 0x0fc00320, + 0x10c8003e, 0x000f8113, 0xe102d040, 0x36122c80, 0x032000f8, 0x003e040c, + 0x80030a04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8, + 0x00ba002e, 0x800ba002, 0xe800ba00, 0x2e800ba0, 0x40e800ba, 0x022e810b, + 0xa002c800, 0xba002e81, 0x0ba0021b, 0xc0a2012e, 0x9049a022, 0xf800da88, + 0xaba008a0, 0x023800ea, 0x002db00a, 0x62028a00, 0x40000000, 0x00000000, + 0x28054c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc00b300, + 0x2cc00b30, 0x028c00b3, 0x002cc11b, 0x3002cc00, 0xa3002ec0, 0x0b20420f, + 0x0083006c, 0xc80b3802, 0xce009381, 0x26e00830, 0x020801bb, 0x002cd808, + 0x28020a00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0xc00b7002, 0xdc00b700, 0x2dc00b70, 0x12dc00b7, 0x002dc00b, + 0x7002dc00, 0xb6082d00, 0x0b50021c, 0x10a7042d, 0xc0097002, 0xd9009700, + 0x29c208f8, 0x021800a7, 0xa02dc00a, 0xe002a800, 0x40000000, 0x00000000, + 0xa8081e00, 0xf7803de0, 0x0f7803de, 0x00f7803d, 0x600f7803, 0xde00f780, + 0x3de00f78, 0x039e00f7, 0x803de10f, 0x7803de00, 0xe7803de0, 0x0be80b1e, + 0x00c7803d, 0x620b6883, 0xce00d784, 0x37e00c78, 0x0b1a00f5, 0x403de00c, + 0x78032a02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0x400fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, + 0xb003ec00, 0xfa093e00, 0x0f9003ec, 0x10fb003e, 0x5001a403, 0xec00e300, + 0x3ec00fb0, 0x03e800e9, 0x803ec00f, 0xb003c206, 0x60000000, 0x00000000, + 0x4005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803d, 0xe00cf803, 0xfe00ff80, + 0x3fe00ff8, 0x03fe00ff, 0x803fe00f, 0xf807dc41, 0xcd903fe4, 0x0ce8033e, + 0x00c78233, 0xe00fd803, 0xde00dfb0, 0xb7e00cf8, 0x03fa00ff, 0x803fe00c, + 0x68030000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002dc, + 0x00b7002d, 0xc00a7002, 0xdc00b700, 0x2dc00b70, 0x02dc00b7, 0x002dc40b, + 0x7006dc02, 0x84002d00, 0xa850021c, 0x408710b1, 0x840b5002, 0xd888f710, + 0x37488d70, 0x039800e7, 0x002dc00f, 0x60036a04, 0x60000000, 0x00000000, + 0x18009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0x40087002, 0xdc00b700, + 0x2dc00b70, 0x02dc00b7, 0x402dc00b, 0x7002dc40, 0x85012fc0, 0x08680a0c, + 0x02870025, 0x420b4082, 0xdc058321, 0x21800870, 0x02d800b5, 0x002fc008, + 0xf0820000, 0x20000000, 0x00000000, 0x6014cc00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0x400a3002, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x002cc00b, + 0x3002cc00, 0x80002e00, 0x4815020d, 0x30830020, 0x20cb0822, 0xcd2091c0, + 0x26008934, 0x028b00a1, 0x002c810b, 0x36424804, 0x30000000, 0x00000000, + 0x3815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003c, 0x400cb003, 0xec00fb00, + 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, 0xb003ec00, 0xcb183ec0, 0x8ca0030e, + 0x80c30036, 0xb00fb803, 0xec08cb02, 0xb2400c30, 0x03e9c0fb, 0x003ee01c, + 0x38472a04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0fb003ec, + 0x00fb003e, 0x400fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x103ec00f, + 0xb003ec04, 0xf9423e00, 0x0e1093e5, 0x00fb003e, 0x120fa043, 0xca00f310, + 0x3e008fb0, 0x07e801fb, 0x023ec61e, 0xb007a000, 0x30000000, 0x00000000, + 0x8010fc00, 0xff003fc0, 0x0ff023fc, 0x00ff003f, 0x480cf003, 0xfc00ff00, + 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003fc00, 0xfe823fc0, 0x3ce0473e, + 0x50cf0037, 0xa00cd803, 0xfc04df08, 0x37400cf0, 0x933800cd, 0x003f440f, + 0xf0074044, 0x30000000, 0x00000000, 0x81046c01, 0xbb002ec0, 0x0bb002ec, + 0x04bb012e, 0x400db002, 0xec00bb00, 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, + 0xb002ec00, 0xb8192f00, 0x98d01228, 0x00ab0034, 0x10088e20, 0xee02fb00, + 0xb62028b0, 0x020800c9, 0x002ec00b, 0xbc022040, 0x10000000, 0x00000000, + 0x80052c04, 0xbb042ec0, 0x0bb002ec, 0x00bb002e, 0x4008b042, 0xec00bb00, + 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xb002ec00, 0xbb002ec0, 0x88a0026c, + 0x308b0066, 0xc508b102, 0xee089b00, 0xa67008b0, 0x0628009b, 0x002ec20b, + 0x98022000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc, + 0x00b3002c, 0x40093002, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x002cc00b, + 0x3002cc00, 0xb1042c00, 0x08101a4c, 0x00ab0026, 0x00182052, 0xc000b300, + 0xa40008b0, 0x0a080183, 0x002cc00b, 0x900a4201, 0x00000000, 0x00000000, + 0x800d6c08, 0xbb003ec0, 0x0fb003ec, 0x00fb013e, 0x402cb003, 0xec00fb00, + 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, 0xb002ec00, 0xfa003ec0, 0x1820426c, + 0x04cb00b6, 0xc1089003, 0xec02db00, 0x36000cb0, 0x032802d9, 0x003ec00f, + 0x90034003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x4ff000fc, + 0x00ff003f, 0x402ff003, 0xfc00ff00, 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, + 0xf003fc04, 0xfc003d01, 0x8fd02bbc, 0x00ff00b7, 0x000fc003, 0xfc00fd02, + 0x3b004ff0, 0x03f800fd, 0x003dc08f, 0xd023a806, 0x70000000, 0x00000000, + 0x00000284, 0x00a10028, 0x400a1002, 0x8400a1cc, 0x28400a10, 0x028400a1, + 0x0028730a, 0x10028400, 0xa1002873, 0x0a100285, 0x04a10028, 0x600a1082, + 0x8230a100, 0x28420a10, 0x02860491, 0x0028400a, 0x18c2842c, 0xb14c2842, + 0x0a100000, 0x00000000, 0x00000000, 0x00000004, 0x00010000, 0x40001000, + 0x04000100, 0x00400010, 0x00040001, 0x00004000, 0x10000400, 0x01000040, + 0x00100004, 0x10010000, 0x53001000, 0x04000100, 0x00410010, 0x00050011, + 0x00004000, 0x10000408, 0x01420040, 0x00100000, 0x00000000, 0x00000000, + 0x00000084, 0x00210008, 0x40021000, 0x84002100, 0x08400210, 0x00840021, + 0x00084002, 0x10008400, 0x21000840, 0x021000c5, 0x24210008, 0x63021080, + 0x85002100, 0x08422210, 0x00042601, 0x00084002, 0x1400c420, 0x21090842, + 0x02100000, 0x00000000, 0x00000000, 0x00000804, 0x02010080, 0x40201008, + 0x040201cc, 0x80402010, 0x08040201, 0x00807320, 0x10080402, 0x01008073, + 0x20100805, 0x02010280, 0x62201088, 0x05020100, 0x80402010, 0x08062201, + 0x00804020, 0x18c80426, 0x014c8042, 0x20100000, 0x00000000, 0x00000000, + 0x00000080, 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020, + 0x00080002, 0x00008002, 0x20000833, 0x22000080, 0x2820090a, 0x31020000, + 0x82002004, 0x0800020c, 0xc0800410, 0x00080002, 0x00000200, 0x300c0801, + 0x02000000, 0x00000000, 0x00000000, 0x00000200, 0x00800020, 0x00080002, + 0x00008000, 0x20000800, 0x02000080, 0x00200008, 0x00020000, 0x80002000, + 0x08000203, 0x10800020, 0x01080002, 0x01008008, 0x20000800, 0x02000080, + 0x00200008, 0x08024110, 0x800c2002, 0x08004000, 0x00000000, 0x00000000, + 0x00000080, 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020, + 0x00080002, 0x00008000, 0x20000800, 0x020000c1, 0x2c200b08, 0x02020080, + 0x80002000, 0x08000200, 0x20c02000, 0x00080002, 0x0410c220, 0x00090802, + 0x02008000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000033, + 0x00003102, 0x28000800, 0x31000080, 0x02000004, 0x0000000c, 0xc0002010, + 0x00000000, 0x00000224, 0x10050003, 0x00008000, 0x00000000, 0x00000000, + 0x00000284, 0x00a10028, 0x400a1002, 0x8400a100, 0x28400a10, 0x028400a1, + 0x0028400a, 0x10028400, 0xa1002840, 0x0a100284, 0x00a10428, 0x414a1042, + 0x8400a100, 0x28400a10, 0x028404a1, 0x0428400a, 0x14028410, 0xb1082841, + 0x0a100000, 0x00000000, 0x00000000, 0x00000004, 0x00010000, 0x40001000, + 0x04000100, 0x00400010, 0x00040001, 0x00004000, 0x10000400, 0x01000040, + 0x00105004, 0x04010900, 0x52401080, 0x04000140, 0x00400010, 0x00042401, + 0x88004000, 0x10300424, 0x010d0042, 0x80108000, 0x00000000, 0x00000000, + 0x00000084, 0x00210008, 0x40021000, 0x84002100, 0x08400210, 0x00840021, + 0x00084002, 0x10008400, 0x21000840, 0x021080c4, 0x00210608, 0x61821000, + 0x84002100, 0x08400210, 0x00840411, 0x44084002, 0x1410c514, 0x210d0841, + 0x42104000, 0x00000000, 0x00000000, 0x00100007, 0x3001cc00, 0x73001cc0, + 0x073001cc, 0x0073001c, 0xc0040001, 0xcc007300, 0x1cc00730, 0x01cc0073, + 0x001cc007, 0x3c01cf00, 0x73401cc0, 0x07300180, 0x0073001c, 0xd0041401, + 0x88007300, 0x18c00514, 0x01c50072, 0x001cc004, 0x00000000, 0x00000000, + 0x00000084, 0x00210008, 0x40021000, 0x84002100, 0x08400210, 0x00840021, + 0x00084002, 0x10008400, 0x21000840, 0x02100086, 0x20210808, 0x42421cc0, + 0x84002100, 0x08400210, 0x10873c21, 0x8c087302, 0x18d0842c, 0x01470840, + 0x02104000, 0x00000000, 0x00000000, 0x00000200, 0x00800020, 0x00080002, + 0x00008000, 0x20000800, 0x02000080, 0x00200008, 0x00020000, 0x80002000, + 0x08000301, 0x00800c20, 0x02881002, 0x00008000, 0x20000800, 0x02042081, + 0x00204108, 0x18220030, 0x81442000, 0x48008000, 0x00000000, 0x00000000, + 0x00000080, 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020, + 0x00080002, 0x00008000, 0x20000800, 0x020020c0, 0x2420090a, 0x03021000, + 0x80002000, 0x08000200, 0x10441401, 0x48084202, 0x14100034, 0x21890800, + 0x42004000, 0x00000000, 0x00000000, 0x04108000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00002002, 0x28000e00, 0x03000cc0, 0x00000000, 0x00000000, 0x20432000, + 0x8c003100, 0x0cc00030, 0x00000000, 0x40004104, 0x20000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x40000000, 0x10000080, + 0x00000000, 0x00000000, 0x10108000, 0x00000000, 0x00100000, 0x10402090, + 0x80008000, 0x00000000, 0x00000000, 0x3c3c0000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x000010c0, 0x80800000, 0x10003080, 0x00000000, 0x00000000, 0x10c08080, + 0x00001000, 0x0010e080, 0x80000010, 0x00308f0f, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000002, 0x001a003c, 0x003c0000, + 0x00000000, 0x00000000, 0x0141c181, 0x40199999, 0x99801b00, 0x18002400, + 0x3c000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x80000014, 0x00140000, 0x00000000, 0x00000000, 0x00028202, + 0x00000000, 0x00000000, 0x02001400, 0x14000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001101, 0x80018000, + 0x00000000, 0x00000000, 0x28142112, 0x30000000, 0x00000000, 0x00110880, + 0x08800000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f, + 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000, + 0x00003f7f, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff, + 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000, + 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff, + 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f, + 0xffffffc0, 0x00000000, 0x3fff7ffd, 0x40000000, 0x003fffff, 0xffc00000, + 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f, + 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000, + 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3df7ffff, + 0xc0000000, 0x003ffeff, 0xfec00000, 0x00000000, 0x00000000, 0x00000000, + 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff, + 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f, + 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000, + 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f, + 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000, + 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff, + 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000, + 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff, + 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f, + 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000, + 0x00000000, 0x00000000, 0x00000000, 0x00000284, 0x00a10028, 0x400a1002, + 0x8400a100, 0x28400a0c, 0xc28400a1, 0x0028400a, 0x10028400, 0xa1002840, + 0x0a104285, 0x04a54028, 0x420a1802, 0x8700a000, 0x29400a10, 0x028400a1, + 0x0028400a, 0x10028400, 0xa1002840, 0x0a100000, 0x00000000, 0x00000000, + 0x00000004, 0x00010000, 0x40001000, 0x04000100, 0x00400010, 0x00040001, + 0x00004000, 0x10000400, 0x01000040, 0x00108007, 0x00090000, 0x41009440, + 0x0700084e, 0x02400010, 0x00040001, 0x00004000, 0x10000400, 0x01000040, + 0x00100000, 0x00000000, 0x00000000, 0x00000084, 0x00210008, 0x40021000, + 0x84002100, 0x08400210, 0x00840021, 0x00084002, 0x10008400, 0x21000840, + 0x02104087, 0x0821410c, 0x42021880, 0x852021c9, 0x08400290, 0x00840021, + 0x00084002, 0x10008400, 0x21000840, 0x02100000, 0x00000000, 0x00000000, + 0x00000004, 0x02010080, 0x40201008, 0x04000100, 0x80402010, 0x08040201, + 0x00804020, 0x10080402, 0x01008040, 0x20104805, 0x0a014180, 0x40201008, + 0x062a010d, 0x80402010, 0x08040201, 0x00804020, 0x10080402, 0x01008040, + 0x20100000, 0x00000000, 0x00000000, 0x00000080, 0x00200008, 0x00020000, + 0x80002000, 0x08000200, 0x08800020, 0x00080022, 0x00088332, 0x20008820, + 0x22000082, 0x00284609, 0x22020800, 0x82242040, 0x08000204, 0x00800020, + 0x00080002, 0x00008000, 0x20000800, 0x02000000, 0x00000000, 0x00000000, + 0x00000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800, 0x02000080, + 0x00200008, 0x00020000, 0x80002010, 0x08000201, 0x20c04020, 0x10080082, + 0x031080c0, 0x20000884, 0x82000080, 0x00200008, 0x00020000, 0x80002000, + 0x08000000, 0x00000000, 0x00000000, 0x00000080, 0x00200008, 0x00020000, + 0x80002000, 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000820, + 0x02000080, 0x0c200b0c, 0x220604c0, 0x832428c1, 0x0a000204, 0x40800020, + 0x00080002, 0x00008000, 0x20000800, 0x02000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000330, 0x00000000, 0x00000002, 0x10008000, 0x22000440, + 0x002c00c3, 0x0100000c, 0x40000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000284, 0x00a10028, 0x400a1002, + 0x8400a100, 0x28400a10, 0x028400a1, 0x0028400a, 0x10028400, 0xa1cc2840, + 0x0a100285, 0x00a5042c, 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0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x30000001, 0x000054cf, 0x30008001, 0x00000003, 0x30004015, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x30008001, 0x00000005, 0x3000a001, 0x00000000, + 0x30000001, 0x0000dca0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, +}; diff --git a/board/cssi/mcr3000/mcr3000.c b/board/cssi/mcr3000/mcr3000.c index 8857c9e42c7..48e82a902d5 100644 --- a/board/cssi/mcr3000/mcr3000.c +++ b/board/cssi/mcr3000/mcr3000.c @@ -13,12 +13,15 @@ #include <mpc8xx.h> #include <fdt_support.h> #include <serial.h> +#include <spi.h> #include <asm/global_data.h> #include <asm/io.h> #include <dm/uclass.h> #include <wdt.h> #include <linux/delay.h> +#include "fpga_code.h" + DECLARE_GLOBAL_DATA_PTR; #define SDRAM_MAX_SIZE (32 * 1024 * 1024) @@ -107,6 +110,49 @@ int dram_init(void) return 0; } +static int load_fpga(void) +{ + immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR; + struct udevice *master; + struct spi_slave *slave; + int ret; + + ret = uclass_get_device(UCLASS_SPI, 0, &master); + if (ret) + return ret; + + ret = _spi_get_bus_and_cs(0, 1, 10000000, 0, "spi_generic_drv", + "generic_0:0", &master, &slave); + if (ret) + return ret; + + ret = spi_claim_bus(slave); + + printf("FPGA Init ... "); + + clrbits_be32(&immr->im_cpm.cp_pbdat, 0x20000); + while ((in_be32(&immr->im_cpm.cp_pbdat) & 0x8000)) + ; + setbits_be32(&immr->im_cpm.cp_pbdat, 0x20000); + while (!(in_be32(&immr->im_cpm.cp_pbdat) & 0x8000)) + ; + + printf("Loading ... "); + + ret = spi_xfer(slave, sizeof(fpga_code) * BITS_PER_BYTE, fpga_code, NULL, 0); + + spi_release_bus(slave); + + if ((in_be32(&immr->im_cpm.cp_pbdat) & 0x4000)) { + printf("Done\n"); + } else { + printf("FAILED\n"); + ret = -EINVAL; + } + + return ret; +} + int misc_init_r(void) { immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR; @@ -116,6 +162,18 @@ int misc_init_r(void) clrbits_be16(&iop->iop_pcpar, 0x4); clrbits_be16(&iop->iop_pcdir, 0x4); + /* Activate SPI */ + clrsetbits_be32(&immr->im_cpm.cp_pbpar, 0x1, 0xe); + setbits_be32(&immr->im_cpm.cp_pbdir, 0xf); + clrbits_be32(&immr->im_cpm.cp_pbdat, 0x1); + + if (!load_fpga()) { + u8 addr = in_be16((void *)0x1400009c); + + printf("Board address: 0x%2.2x (System %d Rack %d Slot %d)\n", + addr, addr >> 7, (addr >> 4) & 7, addr & 15); + } + /* if BTN_ACQ_AL is pressed then bootdelay is changed to 60 second */ if ((in_be16(&iop->iop_pcdat) & 0x0004) == 0) env_set("bootdelay", "60"); diff --git a/board/cssi/mcr3000/mcr3000.env b/board/cssi/mcr3000/mcr3000.env index 372ab09094d..380c10c4ce7 100644 --- a/board/cssi/mcr3000/mcr3000.env +++ b/board/cssi/mcr3000/mcr3000.env @@ -8,7 +8,7 @@ dhcp_ip=ip=:::::eth0:dhcp console_args=console=ttyCPM0,115200N8 loadkernel=ubi part nand0;ubifsmount ubi0;ubifsload ${loadaddr} /boot/${filename};ubifsumount; ubi detach bootcmd=run flashboot -flashboot=setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:mcr3k:eth0:off;${ofl_args}; run loadkernel; bootm ${loadaddr} +flashboot=setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:mcr3k:eth0:off ${ofl_args}; run loadkernel; bootm ${loadaddr} tftpboot=setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:mcr3k:eth0:off ${ofl_args}; tftp ${loadaddr} ${filename}; bootm ${loadaddr} dhcpboot=dhcp ${loadaddr} ${filename};setenv bootargs ${console_args} ${dhcp_ip} ${ofl_args}; bootm ${loadaddr} update=echo 'Updating ubi image'; if tftp 0x2000 $ubifile; then nand erase.chip; nand write 0x2000 0x00 $filesize; fi diff --git a/board/cssi/mcr3000/mcr3000_gpio.c b/board/cssi/mcr3000/mcr3000_gpio.c new file mode 100644 index 00000000000..2bba14e6e57 --- /dev/null +++ b/board/cssi/mcr3000/mcr3000_gpio.c @@ -0,0 +1,109 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2024 CS GROUP France + * Christophe Leroy <christophe.leroy@csgroup.eu> + */ + +#include <asm/io.h> +#include <dm.h> +#include <mapmem.h> +#include <asm/gpio.h> +#include <malloc.h> + +#include "../common/common.h" + +struct mcr3000_spi_gpio_plat { + ulong addr; +}; + +struct mcr3000_spi_gpio_data { + void __iomem *base; +}; + +static int mcr3000_spi_gpio_set_value(struct udevice *dev, uint gpio, int value) +{ + struct mcr3000_spi_gpio_data *data = dev_get_priv(dev); + + if (value) + clrsetbits_be16(data->base, 7 << 5, (gpio & 7) << 5); + else + clrbits_be16(data->base, 7 << 5); + + return 0; +} + +static int mcr3000_spi_gpio_get_value(struct udevice *dev, uint gpio) +{ + struct mcr3000_spi_gpio_data *data = dev_get_priv(dev); + + return gpio == ((in_be16(data->base) >> 5) & 7); +} + +static int mcr3000_spi_gpio_direction_input(struct udevice *dev, uint gpio) +{ + return 0; +} + +static int mcr3000_spi_gpio_get_function(struct udevice *dev, uint gpio) +{ + return GPIOF_OUTPUT; +} + +static int mcr3000_spi_gpio_ofdata_to_platdata(struct udevice *dev) +{ + struct mcr3000_spi_gpio_plat *plat = dev_get_plat(dev); + fdt_addr_t addr; + u32 reg[2]; + + dev_read_u32_array(dev, "reg", reg, 2); + addr = dev_translate_address(dev, reg); + + plat->addr = addr; + + return 0; +} + +static int mcr3000_spi_gpio_probe(struct udevice *dev) +{ + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct mcr3000_spi_gpio_data *data = dev_get_priv(dev); + struct mcr3000_spi_gpio_plat *plat = dev_get_plat(dev); + char name[32], *str; + + data->base = map_sysmem(plat->addr, 2); + + snprintf(name, sizeof(name), "CHIPSELECT@%lx_", plat->addr); + str = strdup(name); + + if (!str) + return -ENOMEM; + + uc_priv->bank_name = str; + uc_priv->gpio_count = 16; + + return 0; +} + +static const struct dm_gpio_ops gpio_mcr3000_spi_ops = { + .get_value = mcr3000_spi_gpio_get_value, + .set_value = mcr3000_spi_gpio_set_value, + .direction_input = mcr3000_spi_gpio_direction_input, + .direction_output = mcr3000_spi_gpio_set_value, + .get_function = mcr3000_spi_gpio_get_function, +}; + +static const struct udevice_id mcr3000_spi_gpio_ids[] = { + { .compatible = "s3k,mcr3000-cpld-csspi"}, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(mcr3000_spi_gpio) = { + .name = "mcr3000_spi_chipselect", + .id = UCLASS_GPIO, + .ops = &gpio_mcr3000_spi_ops, + .of_to_plat = mcr3000_spi_gpio_ofdata_to_platdata, + .plat_auto = sizeof(struct mcr3000_spi_gpio_plat), + .of_match = mcr3000_spi_gpio_ids, + .probe = mcr3000_spi_gpio_probe, + .priv_auto = sizeof(struct mcr3000_spi_gpio_data), +}; diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c index 079dfff0389..22af423536d 100644 --- a/board/dhelectronics/dh_stm32mp1/board.c +++ b/board/dhelectronics/dh_stm32mp1/board.c @@ -48,12 +48,10 @@ /* SYSCFG registers */ #define SYSCFG_BOOTR 0x00 -#define SYSCFG_PMCSETR 0x04 #define SYSCFG_IOCTRLSETR 0x18 #define SYSCFG_ICNR 0x1C #define SYSCFG_CMPCR 0x20 #define SYSCFG_CMPENSETR 0x24 -#define SYSCFG_PMCCLRR 0x44 #define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0) #define SYSCFG_BOOTR_BOOTPD_SHIFT 4 @@ -69,16 +67,6 @@ #define SYSCFG_CMPENSETR_MPU_EN BIT(0) -#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16) -#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17) - -#define SYSCFG_PMCSETR_ETH_SELMII BIT(20) - -#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21) -#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0 -#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21) -#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23) - #define KS_CCR 0x08 #define KS_CCR_EEPROM BIT(9) #define KS_BE0 BIT(12) @@ -685,76 +673,6 @@ void board_quiesce_devices(void) #endif } -/* eth init function : weak called in eqos driver */ -int board_interface_eth_init(struct udevice *dev, - phy_interface_t interface_type) -{ - u8 *syscfg; - u32 value; - bool eth_clk_sel_reg = false; - bool eth_ref_clk_sel_reg = false; - - /* Gigabit Ethernet 125MHz clock selection. */ - eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel"); - - /* Ethernet 50Mhz RMII clock selection */ - eth_ref_clk_sel_reg = - dev_read_bool(dev, "st,eth-ref-clk-sel"); - - syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG); - - if (!syscfg) - return -ENODEV; - - switch (interface_type) { - case PHY_INTERFACE_MODE_MII: - value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII | - SYSCFG_PMCSETR_ETH_REF_CLK_SEL; - debug("%s: PHY_INTERFACE_MODE_MII\n", __func__); - break; - case PHY_INTERFACE_MODE_GMII: - if (eth_clk_sel_reg) - value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII | - SYSCFG_PMCSETR_ETH_CLK_SEL; - else - value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII; - debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__); - break; - case PHY_INTERFACE_MODE_RMII: - if (eth_ref_clk_sel_reg) - value = SYSCFG_PMCSETR_ETH_SEL_RMII | - SYSCFG_PMCSETR_ETH_REF_CLK_SEL; - else - value = SYSCFG_PMCSETR_ETH_SEL_RMII; - debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__); - break; - case PHY_INTERFACE_MODE_RGMII: - case PHY_INTERFACE_MODE_RGMII_ID: - case PHY_INTERFACE_MODE_RGMII_RXID: - case PHY_INTERFACE_MODE_RGMII_TXID: - if (eth_clk_sel_reg) - value = SYSCFG_PMCSETR_ETH_SEL_RGMII | - SYSCFG_PMCSETR_ETH_CLK_SEL; - else - value = SYSCFG_PMCSETR_ETH_SEL_RGMII; - debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__); - break; - default: - debug("%s: Do not manage %d interface\n", - __func__, interface_type); - /* Do not manage others interfaces */ - return -EINVAL; - } - - /* clear and set ETH configuration bits */ - writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII | - SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL, - syscfg + SYSCFG_PMCCLRR); - writel(value, syscfg + SYSCFG_PMCSETR); - - return 0; -} - #if defined(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, struct bd_info *bd) { diff --git a/board/firefly/firefly-rk3308/MAINTAINERS b/board/firefly/firefly-rk3308/MAINTAINERS index e584038a203..b70ff52ea74 100644 --- a/board/firefly/firefly-rk3308/MAINTAINERS +++ b/board/firefly/firefly-rk3308/MAINTAINERS @@ -4,3 +4,4 @@ S: Maintained F: board/firefly/firefly-rk3308/ F: configs/roc-cc-rk3308_defconfig F: include/configs/firefly_rk3308.h +F: arch/arm/dts/rk3308-roc-cc* diff --git a/board/firefly/firefly-rk3308/roc_cc_rk3308.c b/board/firefly/firefly-rk3308/roc_cc_rk3308.c index 99a52a77116..af00250e118 100644 --- a/board/firefly/firefly-rk3308/roc_cc_rk3308.c +++ b/board/firefly/firefly-rk3308/roc_cc_rk3308.c @@ -5,7 +5,7 @@ #include <common.h> #include <adc.h> -#include <asm/arch/grf_rk3308.h> +#include <asm/arch-rockchip/grf_rk3308.h> #include <asm/arch-rockchip/hardware.h> #include <linux/bitops.h> diff --git a/board/freescale/common/i2c_mux.c b/board/freescale/common/i2c_mux.c index 54f89e25760..d40b34f1039 100644 --- a/board/freescale/common/i2c_mux.c +++ b/board/freescale/common/i2c_mux.c @@ -12,7 +12,7 @@ /* * A new Kconfig option for something that used to always be built should be - * “default y”. + * "default y". */ #ifdef CONFIG_FSL_USE_PCA9547_MUX diff --git a/board/freescale/imx93_evk/spl.c b/board/freescale/imx93_evk/spl.c index 7331a20f94c..6d5e110b277 100644 --- a/board/freescale/imx93_evk/spl.c +++ b/board/freescale/imx93_evk/spl.c @@ -120,8 +120,8 @@ void board_init_f(ulong dummy) if (ret) { printf("Fail to init Sentinel API\n"); } else { - printf("SOC: 0x%x\n", gd->arch.soc_rev); - printf("LC: 0x%x\n", gd->arch.lifecycle); + debug("SOC: 0x%x\n", gd->arch.soc_rev); + debug("LC: 0x%x\n", gd->arch.lifecycle); } power_init_board(); diff --git a/board/friendlyelec/nanopc-t6-rk3588/Makefile b/board/friendlyelec/nanopc-t6-rk3588/Makefile deleted file mode 100644 index c1c49b19708..00000000000 --- a/board/friendlyelec/nanopc-t6-rk3588/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2023 Rockchip Electronics Co,. Ltd. -# - -obj-y += nanopc-t6-rk3588.o diff --git a/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c b/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c deleted file mode 100644 index 99bbef964e0..00000000000 --- a/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2023 Rockchip Electronics Co,. Ltd. - */ - -#include <fdtdec.h> -#include <fdt_support.h> - -#ifdef CONFIG_OF_BOARD_SETUP -int nanopc_t6_add_reserved_memory_fdt_nodes(void *new_blob) -{ - struct fdt_memory gap1 = { - .start = 0x3fc000000, - .end = 0x3fc4fffff, - }; - struct fdt_memory gap2 = { - .start = 0x3fff00000, - .end = 0x3ffffffff, - }; - unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP; - unsigned int ret; - - /* - * Inject the reserved-memory nodes into the DTS - */ - ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0, - NULL, flags); - if (ret) - return ret; - - return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0, - NULL, flags); -} - -int ft_board_setup(void *blob, struct bd_info *bd) -{ - return nanopc_t6_add_reserved_memory_fdt_nodes(blob); -} -#endif diff --git a/board/gateworks/venice/venice.c b/board/gateworks/venice/venice.c index f54f1186b68..5b105d7659e 100644 --- a/board/gateworks/venice/venice.c +++ b/board/gateworks/venice/venice.c @@ -230,6 +230,7 @@ uint mmc_get_env_part(struct mmc *mmc) int ft_board_setup(void *fdt, struct bd_info *bd) { const char *base_model = eeprom_get_baseboard_model(); + const char *path; char pcbrev; int off; @@ -238,10 +239,10 @@ int ft_board_setup(void *fdt, struct bd_info *bd) if (!strncmp(base_model, "GW73", 4)) { pcbrev = get_pcb_rev(base_model); + path = fdt_get_alias(fdt, "ethernet1"); - if (pcbrev > 'B' && pcbrev < 'E') { - printf("adjusting dt for %s\n", base_model); - + if (pcbrev > 'B' && pcbrev < 'E' && path && !strncmp(path, "/soc@0/pcie@", 12)) { + printf("adjusting %s pcie\n", base_model); /* * revC/D/E has PCIe 4-port switch which changes * ethernet1 PCIe GbE: diff --git a/board/kontron/sl28/spl.c b/board/kontron/sl28/spl.c index ffaf517a8bb..80acde74956 100644 --- a/board/kontron/sl28/spl.c +++ b/board/kontron/sl28/spl.c @@ -47,15 +47,14 @@ int board_fit_config_name_match(const char *name) switch (variant) { case 1: - return strcmp(name, "fsl-ls1028a-kontron-sl28-var1"); + return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28-var1"); case 2: - return strcmp(name, "fsl-ls1028a-kontron-sl28-var2"); - case 3: - return strcmp(name, "fsl-ls1028a-kontron-sl28-var3"); + return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28-var2"); case 4: - return strcmp(name, "fsl-ls1028a-kontron-sl28-var4"); + return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28-var4"); + case 3: default: - return strcmp(name, "fsl-ls1028a-kontron-sl28"); + return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28"); } } diff --git a/board/phytec/phycore_imx93/spl.c b/board/phytec/phycore_imx93/spl.c index f03bfee9ffa..5efa38a1442 100644 --- a/board/phytec/phycore_imx93/spl.c +++ b/board/phytec/phycore_imx93/spl.c @@ -126,8 +126,8 @@ void board_init_f(ulong dummy) if (ret) { printf("Fail to init ELE API\n"); } else { - printf("SOC: 0x%x\n", gd->arch.soc_rev); - printf("LC: 0x%x\n", gd->arch.lifecycle); + debug("SOC: 0x%x\n", gd->arch.soc_rev); + debug("LC: 0x%x\n", gd->arch.lifecycle); } clock_init(); diff --git a/board/pine64/quartzpro64-rk3588/Makefile b/board/pine64/quartzpro64-rk3588/Makefile deleted file mode 100644 index 47819d9be93..00000000000 --- a/board/pine64/quartzpro64-rk3588/Makefile +++ /dev/null @@ -1,3 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ - -obj-y += quartzpro64-rk3588.o diff --git a/board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c b/board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c deleted file mode 100644 index bda804a89e2..00000000000 --- a/board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2023 Google, Inc - */ - -#include <fdtdec.h> -#include <fdt_support.h> - -#ifdef CONFIG_OF_BOARD_SETUP -int quartzpro64_add_reserved_memory_fdt_nodes(void *new_blob) -{ - struct fdt_memory gap1 = { - .start = 0x3fc000000, - .end = 0x3fc4fffff, - }; - struct fdt_memory gap2 = { - .start = 0x3fff00000, - .end = 0x3ffffffff, - }; - unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP; - unsigned int ret; - - /* - * Inject the reserved-memory nodes into the DTS - */ - ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0, - NULL, flags); - if (ret) - return ret; - - return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0, - NULL, flags); -} - -int ft_board_setup(void *blob, struct bd_info *bd) -{ - return quartzpro64_add_reserved_memory_fdt_nodes(blob); -} -#endif diff --git a/board/radxa/rock2/MAINTAINERS b/board/radxa/rock2/MAINTAINERS index 5328fd76014..af974c98304 100644 --- a/board/radxa/rock2/MAINTAINERS +++ b/board/radxa/rock2/MAINTAINERS @@ -1,9 +1,7 @@ FIREFLY M: Simon Glass <sjg@chromium.org> S: Maintained -F: arch/arm/dts/rk3288-rock2-som.dtsi -F: arch/arm/dts/rk3288-rock2-square.dts -F: arch/arm/dts/rk3288-rock2-square-u-boot.dtsi +F: arch/arm/dts/rk3288-rock2* F: board/radxa/rock2 F: include/configs/rock2.h F: configs/rock2_defconfig diff --git a/board/radxa/rock5a-rk3588s/Makefile b/board/radxa/rock5a-rk3588s/Makefile deleted file mode 100644 index 48dd5124550..00000000000 --- a/board/radxa/rock5a-rk3588s/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2023 Collabora Ltd. -# - -obj-y += rock5a-rk3588s.o diff --git a/board/radxa/rock5a-rk3588s/rock5a-rk3588s.c b/board/radxa/rock5a-rk3588s/rock5a-rk3588s.c deleted file mode 100644 index 2d7a8c07dc5..00000000000 --- a/board/radxa/rock5a-rk3588s/rock5a-rk3588s.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2023 Collabora Ltd. - */ - -#include <fdtdec.h> -#include <fdt_support.h> - -#ifdef CONFIG_OF_BOARD_SETUP -int rock5a_add_reserved_memory_fdt_nodes(void *new_blob) -{ - struct fdt_memory gap1 = { - .start = 0x3fc000000, - .end = 0x3fc4fffff, - }; - struct fdt_memory gap2 = { - .start = 0x3fff00000, - .end = 0x3ffffffff, - }; - unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP; - unsigned int ret; - - /* - * Inject the reserved-memory nodes into the DTS - */ - ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0, - NULL, flags); - if (ret) - return ret; - - return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0, - NULL, flags); -} - -int ft_board_setup(void *blob, struct bd_info *bd) -{ - return rock5a_add_reserved_memory_fdt_nodes(blob); -} -#endif diff --git a/board/radxa/rock5b-rk3588/Makefile b/board/radxa/rock5b-rk3588/Makefile deleted file mode 100644 index 95d813596da..00000000000 --- a/board/radxa/rock5b-rk3588/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2022 Collabora Ltd. -# - -obj-y += rock5b-rk3588.o diff --git a/board/radxa/rock5b-rk3588/rock5b-rk3588.c b/board/radxa/rock5b-rk3588/rock5b-rk3588.c deleted file mode 100644 index 5c3b52b9489..00000000000 --- a/board/radxa/rock5b-rk3588/rock5b-rk3588.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2023 Collabora Ltd. - */ - -#include <fdtdec.h> -#include <fdt_support.h> - -#ifdef CONFIG_OF_BOARD_SETUP -int rock5b_add_reserved_memory_fdt_nodes(void *new_blob) -{ - struct fdt_memory gap1 = { - .start = 0x3fc000000, - .end = 0x3fc4fffff, - }; - struct fdt_memory gap2 = { - .start = 0x3fff00000, - .end = 0x3ffffffff, - }; - unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP; - unsigned int ret; - - /* - * Inject the reserved-memory nodes into the DTS - */ - ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0, - NULL, flags); - if (ret) - return ret; - - return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0, - NULL, flags); -} - -int ft_board_setup(void *blob, struct bd_info *bd) -{ - return rock5b_add_reserved_memory_fdt_nodes(blob); -} -#endif diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c index 8c47246ae8b..2c8860bcee4 100644 --- a/board/renesas/salvator-x/salvator-x.c +++ b/board/renesas/salvator-x/salvator-x.c @@ -79,15 +79,15 @@ int board_fit_config_name_match(const char *name) u32 cpu_type = renesas_get_cpu_type(); if ((cpu_type == RENESAS_CPU_TYPE_R8A7795) && - !strcmp(name, "r8a77950-salvator-x-u-boot")) + !strcmp(name, "r8a77951-salvator-x")) return 0; if ((cpu_type == RENESAS_CPU_TYPE_R8A7796) && - !strcmp(name, "r8a77960-salvator-x-u-boot")) + !strcmp(name, "r8a77960-salvator-x")) return 0; if ((cpu_type == RENESAS_CPU_TYPE_R8A77965) && - !strcmp(name, "r8a77965-salvator-x-u-boot")) + !strcmp(name, "r8a77965-salvator-x")) return 0; return -1; diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c index 8f5de216995..64f01b123cb 100644 --- a/board/renesas/ulcb/ulcb.c +++ b/board/renesas/ulcb/ulcb.c @@ -70,15 +70,15 @@ int board_fit_config_name_match(const char *name) u32 cpu_type = renesas_get_cpu_type(); if ((cpu_type == RENESAS_CPU_TYPE_R8A7795) && - !strcmp(name, "r8a77950-ulcb-u-boot")) + !strcmp(name, "r8a77951-ulcb")) return 0; if ((cpu_type == RENESAS_CPU_TYPE_R8A7796) && - !strcmp(name, "r8a77960-ulcb-u-boot")) + !strcmp(name, "r8a77960-ulcb")) return 0; if ((cpu_type == RENESAS_CPU_TYPE_R8A77965) && - !strcmp(name, "r8a77965-ulcb-u-boot")) + !strcmp(name, "r8a77965-ulcb")) return 0; return -1; diff --git a/board/rockchip/evb_rk3308/MAINTAINERS b/board/rockchip/evb_rk3308/MAINTAINERS index fe2c5f004c3..abffbb1eb0a 100644 --- a/board/rockchip/evb_rk3308/MAINTAINERS +++ b/board/rockchip/evb_rk3308/MAINTAINERS @@ -4,10 +4,11 @@ S: Maintained F: board/rockchip/evb_rk3308 F: include/configs/evb_rk3308.h F: configs/evb-rk3308_defconfig +F: arch/arm/dts/rk3308-evb* ROCK-PI-S M: Akash Gajjar <gajjar04akash@gmail.com> +R: Jonas Karlman <jonas@kwiboo.se> S: Maintained F: configs/rock-pi-s-rk3308_defconfig -F: arch/arm/dts/rk3308-rock-pi-s.dts -F: arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi +F: arch/arm/dts/rk3308-rock-pi-s* diff --git a/board/rockchip/evb_rk3588/Makefile b/board/rockchip/evb_rk3588/Makefile deleted file mode 100644 index 240d2ec597e..00000000000 --- a/board/rockchip/evb_rk3588/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2023 Rockchip Electronics Co,. Ltd. -# - -obj-y += evb-rk3588.o diff --git a/board/rockchip/evb_rk3588/evb-rk3588.c b/board/rockchip/evb_rk3588/evb-rk3588.c deleted file mode 100644 index caf94d8d29c..00000000000 --- a/board/rockchip/evb_rk3588/evb-rk3588.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2023 Rockchip Electronics Co,. Ltd. - */ - -#include <fdtdec.h> -#include <fdt_support.h> - -#ifdef CONFIG_OF_BOARD_SETUP -static int rk3588_add_reserved_memory_fdt_nodes(void *new_blob) -{ - struct fdt_memory gap1 = { - .start = 0x3fc000000, - .end = 0x3fc4fffff, - }; - struct fdt_memory gap2 = { - .start = 0x3fff00000, - .end = 0x3ffffffff, - }; - unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP; - unsigned int ret; - - /* - * Inject the reserved-memory nodes into the DTS - */ - ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0, - NULL, flags); - if (ret) - return ret; - - return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0, - NULL, flags); -} - -int ft_board_setup(void *blob, struct bd_info *bd) -{ - return rk3588_add_reserved_memory_fdt_nodes(blob); -} -#endif diff --git a/board/rockchip/toybrick_rk3588/Makefile b/board/rockchip/toybrick_rk3588/Makefile deleted file mode 100644 index 75d4d9438f7..00000000000 --- a/board/rockchip/toybrick_rk3588/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2024 Rockchip Electronics Co,. Ltd. -# - -obj-y += toybrick-rk3588.o diff --git a/board/rockchip/toybrick_rk3588/toybrick-rk3588.c b/board/rockchip/toybrick_rk3588/toybrick-rk3588.c deleted file mode 100644 index e3217f70b50..00000000000 --- a/board/rockchip/toybrick_rk3588/toybrick-rk3588.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2024 Rockchip Electronics Co,. Ltd. - */ - -#include <fdtdec.h> -#include <fdt_support.h> - -#ifdef CONFIG_OF_BOARD_SETUP -static int rk3588_add_reserved_memory_fdt_nodes(void *new_blob) -{ - struct fdt_memory gap1 = { - .start = 0x3fc000000, - .end = 0x3fc4fffff, - }; - struct fdt_memory gap2 = { - .start = 0x3fff00000, - .end = 0x3ffffffff, - }; - unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP; - int ret; - - /* - * Inject the reserved-memory nodes into the DTS - */ - ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0, - NULL, flags); - if (ret) - return ret; - - return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0, - NULL, flags); -} - -int ft_board_setup(void *blob, struct bd_info *bd) -{ - return rk3588_add_reserved_memory_fdt_nodes(blob); -} -#endif diff --git a/board/schneider/hmibsc/MAINTAINERS b/board/schneider/hmibsc/MAINTAINERS new file mode 100644 index 00000000000..0f31bbda966 --- /dev/null +++ b/board/schneider/hmibsc/MAINTAINERS @@ -0,0 +1,6 @@ +HMIBSC BOARD +M: Sumit Garg <sumit.garg@linaro.org> +S: Maintained +F: board/schneider/hmibsc/ +F: include/configs/hmibsc.h +F: configs/hmibsc_defconfig diff --git a/board/schneider/hmibsc/hmibsc.env b/board/schneider/hmibsc/hmibsc.env new file mode 100644 index 00000000000..da3d892f91d --- /dev/null +++ b/board/schneider/hmibsc/hmibsc.env @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +loadaddr=0x90000000 +bootcmd= + echo "Booting RAUC A/B system"; + setenv devtype mmc; setenv devnum 0; + test -n "${BOOT_ORDER}" || setenv BOOT_ORDER "A B"; + test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3; + test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3; + setenv raucslot; + for BOOT_SLOT in "${BOOT_ORDER}"; do + if test "x${raucslot}" != "x"; then + echo "skip remaining slots..."; + elif test "x${BOOT_SLOT}" = "xA"; then + if test ${BOOT_A_LEFT} -gt 0; then + setexpr BOOT_A_LEFT ${BOOT_A_LEFT} - 1; + echo "Found valid RAUC slot A"; + setenv raucslot "rauc.slot=A"; + setenv raucpart A; setenv distro_bootpart 6; + fi; + elif test "x${BOOT_SLOT}" = "xB"; then + if test ${BOOT_B_LEFT} -gt 0; then + setexpr BOOT_B_LEFT ${BOOT_B_LEFT} - 1; + echo "Found valid RAUC slot B"; + setenv raucslot "rauc.slot=B"; + setenv raucpart B; setenv distro_bootpart 7; + fi; + fi; + done; + if test -n "${raucslot}"; then + setenv bootargs console=ttyMSM1 root=PARTLABEL=rootfs_${raucpart} rw rootwait ${raucslot}; + saveenv; + else + echo "No valid RAUC slot found. Resetting tries to 3"; + setenv BOOT_A_LEFT 3; + setenv BOOT_B_LEFT 3; + saveenv; + reset; + fi; + load ${devtype} ${devnum}:${distro_bootpart} ${loadaddr} /boot/fitImage && bootm; diff --git a/board/siemens/capricorn/board.c b/board/siemens/capricorn/board.c index 0d66a75bbfa..b1d7e3b1c05 100644 --- a/board/siemens/capricorn/board.c +++ b/board/siemens/capricorn/board.c @@ -156,14 +156,14 @@ int setup_gpr_fec(void) * 0: internal clock * 1: external clock ---> your choice for RMII * - * CLKDIV_SEL: it controls a div by 2 on the internal clock path à - * it should be don’t care when using external clock + * CLKDIV_SEL: it controls a div by 2 on the internal clock path a + * it should be don't care when using external clock * 0: non-divided clock * 1: clock divided by 2 * 50_DISABLE or 125_DISABLE: - * it’s used to disable the clock tree going outside the chip + * it's used to disable the clock tree going outside the chip * when reference clock is generated internally. - * It should be don’t care when reference clock is provided + * It should be don't care when reference clock is provided * externally. * 0: clock is enabled * 1: clock is disabled diff --git a/board/st/common/cmd_stboard.c b/board/st/common/cmd_stboard.c index cb103e69b36..c8c0bad5da1 100644 --- a/board/st/common/cmd_stboard.c +++ b/board/st/common/cmd_stboard.c @@ -9,7 +9,7 @@ * - "Commercial Product Name" (CPN): type of product board (DKX, EVX) * associated to the board ID "MBxxxx" * - "Finished Good" or "Finish Good" (FG): - * effective content of the product without chip STM32MP1xx (LCD, Wifi,…) + * effective content of the product without chip STM32MP1xx (LCD, Wifi,...) * - BOM: cost variant for same FG (for example, several provider of the same * component) * diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index a17c314daeb..db15d78237e 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -8,6 +8,7 @@ #include <common.h> #include <adc.h> #include <bootm.h> +#include <button.h> #include <clk.h> #include <config.h> #include <dm.h> @@ -38,6 +39,7 @@ #include <asm/gpio.h> #include <asm/arch/stm32.h> #include <asm/arch/sys_proto.h> +#include <dm/device-internal.h> #include <dm/ofnode.h> #include <jffs2/load_kernel.h> #include <linux/bitops.h> @@ -52,12 +54,10 @@ /* SYSCFG registers */ #define SYSCFG_BOOTR 0x00 -#define SYSCFG_PMCSETR 0x04 #define SYSCFG_IOCTRLSETR 0x18 #define SYSCFG_ICNR 0x1C #define SYSCFG_CMPCR 0x20 #define SYSCFG_CMPENSETR 0x24 -#define SYSCFG_PMCCLRR 0x44 #define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0) #define SYSCFG_BOOTR_BOOTPD_SHIFT 4 @@ -73,16 +73,6 @@ #define SYSCFG_CMPENSETR_MPU_EN BIT(0) -#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16) -#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17) - -#define SYSCFG_PMCSETR_ETH_SELMII BIT(20) - -#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21) -#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0 -#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21) -#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23) - #define USB_LOW_THRESHOLD_UV 200000 #define USB_WARNING_LOW_THRESHOLD_UV 660000 #define USB_START_LOW_THRESHOLD_UV 1230000 @@ -150,45 +140,55 @@ int checkboard(void) static void board_key_check(void) { - ofnode node; - struct gpio_desc gpio; + struct udevice *button1 = NULL, *button2 = NULL; enum forced_boot_mode boot_mode = BOOT_NORMAL; + int ret; + + if (!IS_ENABLED(CONFIG_BUTTON)) + return; if (!IS_ENABLED(CONFIG_FASTBOOT) && !IS_ENABLED(CONFIG_CMD_STM32PROG)) return; - node = ofnode_path("/config"); - if (!ofnode_valid(node)) { - log_debug("no /config node?\n"); + if (IS_ENABLED(CONFIG_CMD_STM32PROG)) + button_get_by_label("User-1", &button1); + + if (IS_ENABLED(CONFIG_FASTBOOT)) + button_get_by_label("User-2", &button2); + + if (!button1 && !button2) return; - } - if (IS_ENABLED(CONFIG_FASTBOOT)) { - if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0, - &gpio, GPIOD_IS_IN)) { - log_debug("could not find a /config/st,fastboot-gpios\n"); - } else { - udelay(20); - if (dm_gpio_get_value(&gpio)) { - log_notice("Fastboot key pressed, "); - boot_mode = BOOT_FASTBOOT; - } - dm_gpio_free(NULL, &gpio); + if (button2) { + if (button_get_state(button2) == BUTTON_ON) { + log_notice("Fastboot key pressed, "); + boot_mode = BOOT_FASTBOOT; } + /* + * On some boards, same gpio is shared betwwen gpio-keys and + * leds, remove the button device to free the gpio for led + * usage + */ + ret = device_remove(button2, DM_REMOVE_NORMAL); + if (ret) + log_err("Can't remove button2 (%d)\n", ret); } - if (IS_ENABLED(CONFIG_CMD_STM32PROG)) { - if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0, - &gpio, GPIOD_IS_IN)) { - log_debug("could not find a /config/st,stm32prog-gpios\n"); - } else { - udelay(20); - if (dm_gpio_get_value(&gpio)) { - log_notice("STM32Programmer key pressed, "); - boot_mode = BOOT_STM32PROG; - } - dm_gpio_free(NULL, &gpio); + + if (button1) { + if (button_get_state(button1) == BUTTON_ON) { + log_notice("STM32Programmer key pressed, "); + boot_mode = BOOT_STM32PROG; } + /* + * On some boards, same gpio is shared betwwen gpio-keys and + * leds, remove the button device to free the gpio for led + * usage + */ + ret = device_remove(button1, DM_REMOVE_NORMAL); + if (ret) + log_err("Can't remove button1 (%d)\n", ret); } + if (boot_mode != BOOT_NORMAL) { log_notice("entering download mode...\n"); clrsetbits_le32(TAMP_BOOT_CONTEXT, @@ -742,76 +742,6 @@ void board_quiesce_devices(void) setup_led(LEDST_OFF); } -/* eth init function : weak called in eqos driver */ -int board_interface_eth_init(struct udevice *dev, - phy_interface_t interface_type) -{ - u8 *syscfg; - u32 value; - bool eth_clk_sel_reg = false; - bool eth_ref_clk_sel_reg = false; - - /* Gigabit Ethernet 125MHz clock selection. */ - eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel"); - - /* Ethernet 50Mhz RMII clock selection */ - eth_ref_clk_sel_reg = - dev_read_bool(dev, "st,eth-ref-clk-sel"); - - syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG); - - if (!syscfg) - return -ENODEV; - - switch (interface_type) { - case PHY_INTERFACE_MODE_MII: - value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII | - SYSCFG_PMCSETR_ETH_REF_CLK_SEL; - log_debug("PHY_INTERFACE_MODE_MII\n"); - break; - case PHY_INTERFACE_MODE_GMII: - if (eth_clk_sel_reg) - value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII | - SYSCFG_PMCSETR_ETH_CLK_SEL; - else - value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII; - log_debug("PHY_INTERFACE_MODE_GMII\n"); - break; - case PHY_INTERFACE_MODE_RMII: - if (eth_ref_clk_sel_reg) - value = SYSCFG_PMCSETR_ETH_SEL_RMII | - SYSCFG_PMCSETR_ETH_REF_CLK_SEL; - else - value = SYSCFG_PMCSETR_ETH_SEL_RMII; - log_debug("PHY_INTERFACE_MODE_RMII\n"); - break; - case PHY_INTERFACE_MODE_RGMII: - case PHY_INTERFACE_MODE_RGMII_ID: - case PHY_INTERFACE_MODE_RGMII_RXID: - case PHY_INTERFACE_MODE_RGMII_TXID: - if (eth_clk_sel_reg) - value = SYSCFG_PMCSETR_ETH_SEL_RGMII | - SYSCFG_PMCSETR_ETH_CLK_SEL; - else - value = SYSCFG_PMCSETR_ETH_SEL_RGMII; - log_debug("PHY_INTERFACE_MODE_RGMII\n"); - break; - default: - log_debug("Do not manage %d interface\n", - interface_type); - /* Do not manage others interfaces */ - return -EINVAL; - } - - /* clear and set ETH configuration bits */ - writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII | - SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL, - syscfg + SYSCFG_PMCCLRR); - writel(value, syscfg + SYSCFG_PMCSETR); - - return 0; -} - enum env_location env_get_location(enum env_operation op, int prio) { u32 bootmode = get_bootmode(); diff --git a/board/starfive/visionfive2/visionfive2-i2c-eeprom.c b/board/starfive/visionfive2/visionfive2-i2c-eeprom.c index ddef7d61235..5095a0e9fdb 100644 --- a/board/starfive/visionfive2/visionfive2-i2c-eeprom.c +++ b/board/starfive/visionfive2/visionfive2-i2c-eeprom.c @@ -503,7 +503,7 @@ int mac_read_from_eeprom(void) * "<product>-<date>-<DDR&eMMC>-<serial_number>" * <date>: 4Byte, should be the output of `date +%y%W` * <DDR&eMMC>: 8Byte, "D008" means 8GB, "D01T" means 1TB; - * "E000" means no eMMC，"E032" means 32GB, "E01T" means 1TB. + * "E000" means no eMMC, "E032" means 32GB, "E01T" means 1TB. * <serial_number>: 8Byte, the Unique Identifier of board in hex. */ if (!env_get("serial#")) @@ -533,7 +533,7 @@ u8 get_pcb_revision_from_eeprom(void) * get_ddr_size_from_eeprom - get the DDR size * pstr: VF7110A1-2228-D008E000-00000001 * VF7110A1/VF7110B1 : VisionFive JH7110A /VisionFive JH7110B - * D008: 8GB LPDDR4 + * D008: 8GB LPDDR4 * E000: No emmc device, ECxx: include emmc device, xx: Capacity size[GB] * return: the field of 'D008E000' */ diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 8c12c8deade..1313b01dcea 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -186,7 +186,7 @@ enum env_location env_get_location(enum env_operation op, int prio) return ENVL_UNKNOWN; } -/* add board specific code here */ +/* called only from U-Boot proper */ int board_init(void) { __maybe_unused int id_pfr1, ret; @@ -226,13 +226,6 @@ int board_init(void) if (ret) return ret; -#if CONFIG_IS_ENABLED(DM_I2C) - /* - * Temporary workaround for enabling I2C clocks until proper sunxi DM - * clk, reset and pinctrl drivers land. - */ - i2c_init_board(); -#endif eth_init_board(); return 0; diff --git a/board/theobroma-systems/ringneck_px30/ringneck-px30.c b/board/theobroma-systems/ringneck_px30/ringneck-px30.c index bfebfe5136d..c48de7345f7 100644 --- a/board/theobroma-systems/ringneck_px30/ringneck-px30.c +++ b/board/theobroma-systems/ringneck_px30/ringneck-px30.c @@ -58,9 +58,9 @@ void spl_board_init(void) mdelay(1); - ret = gpio_direction_output(STM32_RST, 1); + ret = gpio_direction_input(STM32_RST); if (ret) { - debug("Failed to configure STM32_RST as output high\n"); + debug("Failed to configure STM32_RST as input\n"); return; } } diff --git a/board/ti/am65x/am65x.env b/board/ti/am65x/am65x.env index 814374d68cf..631997e4c97 100644 --- a/board/ti/am65x/am65x.env +++ b/board/ti/am65x/am65x.env @@ -27,3 +27,7 @@ get_fdt_ubi=ubifsload ${fdtaddr} ${bootdir}/${name_fdt} args_ubi=setenv bootargs console=${console} ${optargs} rootfstype=ubifs root=ubi0:rootfs rw ubi.mtd=ospi.rootfs +#if CONFIG_TI_ICSSG_PRUETH +storage_interface=mmc +fw_dev_part=1:2 +#endif diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c index 3109c9a2aca..07073a5940b 100644 --- a/board/ti/am65x/evm.c +++ b/board/ti/am65x/evm.c @@ -91,10 +91,13 @@ int dram_init_banksize(void) #ifdef CONFIG_SPL_LOAD_FIT int board_fit_config_name_match(const char *name) { -#ifdef CONFIG_TARGET_AM654_A53_EVM - if (!strcmp(name, "k3-am654-base-board")) + if (IS_ENABLED(CONFIG_TI_ICSSG_PRUETH) && + strcmp(name, "k3-am654-icssg2") == 0) + return 0; + + if (IS_ENABLED(CONFIG_TARGET_AM654_A53_EVM) && + strcmp(name, "k3-am654-base-board") == 0) return 0; -#endif return -1; } diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c index 9dc3ed6dfff..539eaf47186 100644 --- a/board/ti/j721e/evm.c +++ b/board/ti/j721e/evm.c @@ -465,10 +465,13 @@ void spl_board_init(void) } if (IS_ENABLED(CONFIG_ESM_K3)) { - ret = uclass_get_device_by_driver(UCLASS_MISC, - DM_DRIVER_GET(k3_esm), &dev); + ret = uclass_get_device_by_name(UCLASS_MISC, "esm@700000", &dev); + if (ret) + printf("MISC init for esm@700000 failed: %d\n", ret); + + ret = uclass_get_device_by_name(UCLASS_MISC, "esm@40800000", &dev); if (ret) - printf("ESM init failed: %d\n", ret); + printf("MISC init for esm@40800000 failed: %d\n", ret); } if (IS_ENABLED(CONFIG_ESM_PMIC)) { diff --git a/board/turing/turing-rk1-rk3588/Makefile b/board/turing/turing-rk1-rk3588/Makefile deleted file mode 100644 index a979d8023aa..00000000000 --- a/board/turing/turing-rk1-rk3588/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2023 Rockchip Electronics Co,. Ltd. -# - -obj-y += turing-rk1-rk3588.o diff --git a/board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c b/board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c deleted file mode 100644 index e2338a2a35a..00000000000 --- a/board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2023 Rockchip Electronics Co,. Ltd. - */ - -#include <fdtdec.h> -#include <fdt_support.h> - -#ifdef CONFIG_OF_BOARD_SETUP -int turing_rk1_add_reserved_memory_fdt_nodes(void *new_blob) -{ - struct fdt_memory gap1 = { - .start = 0x3fc000000, - .end = 0x3fc4fffff, - }; - struct fdt_memory gap2 = { - .start = 0x3fff00000, - .end = 0x3ffffffff, - }; - unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP; - unsigned int ret; - - /* - * Inject the reserved-memory nodes into the DTS - */ - ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0, - NULL, flags); - if (ret) - return ret; - - return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0, - NULL, flags); -} - -int ft_board_setup(void *blob, struct bd_info *bd) -{ - return turing_rk1_add_reserved_memory_fdt_nodes(blob); -} -#endif diff --git a/board/variscite/imx93_var_som/spl.c b/board/variscite/imx93_var_som/spl.c index 71f346cf77b..8852aea156b 100644 --- a/board/variscite/imx93_var_som/spl.c +++ b/board/variscite/imx93_var_som/spl.c @@ -125,8 +125,8 @@ void board_init_f(ulong dummy) if (ret) { printf("Fail to init ELE API\n"); } else { - printf("SOC: 0x%x\n", gd->arch.soc_rev); - printf("LC: 0x%x\n", gd->arch.lifecycle); + debug("SOC: 0x%x\n", gd->arch.soc_rev); + debug("LC: 0x%x\n", gd->arch.lifecycle); } power_init_board(); diff --git a/boot/Kconfig b/boot/Kconfig index 777e408e243..6f3096c15a6 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -2,6 +2,39 @@ menu "Boot options" menu "Boot images" +config ANDROID_BOOT_IMAGE + bool "Android Boot Images" + default y if FASTBOOT + help + This enables support for booting images which use the Android + image format header. + +config TIMESTAMP + bool "Show image date and time when displaying image information" + default y if CMD_DATE + help + When CONFIG_TIMESTAMP is selected, the timestamp (date and time) of + an image is printed by image commands like bootm or iminfo. This + is shown as 'Timestamp: xxx' and 'Created: xxx'. If this option is + enabled, then U-Boot requires FITs to have a timestamp. If a FIT is + loaded that does not, the message 'Wrong FIT format: no timestamp' + is shown. + +config BUTTON_CMD + bool "Support for running a command if a button is held during boot" + depends on CMDLINE + depends on BUTTON + help + For many embedded devices it's useful to enter a special flashing mode + such as fastboot mode when a button is held during boot. This option + allows arbitrary commands to be assigned to specific buttons. These will + be run after "preboot" if the button is held. Configuration is done via + the environment variables "button_cmd_N_name" and "button_cmd_N" where n is + the button number (starting from 0). e.g: + + "button_cmd_0_name=vol_down" + "button_cmd_0=fastboot usb 0" + menuconfig FIT bool "Flattened Image Tree (FIT)" select HASH @@ -688,100 +721,6 @@ config BOOTMETH_SCRIPT endif # BOOTSTD -config BOOTM - bool "Support booting an application image from memory" - default y - help - This is the main boot implementation in U-Boot, supporting a wide - variety of features including FIT and legacy-image boot, kernel and - FDT selection, setting up of the command line for the OS and many - other features. - - This option should normally be enabled. It is used to implement the - 'bootm' command. - -config BOOTM_LINUX - bool "Support booting Linux OS images" - depends on BOOTM || CMD_BOOTZ || CMD_BOOTI - default y - help - Support booting the Linux kernel directly via a command such as bootm - or booti or bootz. - -config BOOTM_NETBSD - bool "Support booting NetBSD (non-EFI) loader images" - depends on BOOTM - default y - help - Support booting NetBSD via the bootm command. - -config BOOTM_OPENRTOS - bool "Support booting OPENRTOS / FreeRTOS images" - depends on BOOTM - help - Support booting OPENRTOS / FreeRTOS via the bootm command. - -config BOOTM_OSE - bool "Support booting Enea OSE images" - depends on (ARM && (ARM64 || CPU_V7A || CPU_V7R) || SANDBOX || PPC || X86) - depends on BOOTM - help - Support booting Enea OSE images via the bootm command. - -config BOOTM_PLAN9 - bool "Support booting Plan9 OS images" - depends on BOOTM - default y - help - Support booting Plan9 images via the bootm command. - -config BOOTM_RTEMS - bool "Support booting RTEMS OS images" - depends on BOOTM - default y - help - Support booting RTEMS images via the bootm command. - -config BOOTM_VXWORKS - bool "Support booting VxWorks OS images" - depends on BOOTM - default y - help - Support booting VxWorks images via the bootm command. - -config ANDROID_BOOT_IMAGE - bool "Android Boot Images" - default y if FASTBOOT - help - This enables support for booting images which use the Android - image format header. - -config TIMESTAMP - bool "Show image date and time when displaying image information" - default y if CMD_DATE - help - When CONFIG_TIMESTAMP is selected, the timestamp (date and time) of - an image is printed by image commands like bootm or iminfo. This - is shown as 'Timestamp: xxx' and 'Created: xxx'. If this option is - enabled, then U-Boot requires FITs to have a timestamp. If a FIT is - loaded that does not, the message 'Wrong FIT format: no timestamp' - is shown. - -config BUTTON_CMD - bool "Support for running a command if a button is held during boot" - depends on CMDLINE - depends on BUTTON - help - For many embedded devices it's useful to enter a special flashing mode - such as fastboot mode when a button is held during boot. This option - allows arbitrary commands to be assigned to specific buttons. These will - be run after "preboot" if the button is held. Configuration is done via - the environment variables "button_cmd_N_name" and "button_cmd_N" where n is - the button number (starting from 0). e.g: - - "button_cmd_0_name=vol_down" - "button_cmd_0=fastboot usb 0" - config LEGACY_IMAGE_FORMAT bool "Enable support for the legacy image format" default y if !FIT_SIGNATURE && !TI_SECURE_DEVICE @@ -816,7 +755,6 @@ if MEASURED_BOOT config MEASURE_IGNORE_LOG bool "Ignore the existing event log" - default n help On platforms that use an event log memory region that persists through system resets and are the first stage bootloader, then @@ -826,7 +764,7 @@ endif # MEASURED_BOOT config SYS_BOOTM_LEN hex "Maximum size of a decompresed OS image" - depends on BOOTM || CMD_BOOTI || CMD_BOOTZ || \ + depends on CMD_BOOTM || CMD_BOOTI || CMD_BOOTZ || \ LEGACY_IMAGE_FORMAT || SPL_LEGACY_IMAGE_FORMAT default 0x4000000 if PPC || ARM64 default 0x1000000 if X86 || ARCH_MX6 || ARCH_MX7 diff --git a/boot/Makefile b/boot/Makefile index bf767fd5356..84ccfeaecec 100644 --- a/boot/Makefile +++ b/boot/Makefile @@ -6,7 +6,7 @@ ifndef CONFIG_SPL_BUILD obj-$(CONFIG_BOOT_RETRY) += bootretry.o -obj-$(CONFIG_BOOTM) += bootm.o bootm_os.o +obj-$(CONFIG_CMD_BOOTM) += bootm.o bootm_os.o obj-$(CONFIG_CMD_BOOTZ) += bootm.o bootm_os.o obj-$(CONFIG_CMD_BOOTI) += bootm.o bootm_os.o diff --git a/boot/fdt_simplefb.c b/boot/fdt_simplefb.c index 069ced75a7f..837920bd3a3 100644 --- a/boot/fdt_simplefb.c +++ b/boot/fdt_simplefb.c @@ -12,6 +12,8 @@ #include <asm/global_data.h> #include <linux/libfdt.h> #include <video.h> +#include <spl.h> +#include <bloblist.h> DECLARE_GLOBAL_DATA_PTR; @@ -26,15 +28,29 @@ static int fdt_simplefb_configure_node(void *blob, int off) struct udevice *dev; int ret; - ret = uclass_first_device_err(UCLASS_VIDEO, &dev); - if (ret) - return ret; - uc_priv = dev_get_uclass_priv(dev); - plat = dev_get_uclass_plat(dev); - xsize = uc_priv->xsize; - ysize = uc_priv->ysize; - bpix = uc_priv->bpix; - fb_base = plat->base; + if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && spl_phase() > PHASE_SPL) { + struct video_handoff *ho; + + ho = bloblist_find(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho)); + if (!ho) + return log_msg_ret("Missing video bloblist", -ENOENT); + + xsize = ho->xsize; + ysize = ho->ysize; + bpix = ho->bpix; + fb_base = ho->fb; + } else { + ret = uclass_first_device_err(UCLASS_VIDEO, &dev); + if (ret) + return ret; + uc_priv = dev_get_uclass_priv(dev); + plat = dev_get_uclass_plat(dev); + xsize = uc_priv->xsize; + ysize = uc_priv->ysize; + bpix = uc_priv->bpix; + fb_base = plat->base; + } + switch (bpix) { case 4: /* VIDEO_BPP16 */ name = "r5g6b5"; @@ -91,7 +107,6 @@ static int fdt_simplefb_enable_existing_node(void *blob) #if IS_ENABLED(CONFIG_VIDEO) int fdt_simplefb_enable_and_mem_rsv(void *blob) { - struct fdt_memory mem; int ret; /* nothing to do when video is not active */ @@ -102,15 +117,6 @@ int fdt_simplefb_enable_and_mem_rsv(void *blob) if (ret) return ret; - /* nothing to do when the frame buffer is not defined */ - if (gd->video_bottom == gd->video_top) - return 0; - - /* reserved with no-map tag the video buffer */ - mem.start = gd->video_bottom; - mem.end = gd->video_top - 1; - - return fdtdec_add_reserved_memory(blob, "framebuffer", &mem, NULL, 0, NULL, - FDTDEC_RESERVED_MEMORY_NO_MAP); + return fdt_add_fb_mem_rsv(blob); } #endif diff --git a/boot/fdt_support.c b/boot/fdt_support.c index 9844c70be80..2bd80a9dfb1 100644 --- a/boot/fdt_support.c +++ b/boot/fdt_support.c @@ -23,6 +23,9 @@ #include <exports.h> #include <fdtdec.h> #include <version.h> +#include <video.h> + +DECLARE_GLOBAL_DATA_PTR; /** * fdt_getprop_u32_default_node - Return a node's property or a default @@ -2043,6 +2046,24 @@ int fdt_setup_simplefb_node(void *fdt, int node, u64 base_address, u32 width, return 0; } +#if CONFIG_IS_ENABLED(VIDEO) +int fdt_add_fb_mem_rsv(void *blob) +{ + struct fdt_memory mem; + + /* nothing to do when the frame buffer is not defined */ + if (gd->video_bottom == gd->video_top) + return 0; + + /* reserved with no-map tag the video buffer */ + mem.start = gd->video_bottom; + mem.end = gd->video_top - 1; + + return fdtdec_add_reserved_memory(blob, "framebuffer", &mem, NULL, 0, NULL, + FDTDEC_RESERVED_MEMORY_NO_MAP); +} +#endif + /* * Update native-mode in display-timings from display environment variable. * The node to update are specified by path. diff --git a/boot/image-fdt.c b/boot/image-fdt.c index 2b92bdaff16..f09716cba30 100644 --- a/boot/image-fdt.c +++ b/boot/image-fdt.c @@ -158,13 +158,10 @@ void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob) */ int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, ulong *of_size) { + u64 start, size, usable, addr, low, mapsize; void *fdt_blob = *of_flat_tree; void *of_start = NULL; - phys_addr_t start, size, usable; char *fdt_high; - phys_addr_t addr; - phys_addr_t low; - phys_size_t mapsize; ulong of_len = 0; int bank; int err; diff --git a/boot/pxe_utils.c b/boot/pxe_utils.c index d5e1bead125..96205626750 100644 --- a/boot/pxe_utils.c +++ b/boot/pxe_utils.c @@ -5,7 +5,6 @@ */ #include <common.h> -#include <bootm.h> #include <command.h> #include <dm.h> #include <env.h> @@ -471,220 +470,6 @@ skip_overlay: #endif /** - * calc_fdt_fname() - Figure out the filename to use for the FDT - * - * Determine the path to the FDT filename, based on the "fdtfile" environment - * variable. Use <soc>-<board>.dtb as a fallback - * - * @fdtdir: Directory to use for the FDT file - * Return: allocated filename (including directory), or NULL if out of memory - */ -static char *calc_fdt_fname(const char *fdtdir) -{ - char *fdtfile; - char *f1, *f2, *f3, *f4, *slash; - int len; - - f1 = env_get("fdtfile"); - if (f1) { - f2 = ""; - f3 = ""; - f4 = ""; - } else { - /* - * For complex cases where this code doesn't generate the - * correct filename, the board code should set $fdtfile during - * early boot, or the boot scripts should set $fdtfile before - * invoking "pxe" or "sysboot". - */ - f1 = env_get("soc"); - f2 = "-"; - f3 = env_get("board"); - f4 = ".dtb"; - if (!f1) { - f1 = ""; - f2 = ""; - } - if (!f3) { - f2 = ""; - f3 = ""; - } - } - - len = strlen(fdtdir); - if (!len) - slash = "./"; - else if (fdtdir[len - 1] != '/') - slash = "/"; - else - slash = ""; - - len = strlen(fdtdir) + strlen(slash) + strlen(f1) + strlen(f2) + - strlen(f3) + strlen(f4) + 1; - fdtfile = malloc(len); - if (!fdtfile) { - printf("malloc fail (FDT filename)\n"); - return NULL; - } - - snprintf(fdtfile, len, "%s%s%s%s%s%s", fdtdir, slash, f1, f2, f3, f4); - - return fdtfile; -} - -/** - * label_run_boot() - Run the correct boot procedure - * - * fdt usage is optional: - * It handles the following scenarios. - * - * Scenario 1: If fdt_addr_r specified and "fdt" or "fdtdir" label is - * defined in pxe file, retrieve fdt blob from server. Pass fdt_addr_r to - * bootm, and adjust argc appropriately. - * - * If retrieve fails and no exact fdt blob is specified in pxe file with - * "fdt" label, try Scenario 2. - * - * Scenario 2: If there is an fdt_addr specified, pass it along to - * bootm, and adjust argc appropriately. - * - * Scenario 3: If there is an fdtcontroladdr specified, pass it along to - * bootm, and adjust argc appropriately, unless the image type is fitImage. - * - * Scenario 4: fdt blob is not available. - * - * @ctx: PXE context - * @label: Label to process - * @kernel_addr: string containing the kernel address / config - * @initrd_str: string containing the initrd address / size - * @initrd_addr_str: initrd address, or NULL if none - * @initrd_filesize: initrd size in bytes; only valid if initrd_addr_str is not - * NULL - * Returns does not return on success, otherwise returns 0 if a localboot - * label was processed, or 1 on error - */ -static int label_run_boot(struct pxe_context *ctx, struct pxe_label *label, - char *kernel_addr, char *initrd_str, - char *initrd_addr_str, char *initrd_filesize) -{ - struct bootm_info bmi; - const char *fdt_addr; - ulong kernel_addr_r; - void *buf; - int ret; - - if (IS_ENABLED(CONFIG_BOOTM)) - bootm_init(&bmi); - - fdt_addr = env_get("fdt_addr_r"); - - /* For FIT, the label can be identical to kernel one */ - if (label->fdt && !strcmp(label->kernel_label, label->fdt)) { - fdt_addr = kernel_addr; - /* if fdt label is defined then get fdt from server */ - } else if (fdt_addr) { - char *fdtfile = NULL; - char *fdtfilefree = NULL; - - if (label->fdt) { - if (IS_ENABLED(CONFIG_SUPPORT_PASSING_ATAGS)) { - if (strcmp("-", label->fdt)) - fdtfile = label->fdt; - } else { - fdtfile = label->fdt; - } - } else if (label->fdtdir) { - fdtfilefree = calc_fdt_fname(label->fdtdir); - if (!fdtfilefree) - return -ENOMEM; - fdtfile = fdtfilefree; - } - - if (fdtfile) { - int err = get_relfile_envaddr(ctx, fdtfile, - "fdt_addr_r", NULL); - - free(fdtfilefree); - if (err < 0) { - fdt_addr = NULL; - - if (label->fdt) { - printf("Skipping %s for failure retrieving FDT\n", - label->name); - return -ENOENT; - } - - if (label->fdtdir) { - printf("Skipping fdtdir %s for failure retrieving dts\n", - label->fdtdir); - } - } - - if (label->kaslrseed) - label_boot_kaslrseed(); - -#ifdef CONFIG_OF_LIBFDT_OVERLAY - if (label->fdtoverlays) - label_boot_fdtoverlay(ctx, label); -#endif - } else { - fdt_addr = NULL; - } - } - - bmi.addr_img = kernel_addr; - - if (initrd_addr_str) - bmi.conf_ramdisk = initrd_str; - - if (!fdt_addr) { - if (IS_ENABLED(CONFIG_SUPPORT_PASSING_ATAGS)) { - if (strcmp("-", label->fdt)) - fdt_addr = env_get("fdt_addr"); - } else { - fdt_addr = env_get("fdt_addr"); - } - } - - kernel_addr_r = genimg_get_kernel_addr(kernel_addr); - buf = map_sysmem(kernel_addr_r, 0); - - if (!fdt_addr && genimg_get_format(buf) != IMAGE_FORMAT_FIT) { - if (IS_ENABLED(CONFIG_SUPPORT_PASSING_ATAGS)) { - if (strcmp("-", label->fdt)) - fdt_addr = env_get("fdtcontroladdr"); - } else { - fdt_addr = env_get("fdtcontroladdr"); - } - } - - bmi.conf_fdt = fdt_addr; - - /* Try bootm for legacy and FIT format image */ - if (genimg_get_format(buf) != IMAGE_FORMAT_INVALID && - IS_ENABLED(CONFIG_BOOTM)) - ret = bootm_run(&bmi); - /* Try booting an AArch64 Linux kernel image */ - else if (IS_ENABLED(CONFIG_BOOTM)) - ret = booti_run(&bmi); - /* Try booting a Image */ - else if (IS_ENABLED(CONFIG_BOOTM)) - ret = bootz_run(&bmi); - /* Try booting an x86_64 Linux kernel image */ - else if (IS_ENABLED(CONFIG_ZBOOT)) - ret = zboot_run(hextoul(kernel_addr, NULL), 0, - initrd_addr_str ? - hextoul(initrd_addr_str, NULL) : 0, - initrd_addr_str ? - hextoul(initrd_filesize, NULL) : 0, - 0, NULL); - - unmap_sysmem(buf); - - return 0; -} - -/** * label_boot() - Boot according to the contents of a pxe_label * * If we can't boot for any reason, we return. A successful boot never @@ -706,6 +491,8 @@ static int label_run_boot(struct pxe_context *ctx, struct pxe_label *label, */ static int label_boot(struct pxe_context *ctx, struct pxe_label *label) { + char *bootm_argv[] = { "bootm", NULL, NULL, NULL, NULL }; + char *zboot_argv[] = { "zboot", NULL, "0", NULL, NULL }; char *kernel_addr = NULL; char *initrd_addr_str = NULL; char initrd_filesize[10]; @@ -713,7 +500,11 @@ static int label_boot(struct pxe_context *ctx, struct pxe_label *label) char mac_str[29] = ""; char ip_str[68] = ""; char *fit_addr = NULL; - int ret; + int bootm_argc = 2; + int zboot_argc = 3; + int len = 0; + ulong kernel_addr_r; + void *buf; label_print(label); @@ -754,10 +545,9 @@ static int label_boot(struct pxe_context *ctx, struct pxe_label *label) /* For FIT, the label can be identical to kernel one */ if (label->initrd && !strcmp(label->kernel_label, label->initrd)) { - initrd_addr_str = kernel_addr; + initrd_addr_str = kernel_addr; } else if (label->initrd) { ulong size; - if (get_relfile_envaddr(ctx, label->initrd, "ramdisk_addr_r", &size) < 0) { printf("Skipping %s for failure retrieving initrd\n", @@ -803,7 +593,7 @@ static int label_boot(struct pxe_context *ctx, struct pxe_label *label) } if (label->append) - strlcpy(bootargs, label->append, sizeof(bootargs)); + strncpy(bootargs, label->append, sizeof(bootargs)); strcat(bootargs, ip_str); strcat(bootargs, mac_str); @@ -814,8 +604,180 @@ static int label_boot(struct pxe_context *ctx, struct pxe_label *label) printf("append: %s\n", finalbootargs); } - ret = label_run_boot(ctx, label, kernel_addr, initrd_str, - initrd_addr_str, initrd_filesize); + /* + * fdt usage is optional: + * It handles the following scenarios. + * + * Scenario 1: If fdt_addr_r specified and "fdt" or "fdtdir" label is + * defined in pxe file, retrieve fdt blob from server. Pass fdt_addr_r to + * bootm, and adjust argc appropriately. + * + * If retrieve fails and no exact fdt blob is specified in pxe file with + * "fdt" label, try Scenario 2. + * + * Scenario 2: If there is an fdt_addr specified, pass it along to + * bootm, and adjust argc appropriately. + * + * Scenario 3: If there is an fdtcontroladdr specified, pass it along to + * bootm, and adjust argc appropriately, unless the image type is fitImage. + * + * Scenario 4: fdt blob is not available. + */ + bootm_argv[3] = env_get("fdt_addr_r"); + + /* For FIT, the label can be identical to kernel one */ + if (label->fdt && !strcmp(label->kernel_label, label->fdt)) { + bootm_argv[3] = kernel_addr; + /* if fdt label is defined then get fdt from server */ + } else if (bootm_argv[3]) { + char *fdtfile = NULL; + char *fdtfilefree = NULL; + + if (label->fdt) { + if (IS_ENABLED(CONFIG_SUPPORT_PASSING_ATAGS)) { + if (strcmp("-", label->fdt)) + fdtfile = label->fdt; + } else { + fdtfile = label->fdt; + } + } else if (label->fdtdir) { + char *f1, *f2, *f3, *f4, *slash; + + f1 = env_get("fdtfile"); + if (f1) { + f2 = ""; + f3 = ""; + f4 = ""; + } else { + /* + * For complex cases where this code doesn't + * generate the correct filename, the board + * code should set $fdtfile during early boot, + * or the boot scripts should set $fdtfile + * before invoking "pxe" or "sysboot". + */ + f1 = env_get("soc"); + f2 = "-"; + f3 = env_get("board"); + f4 = ".dtb"; + if (!f1) { + f1 = ""; + f2 = ""; + } + if (!f3) { + f2 = ""; + f3 = ""; + } + } + + len = strlen(label->fdtdir); + if (!len) + slash = "./"; + else if (label->fdtdir[len - 1] != '/') + slash = "/"; + else + slash = ""; + + len = strlen(label->fdtdir) + strlen(slash) + + strlen(f1) + strlen(f2) + strlen(f3) + + strlen(f4) + 1; + fdtfilefree = malloc(len); + if (!fdtfilefree) { + printf("malloc fail (FDT filename)\n"); + goto cleanup; + } + + snprintf(fdtfilefree, len, "%s%s%s%s%s%s", + label->fdtdir, slash, f1, f2, f3, f4); + fdtfile = fdtfilefree; + } + + if (fdtfile) { + int err = get_relfile_envaddr(ctx, fdtfile, + "fdt_addr_r", NULL); + + free(fdtfilefree); + if (err < 0) { + bootm_argv[3] = NULL; + + if (label->fdt) { + printf("Skipping %s for failure retrieving FDT\n", + label->name); + goto cleanup; + } + + if (label->fdtdir) { + printf("Skipping fdtdir %s for failure retrieving dts\n", + label->fdtdir); + } + } + + if (label->kaslrseed) + label_boot_kaslrseed(); + +#ifdef CONFIG_OF_LIBFDT_OVERLAY + if (label->fdtoverlays) + label_boot_fdtoverlay(ctx, label); +#endif + } else { + bootm_argv[3] = NULL; + } + } + + bootm_argv[1] = kernel_addr; + zboot_argv[1] = kernel_addr; + + if (initrd_addr_str) { + bootm_argv[2] = initrd_str; + bootm_argc = 3; + + zboot_argv[3] = initrd_addr_str; + zboot_argv[4] = initrd_filesize; + zboot_argc = 5; + } + + if (!bootm_argv[3]) { + if (IS_ENABLED(CONFIG_SUPPORT_PASSING_ATAGS)) { + if (strcmp("-", label->fdt)) + bootm_argv[3] = env_get("fdt_addr"); + } else { + bootm_argv[3] = env_get("fdt_addr"); + } + } + + kernel_addr_r = genimg_get_kernel_addr(kernel_addr); + buf = map_sysmem(kernel_addr_r, 0); + + if (!bootm_argv[3] && genimg_get_format(buf) != IMAGE_FORMAT_FIT) { + if (IS_ENABLED(CONFIG_SUPPORT_PASSING_ATAGS)) { + if (strcmp("-", label->fdt)) + bootm_argv[3] = env_get("fdtcontroladdr"); + } else { + bootm_argv[3] = env_get("fdtcontroladdr"); + } + } + + if (bootm_argv[3]) { + if (!bootm_argv[2]) + bootm_argv[2] = "-"; + bootm_argc = 4; + } + + /* Try bootm for legacy and FIT format image */ + if (genimg_get_format(buf) != IMAGE_FORMAT_INVALID && + IS_ENABLED(CONFIG_CMD_BOOTM)) + do_bootm(ctx->cmdtp, 0, bootm_argc, bootm_argv); + /* Try booting an AArch64 Linux kernel image */ + else if (IS_ENABLED(CONFIG_CMD_BOOTI)) + do_booti(ctx->cmdtp, 0, bootm_argc, bootm_argv); + /* Try booting a Image */ + else if (IS_ENABLED(CONFIG_CMD_BOOTZ)) + do_bootz(ctx->cmdtp, 0, bootm_argc, bootm_argv); + /* Try booting an x86_64 Linux kernel image */ + else if (IS_ENABLED(CONFIG_CMD_ZBOOT)) + do_zboot_parent(ctx->cmdtp, 0, zboot_argc, zboot_argv, NULL); + + unmap_sysmem(buf); cleanup: free(fit_addr); diff --git a/cmd/Kconfig b/cmd/Kconfig index 8eeb99eea5e..b026439c773 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -262,7 +262,6 @@ config CMD_BOOTD config CMD_BOOTM bool "bootm" - depends on BOOTM default y help Boot an application image from the memory. @@ -334,6 +333,48 @@ config CMD_BOOTI help Boot an AArch64 Linux Kernel image from memory. +config BOOTM_LINUX + bool "Support booting Linux OS images" + depends on CMD_BOOTM || CMD_BOOTZ || CMD_BOOTI + default y + help + Support booting the Linux kernel directly via a command such as bootm + or booti or bootz. + +config BOOTM_NETBSD + bool "Support booting NetBSD (non-EFI) loader images" + depends on CMD_BOOTM + default y + help + Support booting NetBSD via the bootm command. + +config BOOTM_OPENRTOS + bool "Support booting OPENRTOS / FreeRTOS images" + depends on CMD_BOOTM + help + Support booting OPENRTOS / FreeRTOS via the bootm command. + +config BOOTM_OSE + bool "Support booting Enea OSE images" + depends on (ARM && (ARM64 || CPU_V7A || CPU_V7R) || SANDBOX || PPC || X86) + depends on CMD_BOOTM + help + Support booting Enea OSE images via the bootm command. + +config BOOTM_PLAN9 + bool "Support booting Plan9 OS images" + depends on CMD_BOOTM + default y + help + Support booting Plan9 images via the bootm command. + +config BOOTM_RTEMS + bool "Support booting RTEMS OS images" + depends on CMD_BOOTM + default y + help + Support booting RTEMS images via the bootm command. + config CMD_SEAMA bool "Support read SEAMA NAND images" depends on MTD_RAW_NAND @@ -350,6 +391,13 @@ config CMD_VBE is used to boot. Updating the parameters is not currently supported. +config BOOTM_VXWORKS + bool "Support booting VxWorks OS images" + depends on CMD_BOOTM + default y + help + Support booting VxWorks images via the bootm command. + config CMD_BOOTEFI bool "bootefi" depends on EFI_LOADER @@ -398,7 +446,7 @@ config CMD_BOOTEFI_HELLO for testing that EFI is working at a basic level, and for bringing up EFI support on a new architecture. -source lib/efi_selftest/Kconfig +source "lib/efi_selftest/Kconfig" endif config CMD_BOOTMENU @@ -444,7 +492,6 @@ config CMD_ELF config CMD_ELF_FDT_SETUP bool "Flattened Device Tree setup in bootelf cmd" - default n depends on CMD_ELF select LIB_LIBFDT select LMB @@ -694,7 +741,8 @@ config CMD_BINOP config CMD_BLOBLIST bool "bloblist" - default y if BLOBLIST + depends on BLOBLIST + default y help Show information about the bloblist, a collection of binary blobs held in memory that persist between SPL and U-Boot. In the case of @@ -1348,7 +1396,9 @@ config CMD_CLONE config CMD_OPTEE_RPMB bool "Enable read/write support on RPMB via OPTEE" - depends on SUPPORT_EMMC_RPMB && OPTEE + depends on (SUPPORT_EMMC_RPMB && OPTEE) || SANDBOX_TEE + default y if SANDBOX_TEE + select OPTEE_TA_AVB if SANDBOX_TEE help Enable the commands for reading, writing persistent named values in the Replay Protection Memory Block partition in eMMC by @@ -2573,7 +2623,6 @@ config CMD_CROS_EC config CMD_SCMI bool "Enable scmi command" depends on SCMI_FIRMWARE - default n help This command provides user interfaces to several SCMI (System Control and Management Interface) protocols available on Arm diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c index 8234e602b8f..0ba92c60e03 100644 --- a/cmd/eficonfig.c +++ b/cmd/eficonfig.c @@ -1419,7 +1419,7 @@ static efi_status_t eficonfig_edit_boot_option(u16 *varname, struct eficonfig_bo } bo->initrd_info.current_path = calloc(1, EFICONFIG_FILE_PATH_BUF_SIZE); - if (!bo->file_info.current_path) { + if (!bo->initrd_info.current_path) { ret = EFI_OUT_OF_RESOURCES; goto out; } diff --git a/cmd/fastboot.c b/cmd/fastboot.c index 792e83d372c..c3c19231c98 100644 --- a/cmd/fastboot.c +++ b/cmd/fastboot.c @@ -159,7 +159,7 @@ NXTARG: return CMD_RET_USAGE; } - fastboot_init(buf_addr, buf_size); + fastboot_init((void *)buf_addr, buf_size); if (!strcmp(argv[1], "udp")) return do_fastboot_udp(argc, argv, buf_addr, buf_size); diff --git a/cmd/optee_rpmb.c b/cmd/optee_rpmb.c index e0e44bbed04..b3cafd92410 100644 --- a/cmd/optee_rpmb.c +++ b/cmd/optee_rpmb.c @@ -87,8 +87,10 @@ static int read_persistent_value(const char *name, rc = tee_shm_alloc(tee, name_size, TEE_SHM_ALLOC, &shm_name); - if (rc) - return -ENOMEM; + if (rc) { + rc = -ENOMEM; + goto close_session; + } rc = tee_shm_alloc(tee, buffer_size, TEE_SHM_ALLOC, &shm_buf); @@ -125,6 +127,9 @@ out: tee_shm_free(shm_buf); free_name: tee_shm_free(shm_name); +close_session: + tee_close_session(tee, session); + tee = NULL; return rc; } @@ -139,17 +144,20 @@ static int write_persistent_value(const char *name, struct tee_param param[2]; size_t name_size = strlen(name) + 1; + if (!value_size) + return -EINVAL; + if (!tee) { if (avb_ta_open_session()) return -ENODEV; } - if (!value_size) - return -EINVAL; rc = tee_shm_alloc(tee, name_size, TEE_SHM_ALLOC, &shm_name); - if (rc) - return -ENOMEM; + if (rc) { + rc = -ENOMEM; + goto close_session; + } rc = tee_shm_alloc(tee, value_size, TEE_SHM_ALLOC, &shm_buf); @@ -178,6 +186,9 @@ out: tee_shm_free(shm_buf); free_name: tee_shm_free(shm_name); +close_session: + tee_close_session(tee, session); + tee = NULL; return rc; } diff --git a/common/Kconfig b/common/Kconfig index 0283701f1d0..5e3070e9253 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -231,7 +231,7 @@ config PRE_CON_BUF_ADDR default 0x2f000000 if ARCH_SUNXI && MACH_SUN9I default 0x4f000000 if ARCH_SUNXI && !MACH_SUN9I default 0x0f000000 if ROCKCHIP_RK3288 - default 0x0f200000 if ROCKCHIP_RK3399 + default 0x0f200000 if ROCKCHIP_RK3399 || ROCKCHIP_RK3328 help This sets the start address of the pre-console buffer. This must be in available memory and is accessed before relocation and diff --git a/configs/CMPC885_defconfig b/configs/CMPC885_defconfig index bbe8d5be7ed..11c24f72a82 100644 --- a/configs/CMPC885_defconfig +++ b/configs/CMPC885_defconfig @@ -50,6 +50,7 @@ CONFIG_CMD_ASKENV=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MTD=y CONFIG_CMD_NAND=y +CONFIG_CMD_TEMPERATURE=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_MII_INIT=y @@ -107,6 +108,8 @@ CONFIG_DM_SERIAL=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_MPC8XX_SPI=y +CONFIG_DM_THERMAL=y +CONFIG_TI_LM74_THERMAL=y CONFIG_WDT=y CONFIG_WDT_MPC8xxx_BME=y # CONFIG_REGEX is not set diff --git a/configs/CMPCPRO_defconfig b/configs/CMPCPRO_defconfig index cefed63f246..f8f5c9fd869 100644 --- a/configs/CMPCPRO_defconfig +++ b/configs/CMPCPRO_defconfig @@ -134,6 +134,7 @@ CONFIG_CMD_ASKENV=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MTD=y CONFIG_CMD_NAND=y +CONFIG_CMD_TEMPERATURE=y CONFIG_CMD_DHCP=y CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y @@ -197,6 +198,8 @@ CONFIG_DM_SPI=y CONFIG_MPC8XXX_SPI=y CONFIG_SYSRESET=y CONFIG_SYSRESET_MPC83XX=y +CONFIG_DM_THERMAL=y +CONFIG_TI_LM74_THERMAL=y CONFIG_WDT=y CONFIG_WDT_MPC8xxx=y # CONFIG_REGEX is not set diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig index 8a88fb445c7..f2eac2c5449 100644 --- a/configs/MCR3000_defconfig +++ b/configs/MCR3000_defconfig @@ -2,6 +2,7 @@ CONFIG_PPC=y CONFIG_TEXT_BASE=0x4000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 +CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="mcr3000" CONFIG_SYS_MONITOR_LEN=327680 CONFIG_SYS_CLK_FREQ=132000000 @@ -46,6 +47,7 @@ CONFIG_CMD_ASKENV=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MTD=y CONFIG_CMD_NAND=y +CONFIG_CMD_TEMPERATURE=y # CONFIG_CMD_ECHO is not set # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SOURCE is not set @@ -91,6 +93,7 @@ CONFIG_SYS_OR6_PRELIM=0xFFFF0908 CONFIG_SYS_BR7_PRELIM_BOOL=y CONFIG_SYS_BR7_PRELIM=0x1C000001 CONFIG_SYS_OR7_PRELIM=0xFFFF810A +CONFIG_MPC8XX_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_DM_MTD=y @@ -102,6 +105,11 @@ CONFIG_SYS_MAX_FLASH_SECT=35 CONFIG_MTD_RAW_NAND=y CONFIG_MPC8XX_FEC=y CONFIG_DM_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_MPC8XX_SPI=y +CONFIG_DM_THERMAL=y +CONFIG_TI_LM74_THERMAL=y CONFIG_WDT=y CONFIG_WDT_MPC8xxx_BME=y CONFIG_LZMA=y diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig index 977daf9f090..c4625bf132d 100644 --- a/configs/SBx81LIFKW_defconfig +++ b/configs/SBx81LIFKW_defconfig @@ -6,7 +6,6 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/alliedtelesis/SBx81LIFKW/kwbimage.cfg" CONFIG_TEXT_BASE=0x00600000 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 -# CONFIG_OF_UPSTREAM is not set CONFIG_TARGET_SBx81LIFKW=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 @@ -36,6 +35,7 @@ CONFIG_CMD_SNTP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)" CONFIG_DOS_PARTITION=y CONFIG_OF_CONTROL=y +# CONFIG_OF_UPSTREAM is not set CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=20000000 diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig index 9bc86140302..01e50af94d6 100644 --- a/configs/SBx81LIFXCAT_defconfig +++ b/configs/SBx81LIFXCAT_defconfig @@ -6,7 +6,6 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/alliedtelesis/SBx81LIFXCAT/kwbimage.cfg" CONFIG_TEXT_BASE=0x00600000 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 -# CONFIG_OF_UPSTREAM is not set CONFIG_TARGET_SBx81LIFXCAT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 @@ -37,6 +36,7 @@ CONFIG_CMD_SNTP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)" CONFIG_DOS_PARTITION=y CONFIG_OF_CONTROL=y +# CONFIG_OF_UPSTREAM is not set CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=20000000 diff --git a/configs/ae350_rv32_falcon_defconfig b/configs/ae350_rv32_falcon_defconfig index 9050e325e6c..a8f3c00066e 100644 --- a/configs/ae350_rv32_falcon_defconfig +++ b/configs/ae350_rv32_falcon_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_SYS_MONITOR_LEN=786432 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000 +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_TARGET_ANDES_AE350=y @@ -25,7 +26,6 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 -CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_CACHE=y CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x01700000 diff --git a/configs/ae350_rv32_falcon_xip_defconfig b/configs/ae350_rv32_falcon_xip_defconfig index bebdef57c9b..0f9a7b0f4c9 100644 --- a/configs/ae350_rv32_falcon_xip_defconfig +++ b/configs/ae350_rv32_falcon_xip_defconfig @@ -9,6 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SYS_MONITOR_LEN=786432 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000 +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_TARGET_ANDES_AE350=y @@ -26,7 +27,6 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 -CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_CACHE=y CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x01700000 diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index 321025b7452..76711b96400 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_SYS_MONITOR_LEN=786432 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000 +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_TARGET_ANDES_AE350=y @@ -25,7 +26,6 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x100000 -CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_CACHE=y CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0 diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index 0ca40a520f3..39db36c3f6c 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -9,6 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SYS_MONITOR_LEN=786432 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000 +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_TARGET_ANDES_AE350=y @@ -26,7 +27,6 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x100000 -CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_CACHE=y CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0 diff --git a/configs/ae350_rv64_falcon_defconfig b/configs/ae350_rv64_falcon_defconfig index 423fa7ba6e8..1cd978e4229 100644 --- a/configs/ae350_rv64_falcon_defconfig +++ b/configs/ae350_rv64_falcon_defconfig @@ -7,6 +7,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000 +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_TARGET_ANDES_AE350=y @@ -25,7 +26,6 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 -CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_CACHE=y CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x01700000 diff --git a/configs/ae350_rv64_falcon_xip_defconfig b/configs/ae350_rv64_falcon_xip_defconfig index 6ddb81b5648..7a1f880e059 100644 --- a/configs/ae350_rv64_falcon_xip_defconfig +++ b/configs/ae350_rv64_falcon_xip_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000 +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_TARGET_ANDES_AE350=y @@ -26,7 +27,6 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 -CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_CACHE=y CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x01700000 diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index e274f8975c2..c70413c8ba7 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -7,6 +7,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000 +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_TARGET_ANDES_AE350=y @@ -25,7 +26,6 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x100000 -CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_CACHE=y CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0 diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index 0f7fb71f22b..279923cb832 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000 +CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_TARGET_ANDES_AE350=y @@ -26,7 +27,6 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x100000 -CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_CACHE=y CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0 diff --git a/configs/alt_defconfig b/configs/alt_defconfig index e4007ab8f71..c9ca22cbe8f 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -16,7 +16,7 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7794-alt-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7794-alt" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RENESAS_BOARD_STRING="Alt" CONFIG_R8A7794=y diff --git a/configs/am62ax_evm_a53_defconfig b/configs/am62ax_evm_a53_defconfig index 41ffcfdcd5e..c4556f5dd2e 100644 --- a/configs/am62ax_evm_a53_defconfig +++ b/configs/am62ax_evm_a53_defconfig @@ -15,6 +15,10 @@ CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set @@ -25,11 +29,7 @@ CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_PAD_TO=0x0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80a00000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" diff --git a/configs/am62ax_evm_r5_defconfig b/configs/am62ax_evm_r5_defconfig index 8dd8f0823eb..44ccb6baa90 100644 --- a/configs/am62ax_evm_r5_defconfig +++ b/configs/am62ax_evm_r5_defconfig @@ -17,6 +17,10 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x7145 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x43c3b000 +CONFIG_SPL_BSS_MAX_SIZE=0x3000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_SIZE_LIMIT=0x3A7F0 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500 CONFIG_SPL_FS_FAT=y @@ -28,12 +32,8 @@ CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x3B000 CONFIG_SPL_PAD_TO=0x0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x43c3b000 -CONFIG_SPL_BSS_MAX_SIZE=0x3000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/am62px_evm_a53_defconfig b/configs/am62px_evm_a53_defconfig index 638d2e90a6b..9f40c9a0b3c 100644 --- a/configs/am62px_evm_a53_defconfig +++ b/configs/am62px_evm_a53_defconfig @@ -114,6 +114,8 @@ CONFIG_FS_LOADER=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_SPL_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_SPL_MMC_UHS_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y CONFIG_SPL_MMC_HS400_SUPPORT=y CONFIG_MMC_SDHCI=y diff --git a/configs/am62px_evm_r5_defconfig b/configs/am62px_evm_r5_defconfig index 25505167f01..b365c7ea902 100644 --- a/configs/am62px_evm_r5_defconfig +++ b/configs/am62px_evm_r5_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_ARCH_K3=y -CONFIG_TI_SECURE_DEVICE=y CONFIG_SYS_MALLOC_F_LEN=0x9000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -20,6 +19,11 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x43c4b000 +CONFIG_SPL_BSS_MAX_SIZE=0x3000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 CONFIG_SPL_SIZE_LIMIT=0x3C000 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x5000 CONFIG_SPL_FS_FAT=y @@ -33,24 +37,14 @@ CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x3B000 CONFIG_SPL_PAD_TO=0x0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x43c4b000 -CONFIG_SPL_BSS_MAX_SIZE=0x3000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 CONFIG_SPL_SEPARATE_BSS=y -CONFIG_SYS_SPL_MALLOC=y -CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y -CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000 -CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 CONFIG_SPL_EARLY_BSS=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 CONFIG_SPL_DMA=y CONFIG_SPL_DM_MAILBOX=y -CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_DOMAIN=y diff --git a/configs/am62x_beagleplay_a53_defconfig b/configs/am62x_beagleplay_a53_defconfig index 147967d3c11..4f1be1df593 100644 --- a/configs/am62x_beagleplay_a53_defconfig +++ b/configs/am62x_beagleplay_a53_defconfig @@ -17,6 +17,10 @@ CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80c80000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_SIZE_LIMIT=0x40000 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x800 CONFIG_SPL_FS_FAT=y @@ -34,12 +38,8 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_BOOTCOMMAND="run set_led_state_start_load; run envboot; bootflow scan -lb;run set_led_state_fail_load" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x58000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80c80000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" @@ -91,9 +91,9 @@ CONFIG_SPL_MMC_SDHCI_ADMA=y CONFIG_MMC_SDHCI_AM654=y CONFIG_PHY_REALTEK=y CONFIG_PHY_TI=y +CONFIG_DM_ETH_PHY=y CONFIG_TI_AM65_CPSW_NUSS=y CONFIG_PHY=y -CONFIG_DM_ETH_PHY=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y diff --git a/configs/am62x_beagleplay_r5_defconfig b/configs/am62x_beagleplay_r5_defconfig index 9413c859870..d0cc4f5b405 100644 --- a/configs/am62x_beagleplay_r5_defconfig +++ b/configs/am62x_beagleplay_r5_defconfig @@ -20,6 +20,10 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x43c3b000 +CONFIG_SPL_BSS_MAX_SIZE=0x3000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_SIZE_LIMIT=0x3A7F0 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500 CONFIG_SPL_FS_FAT=y @@ -32,13 +36,9 @@ CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x3B000 CONFIG_SPL_PAD_TO=0x0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x43c3b000 -CONFIG_SPL_BSS_MAX_SIZE=0x3000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index 6b37f8b4791..6c708dcb052 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -52,8 +52,8 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_MMC=y -CONFIG_MMC_SPEED_MODE_SET=y CONFIG_CMD_EFIDEBUG=y +CONFIG_MMC_SPEED_MODE_SET=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_MULTI_DTB_FIT=y diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig index 3e4d3a76628..4b2e57b13a0 100644 --- a/configs/am62x_evm_r5_defconfig +++ b/configs/am62x_evm_r5_defconfig @@ -22,6 +22,10 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x43c3b000 +CONFIG_SPL_BSS_MAX_SIZE=0x3000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_SIZE_LIMIT=0x3A7F0 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500 CONFIG_SPL_FS_FAT=y @@ -35,12 +39,8 @@ CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x3B000 CONFIG_SPL_PAD_TO=0x0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x43c3b000 -CONFIG_SPL_BSS_MAX_SIZE=0x3000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig index 4a3780ce660..96475d4c1b8 100644 --- a/configs/am64x_evm_r5_defconfig +++ b/configs/am64x_evm_r5_defconfig @@ -22,6 +22,11 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x7019b800 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x400000 CONFIG_SPL_SIZE_LIMIT=0x190000 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 CONFIG_SPL_FS_FAT=y @@ -36,14 +41,9 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x180000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x7019b800 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x400000 CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 3afa80f45a8..ee79adef699 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -22,6 +22,10 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_STACK_R=y CONFIG_ENV_OFFSET_REDUND=0x6A0000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y @@ -37,11 +41,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run boot_rprocs; if test ${boot_fit} -eq 1; then run get_fit_${boot}; run get_overlaystring; run run_fit; else; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern; fi;" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0x58000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80a00000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y @@ -68,6 +68,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_REMOTEPROC=y +CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY=y CONFIG_CMD_USB=y CONFIG_CMD_TIME=y CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0" @@ -129,6 +130,7 @@ CONFIG_PHY_FIXED=y CONFIG_E1000=y CONFIG_CMD_E1000=y CONFIG_TI_AM65_CPSW_NUSS=y +CONFIG_TI_ICSSG_PRUETH=y CONFIG_PCI_KEYSTONE=y CONFIG_PHY=y CONFIG_SPL_PHY=y diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index d6e85db0869..4fc9c39711c 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -21,6 +21,10 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41c7effc +CONFIG_SPL_BSS_MAX_SIZE=0xc00 +CONFIG_SPL_STACK_R=y CONFIG_SPL_SIZE_LIMIT=0x7ec00 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x2000 CONFIG_SPL_FS_FAT=y @@ -35,11 +39,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x58000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x41c7effc -CONFIG_SPL_BSS_MAX_SIZE=0xc00 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig index 09f0c6af8c3..953487ccfbf 100644 --- a/configs/am65x_evm_r5_usbdfu_defconfig +++ b/configs/am65x_evm_r5_usbdfu_defconfig @@ -19,6 +19,10 @@ CONFIG_DM_RESET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41c7effc +CONFIG_SPL_BSS_MAX_SIZE=0xc00 +CONFIG_SPL_STACK_R=y CONFIG_SPL_SIZE_LIMIT=0x7ec00 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x2000 CONFIG_SPL_LIBDISK_SUPPORT=y @@ -31,11 +35,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x58000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x41c7effc -CONFIG_SPL_BSS_MAX_SIZE=0xc00 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig index 4d95ab6f83d..01517619272 100644 --- a/configs/am65x_evm_r5_usbmsc_defconfig +++ b/configs/am65x_evm_r5_usbmsc_defconfig @@ -19,6 +19,10 @@ CONFIG_DM_RESET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41c7effc +CONFIG_SPL_BSS_MAX_SIZE=0xc00 +CONFIG_SPL_STACK_R=y CONFIG_SPL_SIZE_LIMIT=0x7ec00 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x2000 CONFIG_SPL_FS_FAT=y @@ -31,11 +35,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x58000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x41c7effc -CONFIG_SPL_BSS_MAX_SIZE=0xc00 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/anbernic-rgxx3-rk3566_defconfig b/configs/anbernic-rgxx3-rk3566_defconfig index c8c9238f96f..fcade9172b7 100644 --- a/configs/anbernic-rgxx3-rk3566_defconfig +++ b/configs/anbernic-rgxx3-rk3566_defconfig @@ -3,12 +3,9 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SPL_GPIO=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3566-anbernic-rgxx3" CONFIG_ROCKCHIP_RK3568=y -CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON=y -CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_TARGET_ANBERNIC_RGXX3_RK3566=y CONFIG_DEBUG_UART_BASE=0xFE660000 @@ -70,8 +67,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y # CONFIG_RAM_ROCKCHIP_DEBUG is not set -CONFIG_DM_RNG=y -CONFIG_RNG_ROCKCHIP=y # CONFIG_RNG_SMCCC_TRNG is not set CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/apple_m1_defconfig b/configs/apple_m1_defconfig index e00d72e8beb..20d2cff93f7 100644 --- a/configs/apple_m1_defconfig +++ b/configs/apple_m1_defconfig @@ -3,13 +3,16 @@ CONFIG_ARCH_APPLE=y CONFIG_DEFAULT_DEVICE_TREE="t8103-j274" CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_SYS_BOOTM_LEN=0x800000 +CONFIG_BOOTCOMMAND="bootflow scan -b" CONFIG_USE_PREBOOT=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y +CONFIG_CMD_SELECT_FONT=y # CONFIG_NET is not set +CONFIG_SYS_64BIT_LBA=y CONFIG_APPLE_SPI_KEYB=y # CONFIG_MMC is not set CONFIG_NVME_APPLE=y @@ -18,6 +21,7 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_PCI=y CONFIG_USB_DWC3=y CONFIG_USB_KEYBOARD=y +CONFIG_VIDEO_FONT_16X32=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_NO_FB_CLEAR=y CONFIG_VIDEO_SIMPLE=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index 1a892a9bc18..8588f8c5adf 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -21,6 +21,9 @@ CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" CONFIG_SPL_STACK=0x304000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3e00 +CONFIG_SPL_BSS_MAX_SIZE=0x600 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=18432000 @@ -39,9 +42,6 @@ CONFIG_SYS_PBSIZE=281 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x3e00 CONFIG_SPL_PAD_TO=0x20000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x3e00 -CONFIG_SPL_BSS_MAX_SIZE=0x600 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index 494c018a0e5..4bade848e6f 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -12,6 +12,10 @@ CONFIG_DEFAULT_DEVICE_TREE="bitmain-antminer-s9" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SYS_BOOTCOUNT_ADDR=0xEFFFFF0 CONFIG_SPL_STACK=0xfffffe00 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x100000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 +CONFIG_SPL_STACK_R=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xe0001000 CONFIG_SYS_LOAD_ADDR=0x0 @@ -30,11 +34,7 @@ CONFIG_SYS_PBSIZE=2075 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x100000 -CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x2000000 CONFIG_HUSH_PARSER=y diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig index af7622a88af..a2823a614a5 100644 --- a/configs/blanche_defconfig +++ b/configs/blanche_defconfig @@ -12,7 +12,7 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7792-blanche-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7792-blanche" CONFIG_ARCH_RENESAS_BOARD_STRING="Blanche" CONFIG_R8A7792=y CONFIG_TARGET_BLANCHE=y diff --git a/configs/bpi-r2-pro-rk3568_defconfig b/configs/bpi-r2-pro-rk3568_defconfig index 5cc95241ba4..a0caa367f9d 100644 --- a/configs/bpi-r2-pro-rk3568_defconfig +++ b/configs/bpi-r2-pro-rk3568_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-bpi-r2-pro" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y @@ -15,7 +14,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y -CONFIG_BOOTSTD_FULL=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-bpi-r2-pro.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig index 47f51e0e6b1..24dfdae11e3 100644 --- a/configs/cgtqmx8_defconfig +++ b/configs/cgtqmx8_defconfig @@ -17,6 +17,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x13e000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x128000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x80280000 CONFIG_REMAKE_ELF=y @@ -33,9 +36,6 @@ CONFIG_SYS_PBSIZE=276 CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x128000 -CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_BINMAN_UBOOT_SYMBOLS is not set CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index c4136477c26..e5d805d7da7 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -17,6 +17,8 @@ CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_CHROMEBIT_MICKEY=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_STACK=0xff718000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -36,8 +38,6 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index d0321948697..55d44700d6e 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -17,6 +17,11 @@ CONFIG_ROCKCHIP_BOOT_MODE_REG=0 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 # CONFIG_SPL_MMC is not set CONFIG_SPL_STACK=0xff8effff +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xff8e0000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_DEBUG_UART_BASE=0xff1a0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -32,14 +37,9 @@ CONFIG_BLOBLIST_ADDR=0x100000 CONFIG_BLOBLIST_SIZE=0x1000 CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xff8e0000 -CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_HANDOFF=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index 4b80d6a8051..9bc59539dc8 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -16,6 +16,8 @@ CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC is not set CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_STACK=0xff718000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -35,8 +37,6 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig index 120c11c0497..48ee8b9fd25 100644 --- a/configs/chromebook_kevin_defconfig +++ b/configs/chromebook_kevin_defconfig @@ -18,6 +18,11 @@ CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 # CONFIG_SPL_MMC is not set CONFIG_TARGET_CHROMEBOOK_KEVIN=y CONFIG_SPL_STACK=0xff8effff +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xff8e0000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_DEBUG_UART_BASE=0xff1a0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -33,14 +38,9 @@ CONFIG_BLOBLIST_ADDR=0x100000 CONFIG_BLOBLIST_SIZE=0x1000 CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xff8e0000 -CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_HANDOFF=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 126b8ce41ce..26fa05e543b 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -17,6 +17,8 @@ CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_CHROMEBOOK_MINNIE=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_STACK=0xff718000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -36,8 +38,6 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 2346c83aab4..5deb09b28ec 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -17,6 +17,8 @@ CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_CHROMEBOOK_SPEEDY=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_STACK=0xff718000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -36,8 +38,6 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig index 07c5a26221a..39f33844e46 100644 --- a/configs/ci20_mmc_defconfig +++ b/configs/ci20_mmc_defconfig @@ -12,6 +12,8 @@ CONFIG_SPL_TEXT_BASE=0xf4000a00 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_MMC=y CONFIG_SPL_STACK=0xf4008000 +CONFIG_SPL_BSS_START_ADDR=0xf4004000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_ARCH_JZ47XX=y @@ -28,8 +30,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x2e00 -CONFIG_SPL_BSS_START_ADDR=0xf4004000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set # CONFIG_SPL_BANNER_PRINT is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index 38177a7648a..217617ee868 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -16,6 +16,8 @@ CONFIG_TARGET_CL_SOM_IMX7=y CONFIG_SYS_MONITOR_LEN=409600 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y @@ -29,8 +31,6 @@ CONFIG_BOOTCOMMAND="echo SD boot attempt ...; run sdbootscript; run sdboot; echo CONFIG_SYS_PBSIZE=543 CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0xe000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index db2f2664c8d..9bbc723f9c7 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -14,6 +14,9 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40023000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -28,9 +31,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x40023000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_I2C=y diff --git a/configs/clearfog_sata_defconfig b/configs/clearfog_sata_defconfig index c7e74912612..9ddd5d295fe 100644 --- a/configs/clearfog_sata_defconfig +++ b/configs/clearfog_sata_defconfig @@ -14,6 +14,9 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40023000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -28,9 +31,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x40023000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_I2C=y diff --git a/configs/clearfog_spi_defconfig b/configs/clearfog_spi_defconfig index 8d3dd0195ed..4175fdb17a1 100644 --- a/configs/clearfog_spi_defconfig +++ b/configs/clearfog_spi_defconfig @@ -14,6 +14,9 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40023000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -28,9 +31,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x40023000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_I2C=y diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig index fc10d7f66a6..4a0ff029ac7 100644 --- a/configs/colibri-imx6ull_defconfig +++ b/configs/colibri-imx6ull_defconfig @@ -18,6 +18,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=1 +CONFIG_OF_ENV_SETUP=y CONFIG_BOOTCOMMAND="run ubiboot || run distro_bootcmd;" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile imx6ull-colibri${variant}-${fdt_board}.dtb" diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index 16f923b07c2..47c2ffcc84e 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -19,6 +19,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=1 +CONFIG_OF_ENV_SETUP=y CONFIG_BOOTCOMMAND="run ubiboot ; echo ; echo ubiboot failed ; run distro_bootcmd;" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile ${soc}-colibri-${fdt_board}.dtb " @@ -99,12 +100,12 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_RN5T567=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y -CONFIG_IMX_WATCHDOG=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Toradex" CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 -CONFIG_WDT=y CONFIG_CI_UDC=y +CONFIG_IMX_WATCHDOG=y +CONFIG_WDT=y diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig index 7c6a725ea9a..001f2f92229 100644 --- a/configs/colibri_imx7_emmc_defconfig +++ b/configs/colibri_imx7_emmc_defconfig @@ -85,12 +85,12 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_RN5T567=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y -CONFIG_IMX_WATCHDOG=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Toradex" CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 -CONFIG_WDT=y CONFIG_CI_UDC=y +CONFIG_IMX_WATCHDOG=y +CONFIG_WDT=y diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 0249dc3128b..a5e6bcb64c0 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -17,7 +17,6 @@ CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=520192 -# CONFIG_BOOTM is not set CONFIG_BOOTDELAY=1 CONFIG_FDT_FIXUP_PARTITIONS=y CONFIG_USE_BOOTCOMMAND=y @@ -34,6 +33,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="Colibri VFxx # " # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index 351d3920608..cf7499bb16f 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -17,6 +17,9 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-38x-controlcenterdc" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x40031000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40028000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -36,9 +39,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_LAST_STAGE_INIT=y CONFIG_SPL_MAX_SIZE=0x27fd0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x40028000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/coolpi-4b-rk3588s_defconfig b/configs/coolpi-4b-rk3588s_defconfig index a0fe3708344..2608bb67679 100644 --- a/configs/coolpi-4b-rk3588s_defconfig +++ b/configs/coolpi-4b-rk3588s_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588s-coolpi-4b" @@ -23,7 +22,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-coolpi-4b.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/coolpi-cm5-evb-rk3588_defconfig b/configs/coolpi-cm5-evb-rk3588_defconfig index fc17660da2a..c5bb7a42957 100644 --- a/configs/coolpi-cm5-evb-rk3588_defconfig +++ b/configs/coolpi-cm5-evb-rk3588_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588-coolpi-cm5-evb" @@ -23,7 +22,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-coolpi-cm5-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index 3f057302dd1..65e24b72bec 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -21,6 +21,9 @@ CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-corvus" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3000 +CONFIG_SPL_BSS_MAX_SIZE=0x800 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SYS_LOAD_ADDR=0x70000000 @@ -36,9 +39,6 @@ CONFIG_SYS_PBSIZE=281 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x3000 CONFIG_SPL_PAD_TO=0x20000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x3000 -CONFIG_SPL_BSS_MAX_SIZE=0x800 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 81305759267..1095a761ab8 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -22,6 +22,8 @@ CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x8001ff00 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xc0000000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y @@ -40,8 +42,6 @@ CONFIG_CLOCKS=y CONFIG_HWCONFIG=y CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xc0000000 CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index 330f88183c7..1f22b65302d 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -19,6 +19,8 @@ CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x8001ff00 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xc0000000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y @@ -36,8 +38,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CLOCKS=y CONFIG_HWCONFIG=y CONFIG_SPL_PAD_TO=0x8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xc0000000 CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index f30d878a531..33b8b806652 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -15,6 +15,9 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-375-db" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40020000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -27,9 +30,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1ffd0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x40020000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_I2C=y diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index f67737a95d6..540a348fdcf 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -15,6 +15,9 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-385-db-88f6820-amc" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40023000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=200000000 @@ -29,9 +32,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x40023000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_I2C=y diff --git a/configs/db-88f6820-amc_nand_defconfig b/configs/db-88f6820-amc_nand_defconfig index b6b772ea707..4d4cf36749a 100644 --- a/configs/db-88f6820-amc_nand_defconfig +++ b/configs/db-88f6820-amc_nand_defconfig @@ -17,6 +17,9 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-385-db-88f6820-amc" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40023000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=200000000 @@ -31,9 +34,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x40023000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_I2C=y diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index cc98e35e5cb..4f98ee4f382 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -15,6 +15,9 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40023000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -28,9 +31,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x40023000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_I2C=y diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 5d78b140f8d..d776693b600 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -15,6 +15,9 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp" CONFIG_SPL_TEXT_BASE=0x40004030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40020000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -28,9 +31,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1bfd0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x40020000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_I2C=y diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index c27f061e5b7..4b9b0734c5a 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -19,6 +19,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x13e000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x128000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_IDENT_STRING=" ##v01.06" @@ -41,9 +44,6 @@ CONFIG_SYS_PBSIZE=2073 CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x128000 -CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index db357e12ede..7653fbbe7e5 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -11,13 +11,13 @@ CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_DEVKIT8000=y CONFIG_SYS_MONITOR_LEN=262144 CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 +CONFIG_SPL_BSS_START_ADDR=0x80000500 CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run autoboot" CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0xec00 -CONFIG_SPL_BSS_START_ADDR=0x80000500 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/draco-etamin_defconfig b/configs/draco-etamin_defconfig index 7424e2bfbc0..ba3f381f69f 100644 --- a/configs/draco-etamin_defconfig +++ b/configs/draco-etamin_defconfig @@ -16,6 +16,7 @@ CONFIG_TARGET_ETAMIN=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_SPL_BSS_START_ADDR=0x80000000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xB80000 CONFIG_SPL_FS_FAT=y @@ -33,7 +34,6 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_PBSIZE=1049 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL_BSS_START_ADDR=0x80000000 CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80208000 diff --git a/configs/draco-rastaban_defconfig b/configs/draco-rastaban_defconfig index 6fdf12a92d1..43d29f5b11a 100644 --- a/configs/draco-rastaban_defconfig +++ b/configs/draco-rastaban_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_MPUCLK=300 CONFIG_TARGET_RASTABAN=y CONFIG_SPL_SERIAL=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_SPL_BSS_START_ADDR=0x80000000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x2E0000 CONFIG_SPL_FS_FAT=y @@ -31,7 +32,6 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_PBSIZE=1049 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL_BSS_START_ADDR=0x80000000 CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80208000 diff --git a/configs/draco-thuban_defconfig b/configs/draco-thuban_defconfig index e22d03a9387..b457b22fc64 100644 --- a/configs/draco-thuban_defconfig +++ b/configs/draco-thuban_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_MPUCLK=300 CONFIG_TARGET_THUBAN=y CONFIG_SPL_SERIAL=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_SPL_BSS_START_ADDR=0x80000000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x2E0000 CONFIG_SPL_FS_FAT=y @@ -31,7 +32,6 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_PBSIZE=1049 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL_BSS_START_ADDR=0x80000000 CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80208000 diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig index 260a8349d3b..9ef04fd4554 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig @@ -9,7 +9,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 -CONFIG_DEFAULT_DEVICE_TREE="apq8016-sbc" +CONFIG_DEFAULT_DEVICE_TREE="qcom/apq8016-sbc" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 410C" CONFIG_SYS_LOAD_ADDR=0x80080000 diff --git a/configs/dragonboard820c_defconfig b/configs/dragonboard820c_defconfig index ebc80eb2a46..f6b2cb09ba3 100644 --- a/configs/dragonboard820c_defconfig +++ b/configs/dragonboard820c_defconfig @@ -7,7 +7,7 @@ CONFIG_SYS_MALLOC_LEN=0x804000 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0 CONFIG_ENV_SIZE=0x4000 -CONFIG_DEFAULT_DEVICE_TREE="apq8096-db820c" +CONFIG_DEFAULT_DEVICE_TREE="qcom/apq8096-db820c" CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 820C" CONFIG_SYS_LOAD_ADDR=0x80080000 CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ds116_defconfig b/configs/ds116_defconfig index df641c959ec..1fc73802160 100644 --- a/configs/ds116_defconfig +++ b/configs/ds116_defconfig @@ -20,6 +20,9 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-385-synology-ds116" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40023000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -35,9 +38,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x40023000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_I2C=y diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index 7b367e1872b..ecf9501ba5a 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -19,6 +19,9 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414" CONFIG_SPL_TEXT_BASE=0x40004030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40020000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -34,9 +37,6 @@ CONFIG_BOOTCOMMAND="sf probe; sf read ${loadaddr} 0xd0000 0x2d0000; sf read ${ra CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1bfd0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x40020000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_I2C=y diff --git a/configs/elgin-rv1108_defconfig b/configs/elgin-rv1108_defconfig index 446c9c9b7ac..59b88a851e4 100644 --- a/configs/elgin-rv1108_defconfig +++ b/configs/elgin-rv1108_defconfig @@ -56,7 +56,6 @@ CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_DWC2=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_PRODUCT_NUM=0x110a CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_RANDOM_UUID=y CONFIG_ERRNO_STR=y diff --git a/configs/endeavoru_defconfig b/configs/endeavoru_defconfig index 26622508f01..3230d360eda 100644 --- a/configs/endeavoru_defconfig +++ b/configs/endeavoru_defconfig @@ -1,5 +1,4 @@ CONFIG_ARM=y -CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SUPPORT_PASSING_ATAGS=y CONFIG_CMDLINE_TAG=y @@ -15,12 +14,13 @@ CONFIG_TEGRA30=y CONFIG_TARGET_ENDEAVORU=y CONFIG_CMD_EBTUPDATE=y CONFIG_SYS_LOAD_ADDR=0x82000000 +CONFIG_BUTTON_CMD=y CONFIG_BOOTDELAY=0 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_KEYED_CTRLC=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y -CONFIG_BOOTCOMMAND="if run check_button; then bootmenu; fi; run bootcmd_mmc0; poweroff;" +CONFIG_BOOTCOMMAND="bootflow scan; poweroff" CONFIG_SYS_PBSIZE=2084 CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 314d5d3e5b2..e6a4e4d1b7c 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -20,6 +20,11 @@ CONFIG_DEFAULT_DEVICE_TREE="ast2600-evb" CONFIG_DM_RESET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x83000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x83000000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000000 CONFIG_SPL_SIZE_LIMIT=0x10000 CONFIG_SPL=y # CONFIG_ARMV7_NONSEC is not set @@ -40,12 +45,7 @@ CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x83000000 -CONFIG_SPL_BSS_MAX_SIZE=0x1000000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000000 CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_DM_RESET=y diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index d75329d3851..07c56a45ec0 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -16,9 +16,13 @@ CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_EVB_PX30=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_SPL_STACK=0x400000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_STACK_R=y CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 @@ -34,13 +38,9 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x4000000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set # CONFIG_TPL_BANNER_PRINT is not set diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig index 5f32c926745..ccd38831533 100644 --- a/configs/evb-px5_defconfig +++ b/configs/evb-px5_defconfig @@ -17,6 +17,10 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_TARGET_EVB_PX5=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_SPL_STACK=0x188000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 +CONFIG_SPL_BSS_MAX_SIZE=0x20000 +CONFIG_SPL_STACK_R=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xFF1c0000 CONFIG_DEBUG_UART_CLOCK=24000000 @@ -37,13 +41,9 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-px5-evb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x400000 -CONFIG_SPL_BSS_MAX_SIZE=0x20000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL=y diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig index e21bea9d499..94ee21e344e 100644 --- a/configs/evb-rk3036_defconfig +++ b/configs/evb-rk3036_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_TEXT_BASE=0x10081000 CONFIG_ROCKCHIP_RK3036=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_STACK=0x10081fff +CONFIG_SPL_STACK_R=y CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x60800800 @@ -28,7 +29,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y -CONFIG_SPL_STACK_R=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index d632fd7b5ef..69dd880b38f 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_TEXT_BASE=0x60000000 CONFIG_ROCKCHIP_RK322X=y CONFIG_TARGET_EVB_RK3229=y CONFIG_SPL_STACK_R_ADDR=0x60600000 +CONFIG_SPL_STACK_R=y CONFIG_DEBUG_UART_BASE=0x11030000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x61800800 @@ -30,7 +31,6 @@ CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -CONFIG_SPL_STACK_R=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB_MASS_STORAGE=y diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 31dad12f49d..6407f22470e 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -16,6 +16,8 @@ CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_EVB_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x04000000 CONFIG_SPL_STACK=0xff718000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_SIZE_LIMIT=0x4b000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 @@ -34,8 +36,6 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_OPTEE_IMAGE=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig index d57b2f6b8e5..04a94e13a68 100644 --- a/configs/evb-rk3308_defconfig +++ b/configs/evb-rk3308_defconfig @@ -3,43 +3,35 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb" +CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3308=y -CONFIG_SPL_DRIVERS_MISC=y CONFIG_TARGET_EVB_RK3308=y -CONFIG_DEBUG_UART_BASE=0xFF0C0000 +CONFIG_DEBUG_UART_BASE=0xFF0E0000 CONFIG_DEBUG_UART_CLOCK=24000000 +# CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y -CONFIG_BOOTDELAY=0 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3308-evb.dtb" -CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set -CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 -# CONFIG_CMD_BDI is not set -# CONFIG_CMD_CONSOLE is not set -# CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMI is not set -# CONFIG_CMD_XIMG is not set +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y -# CONFIG_CMD_LOADB is not set -# CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y CONFIG_CMD_USB_MASS_STORAGE=y -# CONFIG_CMD_ITEST is not set -# CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_SLEEP is not set -# CONFIG_SPL_DOS_PARTITION is not set -# CONFIG_ISO_PARTITION is not set -CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 +CONFIG_CMD_RNG=y +CONFIG_CMD_KASLRSEED=y +CONFIG_CMD_REGULATOR=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_REGMAP=y CONFIG_SYSCON=y @@ -50,9 +42,11 @@ CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH_PHY=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y -CONFIG_PHY=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PINCTRL=y CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y @@ -61,15 +55,15 @@ CONFIG_RAM=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSINFO=y CONFIG_SYSRESET=y CONFIG_USB=y +CONFIG_DM_USB_GADGET=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y -CONFIG_USB_DWC2=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_SPL_TINY_MEMSET=y +CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_LZO=y CONFIG_ERRNO_STR=y -# CONFIG_EFI_LOADER is not set diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index 75a0e0f286b..53ad6777ec5 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -57,6 +57,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +# CONFIG_ROCKCHIP_IODOMAIN is not set CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PHY_MOTORCOMM=y diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig index 6e8061f5f48..e71d6705568 100644 --- a/configs/evb-rk3568_defconfig +++ b/configs/evb-rk3568_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y @@ -32,7 +31,7 @@ CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y @@ -49,6 +48,7 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_PHY_REALTEK=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_RK8XX=y diff --git a/configs/evb-rk3588_defconfig b/configs/evb-rk3588_defconfig index c8db04c076e..a8c32c4fcf4 100644 --- a/configs/evb-rk3588_defconfig +++ b/configs/evb-rk3588_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588-evb1-v10" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y @@ -16,7 +15,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-evb1-v10.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -33,7 +31,8 @@ CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -52,7 +51,7 @@ CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y -CONFIG_REGULATOR_PWM=y +CONFIG_SPL_PINCTRL=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig index 1c62149a9b5..25453fba0dc 100644 --- a/configs/evb-rv1108_defconfig +++ b/configs/evb-rv1108_defconfig @@ -49,7 +49,6 @@ CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_DWC2=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_PRODUCT_NUM=0x110a CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_RANDOM_UUID=y CONFIG_ERRNO_STR=y diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig index 4859042d6b5..618f6baf91a 100644 --- a/configs/ficus-rk3399_defconfig +++ b/configs/ficus-rk3399_defconfig @@ -13,6 +13,11 @@ CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 CONFIG_TARGET_ROCK960_RK3399=y CONFIG_SPL_STACK=0xff8effff +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xff8e0000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 @@ -20,13 +25,8 @@ CONFIG_DEBUG_UART=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xff8e0000 -CONFIG_SPL_BSS_MAX_SIZE=0x10000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig index 11a3baa7a37..e5377dcdf3d 100644 --- a/configs/firefly-px30_defconfig +++ b/configs/firefly-px30_defconfig @@ -17,9 +17,13 @@ CONFIG_TARGET_EVB_PX30=y CONFIG_DEBUG_UART_CHANNEL=1 CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_SPL_STACK=0x400000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_STACK_R=y CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 @@ -35,13 +39,9 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x4000000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set # CONFIG_TPL_BANNER_PRINT is not set diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 4860298003c..03ee04e5bf2 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -16,6 +16,8 @@ CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_FIREFLY_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_STACK=0xff718000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_SIZE_LIMIT=0x40000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 @@ -30,8 +32,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index ceb48dfc63d..3b9466c830f 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -20,6 +20,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x308000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 @@ -39,9 +42,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0x7000 CONFIG_SPL_PAD_TO=0x40000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig index d72e8269a22..f4642e3fcff 100644 --- a/configs/gardena-smart-gateway-mt7688_defconfig +++ b/configs/gardena-smart-gateway-mt7688_defconfig @@ -11,6 +11,8 @@ CONFIG_DEFAULT_DEVICE_TREE="gardena-smart-gateway-mt7688" CONFIG_SPL_SERIAL=y CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c CONFIG_SPL_SYS_MALLOC_F_LEN=0x80000 +CONFIG_SPL_BSS_START_ADDR=0x80010000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0xB0000 @@ -41,8 +43,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x10000 -CONFIG_SPL_BSS_START_ADDR=0x80010000 -CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/generic-rk3568_defconfig b/configs/generic-rk3568_defconfig index e7d5e55bbfd..033702fd149 100644 --- a/configs/generic-rk3568_defconfig +++ b/configs/generic-rk3568_defconfig @@ -2,18 +2,22 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 +CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_DEFAULT_DEVICE_TREE="rk3568-generic" CONFIG_ROCKCHIP_RK3568=y +CONFIG_ROCKCHIP_SPI_IMAGE=y CONFIG_SPL_SERIAL=y CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +# CONFIG_BOOTMETH_VBE is not set CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-generic.dtb" # CONFIG_DISPLAY_CPUINFO is not set @@ -21,19 +25,27 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 CONFIG_SPL_ATF=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +# CONFIG_NET is not set CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y +# CONFIG_ADC is not set CONFIG_SPL_CLK=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set CONFIG_ROCKCHIP_GPIO=y CONFIG_MISC=y # CONFIG_ROCKCHIP_IODOMAIN is not set @@ -43,10 +55,27 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SF_DEFAULT_BUS=4 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SILICONKAISER=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_XMC=y +CONFIG_SPI_FLASH_XTX=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_SPL_PINCTRL=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SFC=y CONFIG_SYSRESET=y +CONFIG_SYSRESET_PSCI=y +CONFIG_USB=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_ERRNO_STR=y diff --git a/configs/generic-rk3588_defconfig b/configs/generic-rk3588_defconfig index b50f4f8b800..87a171701e4 100644 --- a/configs/generic-rk3588_defconfig +++ b/configs/generic-rk3588_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588-generic" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y @@ -15,8 +14,8 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +# CONFIG_BOOTMETH_VBE is not set CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-generic.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -27,15 +26,21 @@ CONFIG_SPL_ATF=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +# CONFIG_NET is not set CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y +# CONFIG_ADC is not set CONFIG_SPL_CLK=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set CONFIG_ROCKCHIP_GPIO=y CONFIG_MISC=y CONFIG_SUPPORT_EMMC_RPMB=y @@ -44,10 +49,19 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_USBDP=y CONFIG_SPL_PINCTRL=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y +CONFIG_SYSRESET_PSCI=y +CONFIG_USB=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_ERRNO_STR=y diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index 1c20af51bfb..c7390d1d323 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -19,6 +19,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x13e000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x128000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_IDENT_STRING=" ##v01.07" @@ -41,9 +44,6 @@ CONFIG_SYS_PBSIZE=2073 CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x128000 -CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set diff --git a/configs/gose_defconfig b/configs/gose_defconfig index 1eadf7c14d3..0f76ae147ef 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -16,7 +16,7 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7793-gose-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7793-gose" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RENESAS_BOARD_STRING="Gose" CONFIG_R8A7793=y diff --git a/configs/grouper_common_defconfig b/configs/grouper_common_defconfig index 2346cd6b522..001f5b88040 100644 --- a/configs/grouper_common_defconfig +++ b/configs/grouper_common_defconfig @@ -1,5 +1,4 @@ CONFIG_ARM=y -CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SUPPORT_PASSING_ATAGS=y CONFIG_CMDLINE_TAG=y @@ -15,12 +14,13 @@ CONFIG_TEGRA30=y CONFIG_TARGET_GROUPER=y CONFIG_CMD_EBTUPDATE=y CONFIG_SYS_LOAD_ADDR=0x82000000 +CONFIG_BUTTON_CMD=y CONFIG_BOOTDELAY=0 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_KEYED_CTRLC=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y -CONFIG_BOOTCOMMAND="if run check_button; then bootmenu; fi; run bootcmd_mmc0; poweroff;" +CONFIG_BOOTCOMMAND="bootflow scan; poweroff" CONFIG_SYS_PBSIZE=2084 CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig index eef3bad4e65..70a80088bfb 100644 --- a/configs/grpeach_defconfig +++ b/configs/grpeach_defconfig @@ -11,7 +11,7 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x80000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r7s72100-gr-peach-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r7s72100-gr-peach" CONFIG_RZA1=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_SYS_MONITOR_LEN=524288 diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index f6db7de8eba..ad994744c82 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x18000000 +CONFIG_SPL_STACK_R=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xD1400 CONFIG_CMD_HDMIDETECT=y @@ -45,7 +46,6 @@ CONFIG_HWCONFIG=y CONFIG_MISC_INIT_R=y CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_DMA=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 0c86cfd4806..96c64c8b767 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x18000000 +CONFIG_SPL_STACK_R=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x1080000 CONFIG_CMD_HDMIDETECT=y @@ -45,7 +46,6 @@ CONFIG_HWCONFIG=y CONFIG_MISC_INIT_R=y CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_DMA=y diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig index 72d1d771a78..c4c5d48f4eb 100644 --- a/configs/helios4_defconfig +++ b/configs/helios4_defconfig @@ -14,6 +14,9 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-388-helios4" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40023000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -28,9 +31,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x40023000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_I2C=y diff --git a/configs/hihope_rzg2_defconfig b/configs/hihope_rzg2_defconfig index a2c7e78cb86..149ce0bac0d 100644 --- a/configs/hihope_rzg2_defconfig +++ b/configs/hihope_rzg2_defconfig @@ -7,7 +7,7 @@ CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-hihope-rzg2m-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a774a1-hihope-rzg2m" CONFIG_RCAR_GEN3=y CONFIG_TARGET_HIHOPE_RZG2=y CONFIG_SYS_MONITOR_LEN=1048576 @@ -40,7 +40,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y -CONFIG_OF_LIST="r8a774a1-hihope-rzg2m-u-boot r8a774b1-hihope-rzg2n-u-boot r8a774e1-hihope-rzg2h-u-boot" +CONFIG_OF_LIST="renesas/r8a774a1-hihope-rzg2m renesas/r8a774b1-hihope-rzg2n renesas/r8a774e1-hihope-rzg2h" CONFIG_MULTI_DTB_FIT_LZO=y CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y CONFIG_ENV_OVERWRITE=y diff --git a/configs/hmibsc_defconfig b/configs/hmibsc_defconfig new file mode 100644 index 00000000000..a07689894ef --- /dev/null +++ b/configs/hmibsc_defconfig @@ -0,0 +1,87 @@ +CONFIG_ARM=y +CONFIG_SYS_VENDOR="schneider" +CONFIG_SYS_BOARD="hmibsc" +CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y +CONFIG_ARCH_SNAPDRAGON=y +CONFIG_TEXT_BASE=0x8f600000 +CONFIG_SYS_MALLOC_LEN=0x802000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="apq8016-schneider-hmibsc" +# CONFIG_OF_UPSTREAM is not set +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_IDENT_STRING="\nSchneider Electric-HMIBSC" +CONFIG_SYS_LOAD_ADDR=0x80080000 +CONFIG_REMAKE_ELF=y +# CONFIG_ANDROID_BOOT_IMAGE is not set +CONFIG_FIT=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=2048 +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SYS_PROMPT="hmibsc => " +CONFIG_SYS_MAXARGS=64 +CONFIG_CMD_DHCP=y +CONFIG_CMD_PING=y +CONFIG_CMD_FS_GENERIC=y +# CONFIG_CMD_IMI is not set +CONFIG_CMD_MD5SUM=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_USB=y +CONFIG_BOOTP_BOOTFILESIZE=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_ENV_FLAGS=y +CONFIG_CMD_ENV_EXISTS=y +CONFIG_CMD_NVEDIT_INFO=y +CONFIG_ENV_WRITEABLE_LIST=y +CONFIG_ENV_ACCESS_IGNORE_FORCE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_PART=2 +CONFIG_BUTTON_QCOM_PMIC=y +CONFIG_CLK=y +CONFIG_CLK_QCOM_APQ8016=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x91000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_MSM_GPIO=y +CONFIG_QCOM_PMIC_GPIO=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_MSM=y +CONFIG_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_PINCTRL_QCOM_APQ8016=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_QCOM=y +CONFIG_MSM_SERIAL=y +CONFIG_SPMI_MSM=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_MSM=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_PHYLIB=y +CONFIG_USB_ETHER_LAN75XX=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x18d1 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd00d +CONFIG_CI_UDC=y diff --git a/configs/imx6ulz_smm_m2_defconfig b/configs/imx6ulz_smm_m2_defconfig index ce957d926a4..064758c48c8 100644 --- a/configs/imx6ulz_smm_m2_defconfig +++ b/configs/imx6ulz_smm_m2_defconfig @@ -14,6 +14,7 @@ CONFIG_TARGET_MX6ULZ_SMM_M2=y CONFIG_DEFAULT_DEVICE_TREE="imx6ulz-bsh-smm-m2" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL=y +CONFIG_SPL_BSS_START_ADDR=0x84100000 CONFIG_SPL=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y @@ -22,7 +23,6 @@ CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_BSS_START_ADDR=0x84100000 CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_DMA=y CONFIG_SPL_MTD=y diff --git a/configs/imx7_cm_defconfig b/configs/imx7_cm_defconfig index 62dda1a533b..a04008c57d8 100644 --- a/configs/imx7_cm_defconfig +++ b/configs/imx7_cm_defconfig @@ -17,6 +17,8 @@ CONFIG_TARGET_IMX7_CM=y CONFIG_SYS_MONITOR_LEN=409600 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y @@ -27,8 +29,6 @@ CONFIG_DEFAULT_FDT_FILE="ask" CONFIG_SYS_PBSIZE=532 # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SPL_MAX_SIZE=0xe000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig index c011f4f4906..f5bb50c5f39 100644 --- a/configs/imx8mm-cl-iot-gate-optee_defconfig +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -16,6 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_FIT=y @@ -28,9 +31,6 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x910000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index 6afdb399b14..b36ad7c867c 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -17,6 +17,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x204000 CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -30,9 +33,6 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x910000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index 0f81a69d623..d4e9d9f342d 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -16,6 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_FIT=y @@ -27,9 +30,6 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-ctouch2.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x910000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index c2321e15b27..c85a14119e7 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -16,6 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_FIT=y @@ -27,9 +30,6 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-edimm2.2.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x910000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-mx8menlo_defconfig index 1ed7f0a2259..e9b18ac1be7 100644 --- a/configs/imx8mm-mx8menlo_defconfig +++ b/configs/imx8mm-mx8menlo_defconfig @@ -19,6 +19,9 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090 CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0xFFFFDE00 @@ -39,9 +42,6 @@ CONFIG_LOG=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x910000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/imx8mm-phygate-tauri-l_defconfig b/configs/imx8mm-phygate-tauri-l_defconfig index 252eeb9d261..cb292dde4cb 100644 --- a/configs/imx8mm-phygate-tauri-l_defconfig +++ b/configs/imx8mm-phygate-tauri-l_defconfig @@ -16,6 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x3E0000 CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -29,9 +32,6 @@ CONFIG_DEFAULT_FDT_FILE="oftree" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x910000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index 0b601bb8624..e3dcbfe0452 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -18,6 +18,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_FIT=y @@ -30,9 +33,6 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x910000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/imx8mm_beacon_fspi_defconfig b/configs/imx8mm_beacon_fspi_defconfig index eaf8dce3b5f..0aca853afd9 100644 --- a/configs/imx8mm_beacon_fspi_defconfig +++ b/configs/imx8mm_beacon_fspi_defconfig @@ -18,6 +18,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_FIT=y @@ -32,9 +35,6 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_PAD_TO=0x0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x910000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig b/configs/imx8mm_data_modul_edm_sbc_defconfig index bb183381c3e..53249f44a4e 100644 --- a/configs/imx8mm_data_modul_edm_sbc_defconfig +++ b/configs/imx8mm_data_modul_edm_sbc_defconfig @@ -23,6 +23,9 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090 CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0xFFFC0000 @@ -48,9 +51,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x910000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_LEGACY_IMAGE_FORMAT=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index e41facd8513..ff33d1532a0 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -16,6 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_FIT=y @@ -26,9 +29,6 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x910000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/imx8mm_evk_fspi_defconfig b/configs/imx8mm_evk_fspi_defconfig index 3aaf7a4d0d5..a57dc47f26f 100644 --- a/configs/imx8mm_evk_fspi_defconfig +++ b/configs/imx8mm_evk_fspi_defconfig @@ -19,6 +19,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_FIT=y @@ -30,9 +33,6 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x910000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/imx8mm_phg_defconfig b/configs/imx8mm_phg_defconfig index fb7cc33f0bf..e14dcdf9a3d 100644 --- a/configs/imx8mm_phg_defconfig +++ b/configs/imx8mm_phg_defconfig @@ -16,6 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x204000 CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -27,9 +30,6 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x910000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index cb6b97d097c..f4d999bfcef 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -12,14 +12,19 @@ CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-venice-gw71xx-0x" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MM_VENICE=y CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_DM_RESET=y CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x3f8000 CONFIG_SYS_LOAD_ADDR=0x48200000 +CONFIG_PCI=y CONFIG_SYS_MEMTEST_START=0x40000000 CONFIG_SYS_MEMTEST_END=0x80000000 CONFIG_FIT=y @@ -34,9 +39,6 @@ CONFIG_PREBOOT="gsc wd-disable" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x910000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y @@ -60,14 +62,19 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_DHCP6=y +CONFIG_CMD_TFTPPUT=y CONFIG_SYS_DISABLE_AUTOLOAD=y +CONFIG_CMD_WGET=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_UUID=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y +CONFIG_CMD_TPM=y CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set @@ -83,6 +90,8 @@ CONFIG_ETHPRIME="eth0" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=4096 +CONFIG_PROT_TCP_SACK=y +CONFIG_IPV6=y CONFIG_SPL_DM=y CONFIG_SPL_CLK_COMPOSITE_CCF=y CONFIG_CLK_COMPOSITE_CCF=y @@ -114,6 +123,9 @@ CONFIG_PHY_GIGE=y CONFIG_FEC_MXC=y CONFIG_KSZ9477=y CONFIG_MII=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_IMX=y +CONFIG_PHY_IMX8M_PCIE=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y @@ -124,17 +136,22 @@ CONFIG_DM_PMIC_BD71837=y CONFIG_SPL_DM_PMIC_BD71837=y CONFIG_DM_PMIC_MP5416=y CONFIG_SPL_DM_PMIC_MP5416=y -CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y +# CONFIG_DM_RNG is not set CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_MXC_SPI=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y CONFIG_IMX_TMU=y +# CONFIG_TPM_V1 is not set +CONFIG_TPM2_TIS_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_HOST_ETHER=y @@ -152,4 +169,7 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_IMX_WATCHDOG=y +CONFIG_TPM=y +# CONFIG_SPL_SHA512 is not set +# CONFIG_SPL_SHA384 is not set CONFIG_HEXDUMP=y diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index e8009c410ab..1129d8070cc 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -21,6 +21,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x980000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x950000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x42000000 @@ -38,9 +41,6 @@ CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_SPL_MAX_SIZE=0x25000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x950000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index ed671cf4a77..f4af99847d1 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -20,6 +20,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x980000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x950000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x42000000 @@ -37,9 +40,6 @@ CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_SPL_MAX_SIZE=0x25000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x950000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mn_beacon_fspi_defconfig b/configs/imx8mn_beacon_fspi_defconfig index 11c257a756e..cecde443367 100644 --- a/configs/imx8mn_beacon_fspi_defconfig +++ b/configs/imx8mn_beacon_fspi_defconfig @@ -20,6 +20,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x980000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x950000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x42000000 @@ -37,9 +40,6 @@ CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_SPL_MAX_SIZE=0x25000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x950000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig index 8c28b92f752..0e0a548a57f 100644 --- a/configs/imx8mn_bsh_smm_s2_defconfig +++ b/configs/imx8mn_bsh_smm_s2_defconfig @@ -17,6 +17,9 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x980000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x950000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -32,9 +35,6 @@ CONFIG_SYS_PBSIZE=2067 CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x950000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mn_bsh_smm_s2pro_defconfig b/configs/imx8mn_bsh_smm_s2pro_defconfig index 3b55f6ff418..f739569dde9 100644 --- a/configs/imx8mn_bsh_smm_s2pro_defconfig +++ b/configs/imx8mn_bsh_smm_s2pro_defconfig @@ -18,6 +18,9 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x980000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x950000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -33,9 +36,6 @@ CONFIG_SYS_PBSIZE=2067 CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x950000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index 56b88808ebd..82e3ce19480 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -16,6 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x980000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x950000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x42000000 @@ -31,9 +34,6 @@ CONFIG_SYS_PBSIZE=2074 CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x950000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index 91b7586a657..2402e9e8bfb 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -16,6 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x980000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x950000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x42000000 @@ -31,9 +34,6 @@ CONFIG_SYS_PBSIZE=2074 CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x950000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig index 6057d13a73d..218415fad57 100644 --- a/configs/imx8mn_var_som_defconfig +++ b/configs/imx8mn_var_som_defconfig @@ -19,6 +19,9 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x980000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x950000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -36,9 +39,6 @@ CONFIG_SYS_PBSIZE=2067 CONFIG_BOARD_TYPES=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x950000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index 0a4fba5f1ca..b65fef0a806 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -17,6 +17,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x980000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x950000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x3f8000 CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 @@ -36,9 +39,6 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x950000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set @@ -65,18 +65,21 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_DHCP6=y +CONFIG_CMD_TFTPPUT=y CONFIG_SYS_DISABLE_AUTOLOAD=y +CONFIG_CMD_WGET=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_UUID=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y +CONFIG_CMD_TPM=y CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_LIST="freescale/imx8mn-venice-gw7902" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_MMC_ENV_DEV=2 @@ -86,6 +89,8 @@ CONFIG_ETHPRIME="eth0" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=4096 +CONFIG_PROT_TCP_SACK=y +CONFIG_IPV6=y CONFIG_SPL_DM=y CONFIG_SPL_CLK_IMX8MN=y CONFIG_CLK_IMX8MN=y @@ -128,14 +133,20 @@ CONFIG_SPL_DM_PMIC_MP5416=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y +# CONFIG_DM_RNG is not set CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_MXC_SPI=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y CONFIG_IMX_TMU=y +# CONFIG_TPM_V1 is not set +CONFIG_TPM2_TIS_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_HOST_ETHER=y @@ -153,4 +164,7 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_IMX_WATCHDOG=y +CONFIG_TPM=y +# CONFIG_SPL_SHA512 is not set +# CONFIG_SPL_SHA384 is not set CONFIG_HEXDUMP=y diff --git a/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig b/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig index 83d7d18f316..3a622727232 100644 --- a/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig +++ b/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig @@ -19,6 +19,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x960000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x98fc00 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -33,9 +36,6 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x98fc00 -CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/imx8mp_beacon_defconfig b/configs/imx8mp_beacon_defconfig index fe1678d8ae9..b0dcbc723ba 100644 --- a/configs/imx8mp_beacon_defconfig +++ b/configs/imx8mp_beacon_defconfig @@ -21,6 +21,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x960000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x98fc00 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL=y CONFIG_ARMV8_SPL_EXCEPTION_VECTORS=y CONFIG_ARMV8_SET_SMPEN=y @@ -42,9 +45,6 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_SYS_DEVICE_NULLDEV is not set CONFIG_SPL_MAX_SIZE=0x26000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x98fc00 -CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y @@ -135,7 +135,6 @@ CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_PCA9450=y CONFIG_SPL_DM_PMIC_PCA9450=y -CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_PCA9450=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y diff --git a/configs/imx8mp_data_modul_edm_sbc_defconfig b/configs/imx8mp_data_modul_edm_sbc_defconfig index 51cfca016a7..209d896b00c 100644 --- a/configs/imx8mp_data_modul_edm_sbc_defconfig +++ b/configs/imx8mp_data_modul_edm_sbc_defconfig @@ -24,6 +24,9 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090 CONFIG_SPL_STACK=0x96fc00 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x96fc00 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_DEBUG_UART_BASE=0x30880000 @@ -55,9 +58,6 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x96fc00 -CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/imx8mp_debix_model_a_defconfig b/configs/imx8mp_debix_model_a_defconfig index 5092ac22744..70126c961f3 100644 --- a/configs/imx8mp_debix_model_a_defconfig +++ b/configs/imx8mp_debix_model_a_defconfig @@ -16,6 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x960000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x98fc00 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -30,9 +33,6 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x98fc00 -CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index 50a7d193688..76f2fe8fcc9 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -24,6 +24,9 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090 CONFIG_SPL_STACK=0x96fc00 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x96fc00 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_DEBUG_UART_BASE=0x30860000 @@ -53,9 +56,6 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x96fc00 -CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/imx8mp_dhcom_pdk3_defconfig b/configs/imx8mp_dhcom_pdk3_defconfig index f9444ec9deb..5b338f22195 100644 --- a/configs/imx8mp_dhcom_pdk3_defconfig +++ b/configs/imx8mp_dhcom_pdk3_defconfig @@ -23,6 +23,9 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090 CONFIG_SPL_STACK=0x96fc00 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x96fc00 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_DEBUG_UART_BASE=0x30860000 @@ -31,6 +34,7 @@ CONFIG_ENV_OFFSET_REDUND=0xFF0000 CONFIG_IMX_BOOTAUX=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x50000000 +CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y @@ -54,9 +58,6 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x96fc00 -CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set @@ -104,6 +105,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_BKOPS_ENABLE=y CONFIG_CMD_MTD=y CONFIG_CMD_PART=y +CONFIG_CMD_PCI=y CONFIG_CMD_READ=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y @@ -216,7 +218,10 @@ CONFIG_DWC_ETH_QOS_IMX=y CONFIG_FEC_MXC=y CONFIG_RGMII=y CONFIG_MII=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_IMX=y CONFIG_PHY_IMX8MQ_USB=y +CONFIG_PHY_IMX8M_PCIE=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 7e5dfce2ab6..d907aedb05a 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -16,6 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x960000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x98fc00 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -30,9 +33,6 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x98fc00 -CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/imx8mp_rsb3720a1_4G_defconfig b/configs/imx8mp_rsb3720a1_4G_defconfig index 14e6a3f3d05..393a1316cd9 100644 --- a/configs/imx8mp_rsb3720a1_4G_defconfig +++ b/configs/imx8mp_rsb3720a1_4G_defconfig @@ -22,6 +22,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x960000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x98fc00 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 @@ -42,9 +45,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x98fc00 -CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/imx8mp_rsb3720a1_6G_defconfig b/configs/imx8mp_rsb3720a1_6G_defconfig index fecdaed4979..6dd51a3f1fc 100644 --- a/configs/imx8mp_rsb3720a1_6G_defconfig +++ b/configs/imx8mp_rsb3720a1_6G_defconfig @@ -22,6 +22,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x960000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x98fc00 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 @@ -42,9 +45,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x98fc00 -CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig index 6e4addc7728..df93774b307 100644 --- a/configs/imx8mp_venice_defconfig +++ b/configs/imx8mp_venice_defconfig @@ -18,6 +18,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x960000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x98fc00 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x3f8000 CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 @@ -38,9 +41,6 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x98fc00 -CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set @@ -67,12 +67,16 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y +CONFIG_CMD_DHCP6=y +CONFIG_CMD_TFTPPUT=y CONFIG_SYS_DISABLE_AUTOLOAD=y +CONFIG_CMD_WGET=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_UUID=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y +CONFIG_CMD_TPM=y CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set @@ -86,9 +90,9 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=4096 +CONFIG_PROT_TCP_SACK=y +CONFIG_IPV6=y CONFIG_SPL_DM=y -CONFIG_REGMAP=y -CONFIG_SYSCON=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MP=y CONFIG_GPIO_HOG=y @@ -132,17 +136,22 @@ CONFIG_DM_PMIC_BD71837=y CONFIG_SPL_DM_PMIC_BD71837=y CONFIG_DM_PMIC_MP5416=y CONFIG_SPL_DM_PMIC_MP5416=y -CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y +# CONFIG_DM_RNG is not set CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_MXC_SPI=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y CONFIG_IMX_TMU=y +# CONFIG_TPM_V1 is not set +CONFIG_TPM2_TIS_SPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y @@ -160,4 +169,7 @@ CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_IMX_WATCHDOG=y +CONFIG_TPM=y +# CONFIG_SPL_SHA512 is not set +# CONFIG_SPL_SHA384 is not set CONFIG_HEXDUMP=y diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig index a5f8f0b9510..5eb96d3826a 100644 --- a/configs/imx8mq_cm_defconfig +++ b/configs/imx8mq_cm_defconfig @@ -18,6 +18,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x187ff0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x180000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -31,9 +34,6 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_PBSIZE=1050 CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x1f000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x180000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 3a2d88aec45..3c1701a3768 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -20,6 +20,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x187ff0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x180000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -33,9 +36,6 @@ CONFIG_SYS_PBSIZE=1050 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x1f000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x180000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig index 3ac4b213ad1..3a3fb754fa4 100644 --- a/configs/imx8mq_phanbell_defconfig +++ b/configs/imx8mq_phanbell_defconfig @@ -20,6 +20,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x187ff0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x180000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -34,9 +37,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x2b000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x180000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/imx8mq_reform2_defconfig b/configs/imx8mq_reform2_defconfig index 283d6d9ce7c..1844e3c8b84 100644 --- a/configs/imx8mq_reform2_defconfig +++ b/configs/imx8mq_reform2_defconfig @@ -20,6 +20,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x187ff0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x180000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -36,9 +39,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x1f000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x180000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/imx8qm_dmsse20a1_defconfig b/configs/imx8qm_dmsse20a1_defconfig index 333115de2d3..43d8205760f 100644 --- a/configs/imx8qm_dmsse20a1_defconfig +++ b/configs/imx8qm_dmsse20a1_defconfig @@ -21,6 +21,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x13e000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x128000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x80280000 CONFIG_REMAKE_ELF=y @@ -36,9 +39,6 @@ CONFIG_LOG=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x128000 -CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index f353c167d40..bf02d3e4f67 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -19,6 +19,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x13e000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x128000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x80280000 CONFIG_REMAKE_ELF=y @@ -34,9 +37,6 @@ CONFIG_SYS_PBSIZE=276 CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x128000 -CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig index f0b109b4f89..bee69645876 100644 --- a/configs/imx8qm_rom7720_a1_4G_defconfig +++ b/configs/imx8qm_rom7720_a1_4G_defconfig @@ -16,6 +16,9 @@ CONFIG_TARGET_IMX8QM_ROM7720_A1=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x128000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x80280000 CONFIG_REMAKE_ELF=y @@ -30,9 +33,6 @@ CONFIG_SYS_PBSIZE=276 CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x128000 -CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index da7cb05becf..d6b79f53893 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -19,6 +19,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x13e000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x128000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x80280000 CONFIG_REMAKE_ELF=y @@ -35,9 +38,6 @@ CONFIG_SYS_PBSIZE=2068 CONFIG_LOG=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1f000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x128000 -CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig index a7085ceb4a3..721c4cb9d11 100644 --- a/configs/imx8ulp_evk_defconfig +++ b/configs/imx8ulp_evk_defconfig @@ -17,6 +17,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x22050000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x22048000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000 CONFIG_SYS_LOAD_ADDR=0x80480000 @@ -32,9 +35,6 @@ CONFIG_SYS_PBSIZE=2068 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x22048000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_LOAD_IMX_CONTAINER=y diff --git a/configs/imx93-phyboard-segin_defconfig b/configs/imx93-phyboard-segin_defconfig index 54215c51c08..e3eb0029fa4 100644 --- a/configs/imx93-phyboard-segin_defconfig +++ b/configs/imx93-phyboard-segin_defconfig @@ -20,6 +20,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x20519dd0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x2051a000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x720000 CONFIG_CMD_DEKBLOB=y @@ -36,9 +39,6 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x2051a000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_LOAD_IMX_CONTAINER=y diff --git a/configs/imx93_11x11_evk_defconfig b/configs/imx93_11x11_evk_defconfig index 63613477c7f..5ad770f91e1 100644 --- a/configs/imx93_11x11_evk_defconfig +++ b/configs/imx93_11x11_evk_defconfig @@ -10,13 +10,16 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x700000 CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg" CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="imx93-11x11-evk" +CONFIG_DEFAULT_DEVICE_TREE="freescale/imx93-11x11-evk" CONFIG_SPL_TEXT_BASE=0x2049A000 CONFIG_TARGET_IMX93_11X11_EVK=y CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x20519dd0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x2051a000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000 CONFIG_SYS_LOAD_ADDR=0x80400000 @@ -30,9 +33,6 @@ CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x2051a000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_LOAD_IMX_CONTAINER=y diff --git a/configs/imx93_11x11_evk_ld_defconfig b/configs/imx93_11x11_evk_ld_defconfig index 4e3bbdd0cf5..abda6d12662 100644 --- a/configs/imx93_11x11_evk_ld_defconfig +++ b/configs/imx93_11x11_evk_ld_defconfig @@ -10,7 +10,7 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x400000 CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg" CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="imx93-11x11-evk" +CONFIG_DEFAULT_DEVICE_TREE="freescale/imx93-11x11-evk" CONFIG_SPL_TEXT_BASE=0x2049A000 CONFIG_IMX9_LOW_DRIVE_MODE=y CONFIG_TARGET_IMX93_11X11_EVK=y @@ -18,6 +18,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x20519dd0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x2051a000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000 CONFIG_SYS_LOAD_ADDR=0x80400000 @@ -31,9 +34,6 @@ CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x2051a000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_LOAD_IMX_CONTAINER=y diff --git a/configs/imx93_var_som_defconfig b/configs/imx93_var_som_defconfig index 996cad4854a..e39d7dc5e88 100644 --- a/configs/imx93_var_som_defconfig +++ b/configs/imx93_var_som_defconfig @@ -18,6 +18,9 @@ CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x20519dd0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x2051a000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_CMD_DEKBLOB=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000 @@ -37,9 +40,6 @@ CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x2051a000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_LOAD_IMX_CONTAINER=y diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig index 484f8e46e3e..e0c2b140441 100644 --- a/configs/iot2050_defconfig +++ b/configs/iot2050_defconfig @@ -23,6 +23,10 @@ CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_STACK_R=y CONFIG_ENV_OFFSET_REDUND=0x6a0000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y @@ -44,12 +48,8 @@ CONFIG_BOOTCOMMAND="run start_watchdog; run distro_bootcmd" CONFIG_SYS_PBSIZE=1050 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x58000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80a00000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/iot_devkit_defconfig b/configs/iot_devkit_defconfig index d02a28abfab..c4920052f82 100644 --- a/configs/iot_devkit_defconfig +++ b/configs/iot_devkit_defconfig @@ -14,12 +14,12 @@ CONFIG_DEFAULT_DEVICE_TREE="iot_devkit" CONFIG_SYS_CLK_FREQ=16000000 CONFIG_SYS_LOAD_ADDR=0x30000000 CONFIG_LOCALVERSION="-iotdk-1.0" -# CONFIG_BOOTM is not set # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=280 CONFIG_SYS_PROMPT="IoTDK# " # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_LOADB is not set diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index 0f2e83dfeec..fe8e84c9214 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -23,6 +23,10 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -37,12 +41,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80a00000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index d5b44e37f01..e023af24674 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -22,6 +22,10 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41cf5bfc +CONFIG_SPL_BSS_MAX_SIZE=0xa000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -33,11 +37,7 @@ CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0xc0000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x41cf5bfc -CONFIG_SPL_BSS_MAX_SIZE=0xa000 CONFIG_SPL_BOARD_INIT=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/j721e_beagleboneai64_a72_defconfig b/configs/j721e_beagleboneai64_a72_defconfig index 3d234bc1a8f..a354876f8c2 100644 --- a/configs/j721e_beagleboneai64_a72_defconfig +++ b/configs/j721e_beagleboneai64_a72_defconfig @@ -21,6 +21,10 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_PSCI_RESET is not set @@ -37,11 +41,7 @@ CONFIG_BOOTCOMMAND="run set_led_state_start_load; run envboot; bootflow scan -lb CONFIG_LOGLEVEL=7 CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0xc0000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80a00000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y @@ -57,19 +57,19 @@ CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_YMODEM_SUPPORT=y -CONFIG_CMD_ASKENV=y -CONFIG_CMD_DFU=y CONFIG_CMD_BOOTEFI_SELFTEST=y +CONFIG_CMD_ASKENV=y CONFIG_CMD_NVEDIT_EFI=y +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPIO_READ=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y -CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y CONFIG_CMD_EXT4_WRITE=y CONFIG_MMC_SPEED_MODE_SET=y diff --git a/configs/j721e_beagleboneai64_r5_defconfig b/configs/j721e_beagleboneai64_r5_defconfig index eab7a603f09..314161b8a62 100644 --- a/configs/j721e_beagleboneai64_r5_defconfig +++ b/configs/j721e_beagleboneai64_r5_defconfig @@ -19,6 +19,10 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41cf59f0 +CONFIG_SPL_BSS_MAX_SIZE=0xa000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_SIZE_LIMIT=0xf59f0 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 CONFIG_SPL_FS_FAT=y @@ -32,10 +36,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0xf59f0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x41cf59f0 -CONFIG_SPL_BSS_MAX_SIZE=0xa000 -CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index 077bf508328..3d8e9391987 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -22,6 +22,10 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -36,12 +40,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80a00000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 4d4b96dec6b..cea48b26136 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -21,6 +21,10 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41cf59f0 +CONFIG_SPL_BSS_MAX_SIZE=0xa000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_SIZE_LIMIT=0xf59f0 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 CONFIG_SPL_FS_FAT=y @@ -37,11 +41,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0xf59f0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x41cf59f0 -CONFIG_SPL_BSS_MAX_SIZE=0xa000 CONFIG_SPL_BOARD_INIT=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index 92f69413fa4..19cd44b068c 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -21,6 +21,10 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -34,12 +38,8 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTCOMMAND="run envboot; run distro_bootcmd;" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80a00000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index cb6b4a44864..5ef5247a3e0 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -20,6 +20,11 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41c76000 +CONFIG_SPL_BSS_MAX_SIZE=0xa000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x140000 CONFIG_SPL_SIZE_LIMIT=0x80000 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 CONFIG_SPL_FS_FAT=y @@ -35,14 +40,9 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0xc0000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x41c76000 -CONFIG_SPL_BSS_MAX_SIZE=0xa000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x140000 CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/j784s4_evm_a72_defconfig b/configs/j784s4_evm_a72_defconfig index 6c62403613a..bb9603bef0f 100644 --- a/configs/j784s4_evm_a72_defconfig +++ b/configs/j784s4_evm_a72_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_ARCH_K3=y -CONFIG_TI_SECURE_DEVICE=y CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y @@ -14,7 +13,6 @@ CONFIG_SF_DEFAULT_SPEED=25000000 CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y -CONFIG_OF_UPSTREAM=y CONFIG_DEFAULT_DEVICE_TREE="ti/k3-j784s4-evm" CONFIG_SPL_TEXT_BASE=0x80080000 CONFIG_OF_LIBFDT_OVERLAY=y @@ -23,6 +21,10 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -30,19 +32,11 @@ CONFIG_SPL_SPI=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_BOOTSTD_FULL=y -CONFIG_BOOTSTD_DEFAULTS=y CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" -CONFIG_BOARD_LATE_INIT=y CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80a00000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y -CONFIG_SYS_SPL_MALLOC=y -CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_DMA=y @@ -50,18 +44,15 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y -CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y -CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_THERMAL=y CONFIG_SPL_YMODEM_SUPPORT=y -CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y @@ -72,8 +63,8 @@ CONFIG_CMD_TIME=y CONFIG_CMD_EXT4_WRITE=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_UPSTREAM=y CONFIG_SPL_MULTI_DTB_FIT=y -CONFIG_OF_LIST="ti/k3-j784s4-evm" CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -145,7 +136,6 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_RESET_TI_SCI=y CONFIG_SCSI=y -CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y CONFIG_SOC_DEVICE_TI_K3=y diff --git a/configs/j784s4_evm_r5_defconfig b/configs/j784s4_evm_r5_defconfig index 50a52b9228e..f5fe7432206 100644 --- a/configs/j784s4_evm_r5_defconfig +++ b/configs/j784s4_evm_r5_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_ARCH_K3=y -CONFIG_TI_SECURE_DEVICE=y CONFIG_SYS_MALLOC_F_LEN=0x10000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y @@ -21,6 +20,11 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41c76000 +CONFIG_SPL_BSS_MAX_SIZE=0xa000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x140000 CONFIG_SPL_SIZE_LIMIT=0x80000 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 CONFIG_SPL_FS_FAT=y @@ -29,23 +33,15 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_USE_BOOTCOMMAND=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0xc0000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x41c76000 -CONFIG_SPL_BSS_MAX_SIZE=0xa000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x140000 CONFIG_SPL_SEPARATE_BSS=y -CONFIG_SYS_SPL_MALLOC=y -CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y -CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000 -CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 CONFIG_SPL_EARLY_BSS=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 @@ -54,21 +50,17 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y -CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_REMOTEPROC=y -CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_THERMAL=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y -CONFIG_SYS_MAXARGS=64 -CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_TIME=y @@ -76,7 +68,6 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_SPL_MULTI_DTB_FIT=y -CONFIG_SPL_OF_LIST="k3-j784s4-r5-evm" CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM=y diff --git a/configs/jaguar-rk3588_defconfig b/configs/jaguar-rk3588_defconfig index 3233b75cee9..f29505ea150 100644 --- a/configs/jaguar-rk3588_defconfig +++ b/configs/jaguar-rk3588_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SPL_GPIO=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_ENV_SIZE=0x1f000 diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 8dbdf1f4240..8d6cb240446 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -22,6 +22,9 @@ CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm" CONFIG_SPL_TEXT_BASE=0xC100000 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0xc1223f4 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xc10fff8 +CONFIG_SPL_BSS_MAX_SIZE=0x8000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y @@ -32,9 +35,6 @@ CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0xfff8 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xc10fff8 -CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x8000 diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index eed18844106..88965e273e2 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -21,6 +21,9 @@ CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm" CONFIG_SPL_TEXT_BASE=0xC0A0000 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0xc0c23f4 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xc0afff8 +CONFIG_SPL_BSS_MAX_SIZE=0x8000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y @@ -31,9 +34,6 @@ CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_mon_${bo CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0xfff8 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xc0afff8 -CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x8000 diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 6ed17721ced..4da75d1ca76 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -22,6 +22,9 @@ CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm" CONFIG_SPL_TEXT_BASE=0xC200000 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0xc2223f4 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xc20fff8 +CONFIG_SPL_BSS_MAX_SIZE=0x8000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y @@ -32,9 +35,6 @@ CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0xfff8 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xc20fff8 -CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x8000 diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index d642a68e135..c4534f033ac 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -22,6 +22,9 @@ CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm" CONFIG_SPL_TEXT_BASE=0xC100000 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0xc1223f4 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xc10fff8 +CONFIG_SPL_BSS_MAX_SIZE=0x8000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y @@ -32,9 +35,6 @@ CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0xfff8 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xc10fff8 -CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x8000 diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index 963e02d6b54..a912e58cf4d 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -16,7 +16,7 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7791-koelsch-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7791-koelsch" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RENESAS_BOARD_STRING="Koelsch" CONFIG_R8A7791=y diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index 50c55902637..f2570289298 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -20,6 +20,9 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SPL_STACK=0x91fff0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x1F0000 CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -35,9 +38,6 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=276 CONFIG_BOARD_TYPES=y CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x910000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/kontron_pitx_imx8m_defconfig b/configs/kontron_pitx_imx8m_defconfig index 02fc696b76f..e2a87c4a81d 100644 --- a/configs/kontron_pitx_imx8m_defconfig +++ b/configs/kontron_pitx_imx8m_defconfig @@ -20,6 +20,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x187ff0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x180000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_LOAD_ADDR=0x42000000 @@ -36,9 +39,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x1f000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x180000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index 639c5c6ce10..a1d5f89b1ec 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -11,7 +11,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800eff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x3e0000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-kontron-sl28" +CONFIG_DEFAULT_DEVICE_TREE="freescale/fsl-ls1028a-kontron-sl28" CONFIG_SPL_TEXT_BASE=0x18010000 CONFIG_SYS_FSL_SDHC_CLK_DIV=1 CONFIG_OF_LIBFDT_OVERLAY=y @@ -19,6 +19,9 @@ CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x18009ff0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_SIZE_LIMIT=0x20000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x3f0000 @@ -45,9 +48,6 @@ CONFIG_BOARD_LATE_INIT=y # CONFIG_HWCONFIG is not set CONFIG_PCI_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80100000 -CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y @@ -73,7 +73,8 @@ CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_RNG=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_LIST="fsl-ls1028a-kontron-sl28 fsl-ls1028a-kontron-sl28-var1 fsl-ls1028a-kontron-sl28-var2 fsl-ls1028a-kontron-sl28-var3 fsl-ls1028a-kontron-sl28-var4" +CONFIG_OF_UPSTREAM=y +CONFIG_OF_LIST="freescale/fsl-ls1028a-kontron-sl28 freescale/fsl-ls1028a-kontron-sl28-var1 freescale/fsl-ls1028a-kontron-sl28-var2 freescale/fsl-ls1028a-kontron-sl28-var4" CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig index ed4f2ba5558..b9b50e8c23a 100644 --- a/configs/kylin-rk3036_defconfig +++ b/configs/kylin-rk3036_defconfig @@ -18,6 +18,7 @@ CONFIG_ROCKCHIP_RK3036=y CONFIG_TARGET_KYLIN_RK3036=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_STACK=0x10081fff +CONFIG_SPL_STACK_R=y CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x60800800 @@ -30,7 +31,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y -CONFIG_SPL_STACK_R=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/lager_defconfig b/configs/lager_defconfig index 605909e812f..03f29b8849b 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -16,7 +16,7 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7790-lager-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7790-lager" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RENESAS_BOARD_STRING="Lager" CONFIG_R8A7790=y diff --git a/configs/librem5_defconfig b/configs/librem5_defconfig index 1dd08360485..6999a689e29 100644 --- a/configs/librem5_defconfig +++ b/configs/librem5_defconfig @@ -20,6 +20,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x187ff0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x180000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -37,9 +40,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x180000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig index 784a269fd5b..6859dfd517c 100644 --- a/configs/libretech-cc_v2_defconfig +++ b/configs/libretech-cc_v2_defconfig @@ -41,7 +41,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_SARADC_MESON=y CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y diff --git a/configs/linkit-smart-7688_defconfig b/configs/linkit-smart-7688_defconfig index f2182927c91..69494f5e405 100644 --- a/configs/linkit-smart-7688_defconfig +++ b/configs/linkit-smart-7688_defconfig @@ -10,6 +10,8 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="linkit-smart-7688" CONFIG_SPL_SERIAL=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 +CONFIG_SPL_BSS_START_ADDR=0x80010000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x80100000 CONFIG_ARCH_MTMIPS=y @@ -33,8 +35,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x10000 -CONFIG_SPL_BSS_START_ADDR=0x80010000 -CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig index 32d34bc20a1..a4a7f1a5cbd 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/lion-rk3368_defconfig @@ -14,6 +14,11 @@ CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x188000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 +CONFIG_SPL_BSS_MAX_SIZE=0x20000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xFF180000 CONFIG_DEBUG_UART_CLOCK=24000000 @@ -33,14 +38,9 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-lion-haikou.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x400000 -CONFIG_SPL_BSS_MAX_SIZE=0x20000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 CONFIG_SPL_ATF=y CONFIG_TPL=y diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index 7ea28bbaf40..2354f4113ae 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -18,6 +18,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x1001d000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_PCI=y @@ -41,9 +44,6 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80100000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index a45b4d90360..136ca9a2670 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -20,6 +20,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x1001d000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_PCI=y @@ -52,9 +55,6 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80100000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 9ab19f17ad1..befb4ae442c 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -21,6 +21,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x1001d000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_PCI=y @@ -51,9 +54,6 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80100000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 31496ee000b..db06a03fe6b 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -21,6 +21,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x1001d000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_PCI=y @@ -50,9 +53,6 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80100000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index e4b72d3cf29..e5d8eeb8a2f 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -18,6 +18,9 @@ CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x1001d000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_PCI=y @@ -44,9 +47,6 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80100000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 148d0306334..dc0e507263f 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -20,6 +20,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x1001d000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_PCI=y @@ -52,9 +55,6 @@ CONFIG_ID_EEPROM=y CONFIG_SYS_EEPROM_BUS_NUM=1 CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80100000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index b5a6ca51c83..9980d6106ec 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -20,6 +20,9 @@ CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x1001d000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_PCI=y @@ -53,9 +56,6 @@ CONFIG_ID_EEPROM=y CONFIG_SYS_EEPROM_BUS_NUM=1 CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80100000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 41f7a0dc317..ed92e34dccf 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -20,6 +20,9 @@ CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x1001d000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_PCI=y @@ -54,9 +57,6 @@ CONFIG_ID_EEPROM=y CONFIG_SYS_EEPROM_BUS_NUM=1 CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80100000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 3093f7023d5..06e41546d67 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -18,6 +18,9 @@ CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x18009ff0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL=y CONFIG_PCI=y CONFIG_AHCI=y @@ -39,9 +42,6 @@ CONFIG_SYS_PBSIZE=532 CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SPL_PAD_TO=0x20000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80100000 -CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index d335b33bc05..f1009e1738b 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -18,6 +18,9 @@ CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x18009ff0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80100000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL=y CONFIG_PCI=y CONFIG_AHCI=y @@ -45,9 +48,6 @@ CONFIG_MISC_INIT_R=y CONFIG_RESET_PHY_R=y CONFIG_SPL_MAX_SIZE=0x16000 CONFIG_SPL_PAD_TO=0x80000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80100000 -CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/lubancat-2-rk3568_defconfig b/configs/lubancat-2-rk3568_defconfig index 1c50a0ccbe6..ea67b6a7286 100644 --- a/configs/lubancat-2-rk3568_defconfig +++ b/configs/lubancat-2-rk3568_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-lubancat-2" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 40be03ca77c..9906099e8c5 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -15,6 +15,9 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm" CONFIG_SPL_TEXT_BASE=0x40004030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40020000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -26,9 +29,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1bfd0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x40020000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_I2C=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index 374d21e3655..9e653c73eec 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_MIQI_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_STACK=0xff718000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 @@ -30,8 +32,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig index cc3906f07da..9a342d3a33a 100644 --- a/configs/mk808_defconfig +++ b/configs/mk808_defconfig @@ -24,6 +24,8 @@ CONFIG_TPL_STACK=0x1008FFFF CONFIG_TARGET_MK808=y CONFIG_SPL_STACK_R_ADDR=0x70000000 CONFIG_SPL_STACK=0x1008ffff +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 CONFIG_DEBUG_UART_BASE=0x20064000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_FS_FAT=y @@ -43,8 +45,6 @@ CONFIG_SPL_MAX_SIZE=0x32000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_FS_EXT4=y CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=2 diff --git a/configs/msc_sm2s_imx8mp_defconfig b/configs/msc_sm2s_imx8mp_defconfig index 88b97ad57d8..dc5a45fb0d8 100644 --- a/configs/msc_sm2s_imx8mp_defconfig +++ b/configs/msc_sm2s_imx8mp_defconfig @@ -16,6 +16,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x960000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x0098FC00 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x204000 CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 @@ -32,9 +35,6 @@ CONFIG_DEFAULT_FDT_FILE="imx8mp-msc-sm2s-ep1.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_SPL_MAX_SIZE=0x26000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x0098FC00 -CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/mt7620_mt7530_rfb_defconfig b/configs/mt7620_mt7530_rfb_defconfig index 6dc7c22b994..20f62fa86d0 100644 --- a/configs/mt7620_mt7530_rfb_defconfig +++ b/configs/mt7620_mt7530_rfb_defconfig @@ -10,6 +10,8 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-mt7530-rfb" CONFIG_SPL_SERIAL=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 +CONFIG_SPL_BSS_START_ADDR=0x80010000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xb0000c00 CONFIG_DEBUG_UART_CLOCK=40000000 @@ -27,8 +29,6 @@ CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x10000 -CONFIG_SPL_BSS_START_ADDR=0x80010000 -CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y # CONFIG_CMD_ELF is not set diff --git a/configs/mt7620_rfb_defconfig b/configs/mt7620_rfb_defconfig index b17b2cd9343..bf9d7115863 100644 --- a/configs/mt7620_rfb_defconfig +++ b/configs/mt7620_rfb_defconfig @@ -10,6 +10,8 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-rfb" CONFIG_SPL_SERIAL=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 +CONFIG_SPL_BSS_START_ADDR=0x80010000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xb0000c00 CONFIG_DEBUG_UART_CLOCK=40000000 @@ -26,8 +28,6 @@ CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x10000 -CONFIG_SPL_BSS_START_ADDR=0x80010000 -CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y # CONFIG_CMD_ELF is not set diff --git a/configs/mt7621_nand_rfb_defconfig b/configs/mt7621_nand_rfb_defconfig index 7f0a24b36c4..7e12c040ffb 100644 --- a/configs/mt7621_nand_rfb_defconfig +++ b/configs/mt7621_nand_rfb_defconfig @@ -8,6 +8,8 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7621-nand-rfb" CONFIG_SPL_SERIAL=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 +CONFIG_SPL_BSS_START_ADDR=0x80140000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xbe000c00 CONFIG_DEBUG_UART_CLOCK=50000000 @@ -27,8 +29,6 @@ CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0x30000 -CONFIG_SPL_BSS_START_ADDR=0x80140000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/mt7621_rfb_defconfig b/configs/mt7621_rfb_defconfig index 43d00d34133..ec5996a2e0b 100644 --- a/configs/mt7621_rfb_defconfig +++ b/configs/mt7621_rfb_defconfig @@ -10,6 +10,8 @@ CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7621-rfb" CONFIG_SPL_SERIAL=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x1000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 +CONFIG_SPL_BSS_START_ADDR=0x80140000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xbe000c00 CONFIG_DEBUG_UART_CLOCK=50000000 @@ -27,8 +29,6 @@ CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL_MAX_SIZE=0x30000 -CONFIG_SPL_BSS_START_ADDR=0x80140000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_TPL=y diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig index 85b32a7d39f..351e6a160e8 100644 --- a/configs/mt7628_rfb_defconfig +++ b/configs/mt7628_rfb_defconfig @@ -10,6 +10,8 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7628-rfb" CONFIG_SPL_SERIAL=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 +CONFIG_SPL_BSS_START_ADDR=0x80010000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x80010000 CONFIG_ARCH_MTMIPS=y @@ -26,8 +28,6 @@ CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x10000 -CONFIG_SPL_BSS_START_ADDR=0x80010000 -CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y # CONFIG_CMD_ELF is not set diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig index 7868b02eb3c..bccbbccc601 100644 --- a/configs/mt7629_rfb_defconfig +++ b/configs/mt7629_rfb_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x40800000 CONFIG_SPL_STACK=0x106000 +CONFIG_SPL_STACK_R=y CONFIG_SYS_LOAD_ADDR=0x42007f1c CONFIG_SPL_PAYLOAD="u-boot-lzma.img" CONFIG_BUILD_TARGET="u-boot-mtk.bin" @@ -33,7 +34,6 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig index 6c5481cd6ed..7f11e6f5d45 100644 --- a/configs/mx6memcal_defconfig +++ b/configs/mx6memcal_defconfig @@ -14,7 +14,6 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SYS_MEMTEST_START=0x10000000 CONFIG_SYS_MEMTEST_END=0x20000000 -# CONFIG_BOOTM is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_PBSIZE=528 CONFIG_SPL_SYS_MALLOC=y @@ -22,6 +21,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/n2350_defconfig b/configs/n2350_defconfig index fde14f09b9f..5e13d2cb768 100644 --- a/configs/n2350_defconfig +++ b/configs/n2350_defconfig @@ -20,6 +20,9 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-385-thecus-n2350" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40023000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -36,9 +39,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x22fd0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x40023000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_I2C=y diff --git a/configs/nanopc-t6-rk3588_defconfig b/configs/nanopc-t6-rk3588_defconfig index 5c7bc0b7196..738dda026b0 100644 --- a/configs/nanopc-t6-rk3588_defconfig +++ b/configs/nanopc-t6-rk3588_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588-nanopc-t6" @@ -23,7 +22,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-nanopc-t6.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/nanopi-r5c-rk3568_defconfig b/configs/nanopi-r5c-rk3568_defconfig index 0f1a9461a0c..00743b7f926 100644 --- a/configs/nanopi-r5c-rk3568_defconfig +++ b/configs/nanopi-r5c-rk3568_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-nanopi-r5c" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/nanopi-r5s-rk3568_defconfig b/configs/nanopi-r5s-rk3568_defconfig index 4ebf0cc9ee8..91e3a19dea6 100644 --- a/configs/nanopi-r5s-rk3568_defconfig +++ b/configs/nanopi-r5s-rk3568_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-nanopi-r5s" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/neu6a-io-rk3588_defconfig b/configs/neu6a-io-rk3588_defconfig index 307a540f424..56198556aff 100644 --- a/configs/neu6a-io-rk3588_defconfig +++ b/configs/neu6a-io-rk3588_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588-edgeble-neu6a-io" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y @@ -13,11 +12,13 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-edgeble-neu6a-io.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_ATF=y @@ -28,6 +29,7 @@ CONFIG_CMD_MMC=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -40,10 +42,11 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_REGULATOR_PWM=y +CONFIG_SPL_PINCTRL=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y CONFIG_ERRNO_STR=y diff --git a/configs/neu6b-io-rk3588_defconfig b/configs/neu6b-io-rk3588_defconfig index 9ef2bb21fff..40baec319c9 100644 --- a/configs/neu6b-io-rk3588_defconfig +++ b/configs/neu6b-io-rk3588_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588-edgeble-neu6b-io" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y @@ -13,11 +12,13 @@ CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-edgeble-neu6b-io.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_ATF=y @@ -28,6 +29,7 @@ CONFIG_CMD_MMC=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -40,10 +42,11 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_REGULATOR_PWM=y +CONFIG_SPL_PINCTRL=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y CONFIG_ERRNO_STR=y diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig index eb759e00738..99d7149a44c 100644 --- a/configs/odroid-go2_defconfig +++ b/configs/odroid-go2_defconfig @@ -19,9 +19,13 @@ CONFIG_TARGET_ODROID_GO2=y CONFIG_DEBUG_UART_CHANNEL=1 CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_SPL_STACK=0x400000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_STACK_R=y CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 @@ -39,13 +43,9 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x4000000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y diff --git a/configs/odroid-m1-rk3568_defconfig b/configs/odroid-m1-rk3568_defconfig index b5ed9e4bc98..e749f9af9d2 100644 --- a/configs/odroid-m1-rk3568_defconfig +++ b/configs/odroid-m1-rk3568_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="rk3568-odroid-m1" diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index c7483b8433e..947a6c6b3bc 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -23,6 +23,8 @@ CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x8001ff00 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xc0000000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0xc0700000 CONFIG_DYNAMIC_SYS_CLK_FREQ=y @@ -35,8 +37,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CLOCKS=y CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xc0000000 CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/openpiton_riscv64_spl_defconfig b/configs/openpiton_riscv64_spl_defconfig index 12b423f52e7..a08040d878d 100644 --- a/configs/openpiton_riscv64_spl_defconfig +++ b/configs/openpiton_riscv64_spl_defconfig @@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="openpiton-riscv64" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_SPL_STACK=0x83fffe80 CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 +CONFIG_SPL_BSS_START_ADDR=0x82000000 CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x87000000 @@ -28,7 +29,6 @@ CONFIG_BOOTCOMMAND="fdt addr ${fdtcontroladdr}; fdt move ${fdtcontroladdr} ${fdt CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=284 CONFIG_SPL_MAX_SIZE=0x100000 -CONFIG_SPL_BSS_START_ADDR=0x82000000 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/orangepi-5-plus-rk3588_defconfig b/configs/orangepi-5-plus-rk3588_defconfig index d6e23c154f1..ba8005363ad 100644 --- a/configs/orangepi-5-plus-rk3588_defconfig +++ b/configs/orangepi-5-plus-rk3588_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588-orangepi-5-plus" @@ -24,7 +23,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-orangepi-5-plus.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/orangepi-5-rk3588s_defconfig b/configs/orangepi-5-rk3588s_defconfig index e6b3da1dc59..d61f85aaa8c 100644 --- a/configs/orangepi-5-rk3588s_defconfig +++ b/configs/orangepi-5-rk3588s_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588s-orangepi-5" @@ -23,7 +22,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-orangepi-5.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig index 5c1c47ecc43..4f0725f3425 100644 --- a/configs/paz00_defconfig +++ b/configs/paz00_defconfig @@ -35,6 +35,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_PART=2 +CONFIG_SYS_I2C_TEGRA=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index 19d6aa8cd30..22d419024f6 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -17,6 +17,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x3E0000 CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -30,9 +33,6 @@ CONFIG_DEFAULT_FDT_FILE="oftree" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x910000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index 6c67f14b555..e9a287cb441 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -18,6 +18,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x960000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x98fc00 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x3e0000 CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 @@ -31,9 +34,6 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x98fc00 -CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index ce999e48df2..da310193fe9 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_PHYCORE_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_STACK=0xff718000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 @@ -31,8 +33,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/phycore_am62x_a53_defconfig b/configs/phycore_am62x_a53_defconfig index 08a2532d398..1d72882a8b3 100644 --- a/configs/phycore_am62x_a53_defconfig +++ b/configs/phycore_am62x_a53_defconfig @@ -19,6 +19,10 @@ CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80c80000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_SIZE_LIMIT=0x40000 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x800 CONFIG_SPL_FS_FAT=y @@ -35,12 +39,8 @@ CONFIG_BOOTCOMMAND="run mmcboot; bootflow scan -lb" CONFIG_DEFAULT_FDT_FILE="oftree" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x58000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80c80000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/phycore_am62x_r5_defconfig b/configs/phycore_am62x_r5_defconfig index bd28e145e60..389672d5227 100644 --- a/configs/phycore_am62x_r5_defconfig +++ b/configs/phycore_am62x_r5_defconfig @@ -22,6 +22,11 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x43c3b000 +CONFIG_SPL_BSS_MAX_SIZE=0x3000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 CONFIG_SPL_SIZE_LIMIT=0x3A7F0 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500 CONFIG_SPL_FS_FAT=y @@ -35,13 +40,8 @@ CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x3B000 CONFIG_SPL_PAD_TO=0x0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x43c3b000 -CONFIG_SPL_BSS_MAX_SIZE=0x3000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/phycore_am64x_a53_defconfig b/configs/phycore_am64x_a53_defconfig index f3085c0d10d..bd1e05bee58 100644 --- a/configs/phycore_am64x_a53_defconfig +++ b/configs/phycore_am64x_a53_defconfig @@ -24,6 +24,10 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -35,12 +39,8 @@ CONFIG_BOOTSTD_FULL=y CONFIG_BOOTCOMMAND="run mmcboot; bootflow scan -lb" CONFIG_DEFAULT_FDT_FILE="oftree" CONFIG_SPL_MAX_SIZE=0x180000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80a00000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y diff --git a/configs/phycore_am64x_r5_defconfig b/configs/phycore_am64x_r5_defconfig index 74e6e8331a9..61d784fa17f 100644 --- a/configs/phycore_am64x_r5_defconfig +++ b/configs/phycore_am64x_r5_defconfig @@ -22,6 +22,10 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x7019b800 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_SIZE_LIMIT=0x190000 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 CONFIG_SPL_FS_FAT=y @@ -36,13 +40,9 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x180000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x7019b800 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index 2e32a7e28d9..9d5241a50d0 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -13,6 +13,8 @@ CONFIG_TARGET_PICO_IMX7D=y CONFIG_SYS_MONITOR_LEN=409600 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y @@ -25,8 +27,6 @@ CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb" CONFIG_SYS_PBSIZE=532 # CONFIG_CONSOLE_MUX is not set CONFIG_SPL_MAX_SIZE=0xe000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_SYS_MALLOC=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index 42abda08177..690139c09ca 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -13,6 +13,8 @@ CONFIG_TARGET_PICO_IMX7D=y CONFIG_SYS_MONITOR_LEN=409600 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y @@ -25,8 +27,6 @@ CONFIG_DEFAULT_FDT_FILE="imx7d-pico-hobbit.dtb" CONFIG_SYS_PBSIZE=532 # CONFIG_CONSOLE_MUX is not set CONFIG_SPL_MAX_SIZE=0xe000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_SYS_MALLOC=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index 154c2dbaa35..1327523e289 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -13,6 +13,8 @@ CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_SYS_MONITOR_LEN=409600 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_SYS_MEMTEST_START=0x80000000 @@ -27,8 +29,6 @@ CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SYS_PBSIZE=532 # CONFIG_CONSOLE_MUX is not set CONFIG_SPL_MAX_SIZE=0xe000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_SYS_MALLOC=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index 3202894226c..6009b1c65c1 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -13,6 +13,8 @@ CONFIG_TARGET_PICO_IMX7D=y CONFIG_SYS_MONITOR_LEN=409600 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y @@ -25,8 +27,6 @@ CONFIG_DEFAULT_FDT_FILE="ask" CONFIG_SYS_PBSIZE=532 # CONFIG_CONSOLE_MUX is not set CONFIG_SPL_MAX_SIZE=0xe000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_SYS_MALLOC=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig index ebd43b5c36a..cf91eb563b9 100644 --- a/configs/pico-imx8mq_defconfig +++ b/configs/pico-imx8mq_defconfig @@ -20,6 +20,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x187ff0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x180000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -34,9 +37,6 @@ CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x1f000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x180000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index 2e32a7e28d9..9d5241a50d0 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -13,6 +13,8 @@ CONFIG_TARGET_PICO_IMX7D=y CONFIG_SYS_MONITOR_LEN=409600 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y @@ -25,8 +27,6 @@ CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb" CONFIG_SYS_PBSIZE=532 # CONFIG_CONSOLE_MUX is not set CONFIG_SPL_MAX_SIZE=0xe000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_SYS_MALLOC=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index 1c2ba2651b1..28c46abed78 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -13,6 +13,8 @@ CONFIG_TARGET_PICO_IMX7D=y CONFIG_SYS_MONITOR_LEN=409600 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y @@ -25,8 +27,6 @@ CONFIG_DEFAULT_FDT_FILE="imx7d-pico-pi.dtb" CONFIG_SYS_PBSIZE=532 # CONFIG_CONSOLE_MUX is not set CONFIG_SPL_MAX_SIZE=0xe000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_SYS_MALLOC=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BOOTD is not set diff --git a/configs/pinetab2-rk3566_defconfig b/configs/pinetab2-rk3566_defconfig index bc7a77aa52f..ad237edf8d9 100644 --- a/configs/pinetab2-rk3566_defconfig +++ b/configs/pinetab2-rk3566_defconfig @@ -3,7 +3,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SPL_GPIO=y -CONFIG_NR_DRAM_BANKS=2 +CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="rk3566-pinetab2-v2.0" CONFIG_ROCKCHIP_RK3568=y @@ -99,7 +99,6 @@ CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_PRODUCT_NUM=0x350a CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_ERRNO_STR=y diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 09af09ea6ee..92f93f6503b 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_POPMETAL_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_STACK=0xff718000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 @@ -30,8 +32,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/porter_defconfig b/configs/porter_defconfig index 021e521745f..170ca3a5f43 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -16,7 +16,7 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7791-porter-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7791-porter" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RENESAS_BOARD_STRING="Porter" CONFIG_R8A7791=y diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index c2759e1a952..14a7bc8b1e0 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -17,6 +17,11 @@ CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0 CONFIG_ROCKCHIP_SPI_IMAGE=y CONFIG_TARGET_PUMA_RK3399=y CONFIG_SPL_STACK=0xff8effff +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xff8e0000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_DEBUG_UART_BASE=0xFF180000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -27,13 +32,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xff8e0000 -CONFIG_SPL_BSS_MAX_SIZE=0x10000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y diff --git a/configs/px30-core-ctouch2-of10-px30_defconfig b/configs/px30-core-ctouch2-of10-px30_defconfig index d96fd14b36d..a2801ec7796 100644 --- a/configs/px30-core-ctouch2-of10-px30_defconfig +++ b/configs/px30-core-ctouch2-of10-px30_defconfig @@ -17,9 +17,13 @@ CONFIG_TARGET_PX30_CORE=y CONFIG_DEBUG_UART_CHANNEL=1 CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_SPL_STACK=0x400000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_STACK_R=y CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 @@ -35,13 +39,9 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x4000000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set # CONFIG_TPL_BANNER_PRINT is not set diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig index ac2af6d8cbb..cc33e275742 100644 --- a/configs/px30-core-ctouch2-px30_defconfig +++ b/configs/px30-core-ctouch2-px30_defconfig @@ -17,9 +17,13 @@ CONFIG_TARGET_PX30_CORE=y CONFIG_DEBUG_UART_CHANNEL=1 CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_SPL_STACK=0x400000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_STACK_R=y CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 @@ -35,13 +39,9 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x4000000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set # CONFIG_TPL_BANNER_PRINT is not set diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig index a49bb4072d2..99e1b2fc7ae 100644 --- a/configs/px30-core-edimm2.2-px30_defconfig +++ b/configs/px30-core-edimm2.2-px30_defconfig @@ -17,9 +17,13 @@ CONFIG_TARGET_PX30_CORE=y CONFIG_DEBUG_UART_CHANNEL=1 CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_SPL_STACK=0x400000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_STACK_R=y CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 @@ -35,13 +39,9 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x4000000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set # CONFIG_TPL_BANNER_PRINT is not set diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index 64fed8b33eb..366d8fc3aea 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_PXM2=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_SPL_BSS_START_ADDR=0x80000000 CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y @@ -37,7 +38,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y -CONFIG_SPL_BSS_START_ADDR=0x80000000 CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80208000 diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig index 1abb57345ff..80ad3b32e13 100644 --- a/configs/qcom_defconfig +++ b/configs/qcom_defconfig @@ -2,8 +2,9 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_POSITION_INDEPENDENT=y CONFIG_ARCH_SNAPDRAGON=y -CONFIG_DEFAULT_DEVICE_TREE="sdm845-db845c" -CONFIG_SYS_LOAD_ADDR=0x0 +CONFIG_DEFAULT_DEVICE_TREE="qcom/sdm845-db845c" +CONFIG_SYS_LOAD_ADDR=0xA0000000 +CONFIG_SYS_INIT_SP_BSS_OFFSET=1572864 CONFIG_BUTTON_CMD=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -33,14 +34,21 @@ CONFIG_CMD_CAT=y CONFIG_CMD_BMP=y CONFIG_CMD_LOG=y CONFIG_OF_LIVE=y +CONFIG_OF_BOARD_SETUP=y CONFIG_BUTTON_QCOM_PMIC=y CONFIG_CLK=y +CONFIG_CLK_QCOM_QCM2290=y CONFIG_CLK_QCOM_QCS404=y CONFIG_CLK_QCOM_SDM845=y +CONFIG_CLK_QCOM_SM6115=y +CONFIG_CLK_QCOM_SM8250=y +CONFIG_CLK_QCOM_SM8550=y +CONFIG_CLK_QCOM_SM8650=y CONFIG_MSM_GPIO=y CONFIG_QCOM_PMIC_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_QUP=y +CONFIG_SYS_I2C_GENI=y CONFIG_I2C_MUX=y CONFIG_DM_KEYBOARD=y CONFIG_BUTTON_KEYBOARD=y @@ -63,9 +71,15 @@ CONFIG_RGMII=y CONFIG_PHY=y CONFIG_PHY_QCOM_QUSB2=y CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y +CONFIG_PHY_QCOM_SNPS_EUSB2=y CONFIG_PINCTRL=y +CONFIG_PINCTRL_QCOM_QCM2290=y CONFIG_PINCTRL_QCOM_QCS404=y CONFIG_PINCTRL_QCOM_SDM845=y +CONFIG_PINCTRL_QCOM_SM6115=y +CONFIG_PINCTRL_QCOM_SM8250=y +CONFIG_PINCTRL_QCOM_SM8550=y +CONFIG_PINCTRL_QCOM_SM8650=y CONFIG_DM_PMIC=y CONFIG_PMIC_QCOM=y CONFIG_DM_REGULATOR=y @@ -92,5 +106,5 @@ CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_NO_FB_CLEAR=y CONFIG_VIDEO_SIMPLE=y CONFIG_HEXDUMP=y -# CONFIG_GENERATE_SMBIOS_TABLE is not set +CONFIG_GENERATE_SMBIOS_TABLE=y CONFIG_LMB_MAX_REGIONS=64 diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index 4ff8ec8a5cf..dd774a0259a 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -6,6 +6,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="qemu-virt32" CONFIG_SYS_MONITOR_LEN=786432 +CONFIG_SPL_BSS_START_ADDR=0x84000000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x80200000 CONFIG_TARGET_QEMU_VIRT=y @@ -18,7 +19,6 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_MAX_SIZE=0x100000 -CONFIG_SPL_BSS_START_ADDR=0x84000000 CONFIG_SPL_SYS_MALLOC=y # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index f663a13770a..220b5fed6ae 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -5,6 +5,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="qemu-virt64" +CONFIG_SPL_BSS_START_ADDR=0x84000000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x80200000 CONFIG_TARGET_QEMU_VIRT=y @@ -17,7 +18,6 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_MAX_SIZE=0x100000 -CONFIG_SPL_BSS_START_ADDR=0x84000000 CONFIG_SPL_SYS_MALLOC=y # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/quartz64-a-rk3566_defconfig b/configs/quartz64-a-rk3566_defconfig index fef80439d89..535e34fb990 100644 --- a/configs/quartz64-a-rk3566_defconfig +++ b/configs/quartz64-a-rk3566_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SPL_GPIO=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3566-quartz64-a" diff --git a/configs/quartz64-b-rk3566_defconfig b/configs/quartz64-b-rk3566_defconfig index bb541ed1af6..e197defd3af 100644 --- a/configs/quartz64-b-rk3566_defconfig +++ b/configs/quartz64-b-rk3566_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3566-quartz64-b" diff --git a/configs/quartzpro64-rk3588_defconfig b/configs/quartzpro64-rk3588_defconfig index b2a66d3f2db..33cbda88285 100644 --- a/configs/quartzpro64-rk3588_defconfig +++ b/configs/quartzpro64-rk3588_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588-quartzpro64" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y @@ -19,7 +18,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-quartzpro64.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -64,7 +62,6 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y CONFIG_SPL_PINCTRL=y -CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_SCSI=y diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index 62fa7e1133c..09ea1c54f13 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -9,12 +9,15 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x700000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77970-eagle-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77970-eagle" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_EAGLE=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SPL_STACK=0xe6304000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xe631f000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y @@ -25,9 +28,6 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77970-eagle. CONFIG_DEFAULT_FDT_FILE="r8a77970-eagle.dtb" CONFIG_SYS_PBSIZE=2068 CONFIG_SYS_MALLOC_BOOTPARAMS=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xe631f000 -CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/r8a77970_v3msk_defconfig b/configs/r8a77970_v3msk_defconfig index b34087293ad..089c7544e5e 100644 --- a/configs/r8a77970_v3msk_defconfig +++ b/configs/r8a77970_v3msk_defconfig @@ -9,13 +9,16 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x700000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77970-v3msk-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77970-v3msk" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_R8A77970=y CONFIG_TARGET_V3MSK=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SPL_STACK=0xe6304000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xe631f000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y @@ -25,9 +28,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_DEFAULT_FDT_FILE="r8a77970-v3msk.dtb" CONFIG_SYS_PBSIZE=2068 CONFIG_SYS_MALLOC_BOOTPARAMS=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xe631f000 -CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index 8a501950364..9f5212f93d8 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -8,12 +8,15 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x700000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77980-condor-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77980-condor" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_CONDOR=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SPL_STACK=0xe6304000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xe631f000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y @@ -25,9 +28,6 @@ CONFIG_DEFAULT_FDT_FILE="r8a77980-condor.dtb" CONFIG_SYS_PBSIZE=2068 # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xe631f000 -CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/r8a77980_v3hsk_defconfig b/configs/r8a77980_v3hsk_defconfig index 8d67b7f6bfe..8c85f42ed42 100644 --- a/configs/r8a77980_v3hsk_defconfig +++ b/configs/r8a77980_v3hsk_defconfig @@ -8,13 +8,16 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x700000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77980-v3hsk-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77980-v3hsk" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_R8A77980=y CONFIG_TARGET_V3HSK=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SPL_STACK=0xe6304000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xe631f000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y @@ -24,9 +27,6 @@ CONFIG_DEFAULT_FDT_FILE="r8a77980-v3hsk.dtb" CONFIG_SYS_PBSIZE=2068 # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xe631f000 -CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index 28fa30e31e5..3960a250d9e 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -8,12 +8,15 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77990-ebisu-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77990-ebisu" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_EBISU=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SPL_STACK=0xe6304000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xe631f000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_BASE=0x00000000 @@ -26,9 +29,6 @@ CONFIG_DEFAULT_FDT_FILE="r8a77990-ebisu.dtb" CONFIG_SYS_PBSIZE=2068 # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xe631f000 -CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index 644320632a9..01f5b135959 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -8,12 +8,15 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77995-draak-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77995-draak" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_DRAAK=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SPL_STACK=0xe6304000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xe631f000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_BASE=0x00000000 @@ -25,9 +28,6 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77995-draak. CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb" CONFIG_SYS_PBSIZE=2068 CONFIG_SYS_MALLOC_BOOTPARAMS=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xe631f000 -CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig index 04a5600960d..40097f9dc34 100644 --- a/configs/r8a779a0_falcon_defconfig +++ b/configs/r8a779a0_falcon_defconfig @@ -8,7 +8,7 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC00000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a779a0-falcon-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a779a0-falcon" CONFIG_RCAR_GEN4=y CONFIG_TARGET_FALCON=y CONFIG_SYS_MONITOR_LEN=1048576 diff --git a/configs/r8a779f0_spider_defconfig b/configs/r8a779f0_spider_defconfig index 54e0928debb..9ab46a4d5e0 100644 --- a/configs/r8a779f0_spider_defconfig +++ b/configs/r8a779f0_spider_defconfig @@ -6,7 +6,7 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0xD00000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a779f0-spider-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a779f0-spider" CONFIG_RCAR_GEN4=y CONFIG_TARGET_SPIDER=y CONFIG_SYS_MONITOR_LEN=1048576 diff --git a/configs/r8a779g0_whitehawk_defconfig b/configs/r8a779g0_whitehawk_defconfig index 1489c327c41..abc9a3ba611 100644 --- a/configs/r8a779g0_whitehawk_defconfig +++ b/configs/r8a779g0_whitehawk_defconfig @@ -5,7 +5,7 @@ CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a779g0-white-hawk-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a779g0-white-hawk" CONFIG_RCAR_GEN4=y CONFIG_TARGET_WHITEHAWK=y CONFIG_SYS_MONITOR_LEN=1048576 diff --git a/configs/r8a779h0_grayhawk_defconfig b/configs/r8a779h0_grayhawk_defconfig index 84401eb9309..6bd872f063f 100644 --- a/configs/r8a779h0_grayhawk_defconfig +++ b/configs/r8a779h0_grayhawk_defconfig @@ -5,7 +5,7 @@ CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a779h0-gray-hawk-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="r8a779h0-gray-hawk" CONFIG_RCAR_GEN4=y CONFIG_TARGET_GRAYHAWK=y CONFIG_SYS_MONITOR_LEN=1048576 @@ -39,6 +39,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y +# CONFIG_OF_UPSTREAM is not set CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_PART=2 diff --git a/configs/radxa-cm3-io-rk3566_defconfig b/configs/radxa-cm3-io-rk3566_defconfig index bf61db44d3a..d23ab57ada5 100644 --- a/configs/radxa-cm3-io-rk3566_defconfig +++ b/configs/radxa-cm3-io-rk3566_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3566-radxa-cm3-io" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/radxa-e25-rk3568_defconfig b/configs/radxa-e25-rk3568_defconfig index 43aa8ec20e4..dbb77b85f5d 100644 --- a/configs/radxa-e25-rk3568_defconfig +++ b/configs/radxa-e25-rk3568_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-radxa-e25" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig index a69bb4381ca..45d2446b8a1 100644 --- a/configs/rcar3_salvator-x_defconfig +++ b/configs/rcar3_salvator-x_defconfig @@ -6,12 +6,15 @@ CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77950-salvator-x-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77951-salvator-x" CONFIG_SPL_TEXT_BASE=0xe6338000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_SALVATOR_X=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SPL_STACK=0xe6304000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xe633f000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_PCI=y CONFIG_REMAKE_ELF=y @@ -21,13 +24,10 @@ CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-salvator-x.dtb; booti 0x48080000 - 0x48000000" -CONFIG_DEFAULT_FDT_FILE="r8a77950-salvator-x.dtb" +CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77951-salvator-x.dtb; booti 0x48080000 - 0x48000000" +CONFIG_DEFAULT_FDT_FILE="r8a77951-salvator-x.dtb" CONFIG_SYS_PBSIZE=2068 CONFIG_SYS_MALLOC_BOOTPARAMS=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xe633f000 -CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -48,7 +48,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y -CONFIG_OF_LIST="r8a77950-salvator-x-u-boot r8a77960-salvator-x-u-boot r8a77965-salvator-x-u-boot" +CONFIG_OF_LIST="renesas/r8a77951-salvator-x renesas/r8a77960-salvator-x renesas/r8a77965-salvator-x" CONFIG_MULTI_DTB_FIT_LZO=y CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y CONFIG_OF_DTB_PROPS_REMOVE=y diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index 5bd36979423..b5d81219246 100644 --- a/configs/rcar3_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -7,12 +7,15 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77950-ulcb-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77951-ulcb" CONFIG_SPL_TEXT_BASE=0xe6338000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_ULCB=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SPL_STACK=0xe6304000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xe633f000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_BASE=0x00000000 @@ -20,13 +23,10 @@ CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-ulcb.dtb; booti 0x48080000 - 0x48000000" -CONFIG_DEFAULT_FDT_FILE="r8a77950-ulcb.dtb" +CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77951-ulcb.dtb; booti 0x48080000 - 0x48000000" +CONFIG_DEFAULT_FDT_FILE="r8a77951-ulcb.dtb" CONFIG_SYS_PBSIZE=2068 CONFIG_SYS_MALLOC_BOOTPARAMS=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xe633f000 -CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -46,7 +46,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y -CONFIG_OF_LIST="r8a77950-ulcb-u-boot r8a77960-ulcb-u-boot r8a77965-ulcb-u-boot" +CONFIG_OF_LIST="renesas/r8a77951-ulcb renesas/r8a77960-ulcb renesas/r8a77965-ulcb" CONFIG_MULTI_DTB_FIT_LZO=y CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y CONFIG_OF_DTB_PROPS_REMOVE=y diff --git a/configs/renesas_rzg2l_smarc_defconfig b/configs/renesas_rzg2l_smarc_defconfig index e4e597f995a..7a1224b3f07 100644 --- a/configs/renesas_rzg2l_smarc_defconfig +++ b/configs/renesas_rzg2l_smarc_defconfig @@ -9,7 +9,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x80000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r9a07g044l2-smarc" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r9a07g044l2-smarc" CONFIG_RZG2L=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SYS_LOAD_ADDR=0x58000000 diff --git a/configs/ringneck-px30_defconfig b/configs/ringneck-px30_defconfig index b314636b4d9..67a44eda684 100644 --- a/configs/ringneck-px30_defconfig +++ b/configs/ringneck-px30_defconfig @@ -17,9 +17,13 @@ CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_RINGNECK_PX30=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_SPL_STACK=0x400000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_STACK_R=y CONFIG_DEBUG_UART_BASE=0xFF030000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 @@ -35,14 +39,10 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x4000000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 CONFIG_SPL_ATF=y diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig index 5e8f51ec01e..ef58bd65753 100644 --- a/configs/roc-cc-rk3308_defconfig +++ b/configs/roc-cc-rk3308_defconfig @@ -2,10 +2,11 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y +CONFIG_SPL_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="rk3308-roc-cc" +CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3308=y -CONFIG_SPL_DRIVERS_MISC=y CONFIG_TARGET_ROC_RK3308_CC=y CONFIG_DEBUG_UART_BASE=0xFF0C0000 CONFIG_DEBUG_UART_CLOCK=24000000 @@ -14,32 +15,23 @@ CONFIG_DEBUG_UART=y CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y -CONFIG_BOOTDELAY=0 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3308-roc-cc.dtb" -CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set -CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 -# CONFIG_CMD_BDI is not set -# CONFIG_CMD_CONSOLE is not set -# CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMI is not set -# CONFIG_CMD_XIMG is not set +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y -# CONFIG_CMD_LOADB is not set -# CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y CONFIG_CMD_USB_MASS_STORAGE=y -# CONFIG_CMD_ITEST is not set -# CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_SLEEP is not set -# CONFIG_SPL_DOS_PARTITION is not set -# CONFIG_ISO_PARTITION is not set -CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 +CONFIG_CMD_RNG=y +CONFIG_CMD_KASLRSEED=y +CONFIG_CMD_REGULATOR=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_REGMAP=y CONFIG_SYSCON=y @@ -50,26 +42,30 @@ CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH_PHY=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y -CONFIG_PHY=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PINCTRL=y CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y +CONFIG_SPL_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSINFO=y CONFIG_SYSRESET=y CONFIG_USB=y +CONFIG_DM_USB_GADGET=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y -CONFIG_USB_DWC2=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_SPL_TINY_MEMSET=y +CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_LZO=y CONFIG_ERRNO_STR=y -# CONFIG_EFI_LOADER is not set diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig index 6526d2606e7..1dbd39e6b5e 100644 --- a/configs/roc-cc-rk3328_defconfig +++ b/configs/roc-cc-rk3328_defconfig @@ -62,6 +62,7 @@ CONFIG_DM_ETH_PHY=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_HDMI=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y @@ -94,6 +95,10 @@ CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_DWC2=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y +CONFIG_VIDEO=y +CONFIG_DISPLAY=y +CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_SPL_TINY_MEMSET=y CONFIG_TPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig index c161bc974fb..b06b57fe0bf 100644 --- a/configs/rock-3a-rk3568_defconfig +++ b/configs/rock-3a-rk3568_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3568-rock-3a" diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index bca44beca12..315b8b853fc 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -3,25 +3,30 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4a" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y +CONFIG_ROCKCHIP_SPI_IMAGE=y CONFIG_TARGET_ROCKPI4_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_PCI=y CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_SPL_FIT_SIGNATURE=y -CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4a.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL=y CONFIG_CMD_BOOTZ=y @@ -40,14 +45,20 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DFU_MMC=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_XTX=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_NVME_PCI=y @@ -61,6 +72,7 @@ CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y @@ -81,7 +93,6 @@ CONFIG_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y -CONFIG_SPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y CONFIG_EFI_CAPSULE_ON_DISK=y CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y diff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig index 695effcb0c5..4c09b9137ef 100644 --- a/configs/rock-pi-n8-rk3288_defconfig +++ b/configs/rock-pi-n8-rk3288_defconfig @@ -17,6 +17,8 @@ CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_EVB_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_STACK=0xff718000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 @@ -29,8 +31,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_SPL=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/rock-pi-s-rk3308_defconfig b/configs/rock-pi-s-rk3308_defconfig index 1e9cd2c0fc7..37a124eae18 100644 --- a/configs/rock-pi-s-rk3308_defconfig +++ b/configs/rock-pi-s-rk3308_defconfig @@ -6,7 +6,6 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3308-rock-pi-s" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3308=y -CONFIG_SPL_DRIVERS_MISC=y CONFIG_TARGET_EVB_RK3308=y CONFIG_DEBUG_UART_BASE=0xFF0A0000 CONFIG_DEBUG_UART_CLOCK=24000000 @@ -17,30 +16,22 @@ CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3308-rock-pi-s.dtb" -CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set -CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 -# CONFIG_CMD_BDI is not set -# CONFIG_CMD_CONSOLE is not set -# CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMI is not set -# CONFIG_CMD_XIMG is not set +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y -# CONFIG_CMD_LOADB is not set -# CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y CONFIG_CMD_USB_MASS_STORAGE=y -# CONFIG_CMD_ITEST is not set -# CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_SLEEP is not set -# CONFIG_SPL_DOS_PARTITION is not set -# CONFIG_ISO_PARTITION is not set -CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 +CONFIG_CMD_RNG=y +CONFIG_CMD_KASLRSEED=y +CONFIG_CMD_REGULATOR=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_REGMAP=y CONFIG_SYSCON=y @@ -51,9 +42,11 @@ CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH_PHY=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y -CONFIG_PHY=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PINCTRL=y CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y @@ -62,15 +55,15 @@ CONFIG_RAM=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSINFO=y CONFIG_SYSRESET=y CONFIG_USB=y +CONFIG_DM_USB_GADGET=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y -CONFIG_USB_DWC2=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_SPL_TINY_MEMSET=y +CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_LZO=y CONFIG_ERRNO_STR=y -# CONFIG_EFI_LOADER is not set diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index 3ebfb4ed436..2f6799c7b6a 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_ROCK2=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_STACK=0xff718000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 @@ -30,8 +32,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/rock5a-rk3588s_defconfig b/configs/rock5a-rk3588s_defconfig index ebe2d4a2d81..01df911d9dc 100644 --- a/configs/rock5a-rk3588s_defconfig +++ b/configs/rock5a-rk3588s_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588s-rock-5a" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y @@ -16,7 +15,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-rock-5a.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig index 58c7c44fb4f..9e14b14af7c 100644 --- a/configs/rock5b-rk3588_defconfig +++ b/configs/rock5b-rk3588_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588-rock-5b" @@ -24,7 +23,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rock-5b.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -75,7 +73,6 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y CONFIG_SPL_PINCTRL=y -CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_SCSI=y @@ -102,7 +99,6 @@ CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_PRODUCT_NUM=0x350b CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_ERRNO_STR=y diff --git a/configs/rock_defconfig b/configs/rock_defconfig index b3fa76feb6b..2b5334c3c25 100644 --- a/configs/rock_defconfig +++ b/configs/rock_defconfig @@ -18,6 +18,8 @@ CONFIG_ROCKCHIP_RK3188=y CONFIG_TARGET_ROCK=y CONFIG_SPL_STACK_R_ADDR=0x60080000 CONFIG_SPL_STACK=0x10087fff +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_DEBUG_UART_BASE=0x20064000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x60800800 @@ -30,8 +32,6 @@ CONFIG_SPL_MAX_SIZE=0x7800 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y diff --git a/configs/rut_defconfig b/configs/rut_defconfig index be0080804b9..7e78f1d6491 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_RUT=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_SPL_BSS_START_ADDR=0x80000000 CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y @@ -37,7 +38,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y -CONFIG_SPL_BSS_START_ADDR=0x80000000 CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80208000 diff --git a/configs/rzg2_beacon_defconfig b/configs/rzg2_beacon_defconfig index f4b63adb41e..4aabb1fe03e 100644 --- a/configs/rzg2_beacon_defconfig +++ b/configs/rzg2_beacon_defconfig @@ -5,7 +5,7 @@ CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-beacon-rzg2m-kit" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a774a1-beacon-rzg2m-kit" CONFIG_RCAR_GEN3=y CONFIG_TARGET_BEACON_RZG2M=y CONFIG_SYS_MONITOR_LEN=1048576 @@ -39,7 +39,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y -CONFIG_OF_LIST="r8a774a1-beacon-rzg2m-kit r8a774b1-beacon-rzg2n-kit r8a774e1-beacon-rzg2h-kit" +CONFIG_OF_LIST="renesas/r8a774a1-beacon-rzg2m-kit renesas/r8a774b1-beacon-rzg2n-kit renesas/r8a774e1-beacon-rzg2h-kit" CONFIG_MULTI_DTB_FIT_LZO=y CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y CONFIG_ENV_OVERWRITE=y diff --git a/configs/rzn1_snarc_defconfig b/configs/rzn1_snarc_defconfig index 29a96d1aefe..c7f3e2749a0 100644 --- a/configs/rzn1_snarc_defconfig +++ b/configs/rzn1_snarc_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_ALT_MEMTEST=y # CONFIG_SYS_ALT_MEMTEST_BITFLIP is not set CONFIG_CMD_CLK=y CONFIG_OF_CONTROL=y +# CONFIG_OF_UPSTREAM is not set CONFIG_RAM=y CONFIG_CADENCE_DDR_CTRL=y CONFIG_SYS_NS16550=y diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig index 6637d158248..283c9300c56 100644 --- a/configs/sama5d27_giantboard_defconfig +++ b/configs/sama5d27_giantboard_defconfig @@ -20,6 +20,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x218000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 @@ -44,9 +47,6 @@ CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index b8c794c0985..89622c0e2a2 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -20,6 +20,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x218000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 @@ -41,9 +44,6 @@ CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 03448ecbb0a..ef6f9fb7946 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -21,6 +21,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x218000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 @@ -42,9 +45,6 @@ CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index 349f3a7dd87..0693a5b5053 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -21,6 +21,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x218000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 @@ -40,9 +43,6 @@ CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index 25e95d596b0..89a5bcdfac8 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -19,6 +19,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x218000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 @@ -41,9 +44,6 @@ CONFIG_SYS_PBSIZE=276 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index 9c319d2ac7d..a07044578a8 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -19,6 +19,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x218000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 @@ -41,9 +44,6 @@ CONFIG_SYS_PBSIZE=276 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index faf1f4315bb..6b9fa27de63 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -19,6 +19,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x218000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=83000000 @@ -41,9 +44,6 @@ CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index 90e64bf3ff6..e2423475cbf 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -20,6 +20,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x218000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 @@ -41,9 +44,6 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x10000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index c9b8681ed8b..40d98584098 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -21,6 +21,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x218000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 @@ -43,9 +46,6 @@ CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index d1cdb90e8e7..36aaa83fcb8 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -21,6 +21,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x218000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 @@ -44,9 +47,6 @@ CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 4807f4f99be..9fd254e911e 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -23,6 +23,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x218000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 @@ -45,9 +48,6 @@ CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x10000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index 7d0ed1befa3..5fb7aa6c84a 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -20,6 +20,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x318000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 @@ -40,9 +43,6 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 756ffd1419b..054e52ef73d 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -18,6 +18,9 @@ CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x318000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 @@ -37,9 +40,6 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 82541c23c4a..0072ce4c91f 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -20,6 +20,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x318000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 @@ -42,9 +45,6 @@ CONFIG_SYS_PBSIZE=276 CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index a8866648364..0c0029387ce 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -18,6 +18,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x318000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 @@ -39,9 +42,6 @@ CONFIG_SYS_PBSIZE=276 CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 25a330acd38..95624a1f884 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -22,6 +22,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x318000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 @@ -42,9 +45,6 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index 280f7ee4405..40440c56b28 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -21,6 +21,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x218000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 @@ -42,9 +45,6 @@ CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x18000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index f956104e946..abdde54f417 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -19,6 +19,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x218000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 @@ -39,9 +42,6 @@ CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x18000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 754cde68992..f814a94fbd0 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -23,6 +23,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x218000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 @@ -44,9 +47,6 @@ CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x18000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index 780b2956253..3d3cc2d9f9e 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -20,6 +20,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x218000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 @@ -42,9 +45,6 @@ CONFIG_SYS_PBSIZE=276 CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index 8f66d8eebd6..551c87ee3cc 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -18,6 +18,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x218000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 @@ -39,9 +42,6 @@ CONFIG_SYS_PBSIZE=276 CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index d132f8512d7..5b4628a32b1 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -22,6 +22,9 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x218000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 @@ -42,9 +45,6 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_MAX_SIZE=0x18000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 diff --git a/configs/sama7g54_curiosity_mmc_defconfig b/configs/sama7g54_curiosity_mmc_defconfig index fa3636828eb..00a091df0e5 100644 --- a/configs/sama7g54_curiosity_mmc_defconfig +++ b/configs/sama7g54_curiosity_mmc_defconfig @@ -117,7 +117,6 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_AT91=y CONFIG_TIMER=y CONFIG_MCHP_PIT64B_TIMER=y -CONFIG_FAT_WRITE=y CONFIG_CMD_DHRYSTONE=y # CONFIG_EFI_LOADER is not set CONFIG_PHANDLE_CHECK_SEQ=y diff --git a/configs/sama7g54_curiosity_nandflash_defconfig b/configs/sama7g54_curiosity_nandflash_defconfig index 331bb8d0fec..0b2116d0419 100644 --- a/configs/sama7g54_curiosity_nandflash_defconfig +++ b/configs/sama7g54_curiosity_nandflash_defconfig @@ -8,7 +8,6 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60044000 CONFIG_SF_DEFAULT_SPEED=50000000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama7g54_curiosity" CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig index f68171c9920..2365cc7d3bf 100644 --- a/configs/sifive_unleashed_defconfig +++ b/configs/sifive_unleashed_defconfig @@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00" CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_STACK=0x81cfe70 +CONFIG_SPL_BSS_START_ADDR=0x85000000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y @@ -30,7 +31,6 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x100000 -CONFIG_SPL_BSS_START_ADDR=0x85000000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index 7c6c5b4d5d1..47dbf1294d5 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -11,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="hifive-unmatched-a00" CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_STACK=0x81cfe60 +CONFIG_SPL_BSS_START_ADDR=0x85000000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y @@ -36,7 +37,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ID_EEPROM=y CONFIG_PCI_INIT_R=y CONFIG_SPL_MAX_SIZE=0x100000 -CONFIG_SPL_BSS_START_ADDR=0x85000000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/silinux_ek874_defconfig b/configs/silinux_ek874_defconfig index 0f0aca36ee6..4c6009dbe45 100644 --- a/configs/silinux_ek874_defconfig +++ b/configs/silinux_ek874_defconfig @@ -9,12 +9,15 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3F0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a774c0-ek874-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a774c0-ek874" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_SILINUX_EK874=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SPL_STACK=0xe6304000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xe631f000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y @@ -27,9 +30,6 @@ CONFIG_DEFAULT_FDT_FILE="r8a774c0-ek874.dtb" CONFIG_SYS_PBSIZE=2068 # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xe631f000 -CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 939ccc9c478..2e4fab8ac54 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -16,7 +16,7 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7794-silk-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7794-silk" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RENESAS_BOARD_STRING="Silk" CONFIG_R8A7794=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index 66685230982..af08354e601 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -19,6 +19,9 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb" CONFIG_SPL_STACK=0x301000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SYS_LOAD_ADDR=0x22000000 @@ -37,9 +40,6 @@ CONFIG_SYS_PBSIZE=537 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x1000 CONFIG_SPL_PAD_TO=0x20000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x460000 diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig index 1afc6daf9e6..0243b15f31c 100644 --- a/configs/sniper_defconfig +++ b/configs/sniper_defconfig @@ -10,6 +10,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_SNIPER=y CONFIG_SPL_STACK=0x4020fffc +CONFIG_SPL_BSS_START_ADDR=0x80000000 CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="setenv boot_mmc_part ${kernel_mmc_part}; if test reboot-${reboot-mode} = reboot-r; then echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; if test reboot-${reboot-mode} = reboot-b; then echo fastboot; fastboot 0; fi; part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; mmc dev ${boot_mmc_dev}; mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && bootm ${kernel_addr_r};" @@ -17,7 +18,6 @@ CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=538 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SPL_MAX_SIZE=0xec00 -CONFIG_SPL_BSS_START_ADDR=0x80000000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/socfpga_agilex5_defconfig b/configs/socfpga_agilex5_defconfig index f39954aea88..dc1cef3754e 100644 --- a/configs/socfpga_agilex5_defconfig +++ b/configs/socfpga_agilex5_defconfig @@ -1,55 +1,55 @@ CONFIG_ARM=y -CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds" -CONFIG_SYS_SPI_U_BOOT_OFFS=0x04000000 CONFIG_ARCH_SOCFPGA=y CONFIG_TEXT_BASE=0x80200000 -CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80300000 +CONFIG_SF_DEFAULT_MODE=0x2003 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_OFFSET=0x04100000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex5_socdk" +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0x7f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0xbff00000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_TARGET_SOCFPGA_AGILEX5_SOCDK=y CONFIG_IDENT_STRING="socfpga_agilex5" CONFIG_SPL_FS_FAT=y -CONFIG_DISTRO_DEFAULTS=y +CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x82000000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DISTRO_DEFAULTS=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 initrd=0x90000000 root=/dev/ram0 rw init=/sbin/init ramdisk_size=10000000 earlycon panic=-1 nosmp kvm-arm.mode=nvhe" -CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_SPL_MAX_SIZE=0x40000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -CONFIG_SPL_CRC32=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_CACHE=y +CONFIG_SPL_SPI_FLASH_MTD=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x04000000 CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX5 # " +CONFIG_SYS_MAXARGS=32 CONFIG_CMD_NVEDIT_SELECT=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -CONFIG_DOS_PARTITION=y -CONFIG_SPL_DOS_PARTITION=y -CONFIG_SPL_SYS_DISABLE_DCACHE_OPS=y CONFIG_CMD_MTD=y -# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_CMD_SPI=y CONFIG_CMD_USB=y +CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y -CONFIG_SPL_SPI_FLASH_MTD=y -CONFIG_SPI_FLASH_MTD=y -CONFIG_SPL_MTD_SUPPORT=y +CONFIG_CMD_TIMER=y CONFIG_CMD_UBI=y -CONFIG_CMD_UBIFS=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MTD_UBI_BEB_LIMIT=20 # CONFIG_ISO_PARTITION is not set # CONFIG_EFI_PARTITION is not set CONFIG_OF_LIST="" @@ -57,60 +57,34 @@ CONFIG_ENV_IS_IN_UBI=y CONFIG_ENV_UBI_PART="root" CONFIG_ENV_UBI_VOLUME="env" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="kernel.itb" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_ALTERA_SDRAM=y -CONFIG_FPGA_INTEL_PR=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y CONFIG_MISC=y -CONFIG_MTD=y CONFIG_DM_MTD=y -CONFIG_SF_DEFAULT_MODE=0x2003 CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_UBI_SILENCE_MSG=y -CONFIG_DM_ETH=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y CONFIG_RGMII=y -CONFIG_DM_RESET=y CONFIG_SYS_NS16550_MEM32=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y +CONFIG_TIMER=y +CONFIG_DESIGNWARE_APB_TIMER=y CONFIG_USB=y -CONFIG_USB_DWC2=y CONFIG_USB_XHCI_HCD=y -CONFIG_UBIFS_SILENCE_MSG=y +CONFIG_USB_DWC2=y +# CONFIG_WATCHDOG_AUTOSTART is not set +CONFIG_DESIGNWARE_WATCHDOG=y +CONFIG_WDT=y # CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_PANIC_HANG=y -CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_LOAD_ADDR=0x82000000 -CONFIG_WDT=y -CONFIG_CMD_WDT=y -CONFIG_DESIGNWARE_WATCHDOG=y -CONFIG_SPL_WDT=y -CONFIG_WATCHDOG_AUTOSTART=n -CONFIG_TIMER=y -CONFIG_DESIGNWARE_APB_TIMER=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80300000 -CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xbff00000 -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x7f000 -CONFIG_SYS_SPL_MALLOC=y -CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y -CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xbfa00000 -CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 -CONFIG_SPL_BSS_MAX_SIZE=0x100000 +CONFIG_SPL_CRC32=y # CONFIG_EFI_LOADER is not set -CONFIG_I3C=y -CONFIG_DW_I3C_MASTER=y -CONFIG_CMD_I3C=y -CONFIG_SYS_MAXARGS=32 -CONFIG_CMD_TIMER=y -# CONFIG_BOOTFILE="Image" is not set for CONFIG_SPL_ATF=y -CONFIG_USE_BOOTFILE=y -CONFIG_BOOTFILE="kernel.itb" diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index ad4cb231345..4fc5c7918b9 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -15,6 +15,9 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_DM_RESET=y CONFIG_SPL_STACK=0xffe3f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3ff00000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y CONFIG_IDENT_STRING="socfpga_agilex" CONFIG_SPL_FS_FAT=y @@ -32,9 +35,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SYS_PBSIZE=2082 CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x3ff00000 -CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index 25fac3126b1..03d15efb52c 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -14,6 +14,9 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_DM_RESET=y CONFIG_SPL_STACK=0xffe3f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3ff00000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y CONFIG_IDENT_STRING="socfpga_agilex" CONFIG_SPL_FS_FAT=y @@ -30,9 +33,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot" CONFIG_SYS_PBSIZE=2082 CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x3ff00000 -CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index c15cc5b3de4..83a808fe927 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -15,6 +15,9 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_DM_RESET=y CONFIG_SPL_STACK=0xffe3f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3ff00000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SOCFPGA_SECURE_VAB_AUTH=y CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y CONFIG_IDENT_STRING="socfpga_agilex" @@ -33,9 +36,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SYS_PBSIZE=2082 CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x3ff00000 -CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/socfpga_chameleonv3_defconfig b/configs/socfpga_chameleonv3_defconfig index 7506aa8d329..029833675b4 100644 --- a/configs/socfpga_chameleonv3_defconfig +++ b/configs/socfpga_chameleonv3_defconfig @@ -6,8 +6,8 @@ CONFIG_ENV_OFFSET=0x4400 CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_chameleonv3_480_2" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_SPL_DRIVERS_MISC=y -CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM=y +CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y CONFIG_SPL_FS_FAT=y CONFIG_FIT=y CONFIG_SPL_FIT=y diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index 923c202e0b3..2cf67167e9b 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -15,6 +15,9 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_DM_RESET=y CONFIG_SPL_STACK=0xffe3f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3ff00000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y CONFIG_IDENT_STRING="socfpga_n5x" CONFIG_SPL_FS_FAT=y @@ -31,9 +34,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SYS_PBSIZE=2079 CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x3ff00000 -CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index e856b04679b..967f7562b17 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -14,6 +14,9 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_DM_RESET=y CONFIG_SPL_STACK=0xffe3f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3ff00000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y CONFIG_IDENT_STRING="socfpga_n5x" CONFIG_SPL_FS_FAT=y @@ -27,9 +30,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot" CONFIG_SYS_PBSIZE=2079 CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x3ff00000 -CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index 0f103334b99..53bdb4cbbf9 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -15,6 +15,9 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_DM_RESET=y CONFIG_SPL_STACK=0xffe3f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3ff00000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SOCFPGA_SECURE_VAB_AUTH=y CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y CONFIG_IDENT_STRING="socfpga_n5x" @@ -32,9 +35,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SYS_PBSIZE=2079 CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x3ff00000 -CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index 92a8b2ef7f7..6d126a62a9b 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -15,6 +15,9 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_DM_RESET=y CONFIG_SPL_STACK=0xffe3f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3ff00000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y CONFIG_IDENT_STRING="socfpga_stratix10" CONFIG_SPL_FS_FAT=y @@ -32,9 +35,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" CONFIG_SYS_PBSIZE=2085 CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x3ff00000 -CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index de4c8fe31b8..be7f747a7ed 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -14,6 +14,9 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_DM_RESET=y CONFIG_SPL_STACK=0xffe3f000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3ff00000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y CONFIG_IDENT_STRING="socfpga_stratix10" CONFIG_SPL_FS_FAT=y @@ -32,9 +35,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot" CONFIG_SYS_PBSIZE=2085 CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x3ff00000 -CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/soquartz-blade-rk3566_defconfig b/configs/soquartz-blade-rk3566_defconfig index b9ac6b9f33d..9d565c162ef 100644 --- a/configs/soquartz-blade-rk3566_defconfig +++ b/configs/soquartz-blade-rk3566_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3566-soquartz-blade" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/soquartz-cm4-rk3566_defconfig b/configs/soquartz-cm4-rk3566_defconfig index e87a6392c52..fe2c771db71 100644 --- a/configs/soquartz-cm4-rk3566_defconfig +++ b/configs/soquartz-cm4-rk3566_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3566-soquartz-cm4" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/soquartz-model-a-rk3566_defconfig b/configs/soquartz-model-a-rk3566_defconfig index b2c1684515e..db9eee21751 100644 --- a/configs/soquartz-model-a-rk3566_defconfig +++ b/configs/soquartz-model-a-rk3566_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3566-soquartz-model-a" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/starfive_visionfive2_defconfig b/configs/starfive_visionfive2_defconfig index fa80d489f5e..3bbd1dbd67c 100644 --- a/configs/starfive_visionfive2_defconfig +++ b/configs/starfive_visionfive2_defconfig @@ -16,6 +16,8 @@ CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x8180000 +CONFIG_SPL_BSS_START_ADDR=0x8040000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y @@ -49,8 +51,6 @@ CONFIG_SYS_EEPROM_BUS_NUM=5 CONFIG_PCI_INIT_R=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x0 -CONFIG_SPL_BSS_START_ADDR=0x8040000 -CONFIG_SPL_BSS_MAX_SIZE=0x10000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig index c893e272db9..caaabf39ef3 100644 --- a/configs/stm32mp13_defconfig +++ b/configs/stm32mp13_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_STM32PROG=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 +# CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_DISTRO_DEFAULTS=y @@ -51,8 +52,17 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=-1 CONFIG_ENV_MMC_USE_DT=y +CONFIG_BUTTON=y +CONFIG_BUTTON_GPIO=y CONFIG_CLK_SCMI=y CONFIG_SET_DFU_ALT_INFO=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0xc0000000 +CONFIG_FASTBOOT_BUF_SIZE=0x02000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_FASTBOOT_CMD_OEM_PARTCONF=y CONFIG_GPIO_HOG=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_STM32F7=y @@ -92,7 +102,6 @@ CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics" CONFIG_USB_GADGET_VENDOR_NUM=0x0483 CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_ERRNO_STR=y # CONFIG_LMB_USE_MAX_REGIONS is not set CONFIG_LMB_MEMORY_REGIONS=2 diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 005f1d55f80..2e22bf86000 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -97,6 +97,8 @@ CONFIG_TFTP_TSIZE=y CONFIG_USE_SERVERIP=y CONFIG_SERVERIP="192.168.1.1" CONFIG_STM32_ADC=y +CONFIG_BUTTON=y +CONFIG_BUTTON_GPIO=y CONFIG_SET_DFU_ALT_INFO=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0xC0000000 diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 3302b306996..ffe7512650e 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -69,6 +69,8 @@ CONFIG_TFTP_TSIZE=y CONFIG_USE_SERVERIP=y CONFIG_SERVERIP="192.168.1.1" CONFIG_STM32_ADC=y +CONFIG_BUTTON=y +CONFIG_BUTTON_GPIO=y CONFIG_CLK_SCMI=y CONFIG_SET_DFU_ALT_INFO=y CONFIG_USB_FUNCTION_FASTBOOT=y diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index eb6e367b901..8442f0bfe94 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -164,6 +164,8 @@ CONFIG_DM_USB_GADGET=y CONFIG_SPL_DM_USB_GADGET=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_DWC2=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index ab92924a9b4..91b64f7537a 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -164,6 +164,8 @@ CONFIG_DM_USB_GADGET=y CONFIG_SPL_DM_USB_GADGET=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_DWC2=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 84b0854b557..74deaaba2e4 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -70,6 +70,8 @@ CONFIG_TFTP_TSIZE=y CONFIG_USE_SERVERIP=y CONFIG_SERVERIP="192.168.1.1" CONFIG_STM32_ADC=y +CONFIG_BUTTON=y +CONFIG_BUTTON_GPIO=y CONFIG_CLK_SCMI=y CONFIG_SET_DFU_ALT_INFO=y CONFIG_USB_FUNCTION_FASTBOOT=y diff --git a/configs/stout_defconfig b/configs/stout_defconfig index 1022ee9e71a..ee87ea53d6e 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -16,7 +16,7 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7790-stout-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7790-stout" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RENESAS_BOARD_STRING="Stout" CONFIG_R8A7790=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 0d547d1a323..f96ab04e91f 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -9,6 +9,10 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynq-syzygy-hub" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL_STACK=0xfffffe00 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x100000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 +CONFIG_SPL_STACK_R=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_DEBUG_UART=y @@ -25,11 +29,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_PBSIZE=2071 CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x100000 -CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x2000000 CONFIG_SPL_FS_LOAD_ARGS_NAME="system.dtb" diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index 8679b905415..52d90f53dfd 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -23,6 +23,9 @@ CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" CONFIG_SPL_STACK=0x304000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x3e00 +CONFIG_SPL_BSS_MAX_SIZE=0x600 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=18432000 @@ -43,9 +46,6 @@ CONFIG_SYS_PBSIZE=281 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x3e00 CONFIG_SPL_PAD_TO=0x20000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x3e00 -CONFIG_SPL_BSS_MAX_SIZE=0x600 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index e3444fcbc23..ed468b8fe9a 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -16,6 +16,9 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable" CONFIG_SPL_TEXT_BASE=0x40004030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40020000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -33,9 +36,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x1bfd0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x40020000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_I2C=y diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index edb62945a9e..855cf414a6b 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -17,6 +17,8 @@ CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_TINKER_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_STACK=0xff718000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_SIZE_LIMIT=0x4b000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 @@ -31,8 +33,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_CMD_GPIO=y diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig index 499094b3e17..2a2e1226eb5 100644 --- a/configs/tinker-s-rk3288_defconfig +++ b/configs/tinker-s-rk3288_defconfig @@ -17,6 +17,8 @@ CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_TINKER_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x800000 CONFIG_SPL_STACK=0xff718000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x300000 CONFIG_SPL_SIZE_LIMIT=0x4b000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 @@ -31,8 +33,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x300000 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_CMD_GPIO=y diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig index 5de482a0d84..b54d2cefa10 100644 --- a/configs/tools-only_defconfig +++ b/configs/tools-only_defconfig @@ -12,10 +12,10 @@ CONFIG_FIT_SIGNATURE=y # CONFIG_BOOTSTD_FULL is not set # CONFIG_BOOTMETH_CROS is not set # CONFIG_BOOTMETH_VBE is not set -# CONFIG_BOOTM is not set CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run distro_bootcmd" # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_BOOTI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXTENSION is not set diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index 79e107f01bf..638d7306146 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -11,6 +11,10 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miami" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL_STACK=0xfffffe00 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x100000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 +CONFIG_SPL_STACK_R=y CONFIG_SPL=y CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miami/ps7_regs.txt" @@ -29,11 +33,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_PBSIZE=2077 CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x100000 -CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x2000000 CONFIG_SPL_SPI_LOAD=y diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index 0168cf8657e..af47fab83c0 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -11,6 +11,10 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamilite" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL_STACK=0xfffffe00 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x100000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 +CONFIG_SPL_STACK_R=y CONFIG_SPL=y CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamilite/ps7_regs.txt" @@ -29,11 +33,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_PBSIZE=2077 CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x100000 -CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x2000000 CONFIG_SPL_SPI_LOAD=y diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index 303096325c9..ad321749694 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -11,6 +11,10 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamiplus" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL_STACK=0xfffffe00 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x100000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 +CONFIG_SPL_STACK_R=y CONFIG_SPL=y CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamiplus/ps7_regs.txt" @@ -29,11 +33,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_PBSIZE=2077 CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x100000 -CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x2000000 CONFIG_SPL_SPI_LOAD=y diff --git a/configs/toybrick-rk3588_defconfig b/configs/toybrick-rk3588_defconfig index 6ee92e94313..76bfa50c306 100644 --- a/configs/toybrick-rk3588_defconfig +++ b/configs/toybrick-rk3588_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588-toybrick-x0" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y @@ -16,7 +15,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-toybrick-x0.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -33,8 +31,9 @@ CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -53,7 +52,7 @@ CONFIG_PHY_REALTEK=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y -CONFIG_REGULATOR_PWM=y +CONFIG_SPL_PINCTRL=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 diff --git a/configs/transformer_t30_defconfig b/configs/transformer_t30_defconfig index 61fe3d34c99..11a552d9b0d 100644 --- a/configs/transformer_t30_defconfig +++ b/configs/transformer_t30_defconfig @@ -1,5 +1,4 @@ CONFIG_ARM=y -CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SUPPORT_PASSING_ATAGS=y CONFIG_CMDLINE_TAG=y @@ -15,12 +14,13 @@ CONFIG_TEGRA30=y CONFIG_TARGET_TRANSFORMER_T30=y CONFIG_CMD_EBTUPDATE=y CONFIG_SYS_LOAD_ADDR=0x82000000 +CONFIG_BUTTON_CMD=y CONFIG_BOOTDELAY=0 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_KEYED_CTRLC=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y -CONFIG_BOOTCOMMAND="setenv skip_boot 0; setenv gpio_button 150; if run check_button; then poweroff; fi; setenv gpio_button 131; if run check_button; then bootmenu; fi; if test ${skip_boot} -eq 1; then; else run bootcmd_usb0; run bootcmd_mmc1; run bootcmd_mmc0; poweroff; fi" +CONFIG_BOOTCOMMAND="setenv boot_targets usb mmc1 mmc0; bootflow scan; poweroff" CONFIG_SYS_PBSIZE=2084 CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 @@ -71,7 +71,6 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_TPS65911=y CONFIG_PWM_TEGRA=y CONFIG_SYS_NS16550=y -CONFIG_TEGRA20_SLINK=y CONFIG_SYSRESET_TPS65910=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/turing-rk1-rk3588_defconfig b/configs/turing-rk1-rk3588_defconfig index 07f7b848529..038b14769e5 100644 --- a/configs/turing-rk1-rk3588_defconfig +++ b/configs/turing-rk1-rk3588_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588-turing-rk1" @@ -24,7 +23,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-turing-rk1.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -81,7 +79,6 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y CONFIG_SPL_PINCTRL=y -CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_SCSI=y @@ -91,7 +88,6 @@ CONFIG_ROCKCHIP_SFC=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_PCI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y @@ -109,7 +105,6 @@ CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_PRODUCT_NUM=0x350b CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_ERRNO_STR=y diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index f2b39115fef..9753e270951 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -21,6 +21,9 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-385-turris-omnia" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40023000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -46,9 +49,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x22fd0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x40023000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index 1e74d83b962..56ab20d787c 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_MONITOR_LEN=2097152 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x100000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_LOAD_ADDR=0x85000000 @@ -24,7 +25,6 @@ CONFIG_PREBOOT="env exist ${bootdev}preboot && run ${bootdev}preboot" CONFIG_LOGLEVEL=6 CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_PAD_TO=0x20000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index 0c838246953..7e1e2a9d802 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_MONITOR_LEN=2097152 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x100000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_LOAD_ADDR=0x85000000 @@ -24,7 +25,6 @@ CONFIG_PREBOOT="env exist ${bootdev}preboot && run ${bootdev}preboot" CONFIG_LOGLEVEL=6 CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_PAD_TO=0x20000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y diff --git a/configs/verdin-am62_a53_defconfig b/configs/verdin-am62_a53_defconfig index 633e9c7398e..03730b498fd 100644 --- a/configs/verdin-am62_a53_defconfig +++ b/configs/verdin-am62_a53_defconfig @@ -22,6 +22,10 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80c80000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_SIZE_LIMIT=0x40000 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x800 CONFIG_SPL_FS_FAT=y @@ -44,13 +48,9 @@ CONFIG_LOG=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x58000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x80c80000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_DMA=y diff --git a/configs/verdin-am62_r5_defconfig b/configs/verdin-am62_r5_defconfig index 5b4b81c925a..06c63fa6488 100644 --- a/configs/verdin-am62_r5_defconfig +++ b/configs/verdin-am62_r5_defconfig @@ -19,6 +19,11 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x43c3b000 +CONFIG_SPL_BSS_MAX_SIZE=0x3000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 CONFIG_SPL_SIZE_LIMIT=0x3A7F0 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500 CONFIG_SPL_LIBDISK_SUPPORT=y @@ -29,13 +34,8 @@ CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_MAX_SIZE=0x3B000 CONFIG_SPL_PAD_TO=0x0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x43c3b000 -CONFIG_SPL_BSS_MAX_SIZE=0x3000 CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index 4f1480c610c..ef7f3b1bc10 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -17,6 +17,9 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_LOAD_ADDR=0x48200000 @@ -38,9 +41,6 @@ CONFIG_LOG=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x910000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index 4490a4a19a3..fca91f7b1ee 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -23,6 +23,9 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x960000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x98fc00 +CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 @@ -49,9 +52,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x26000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x98fc00 -CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y @@ -105,8 +105,6 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=4096 CONFIG_SPL_DM=y -CONFIG_REGMAP=y -CONFIG_SYSCON=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y CONFIG_CLK_COMPOSITE_CCF=y @@ -161,7 +159,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_IMX8M_POWER_DOMAIN=y CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y CONFIG_POWER_PCA9450=y -CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPL_POWER_I2C=y diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig index 17634ffdf3c..04b093ded82 100644 --- a/configs/vocore2_defconfig +++ b/configs/vocore2_defconfig @@ -10,6 +10,8 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="vocore_vocore2" CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 +CONFIG_SPL_BSS_START_ADDR=0x80010000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SYS_LOAD_ADDR=0x80100000 @@ -35,8 +37,6 @@ CONFIG_LOGLEVEL=8 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MALLOC_BOOTPARAMS=y CONFIG_SPL_MAX_SIZE=0x10000 -CONFIG_SPL_BSS_START_ADDR=0x80010000 -CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index 02f2d74141f..42c06d1e985 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -18,6 +18,8 @@ CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_VYASA_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_STACK=0xff718000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 @@ -30,8 +32,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_OS_BOOT=y CONFIG_SPL_PAYLOAD_ARGS_ADDR=0xffe5000 CONFIG_SPL_FALCON_BOOT_MMCSD=y diff --git a/configs/x3_t30_defconfig b/configs/x3_t30_defconfig index 7af68bd9afc..c489d59ef0e 100644 --- a/configs/x3_t30_defconfig +++ b/configs/x3_t30_defconfig @@ -1,5 +1,4 @@ CONFIG_ARM=y -CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SUPPORT_PASSING_ATAGS=y CONFIG_CMDLINE_TAG=y @@ -16,12 +15,13 @@ CONFIG_TARGET_X3_T30=y CONFIG_TEGRA_ENABLE_UARTD=y CONFIG_CMD_EBTUPDATE=y CONFIG_SYS_LOAD_ADDR=0x82000000 +CONFIG_BUTTON_CMD=y CONFIG_BOOTDELAY=0 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_KEYED_CTRLC=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y -CONFIG_BOOTCOMMAND="if run check_button; then bootmenu; fi; run bootcmd_mmc1; run bootcmd_mmc0; poweroff;" +CONFIG_BOOTCOMMAND="bootflow scan; poweroff" CONFIG_SYS_PBSIZE=2084 CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 diff --git a/configs/x530_defconfig b/configs/x530_defconfig index a55379a7ccb..3cd8ef5f9f3 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -16,6 +16,9 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-385-atl-x530" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x4002c000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x40023000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -33,9 +36,6 @@ CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x22fd0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x40023000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/xilinx_mbv32_defconfig b/configs/xilinx_mbv32_defconfig index 4113409efbb..9364dcebb6f 100644 --- a/configs/xilinx_mbv32_defconfig +++ b/configs/xilinx_mbv32_defconfig @@ -6,6 +6,8 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x21200000 CONFIG_ENV_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="xilinx-mbv32" CONFIG_SPL_STACK=0x20200000 +CONFIG_SPL_BSS_START_ADDR=0x24000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SIZE_LIMIT=0x40000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0x40600000 @@ -24,8 +26,6 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_BSS_START_ADDR=0x24000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/xilinx_mbv32_smode_defconfig b/configs/xilinx_mbv32_smode_defconfig index 99381478ac5..6b57cc1b9f8 100644 --- a/configs/xilinx_mbv32_smode_defconfig +++ b/configs/xilinx_mbv32_smode_defconfig @@ -6,6 +6,8 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x21200000 CONFIG_ENV_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="xilinx-mbv32" CONFIG_SPL_STACK=0x20200000 +CONFIG_SPL_BSS_START_ADDR=0x24000000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SIZE_LIMIT=0x40000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0x40600000 @@ -25,8 +27,6 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_BSS_START_ADDR=0x24000000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig index 143d2622748..9d3924cc9cb 100644 --- a/configs/xilinx_versal_mini_defconfig +++ b/configs/xilinx_versal_mini_defconfig @@ -18,7 +18,6 @@ CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y -# CONFIG_BOOTM is not set # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_AUTOBOOT is not set CONFIG_SYS_CBSIZE=1024 @@ -34,6 +33,7 @@ CONFIG_CLOCKS=y CONFIG_SYS_PROMPT="Versal> " # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_BOOTI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_FDT is not set diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig index b0e346208e0..5c949e34442 100644 --- a/configs/xilinx_versal_mini_emmc0_defconfig +++ b/configs/xilinx_versal_mini_emmc0_defconfig @@ -15,7 +15,6 @@ CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc0" CONFIG_SYS_LOAD_ADDR=0x8000000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y -# CONFIG_BOOTM is not set # CONFIG_AUTOBOOT is not set CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1049 @@ -31,6 +30,7 @@ CONFIG_SYS_PROMPT="Versal> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_BOOTI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_FDT is not set diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig index 559b32c2a19..04cba5bc72d 100644 --- a/configs/xilinx_versal_mini_emmc1_defconfig +++ b/configs/xilinx_versal_mini_emmc1_defconfig @@ -15,7 +15,6 @@ CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc1" CONFIG_SYS_LOAD_ADDR=0x8000000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y -# CONFIG_BOOTM is not set # CONFIG_AUTOBOOT is not set CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1049 @@ -31,6 +30,7 @@ CONFIG_SYS_PROMPT="Versal> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_BOOTI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_FDT is not set diff --git a/configs/xilinx_versal_mini_ospi_defconfig b/configs/xilinx_versal_mini_ospi_defconfig index c02c6ba40db..7a110350c2c 100644 --- a/configs/xilinx_versal_mini_ospi_defconfig +++ b/configs/xilinx_versal_mini_ospi_defconfig @@ -19,7 +19,6 @@ CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_LTO=y # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y -# CONFIG_BOOTM is not set # CONFIG_AUTOBOOT is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set @@ -32,6 +31,7 @@ CONFIG_SYS_PROMPT="Versal> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_BOOTI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_FDT is not set diff --git a/configs/xilinx_versal_mini_qspi_defconfig b/configs/xilinx_versal_mini_qspi_defconfig index 4d4b59a22ff..58945a1cac9 100644 --- a/configs/xilinx_versal_mini_qspi_defconfig +++ b/configs/xilinx_versal_mini_qspi_defconfig @@ -17,7 +17,6 @@ CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_LTO=y # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y -# CONFIG_BOOTM is not set # CONFIG_AUTOBOOT is not set # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_LOGLEVEL=0 @@ -33,6 +32,7 @@ CONFIG_SYS_PROMPT="Versal> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_BOOTI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_FDT is not set diff --git a/configs/xilinx_versal_net_mini_defconfig b/configs/xilinx_versal_net_mini_defconfig index 317fc8e2e15..7dac1ec54eb 100644 --- a/configs/xilinx_versal_net_mini_defconfig +++ b/configs/xilinx_versal_net_mini_defconfig @@ -20,7 +20,6 @@ CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y -# CONFIG_BOOTM is not set # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_AUTOBOOT is not set # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set @@ -34,6 +33,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="Versal NET> " # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_BOOTI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_FDT is not set diff --git a/configs/xilinx_versal_net_mini_emmc_defconfig b/configs/xilinx_versal_net_mini_emmc_defconfig index 31c44323666..fc88eee10af 100644 --- a/configs/xilinx_versal_net_mini_emmc_defconfig +++ b/configs/xilinx_versal_net_mini_emmc_defconfig @@ -25,7 +25,7 @@ CONFIG_SYS_PROMPT="Versal NET> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set -# CONFIG_BOOTM is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_BOOTI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_FDT is not set diff --git a/configs/xilinx_versal_net_mini_ospi_defconfig b/configs/xilinx_versal_net_mini_ospi_defconfig index d0d91f98230..d78c9f80599 100644 --- a/configs/xilinx_versal_net_mini_ospi_defconfig +++ b/configs/xilinx_versal_net_mini_ospi_defconfig @@ -30,7 +30,7 @@ CONFIG_SYS_PROMPT="Versal NET> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set -# CONFIG_BOOTM is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_BOOTI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_FDT is not set diff --git a/configs/xilinx_versal_net_mini_qspi_defconfig b/configs/xilinx_versal_net_mini_qspi_defconfig index 48b6d86f9b3..b0567f857a3 100644 --- a/configs/xilinx_versal_net_mini_qspi_defconfig +++ b/configs/xilinx_versal_net_mini_qspi_defconfig @@ -31,7 +31,7 @@ CONFIG_SYS_PROMPT="Versal NET> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set -# CONFIG_BOOTM is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_BOOTI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_FDT is not set diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 708cfe96b63..f30fbdf3f64 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -10,6 +10,10 @@ CONFIG_DEFAULT_DEVICE_TREE="zynq-zc706" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL_STACK=0xfffffe00 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x100000 +CONFIG_SPL_BSS_MAX_SIZE=0x100000 +CONFIG_SPL_STACK_R=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xE40000 CONFIG_CMD_FRU=y @@ -34,11 +38,7 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_PBSIZE=2071 CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x100000 -CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x2000000 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" diff --git a/configs/xilinx_zynqmp_kria_defconfig b/configs/xilinx_zynqmp_kria_defconfig index 7af8b27be93..ba42f0c7848 100644 --- a/configs/xilinx_zynqmp_kria_defconfig +++ b/configs/xilinx_zynqmp_kria_defconfig @@ -15,6 +15,8 @@ CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_SPL_STACK=0xfffffffc +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_SIZE_LIMIT=0x2a000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x2220000 @@ -40,9 +42,7 @@ CONFIG_SYS_PBSIZE=2073 CONFIG_BOARD_EARLY_INIT_R=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_FS_LOAD_KERNEL_NAME="" CONFIG_SPL_FS_LOAD_ARGS_NAME="" CONFIG_SPL_FPGA=y diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig index 40d4a4a5859..7fdd2eee555 100644 --- a/configs/xilinx_zynqmp_mini_defconfig +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_REMAKE_ELF=y -# CONFIG_BOOTM is not set # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_AUTOBOOT is not set CONFIG_SYS_CBSIZE=1024 @@ -27,6 +26,7 @@ CONFIG_CLOCKS=y # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_BOOTI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_FDT is not set diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index 9cccf5d486f..49c7235fb8c 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc0" CONFIG_SPL_STACK=0xfffffffc CONFIG_SPL_SYS_MALLOC_F_LEN=0x600 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_REMAKE_ELF=y # CONFIG_MP is not set CONFIG_FIT=y -# CONFIG_BOOTM is not set CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_AUTOBOOT is not set CONFIG_SYS_CBSIZE=1024 @@ -27,7 +27,6 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y @@ -38,6 +37,7 @@ CONFIG_SPL_SYS_MALLOC_SIZE=0x1000000 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_BOOTI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_FDT is not set diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index 3919e23539a..1ef89f50444 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc1" CONFIG_SPL_STACK=0xfffffffc CONFIG_SPL_SYS_MALLOC_F_LEN=0x600 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_REMAKE_ELF=y # CONFIG_MP is not set CONFIG_FIT=y -# CONFIG_BOOTM is not set CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_AUTOBOOT is not set CONFIG_SYS_CBSIZE=1024 @@ -27,7 +27,6 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y @@ -38,6 +37,7 @@ CONFIG_SPL_SYS_MALLOC_SIZE=0x1000000 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_BOOTI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_FDT is not set diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index ae0c3ae7186..d2e920fc573 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_REMAKE_ELF=y # CONFIG_MP is not set CONFIG_FIT=y -# CONFIG_BOOTM is not set CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_AUTOBOOT is not set CONFIG_SYS_CBSIZE=1024 @@ -28,6 +27,7 @@ CONFIG_CLOCKS=y # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_BOOTI is not set # CONFIG_CMD_GO is not set # CONFIG_CMD_RUN is not set diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index 15d471caf70..31f647357f7 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_REMAKE_ELF=y # CONFIG_MP is not set CONFIG_FIT=y -# CONFIG_BOOTM is not set CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_AUTOBOOT is not set CONFIG_SYS_CBSIZE=1024 @@ -28,6 +27,7 @@ CONFIG_CLOCKS=y # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_BOOTI is not set # CONFIG_CMD_GO is not set # CONFIG_CMD_RUN is not set diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 071784c493b..957ae07b80e 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -10,6 +10,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe0000 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi" CONFIG_SPL_STACK=0xfffffffc +CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL=y # CONFIG_SPL_FS_FAT is not set # CONFIG_SPL_LIBDISK_SUPPORT is not set @@ -19,7 +20,6 @@ CONFIG_ZYNQMP_NO_DDR=y CONFIG_SYS_LOAD_ADDR=0x8000000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y -# CONFIG_BOOTM is not set # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_AUTOBOOT is not set # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set @@ -30,7 +30,6 @@ CONFIG_LOGLEVEL=0 # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y @@ -42,6 +41,7 @@ CONFIG_SPL_SYS_MALLOC_SIZE=0x1000000 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_BOOTI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_FDT is not set diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 18931cffbbd..ee87beb19c6 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -10,6 +10,8 @@ CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_SPL_STACK=0xfffffffc +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_STACK_R=y CONFIG_SPL_SIZE_LIMIT=0x2a000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x1E80000 @@ -34,9 +36,7 @@ CONFIG_SYS_PBSIZE=2073 CONFIG_BOARD_EARLY_INIT_R=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x20000000 diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index 982777b910c..48473d78443 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -12,6 +12,10 @@ CONFIG_ENV_SIZE=0x190 CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nand" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL_STACK=0xfffffe00 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000 +CONFIG_SPL_BSS_MAX_SIZE=0x8000 +CONFIG_SPL_STACK_R=y CONFIG_SPL=y # CONFIG_SPL_FS_FAT is not set # CONFIG_SPL_LIBDISK_SUPPORT is not set @@ -19,7 +23,6 @@ CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_REMAKE_ELF=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" -# CONFIG_BOOTM is not set # CONFIG_AUTOBOOT is not set CONFIG_USE_PREBOOT=y CONFIG_SYS_CBSIZE=1024 @@ -28,11 +31,7 @@ CONFIG_SYS_PBSIZE=1047 # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000 -CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x200000 @@ -44,6 +43,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_FDT is not set # CONFIG_CMD_GO is not set diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index 7d70dae5e9d..9f2b738d9d1 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -12,6 +12,10 @@ CONFIG_ENV_SIZE=0x190 CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nor" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL_STACK=0xfffffe00 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000 +CONFIG_SPL_BSS_MAX_SIZE=0x8000 +CONFIG_SPL_STACK_R=y CONFIG_SPL=y # CONFIG_SPL_FS_FAT is not set # CONFIG_SPL_LIBDISK_SUPPORT is not set @@ -19,7 +23,6 @@ CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_REMAKE_ELF=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" -# CONFIG_BOOTM is not set # CONFIG_AUTOBOOT is not set CONFIG_USE_PREBOOT=y CONFIG_SYS_CBSIZE=1024 @@ -28,11 +31,7 @@ CONFIG_SYS_PBSIZE=1047 # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000 -CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x200000 @@ -44,6 +43,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_FDT is not set # CONFIG_CMD_GO is not set diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index c7477aa9c61..5b861bdde18 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -13,6 +13,10 @@ CONFIG_ENV_SIZE=0x190 CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL_STACK=0xfffffe00 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x20000 +CONFIG_SPL_BSS_MAX_SIZE=0x8000 +CONFIG_SPL_STACK_R=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0x0 CONFIG_DEBUG_UART_CLOCK=0 @@ -25,7 +29,6 @@ CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" -# CONFIG_BOOTM is not set # CONFIG_AUTOBOOT is not set # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_PREBOOT=y @@ -35,11 +38,7 @@ CONFIG_SYS_PBSIZE=1047 # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x30000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x20000 -CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x200000 @@ -53,6 +52,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_FDT is not set # CONFIG_CMD_GO is not set diff --git a/doc/android/fastboot.rst b/doc/android/fastboot.rst index 9e337cae2cb..6f92cd28eb1 100644 --- a/doc/android/fastboot.rst +++ b/doc/android/fastboot.rst @@ -30,6 +30,7 @@ The following OEM commands are supported (if enabled): - ``oem bootbus`` - this executes ``mmc bootbus %x %s`` to configure eMMC - ``oem run`` - this executes an arbitrary U-Boot command - ``oem console`` - this dumps U-Boot console record buffer +- ``oem board`` - this executes a custom board function which is defined by the vendor Support for both eMMC and NAND devices is included. @@ -128,7 +129,6 @@ Boot command When executing the fastboot ``boot`` command, if ``fastboot_bootcmd`` is set then that will be executed in place of ``bootm <CONFIG_FASTBOOT_BUF_ADDR>``. -This is supported if CONFIG_CMDLINE is enabled, which it normally is. Partition Names --------------- @@ -247,6 +247,23 @@ including multiple commands (using e.g. ``;`` or ``&&``) and control structures (``if``, ``while``, etc.). The exit code of ``fastboot`` will reflect the exit code of the command you ran. +Running Custom Vendor Code +^^^^^^^^^^^^^^^^^^^^^^^^^^ + +U-Boot allows you to execute custom fastboot logic, which can be defined +in board/ files. It can still be used for production devices with verified +boot, because the vendor defines logic at compile time by implementing +fastboot_oem_board() function. The attacker will not be able to execute +custom commands / code. For example, this can be useful for custom flashing +or erasing protocols:: + + $ fastboot stage bootloader.img + $ fastboot oem board:write_bootloader + +In this case, ``cmd_parameter`` argument of the function ``fastboot_oem_board()`` +will contain string "write_bootloader" and ``data`` argument is a pointer to +fastboot input buffer, which contains the contents of bootloader.img file. + References ---------- diff --git a/doc/board/emulation/qemu-x86.rst b/doc/board/emulation/qemu-x86.rst index 4eeba46ba7a..c604e42990e 100644 --- a/doc/board/emulation/qemu-x86.rst +++ b/doc/board/emulation/qemu-x86.rst @@ -134,7 +134,7 @@ The output will be something like this:: U-Boot SPL 2023.07 (Jul 23 2023 - 08:00:12 -0600) Trying to boot from SPI - Jumping to 64-bit U-Boot + Jumping to 64-bit U-Boot: Note many features are missing U-Boot 2023.07 (Jul 23 2023 - 08:00:12 -0600) diff --git a/doc/board/index.rst b/doc/board/index.rst index f0a11f84ccc..428faa810be 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -42,6 +42,7 @@ Board-specific doc renesas/index rockchip/index samsung/index + schneider/index sielaff/index siemens/index sifive/index diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 5dd5ea7f1e2..9a726e9cde6 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -131,6 +131,8 @@ List of mainline supported Rockchip boards: - Turing Machines RK1 (turing-rk1-rk3588) - Xunlong Orange Pi 5 (orangepi-5-rk3588s) - Xunlong Orange Pi 5 Plus (orangepi-5-plus-rk3588) + - Yanyi Tech CoolPi 4 Model B (coolpi-4b-rk3588s) + - Yanyi Tech CoolPi CM5 EVB (coolpi-cm5-evb-rk3588) * rv1108 - Rockchip Evb-rv1108 (evb-rv1108) diff --git a/doc/board/schneider/hmibsc.rst b/doc/board/schneider/hmibsc.rst new file mode 100644 index 00000000000..f09fb5af1b3 --- /dev/null +++ b/doc/board/schneider/hmibsc.rst @@ -0,0 +1,45 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. sectionauthor:: Sumit Garg <sumit.garg@linaro.org> + +HMIBSC +====== + +The HMIBSC is an IIoT Edge Box Core board based on the Qualcomm APQ8016E SoC. +More information can be found on the `SE product page`_. + +U-Boot can be used as a replacement for Qualcomm's original Android bootloader +(a fork of Little Kernel/LK). Like LK, it is installed directly into the ``aboot`` +partition. Note that the U-Boot port used to be loaded as an Android boot image +through LK. This is no longer the case, now U-Boot can replace LK entirely. + +.. _SE product page: https://www.se.com/us/en/product/HMIBSCEA53D1L0T/iiot-edge-box-core-harmony-ipc-emmc-dc-linux-tpm/ + +Build steps +----------- + +First, setup ``CROSS_COMPILE`` for aarch64. Then, build U-Boot for ``hmibsc``:: + + $ export CROSS_COMPILE=<aarch64 toolchain prefix> + $ make hmibsc_defconfig + $ make + +This will build ``u-boot.elf`` in the configured output directory. + +Installation +------------ + +Although the HMIBSC does not have secure boot set up by default, the firmware +still expects firmware ELF images to be "signed". The signature does not provide +any security in this case, but it provides the firmware with some required +metadata. + +To "sign" ``u-boot.elf`` you can use e.g. `qtestsign`_:: + + $ ./qtestsign.py aboot u-boot.elf + +Then install the resulting ``u-boot-test-signed.mbn`` to the ``aboot`` partition +on your device, e.g. with ``fastboot flash aboot u-boot-test-signed.mbn``. + +U-Boot should be running after a reboot (``fastboot reboot``). + +.. _qtestsign: https://github.com/msm8916-mainline/qtestsign diff --git a/doc/board/schneider/index.rst b/doc/board/schneider/index.rst new file mode 100644 index 00000000000..55792ed3100 --- /dev/null +++ b/doc/board/schneider/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Schneider Electric +================== + +.. toctree:: + :maxdepth: 2 + + hmibsc diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst index 8d4c112f149..e44252f0fb6 100644 --- a/doc/develop/release_cycle.rst +++ b/doc/develop/release_cycle.rst @@ -19,6 +19,9 @@ Cycle as follows: * After the merge window closes, no new features may be added to allow for a release candidate phase which is intended to fix bugs and regressions. +* To help with late pull requests, the **next** branch will open when the + second release candidate is published. + *Note:* While we try to adhere to the release schedule, we will not hesitate and take the liberty to delay a release if there are good reasons, for example if there are known bugs or other technical @@ -50,8 +53,7 @@ Current Status * U-Boot v2024.04 was released on Tue 02 April 2024. -* The Merge Window for the next release (v2024.07) is **open** until the -rc1 - release on Mon 22 April 2024. +* The Merge Window for the next release (v2024.07) is **closed**. * The next branch is now **closed**. @@ -63,9 +65,9 @@ Future Releases .. The following commented out dates are for when release candidates are planned to be tagged. -.. For the next scheduled release, release candidates were made on:: +For the next scheduled release, release candidates were made on:: -.. * U-Boot v2024.07-rc1 was released on Mon 22 April 2024. +* U-Boot v2024.07-rc1 was released on Mon 22 April 2024. .. * U-Boot v2024.07-rc2 was released on Tue 06 May 2024. diff --git a/doc/device-tree-bindings/serial/msm-serial.txt b/doc/device-tree-bindings/serial/msm-serial.txt deleted file mode 100644 index dca995798a9..00000000000 --- a/doc/device-tree-bindings/serial/msm-serial.txt +++ /dev/null @@ -1,10 +0,0 @@ -Qualcomm UART (Data Mover mode) - -Required properties: -- compatible: must be "qcom,msm-uartdm-v1.4" -- reg: start address and size of the registers -- clock: interface clock (must accept baudrate as a frequency) - -Optional properties: -- bit-rate: Data Mover bit rate register value - (If not defined then 0xCC is used as default) diff --git a/doc/usage/cmd/env.rst b/doc/usage/cmd/env.rst index a7e21693a67..040076bcc03 100644 --- a/doc/usage/cmd/env.rst +++ b/doc/usage/cmd/env.rst @@ -16,18 +16,18 @@ Synopsis env default [-f] (-a | var [...]) env delete [-f] var [...] env edit name + env erase env exists name env export [-t | -b | -c] [-s size] addr [var ...] env flags env grep [-e] [-n | -v | -b] string [...] env import [-d] [-t [-r] | -b | -c] addr [size] [var ...] env info [-d] [-p] [-q] + env load env print [-a | name ...] env print -e [-guid guid] [-n] [name ...] env run var [...] env save - env erase - env load env select [target] env set [-f] name [value] env set -e [-nv][-bs][-rt][-at][-a][-i addr:size][-v] name [value] @@ -40,11 +40,12 @@ the UEFI variables. The next commands are kept as alias and for compatibility: ++ :doc:`askenv <askenv>` = *env ask* + *editenv* = *env edit* + *grepenv* = *env grep* -+ *setenv* = *env set* -+ *askenv* = *env ask* ++ :doc:`printenv <printenv>` = *env print* + *run* = *env run* ++ *setenv* = *env set* Ask ~~~ @@ -103,6 +104,11 @@ The *env edit* command edits an environment variable. name name of the variable. +Erase +~~~~~ + +The *env erase* command erases the U-Boot environment. + Exists ~~~~~~ @@ -204,6 +210,11 @@ environment information. quiet output, use only for command result, by example with 'test' command. +Load +~~~~ + +The *env load* command loads the U-Boot environment from persistent storage. + Print ~~~~~ @@ -235,16 +246,6 @@ Save The *env save* command saves the U-Boot environment in persistent storage. -Erase -~~~~~ - -The *env erase* command erases the U-Boot environment. - -Load -~~~~ - -The *env load* command loads the U-Boot environment from persistent storage. - Select ~~~~~~ @@ -350,15 +351,15 @@ edit exists CONFIG_CMD_ENV_EXISTS -flags - CONFIG_CMD_ENV_FLAGS - erase CONFIG_CMD_ERASEENV export CONFIG_CMD_EXPORTENV +flags + CONFIG_CMD_ENV_FLAGS + grep CONFIG_CMD_GREPENV, CONFIG_REGEX for '-e' option diff --git a/drivers/button/button-qcom-pmic.c b/drivers/button/button-qcom-pmic.c index bad445efa86..ad7fed3ddaa 100644 --- a/drivers/button/button-qcom-pmic.c +++ b/drivers/button/button-qcom-pmic.c @@ -19,6 +19,13 @@ #define REG_TYPE 0x4 #define REG_SUBTYPE 0x5 +struct qcom_pmic_btn_data { + char *compatible; + unsigned int status_bit; + int code; + char *label; +}; + struct qcom_pmic_btn_priv { u32 base; u32 status_bit; @@ -27,11 +34,10 @@ struct qcom_pmic_btn_priv { }; #define PON_INT_RT_STS 0x10 -#define KPDPWR_ON_INT_BIT 0 -#define RESIN_ON_INT_BIT 1 - -#define NODE_IS_PWRKEY(node) (!strncmp(ofnode_get_name(node), "pwrkey", strlen("pwrkey"))) -#define NODE_IS_RESIN(node) (!strncmp(ofnode_get_name(node), "resin", strlen("resin"))) +#define PON_KPDPWR_N_SET 0 +#define PON_RESIN_N_SET 1 +#define PON_GEN3_RESIN_N_SET 6 +#define PON_GEN3_KPDPWR_N_SET 7 static enum button_state_t qcom_pwrkey_get_state(struct udevice *dev) { @@ -52,10 +58,51 @@ static int qcom_pwrkey_get_code(struct udevice *dev) return priv->code; } +static const struct qcom_pmic_btn_data qcom_pmic_btn_data_table[] = { + { + .compatible = "qcom,pm8941-pwrkey", + .status_bit = PON_KPDPWR_N_SET, + .code = KEY_ENTER, + .label = "pwrkey", + }, + { + .compatible = "qcom,pm8941-resin", + .status_bit = PON_RESIN_N_SET, + .code = KEY_DOWN, + .label = "vol_down", + }, + { + .compatible = "qcom,pmk8350-pwrkey", + .status_bit = PON_GEN3_KPDPWR_N_SET, + .code = KEY_ENTER, + .label = "pwrkey", + }, + { + .compatible = "qcom,pmk8350-resin", + .status_bit = PON_GEN3_RESIN_N_SET, + .code = KEY_DOWN, + .label = "vol_down", + }, +}; + +static const struct qcom_pmic_btn_data *button_qcom_pmic_match(ofnode node) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(qcom_pmic_btn_data_table); ++i) { + if (ofnode_device_is_compatible(node, + qcom_pmic_btn_data_table[i].compatible)) + return &qcom_pmic_btn_data_table[i]; + } + + return NULL; +} + static int qcom_pwrkey_probe(struct udevice *dev) { struct button_uc_plat *uc_plat = dev_get_uclass_plat(dev); struct qcom_pmic_btn_priv *priv = dev_get_priv(dev); + const struct qcom_pmic_btn_data *btn_data; ofnode node = dev_ofnode(dev); int ret; u64 base; @@ -64,6 +111,14 @@ static int qcom_pwrkey_probe(struct udevice *dev) if (!uc_plat->label) return 0; + /* Get the data for the node compatible */ + btn_data = button_qcom_pmic_match(node); + if (!btn_data) + return -EINVAL; + + priv->status_bit = btn_data->status_bit; + priv->code = btn_data->code; + /* the pwrkey and resin nodes are children of the "pon" node, get the * PMIC device to use in pmic_reg_* calls. */ @@ -87,23 +142,10 @@ static int qcom_pwrkey_probe(struct udevice *dev) ret = pmic_reg_read(priv->pmic, priv->base + REG_SUBTYPE); if (ret < 0 || (ret & 0x7) == 0) { - printf("%s: unexpected PMCI function subtype %d\n", dev->name, ret); + printf("%s: unexpected PMIC function subtype %d\n", dev->name, ret); return -ENXIO; } - if (NODE_IS_PWRKEY(node)) { - priv->status_bit = 0; - priv->code = KEY_ENTER; - } else if (NODE_IS_RESIN(node)) { - priv->status_bit = 1; - priv->code = KEY_DOWN; - } else { - /* Should not get here! */ - printf("Invalid pon node '%s' should be 'pwrkey' or 'resin'\n", - ofnode_get_name(node)); - return -EINVAL; - } - return 0; } @@ -114,12 +156,20 @@ static int button_qcom_pmic_bind(struct udevice *parent) int ret; dev_for_each_subnode(node, parent) { + const struct qcom_pmic_btn_data *btn_data; struct button_uc_plat *uc_plat; const char *label; if (!ofnode_is_enabled(node)) continue; + /* Get the data for the node compatible */ + btn_data = button_qcom_pmic_match(node); + if (!btn_data) { + debug("Unknown button node '%s'\n", ofnode_get_name(node)); + continue; + } + ret = device_bind_driver_to_node(parent, "qcom_pwrkey", ofnode_get_name(node), node, &dev); @@ -128,15 +178,7 @@ static int button_qcom_pmic_bind(struct udevice *parent) return ret; } uc_plat = dev_get_uclass_plat(dev); - if (NODE_IS_PWRKEY(node)) { - uc_plat->label = "pwrkey"; - } else if (NODE_IS_RESIN(node)) { - uc_plat->label = "vol_down"; - } else { - debug("Unknown button node '%s' should be 'pwrkey' or 'resin'\n", - ofnode_get_name(node)); - device_unbind(dev); - } + uc_plat->label = btn_data->label; } return 0; @@ -151,6 +193,7 @@ static const struct udevice_id qcom_pwrkey_ids[] = { { .compatible = "qcom,pm8916-pon" }, { .compatible = "qcom,pm8941-pon" }, { .compatible = "qcom,pm8998-pon" }, + { .compatible = "qcom,pmk8350-pon" }, { } }; diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 017dd260a54..bda6873be33 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -57,27 +57,27 @@ config CLK_BOSTON Enable this to support the clocks config SPL_CLK_CCF - bool "SPL Common Clock Framework [CCF] support " + bool "SPL Common Clock Framework [CCF] support" depends on SPL help Enable this option if you want to (re-)use the Linux kernel's Common Clock Framework [CCF] code in U-Boot's SPL. config SPL_CLK_COMPOSITE_CCF - bool "SPL Common Clock Framework [CCF] composite clk support " + bool "SPL Common Clock Framework [CCF] composite clk support" depends on SPL_CLK_CCF help Enable this option if you want to (re-)use the Linux kernel's Common Clock Framework [CCF] composite code in U-Boot's SPL. config CLK_CCF - bool "Common Clock Framework [CCF] support " + bool "Common Clock Framework [CCF] support" help Enable this option if you want to (re-)use the Linux kernel's Common Clock Framework [CCF] code in U-Boot's clock driver. config CLK_COMPOSITE_CCF - bool "Common Clock Framework [CCF] composite clk support " + bool "Common Clock Framework [CCF] composite clk support" depends on CLK_CCF help Enable this option if you want to (re-)use the Linux kernel's Common @@ -164,7 +164,7 @@ config CLK_OCTEON Enable this to support the clocks on Octeon MIPS platforms. config SANDBOX_CLK_CCF - bool "Sandbox Common Clock Framework [CCF] support " + bool "Sandbox Common Clock Framework [CCF] support" depends on SANDBOX select CLK_CCF help diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index b5c253e4966..1a00dd1d287 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -66,6 +66,17 @@ static const char *imx8mm_i2c3_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_ static const char *imx8mm_i2c4_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_pll2_50m", "sys_pll3_out", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", "sys_pll1_133m", }; +#if CONFIG_IS_ENABLED(PCIE_DW_IMX) +static const char *imx8mm_pcie1_ctrl_sels[] = {"clock-osc-24m", "sys_pll2_250m", "sys_pll2_200m", "sys_pll1_266m", + "sys_pll1_800m", "sys_pll2_500m", "sys_pll2_333m", "sys_pll3_out", }; + +static const char *imx8mm_pcie1_phy_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll2_500m", "clk_ext1", "clk_ext2", + "clk_ext3", "clk_ext4", "sys_pll1_400m", }; + +static const char *imx8mm_pcie1_aux_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll2_50m", "sys_pll3_out", + "sys_pll2_100m", "sys_pll1_80m", "sys_pll1_160m", "sys_pll1_200m", }; +#endif + #ifndef CONFIG_SPL_BUILD static const char *imx8mm_pwm1_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m", "sys_pll3_out", "clk_ext1", "sys_pll1_80m", "video_pll1_out", }; @@ -256,6 +267,17 @@ static int imx8mm_clk_probe(struct udevice *dev) imx8m_clk_composite("usb_bus", imx8mm_usb_bus_sels, base + 0x8b80)); /* IP */ +#if CONFIG_IS_ENABLED(PCIE_DW_IMX) + clk_dm(IMX8MM_CLK_PCIE1_CTRL, + imx8m_clk_composite("pcie1_ctrl", imx8mm_pcie1_ctrl_sels, + base + 0xa300)); + clk_dm(IMX8MM_CLK_PCIE1_PHY, + imx8m_clk_composite("pcie1_phy", imx8mm_pcie1_phy_sels, + base + 0xa380)); + clk_dm(IMX8MM_CLK_PCIE1_AUX, + imx8m_clk_composite("pcie1_aux", imx8mm_pcie1_aux_sels, + base + 0xa400)); +#endif clk_dm(IMX8MM_CLK_USDHC1, imx8m_clk_composite("usdhc1", imx8mm_usdhc1_sels, base + 0xac00)); @@ -339,6 +361,11 @@ static int imx8mm_clk_probe(struct udevice *dev) imx_clk_gate4("pwm4_root_clk", "pwm4", base + 0x42b0, 0)); #endif +#if CONFIG_IS_ENABLED(PCIE_DW_IMX) + clk_dm(IMX8MM_CLK_PCIE1_ROOT, + imx_clk_gate4("pcie1_root_clk", "pcie1_ctrl", base + 0x4250, 0)); +#endif + #if CONFIG_IS_ENABLED(DM_SPI) clk_dm(IMX8MM_CLK_ECSPI1, imx8m_clk_composite("ecspi1", imx8mm_ecspi1_sels, base + 0xb280)); diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig index 8dae635ac2c..45d63c6d6db 100644 --- a/drivers/clk/qcom/Kconfig +++ b/drivers/clk/qcom/Kconfig @@ -31,6 +31,14 @@ config CLK_QCOM_IPQ4019 on the Snapdragon IPQ4019 SoC. This driver supports the clocks and resets exposed by the GCC hardware block. +config CLK_QCOM_QCM2290 + bool "Qualcomm QCM2290 GCC" + select CLK_QCOM + help + Say Y here to enable support for the Global Clock Controller + on the Snapdragon QCM2290 SoC. This driver supports the clocks + and resets exposed by the GCC hardware block. + config CLK_QCOM_QCS404 bool "Qualcomm QCS404 GCC" select CLK_QCOM @@ -47,6 +55,37 @@ config CLK_QCOM_SDM845 on the Snapdragon 845 SoC. This driver supports the clocks and resets exposed by the GCC hardware block. +config CLK_QCOM_SM6115 + bool "Qualcomm SM6115 GCC" + select CLK_QCOM + help + Say Y here to enable support for the Global Clock Controller + on the Snapdragon SM6115 SoC. This driver supports the clocks + and resets exposed by the GCC hardware block. + +config CLK_QCOM_SM8250 + bool "Qualcomm SM8250 GCC" + select CLK_QCOM + help + Say Y here to enable support for the Global Clock Controller + on the Snapdragon SM8250 SoC. This driver supports the clocks + +config CLK_QCOM_SM8550 + bool "Qualcomm SM8550 GCC" + select CLK_QCOM + help + Say Y here to enable support for the Global Clock Controller + on the Snapdragon SM8550 SoC. This driver supports the clocks + and resets exposed by the GCC hardware block. + +config CLK_QCOM_SM8650 + bool "Qualcomm SM8650 GCC" + select CLK_QCOM + help + Say Y here to enable support for the Global Clock Controller + on the Snapdragon SM8650 SoC. This driver supports the clocks + and resets exposed by the GCC hardware block. + endmenu endif diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile index cb179fdac58..dec20e4b594 100644 --- a/drivers/clk/qcom/Makefile +++ b/drivers/clk/qcom/Makefile @@ -7,4 +7,9 @@ obj-$(CONFIG_CLK_QCOM_SDM845) += clock-sdm845.o obj-$(CONFIG_CLK_QCOM_APQ8016) += clock-apq8016.o obj-$(CONFIG_CLK_QCOM_APQ8096) += clock-apq8096.o obj-$(CONFIG_CLK_QCOM_IPQ4019) += clock-ipq4019.o +obj-$(CONFIG_CLK_QCOM_QCM2290) += clock-qcm2290.o obj-$(CONFIG_CLK_QCOM_QCS404) += clock-qcs404.o +obj-$(CONFIG_CLK_QCOM_SM6115) += clock-sm6115.o +obj-$(CONFIG_CLK_QCOM_SM8250) += clock-sm8250.o +obj-$(CONFIG_CLK_QCOM_SM8550) += clock-sm8550.o +obj-$(CONFIG_CLK_QCOM_SM8650) += clock-sm8650.o diff --git a/drivers/clk/qcom/clock-apq8016.c b/drivers/clk/qcom/clock-apq8016.c index 5a5868169c8..d3b63b9c1ac 100644 --- a/drivers/clk/qcom/clock-apq8016.c +++ b/drivers/clk/qcom/clock-apq8016.c @@ -31,7 +31,8 @@ #define BLSP1_AHB_CBCR 0x1008 /* Uart clock control registers */ -#define BLSP1_UART2_BCR (0x3028) +#define BLSP1_UART1_APPS_CBCR (0x203C) +#define BLSP1_UART1_APPS_CMD_RCGR (0x2044) #define BLSP1_UART2_APPS_CBCR (0x302C) #define BLSP1_UART2_APPS_CMD_RCGR (0x3034) @@ -52,7 +53,7 @@ static struct vote_clk gcc_blsp1_ahb_clk = { }; /* SDHCI */ -static int clk_init_sdc(struct msm_clk_priv *priv, int slot, uint rate) +static int apq8016_clk_init_sdc(struct msm_clk_priv *priv, int slot, uint rate) { int div = 15; /* 100MHz default */ @@ -70,20 +71,35 @@ static int clk_init_sdc(struct msm_clk_priv *priv, int slot, uint rate) } /* UART: 115200 */ -int apq8016_clk_init_uart(phys_addr_t base) +int apq8016_clk_init_uart(phys_addr_t base, unsigned long id) { + u32 cmd_rcgr, apps_cbcr; + + switch (id) { + case GCC_BLSP1_UART1_APPS_CLK: + cmd_rcgr = BLSP1_UART1_APPS_CMD_RCGR; + apps_cbcr = BLSP1_UART1_APPS_CBCR; + break; + case GCC_BLSP1_UART2_APPS_CLK: + cmd_rcgr = BLSP1_UART2_APPS_CMD_RCGR; + apps_cbcr = BLSP1_UART2_APPS_CBCR; + break; + default: + return 0; + } + /* Enable AHB clock */ clk_enable_vote_clk(base, &gcc_blsp1_ahb_clk); /* 7372800 uart block clock @ GPLL0 */ - clk_rcg_set_rate_mnd(base, BLSP1_UART2_APPS_CMD_RCGR, 1, 144, 15625, - CFG_CLK_SRC_GPLL0, 16); + clk_rcg_set_rate_mnd(base, cmd_rcgr, 1, 144, 15625, CFG_CLK_SRC_GPLL0, + 16); /* Vote for gpll0 clock */ clk_enable_gpll0(base, &gpll0_vote_clk); /* Enable core clk */ - clk_enable_cbc(base + BLSP1_UART2_APPS_CBCR); + clk_enable_cbc(base + apps_cbcr); return 0; } @@ -94,14 +110,13 @@ static ulong apq8016_clk_set_rate(struct clk *clk, ulong rate) switch (clk->id) { case GCC_SDCC1_APPS_CLK: /* SDC1 */ - return clk_init_sdc(priv, 0, rate); - break; + return apq8016_clk_init_sdc(priv, 0, rate); case GCC_SDCC2_APPS_CLK: /* SDC2 */ - return clk_init_sdc(priv, 1, rate); - break; + return apq8016_clk_init_sdc(priv, 1, rate); + case GCC_BLSP1_UART1_APPS_CLK: /* UART1 */ case GCC_BLSP1_UART2_APPS_CLK: /* UART2 */ - return apq8016_clk_init_uart(priv->base); - break; + apq8016_clk_init_uart(priv->base, clk->id); + return 7372800; default: return 0; } diff --git a/drivers/clk/qcom/clock-ipq4019.c b/drivers/clk/qcom/clock-ipq4019.c index d693776d339..72f235eab21 100644 --- a/drivers/clk/qcom/clock-ipq4019.c +++ b/drivers/clk/qcom/clock-ipq4019.c @@ -21,7 +21,7 @@ static ulong ipq4019_clk_set_rate(struct clk *clk, ulong rate) switch (clk->id) { case GCC_BLSP1_UART1_APPS_CLK: /*UART1*/ /* This clock is already initialized by SBL1 */ - return 0; + return 1843200; default: return -EINVAL; } diff --git a/drivers/clk/qcom/clock-qcm2290.c b/drivers/clk/qcom/clock-qcm2290.c new file mode 100644 index 00000000000..c78705cb8cf --- /dev/null +++ b/drivers/clk/qcom/clock-qcm2290.c @@ -0,0 +1,192 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Clock drivers for Qualcomm qcm2290 + * + * (C) Copyright 2024 Linaro Ltd. + */ + +#include <clk-uclass.h> +#include <dm.h> +#include <linux/delay.h> +#include <asm/io.h> +#include <linux/bug.h> +#include <linux/bitops.h> +#include <dt-bindings/clock/qcom,gcc-qcm2290.h> + +#include "clock-qcom.h" + +#define QUPV3_WRAP0_S4_CMD_RCGR 0x1f608 +#define SDCC2_APPS_CLK_CMD_RCGR 0x1e00c + +static const struct freq_tbl ftbl_gcc_qupv3_wrap0_s0_clk_src[] = { + F(7372800, CFG_CLK_SRC_GPLL0_AUX2, 1, 384, 15625), + F(14745600, CFG_CLK_SRC_GPLL0_AUX2, 1, 768, 15625), + F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0), + F(29491200, CFG_CLK_SRC_GPLL0_AUX2, 1, 1536, 15625), + F(32000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 8, 75), + F(48000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 4, 25), + F(64000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 16, 75), + F(75000000, CFG_CLK_SRC_GPLL0_AUX2, 4, 0, 0), + F(80000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 4, 15), + F(96000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 8, 25), + F(100000000, CFG_CLK_SRC_GPLL0_AUX2, 3, 0, 0), + F(102400000, CFG_CLK_SRC_GPLL0_AUX2, 1, 128, 375), + F(112000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 28, 75), + F(117964800, CFG_CLK_SRC_GPLL0_AUX2, 1, 6144, 15625), + F(120000000, CFG_CLK_SRC_GPLL0_AUX2, 2.5, 0, 0), + F(128000000, CFG_CLK_SRC_GPLL6, 3, 0, 0), + {} +}; + +static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = { + F(400000, CFG_CLK_SRC_CXO, 12, 1, 4), + F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0), + F(25000000, CFG_CLK_SRC_GPLL0_AUX2, 12, 0, 0), + F(50000000, CFG_CLK_SRC_GPLL0_AUX2, 6, 0, 0), + F(100000000, CFG_CLK_SRC_GPLL0_AUX2, 3, 0, 0), + F(202000000, CFG_CLK_SRC_GPLL7, 4, 0, 0), // 6.5, 1, 4 + {} +}; + +static const struct pll_vote_clk gpll7_clk = { + .status = 0x7000, + .status_bit = BIT(31), + .ena_vote = 0x79000, + .vote_bit = BIT(7), +}; + +static const struct gate_clk qcm2290_clks[] = { + GATE_CLK(GCC_AHB2PHY_USB_CLK, 0x1d008, 0x00000001), + GATE_CLK(GCC_CFG_NOC_USB3_PRIM_AXI_CLK, 0x1a084, 0x00000001), + GATE_CLK(GCC_QUPV3_WRAP0_CORE_2X_CLK, 0x7900c, 0x00000200), + GATE_CLK(GCC_QUPV3_WRAP0_CORE_CLK, 0x7900c, 0x00000100), + GATE_CLK(GCC_QUPV3_WRAP0_S0_CLK, 0x7900c, 0x00000400), + GATE_CLK(GCC_QUPV3_WRAP0_S1_CLK, 0x7900c, 0x00000800), + GATE_CLK(GCC_QUPV3_WRAP0_S2_CLK, 0x7900c, 0x00001000), + GATE_CLK(GCC_QUPV3_WRAP0_S3_CLK, 0x7900c, 0x00002000), + GATE_CLK(GCC_QUPV3_WRAP0_S4_CLK, 0x7900c, 0x00004000), + GATE_CLK(GCC_QUPV3_WRAP0_S5_CLK, 0x7900c, 0x00008000), + GATE_CLK(GCC_QUPV3_WRAP_0_M_AHB_CLK, 0x7900c, 0x00000040), + GATE_CLK(GCC_QUPV3_WRAP_0_S_AHB_CLK, 0x7900c, 0x00000080), + GATE_CLK(GCC_SDCC1_AHB_CLK, 0x38008, 0x00000001), + GATE_CLK(GCC_SDCC1_APPS_CLK, 0x38004, 0x00000001), + GATE_CLK(GCC_SDCC1_ICE_CORE_CLK, 0x3800c, 0x00000001), + GATE_CLK(GCC_SDCC2_AHB_CLK, 0x1e008, 0x00000001), + GATE_CLK(GCC_SDCC2_APPS_CLK, 0x1e004, 0x00000001), + GATE_CLK(GCC_SYS_NOC_CPUSS_AHB_CLK, 0x79004, 0x00000001), + GATE_CLK(GCC_SYS_NOC_USB3_PRIM_AXI_CLK, 0x1a080, 0x00000001), + GATE_CLK(GCC_USB30_PRIM_MASTER_CLK, 0x1a010, 0x00000001), + GATE_CLK(GCC_USB30_PRIM_MOCK_UTMI_CLK, 0x1a018, 0x00000001), + GATE_CLK(GCC_USB30_PRIM_SLEEP_CLK, 0x1a014, 0x00000001), + GATE_CLK(GCC_USB3_PRIM_CLKREF_CLK, 0x9f000, 0x00000001), + GATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0x1a054, 0x00000001), + GATE_CLK(GCC_USB3_PRIM_PHY_PIPE_CLK, 0x1a058, 0x00000001), +}; + +static ulong qcm2290_set_rate(struct clk *clk, ulong rate) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + const struct freq_tbl *freq; + + debug("%s: clk %s rate %lu\n", __func__, clk->dev->name, rate); + + switch (clk->id) { + case GCC_QUPV3_WRAP0_S4_CLK: /*UART2*/ + freq = qcom_find_freq(ftbl_gcc_qupv3_wrap0_s0_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, QUPV3_WRAP0_S4_CMD_RCGR, + freq->pre_div, freq->m, freq->n, freq->src, + 16); + return 0; + case GCC_SDCC2_APPS_CLK: + /* Enable GPLL7 so we can point SDCC2_APPS_CLK_SRC RCG at it */ + clk_enable_gpll0(priv->base, &gpll7_clk); + freq = qcom_find_freq(ftbl_gcc_sdcc2_apps_clk_src, rate); + WARN(freq->src != CFG_CLK_SRC_GPLL7, + "SDCC2_APPS_CLK_SRC not set to GPLL7, requested rate %lu\n", + rate); + clk_rcg_set_rate_mnd(priv->base, SDCC2_APPS_CLK_CMD_RCGR, + freq->pre_div, freq->m, freq->n, freq->src, + 8); + return freq->freq; + case GCC_SDCC1_APPS_CLK: + /* The firmware turns this on for us and always sets it to this rate */ + return 384000000; + default: + return 0; + } +} + +static int qcm2290_enable(struct clk *clk) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + + if (priv->data->num_clks < clk->id) { + debug("%s: unknown clk id %lu\n", __func__, clk->id); + return 0; + } + + debug("%s: clk %s\n", __func__, qcm2290_clks[clk->id].name); + + switch (clk->id) { + case GCC_USB30_PRIM_MASTER_CLK: + qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_COM_AUX_CLK); + qcom_gate_clk_en(priv, GCC_USB3_PRIM_CLKREF_CLK); + break; + } + + qcom_gate_clk_en(priv, clk->id); + + return 0; +} + +static const struct qcom_reset_map qcm2290_gcc_resets[] = { + [GCC_CAMSS_OPE_BCR] = { 0x55000 }, + [GCC_CAMSS_TFE_BCR] = { 0x52000 }, + [GCC_CAMSS_TOP_BCR] = { 0x58000 }, + [GCC_GPU_BCR] = { 0x36000 }, + [GCC_MMSS_BCR] = { 0x17000 }, + [GCC_PDM_BCR] = { 0x20000 }, + [GCC_QUPV3_WRAPPER_0_BCR] = { 0x1f000 }, + [GCC_QUSB2PHY_PRIM_BCR] = { 0x1c000 }, + [GCC_SDCC1_BCR] = { 0x38000 }, + [GCC_SDCC2_BCR] = { 0x1e000 }, + [GCC_USB30_PRIM_BCR] = { 0x1a000 }, + [GCC_USB3_PHY_PRIM_SP0_BCR] = { 0x1b000 }, + [GCC_USB3PHY_PHY_PRIM_SP0_BCR] = { 0x1b008 }, + [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x1d000 }, + [GCC_VCODEC0_BCR] = { 0x58094 }, + [GCC_VENUS_BCR] = { 0x58078 }, + [GCC_VIDEO_INTERFACE_BCR] = { 0x6e000 }, +}; + +static const struct qcom_power_map qcm2290_gdscs[] = { + [GCC_USB30_PRIM_GDSC] = { 0x1a004 }, +}; + +static struct msm_clk_data qcm2290_gcc_data = { + .resets = qcm2290_gcc_resets, + .num_resets = ARRAY_SIZE(qcm2290_gcc_resets), + .clks = qcm2290_clks, + .num_clks = ARRAY_SIZE(qcm2290_clks), + .power_domains = qcm2290_gdscs, + .num_power_domains = ARRAY_SIZE(qcm2290_gdscs), + + .enable = qcm2290_enable, + .set_rate = qcm2290_set_rate, +}; + +static const struct udevice_id gcc_qcm2290_of_match[] = { + { + .compatible = "qcom,gcc-qcm2290", + .data = (ulong)&qcm2290_gcc_data, + }, + {} +}; + +U_BOOT_DRIVER(gcc_qcm2290) = { + .name = "gcc_qcm2290", + .id = UCLASS_NOP, + .of_match = gcc_qcm2290_of_match, + .bind = qcom_cc_bind, + .flags = DM_FLAG_PRE_RELOC, +}; diff --git a/drivers/clk/qcom/clock-qcom.h b/drivers/clk/qcom/clock-qcom.h index a7f833a4b6d..f6445c8f566 100644 --- a/drivers/clk/qcom/clock-qcom.h +++ b/drivers/clk/qcom/clock-qcom.h @@ -9,6 +9,11 @@ #define CFG_CLK_SRC_CXO (0 << 8) #define CFG_CLK_SRC_GPLL0 (1 << 8) +#define CFG_CLK_SRC_GPLL0_AUX2 (2 << 8) +#define CFG_CLK_SRC_GPLL9 (2 << 8) +#define CFG_CLK_SRC_GPLL6 (4 << 8) +#define CFG_CLK_SRC_GPLL7 (3 << 8) +#define CFG_CLK_SRC_GPLL4 (5 << 8) #define CFG_CLK_SRC_GPLL0_EVEN (6 << 8) #define CFG_CLK_SRC_MASK (7 << 8) diff --git a/drivers/clk/qcom/clock-sdm845.c b/drivers/clk/qcom/clock-sdm845.c index e9c61eb480d..782df7da844 100644 --- a/drivers/clk/qcom/clock-sdm845.c +++ b/drivers/clk/qcom/clock-sdm845.c @@ -24,6 +24,7 @@ #define USB30_PRIM_MASTER_CLK_CMD_RCGR 0xf018 #define USB30_PRIM_MOCK_UTMI_CLK_CMD_RCGR 0xf030 #define USB3_PRIM_PHY_AUX_CMD_RCGR 0xf05c +#define SDCC2_APPS_CLK_CMD_RCGR 0x1400c static const struct freq_tbl ftbl_gcc_qupv3_wrap0_s0_clk_src[] = { F(7372800, CFG_CLK_SRC_GPLL0_EVEN, 1, 384, 15625), @@ -44,6 +45,17 @@ static const struct freq_tbl ftbl_gcc_qupv3_wrap0_s0_clk_src[] = { { } }; +static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = { + F(400000, CFG_CLK_SRC_CXO, 12, 1, 4), + F(9600000, CFG_CLK_SRC_CXO, 2, 0, 0), + F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0), + F(25000000, CFG_CLK_SRC_GPLL0_EVEN, 12, 0, 0), + F(50000000, CFG_CLK_SRC_GPLL0_EVEN, 6, 0, 0), + F(100000000, CFG_CLK_SRC_GPLL0, 6, 0, 0), + F(201500000, CFG_CLK_SRC_GPLL4, 4, 0, 0), + { } +}; + static ulong sdm845_clk_set_rate(struct clk *clk, ulong rate) { struct msm_clk_priv *priv = dev_get_priv(clk->dev); @@ -55,6 +67,11 @@ static ulong sdm845_clk_set_rate(struct clk *clk, ulong rate) clk_rcg_set_rate_mnd(priv->base, SE9_UART_APPS_CMD_RCGR, freq->pre_div, freq->m, freq->n, freq->src, 16); return freq->freq; + case GCC_SDCC2_APPS_CLK: + freq = qcom_find_freq(ftbl_gcc_sdcc2_apps_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, SDCC2_APPS_CLK_CMD_RCGR, + freq->pre_div, freq->m, freq->n, freq->src, 8); + return freq->freq; default: return 0; } diff --git a/drivers/clk/qcom/clock-sm6115.c b/drivers/clk/qcom/clock-sm6115.c new file mode 100644 index 00000000000..8314a0deb34 --- /dev/null +++ b/drivers/clk/qcom/clock-sm6115.c @@ -0,0 +1,199 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Clock drivers for Qualcomm sm6115 (and sm4250/qrb4210) + * + * Copyright (c) 2024 Linaro Ltd. + * + */ + +#include <clk-uclass.h> +#include <dm.h> +#include <linux/delay.h> +#include <asm/io.h> +#include <linux/bitops.h> +#include <linux/bug.h> +#include <dt-bindings/clock/qcom,gcc-sm6115.h> + +#include "clock-qcom.h" + +#define QUPV3_WRAP0_S4_CMD_RCGR 0x1f608 +#define SDCC1_APPS_CLK_CMD_RCGR 0x38028 +#define SDCC2_APPS_CLK_CMD_RCGR 0x1e00c + +static const struct freq_tbl ftbl_gcc_qupv3_wrap0_s0_clk_src[] = { + F(7372800, CFG_CLK_SRC_GPLL0_AUX2, 1, 384, 15625), + F(14745600, CFG_CLK_SRC_GPLL0_AUX2, 1, 768, 15625), + F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0), + F(29491200, CFG_CLK_SRC_GPLL0_AUX2, 1, 1536, 15625), + F(32000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 8, 75), + F(48000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 4, 25), + F(64000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 16, 75), + F(75000000, CFG_CLK_SRC_GPLL0_AUX2, 4, 0, 0), + F(80000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 4, 15), + F(96000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 8, 25), + F(100000000, CFG_CLK_SRC_GPLL0_AUX2, 3, 0, 0), + F(102400000, CFG_CLK_SRC_GPLL0_AUX2, 1, 128, 375), + F(112000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 28, 75), + F(117964800, CFG_CLK_SRC_GPLL0_AUX2, 1, 6144, 15625), + F(120000000, CFG_CLK_SRC_GPLL0_AUX2, 2.5, 0, 0), + F(128000000, CFG_CLK_SRC_GPLL6, 3, 0, 0), + {} +}; + +static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = { + F(400000, CFG_CLK_SRC_CXO, 12, 1, 4), + F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0), + F(25000000, CFG_CLK_SRC_GPLL0_AUX2, 12, 0, 0), + F(50000000, CFG_CLK_SRC_GPLL0_AUX2, 6, 0, 0), + F(100000000, CFG_CLK_SRC_GPLL0_AUX2, 3, 0, 0), + F(200000000, CFG_CLK_SRC_GPLL0, 3, 0, 0), + {} +}; + +static const struct pll_vote_clk gpll0_clk = { + .status = 0, + .status_bit = BIT(31), + .ena_vote = 0x79000, + .vote_bit = BIT(0), +}; + +static const struct gate_clk sm6115_clks[] = { + GATE_CLK(GCC_CFG_NOC_USB3_PRIM_AXI_CLK, 0x1a084, 0x00000001), + GATE_CLK(GCC_QUPV3_WRAP0_CORE_2X_CLK, 0x7900c, 0x00000200), + GATE_CLK(GCC_QUPV3_WRAP0_CORE_CLK, 0x7900c, 0x00000100), + GATE_CLK(GCC_QUPV3_WRAP0_S0_CLK, 0x7900c, 0x00000400), + GATE_CLK(GCC_QUPV3_WRAP0_S1_CLK, 0x7900c, 0x00000800), + GATE_CLK(GCC_QUPV3_WRAP0_S2_CLK, 0x7900c, 0x00001000), + GATE_CLK(GCC_QUPV3_WRAP0_S3_CLK, 0x7900c, 0x00002000), + GATE_CLK(GCC_QUPV3_WRAP0_S4_CLK, 0x7900c, 0x00004000), + GATE_CLK(GCC_QUPV3_WRAP0_S5_CLK, 0x7900c, 0x00008000), + GATE_CLK(GCC_QUPV3_WRAP_0_M_AHB_CLK, 0x7900c, 0x00000040), + GATE_CLK(GCC_QUPV3_WRAP_0_S_AHB_CLK, 0x7900c, 0x00000080), + GATE_CLK(GCC_SDCC1_AHB_CLK, 0x38008, 0x00000001), + GATE_CLK(GCC_SDCC1_APPS_CLK, 0x38004, 0x00000001), + GATE_CLK(GCC_SDCC1_ICE_CORE_CLK, 0x3800c, 0x00000001), + GATE_CLK(GCC_SDCC2_AHB_CLK, 0x1e008, 0x00000001), + GATE_CLK(GCC_SDCC2_APPS_CLK, 0x1e004, 0x00000001), + GATE_CLK(GCC_SYS_NOC_CPUSS_AHB_CLK, 0x79004, 0x00000001), + GATE_CLK(GCC_SYS_NOC_UFS_PHY_AXI_CLK, 0x45098, 0x00000001), + GATE_CLK(GCC_SYS_NOC_USB3_PRIM_AXI_CLK, 0x1a080, 0x00000001), + GATE_CLK(GCC_UFS_PHY_AHB_CLK, 0x45014, 0x00000001), + GATE_CLK(GCC_UFS_PHY_AXI_CLK, 0x45010, 0x00000001), + GATE_CLK(GCC_UFS_PHY_ICE_CORE_CLK, 0x45044, 0x00000001), + GATE_CLK(GCC_UFS_PHY_PHY_AUX_CLK, 0x45078, 0x00000001), + GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_0_CLK, 0x4501c, 0x00000001), + GATE_CLK(GCC_UFS_PHY_TX_SYMBOL_0_CLK, 0x45018, 0x00000001), + GATE_CLK(GCC_UFS_PHY_UNIPRO_CORE_CLK, 0x45040, 0x00000001), + GATE_CLK(GCC_USB30_PRIM_MASTER_CLK, 0x1a010, 0x00000001), + GATE_CLK(GCC_USB30_PRIM_MOCK_UTMI_CLK, 0x1a018, 0x00000001), + GATE_CLK(GCC_USB30_PRIM_SLEEP_CLK, 0x1a014, 0x00000001), + GATE_CLK(GCC_USB3_PRIM_CLKREF_CLK, 0x9f000, 0x00000001), + GATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0x1a054, 0x00000001), + GATE_CLK(GCC_USB3_PRIM_PHY_PIPE_CLK, 0x1a058, 0x00000001), + GATE_CLK(GCC_AHB2PHY_USB_CLK, 0x1d008, 0x00000001), + GATE_CLK(GCC_UFS_CLKREF_CLK, 0x8c000, 0x00000001), +}; + +static ulong sm6115_set_rate(struct clk *clk, ulong rate) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + const struct freq_tbl *freq; + + debug("%s: clk %s rate %lu\n", __func__, sm6115_clks[clk->id].name, + rate); + + switch (clk->id) { + case GCC_QUPV3_WRAP0_S4_CLK: /*UART2*/ + freq = qcom_find_freq(ftbl_gcc_qupv3_wrap0_s0_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, QUPV3_WRAP0_S4_CMD_RCGR, + freq->pre_div, freq->m, freq->n, freq->src, + 16); + return 0; + case GCC_SDCC2_APPS_CLK: + /* Enable GPLL7 so we can point SDCC2_APPS_CLK_SRC RCG at it */ + clk_enable_gpll0(priv->base, &gpll0_clk); + freq = qcom_find_freq(ftbl_gcc_sdcc2_apps_clk_src, rate); + WARN(freq->src != CFG_CLK_SRC_GPLL0, + "SDCC2_APPS_CLK_SRC not set to GPLL0, requested rate %lu\n", + rate); + clk_rcg_set_rate_mnd(priv->base, SDCC2_APPS_CLK_CMD_RCGR, + freq->pre_div, freq->m, freq->n, freq->src, + 8); + return freq->freq; + case GCC_SDCC1_APPS_CLK: + /* The firmware turns this on for us and always sets it to this rate */ + return 384000000; + default: + return rate; + } +} + +static int sm6115_enable(struct clk *clk) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + + if (priv->data->num_clks < clk->id) { + debug("%s: unknown clk id %lu\n", __func__, clk->id); + return 0; + } + + debug("%s: clk %s\n", __func__, sm6115_clks[clk->id].name); + + switch (clk->id) { + case GCC_USB30_PRIM_MASTER_CLK: + qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_COM_AUX_CLK); + qcom_gate_clk_en(priv, GCC_USB3_PRIM_CLKREF_CLK); + break; + } + + qcom_gate_clk_en(priv, clk->id); + + return 0; +} + +static const struct qcom_reset_map sm6115_gcc_resets[] = { + [GCC_QUSB2PHY_PRIM_BCR] = { 0x1c000 }, + [GCC_QUSB2PHY_SEC_BCR] = { 0x1c004 }, + [GCC_SDCC1_BCR] = { 0x38000 }, + [GCC_SDCC2_BCR] = { 0x1e000 }, + [GCC_UFS_PHY_BCR] = { 0x45000 }, + [GCC_USB30_PRIM_BCR] = { 0x1a000 }, + [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x1d000 }, + [GCC_USB3PHY_PHY_PRIM_SP0_BCR] = { 0x1b008 }, + [GCC_USB3_PHY_PRIM_SP0_BCR] = { 0x1b000 }, + [GCC_VCODEC0_BCR] = { 0x58094 }, + [GCC_VENUS_BCR] = { 0x58078 }, + [GCC_VIDEO_INTERFACE_BCR] = { 0x6e000 }, +}; + +static const struct qcom_power_map sm6115_gdscs[] = { + [GCC_USB30_PRIM_GDSC] = { 0x1a004 }, +}; + +static struct msm_clk_data sm6115_gcc_data = { + .resets = sm6115_gcc_resets, + .num_resets = ARRAY_SIZE(sm6115_gcc_resets), + .clks = sm6115_clks, + .num_clks = ARRAY_SIZE(sm6115_clks), + .power_domains = sm6115_gdscs, + .num_power_domains = ARRAY_SIZE(sm6115_gdscs), + + .enable = sm6115_enable, + .set_rate = sm6115_set_rate, +}; + +static const struct udevice_id gcc_sm6115_of_match[] = { + { + .compatible = "qcom,gcc-sm6115", + .data = (ulong)&sm6115_gcc_data, + }, + {} +}; + +U_BOOT_DRIVER(gcc_sm6115) = { + .name = "gcc_sm6115", + .id = UCLASS_NOP, + .of_match = gcc_sm6115_of_match, + .bind = qcom_cc_bind, + .flags = DM_FLAG_PRE_RELOC, +}; diff --git a/drivers/clk/qcom/clock-sm8250.c b/drivers/clk/qcom/clock-sm8250.c new file mode 100644 index 00000000000..af10fc11621 --- /dev/null +++ b/drivers/clk/qcom/clock-sm8250.c @@ -0,0 +1,282 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Clock drivers for Qualcomm sm8250 + * + * (C) Copyright 2024 Linaro Ltd. + */ + +#include <clk-uclass.h> +#include <dm.h> +#include <linux/delay.h> +#include <asm/io.h> +#include <linux/bug.h> +#include <linux/bitops.h> +#include <dt-bindings/clock/qcom,gcc-sm8250.h> + +#include "clock-qcom.h" + +#define GCC_SE12_UART_RCG_REG 0x184D0 +#define GCC_SDCC2_APPS_CLK_SRC_REG 0x1400c + +#define APCS_GPLL0_ENA_VOTE 0x79000 +#define APCS_GPLL9_STATUS 0x1c000 +#define APCS_GPLLX_ENA_REG 0x52018 + +#define USB30_PRIM_MASTER_CLK_CMD_RCGR 0xf020 +#define USB30_PRIM_MOCK_UTMI_CLK_CMD_RCGR 0xf038 +#define USB3_PRIM_PHY_AUX_CMD_RCGR 0xf064 + +static const struct freq_tbl ftbl_gcc_qupv3_wrap1_s4_clk_src[] = { + F(7372800, CFG_CLK_SRC_GPLL0_EVEN, 1, 384, 15625), + F(14745600, CFG_CLK_SRC_GPLL0_EVEN, 1, 768, 15625), + F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0), + F(29491200, CFG_CLK_SRC_GPLL0_EVEN, 1, 1536, 15625), + F(32000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 75), + F(48000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 25), + F(50000000, CFG_CLK_SRC_GPLL0_EVEN, 6, 0, 0), + F(64000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 16, 75), + F(75000000, CFG_CLK_SRC_GPLL0_EVEN, 4, 0, 0), + F(80000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 15), + F(96000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 25), + F(100000000, CFG_CLK_SRC_GPLL0, 6, 0, 0), + {} +}; + +static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = { + F(400000, CFG_CLK_SRC_CXO, 12, 1, 4), + F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0), + F(25000000, CFG_CLK_SRC_GPLL0_EVEN, 12, 0, 0), + F(50000000, CFG_CLK_SRC_GPLL0_EVEN, 6, 0, 0), + F(100000000, CFG_CLK_SRC_GPLL0, 6, 0, 0), + F(202000000, CFG_CLK_SRC_GPLL9, 4, 0, 0), + {} +}; + +static struct pll_vote_clk gpll9_vote_clk = { + .status = APCS_GPLL9_STATUS, + .status_bit = BIT(31), + .ena_vote = APCS_GPLLX_ENA_REG, + .vote_bit = BIT(9), +}; + +static ulong sm8250_set_rate(struct clk *clk, ulong rate) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + const struct freq_tbl *freq; + + if (clk->id < priv->data->num_clks) + debug("%s: %s, requested rate=%ld\n", __func__, + priv->data->clks[clk->id].name, rate); + + switch (clk->id) { + case GCC_QUPV3_WRAP1_S4_CLK: /*UART2*/ + freq = qcom_find_freq(ftbl_gcc_qupv3_wrap1_s4_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, GCC_SE12_UART_RCG_REG, + freq->pre_div, freq->m, freq->n, freq->src, + 16); + + return freq->freq; + case GCC_SDCC2_APPS_CLK: + /* Enable GPLL9 so that we can point SDCC2_APPS_CLK_SRC at it */ + clk_enable_gpll0(priv->base, &gpll9_vote_clk); + freq = qcom_find_freq(ftbl_gcc_sdcc2_apps_clk_src, rate); + printf("%s: got freq %u\n", __func__, freq->freq); + WARN(freq->src != CFG_CLK_SRC_GPLL9, + "SDCC2_APPS_CLK_SRC not set to GPLL9, requested rate %lu\n", + rate); + clk_rcg_set_rate_mnd(priv->base, GCC_SDCC2_APPS_CLK_SRC_REG, + freq->pre_div, freq->m, freq->n, + CFG_CLK_SRC_GPLL9, 8); + + return rate; + default: + return 0; + } +} + +static const struct gate_clk sm8250_clks[] = { + GATE_CLK(GCC_AGGRE_UFS_CARD_AXI_CLK, 0x750cc, 0x00000001), + GATE_CLK(GCC_AGGRE_UFS_PHY_AXI_CLK, 0x770cc, 0x00000001), + GATE_CLK(GCC_AGGRE_USB3_PRIM_AXI_CLK, 0x0f080, 0x00000001), + GATE_CLK(GCC_AGGRE_USB3_SEC_AXI_CLK, 0x10080, 0x00000001), + GATE_CLK(GCC_CFG_NOC_USB3_PRIM_AXI_CLK, 0x0f07c, 0x00000001), + GATE_CLK(GCC_CFG_NOC_USB3_SEC_AXI_CLK, 0x1007c, 0x00000001), + GATE_CLK(GCC_QMIP_CAMERA_NRT_AHB_CLK, 0x0b018, 0x00000001), + GATE_CLK(GCC_QMIP_CAMERA_RT_AHB_CLK, 0x0b01c, 0x00000001), + GATE_CLK(GCC_QMIP_DISP_AHB_CLK, 0x0b020, 0x00000001), + GATE_CLK(GCC_QMIP_VIDEO_CVP_AHB_CLK, 0x0b010, 0x00000001), + GATE_CLK(GCC_QMIP_VIDEO_VCODEC_AHB_CLK, 0x0b014, 0x00000001), + GATE_CLK(GCC_QUPV3_WRAP0_CORE_2X_CLK, 0x52008, 0x00000200), + GATE_CLK(GCC_QUPV3_WRAP0_CORE_CLK, 0x52008, 0x00000100), + GATE_CLK(GCC_QUPV3_WRAP0_S0_CLK, 0x52008, 0x00000400), + GATE_CLK(GCC_QUPV3_WRAP0_S1_CLK, 0x52008, 0x00000800), + GATE_CLK(GCC_QUPV3_WRAP0_S2_CLK, 0x52008, 0x00001000), + GATE_CLK(GCC_QUPV3_WRAP0_S3_CLK, 0x52008, 0x00002000), + GATE_CLK(GCC_QUPV3_WRAP0_S4_CLK, 0x52008, 0x00004000), + GATE_CLK(GCC_QUPV3_WRAP0_S5_CLK, 0x52008, 0x00008000), + GATE_CLK(GCC_QUPV3_WRAP0_S6_CLK, 0x52008, 0x00010000), + GATE_CLK(GCC_QUPV3_WRAP0_S7_CLK, 0x52008, 0x00020000), + GATE_CLK(GCC_QUPV3_WRAP1_CORE_2X_CLK, 0x52008, 0x00040000), + GATE_CLK(GCC_QUPV3_WRAP1_CORE_CLK, 0x52008, 0x00080000), + GATE_CLK(GCC_QUPV3_WRAP1_S0_CLK, 0x52008, 0x00400000), + GATE_CLK(GCC_QUPV3_WRAP1_S1_CLK, 0x52008, 0x00800000), + GATE_CLK(GCC_QUPV3_WRAP1_S2_CLK, 0x52008, 0x01000000), + GATE_CLK(GCC_QUPV3_WRAP1_S3_CLK, 0x52008, 0x02000000), + GATE_CLK(GCC_QUPV3_WRAP1_S4_CLK, 0x52008, 0x04000000), + GATE_CLK(GCC_QUPV3_WRAP1_S5_CLK, 0x52008, 0x08000000), + GATE_CLK(GCC_QUPV3_WRAP2_CORE_2X_CLK, 0x52010, 0x00000008), + GATE_CLK(GCC_QUPV3_WRAP2_CORE_CLK, 0x52010, 0x00000001), + GATE_CLK(GCC_QUPV3_WRAP2_S0_CLK, 0x52010, 0x00000010), + GATE_CLK(GCC_QUPV3_WRAP2_S1_CLK, 0x52010, 0x00000020), + GATE_CLK(GCC_QUPV3_WRAP2_S2_CLK, 0x52010, 0x00000040), + GATE_CLK(GCC_QUPV3_WRAP2_S3_CLK, 0x52010, 0x00000080), + GATE_CLK(GCC_QUPV3_WRAP2_S4_CLK, 0x52010, 0x00000100), + GATE_CLK(GCC_QUPV3_WRAP2_S5_CLK, 0x52010, 0x00000200), + GATE_CLK(GCC_QUPV3_WRAP_0_M_AHB_CLK, 0x52008, 0x00000040), + GATE_CLK(GCC_QUPV3_WRAP_0_S_AHB_CLK, 0x52008, 0x00000080), + GATE_CLK(GCC_QUPV3_WRAP_1_M_AHB_CLK, 0x52008, 0x00100000), + GATE_CLK(GCC_QUPV3_WRAP_1_S_AHB_CLK, 0x52008, 0x00200000), + GATE_CLK(GCC_QUPV3_WRAP_2_M_AHB_CLK, 0x52010, 0x00000004), + GATE_CLK(GCC_QUPV3_WRAP_2_S_AHB_CLK, 0x52010, 0x00000002), + GATE_CLK(GCC_SDCC2_AHB_CLK, 0x14008, 0x00000001), + GATE_CLK(GCC_SDCC2_APPS_CLK, 0x14004, 0x00000001), + GATE_CLK(GCC_SDCC4_AHB_CLK, 0x16008, 0x00000001), + GATE_CLK(GCC_SDCC4_APPS_CLK, 0x16004, 0x00000001), + GATE_CLK(GCC_UFS_CARD_AHB_CLK, 0x75018, 0x00000001), + GATE_CLK(GCC_UFS_CARD_AXI_CLK, 0x75010, 0x00000001), + GATE_CLK(GCC_UFS_CARD_ICE_CORE_CLK, 0x75064, 0x00000001), + GATE_CLK(GCC_UFS_CARD_PHY_AUX_CLK, 0x7509c, 0x00000001), + GATE_CLK(GCC_UFS_CARD_RX_SYMBOL_0_CLK, 0x75020, 0x00000001), + GATE_CLK(GCC_UFS_CARD_RX_SYMBOL_1_CLK, 0x750b8, 0x00000001), + GATE_CLK(GCC_UFS_CARD_TX_SYMBOL_0_CLK, 0x7501c, 0x00000001), + GATE_CLK(GCC_UFS_CARD_UNIPRO_CORE_CLK, 0x7505c, 0x00000001), + GATE_CLK(GCC_UFS_PHY_AHB_CLK, 0x77018, 0x00000001), + GATE_CLK(GCC_UFS_PHY_AXI_CLK, 0x77010, 0x00000001), + GATE_CLK(GCC_UFS_PHY_ICE_CORE_CLK, 0x77064, 0x00000001), + GATE_CLK(GCC_UFS_PHY_PHY_AUX_CLK, 0x7709c, 0x00000001), + GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_0_CLK, 0x77020, 0x00000001), + GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_1_CLK, 0x770b8, 0x00000001), + GATE_CLK(GCC_UFS_PHY_TX_SYMBOL_0_CLK, 0x7701c, 0x00000001), + GATE_CLK(GCC_UFS_PHY_UNIPRO_CORE_CLK, 0x7705c, 0x00000001), + GATE_CLK(GCC_USB30_PRIM_MASTER_CLK, 0x0f010, 0x00000001), + GATE_CLK(GCC_USB30_PRIM_MOCK_UTMI_CLK, 0x0f01c, 0x00000001), + GATE_CLK(GCC_USB30_PRIM_SLEEP_CLK, 0x0f018, 0x00000001), + GATE_CLK(GCC_USB30_SEC_MASTER_CLK, 0x10010, 0x00000001), + GATE_CLK(GCC_USB30_SEC_MOCK_UTMI_CLK, 0x1001c, 0x00000001), + GATE_CLK(GCC_USB30_SEC_SLEEP_CLK, 0x10018, 0x00000001), + GATE_CLK(GCC_USB3_PRIM_PHY_AUX_CLK, 0x0f054, 0x00000001), + GATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0x0f058, 0x00000001), + GATE_CLK(GCC_USB3_PRIM_PHY_PIPE_CLK, 0x0f05c, 0x00000001), + GATE_CLK(GCC_USB3_SEC_CLKREF_EN, 0x8c010, 0x00000001), + GATE_CLK(GCC_USB3_SEC_PHY_AUX_CLK, 0x10054, 0x00000001), + GATE_CLK(GCC_USB3_SEC_PHY_COM_AUX_CLK, 0x10058, 0x00000001), + GATE_CLK(GCC_USB3_SEC_PHY_PIPE_CLK, 0x1005c, 0x00000001), +}; + +static int sm8250_enable(struct clk *clk) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + + if (priv->data->num_clks < clk->id) { + debug("%s: unknown clk id %lu\n", __func__, clk->id); + return 0; + } + + debug("%s: clk %s\n", __func__, sm8250_clks[clk->id].name); + + switch (clk->id) { + case GCC_USB30_PRIM_MASTER_CLK: + qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_AUX_CLK); + qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_COM_AUX_CLK); + break; + case GCC_USB30_SEC_MASTER_CLK: + qcom_gate_clk_en(priv, GCC_USB3_SEC_PHY_AUX_CLK); + qcom_gate_clk_en(priv, GCC_USB3_SEC_PHY_COM_AUX_CLK); + break; + } + + qcom_gate_clk_en(priv, clk->id); + + return 0; +} + +static const struct qcom_reset_map sm8250_gcc_resets[] = { + [GCC_GPU_BCR] = { 0x71000 }, + [GCC_MMSS_BCR] = { 0xb000 }, + [GCC_NPU_BWMON_BCR] = { 0x73000 }, + [GCC_NPU_BCR] = { 0x4d000 }, + [GCC_PCIE_0_BCR] = { 0x6b000 }, + [GCC_PCIE_0_LINK_DOWN_BCR] = { 0x6c014 }, + [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0x6c020 }, + [GCC_PCIE_0_PHY_BCR] = { 0x6c01c }, + [GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR] = { 0x6c028 }, + [GCC_PCIE_1_BCR] = { 0x8d000 }, + [GCC_PCIE_1_LINK_DOWN_BCR] = { 0x8e014 }, + [GCC_PCIE_1_NOCSR_COM_PHY_BCR] = { 0x8e020 }, + [GCC_PCIE_1_PHY_BCR] = { 0x8e01c }, + [GCC_PCIE_1_PHY_NOCSR_COM_PHY_BCR] = { 0x8e000 }, + [GCC_PCIE_2_BCR] = { 0x6000 }, + [GCC_PCIE_2_LINK_DOWN_BCR] = { 0x1f014 }, + [GCC_PCIE_2_NOCSR_COM_PHY_BCR] = { 0x1f020 }, + [GCC_PCIE_2_PHY_BCR] = { 0x1f01c }, + [GCC_PCIE_2_PHY_NOCSR_COM_PHY_BCR] = { 0x1f028 }, + [GCC_PCIE_PHY_BCR] = { 0x6f000 }, + [GCC_PCIE_PHY_CFG_AHB_BCR] = { 0x6f00c }, + [GCC_PCIE_PHY_COM_BCR] = { 0x6f010 }, + [GCC_PDM_BCR] = { 0x33000 }, + [GCC_PRNG_BCR] = { 0x34000 }, + [GCC_QUPV3_WRAPPER_0_BCR] = { 0x17000 }, + [GCC_QUPV3_WRAPPER_1_BCR] = { 0x18000 }, + [GCC_QUPV3_WRAPPER_2_BCR] = { 0x1e000 }, + [GCC_QUSB2PHY_PRIM_BCR] = { 0x12000 }, + [GCC_QUSB2PHY_SEC_BCR] = { 0x12004 }, + [GCC_SDCC2_BCR] = { 0x14000 }, + [GCC_SDCC4_BCR] = { 0x16000 }, + [GCC_TSIF_BCR] = { 0x36000 }, + [GCC_UFS_CARD_BCR] = { 0x75000 }, + [GCC_UFS_PHY_BCR] = { 0x77000 }, + [GCC_USB30_PRIM_BCR] = { 0xf000 }, + [GCC_USB30_SEC_BCR] = { 0x10000 }, + [GCC_USB3_DP_PHY_PRIM_BCR] = { 0x50008 }, + [GCC_USB3_DP_PHY_SEC_BCR] = { 0x50014 }, + [GCC_USB3_PHY_PRIM_BCR] = { 0x50000 }, + [GCC_USB3_PHY_SEC_BCR] = { 0x5000c }, + [GCC_USB3PHY_PHY_PRIM_BCR] = { 0x50004 }, + [GCC_USB3PHY_PHY_SEC_BCR] = { 0x50010 }, + [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 }, +}; + +static const struct qcom_power_map sm8250_gdscs[] = { + [PCIE_0_GDSC] = { 0x6b004 }, [PCIE_1_GDSC] = { 0x8d004 }, + [PCIE_2_GDSC] = { 0x6004 }, [UFS_CARD_GDSC] = { 0x75004 }, + [UFS_PHY_GDSC] = { 0x77004 }, [USB30_PRIM_GDSC] = { 0xf004 }, + [USB30_SEC_GDSC] = { 0x10004 }, +}; + +static struct msm_clk_data qcs404_gcc_data = { + .resets = sm8250_gcc_resets, + .num_resets = ARRAY_SIZE(sm8250_gcc_resets), + .clks = sm8250_clks, + .num_clks = ARRAY_SIZE(sm8250_clks), + .power_domains = sm8250_gdscs, + .num_power_domains = ARRAY_SIZE(sm8250_gdscs), + + .enable = sm8250_enable, + .set_rate = sm8250_set_rate, +}; + +static const struct udevice_id gcc_sm8250_of_match[] = { + { + .compatible = "qcom,gcc-sm8250", + .data = (ulong)&qcs404_gcc_data, + }, + {} +}; + +U_BOOT_DRIVER(gcc_sm8250) = { + .name = "gcc_sm8250", + .id = UCLASS_NOP, + .of_match = gcc_sm8250_of_match, + .bind = qcom_cc_bind, + .flags = DM_FLAG_PRE_RELOC, +}; diff --git a/drivers/clk/qcom/clock-sm8550.c b/drivers/clk/qcom/clock-sm8550.c new file mode 100644 index 00000000000..c0249925cc7 --- /dev/null +++ b/drivers/clk/qcom/clock-sm8550.c @@ -0,0 +1,335 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Clock drivers for Qualcomm sm8550 + * + * (C) Copyright 2024 Linaro Ltd. + */ + +#include <clk-uclass.h> +#include <dm.h> +#include <linux/delay.h> +#include <errno.h> +#include <asm/io.h> +#include <linux/bug.h> +#include <linux/bitops.h> +#include <dt-bindings/clock/qcom,sm8550-gcc.h> +#include <dt-bindings/clock/qcom,sm8550-tcsr.h> + +#include "clock-qcom.h" + +/* On-board TCXO, TOFIX get from DT */ +#define TCXO_RATE 38400000 + +/* bi_tcxo_div2 divided after RPMh output */ +#define TCXO_DIV2_RATE (TCXO_RATE / 2) + +static const struct freq_tbl ftbl_gcc_qupv3_wrap1_s2_clk_src[] = { + F(7372800, CFG_CLK_SRC_GPLL0_EVEN, 1, 384, 15625), + F(14745600, CFG_CLK_SRC_GPLL0_EVEN, 1, 768, 15625), + F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0), + F(29491200, CFG_CLK_SRC_GPLL0_EVEN, 1, 1536, 15625), + F(32000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 75), + F(48000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 25), + F(51200000, CFG_CLK_SRC_GPLL0_EVEN, 1, 64, 375), + F(64000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 16, 75), + F(75000000, CFG_CLK_SRC_GPLL0_EVEN, 4, 0, 0), + F(80000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 15), + F(96000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 25), + F(100000000, CFG_CLK_SRC_GPLL0, 6, 0, 0), + { } +}; + +static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = { + F(400000, CFG_CLK_SRC_CXO, 12, 1, 4), + F(25000000, CFG_CLK_SRC_GPLL0_EVEN, 12, 0, 0), + F(37500000, CFG_CLK_SRC_GPLL0_EVEN, 8, 0, 0), + F(50000000, CFG_CLK_SRC_GPLL0_EVEN, 6, 0, 0), + F(100000000, CFG_CLK_SRC_GPLL0_EVEN, 3, 0, 0), + /* TOFIX F(202000000, CFG_CLK_SRC_GPLL9, 4, 0, 0), */ + { } +}; + +static const struct freq_tbl ftbl_gcc_usb30_prim_master_clk_src[] = { + F(66666667, CFG_CLK_SRC_GPLL0_EVEN, 4.5, 0, 0), + F(133333333, CFG_CLK_SRC_GPLL0, 4.5, 0, 0), + F(200000000, CFG_CLK_SRC_GPLL0, 3, 0, 0), + F(240000000, CFG_CLK_SRC_GPLL0, 2.5, 0, 0), + { } +}; + +static ulong sm8550_set_rate(struct clk *clk, ulong rate) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + const struct freq_tbl *freq; + + switch (clk->id) { + case GCC_QUPV3_WRAP1_S7_CLK: /* UART7 */ + freq = qcom_find_freq(ftbl_gcc_qupv3_wrap1_s2_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, 0x18898, + freq->pre_div, freq->m, freq->n, freq->src, 16); + return freq->freq; + case GCC_SDCC2_APPS_CLK: + freq = qcom_find_freq(ftbl_gcc_sdcc2_apps_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, 0x14018, + freq->pre_div, freq->m, freq->n, freq->src, 8); + return freq->freq; + case GCC_USB30_PRIM_MASTER_CLK: + freq = qcom_find_freq(ftbl_gcc_usb30_prim_master_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, 0x3902c, + freq->pre_div, freq->m, freq->n, freq->src, 8); + return freq->freq; + case GCC_USB30_PRIM_MOCK_UTMI_CLK: + clk_rcg_set_rate(priv->base, 0x39044, 0, 0); + return TCXO_DIV2_RATE; + case GCC_USB3_PRIM_PHY_AUX_CLK_SRC: + clk_rcg_set_rate(priv->base, 0x39070, 0, 0); + return TCXO_DIV2_RATE; + default: + return 0; + } +} + +static const struct gate_clk sm8550_clks[] = { + GATE_CLK(GCC_AGGRE_NOC_PCIE_AXI_CLK, 0x52000, BIT(12)), + GATE_CLK(GCC_AGGRE_UFS_PHY_AXI_CLK, 0x770e4, BIT(0)), + GATE_CLK(GCC_AGGRE_UFS_PHY_AXI_HW_CTL_CLK, 0x770e4, BIT(1)), + GATE_CLK(GCC_AGGRE_USB3_PRIM_AXI_CLK, 0x3908c, BIT(0)), + GATE_CLK(GCC_CNOC_PCIE_SF_AXI_CLK, 0x52008, BIT(6)), + GATE_CLK(GCC_DDRSS_GPU_AXI_CLK, 0x71154, BIT(0)), + GATE_CLK(GCC_DDRSS_PCIE_SF_QTB_CLK, 0x52000, BIT(19)), + GATE_CLK(GCC_PCIE_0_AUX_CLK, 0x52008, BIT(3)), + GATE_CLK(GCC_PCIE_0_CFG_AHB_CLK, 0x52008, BIT(2)), + GATE_CLK(GCC_PCIE_0_MSTR_AXI_CLK, 0x52008, BIT(1)), + GATE_CLK(GCC_PCIE_0_PHY_RCHNG_CLK, 0x52000, BIT(22)), + GATE_CLK(GCC_PCIE_0_PIPE_CLK, 0x52008, BIT(4)), + GATE_CLK(GCC_PCIE_0_SLV_AXI_CLK, 0x52008, BIT(0)), + GATE_CLK(GCC_PCIE_0_SLV_Q2A_AXI_CLK, 0x52008, BIT(5)), + GATE_CLK(GCC_PCIE_1_AUX_CLK, 0x52000, BIT(29)), + GATE_CLK(GCC_PCIE_1_CFG_AHB_CLK, 0x52000, BIT(28)), + GATE_CLK(GCC_PCIE_1_MSTR_AXI_CLK, 0x52000, BIT(27)), + GATE_CLK(GCC_PCIE_1_PHY_AUX_CLK, 0x52000, BIT(24)), + GATE_CLK(GCC_PCIE_1_PHY_RCHNG_CLK, 0x52000, BIT(23)), + GATE_CLK(GCC_PCIE_1_PIPE_CLK, 0x52000, BIT(30)), + GATE_CLK(GCC_PCIE_1_SLV_AXI_CLK, 0x52000, BIT(26)), + GATE_CLK(GCC_PCIE_1_SLV_Q2A_AXI_CLK, 0x52000, BIT(25)), + GATE_CLK(GCC_QUPV3_I2C_CORE_CLK, 0x52008, BIT(8)), + GATE_CLK(GCC_QUPV3_I2C_S0_CLK, 0x52008, BIT(10)), + GATE_CLK(GCC_QUPV3_I2C_S1_CLK, 0x52008, BIT(11)), + GATE_CLK(GCC_QUPV3_I2C_S2_CLK, 0x52008, BIT(12)), + GATE_CLK(GCC_QUPV3_I2C_S3_CLK, 0x52008, BIT(13)), + GATE_CLK(GCC_QUPV3_I2C_S4_CLK, 0x52008, BIT(14)), + GATE_CLK(GCC_QUPV3_I2C_S5_CLK, 0x52008, BIT(15)), + GATE_CLK(GCC_QUPV3_I2C_S6_CLK, 0x52008, BIT(16)), + GATE_CLK(GCC_QUPV3_I2C_S7_CLK, 0x52008, BIT(17)), + GATE_CLK(GCC_QUPV3_I2C_S8_CLK, 0x52010, BIT(14)), + GATE_CLK(GCC_QUPV3_I2C_S9_CLK, 0x52010, BIT(15)), + GATE_CLK(GCC_QUPV3_I2C_S_AHB_CLK, 0x52008, BIT(7)), + GATE_CLK(GCC_QUPV3_WRAP1_CORE_2X_CLK, 0x52008, BIT(18)), + GATE_CLK(GCC_QUPV3_WRAP1_CORE_CLK, 0x52008, BIT(19)), + GATE_CLK(GCC_QUPV3_WRAP1_S0_CLK, 0x52008, BIT(22)), + GATE_CLK(GCC_QUPV3_WRAP1_S1_CLK, 0x52008, BIT(23)), + GATE_CLK(GCC_QUPV3_WRAP1_S2_CLK, 0x52008, BIT(24)), + GATE_CLK(GCC_QUPV3_WRAP1_S3_CLK, 0x52008, BIT(25)), + GATE_CLK(GCC_QUPV3_WRAP1_S4_CLK, 0x52008, BIT(26)), + GATE_CLK(GCC_QUPV3_WRAP1_S5_CLK, 0x52008, BIT(27)), + GATE_CLK(GCC_QUPV3_WRAP1_S6_CLK, 0x52008, BIT(28)), + GATE_CLK(GCC_QUPV3_WRAP1_S7_CLK, 0x52010, BIT(16)), + GATE_CLK(GCC_QUPV3_WRAP2_CORE_2X_CLK, 0x52010, BIT(3)), + GATE_CLK(GCC_QUPV3_WRAP2_CORE_CLK, 0x52010, BIT(0)), + GATE_CLK(GCC_QUPV3_WRAP2_S0_CLK, 0x52010, BIT(4)), + GATE_CLK(GCC_QUPV3_WRAP2_S1_CLK, 0x52010, BIT(5)), + GATE_CLK(GCC_QUPV3_WRAP2_S2_CLK, 0x52010, BIT(6)), + GATE_CLK(GCC_QUPV3_WRAP2_S3_CLK, 0x52010, BIT(7)), + GATE_CLK(GCC_QUPV3_WRAP2_S4_CLK, 0x52010, BIT(8)), + GATE_CLK(GCC_QUPV3_WRAP2_S5_CLK, 0x52010, BIT(9)), + GATE_CLK(GCC_QUPV3_WRAP2_S6_CLK, 0x52010, BIT(10)), + GATE_CLK(GCC_QUPV3_WRAP2_S7_CLK, 0x52010, BIT(17)), + GATE_CLK(GCC_QUPV3_WRAP_1_M_AHB_CLK, 0x52008, BIT(20)), + GATE_CLK(GCC_QUPV3_WRAP_1_S_AHB_CLK, 0x52008, BIT(21)), + GATE_CLK(GCC_QUPV3_WRAP_2_M_AHB_CLK, 0x52010, BIT(2)), + GATE_CLK(GCC_QUPV3_WRAP_2_S_AHB_CLK, 0x52010, BIT(1)), + GATE_CLK(GCC_SDCC2_AHB_CLK, 0x14010, BIT(0)), + GATE_CLK(GCC_SDCC2_APPS_CLK, 0x14004, BIT(0)), + GATE_CLK(GCC_UFS_PHY_AHB_CLK, 0x77024, BIT(0)), + GATE_CLK(GCC_UFS_PHY_AXI_CLK, 0x77018, BIT(0)), + GATE_CLK(GCC_UFS_PHY_AXI_HW_CTL_CLK, 0x77018, BIT(1)), + GATE_CLK(GCC_UFS_PHY_ICE_CORE_CLK, 0x77074, BIT(0)), + GATE_CLK(GCC_UFS_PHY_ICE_CORE_HW_CTL_CLK, 0x77074, BIT(1)), + GATE_CLK(GCC_UFS_PHY_PHY_AUX_CLK, 0x770b0, BIT(0)), + GATE_CLK(GCC_UFS_PHY_PHY_AUX_HW_CTL_CLK, 0x770b0, BIT(1)), + GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_0_CLK, 0x7702c, BIT(0)), + GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_1_CLK, 0x770cc, BIT(0)), + GATE_CLK(GCC_UFS_PHY_TX_SYMBOL_0_CLK, 0x77028, BIT(0)), + GATE_CLK(GCC_UFS_PHY_UNIPRO_CORE_CLK, 0x77068, BIT(0)), + GATE_CLK(GCC_UFS_PHY_UNIPRO_CORE_HW_CTL_CLK, 0x77068, BIT(1)), + GATE_CLK(GCC_USB30_PRIM_MASTER_CLK, 0x39018, BIT(0)), + GATE_CLK(GCC_USB30_PRIM_MOCK_UTMI_CLK, 0x39028, BIT(0)), + GATE_CLK(GCC_USB30_PRIM_SLEEP_CLK, 0x39024, BIT(0)), + GATE_CLK(GCC_USB3_PRIM_PHY_AUX_CLK, 0x39060, BIT(0)), + GATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0x39064, BIT(0)), + GATE_CLK(GCC_USB3_PRIM_PHY_PIPE_CLK, 0x39068, BIT(0)), +}; + +static int sm8550_enable(struct clk *clk) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + + switch (clk->id) { + case GCC_AGGRE_USB3_PRIM_AXI_CLK: + qcom_gate_clk_en(priv, GCC_USB30_PRIM_MASTER_CLK); + fallthrough; + case GCC_USB30_PRIM_MASTER_CLK: + qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_AUX_CLK); + qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_COM_AUX_CLK); + break; + } + + qcom_gate_clk_en(priv, clk->id); + + return 0; +} + +static const struct qcom_reset_map sm8550_gcc_resets[] = { + [GCC_CAMERA_BCR] = { 0x26000 }, + [GCC_DISPLAY_BCR] = { 0x27000 }, + [GCC_GPU_BCR] = { 0x71000 }, + [GCC_PCIE_0_BCR] = { 0x6b000 }, + [GCC_PCIE_0_LINK_DOWN_BCR] = { 0x6c014 }, + [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0x6c020 }, + [GCC_PCIE_0_PHY_BCR] = { 0x6c01c }, + [GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR] = { 0x6c028 }, + [GCC_PCIE_1_BCR] = { 0x8d000 }, + [GCC_PCIE_1_LINK_DOWN_BCR] = { 0x8e014 }, + [GCC_PCIE_1_NOCSR_COM_PHY_BCR] = { 0x8e020 }, + [GCC_PCIE_1_PHY_BCR] = { 0x8e01c }, + [GCC_PCIE_1_PHY_NOCSR_COM_PHY_BCR] = { 0x8e024 }, + [GCC_PCIE_PHY_BCR] = { 0x6f000 }, + [GCC_PCIE_PHY_CFG_AHB_BCR] = { 0x6f00c }, + [GCC_PCIE_PHY_COM_BCR] = { 0x6f010 }, + [GCC_PDM_BCR] = { 0x33000 }, + [GCC_QUPV3_WRAPPER_1_BCR] = { 0x18000 }, + [GCC_QUPV3_WRAPPER_2_BCR] = { 0x1e000 }, + [GCC_QUPV3_WRAPPER_I2C_BCR] = { 0x17000 }, + [GCC_QUSB2PHY_PRIM_BCR] = { 0x12000 }, + [GCC_QUSB2PHY_SEC_BCR] = { 0x12004 }, + [GCC_SDCC2_BCR] = { 0x14000 }, + [GCC_SDCC4_BCR] = { 0x16000 }, + [GCC_UFS_PHY_BCR] = { 0x77000 }, + [GCC_USB30_PRIM_BCR] = { 0x39000 }, + [GCC_USB3_DP_PHY_PRIM_BCR] = { 0x50008 }, + [GCC_USB3_DP_PHY_SEC_BCR] = { 0x50014 }, + [GCC_USB3_PHY_PRIM_BCR] = { 0x50000 }, + [GCC_USB3_PHY_SEC_BCR] = { 0x5000c }, + [GCC_USB3PHY_PHY_PRIM_BCR] = { 0x50004 }, + [GCC_USB3PHY_PHY_SEC_BCR] = { 0x50010 }, + [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 }, + [GCC_VIDEO_AXI0_CLK_ARES] = { 0x32018, 2 }, + [GCC_VIDEO_AXI1_CLK_ARES] = { 0x32024, 2 }, + [GCC_VIDEO_BCR] = { 0x32000 }, +}; + +static const struct qcom_power_map sm8550_gdscs[] = { + [PCIE_0_GDSC] = { 0x6b004 }, + [PCIE_0_PHY_GDSC] = { 0x6c000 }, + [PCIE_1_GDSC] = { 0x8d004 }, + [PCIE_1_PHY_GDSC] = { 0x8e000 }, + [UFS_PHY_GDSC] = { 0x77004 }, + [UFS_MEM_PHY_GDSC] = { 0x9e000 }, + [USB30_PRIM_GDSC] = { 0x39004 }, + [USB3_PHY_GDSC] = { 0x50018 }, +}; + +static struct msm_clk_data sm8550_gcc_data = { + .resets = sm8550_gcc_resets, + .num_resets = ARRAY_SIZE(sm8550_gcc_resets), + .clks = sm8550_clks, + .num_clks = ARRAY_SIZE(sm8550_clks), + .power_domains = sm8550_gdscs, + .num_power_domains = ARRAY_SIZE(sm8550_gdscs), + + .enable = sm8550_enable, + .set_rate = sm8550_set_rate, +}; + +static const struct udevice_id gcc_sm8550_of_match[] = { + { + .compatible = "qcom,sm8550-gcc", + .data = (ulong)&sm8550_gcc_data, + }, + { } +}; + +U_BOOT_DRIVER(gcc_sm8550) = { + .name = "gcc_sm8550", + .id = UCLASS_NOP, + .of_match = gcc_sm8550_of_match, + .bind = qcom_cc_bind, + .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF, +}; + +/* TCSRCC */ + +static const struct gate_clk sm8550_tcsr_clks[] = { + GATE_CLK(TCSR_PCIE_0_CLKREF_EN, 0x15100, BIT(0)), + GATE_CLK(TCSR_PCIE_1_CLKREF_EN, 0x15114, BIT(0)), + GATE_CLK(TCSR_UFS_CLKREF_EN, 0x15110, BIT(0)), + GATE_CLK(TCSR_UFS_PAD_CLKREF_EN, 0x15104, BIT(0)), + GATE_CLK(TCSR_USB2_CLKREF_EN, 0x15118, BIT(0)), + GATE_CLK(TCSR_USB3_CLKREF_EN, 0x15108, BIT(0)), +}; + +static struct msm_clk_data sm8550_tcsrcc_data = { + .clks = sm8550_tcsr_clks, + .num_clks = ARRAY_SIZE(sm8550_tcsr_clks), +}; + +static int tcsrcc_sm8550_clk_enable(struct clk *clk) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + + qcom_gate_clk_en(priv, clk->id); + + return 0; +} + +static ulong tcsrcc_sm8550_clk_get_rate(struct clk *clk) +{ + return TCXO_RATE; +} + +static int tcsrcc_sm8550_clk_probe(struct udevice *dev) +{ + struct msm_clk_data *data = (struct msm_clk_data *)dev_get_driver_data(dev); + struct msm_clk_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr(dev); + if (priv->base == FDT_ADDR_T_NONE) + return -EINVAL; + + priv->data = data; + + return 0; +} + +static struct clk_ops tcsrcc_sm8550_clk_ops = { + .enable = tcsrcc_sm8550_clk_enable, + .get_rate = tcsrcc_sm8550_clk_get_rate, +}; + +static const struct udevice_id tcsrcc_sm8550_of_match[] = { + { + .compatible = "qcom,sm8550-tcsr", + .data = (ulong)&sm8550_tcsrcc_data, + }, + { } +}; + +U_BOOT_DRIVER(tcsrcc_sm8550) = { + .name = "tcsrcc_sm8550", + .id = UCLASS_CLK, + .of_match = tcsrcc_sm8550_of_match, + .ops = &tcsrcc_sm8550_clk_ops, + .priv_auto = sizeof(struct msm_clk_priv), + .probe = tcsrcc_sm8550_clk_probe, + .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF, +}; diff --git a/drivers/clk/qcom/clock-sm8650.c b/drivers/clk/qcom/clock-sm8650.c new file mode 100644 index 00000000000..0ce83e9b243 --- /dev/null +++ b/drivers/clk/qcom/clock-sm8650.c @@ -0,0 +1,332 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Clock drivers for Qualcomm sm8650 + * + * (C) Copyright 2024 Linaro Ltd. + */ + +#include <clk-uclass.h> +#include <dm.h> +#include <linux/delay.h> +#include <errno.h> +#include <asm/io.h> +#include <linux/bug.h> +#include <linux/bitops.h> +#include <dt-bindings/clock/qcom,sm8650-gcc.h> +#include <dt-bindings/clock/qcom,sm8650-tcsr.h> + +#include "clock-qcom.h" + +/* On-board TCXO, TOFIX get from DT */ +#define TCXO_RATE 38400000 + +/* bi_tcxo_div2 divided after RPMh output */ +#define TCXO_DIV2_RATE (TCXO_RATE / 2) + +static const struct freq_tbl ftbl_gcc_qupv3_wrap1_s3_clk_src[] = { + F(7372800, CFG_CLK_SRC_GPLL0_EVEN, 1, 384, 15625), + F(14745600, CFG_CLK_SRC_GPLL0_EVEN, 1, 768, 15625), + F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0), + F(29491200, CFG_CLK_SRC_GPLL0_EVEN, 1, 1536, 15625), + F(32000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 75), + F(48000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 25), + F(64000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 16, 75), + F(75000000, CFG_CLK_SRC_GPLL0_EVEN, 4, 0, 0), + F(80000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 15), + F(96000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 25), + F(100000000, CFG_CLK_SRC_GPLL0, 6, 0, 0), + { } +}; + +static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = { + F(400000, CFG_CLK_SRC_CXO, 12, 1, 4), + F(25000000, CFG_CLK_SRC_GPLL0_EVEN, 12, 0, 0), + F(100000000, CFG_CLK_SRC_GPLL0_EVEN, 3, 0, 0), + /* TOFIX F(202000000, CFG_CLK_SRC_GPLL9, 4, 0, 0), */ + { } +}; + +static const struct freq_tbl ftbl_gcc_usb30_prim_master_clk_src[] = { + F(66666667, CFG_CLK_SRC_GPLL0_EVEN, 4.5, 0, 0), + F(133333333, CFG_CLK_SRC_GPLL0, 4.5, 0, 0), + F(200000000, CFG_CLK_SRC_GPLL0, 3, 0, 0), + F(240000000, CFG_CLK_SRC_GPLL0, 2.5, 0, 0), + { } +}; + +static ulong sm8650_set_rate(struct clk *clk, ulong rate) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + const struct freq_tbl *freq; + + switch (clk->id) { + case GCC_QUPV3_WRAP2_S7_CLK: /* UART15 */ + freq = qcom_find_freq(ftbl_gcc_qupv3_wrap1_s3_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, 0x1e898, + freq->pre_div, freq->m, freq->n, freq->src, 16); + return freq->freq; + case GCC_SDCC2_APPS_CLK: + freq = qcom_find_freq(ftbl_gcc_sdcc2_apps_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, 0x14018, + freq->pre_div, freq->m, freq->n, freq->src, 8); + return freq->freq; + case GCC_USB30_PRIM_MASTER_CLK: + freq = qcom_find_freq(ftbl_gcc_usb30_prim_master_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, 0x3902c, + freq->pre_div, freq->m, freq->n, freq->src, 8); + return freq->freq; + case GCC_USB30_PRIM_MOCK_UTMI_CLK: + clk_rcg_set_rate(priv->base, 0x39044, 0, 0); + return TCXO_DIV2_RATE; + case GCC_USB3_PRIM_PHY_AUX_CLK_SRC: + clk_rcg_set_rate(priv->base, 0x39070, 0, 0); + return TCXO_DIV2_RATE; + default: + return 0; + } +} + +static const struct gate_clk sm8650_clks[] = { + GATE_CLK(GCC_AGGRE_NOC_PCIE_AXI_CLK, 0x52000, BIT(12)), + GATE_CLK(GCC_AGGRE_UFS_PHY_AXI_CLK, 0x770e4, BIT(0)), + GATE_CLK(GCC_AGGRE_UFS_PHY_AXI_HW_CTL_CLK, 0x770e4, BIT(1)), + GATE_CLK(GCC_AGGRE_USB3_PRIM_AXI_CLK, 0x3908c, BIT(0)), + GATE_CLK(GCC_CNOC_PCIE_SF_AXI_CLK, 0x52008, BIT(6)), + GATE_CLK(GCC_DDRSS_GPU_AXI_CLK, 0x71154, BIT(0)), + GATE_CLK(GCC_DDRSS_PCIE_SF_QTB_CLK, 0x52000, BIT(19)), + GATE_CLK(GCC_PCIE_0_AUX_CLK, 0x52008, BIT(3)), + GATE_CLK(GCC_PCIE_0_CFG_AHB_CLK, 0x52008, BIT(2)), + GATE_CLK(GCC_PCIE_0_MSTR_AXI_CLK, 0x52008, BIT(1)), + GATE_CLK(GCC_PCIE_0_PHY_RCHNG_CLK, 0x52000, BIT(22)), + GATE_CLK(GCC_PCIE_0_PIPE_CLK, 0x52008, BIT(4)), + GATE_CLK(GCC_PCIE_0_SLV_AXI_CLK, 0x52008, BIT(0)), + GATE_CLK(GCC_PCIE_0_SLV_Q2A_AXI_CLK, 0x52008, BIT(5)), + GATE_CLK(GCC_PCIE_1_AUX_CLK, 0x52000, BIT(29)), + GATE_CLK(GCC_PCIE_1_CFG_AHB_CLK, 0x52000, BIT(28)), + GATE_CLK(GCC_PCIE_1_MSTR_AXI_CLK, 0x52000, BIT(27)), + GATE_CLK(GCC_PCIE_1_PHY_AUX_CLK, 0x52000, BIT(24)), + GATE_CLK(GCC_PCIE_1_PHY_RCHNG_CLK, 0x52000, BIT(23)), + GATE_CLK(GCC_PCIE_1_PIPE_CLK, 0x52000, BIT(30)), + GATE_CLK(GCC_PCIE_1_SLV_AXI_CLK, 0x52000, BIT(26)), + GATE_CLK(GCC_PCIE_1_SLV_Q2A_AXI_CLK, 0x52000, BIT(25)), + GATE_CLK(GCC_QUPV3_I2C_CORE_CLK, 0x52008, BIT(8)), + GATE_CLK(GCC_QUPV3_I2C_S0_CLK, 0x52008, BIT(10)), + GATE_CLK(GCC_QUPV3_I2C_S1_CLK, 0x52008, BIT(11)), + GATE_CLK(GCC_QUPV3_I2C_S2_CLK, 0x52008, BIT(12)), + GATE_CLK(GCC_QUPV3_I2C_S3_CLK, 0x52008, BIT(13)), + GATE_CLK(GCC_QUPV3_I2C_S4_CLK, 0x52008, BIT(14)), + GATE_CLK(GCC_QUPV3_I2C_S5_CLK, 0x52008, BIT(15)), + GATE_CLK(GCC_QUPV3_I2C_S6_CLK, 0x52008, BIT(16)), + GATE_CLK(GCC_QUPV3_I2C_S7_CLK, 0x52008, BIT(17)), + GATE_CLK(GCC_QUPV3_I2C_S8_CLK, 0x52010, BIT(14)), + GATE_CLK(GCC_QUPV3_I2C_S9_CLK, 0x52010, BIT(15)), + GATE_CLK(GCC_QUPV3_I2C_S_AHB_CLK, 0x52008, BIT(7)), + GATE_CLK(GCC_QUPV3_WRAP1_CORE_2X_CLK, 0x52008, BIT(18)), + GATE_CLK(GCC_QUPV3_WRAP1_CORE_CLK, 0x52008, BIT(19)), + GATE_CLK(GCC_QUPV3_WRAP1_S0_CLK, 0x52008, BIT(22)), + GATE_CLK(GCC_QUPV3_WRAP1_S1_CLK, 0x52008, BIT(23)), + GATE_CLK(GCC_QUPV3_WRAP1_S2_CLK, 0x52008, BIT(24)), + GATE_CLK(GCC_QUPV3_WRAP1_S3_CLK, 0x52008, BIT(25)), + GATE_CLK(GCC_QUPV3_WRAP1_S4_CLK, 0x52008, BIT(26)), + GATE_CLK(GCC_QUPV3_WRAP1_S5_CLK, 0x52008, BIT(27)), + GATE_CLK(GCC_QUPV3_WRAP1_S6_CLK, 0x52008, BIT(28)), + GATE_CLK(GCC_QUPV3_WRAP1_S7_CLK, 0x52010, BIT(16)), + GATE_CLK(GCC_QUPV3_WRAP2_CORE_2X_CLK, 0x52010, BIT(3)), + GATE_CLK(GCC_QUPV3_WRAP2_CORE_CLK, 0x52010, BIT(0)), + GATE_CLK(GCC_QUPV3_WRAP2_S0_CLK, 0x52010, BIT(4)), + GATE_CLK(GCC_QUPV3_WRAP2_S1_CLK, 0x52010, BIT(5)), + GATE_CLK(GCC_QUPV3_WRAP2_S2_CLK, 0x52010, BIT(6)), + GATE_CLK(GCC_QUPV3_WRAP2_S3_CLK, 0x52010, BIT(7)), + GATE_CLK(GCC_QUPV3_WRAP2_S4_CLK, 0x52010, BIT(8)), + GATE_CLK(GCC_QUPV3_WRAP2_S5_CLK, 0x52010, BIT(9)), + GATE_CLK(GCC_QUPV3_WRAP2_S6_CLK, 0x52010, BIT(10)), + GATE_CLK(GCC_QUPV3_WRAP2_S7_CLK, 0x52010, BIT(17)), + GATE_CLK(GCC_QUPV3_WRAP_1_M_AHB_CLK, 0x52008, BIT(20)), + GATE_CLK(GCC_QUPV3_WRAP_1_S_AHB_CLK, 0x52008, BIT(21)), + GATE_CLK(GCC_QUPV3_WRAP_2_M_AHB_CLK, 0x52010, BIT(2)), + GATE_CLK(GCC_QUPV3_WRAP_2_S_AHB_CLK, 0x52010, BIT(1)), + GATE_CLK(GCC_SDCC2_AHB_CLK, 0x14010, BIT(0)), + GATE_CLK(GCC_SDCC2_APPS_CLK, 0x14004, BIT(0)), + GATE_CLK(GCC_UFS_PHY_AHB_CLK, 0x77024, BIT(0)), + GATE_CLK(GCC_UFS_PHY_AXI_CLK, 0x77018, BIT(0)), + GATE_CLK(GCC_UFS_PHY_AXI_HW_CTL_CLK, 0x77018, BIT(1)), + GATE_CLK(GCC_UFS_PHY_ICE_CORE_CLK, 0x77074, BIT(0)), + GATE_CLK(GCC_UFS_PHY_ICE_CORE_HW_CTL_CLK, 0x77074, BIT(1)), + GATE_CLK(GCC_UFS_PHY_PHY_AUX_CLK, 0x770b0, BIT(0)), + GATE_CLK(GCC_UFS_PHY_PHY_AUX_HW_CTL_CLK, 0x770b0, BIT(1)), + GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_0_CLK, 0x7702c, BIT(0)), + GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_1_CLK, 0x770cc, BIT(0)), + GATE_CLK(GCC_UFS_PHY_TX_SYMBOL_0_CLK, 0x77028, BIT(0)), + GATE_CLK(GCC_UFS_PHY_UNIPRO_CORE_CLK, 0x77068, BIT(0)), + GATE_CLK(GCC_UFS_PHY_UNIPRO_CORE_HW_CTL_CLK, 0x77068, BIT(1)), + GATE_CLK(GCC_USB30_PRIM_MASTER_CLK, 0x39018, BIT(0)), + GATE_CLK(GCC_USB30_PRIM_MOCK_UTMI_CLK, 0x39028, BIT(0)), + GATE_CLK(GCC_USB30_PRIM_SLEEP_CLK, 0x39024, BIT(0)), + GATE_CLK(GCC_USB3_PRIM_PHY_AUX_CLK, 0x39060, BIT(0)), + GATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0x39064, BIT(0)), + GATE_CLK(GCC_USB3_PRIM_PHY_PIPE_CLK, 0x39068, BIT(0)), +}; + +static int sm8650_enable(struct clk *clk) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + + switch (clk->id) { + case GCC_AGGRE_USB3_PRIM_AXI_CLK: + qcom_gate_clk_en(priv, GCC_USB30_PRIM_MASTER_CLK); + fallthrough; + case GCC_USB30_PRIM_MASTER_CLK: + qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_AUX_CLK); + qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_COM_AUX_CLK); + break; + } + + qcom_gate_clk_en(priv, clk->id); + + return 0; +} + +static const struct qcom_reset_map sm8650_gcc_resets[] = { + [GCC_CAMERA_BCR] = { 0x26000 }, + [GCC_DISPLAY_BCR] = { 0x27000 }, + [GCC_GPU_BCR] = { 0x71000 }, + [GCC_PCIE_0_BCR] = { 0x6b000 }, + [GCC_PCIE_0_LINK_DOWN_BCR] = { 0x6c014 }, + [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0x6c020 }, + [GCC_PCIE_0_PHY_BCR] = { 0x6c01c }, + [GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR] = { 0x6c028 }, + [GCC_PCIE_1_BCR] = { 0x8d000 }, + [GCC_PCIE_1_LINK_DOWN_BCR] = { 0x8e014 }, + [GCC_PCIE_1_NOCSR_COM_PHY_BCR] = { 0x8e020 }, + [GCC_PCIE_1_PHY_BCR] = { 0x8e01c }, + [GCC_PCIE_1_PHY_NOCSR_COM_PHY_BCR] = { 0x8e024 }, + [GCC_PCIE_PHY_BCR] = { 0x6f000 }, + [GCC_PCIE_PHY_CFG_AHB_BCR] = { 0x6f00c }, + [GCC_PCIE_PHY_COM_BCR] = { 0x6f010 }, + [GCC_PDM_BCR] = { 0x33000 }, + [GCC_QUPV3_WRAPPER_1_BCR] = { 0x18000 }, + [GCC_QUPV3_WRAPPER_2_BCR] = { 0x1e000 }, + [GCC_QUPV3_WRAPPER_3_BCR] = { 0x19000 }, + [GCC_QUPV3_WRAPPER_I2C_BCR] = { 0x17000 }, + [GCC_QUSB2PHY_PRIM_BCR] = { 0x12000 }, + [GCC_QUSB2PHY_SEC_BCR] = { 0x12004 }, + [GCC_SDCC2_BCR] = { 0x14000 }, + [GCC_SDCC4_BCR] = { 0x16000 }, + [GCC_UFS_PHY_BCR] = { 0x77000 }, + [GCC_USB30_PRIM_BCR] = { 0x39000 }, + [GCC_USB3_DP_PHY_PRIM_BCR] = { 0x50008 }, + [GCC_USB3_DP_PHY_SEC_BCR] = { 0x50014 }, + [GCC_USB3_PHY_PRIM_BCR] = { 0x50000 }, + [GCC_USB3_PHY_SEC_BCR] = { 0x5000c }, + [GCC_USB3PHY_PHY_PRIM_BCR] = { 0x50004 }, + [GCC_USB3PHY_PHY_SEC_BCR] = { 0x50010 }, + [GCC_VIDEO_AXI0_CLK_ARES] = { 0x32018, 2 }, + [GCC_VIDEO_AXI1_CLK_ARES] = { 0x32024, 2 }, + [GCC_VIDEO_BCR] = { 0x32000 }, +}; + +static const struct qcom_power_map sm8650_gdscs[] = { + [PCIE_0_GDSC] = { 0x6b004 }, + [PCIE_0_PHY_GDSC] = { 0x6c000 }, + [PCIE_1_GDSC] = { 0x8d004 }, + [PCIE_1_PHY_GDSC] = { 0x8e000 }, + [UFS_PHY_GDSC] = { 0x77004 }, + [UFS_MEM_PHY_GDSC] = { 0x9e000 }, + [USB30_PRIM_GDSC] = { 0x39004 }, + [USB3_PHY_GDSC] = { 0x50018 }, +}; + +static struct msm_clk_data sm8650_gcc_data = { + .resets = sm8650_gcc_resets, + .num_resets = ARRAY_SIZE(sm8650_gcc_resets), + .clks = sm8650_clks, + .num_clks = ARRAY_SIZE(sm8650_clks), + .power_domains = sm8650_gdscs, + .num_power_domains = ARRAY_SIZE(sm8650_gdscs), + + .enable = sm8650_enable, + .set_rate = sm8650_set_rate, +}; + +static const struct udevice_id gcc_sm8650_of_match[] = { + { + .compatible = "qcom,sm8650-gcc", + .data = (ulong)&sm8650_gcc_data, + }, + { } +}; + +U_BOOT_DRIVER(gcc_sm8650) = { + .name = "gcc_sm8650", + .id = UCLASS_NOP, + .of_match = gcc_sm8650_of_match, + .bind = qcom_cc_bind, + .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF, +}; + +/* TCSRCC */ + +static const struct gate_clk sm8650_tcsr_clks[] = { + GATE_CLK(TCSR_PCIE_0_CLKREF_EN, 0x31100, BIT(0)), + GATE_CLK(TCSR_PCIE_1_CLKREF_EN, 0x31114, BIT(0)), + GATE_CLK(TCSR_UFS_CLKREF_EN, 0x31110, BIT(0)), + GATE_CLK(TCSR_UFS_PAD_CLKREF_EN, 0x31104, BIT(0)), + GATE_CLK(TCSR_USB2_CLKREF_EN, 0x31118, BIT(0)), + GATE_CLK(TCSR_USB3_CLKREF_EN, 0x31108, BIT(0)), +}; + +static struct msm_clk_data sm8650_tcsrcc_data = { + .clks = sm8650_tcsr_clks, + .num_clks = ARRAY_SIZE(sm8650_tcsr_clks), +}; + +static int tcsrcc_sm8650_clk_enable(struct clk *clk) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + + qcom_gate_clk_en(priv, clk->id); + + return 0; +} + +static ulong tcsrcc_sm8650_clk_get_rate(struct clk *clk) +{ + return TCXO_RATE; +} + +static int tcsrcc_sm8650_clk_probe(struct udevice *dev) +{ + struct msm_clk_data *data = (struct msm_clk_data *)dev_get_driver_data(dev); + struct msm_clk_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr(dev); + if (priv->base == FDT_ADDR_T_NONE) + return -EINVAL; + + priv->data = data; + + return 0; +} + +static struct clk_ops tcsrcc_sm8650_clk_ops = { + .enable = tcsrcc_sm8650_clk_enable, + .get_rate = tcsrcc_sm8650_clk_get_rate, +}; + +static const struct udevice_id tcsrcc_sm8650_of_match[] = { + { + .compatible = "qcom,sm8650-tcsr", + .data = (ulong)&sm8650_tcsrcc_data, + }, + { } +}; + +U_BOOT_DRIVER(tcsrcc_sm8650) = { + .name = "tcsrcc_sm8650", + .id = UCLASS_CLK, + .of_match = tcsrcc_sm8650_of_match, + .ops = &tcsrcc_sm8650_clk_ops, + .priv_auto = sizeof(struct msm_clk_priv), + .probe = tcsrcc_sm8650_clk_probe, + .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF, +}; diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c index dba009997a8..c8735d869cf 100644 --- a/drivers/clk/renesas/rzg2l-cpg.c +++ b/drivers/clk/renesas/rzg2l-cpg.c @@ -313,9 +313,9 @@ static ulong rzg2l_sdhi_clk_set_rate(struct udevice *dev, const struct cpg_core_ /* * As per the HW manual, we should not directly switch from 533 MHz to - * 400 MHz and vice versa. To change the setting from 2’b01 (533 MHz) - * to 2’b10 (400 MHz) or vice versa, Switch to 2’b11 (266 MHz) first, - * and then switch to the target setting (2’b01 (533 MHz) or 2’b10 + * 400 MHz and vice versa. To change the setting from 2'b01 (533 MHz) + * to 2'b10 (400 MHz) or vice versa, Switch to 2'b11 (266 MHz) first, + * and then switch to the target setting (2'b01 (533 MHz) or 2'b10 * (400 MHz)). */ if (new_sel != SEL_SDHI_266MHz && prev_sel != SEL_SDHI_266MHz) { diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c index 7755b016111..861648321d4 100644 --- a/drivers/clk/rockchip/clk_rk3308.c +++ b/drivers/clk/rockchip/clk_rk3308.c @@ -12,8 +12,8 @@ #include <malloc.h> #include <syscon.h> #include <asm/global_data.h> -#include <asm/arch/cru_rk3308.h> #include <asm/arch-rockchip/clock.h> +#include <asm/arch-rockchip/cru_rk3308.h> #include <asm/arch-rockchip/hardware.h> #include <dm/device-internal.h> #include <dm/lists.h> @@ -65,6 +65,57 @@ static struct rockchip_pll_clock rk3308_pll_clks[] = { RK3308_MODE_CON, 6, 10, 0, NULL), }; +/* + * + * rational_best_approximation(31415, 10000, + * (1 << 8) - 1, (1 << 5) - 1, &n, &d); + * + * you may look at given_numerator as a fixed point number, + * with the fractional part size described in given_denominator. + * + * for theoretical background, see: + * http://en.wikipedia.org/wiki/Continued_fraction + */ +static void rational_best_approximation(unsigned long given_numerator, + unsigned long given_denominator, + unsigned long max_numerator, + unsigned long max_denominator, + unsigned long *best_numerator, + unsigned long *best_denominator) +{ + unsigned long n, d, n0, d0, n1, d1; + + n = given_numerator; + d = given_denominator; + n0 = 0; + d1 = 0; + n1 = 1; + d0 = 1; + for (;;) { + unsigned long t, a; + + if (n1 > max_numerator || d1 > max_denominator) { + n1 = n0; + d1 = d0; + break; + } + if (d == 0) + break; + t = d; + a = n / d; + d = n % d; + n = t; + t = n0 + a * n1; + n0 = n1; + n1 = t; + t = d0 + a * d1; + d0 = d1; + d1 = t; + } + *best_numerator = n1; + *best_denominator = d1; +} + static ulong rk3308_armclk_set_clk(struct rk3308_clk_priv *priv, ulong hz) { struct rk3308_cru *cru = priv->cru; @@ -832,6 +883,44 @@ static ulong rk3308_crypto_set_clk(struct rk3308_clk_priv *priv, ulong clk_id, return rk3308_crypto_get_clk(priv, clk_id); } +static ulong rk3308_rtc32k_get_clk(struct rk3308_clk_priv *priv, ulong clk_id) +{ + struct rk3308_cru *cru = priv->cru; + unsigned long m, n; + u32 con, fracdiv; + + con = readl(&cru->clksel_con[2]); + if ((con & CLK_RTC32K_SEL_MASK) >> CLK_RTC32K_SEL_SHIFT != + CLK_RTC32K_FRAC_DIV) + return -EINVAL; + + fracdiv = readl(&cru->clksel_con[3]); + m = fracdiv & CLK_RTC32K_FRAC_NUMERATOR_MASK; + m >>= CLK_RTC32K_FRAC_NUMERATOR_SHIFT; + n = fracdiv & CLK_RTC32K_FRAC_DENOMINATOR_MASK; + n >>= CLK_RTC32K_FRAC_DENOMINATOR_SHIFT; + + return OSC_HZ * m / n; +} + +static ulong rk3308_rtc32k_set_clk(struct rk3308_clk_priv *priv, ulong clk_id, + ulong hz) +{ + struct rk3308_cru *cru = priv->cru; + unsigned long m, n, val; + + rational_best_approximation(hz, OSC_HZ, + GENMASK(16 - 1, 0), + GENMASK(16 - 1, 0), + &m, &n); + val = m << CLK_RTC32K_FRAC_NUMERATOR_SHIFT | n; + writel(val, &cru->clksel_con[3]); + rk_clrsetreg(&cru->clksel_con[2], CLK_RTC32K_SEL_MASK, + CLK_RTC32K_FRAC_DIV << CLK_RTC32K_SEL_SHIFT); + + return rk3308_rtc32k_get_clk(priv, clk_id); +} + static ulong rk3308_clk_get_rate(struct clk *clk) { struct rk3308_clk_priv *priv = dev_get_priv(clk->dev); @@ -912,6 +1001,9 @@ static ulong rk3308_clk_get_rate(struct clk *clk) case SCLK_CRYPTO_APK: rate = rk3308_crypto_get_clk(priv, clk->id); break; + case SCLK_RTC32K: + rate = rk3308_rtc32k_get_clk(priv, clk->id); + break; default: return -ENOENT; } @@ -990,6 +1082,11 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate) case SCLK_CRYPTO_APK: ret = rk3308_crypto_set_clk(priv, clk->id, rate); break; + case SCLK_RTC32K: + ret = rk3308_rtc32k_set_clk(priv, clk->id, rate); + break; + case USB480M: + return 0; default: return -ENOENT; } @@ -1022,6 +1119,8 @@ static int __maybe_unused rk3308_clk_set_parent(struct clk *clk, struct clk *par switch (clk->id) { case SCLK_MAC: return rk3308_mac_set_parent(clk, parent); + case USB480M: + return 0; default: break; } diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c index cfec1d974ac..87075ec7134 100644 --- a/drivers/clk/rockchip/clk_rk3328.c +++ b/drivers/clk/rockchip/clk_rk3328.c @@ -178,6 +178,10 @@ enum { CLK_I2C3_DIV_CON_SHIFT = 8, CLK_I2C2_PLL_SEL_SHIFT = 7, CLK_I2C2_DIV_CON_SHIFT = 0, + + /* CLKSEL_CON40 */ + CLK_HDMIPHY_DIV_CON_SHIFT = 3, + CLK_HDMIPHY_DIV_CON_MASK = 0x7 << CLK_HDMIPHY_DIV_CON_SHIFT, }; #define VCO_MAX_KHZ (3200 * (MHz / KHz)) @@ -580,6 +584,96 @@ static ulong rk3328_spi_set_clk(struct rk3328_cru *cru, uint hz) return rk3328_spi_get_clk(cru); } +#ifndef CONFIG_SPL_BUILD +static ulong rk3328_vop_get_clk(struct rk3328_clk_priv *priv, ulong clk_id) +{ + struct rk3328_cru *cru = priv->cru; + u32 div, con, parent; + + switch (clk_id) { + case ACLK_VOP_PRE: + con = readl(&cru->clksel_con[39]); + div = (con & ACLK_VOP_DIV_CON_MASK) >> ACLK_VOP_DIV_CON_SHIFT; + parent = GPLL_HZ; + break; + case ACLK_VIO_PRE: + con = readl(&cru->clksel_con[37]); + div = (con & ACLK_VIO_DIV_CON_MASK) >> ACLK_VIO_DIV_CON_SHIFT; + parent = GPLL_HZ; + break; + case DCLK_LCDC: + con = readl(&cru->clksel_con[40]); + div = (con & DCLK_LCDC_DIV_CON_MASK) >> DCLK_LCDC_DIV_CON_SHIFT; + parent = GPLL_HZ; + break; + default: + printf("%s: Unsupported vop get clk#%ld\n", __func__, clk_id); + return -ENOENT; + } + + return DIV_TO_RATE(parent, div); +} + +static ulong rk3328_vop_set_clk(struct rk3328_clk_priv *priv, + ulong clk_id, uint hz) +{ + struct rk3328_cru *cru = priv->cru; + int src_clk_div; + u32 con, parent; + + src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz); + assert(src_clk_div - 1 < 31); + + switch (clk_id) { + case ACLK_VOP_PRE: + rk_clrsetreg(&cru->clksel_con[39], + ACLK_VOP_PLL_SEL_MASK | ACLK_VOP_DIV_CON_MASK, + ACLK_VOP_PLL_SEL_CPLL << ACLK_VOP_PLL_SEL_SHIFT | + (src_clk_div - 1) << ACLK_VOP_DIV_CON_SHIFT); + break; + case ACLK_VIO_PRE: + rk_clrsetreg(&cru->clksel_con[37], + ACLK_VIO_PLL_SEL_MASK | ACLK_VIO_DIV_CON_MASK, + ACLK_VIO_PLL_SEL_CPLL << ACLK_VIO_PLL_SEL_SHIFT | + (src_clk_div - 1) << ACLK_VIO_DIV_CON_SHIFT); + break; + case DCLK_LCDC: + con = readl(&cru->clksel_con[40]); + con = (con & DCLK_LCDC_SEL_MASK) >> DCLK_LCDC_SEL_SHIFT; + if (con) { + parent = readl(&cru->clksel_con[40]); + parent = (parent & DCLK_LCDC_PLL_SEL_MASK) >> + DCLK_LCDC_PLL_SEL_SHIFT; + if (parent) + src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz); + else + src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz); + + rk_clrsetreg(&cru->clksel_con[40], + DCLK_LCDC_DIV_CON_MASK, + (src_clk_div - 1) << + DCLK_LCDC_DIV_CON_SHIFT); + } + break; + default: + printf("%s: Unable to set vop clk#%ld\n", __func__, clk_id); + return -EINVAL; + } + + return rk3328_vop_get_clk(priv, clk_id); +} +#endif + +static ulong rk3328_hdmiphy_get_clk(struct rk3328_cru *cru) +{ + u32 div, con; + + con = readl(&cru->clksel_con[40]); + div = (con & CLK_HDMIPHY_DIV_CON_MASK) >> CLK_HDMIPHY_DIV_CON_SHIFT; + + return DIV_TO_RATE(GPLL_HZ, div); +} + static ulong rk3328_clk_get_rate(struct clk *clk) { struct rk3328_clk_priv *priv = dev_get_priv(clk->dev); @@ -609,6 +703,9 @@ static ulong rk3328_clk_get_rate(struct clk *clk) case SCLK_SPI: rate = rk3328_spi_get_clk(priv->cru); break; + case PCLK_HDMIPHY: + rate = rk3328_hdmiphy_get_clk(priv->cru); + break; default: return -ENOENT; } @@ -648,7 +745,13 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate) case SCLK_SPI: ret = rk3328_spi_set_clk(priv->cru, rate); break; +#ifndef CONFIG_SPL_BUILD case DCLK_LCDC: + case ACLK_VOP_PRE: + case ACLK_VIO_PRE: + rate = rk3328_vop_set_clk(priv, clk->id, rate); + break; +#endif case SCLK_PDM: case SCLK_RTC32K: case SCLK_UART0: @@ -663,11 +766,9 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate) case ACLK_PERI_PRE: case HCLK_PERI: case PCLK_PERI: - case ACLK_VIO_PRE: case HCLK_VIO_PRE: case ACLK_RGA_PRE: case SCLK_RGA: - case ACLK_VOP_PRE: case ACLK_RKVDEC_PRE: case ACLK_RKVENC: case ACLK_VPU_PRE: diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c index 57ef27dda89..24eeca8bf26 100644 --- a/drivers/clk/rockchip/clk_rk3568.c +++ b/drivers/clk/rockchip/clk_rk3568.c @@ -1527,28 +1527,20 @@ static ulong rk3568_sfc_set_clk(struct rk3568_clk_priv *priv, ulong rate) struct rk3568_cru *cru = priv->cru; int src_clk; - switch (rate) { - case OSC_HZ: - src_clk = SCLK_SFC_SEL_24M; - break; - case 50 * MHz: - src_clk = SCLK_SFC_SEL_50M; - break; - case 75 * MHz: - src_clk = SCLK_SFC_SEL_75M; - break; - case 100 * MHz: - src_clk = SCLK_SFC_SEL_100M; - break; - case 125 * MHz: - src_clk = SCLK_SFC_SEL_125M; - break; - case 150 * MHz: + if (rate >= 150 * MHz) src_clk = SCLK_SFC_SEL_150M; - break; - default: + else if (rate >= 125 * MHz) + src_clk = SCLK_SFC_SEL_125M; + else if (rate >= 100 * MHz) + src_clk = SCLK_SFC_SEL_100M; + else if (rate >= 75 * MHz) + src_clk = SCLK_SFC_SEL_75M; + else if (rate >= 50 * MHz) + src_clk = SCLK_SFC_SEL_50M; + else if (rate >= OSC_HZ) + src_clk = SCLK_SFC_SEL_24M; + else return -ENOENT; - } rk_clrsetreg(&cru->clksel_con[28], SCLK_SFC_SEL_MASK, @@ -2417,6 +2409,8 @@ static ulong rk3568_clk_get_rate(struct clk *clk) case BCLK_EMMC: rate = rk3568_emmc_get_bclk(priv); break; + case CLK_USB3OTG0_REF: + case CLK_USB3OTG1_REF: case TCLK_EMMC: rate = OSC_HZ; break; @@ -2596,6 +2590,8 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate) case BCLK_EMMC: ret = rk3568_emmc_set_bclk(priv, rate); break; + case CLK_USB3OTG0_REF: + case CLK_USB3OTG1_REF: case TCLK_EMMC: ret = OSC_HZ; break; diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c index 8f33843179b..4c611a39049 100644 --- a/drivers/clk/rockchip/clk_rk3588.c +++ b/drivers/clk/rockchip/clk_rk3588.c @@ -1569,6 +1569,9 @@ static ulong rk3588_clk_get_rate(struct clk *clk) case DCLK_DECOM: rate = rk3588_mmc_get_clk(priv, clk->id); break; + case REF_CLK_USB3OTG0: + case REF_CLK_USB3OTG1: + case REF_CLK_USB3OTG2: case TMCLK_EMMC: case TCLK_WDT0: rate = OSC_HZ; @@ -1734,6 +1737,9 @@ static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate) case DCLK_DECOM: ret = rk3588_mmc_set_clk(priv, clk->id, rate); break; + case REF_CLK_USB3OTG0: + case REF_CLK_USB3OTG1: + case REF_CLK_USB3OTG2: case TMCLK_EMMC: case TCLK_WDT0: ret = OSC_HZ; diff --git a/drivers/clk/stm32/clk-stm32-core.h b/drivers/clk/stm32/clk-stm32-core.h index 53c2b467ab8..f9ef0702005 100644 --- a/drivers/clk/stm32/clk-stm32-core.h +++ b/drivers/clk/stm32/clk-stm32-core.h @@ -178,7 +178,7 @@ int stm32_rcc_init(struct udevice *dev, * ------------------------------ ---------- * Each peripheral requires a bus interface clock, named ckg_bus_perx - * (for peripheral ‘x’). + * (for peripheral `x'). * Some peripherals (SAI, UART...) need also a dedicated clock for their * communication interface, this clock is generally asynchronous with respect to * the bus interface clock, and is named kernel clock (ckg_ker_perx). @@ -188,16 +188,16 @@ int stm32_rcc_init(struct udevice *dev, * the bus or the Kernel was enable. * * Example: - * 1) enable the bus clock - * --> bus_clk ref_counting = 1, gate_ref_count = 1 - * 2) enable the kernel clock - * --> perx_ker_ck ref_counting = 1, gate_ref_count = 2 - * 3) disable kernel clock - * ---> perx_ker_ck ref_counting = 0, gate_ref_count = 1 - * ==> then i will not gate because gate_ref_count > 0 - * 4) disable bus clock - * --> bus_clk ref_counting = 0, gate_ref_count = 0 - * ==> then i can gate (write in the register) because + * 1) enable the bus clock + * --> bus_clk ref_counting = 1, gate_ref_count = 1 + * 2) enable the kernel clock + * --> perx_ker_ck ref_counting = 1, gate_ref_count = 2 + * 3) disable kernel clock + * ---> perx_ker_ck ref_counting = 0, gate_ref_count = 1 + * ==> then i will not gate because gate_ref_count > 0 + * 4) disable bus clock + * --> bus_clk ref_counting = 0, gate_ref_count = 0 + * ==> then i can gate (write in the register) because * gate_ref_count = 0 */ diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index 12ef84ca05c..8b49997030b 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig @@ -1,11 +1,11 @@ menu "Hardware crypto devices" -source drivers/crypto/hash/Kconfig +source "drivers/crypto/hash/Kconfig" -source drivers/crypto/fsl/Kconfig +source "drivers/crypto/fsl/Kconfig" -source drivers/crypto/aspeed/Kconfig +source "drivers/crypto/aspeed/Kconfig" -source drivers/crypto/nuvoton/Kconfig +source "drivers/crypto/nuvoton/Kconfig" endmenu diff --git a/drivers/ddr/imx/imx8ulp/Kconfig b/drivers/ddr/imx/imx8ulp/Kconfig index 5448c33838c..005f581f4ba 100644 --- a/drivers/ddr/imx/imx8ulp/Kconfig +++ b/drivers/ddr/imx/imx8ulp/Kconfig @@ -5,7 +5,7 @@ config IMX8ULP_DRAM bool "imx8m dram" config IMX8ULP_DRAM_PHY_PLL_BYPASS - bool "Enable the DDR PHY PLL bypass mode, so PHY clock is from DDR_CLK " + bool "Enable the DDR PHY PLL bypass mode, so PHY clock is from DDR_CLK" depends on IMX8ULP_DRAM config SAVED_DRAM_TIMING_BASE diff --git a/drivers/fastboot/Kconfig b/drivers/fastboot/Kconfig index d6e2be09cf7..70207573de2 100644 --- a/drivers/fastboot/Kconfig +++ b/drivers/fastboot/Kconfig @@ -1,4 +1,5 @@ menu "Fastboot support" + depends on CMDLINE config FASTBOOT bool @@ -252,6 +253,13 @@ config FASTBOOT_CMD_OEM_CONSOLE Add support for the "oem console" command to input and read console record buffer. +config FASTBOOT_OEM_BOARD + bool "Enable the 'oem board' command" + help + This extends the fastboot protocol with an "oem board" command. This + command allows running vendor custom code defined in board/ files. + Otherwise, it will do nothing and send fastboot fail. + endif # FASTBOOT endmenu diff --git a/drivers/fastboot/fb_command.c b/drivers/fastboot/fb_command.c index b8782bfa7fa..01443c5d39e 100644 --- a/drivers/fastboot/fb_command.c +++ b/drivers/fastboot/fb_command.c @@ -11,7 +11,6 @@ #include <fastboot-internal.h> #include <fb_mmc.h> #include <fb_nand.h> -#include <mapmem.h> #include <part.h> #include <stdlib.h> #include <linux/printk.h> @@ -43,6 +42,7 @@ static void oem_format(char *, char *); static void oem_partconf(char *, char *); static void oem_bootbus(char *, char *); static void oem_console(char *, char *); +static void oem_board(char *, char *); static void run_ucmd(char *, char *); static void run_acmd(char *, char *); @@ -114,6 +114,10 @@ static const struct { .command = "oem console", .dispatch = CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_CONSOLE, (oem_console), (NULL)) }, + [FASTBOOT_COMMAND_OEM_BOARD] = { + .command = "oem board", + .dispatch = CONFIG_IS_ENABLED(FASTBOOT_OEM_BOARD, (oem_board), (NULL)) + }, [FASTBOOT_COMMAND_UCMD] = { .command = "UCmd", .dispatch = CONFIG_IS_ENABLED(FASTBOOT_UUU_SUPPORT, (run_ucmd), (NULL)) @@ -279,7 +283,6 @@ void fastboot_data_download(const void *fastboot_data, { #define BYTES_PER_DOT 0x20000 u32 pre_dot_num, now_dot_num; - void *buf; if (fastboot_data_len == 0 || (fastboot_bytes_received + fastboot_data_len) > @@ -289,10 +292,8 @@ void fastboot_data_download(const void *fastboot_data, return; } /* Download data to fastboot_buf_addr */ - buf = map_sysmem(fastboot_buf_addr, 0); - memcpy(buf + fastboot_bytes_received, + memcpy(fastboot_buf_addr + fastboot_bytes_received, fastboot_data, fastboot_data_len); - unmap_sysmem(buf); pre_dot_num = fastboot_bytes_received / BYTES_PER_DOT; fastboot_bytes_received += fastboot_data_len; @@ -335,16 +336,13 @@ void fastboot_data_complete(char *response) */ static void __maybe_unused flash(char *cmd_parameter, char *response) { - void *buf = map_sysmem(fastboot_buf_addr, 0); - if (IS_ENABLED(CONFIG_FASTBOOT_FLASH_MMC)) - fastboot_mmc_flash_write(cmd_parameter, buf, image_size, - response); + fastboot_mmc_flash_write(cmd_parameter, fastboot_buf_addr, + image_size, response); if (IS_ENABLED(CONFIG_FASTBOOT_FLASH_NAND)) - fastboot_nand_flash_write(cmd_parameter, buf, image_size, - response); - unmap_sysmem(buf); + fastboot_nand_flash_write(cmd_parameter, fastboot_buf_addr, + image_size, response); } /** @@ -549,3 +547,28 @@ static void __maybe_unused oem_console(char *cmd_parameter, char *response) else fastboot_response(FASTBOOT_MULTIRESPONSE_START, response, NULL); } + +/** + * fastboot_oem_board() - Execute the OEM board command. This is default + * weak implementation, which may be overwritten in board/ files. + * + * @cmd_parameter: Pointer to command parameter + * @data: Pointer to fastboot input buffer + * @size: Size of the fastboot input buffer + * @response: Pointer to fastboot response buffer + */ +void __weak fastboot_oem_board(char *cmd_parameter, void *data, u32 size, char *response) +{ + fastboot_fail("oem board function not defined", response); +} + +/** + * oem_board() - Execute the OEM board command + * + * @cmd_parameter: Pointer to command parameter + * @response: Pointer to fastboot response buffer + */ +static void __maybe_unused oem_board(char *cmd_parameter, char *response) +{ + fastboot_oem_board(cmd_parameter, (void *)fastboot_buf_addr, image_size, response); +} diff --git a/drivers/fastboot/fb_common.c b/drivers/fastboot/fb_common.c index 595954542a6..3576b067729 100644 --- a/drivers/fastboot/fb_common.c +++ b/drivers/fastboot/fb_common.c @@ -11,7 +11,6 @@ */ #include <bcb.h> -#include <bootm.h> #include <common.h> #include <command.h> #include <env.h> @@ -21,7 +20,7 @@ /** * fastboot_buf_addr - base address of the fastboot download buffer */ -ulong fastboot_buf_addr; +void *fastboot_buf_addr; /** * fastboot_buf_size - size of the fastboot download buffer @@ -143,19 +142,22 @@ void (*fastboot_get_progress_callback(void))(const char *) */ void fastboot_boot(void) { - char *s = NULL; + char *s; - if (IS_ENABLED(CONFIG_CMDLINE)) { - s = env_get("fastboot_bootcmd"); - if (s) - run_command(s, CMD_FLAG_ENV); - } + s = env_get("fastboot_bootcmd"); + if (s) { + run_command(s, CMD_FLAG_ENV); + } else if (IS_ENABLED(CONFIG_CMD_BOOTM)) { + static char boot_addr_start[20]; + static char *const bootm_args[] = { + "bootm", boot_addr_start, NULL + }; - if (!s && IS_ENABLED(CONFIG_BOOTM)) { - int ret; + snprintf(boot_addr_start, sizeof(boot_addr_start) - 1, + "0x%p", fastboot_buf_addr); + printf("Booting kernel at %s...\n\n\n", boot_addr_start); - printf("Booting kernel at %lx...\n\n\n", fastboot_buf_addr); - ret = bootm_boot_start(fastboot_buf_addr, NULL); + do_bootm(NULL, 0, 2, bootm_args); /* * This only happens if image is somehow faulty so we start @@ -212,9 +214,16 @@ void fastboot_set_progress_callback(void (*progress)(const char *msg)) fastboot_progress_callback = progress; } -void fastboot_init(ulong buf_addr, u32 buf_size) +/* + * fastboot_init() - initialise new fastboot protocol session + * + * @buf_addr: Pointer to download buffer, or NULL for default + * @buf_size: Size of download buffer, or zero for default + */ +void fastboot_init(void *buf_addr, u32 buf_size) { - fastboot_buf_addr = buf_addr ? buf_addr : CONFIG_FASTBOOT_BUF_ADDR; + fastboot_buf_addr = buf_addr ? buf_addr : + (void *)CONFIG_FASTBOOT_BUF_ADDR; fastboot_buf_size = buf_size ? buf_size : CONFIG_FASTBOOT_BUF_SIZE; fastboot_set_progress_callback(NULL); } diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c index 14a8210522b..0dd3434e9e0 100644 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -35,6 +35,8 @@ #define REG_SUBTYPE_GPIOC_8CH 0xd #define REG_SUBTYPE_GPIO_LV 0x10 #define REG_SUBTYPE_GPIO_MV 0x11 +#define REG_SUBTYPE_GPIO_LV_VIN2 0x12 +#define REG_SUBTYPE_GPIO_MV_VIN3 0x13 #define REG_STATUS 0x08 #define REG_STATUS_VAL_MASK 0x1 @@ -322,9 +324,20 @@ static int qcom_gpio_probe(struct udevice *dev) return log_msg_ret("bad type", -ENXIO); val = pmic_reg_read(plat->pmic, plat->pid + REG_SUBTYPE); - if (val != REG_SUBTYPE_GPIO_4CH && val != REG_SUBTYPE_GPIOC_4CH && - val != REG_SUBTYPE_GPIO_LV && val != REG_SUBTYPE_GPIO_MV) + switch (val) { + case REG_SUBTYPE_GPIO_4CH: + case REG_SUBTYPE_GPIOC_4CH: + plat->lv_mv_type = false; + break; + case REG_SUBTYPE_GPIO_LV: + case REG_SUBTYPE_GPIO_MV: + case REG_SUBTYPE_GPIO_LV_VIN2: + case REG_SUBTYPE_GPIO_MV_VIN3: + plat->lv_mv_type = true; + break; + default: return log_msg_ret("bad subtype", -ENXIO); + } plat->lv_mv_type = val == REG_SUBTYPE_GPIO_LV || val == REG_SUBTYPE_GPIO_MV; @@ -351,6 +364,9 @@ static const struct udevice_id qcom_gpio_ids[] = { { .compatible = "qcom,pm8994-gpio" }, /* 22 GPIO's */ { .compatible = "qcom,pm8998-gpio", .data = QCOM_PMIC_QUIRK_READONLY }, { .compatible = "qcom,pms405-gpio" }, + { .compatible = "qcom,pm6125-gpio", .data = QCOM_PMIC_QUIRK_READONLY }, + { .compatible = "qcom,pm8150-gpio", .data = QCOM_PMIC_QUIRK_READONLY }, + { .compatible = "qcom,pm8550-gpio", .data = QCOM_PMIC_QUIRK_READONLY }, { } }; diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 59c635af80b..34b02114dc6 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -638,6 +638,16 @@ config SYS_I2C_QUP Technical Reference Manual, chapter "6.1 Qualcomm Universal Peripherals Engine (QUP)". +config SYS_I2C_GENI + bool "Qualcomm Generic Interface (GENI) I2C controller" + depends on ARCH_SNAPDRAGON + help + Support for the Qualcomm Generic Interface (GENI) I2C interface. + The Generic Interface (GENI) is a firmware based Qualcomm Universal + Peripherals (QUP) Serial Engine (SE) Wrapper which can support multiple + bus protocols depending on the firmware type loaded at early boot time + based on system configuration. + config SYS_I2C_S3C24X0 bool "Samsung I2C driver" depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) && DM_I2C diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index 692f63bafd0..00b90523c62 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -20,6 +20,7 @@ obj-$(CONFIG_SYS_I2C_DAVINCI) += davinci_i2c.o obj-$(CONFIG_SYS_I2C_DW) += designware_i2c.o obj-$(CONFIG_SYS_I2C_DW_PCI) += designware_i2c_pci.o obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o +obj-$(CONFIG_SYS_I2C_GENI) += geni_i2c.o obj-$(CONFIG_SYS_I2C_IHS) += ihs_i2c.o obj-$(CONFIG_SYS_I2C_INTEL) += intel_i2c.o obj-$(CONFIG_SYS_I2C_IMX_LPI2C) += imx_lpi2c.o diff --git a/drivers/i2c/geni_i2c.c b/drivers/i2c/geni_i2c.c new file mode 100644 index 00000000000..eabf5c76c21 --- /dev/null +++ b/drivers/i2c/geni_i2c.c @@ -0,0 +1,575 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * Copyright (c) 2024, Linaro Limited + * Author: Neil Armstrong <neil.armstrong@linaro.org> + * + * Based on Linux driver: drivers/i2c/busses/i2c-qcom-geni.c + */ + +#include <log.h> +#include <dm/device.h> +#include <dm/read.h> +#include <dm/device_compat.h> +#include <linux/delay.h> +#include <linux/errno.h> +#include <linux/err.h> +#include <linux/bitops.h> +#include <asm/io.h> +#include <i2c.h> +#include <fdtdec.h> +#include <clk.h> +#include <reset.h> +#include <time.h> +#include <soc/qcom/geni-se.h> + +#define SE_I2C_TX_TRANS_LEN 0x26c +#define SE_I2C_RX_TRANS_LEN 0x270 +#define SE_I2C_SCL_COUNTERS 0x278 + +#define SE_I2C_ERR (M_CMD_OVERRUN_EN | M_ILLEGAL_CMD_EN | M_CMD_FAILURE_EN |\ + M_GP_IRQ_1_EN | M_GP_IRQ_3_EN | M_GP_IRQ_4_EN) +#define SE_I2C_ABORT BIT(1) + +/* M_CMD OP codes for I2C */ +#define I2C_WRITE 0x1 +#define I2C_READ 0x2 +#define I2C_WRITE_READ 0x3 +#define I2C_ADDR_ONLY 0x4 +#define I2C_BUS_CLEAR 0x6 +#define I2C_STOP_ON_BUS 0x7 +/* M_CMD params for I2C */ +#define PRE_CMD_DELAY BIT(0) +#define TIMESTAMP_BEFORE BIT(1) +#define STOP_STRETCH BIT(2) +#define TIMESTAMP_AFTER BIT(3) +#define POST_COMMAND_DELAY BIT(4) +#define IGNORE_ADD_NACK BIT(6) +#define READ_FINISHED_WITH_ACK BIT(7) +#define BYPASS_ADDR_PHASE BIT(8) +#define SLV_ADDR_MSK GENMASK(15, 9) +#define SLV_ADDR_SHFT 9 +/* I2C SCL COUNTER fields */ +#define HIGH_COUNTER_MSK GENMASK(29, 20) +#define HIGH_COUNTER_SHFT 20 +#define LOW_COUNTER_MSK GENMASK(19, 10) +#define LOW_COUNTER_SHFT 10 +#define CYCLE_COUNTER_MSK GENMASK(9, 0) + +#define I2C_PACK_TX BIT(0) +#define I2C_PACK_RX BIT(1) + +#define PACKING_BYTES_PW 4 + +#define GENI_I2C_IS_MASTER_HUB BIT(0) + +#define I2C_TIMEOUT_MS 100 + +struct geni_i2c_clk_fld { + u32 clk_freq_out; + u8 clk_div; + u8 t_high_cnt; + u8 t_low_cnt; + u8 t_cycle_cnt; +}; + +struct geni_i2c_priv { + fdt_addr_t wrapper; + phys_addr_t base; + struct clk core; + struct clk se; + u32 tx_wm; + bool is_master_hub; + const struct geni_i2c_clk_fld *clk_fld; +}; + +/* + * Hardware uses the underlying formula to calculate time periods of + * SCL clock cycle. Firmware uses some additional cycles excluded from the + * below formula and it is confirmed that the time periods are within + * specification limits. + * + * time of high period of SCL: t_high = (t_high_cnt * clk_div) / source_clock + * time of low period of SCL: t_low = (t_low_cnt * clk_div) / source_clock + * time of full period of SCL: t_cycle = (t_cycle_cnt * clk_div) / source_clock + * clk_freq_out = t / t_cycle + * source_clock = 19.2 MHz + */ +static const struct geni_i2c_clk_fld geni_i2c_clk_map[] = { + {I2C_SPEED_STANDARD_RATE, 7, 10, 11, 26}, + {I2C_SPEED_FAST_RATE, 2, 5, 12, 24}, + {I2C_SPEED_FAST_PLUS_RATE, 1, 3, 9, 18}, +}; + +static int geni_i2c_clk_map_idx(struct geni_i2c_priv *geni, unsigned int clk_freq) +{ + const struct geni_i2c_clk_fld *itr = geni_i2c_clk_map; + int i; + + for (i = 0; i < ARRAY_SIZE(geni_i2c_clk_map); i++, itr++) { + if (itr->clk_freq_out == clk_freq) { + geni->clk_fld = itr; + return 0; + } + } + + return -EINVAL; +} + +static void geni_i2c_setup_m_cmd(struct geni_i2c_priv *geni, u32 cmd, u32 params) +{ + u32 m_cmd; + + m_cmd = (cmd << M_OPCODE_SHFT) | (params & M_PARAMS_MSK); + writel(m_cmd, geni->base + SE_GENI_M_CMD0); +} + +static void qcom_geni_i2c_conf(struct geni_i2c_priv *geni) +{ + const struct geni_i2c_clk_fld *itr = geni->clk_fld; + u32 val; + + writel(0, geni->base + SE_GENI_CLK_SEL); + + val = (itr->clk_div << CLK_DIV_SHFT) | SER_CLK_EN; + writel(val, geni->base + GENI_SER_M_CLK_CFG); + + val = itr->t_high_cnt << HIGH_COUNTER_SHFT; + val |= itr->t_low_cnt << LOW_COUNTER_SHFT; + val |= itr->t_cycle_cnt; + writel(val, geni->base + SE_I2C_SCL_COUNTERS); + + writel(0xffffffff, geni->base + SE_GENI_M_IRQ_CLEAR); +} + +static int geni_i2c_fifo_tx_fill(struct geni_i2c_priv *geni, struct i2c_msg *msg) +{ + ulong start = get_timer(0); + ulong cur_xfer = 0; + int i; + + while (get_timer(start) < I2C_TIMEOUT_MS) { + u32 status = readl(geni->base + SE_GENI_M_IRQ_STATUS); + + if (status & (M_CMD_ABORT_EN | + M_CMD_OVERRUN_EN | + M_ILLEGAL_CMD_EN | + M_CMD_FAILURE_EN | + M_GP_IRQ_1_EN | + M_GP_IRQ_3_EN | + M_GP_IRQ_4_EN)) { + writel(status, geni->base + SE_GENI_M_IRQ_CLEAR); + writel(0, geni->base + SE_GENI_TX_WATERMARK_REG); + return -EREMOTEIO; + } + + if ((status & M_TX_FIFO_WATERMARK_EN) == 0) { + udelay(1); + goto skip_fill; + } + + for (i = 0; i < geni->tx_wm; i++) { + u32 temp, tx = 0; + unsigned int p = 0; + + while (cur_xfer < msg->len && p < sizeof(tx)) { + temp = msg->buf[cur_xfer++]; + tx |= temp << (p * 8); + p++; + } + + writel(tx, geni->base + SE_GENI_TX_FIFOn); + + if (cur_xfer == msg->len) { + writel(0, geni->base + SE_GENI_TX_WATERMARK_REG); + break; + } + } + +skip_fill: + writel(status, geni->base + SE_GENI_M_IRQ_CLEAR); + + if (status & M_CMD_DONE_EN) + return 0; + } + + return -ETIMEDOUT; +} + +static int geni_i2c_fifo_rx_drain(struct geni_i2c_priv *geni, struct i2c_msg *msg) +{ + ulong start = get_timer(0); + ulong cur_xfer = 0; + int i; + + while (get_timer(start) < I2C_TIMEOUT_MS) { + u32 status = readl(geni->base + SE_GENI_M_IRQ_STATUS); + u32 rxstatus = readl(geni->base + SE_GENI_RX_FIFO_STATUS); + u32 rxcnt = rxstatus & RX_FIFO_WC_MSK; + + if (status & (M_CMD_ABORT_EN | + M_CMD_FAILURE_EN | + M_CMD_OVERRUN_EN | + M_ILLEGAL_CMD_EN | + M_GP_IRQ_1_EN | + M_GP_IRQ_3_EN | + M_GP_IRQ_4_EN)) { + writel(status, geni->base + SE_GENI_M_IRQ_CLEAR); + return -EREMOTEIO; + } + + if ((status & (M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN)) == 0) { + udelay(1); + goto skip_drain; + } + + for (i = 0; cur_xfer < msg->len && i < rxcnt; i++) { + u32 rx = readl(geni->base + SE_GENI_RX_FIFOn); + unsigned int p = 0; + + while (cur_xfer < msg->len && p < sizeof(rx)) { + msg->buf[cur_xfer++] = rx & 0xff; + rx >>= 8; + p++; + } + } + +skip_drain: + writel(status, geni->base + SE_GENI_M_IRQ_CLEAR); + + if (status & M_CMD_DONE_EN) + return 0; + } + + return -ETIMEDOUT; +} + +static int geni_i2c_xfer_tx(struct geni_i2c_priv *geni, struct i2c_msg *msg, u32 params) +{ + writel(msg->len, geni->base + SE_I2C_TX_TRANS_LEN); + geni_i2c_setup_m_cmd(geni, I2C_WRITE, params); + writel(1, geni->base + SE_GENI_TX_WATERMARK_REG); + + return geni_i2c_fifo_tx_fill(geni, msg); +} + +static int geni_i2c_xfer_rx(struct geni_i2c_priv *geni, struct i2c_msg *msg, u32 params) +{ + writel(msg->len, geni->base + SE_I2C_RX_TRANS_LEN); + geni_i2c_setup_m_cmd(geni, I2C_READ, params); + + return geni_i2c_fifo_rx_drain(geni, msg); +} + +static int geni_i2c_xfer(struct udevice *bus, struct i2c_msg msgs[], int num) +{ + struct geni_i2c_priv *geni = dev_get_priv(bus); + int i, ret = 0; + + qcom_geni_i2c_conf(geni); + + for (i = 0; i < num; i++) { + struct i2c_msg *msg = &msgs[i]; + u32 m_param = i < (num - 1) ? STOP_STRETCH : 0; + + m_param |= ((msg->addr << SLV_ADDR_SHFT) & SLV_ADDR_MSK); + + if (msg->flags & I2C_M_RD) + ret = geni_i2c_xfer_rx(geni, msg, m_param); + else + ret = geni_i2c_xfer_tx(geni, msg, m_param); + + if (ret) + break; + } + + if (ret) { + if (ret == -ETIMEDOUT) { + u32 status; + + writel(M_GENI_CMD_ABORT, geni->base + SE_GENI_M_CMD_CTRL_REG); + + /* Wait until Abort has finished */ + do { + status = readl(geni->base + SE_GENI_M_IRQ_STATUS); + } while ((status & M_CMD_ABORT_EN) == 0); + + writel(status, geni->base + SE_GENI_M_IRQ_STATUS); + } + + return ret; + } + + return 0; +} + +static int geni_i2c_enable_clocks(struct udevice *dev, struct geni_i2c_priv *geni) +{ + int ret; + + if (geni->is_master_hub) { + ret = clk_enable(&geni->core); + if (ret) { + dev_err(dev, "clk_enable core failed %d\n", ret); + return ret; + } + } + + ret = clk_enable(&geni->se); + if (ret) { + dev_err(dev, "clk_enable se failed %d\n", ret); + return ret; + } + + return 0; +} + +static int geni_i2c_disable_clocks(struct udevice *dev, struct geni_i2c_priv *geni) +{ + int ret; + + if (geni->is_master_hub) { + ret = clk_disable(&geni->core); + if (ret) { + dev_err(dev, "clk_enable core failed %d\n", ret); + return ret; + } + } + + ret = clk_disable(&geni->se); + if (ret) { + dev_err(dev, "clk_enable se failed %d\n", ret); + return ret; + } + + return 0; +} + +#define NUM_PACKING_VECTORS 4 +#define PACKING_START_SHIFT 5 +#define PACKING_DIR_SHIFT 4 +#define PACKING_LEN_SHIFT 1 +#define PACKING_STOP_BIT BIT(0) +#define PACKING_VECTOR_SHIFT 10 +static void geni_i2c_config_packing(struct geni_i2c_priv *geni, int bpw, + int pack_words, bool msb_to_lsb, + bool tx_cfg, bool rx_cfg) +{ + u32 cfg0, cfg1, cfg[NUM_PACKING_VECTORS] = {0}; + int len; + int temp_bpw = bpw; + int idx_start = msb_to_lsb ? bpw - 1 : 0; + int idx = idx_start; + int idx_delta = msb_to_lsb ? -BITS_PER_BYTE : BITS_PER_BYTE; + int ceil_bpw = ALIGN(bpw, BITS_PER_BYTE); + int iter = (ceil_bpw * pack_words) / BITS_PER_BYTE; + int i; + + if (iter <= 0 || iter > NUM_PACKING_VECTORS) + return; + + for (i = 0; i < iter; i++) { + len = min_t(int, temp_bpw, BITS_PER_BYTE) - 1; + cfg[i] = idx << PACKING_START_SHIFT; + cfg[i] |= msb_to_lsb << PACKING_DIR_SHIFT; + cfg[i] |= len << PACKING_LEN_SHIFT; + + if (temp_bpw <= BITS_PER_BYTE) { + idx = ((i + 1) * BITS_PER_BYTE) + idx_start; + temp_bpw = bpw; + } else { + idx = idx + idx_delta; + temp_bpw = temp_bpw - BITS_PER_BYTE; + } + } + cfg[iter - 1] |= PACKING_STOP_BIT; + cfg0 = cfg[0] | (cfg[1] << PACKING_VECTOR_SHIFT); + cfg1 = cfg[2] | (cfg[3] << PACKING_VECTOR_SHIFT); + + if (tx_cfg) { + writel(cfg0, geni->base + SE_GENI_TX_PACKING_CFG0); + writel(cfg1, geni->base + SE_GENI_TX_PACKING_CFG1); + } + if (rx_cfg) { + writel(cfg0, geni->base + SE_GENI_RX_PACKING_CFG0); + writel(cfg1, geni->base + SE_GENI_RX_PACKING_CFG1); + } + + /* + * Number of protocol words in each FIFO entry + * 0 - 4x8, four words in each entry, max word size of 8 bits + * 1 - 2x16, two words in each entry, max word size of 16 bits + * 2 - 1x32, one word in each entry, max word size of 32 bits + * 3 - undefined + */ + if (pack_words || bpw == 32) + writel(bpw / 16, geni->base + SE_GENI_BYTE_GRAN); +} + +static void geni_i2c_init(struct geni_i2c_priv *geni, unsigned int tx_depth) +{ + u32 val; + + writel(0, geni->base + SE_GSI_EVENT_EN); + writel(0xffffffff, geni->base + SE_GENI_M_IRQ_CLEAR); + writel(0xffffffff, geni->base + SE_GENI_S_IRQ_CLEAR); + writel(0xffffffff, geni->base + SE_IRQ_EN); + + val = readl(geni->base + GENI_CGC_CTRL); + val |= DEFAULT_CGC_EN; + writel(val, geni->base + GENI_CGC_CTRL); + + writel(DEFAULT_IO_OUTPUT_CTRL_MSK, geni->base + GENI_OUTPUT_CTRL); + writel(FORCE_DEFAULT, geni->base + GENI_FORCE_DEFAULT_REG); + + val = readl(geni->base + SE_IRQ_EN); + val |= GENI_M_IRQ_EN | GENI_S_IRQ_EN; + writel(val, geni->base + SE_IRQ_EN); + + val = readl(geni->base + SE_GENI_DMA_MODE_EN); + val &= ~GENI_DMA_MODE_EN; + writel(val, geni->base + SE_GENI_DMA_MODE_EN); + + writel(0, geni->base + SE_GSI_EVENT_EN); + + writel(tx_depth - 1, geni->base + SE_GENI_RX_WATERMARK_REG); + writel(tx_depth, geni->base + SE_GENI_RX_RFR_WATERMARK_REG); + + val = readl(geni->base + SE_GENI_M_IRQ_EN); + val |= M_COMMON_GENI_M_IRQ_EN; + val |= M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN; + val |= M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN; + writel(val, geni->base + SE_GENI_M_IRQ_EN); + + val = readl(geni->base + SE_GENI_S_IRQ_EN); + val |= S_COMMON_GENI_S_IRQ_EN; + writel(val, geni->base + SE_GENI_S_IRQ_EN); +} + +static u32 geni_i2c_get_tx_fifo_depth(struct geni_i2c_priv *geni) +{ + u32 val, hw_version, hw_major, hw_minor, tx_fifo_depth_mask; + + hw_version = readl(geni->wrapper + QUP_HW_VER_REG); + hw_major = GENI_SE_VERSION_MAJOR(hw_version); + hw_minor = GENI_SE_VERSION_MINOR(hw_version); + + if ((hw_major == 3 && hw_minor >= 10) || hw_major > 3) + tx_fifo_depth_mask = TX_FIFO_DEPTH_MSK_256_BYTES; + else + tx_fifo_depth_mask = TX_FIFO_DEPTH_MSK; + + val = readl(geni->base + SE_HW_PARAM_0); + + return (val & tx_fifo_depth_mask) >> TX_FIFO_DEPTH_SHFT; +} + +static int geni_i2c_probe(struct udevice *dev) +{ + ofnode parent_node = ofnode_get_parent(dev_ofnode(dev)); + struct geni_i2c_priv *geni = dev_get_priv(dev); + u32 proto, tx_depth, fifo_disable; + int ret; + + geni->is_master_hub = dev_get_driver_data(dev) & GENI_I2C_IS_MASTER_HUB; + + geni->wrapper = ofnode_get_addr(parent_node); + if (geni->wrapper == FDT_ADDR_T_NONE) + return -EINVAL; + + geni->base = (phys_addr_t)dev_read_addr_ptr(dev); + if (!geni->base) + return -EINVAL; + + if (geni->is_master_hub) { + ret = clk_get_by_name(dev, "core", &geni->core); + if (ret) { + dev_err(dev, "clk_get_by_name(core) failed: %d\n", ret); + return ret; + } + } + + ret = clk_get_by_name(dev, "se", &geni->se); + if (ret) { + dev_err(dev, "clk_get_by_name(se) failed: %d\n", ret); + return ret; + } + + geni_i2c_enable_clocks(dev, geni); + + proto = readl(geni->base + GENI_FW_REVISION_RO); + proto &= FW_REV_PROTOCOL_MSK; + proto >>= FW_REV_PROTOCOL_SHFT; + + if (proto != GENI_SE_I2C) { + dev_err(dev, "Invalid proto %d\n", proto); + geni_i2c_disable_clocks(dev, geni); + return -ENXIO; + } + + fifo_disable = readl(geni->base + GENI_IF_DISABLE_RO) & FIFO_IF_DISABLE; + if (fifo_disable) { + geni_i2c_disable_clocks(dev, geni); + dev_err(dev, "FIFO mode disabled, DMA mode unsupported\n"); + return -ENXIO; + } + + if (!geni->is_master_hub) { + tx_depth = geni_i2c_get_tx_fifo_depth(geni); + if (!tx_depth) { + geni_i2c_disable_clocks(dev, geni); + dev_err(dev, "Invalid TX FIFO depth\n"); + return -ENXIO; + } + } else { + tx_depth = 16; + } + geni->tx_wm = tx_depth - 1; + + geni_i2c_init(geni, tx_depth); + geni_i2c_config_packing(geni, BITS_PER_BYTE, + PACKING_BYTES_PW, true, true, true); + + /* Setup for standard rate */ + return geni_i2c_clk_map_idx(geni, I2C_SPEED_STANDARD_RATE); +} + +static int geni_i2c_set_bus_speed(struct udevice *dev, unsigned int clk_freq) +{ + struct geni_i2c_priv *geni = dev_get_priv(dev); + + return geni_i2c_clk_map_idx(geni, clk_freq); +} + +static const struct dm_i2c_ops geni_i2c_ops = { + .xfer = geni_i2c_xfer, + .set_bus_speed = geni_i2c_set_bus_speed, +}; + +static const struct udevice_id geni_i2c_ids[] = { + { .compatible = "qcom,geni-i2c" }, + { .compatible = "qcom,geni-i2c-master-hub", .data = GENI_I2C_IS_MASTER_HUB}, + {} +}; + +U_BOOT_DRIVER(i2c_geni) = { + .name = "i2c_geni", + .id = UCLASS_I2C, + .of_match = geni_i2c_ids, + .probe = geni_i2c_probe, + .priv_auto = sizeof(struct geni_i2c_priv), + .ops = &geni_i2c_ops, +}; + +static const struct udevice_id geni_i2c_master_hub_ids[] = { + { .compatible = "qcom,geni-se-i2c-master-hub" }, + { } +}; + +U_BOOT_DRIVER(geni_i2c_master_hub) = { + .name = "geni-se-master-hub", + .id = UCLASS_NOP, + .of_match = geni_i2c_master_hub_ids, + .bind = dm_scan_fdt_dev, + .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF, +}; diff --git a/drivers/input/button_kbd.c b/drivers/input/button_kbd.c index 74fadfca8bb..c73d3b18be9 100644 --- a/drivers/input/button_kbd.c +++ b/drivers/input/button_kbd.c @@ -34,7 +34,8 @@ static int button_kbd_start(struct udevice *dev) { struct button_kbd_priv *priv = dev_get_priv(dev); int i = 0; - struct udevice *button_gpio_devp; + struct udevice *button_gpio_devp, *next_devp; + struct uclass *uc; uclass_foreach_dev_probe(UCLASS_BUTTON, button_gpio_devp) { struct button_uc_plat *uc_plat = dev_get_uclass_plat(button_gpio_devp); @@ -46,6 +47,21 @@ static int button_kbd_start(struct udevice *dev) i++; } + if (uclass_get(UCLASS_BUTTON, &uc)) + return -ENOENT; + + /* + * Unbind any buttons that failed to probe so we don't iterate over + * them when polling. + */ + uclass_foreach_dev_safe(button_gpio_devp, next_devp, uc) { + if (!(dev_get_flags(button_gpio_devp) & DM_FLAG_ACTIVATED)) { + log_warning("Button %s failed to probe\n", + button_gpio_devp->name); + device_unbind(button_gpio_devp); + } + } + priv->button_size = i; priv->old_state = calloc(i, sizeof(int)); diff --git a/drivers/iommu/qcom-hyp-smmu.c b/drivers/iommu/qcom-hyp-smmu.c index f2b39de56f4..7b646d840dd 100644 --- a/drivers/iommu/qcom-hyp-smmu.c +++ b/drivers/iommu/qcom-hyp-smmu.c @@ -381,6 +381,7 @@ static struct iommu_ops qcom_smmu_ops = { static const struct udevice_id qcom_smmu500_ids[] = { { .compatible = "qcom,sdm845-smmu-500" }, + { .compatible = "qcom,smmu-500", }, { /* sentinel */ } }; diff --git a/drivers/led/led_lp5562.c b/drivers/led/led_lp5562.c index 431d7e10ab7..0c5f9bc4300 100644 --- a/drivers/led/led_lp5562.c +++ b/drivers/led/led_lp5562.c @@ -125,9 +125,9 @@ static int lp5562_led_reg_update(struct udevice *dev, int regnum, /* * Data sheet says "Delay between consecutive I2C writes to - * ENABLE register (00h) need to be longer than 488 μs + * ENABLE register (00h) need to be longer than 488 us * (typical)." and "Delay between consecutive I2C writes to - * OP_MODE register need to be longer than 153 μs (typ)." + * OP_MODE register need to be longer than 153 us (typ)." * * The linux driver does usleep_range(500, 600) and * usleep_range(200, 300), respectively. diff --git a/drivers/memory/stm32-fmc2-ebi.c b/drivers/memory/stm32-fmc2-ebi.c index a722a3836f7..1ce96077858 100644 --- a/drivers/memory/stm32-fmc2-ebi.c +++ b/drivers/memory/stm32-fmc2-ebi.c @@ -22,8 +22,15 @@ #define FMC2_BCR(x) ((x) * 0x8 + FMC2_BCR1) #define FMC2_BTR(x) ((x) * 0x8 + FMC2_BTR1) #define FMC2_PCSCNTR 0x20 +#define FMC2_CFGR 0x20 +#define FMC2_SR 0x84 #define FMC2_BWTR1 0x104 #define FMC2_BWTR(x) ((x) * 0x8 + FMC2_BWTR1) +#define FMC2_SECCFGR 0x300 +#define FMC2_CIDCFGR0 0x30c +#define FMC2_CIDCFGR(x) ((x) * 0x8 + FMC2_CIDCFGR0) +#define FMC2_SEMCR0 0x310 +#define FMC2_SEMCR(x) ((x) * 0x8 + FMC2_SEMCR0) /* Register: FMC2_BCR1 */ #define FMC2_BCR1_CCLKEN BIT(20) @@ -44,6 +51,7 @@ #define FMC2_BCR_ASYNCWAIT BIT(15) #define FMC2_BCR_CPSIZE GENMASK(18, 16) #define FMC2_BCR_CBURSTRW BIT(19) +#define FMC2_BCR_CSCOUNT GENMASK(21, 20) #define FMC2_BCR_NBLSET GENMASK(23, 22) /* Register: FMC2_BTRx/FMC2_BWTRx */ @@ -60,8 +68,28 @@ #define FMC2_PCSCNTR_CSCOUNT GENMASK(15, 0) #define FMC2_PCSCNTR_CNTBEN(x) BIT((x) + 16) +/* Register: FMC2_CFGR */ +#define FMC2_CFGR_CLKDIV GENMASK(19, 16) +#define FMC2_CFGR_CCLKEN BIT(20) +#define FMC2_CFGR_FMC2EN BIT(31) + +/* Register: FMC2_SR */ +#define FMC2_SR_ISOST GENMASK(1, 0) + +/* Register: FMC2_CIDCFGR */ +#define FMC2_CIDCFGR_CFEN BIT(0) +#define FMC2_CIDCFGR_SEMEN BIT(1) +#define FMC2_CIDCFGR_SCID GENMASK(6, 4) +#define FMC2_CIDCFGR_SEMWLC1 BIT(17) + +/* Register: FMC2_SEMCR */ +#define FMC2_SEMCR_SEM_MUTEX BIT(0) +#define FMC2_SEMCR_SEMCID GENMASK(6, 4) + #define FMC2_MAX_EBI_CE 4 #define FMC2_MAX_BANKS 5 +#define FMC2_MAX_RESOURCES 6 +#define FMC2_CID1 1 #define FMC2_BCR_CPSIZE_0 0x0 #define FMC2_BCR_CPSIZE_128 0x1 @@ -76,6 +104,11 @@ #define FMC2_BCR_MTYP_PSRAM 0x1 #define FMC2_BCR_MTYP_NOR 0x2 +#define FMC2_BCR_CSCOUNT_0 0x0 +#define FMC2_BCR_CSCOUNT_1 0x1 +#define FMC2_BCR_CSCOUNT_64 0x2 +#define FMC2_BCR_CSCOUNT_256 0x3 + #define FMC2_BXTR_EXTMOD_A 0x0 #define FMC2_BXTR_EXTMOD_B 0x1 #define FMC2_BXTR_EXTMOD_C 0x2 @@ -90,6 +123,7 @@ #define FMC2_BTR_CLKDIV_MAX 0xf #define FMC2_BTR_DATLAT_MAX 0xf #define FMC2_PCSCNTR_CSCOUNT_MAX 0xff +#define FMC2_CFGR_CLKDIV_MAX 0xf enum stm32_fmc2_ebi_bank { FMC2_EBI1 = 0, @@ -103,7 +137,8 @@ enum stm32_fmc2_ebi_register_type { FMC2_REG_BCR = 1, FMC2_REG_BTR, FMC2_REG_BWTR, - FMC2_REG_PCSCNTR + FMC2_REG_PCSCNTR, + FMC2_REG_CFGR }; enum stm32_fmc2_ebi_transaction_type { @@ -134,10 +169,30 @@ enum stm32_fmc2_ebi_cpsize { FMC2_CPSIZE_1024 = 1024 }; +enum stm32_fmc2_ebi_cscount { + FMC2_CSCOUNT_0 = 0, + FMC2_CSCOUNT_1 = 1, + FMC2_CSCOUNT_64 = 64, + FMC2_CSCOUNT_256 = 256 +}; + +struct stm32_fmc2_ebi; + +struct stm32_fmc2_ebi_data { + const struct stm32_fmc2_prop *child_props; + unsigned int nb_child_props; + u32 fmc2_enable_reg; + u32 fmc2_enable_bit; + int (*nwait_used_by_ctrls)(struct stm32_fmc2_ebi *ebi); + int (*check_rif)(struct stm32_fmc2_ebi *ebi, u32 resource); +}; + struct stm32_fmc2_ebi { struct clk clk; fdt_addr_t io_base; + const struct stm32_fmc2_ebi_data *data; u8 bank_assigned; + bool access_granted; }; /* @@ -209,6 +264,28 @@ static int stm32_fmc2_ebi_check_sync_trans(struct stm32_fmc2_ebi *ebi, return -EINVAL; } +static int stm32_fmc2_ebi_mp25_check_cclk(struct stm32_fmc2_ebi *ebi, + const struct stm32_fmc2_prop *prop, + int cs) +{ + if (!ebi->access_granted) + return -EACCES; + + return stm32_fmc2_ebi_check_sync_trans(ebi, prop, cs); +} + +static int stm32_fmc2_ebi_mp25_check_clk_period(struct stm32_fmc2_ebi *ebi, + const struct stm32_fmc2_prop *prop, + int cs) +{ + u32 cfgr = readl(ebi->io_base + FMC2_CFGR); + + if (cfgr & FMC2_CFGR_CCLKEN && !ebi->access_granted) + return -EACCES; + + return stm32_fmc2_ebi_check_sync_trans(ebi, prop, cs); +} + static int stm32_fmc2_ebi_check_async_trans(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs) @@ -296,6 +373,24 @@ static u32 stm32_fmc2_ebi_ns_to_clk_period(struct stm32_fmc2_ebi *ebi, return DIV_ROUND_UP(nb_clk_cycles, clk_period); } +static u32 stm32_fmc2_ebi_mp25_ns_to_clk_period(struct stm32_fmc2_ebi *ebi, + int cs, u32 setup) +{ + u32 nb_clk_cycles = stm32_fmc2_ebi_ns_to_clock_cycles(ebi, cs, setup); + u32 cfgr = readl(ebi->io_base + FMC2_CFGR); + u32 clk_period; + + if (cfgr & FMC2_CFGR_CCLKEN) { + clk_period = FIELD_GET(FMC2_CFGR_CLKDIV, cfgr) + 1; + } else { + u32 btr = readl(ebi->io_base + FMC2_BTR(cs)); + + clk_period = FIELD_GET(FMC2_BTR_CLKDIV, btr) + 1; + } + + return DIV_ROUND_UP(nb_clk_cycles, clk_period); +} + static int stm32_fmc2_ebi_get_reg(int reg_type, int cs, u32 *reg) { switch (reg_type) { @@ -311,6 +406,9 @@ static int stm32_fmc2_ebi_get_reg(int reg_type, int cs, u32 *reg) case FMC2_REG_PCSCNTR: *reg = FMC2_PCSCNTR; break; + case FMC2_REG_CFGR: + *reg = FMC2_CFGR; + break; default: return -EINVAL; } @@ -649,6 +747,26 @@ static int stm32_fmc2_ebi_set_clk_period(struct stm32_fmc2_ebi *ebi, return 0; } +static int stm32_fmc2_ebi_mp25_set_clk_period(struct stm32_fmc2_ebi *ebi, + const struct stm32_fmc2_prop *prop, + int cs, u32 setup) +{ + u32 cfgr = readl(ebi->io_base + FMC2_CFGR); + u32 val; + + if (cfgr & FMC2_CFGR_CCLKEN) { + val = setup ? clamp_val(setup - 1, 1, FMC2_CFGR_CLKDIV_MAX) : 1; + val = FIELD_PREP(FMC2_CFGR_CLKDIV, val); + clrsetbits_le32(ebi->io_base + FMC2_CFGR, FMC2_CFGR_CLKDIV, val); + } else { + val = setup ? clamp_val(setup - 1, 1, FMC2_BTR_CLKDIV_MAX) : 1; + val = FIELD_PREP(FMC2_BTR_CLKDIV, val); + clrsetbits_le32(ebi->io_base + FMC2_BTR(cs), FMC2_BTR_CLKDIV, val); + } + + return 0; +} + static int stm32_fmc2_ebi_set_data_latency(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs, u32 setup) @@ -689,6 +807,27 @@ static int stm32_fmc2_ebi_set_max_low_pulse(struct stm32_fmc2_ebi *ebi, return 0; } +static int stm32_fmc2_ebi_mp25_set_max_low_pulse(struct stm32_fmc2_ebi *ebi, + const struct stm32_fmc2_prop *prop, + int cs, u32 setup) +{ + u32 val; + + if (setup == FMC2_CSCOUNT_0) + val = FIELD_PREP(FMC2_BCR_CSCOUNT, FMC2_BCR_CSCOUNT_0); + else if (setup == FMC2_CSCOUNT_1) + val = FIELD_PREP(FMC2_BCR_CSCOUNT, FMC2_BCR_CSCOUNT_1); + else if (setup <= FMC2_CSCOUNT_64) + val = FIELD_PREP(FMC2_BCR_CSCOUNT, FMC2_BCR_CSCOUNT_64); + else + val = FIELD_PREP(FMC2_BCR_CSCOUNT, FMC2_BCR_CSCOUNT_256); + + clrsetbits_le32(ebi->io_base + FMC2_BCR(cs), + FMC2_BCR_CSCOUNT, val); + + return 0; +} + static const struct stm32_fmc2_prop stm32_fmc2_child_props[] = { /* st,fmc2-ebi-cs-trans-type must be the first property */ { @@ -854,6 +993,235 @@ static const struct stm32_fmc2_prop stm32_fmc2_child_props[] = { }, }; +static const struct stm32_fmc2_prop stm32_fmc2_mp25_child_props[] = { + /* st,fmc2-ebi-cs-trans-type must be the first property */ + { + .name = "st,fmc2-ebi-cs-transaction-type", + .mprop = true, + .set = stm32_fmc2_ebi_set_trans_type, + }, + { + .name = "st,fmc2-ebi-cs-cclk-enable", + .bprop = true, + .reg_type = FMC2_REG_CFGR, + .reg_mask = FMC2_CFGR_CCLKEN, + .check = stm32_fmc2_ebi_mp25_check_cclk, + .set = stm32_fmc2_ebi_set_bit_field, + }, + { + .name = "st,fmc2-ebi-cs-mux-enable", + .bprop = true, + .reg_type = FMC2_REG_BCR, + .reg_mask = FMC2_BCR_MUXEN, + .check = stm32_fmc2_ebi_check_mux, + .set = stm32_fmc2_ebi_set_bit_field, + }, + { + .name = "st,fmc2-ebi-cs-buswidth", + .reset_val = FMC2_BUSWIDTH_16, + .set = stm32_fmc2_ebi_set_buswidth, + }, + { + .name = "st,fmc2-ebi-cs-waitpol-high", + .bprop = true, + .reg_type = FMC2_REG_BCR, + .reg_mask = FMC2_BCR_WAITPOL, + .set = stm32_fmc2_ebi_set_bit_field, + }, + { + .name = "st,fmc2-ebi-cs-waitcfg-enable", + .bprop = true, + .reg_type = FMC2_REG_BCR, + .reg_mask = FMC2_BCR_WAITCFG, + .check = stm32_fmc2_ebi_check_waitcfg, + .set = stm32_fmc2_ebi_set_bit_field, + }, + { + .name = "st,fmc2-ebi-cs-wait-enable", + .bprop = true, + .reg_type = FMC2_REG_BCR, + .reg_mask = FMC2_BCR_WAITEN, + .check = stm32_fmc2_ebi_check_sync_trans, + .set = stm32_fmc2_ebi_set_bit_field, + }, + { + .name = "st,fmc2-ebi-cs-asyncwait-enable", + .bprop = true, + .reg_type = FMC2_REG_BCR, + .reg_mask = FMC2_BCR_ASYNCWAIT, + .check = stm32_fmc2_ebi_check_async_trans, + .set = stm32_fmc2_ebi_set_bit_field, + }, + { + .name = "st,fmc2-ebi-cs-cpsize", + .check = stm32_fmc2_ebi_check_cpsize, + .set = stm32_fmc2_ebi_set_cpsize, + }, + { + .name = "st,fmc2-ebi-cs-byte-lane-setup-ns", + .calculate = stm32_fmc2_ebi_ns_to_clock_cycles, + .set = stm32_fmc2_ebi_set_bl_setup, + }, + { + .name = "st,fmc2-ebi-cs-address-setup-ns", + .reg_type = FMC2_REG_BTR, + .reset_val = FMC2_BXTR_ADDSET_MAX, + .check = stm32_fmc2_ebi_check_async_trans, + .calculate = stm32_fmc2_ebi_ns_to_clock_cycles, + .set = stm32_fmc2_ebi_set_address_setup, + }, + { + .name = "st,fmc2-ebi-cs-address-hold-ns", + .reg_type = FMC2_REG_BTR, + .reset_val = FMC2_BXTR_ADDHLD_MAX, + .check = stm32_fmc2_ebi_check_address_hold, + .calculate = stm32_fmc2_ebi_ns_to_clock_cycles, + .set = stm32_fmc2_ebi_set_address_hold, + }, + { + .name = "st,fmc2-ebi-cs-data-setup-ns", + .reg_type = FMC2_REG_BTR, + .reset_val = FMC2_BXTR_DATAST_MAX, + .check = stm32_fmc2_ebi_check_async_trans, + .calculate = stm32_fmc2_ebi_ns_to_clock_cycles, + .set = stm32_fmc2_ebi_set_data_setup, + }, + { + .name = "st,fmc2-ebi-cs-bus-turnaround-ns", + .reg_type = FMC2_REG_BTR, + .reset_val = FMC2_BXTR_BUSTURN_MAX + 1, + .calculate = stm32_fmc2_ebi_ns_to_clock_cycles, + .set = stm32_fmc2_ebi_set_bus_turnaround, + }, + { + .name = "st,fmc2-ebi-cs-data-hold-ns", + .reg_type = FMC2_REG_BTR, + .check = stm32_fmc2_ebi_check_async_trans, + .calculate = stm32_fmc2_ebi_ns_to_clock_cycles, + .set = stm32_fmc2_ebi_set_data_hold, + }, + { + .name = "st,fmc2-ebi-cs-clk-period-ns", + .reset_val = FMC2_CFGR_CLKDIV_MAX + 1, + .check = stm32_fmc2_ebi_mp25_check_clk_period, + .calculate = stm32_fmc2_ebi_ns_to_clock_cycles, + .set = stm32_fmc2_ebi_mp25_set_clk_period, + }, + { + .name = "st,fmc2-ebi-cs-data-latency-ns", + .check = stm32_fmc2_ebi_check_sync_trans, + .calculate = stm32_fmc2_ebi_mp25_ns_to_clk_period, + .set = stm32_fmc2_ebi_set_data_latency, + }, + { + .name = "st,fmc2-ebi-cs-write-address-setup-ns", + .reg_type = FMC2_REG_BWTR, + .reset_val = FMC2_BXTR_ADDSET_MAX, + .check = stm32_fmc2_ebi_check_async_trans, + .calculate = stm32_fmc2_ebi_ns_to_clock_cycles, + .set = stm32_fmc2_ebi_set_address_setup, + }, + { + .name = "st,fmc2-ebi-cs-write-address-hold-ns", + .reg_type = FMC2_REG_BWTR, + .reset_val = FMC2_BXTR_ADDHLD_MAX, + .check = stm32_fmc2_ebi_check_address_hold, + .calculate = stm32_fmc2_ebi_ns_to_clock_cycles, + .set = stm32_fmc2_ebi_set_address_hold, + }, + { + .name = "st,fmc2-ebi-cs-write-data-setup-ns", + .reg_type = FMC2_REG_BWTR, + .reset_val = FMC2_BXTR_DATAST_MAX, + .check = stm32_fmc2_ebi_check_async_trans, + .calculate = stm32_fmc2_ebi_ns_to_clock_cycles, + .set = stm32_fmc2_ebi_set_data_setup, + }, + { + .name = "st,fmc2-ebi-cs-write-bus-turnaround-ns", + .reg_type = FMC2_REG_BWTR, + .reset_val = FMC2_BXTR_BUSTURN_MAX + 1, + .calculate = stm32_fmc2_ebi_ns_to_clock_cycles, + .set = stm32_fmc2_ebi_set_bus_turnaround, + }, + { + .name = "st,fmc2-ebi-cs-write-data-hold-ns", + .reg_type = FMC2_REG_BWTR, + .check = stm32_fmc2_ebi_check_async_trans, + .calculate = stm32_fmc2_ebi_ns_to_clock_cycles, + .set = stm32_fmc2_ebi_set_data_hold, + }, + { + .name = "st,fmc2-ebi-cs-max-low-pulse-ns", + .calculate = stm32_fmc2_ebi_ns_to_clock_cycles, + .set = stm32_fmc2_ebi_mp25_set_max_low_pulse, + }, +}; + +static int stm32_fmc2_ebi_mp25_check_rif(struct stm32_fmc2_ebi *ebi, u32 resource) +{ + u32 seccfgr, cidcfgr, semcr; + int cid; + + if (resource >= FMC2_MAX_RESOURCES) + return -EINVAL; + + seccfgr = readl(ebi->io_base + FMC2_SECCFGR); + if (seccfgr & BIT(resource)) { + if (resource) + log_err("resource %d is configured as secure\n", + resource); + + return -EACCES; + } + + cidcfgr = readl(ebi->io_base + FMC2_CIDCFGR(resource)); + if (!(cidcfgr & FMC2_CIDCFGR_CFEN)) + /* CID filtering is turned off: access granted */ + return 0; + + if (!(cidcfgr & FMC2_CIDCFGR_SEMEN)) { + /* Static CID mode */ + cid = FIELD_GET(FMC2_CIDCFGR_SCID, cidcfgr); + if (cid != FMC2_CID1) { + if (resource) + log_err("static CID%d set for resource %d\n", + cid, resource); + + return -EACCES; + } + + return 0; + } + + /* Pass-list with semaphore mode */ + if (!(cidcfgr & FMC2_CIDCFGR_SEMWLC1)) { + if (resource) + log_err("CID1 is block-listed for resource %d\n", + resource); + + return -EACCES; + } + + semcr = readl(ebi->io_base + FMC2_SEMCR(resource)); + if (!(semcr & FMC2_SEMCR_SEM_MUTEX)) { + setbits_le32(ebi->io_base + FMC2_SEMCR(resource), + FMC2_SEMCR_SEM_MUTEX); + semcr = readl(ebi->io_base + FMC2_SEMCR(resource)); + } + + cid = FIELD_GET(FMC2_SEMCR_SEMCID, semcr); + if (cid != FMC2_CID1) { + if (resource) + log_err("resource %d is already used by CID%d\n", + resource, cid); + + return -EACCES; + } + + return 0; +} + static int stm32_fmc2_ebi_parse_prop(struct stm32_fmc2_ebi *ebi, ofnode node, const struct stm32_fmc2_prop *prop, @@ -915,7 +1283,7 @@ static void stm32_fmc2_ebi_disable_bank(struct stm32_fmc2_ebi *ebi, int cs) } /* NWAIT signal can not be connected to EBI controller and NAND controller */ -static bool stm32_fmc2_ebi_nwait_used_by_ctrls(struct stm32_fmc2_ebi *ebi) +static int stm32_fmc2_ebi_nwait_used_by_ctrls(struct stm32_fmc2_ebi *ebi) { unsigned int cs; u32 bcr; @@ -926,16 +1294,22 @@ static bool stm32_fmc2_ebi_nwait_used_by_ctrls(struct stm32_fmc2_ebi *ebi) bcr = readl(ebi->io_base + FMC2_BCR(cs)); if ((bcr & FMC2_BCR_WAITEN || bcr & FMC2_BCR_ASYNCWAIT) && - ebi->bank_assigned & BIT(FMC2_NAND)) - return true; + ebi->bank_assigned & BIT(FMC2_NAND)) { + log_err("NWAIT signal connected to EBI and NAND controllers\n"); + return -EINVAL; + } } - return false; + return 0; } static void stm32_fmc2_ebi_enable(struct stm32_fmc2_ebi *ebi) { - setbits_le32(ebi->io_base + FMC2_BCR1, FMC2_BCR1_FMC2EN); + if (!ebi->access_granted) + return; + + setbits_le32(ebi->io_base + ebi->data->fmc2_enable_reg, + ebi->data->fmc2_enable_bit); } static int stm32_fmc2_ebi_setup_cs(struct stm32_fmc2_ebi *ebi, @@ -946,8 +1320,8 @@ static int stm32_fmc2_ebi_setup_cs(struct stm32_fmc2_ebi *ebi, stm32_fmc2_ebi_disable_bank(ebi, cs); - for (i = 0; i < ARRAY_SIZE(stm32_fmc2_child_props); i++) { - const struct stm32_fmc2_prop *p = &stm32_fmc2_child_props[i]; + for (i = 0; i < ebi->data->nb_child_props; i++) { + const struct stm32_fmc2_prop *p = &ebi->data->child_props[i]; ret = stm32_fmc2_ebi_parse_prop(ebi, node, p, cs); if (ret) { @@ -987,6 +1361,14 @@ static int stm32_fmc2_ebi_parse_dt(struct udevice *dev, return -EINVAL; } + if (ebi->data->check_rif) { + ret = ebi->data->check_rif(ebi, bank + 1); + if (ret) { + dev_err(dev, "bank access failed: %d\n", bank); + return ret; + } + } + if (bank < FMC2_MAX_EBI_CE) { ret = stm32_fmc2_ebi_setup_cs(ebi, child, bank); if (ret) { @@ -1004,9 +1386,10 @@ static int stm32_fmc2_ebi_parse_dt(struct udevice *dev, return -ENODEV; } - if (stm32_fmc2_ebi_nwait_used_by_ctrls(ebi)) { - dev_err(dev, "NWAIT signal connected to EBI and NAND controllers\n"); - return -EINVAL; + if (ebi->data->nwait_used_by_ctrls) { + ret = ebi->data->nwait_used_by_ctrls(ebi); + if (ret) + return ret; } stm32_fmc2_ebi_enable(ebi); @@ -1020,6 +1403,10 @@ static int stm32_fmc2_ebi_probe(struct udevice *dev) struct reset_ctl reset; int ret; + ebi->data = (void *)dev_get_driver_data(dev); + if (!ebi->data) + return -EINVAL; + ebi->io_base = dev_read_addr(dev); if (ebi->io_base == FDT_ADDR_T_NONE) return -EINVAL; @@ -1039,11 +1426,49 @@ static int stm32_fmc2_ebi_probe(struct udevice *dev) reset_deassert(&reset); } + /* Check if CFGR register can be modified */ + ebi->access_granted = true; + if (ebi->data->check_rif) { + ret = ebi->data->check_rif(ebi, 0); + if (ret) { + ebi->access_granted = false; + + /* In case of CFGR is secure, just check that the FMC2 is enabled */ + if (readl(ebi->io_base + FMC2_SR) & FMC2_SR_ISOST) { + dev_err(dev, "FMC2 is not ready to be used.\n"); + return -EACCES; + } + } + } + return stm32_fmc2_ebi_parse_dt(dev, ebi); } +static const struct stm32_fmc2_ebi_data stm32_fmc2_ebi_mp1_data = { + .child_props = stm32_fmc2_child_props, + .nb_child_props = ARRAY_SIZE(stm32_fmc2_child_props), + .fmc2_enable_reg = FMC2_BCR1, + .fmc2_enable_bit = FMC2_BCR1_FMC2EN, + .nwait_used_by_ctrls = stm32_fmc2_ebi_nwait_used_by_ctrls, +}; + +static const struct stm32_fmc2_ebi_data stm32_fmc2_ebi_mp25_data = { + .child_props = stm32_fmc2_mp25_child_props, + .nb_child_props = ARRAY_SIZE(stm32_fmc2_mp25_child_props), + .fmc2_enable_reg = FMC2_CFGR, + .fmc2_enable_bit = FMC2_CFGR_FMC2EN, + .check_rif = stm32_fmc2_ebi_mp25_check_rif, +}; + static const struct udevice_id stm32_fmc2_ebi_match[] = { - {.compatible = "st,stm32mp1-fmc2-ebi"}, + { + .compatible = "st,stm32mp1-fmc2-ebi", + .data = (ulong)&stm32_fmc2_ebi_mp1_data, + }, + { + .compatible = "st,stm32mp25-fmc2-ebi", + .data = (ulong)&stm32_fmc2_ebi_mp25_data, + }, { /* Sentinel */ } }; diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 6b06888454f..6009d55f400 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -104,7 +104,7 @@ config ROCKCHIP_OTP config ROCKCHIP_IODOMAIN bool "Rockchip IO-domain driver support" depends on DM_REGULATOR && ARCH_ROCKCHIP - default y if ROCKCHIP_RK3568 + default y if ROCKCHIP_RK3328 || ROCKCHIP_RK3568 help Enable support for IO-domains in Rockchip SoCs. It is necessary for the IO-domain setting of the SoC to match the voltage supplied diff --git a/drivers/misc/rockchip-io-domain.c b/drivers/misc/rockchip-io-domain.c index 0ffea32ef07..04d4d07c412 100644 --- a/drivers/misc/rockchip-io-domain.c +++ b/drivers/misc/rockchip-io-domain.c @@ -27,6 +27,10 @@ #define MAX_VOLTAGE_1_8 1980000 #define MAX_VOLTAGE_3_3 3600000 +#define RK3328_SOC_CON4 0x410 +#define RK3328_SOC_CON4_VCCIO2 BIT(7) +#define RK3328_SOC_VCCIO2_SUPPLY_NUM 1 + #define RK3399_PMUGRF_CON0 0x180 #define RK3399_PMUGRF_CON0_VSEL BIT(8) #define RK3399_PMUGRF_VSEL_SUPPLY_NUM 9 @@ -95,6 +99,22 @@ static int rockchip_iodomain_write(struct regmap *grf, uint offset, int idx, int return regmap_write(grf, offset, val); } +static int rk3328_iodomain_write(struct regmap *grf, uint offset, int idx, int uV) +{ + int ret = rockchip_iodomain_write(grf, offset, idx, uV); + + if (!ret && idx == RK3328_SOC_VCCIO2_SUPPLY_NUM) { + /* + * set vccio2 iodomain to also use this framework + * instead of a special gpio. + */ + u32 val = RK3328_SOC_CON4_VCCIO2 | (RK3328_SOC_CON4_VCCIO2 << 16); + ret = regmap_write(grf, RK3328_SOC_CON4, val); + } + + return ret; +} + static int rk3399_pmu_iodomain_write(struct regmap *grf, uint offset, int idx, int uV) { int ret = rockchip_iodomain_write(grf, offset, idx, uV); @@ -111,6 +131,20 @@ static int rk3399_pmu_iodomain_write(struct regmap *grf, uint offset, int idx, i return ret; } +static const struct rockchip_iodomain_soc_data soc_data_rk3328 = { + .grf_offset = 0x410, + .supply_names = { + "vccio1-supply", + "vccio2-supply", + "vccio3-supply", + "vccio4-supply", + "vccio5-supply", + "vccio6-supply", + "pmuio-supply", + }, + .write = rk3328_iodomain_write, +}; + static const struct rockchip_iodomain_soc_data soc_data_rk3399 = { .grf_offset = 0xe640, .supply_names = { @@ -157,6 +191,10 @@ static const struct rockchip_iodomain_soc_data soc_data_rk3568_pmu = { static const struct udevice_id rockchip_iodomain_ids[] = { { + .compatible = "rockchip,rk3328-io-voltage-domain", + .data = (ulong)&soc_data_rk3328, + }, + { .compatible = "rockchip,rk3399-io-voltage-domain", .data = (ulong)&soc_data_rk3399, }, diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 06e32e75696..549634891a3 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -504,6 +504,24 @@ config SPL_MMC_SDHCI_ADMA This enables support for the ADMA (Advanced DMA) defined in the SD Host Controller Standard Specification Version 3.00 in SPL. +config MMC_SDHCI_ADMA_FORCE_32BIT + bool "Force 32 bit mode for ADMA on 64 bit platforms" + help + This forces SDHCI ADMA to be built for 32 bit descriptors, even + on a 64 bit platform where they would otherwise be assumed to + be 64 bits. This is necessary for certain hardware platforms + that are 64-bit but include only 32-bit support within the selected + SD host controller IP. + +config MMC_SDHCI_ADMA_64BIT + bool "Use SHDCI ADMA with 64 bit descriptors" + depends on !MMC_SDHCI_ADMA_FORCE_32BIT + default y if DMA_ADDR_T_64BIT + help + This selects 64 bit descriptors for SDHCI ADMA. It is enabled by + default on 64 bit systems, but can be disabled if one of these + systems includes 32-bit ADMA. + config FIXED_SDHCI_ALIGNED_BUFFER hex "SDRAM address for fixed buffer" depends on SPL && MVEBU_SPL_BOOT_DEVICE_MMC diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c index 2666b65362b..cecc7ad783d 100644 --- a/drivers/mmc/arm_pl180_mmci.c +++ b/drivers/mmc/arm_pl180_mmci.c @@ -229,6 +229,7 @@ static int do_data_transfer(struct mmc *dev, u32 blksz = 0; u32 data_ctrl = 0; u32 data_len = (u32) (data->blocks * data->blocksize); + assert(data_len < U16_MAX); /* should be ensured by arm_pl180_get_b_max */ if (!host->version2) { blksz = (ffs(data->blocksize) - 1); @@ -356,6 +357,14 @@ static int host_set_ios(struct mmc *dev) return 0; } +static int arm_pl180_get_b_max(struct udevice *dev, void *dst, lbaint_t blkcnt) +{ + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct mmc *mmc = upriv->mmc; + + return U16_MAX / mmc->read_bl_len; +} + static void arm_pl180_mmc_init(struct pl180_mmc_host *host) { u32 sdi_u32; @@ -470,6 +479,7 @@ static const struct dm_mmc_ops arm_pl180_dm_mmc_ops = { .send_cmd = dm_host_request, .set_ios = dm_host_set_ios, .get_cd = dm_mmc_getcd, + .get_b_max = arm_pl180_get_b_max, }; static int arm_pl180_mmc_of_to_plat(struct udevice *dev) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index d44dfa5d06f..595d88bd562 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -252,7 +252,7 @@ static void esdhc_setup_dma(struct fsl_esdhc_priv *priv, struct mmc_data *data) priv->adma_desc_table) { debug("Using ADMA2\n"); /* prefer ADMA2 if it is available */ - sdhci_prepare_adma_table(priv->adma_desc_table, data, + sdhci_prepare_adma_table(NULL, priv->adma_desc_table, data, priv->dma_addr); adma_addr = virt_to_phys(priv->adma_desc_table); diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c index 1e03901e9dc..24170c59ecc 100644 --- a/drivers/mmc/mmc-uclass.c +++ b/drivers/mmc/mmc-uclass.c @@ -257,11 +257,14 @@ int mmc_of_parse(struct udevice *dev, struct mmc_config *cfg) if (dev_read_bool(dev, "mmc-hs200-1_2v")) cfg->host_caps |= MMC_CAP(MMC_HS_200); if (dev_read_bool(dev, "mmc-hs400-1_8v")) - cfg->host_caps |= MMC_CAP(MMC_HS_400); + cfg->host_caps |= MMC_CAP(MMC_HS_400) | MMC_CAP(MMC_HS_200); if (dev_read_bool(dev, "mmc-hs400-1_2v")) - cfg->host_caps |= MMC_CAP(MMC_HS_400); + cfg->host_caps |= MMC_CAP(MMC_HS_400) | MMC_CAP(MMC_HS_200); if (dev_read_bool(dev, "mmc-hs400-enhanced-strobe")) cfg->host_caps |= MMC_CAP(MMC_HS_400_ES); + if (dev_read_bool(dev, "no-mmc-hs400")) + cfg->host_caps &= ~(MMC_CAP(MMC_HS_400) | + MMC_CAP(MMC_HS_400_ES)); if (dev_read_bool(dev, "non-removable")) { cfg->host_caps |= MMC_CAP_NONREMOVABLE; diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c index 059cb3da77c..5e9d66526a8 100644 --- a/drivers/mmc/msm_sdhci.c +++ b/drivers/mmc/msm_sdhci.c @@ -33,9 +33,6 @@ #define SDCC_MCI_STATUS2_MCI_ACT 0x1 #define SDCC_MCI_HC_MODE 0x78 -/* Non standard (?) SDHCI register */ -#define SDHCI_VENDOR_SPEC_CAPABILITIES0 0x11c - struct msm_sdhc_plat { struct mmc_config cfg; struct mmc mmc; @@ -49,6 +46,8 @@ struct msm_sdhc { struct msm_sdhc_variant_info { bool mci_removed; + + u32 core_vendor_spec_capabilities0; }; DECLARE_GLOBAL_DATA_PTR; @@ -63,7 +62,7 @@ static int msm_sdc_clk_init(struct udevice *dev) ret = ofnode_read_u32(node, "clock-frequency", (uint *)(&clk_rate)); if (ret) - clk_rate = 400000; + clk_rate = 201500000; ret = clk_get_bulk(dev, &prv->clks); if (ret) { @@ -174,6 +173,8 @@ static int msm_sdc_probe(struct udevice *dev) core_minor = core_version & SDCC_VERSION_MINOR_MASK; + log_debug("SDCC version %d.%d\n", core_major, core_minor); + /* * Support for some capabilities is not advertised by newer * controller versions and must be explicitly enabled. @@ -181,7 +182,7 @@ static int msm_sdc_probe(struct udevice *dev) if (core_major >= 1 && core_minor != 0x11 && core_minor != 0x12) { caps = readl(host->ioaddr + SDHCI_CAPABILITIES); caps |= SDHCI_CAN_VDD_300 | SDHCI_CAN_DO_8BIT; - writel(caps, host->ioaddr + SDHCI_VENDOR_SPEC_CAPABILITIES0); + writel(caps, host->ioaddr + var_info->core_vendor_spec_capabilities0); } ret = mmc_of_parse(dev, &plat->cfg); @@ -207,7 +208,7 @@ static int msm_sdc_remove(struct udevice *dev) var_info = (void *)dev_get_driver_data(dev); /* Disable host-controller mode */ - if (!var_info->mci_removed) + if (!var_info->mci_removed && priv->base) writel(0, priv->base + SDCC_MCI_HC_MODE); clk_release_bulk(&priv->clks); @@ -217,21 +218,31 @@ static int msm_sdc_remove(struct udevice *dev) static int msm_of_to_plat(struct udevice *dev) { - struct udevice *parent = dev->parent; struct msm_sdhc *priv = dev_get_priv(dev); + const struct msm_sdhc_variant_info *var_info; struct sdhci_host *host = &priv->host; - int node = dev_of_offset(dev); + int ret; + + var_info = (void*)dev_get_driver_data(dev); host->name = strdup(dev->name); host->ioaddr = dev_read_addr_ptr(dev); - host->bus_width = fdtdec_get_int(gd->fdt_blob, node, "bus-width", 4); - host->index = fdtdec_get_uint(gd->fdt_blob, node, "index", 0); - priv->base = (void *)fdtdec_get_addr_size_auto_parent(gd->fdt_blob, - dev_of_offset(parent), node, "reg", 1, NULL, false); - if (priv->base == (void *)FDT_ADDR_T_NONE || - host->ioaddr == (void *)FDT_ADDR_T_NONE) + ret = dev_read_u32(dev, "bus-width", &host->bus_width); + if (ret) + host->bus_width = 4; + ret = dev_read_u32(dev, "index", &host->index); + if (ret) + host->index = 0; + priv->base = dev_read_addr_index_ptr(dev, 1); + + if (!host->ioaddr) return -EINVAL; + if (!var_info->mci_removed && !priv->base) { + printf("msm_sdhci: MCI base address not found\n"); + return -EINVAL; + } + return 0; } @@ -244,10 +255,14 @@ static int msm_sdc_bind(struct udevice *dev) static const struct msm_sdhc_variant_info msm_sdhc_mci_var = { .mci_removed = false, + + .core_vendor_spec_capabilities0 = 0x11c, }; static const struct msm_sdhc_variant_info msm_sdhc_v5_var = { .mci_removed = true, + + .core_vendor_spec_capabilities0 = 0x21c, }; static const struct udevice_id msm_mmc_ids[] = { diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c index 706fb123579..c889c7bc985 100644 --- a/drivers/mmc/rockchip_sdhci.c +++ b/drivers/mmc/rockchip_sdhci.c @@ -391,6 +391,8 @@ static int rk3568_sdhci_config_dll(struct sdhci_host *host, u32 clock, bool enab static int rk3568_sdhci_set_ios_post(struct sdhci_host *host) { struct mmc *mmc = host->mmc; + struct rockchip_sdhc_plat *plat = dev_get_plat(mmc->dev); + struct mmc_config *cfg = &plat->cfg; u32 reg; reg = sdhci_readw(host, SDHCI_HOST_CONTROL2); @@ -437,6 +439,20 @@ static int rk3568_sdhci_set_ios_post(struct sdhci_host *host) sdhci_writew(host, reg, DWCMSHC_EMMC_EMMC_CTRL); + /* + * Reading more than 4 blocks with a single CMD18 command in PIO mode + * triggers Data End Bit Error using a slower mode than HS200. Limit to + * reading max 4 blocks in one command when using PIO mode. + */ + if (!(host->flags & USE_DMA)) { + if (mmc->selected_mode == MMC_HS_200 || + mmc->selected_mode == MMC_HS_400 || + mmc->selected_mode == MMC_HS_400_ES) + cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; + else + cfg->b_max = 4; + } + return 0; } @@ -598,16 +614,6 @@ static int rockchip_sdhci_probe(struct udevice *dev) dev_read_bool(dev, "u-boot,spl-fifo-mode")) host->flags &= ~USE_DMA; - /* - * Reading more than 4 blocks with a single CMD18 command in PIO mode - * triggers Data End Bit Error on RK3568 and RK3588. Limit to reading - * max 4 blocks in one command when using PIO mode. - */ - if (!(host->flags & USE_DMA) && - (device_is_compatible(dev, "rockchip,rk3568-dwcmshc") || - device_is_compatible(dev, "rockchip,rk3588-dwcmshc"))) - cfg->b_max = 4; - return sdhci_probe(dev); } diff --git a/drivers/mmc/sdhci-adma.c b/drivers/mmc/sdhci-adma.c index 8213223d3f9..283ba956deb 100644 --- a/drivers/mmc/sdhci-adma.c +++ b/drivers/mmc/sdhci-adma.c @@ -9,9 +9,10 @@ #include <malloc.h> #include <asm/cache.h> -static void sdhci_adma_desc(struct sdhci_adma_desc *desc, - dma_addr_t addr, u16 len, bool end) +void sdhci_adma_write_desc(struct sdhci_host *host, void **next_desc, + dma_addr_t addr, int len, bool end) { + struct sdhci_adma_desc *desc = *next_desc; u8 attr; attr = ADMA_DESC_ATTR_VALID | ADMA_DESC_TRANSFER_DATA; @@ -19,17 +20,30 @@ static void sdhci_adma_desc(struct sdhci_adma_desc *desc, attr |= ADMA_DESC_ATTR_END; desc->attr = attr; - desc->len = len; + desc->len = len & 0xffff; desc->reserved = 0; desc->addr_lo = lower_32_bits(addr); -#ifdef CONFIG_DMA_ADDR_T_64BIT +#ifdef CONFIG_MMC_SDHCI_ADMA_64BIT desc->addr_hi = upper_32_bits(addr); #endif + + *next_desc += ADMA_DESC_LEN; +} + +static inline void __sdhci_adma_write_desc(struct sdhci_host *host, + void **desc, dma_addr_t addr, + int len, bool end) +{ + if (host && host->ops && host->ops->adma_write_desc) + host->ops->adma_write_desc(host, desc, addr, len, end); + else + sdhci_adma_write_desc(host, desc, addr, len, end); } /** * sdhci_prepare_adma_table() - Populate the ADMA table * + * @host: Pointer to the sdhci_host * @table: Pointer to the ADMA table * @data: Pointer to MMC data * @addr: DMA address to write to or read from @@ -39,25 +53,26 @@ static void sdhci_adma_desc(struct sdhci_adma_desc *desc, * Please note, that the table size depends on CONFIG_SYS_MMC_MAX_BLK_COUNT and * we don't have to check for overflow. */ -void sdhci_prepare_adma_table(struct sdhci_adma_desc *table, - struct mmc_data *data, dma_addr_t addr) +void sdhci_prepare_adma_table(struct sdhci_host *host, + struct sdhci_adma_desc *table, + struct mmc_data *data, dma_addr_t start_addr) { + dma_addr_t addr = start_addr; uint trans_bytes = data->blocksize * data->blocks; - uint desc_count = DIV_ROUND_UP(trans_bytes, ADMA_MAX_LEN); - struct sdhci_adma_desc *desc = table; - int i = desc_count; + void *next_desc = table; + int i = DIV_ROUND_UP(trans_bytes, ADMA_MAX_LEN); while (--i) { - sdhci_adma_desc(desc, addr, ADMA_MAX_LEN, false); + __sdhci_adma_write_desc(host, &next_desc, addr, + ADMA_MAX_LEN, false); addr += ADMA_MAX_LEN; trans_bytes -= ADMA_MAX_LEN; - desc++; } - sdhci_adma_desc(desc, addr, trans_bytes, true); + __sdhci_adma_write_desc(host, &next_desc, addr, trans_bytes, true); - flush_cache((dma_addr_t)table, - ROUND(desc_count * sizeof(struct sdhci_adma_desc), + flush_cache((phys_addr_t)table, + ROUND(next_desc - (void *)table, ARCH_DMA_MINALIGN)); } diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 0178ed8a11e..af654ea8d13 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -111,7 +111,7 @@ static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data, } #if CONFIG_IS_ENABLED(MMC_SDHCI_ADMA) else if (host->flags & (USE_ADMA | USE_ADMA64)) { - sdhci_prepare_adma_table(host->adma_desc_table, data, + sdhci_prepare_adma_table(host, host->adma_desc_table, data, host->start_addr); sdhci_writel(host, lower_32_bits(host->adma_addr), @@ -897,14 +897,15 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, __func__); return -EINVAL; } - host->adma_desc_table = sdhci_adma_init(); - host->adma_addr = (dma_addr_t)host->adma_desc_table; + if (!host->adma_desc_table) { + host->adma_desc_table = sdhci_adma_init(); + host->adma_addr = virt_to_phys(host->adma_desc_table); + } -#ifdef CONFIG_DMA_ADDR_T_64BIT - host->flags |= USE_ADMA64; -#else - host->flags |= USE_ADMA; -#endif + if (IS_ENABLED(CONFIG_MMC_SDHCI_ADMA_64BIT)) + host->flags |= USE_ADMA64; + else + host->flags |= USE_ADMA; #endif if (host->quirks & SDHCI_QUIRK_REG32_RW) host->version = @@ -929,6 +930,15 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, debug("%s, caps_1: 0x%x\n", __func__, caps_1); host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >> SDHCI_CLOCK_MUL_SHIFT; + + /* + * In case the value in Clock Multiplier is 0, then programmable + * clock mode is not supported, otherwise the actual clock + * multiplier is one more than the value of Clock Multiplier + * in the Capabilities Register. + */ + if (host->clk_mul) + host->clk_mul += 1; } if (host->max_clk == 0) { diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c index a2b111a8435..39ae79ba129 100644 --- a/drivers/mmc/stm32_sdmmc2.c +++ b/drivers/mmc/stm32_sdmmc2.c @@ -220,9 +220,9 @@ static void stm32_sdmmc2_start_data(struct udevice *dev, if (data->flags & MMC_DATA_READ) { data_ctrl |= SDMMC_DCTRL_DTDIR; - idmabase0 = (u32)data->dest; + idmabase0 = (u32)(long)data->dest; } else { - idmabase0 = (u32)data->src; + idmabase0 = (u32)(long)data->src; } /* Set the SDMMC DataLength value */ @@ -463,8 +463,8 @@ retry_cmd: stm32_sdmmc2_start_cmd(dev, cmd, cmdat, &ctx); - dev_dbg(dev, "send cmd %d data: 0x%x @ 0x%x\n", - cmd->cmdidx, data ? ctx.data_length : 0, (unsigned int)data); + dev_dbg(dev, "send cmd %d data: 0x%x @ 0x%p\n", + cmd->cmdidx, data ? ctx.data_length : 0, data); ret = stm32_sdmmc2_end_cmd(dev, cmd, &ctx); @@ -789,6 +789,7 @@ static int stm32_sdmmc2_bind(struct udevice *dev) static const struct udevice_id stm32_sdmmc2_ids[] = { { .compatible = "st,stm32-sdmmc2" }, + { .compatible = "st,stm32mp25-sdmmc2" }, { } }; diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c index 22ea5e2f907..be60d6d9d99 100644 --- a/drivers/mtd/nand/raw/nand_ids.c +++ b/drivers/mtd/nand/raw/nand_ids.c @@ -62,7 +62,7 @@ struct nand_flash_dev nand_flash_ids[] = { { .id = {0xad, 0xde, 0x94, 0xda, 0x74, 0xc4} }, SZ_8K, SZ_8K, SZ_2M, NAND_NEED_SCRAMBLING, 6, 640, NAND_ECC_INFO(40, SZ_1K), 4 }, - {"H27QCG8T2E5R‐BCF 64G 3.3V 8-bit", + {"H27QCG8T2E5R-BCF 64G 3.3V 8-bit", { .id = {0xad, 0xde, 0x14, 0xa7, 0x42, 0x4a} }, SZ_16K, SZ_8K, SZ_4M, NAND_NEED_SCRAMBLING, 6, 1664, NAND_ECC_INFO(56, SZ_1K), 1 }, diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c index 3528824575b..d284b8cbb12 100644 --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c @@ -34,7 +34,7 @@ #define FMC2_RB_DELAY_US 30 /* Max chip enable */ -#define FMC2_MAX_CE 2 +#define FMC2_MAX_CE 4 /* Timings */ #define FMC2_THIZ 1 @@ -160,6 +160,11 @@ static inline struct stm32_fmc2_nand *to_fmc2_nand(struct nand_chip *chip) return container_of(chip, struct stm32_fmc2_nand, chip); } +struct stm32_fmc2_nfc_data { + int max_ncs; + struct udevice *(*get_cdev)(struct udevice *dev); +}; + struct stm32_fmc2_nfc { struct nand_hw_control base; struct stm32_fmc2_nand nand; @@ -169,6 +174,7 @@ struct stm32_fmc2_nfc { fdt_addr_t cmd_base[FMC2_MAX_CE]; fdt_addr_t addr_base[FMC2_MAX_CE]; struct clk clk; + const struct stm32_fmc2_nfc_data *data; u8 cs_assigned; int cs_sel; @@ -815,7 +821,7 @@ static int stm32_fmc2_nfc_parse_child(struct stm32_fmc2_nfc *nfc, ofnode node) } for (i = 0; i < nand->ncs; i++) { - if (cs[i] >= FMC2_MAX_CE) { + if (cs[i] >= nfc->data->max_ncs) { log_err("Invalid reg value: %d\n", nand->cs_used[i]); return -EINVAL; } @@ -906,10 +912,18 @@ static int stm32_fmc2_nfc_probe(struct udevice *dev) spin_lock_init(&nfc->controller.lock); init_waitqueue_head(&nfc->controller.wq); - cdev = stm32_fmc2_nfc_get_cdev(dev); - if (!cdev) + nfc->data = (void *)dev_get_driver_data(dev); + if (!nfc->data) return -EINVAL; + if (nfc->data->get_cdev) { + cdev = nfc->data->get_cdev(dev); + if (!cdev) + return -EINVAL; + } else { + cdev = dev->parent; + } + ret = stm32_fmc2_nfc_parse_dt(dev, nfc); if (ret) return ret; @@ -921,7 +935,7 @@ static int stm32_fmc2_nfc_probe(struct udevice *dev) if (dev == cdev) start_region = 1; - for (chip_cs = 0, mem_region = start_region; chip_cs < FMC2_MAX_CE; + for (chip_cs = 0, mem_region = start_region; chip_cs < nfc->data->max_ncs; chip_cs++, mem_region += 3) { if (!(nfc->cs_assigned & BIT(chip_cs))) continue; @@ -1033,9 +1047,28 @@ static int stm32_fmc2_nfc_probe(struct udevice *dev) return nand_register(0, mtd); } +static const struct stm32_fmc2_nfc_data stm32_fmc2_nfc_mp1_data = { + .max_ncs = 2, + .get_cdev = stm32_fmc2_nfc_get_cdev, +}; + +static const struct stm32_fmc2_nfc_data stm32_fmc2_nfc_mp25_data = { + .max_ncs = 4, +}; + static const struct udevice_id stm32_fmc2_nfc_match[] = { - { .compatible = "st,stm32mp15-fmc2" }, - { .compatible = "st,stm32mp1-fmc2-nfc" }, + { + .compatible = "st,stm32mp15-fmc2", + .data = (ulong)&stm32_fmc2_nfc_mp1_data, + }, + { + .compatible = "st,stm32mp1-fmc2-nfc", + .data = (ulong)&stm32_fmc2_nfc_mp1_data, + }, + { + .compatible = "st,stm32mp25-fmc2-nfc", + .data = (ulong)&stm32_fmc2_nfc_mp25_data, + }, { /* Sentinel */ } }; diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index d068b7860e1..bedc4e970e4 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -246,7 +246,7 @@ config SPI_FLASH_USE_4K_SECTORS to erasing whole blocks (32/64 KiB). Changing a small part of the flash's contents is usually faster with small sectors. On the other hand erasing should be faster when using - 64 KiB block instead of 16 × 4 KiB sectors. + 64 KiB block instead of 16 x 4 KiB sectors. Please note that some tools/drivers/filesystems may not work with 4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum). diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 6677366ebd6..dc3404519d6 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -23,6 +23,7 @@ obj-$(CONFIG_DWC_ETH_QOS_IMX) += dwc_eth_qos_imx.o obj-$(CONFIG_DWC_ETH_QOS_ROCKCHIP) += dwc_eth_qos_rockchip.o obj-$(CONFIG_DWC_ETH_QOS_QCOM) += dwc_eth_qos_qcom.o obj-$(CONFIG_DWC_ETH_QOS_STARFIVE) += dwc_eth_qos_starfive.o +obj-$(CONFIG_DWC_ETH_QOS_STM32) += dwc_eth_qos_stm32.o obj-$(CONFIG_E1000) += e1000.o obj-$(CONFIG_E1000_SPI) += e1000_spi.o obj-$(CONFIG_EEPRO100) += eepro100.o diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index 67d80d987ff..32a5d52165a 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -295,58 +295,6 @@ err: #endif } -static int eqos_start_clks_stm32(struct udevice *dev) -{ -#ifdef CONFIG_CLK - struct eqos_priv *eqos = dev_get_priv(dev); - int ret; - - debug("%s(dev=%p):\n", __func__, dev); - - ret = clk_enable(&eqos->clk_master_bus); - if (ret < 0) { - pr_err("clk_enable(clk_master_bus) failed: %d\n", ret); - goto err; - } - - ret = clk_enable(&eqos->clk_rx); - if (ret < 0) { - pr_err("clk_enable(clk_rx) failed: %d\n", ret); - goto err_disable_clk_master_bus; - } - - ret = clk_enable(&eqos->clk_tx); - if (ret < 0) { - pr_err("clk_enable(clk_tx) failed: %d\n", ret); - goto err_disable_clk_rx; - } - - if (clk_valid(&eqos->clk_ck) && !eqos->clk_ck_enabled) { - ret = clk_enable(&eqos->clk_ck); - if (ret < 0) { - pr_err("clk_enable(clk_ck) failed: %d\n", ret); - goto err_disable_clk_tx; - } - eqos->clk_ck_enabled = true; - } -#endif - - debug("%s: OK\n", __func__); - return 0; - -#ifdef CONFIG_CLK -err_disable_clk_tx: - clk_disable(&eqos->clk_tx); -err_disable_clk_rx: - clk_disable(&eqos->clk_rx); -err_disable_clk_master_bus: - clk_disable(&eqos->clk_master_bus); -err: - debug("%s: FAILED: %d\n", __func__, ret); - return ret; -#endif -} - static int eqos_stop_clks_tegra186(struct udevice *dev) { #ifdef CONFIG_CLK @@ -365,22 +313,6 @@ static int eqos_stop_clks_tegra186(struct udevice *dev) return 0; } -static int eqos_stop_clks_stm32(struct udevice *dev) -{ -#ifdef CONFIG_CLK - struct eqos_priv *eqos = dev_get_priv(dev); - - debug("%s(dev=%p):\n", __func__, dev); - - clk_disable(&eqos->clk_tx); - clk_disable(&eqos->clk_rx); - clk_disable(&eqos->clk_master_bus); -#endif - - debug("%s: OK\n", __func__); - return 0; -} - static int eqos_start_resets_tegra186(struct udevice *dev) { struct eqos_priv *eqos = dev_get_priv(dev); @@ -493,17 +425,6 @@ static ulong eqos_get_tick_clk_rate_tegra186(struct udevice *dev) #endif } -static ulong eqos_get_tick_clk_rate_stm32(struct udevice *dev) -{ -#ifdef CONFIG_CLK - struct eqos_priv *eqos = dev_get_priv(dev); - - return clk_get_rate(&eqos->clk_master_bus); -#else - return 0; -#endif -} - static int eqos_set_full_duplex(struct udevice *dev) { struct eqos_priv *eqos = dev_get_priv(dev); @@ -1415,57 +1336,6 @@ err_free_reset_eqos: return ret; } -static int eqos_probe_resources_stm32(struct udevice *dev) -{ - struct eqos_priv *eqos = dev_get_priv(dev); - int ret; - phy_interface_t interface; - - debug("%s(dev=%p):\n", __func__, dev); - - interface = eqos->config->interface(dev); - - if (interface == PHY_INTERFACE_MODE_NA) { - pr_err("Invalid PHY interface\n"); - return -EINVAL; - } - - ret = board_interface_eth_init(dev, interface); - if (ret) - return -EINVAL; - - ret = clk_get_by_name(dev, "stmmaceth", &eqos->clk_master_bus); - if (ret) { - pr_err("clk_get_by_name(master_bus) failed: %d\n", ret); - goto err_probe; - } - - ret = clk_get_by_name(dev, "mac-clk-rx", &eqos->clk_rx); - if (ret) { - pr_err("clk_get_by_name(rx) failed: %d\n", ret); - goto err_probe; - } - - ret = clk_get_by_name(dev, "mac-clk-tx", &eqos->clk_tx); - if (ret) { - pr_err("clk_get_by_name(tx) failed: %d\n", ret); - goto err_probe; - } - - /* Get ETH_CLK clocks (optional) */ - ret = clk_get_by_name(dev, "eth-ck", &eqos->clk_ck); - if (ret) - pr_warn("No phy clock provided %d", ret); - - debug("%s: OK\n", __func__); - return 0; - -err_probe: - - debug("%s: returns %d\n", __func__, ret); - return ret; -} - static phy_interface_t eqos_get_interface_tegra186(const struct udevice *dev) { return PHY_INTERFACE_MODE_MII; @@ -1484,12 +1354,6 @@ static int eqos_remove_resources_tegra186(struct udevice *dev) return 0; } -static int eqos_remove_resources_stm32(struct udevice *dev) -{ - debug("%s(dev=%p):\n", __func__, dev); - return 0; -} - static int eqos_probe(struct udevice *dev) { struct eqos_priv *eqos = dev_get_priv(dev); @@ -1633,35 +1497,6 @@ static const struct eqos_config __maybe_unused eqos_tegra186_config = { .ops = &eqos_tegra186_ops }; -static struct eqos_ops eqos_stm32_ops = { - .eqos_inval_desc = eqos_inval_desc_generic, - .eqos_flush_desc = eqos_flush_desc_generic, - .eqos_inval_buffer = eqos_inval_buffer_generic, - .eqos_flush_buffer = eqos_flush_buffer_generic, - .eqos_probe_resources = eqos_probe_resources_stm32, - .eqos_remove_resources = eqos_remove_resources_stm32, - .eqos_stop_resets = eqos_null_ops, - .eqos_start_resets = eqos_null_ops, - .eqos_stop_clks = eqos_stop_clks_stm32, - .eqos_start_clks = eqos_start_clks_stm32, - .eqos_calibrate_pads = eqos_null_ops, - .eqos_disable_calibration = eqos_null_ops, - .eqos_set_tx_clk_speed = eqos_null_ops, - .eqos_get_enetaddr = eqos_null_ops, - .eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_stm32 -}; - -static const struct eqos_config __maybe_unused eqos_stm32_config = { - .reg_access_always_ok = false, - .mdio_wait = 10000, - .swr_wait = 50, - .config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV, - .config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300, - .axi_bus_width = EQOS_AXI_WIDTH_64, - .interface = dev_read_phy_mode, - .ops = &eqos_stm32_ops -}; - static const struct udevice_id eqos_ids[] = { #if IS_ENABLED(CONFIG_DWC_ETH_QOS_TEGRA186) { @@ -1671,8 +1506,12 @@ static const struct udevice_id eqos_ids[] = { #endif #if IS_ENABLED(CONFIG_DWC_ETH_QOS_STM32) { + .compatible = "st,stm32mp13-dwmac", + .data = (ulong)&eqos_stm32mp13_config + }, + { .compatible = "st,stm32mp1-dwmac", - .data = (ulong)&eqos_stm32_config + .data = (ulong)&eqos_stm32mp15_config }, #endif #if IS_ENABLED(CONFIG_DWC_ETH_QOS_IMX) diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h index e3222e1e17e..8b3d0d464d3 100644 --- a/drivers/net/dwc_eth_qos.h +++ b/drivers/net/dwc_eth_qos.h @@ -290,4 +290,6 @@ int eqos_null_ops(struct udevice *dev); extern struct eqos_config eqos_imx_config; extern struct eqos_config eqos_rockchip_config; extern struct eqos_config eqos_qcom_config; +extern struct eqos_config eqos_stm32mp13_config; +extern struct eqos_config eqos_stm32mp15_config; extern struct eqos_config eqos_jh7110_config; diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c new file mode 100644 index 00000000000..fbc08bba1d6 --- /dev/null +++ b/drivers/net/dwc_eth_qos_stm32.c @@ -0,0 +1,325 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2024, Marek Vasut <marex@denx.de> + * + * This is code moved from drivers/net/dwc_eth_qos.c , which is: + * Copyright (c) 2016, NVIDIA CORPORATION. + */ + +#include <asm/cache.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <clk.h> +#include <cpu_func.h> +#include <dm.h> +#include <dm/device_compat.h> +#include <errno.h> +#include <eth_phy.h> +#include <log.h> +#include <malloc.h> +#include <memalign.h> +#include <miiphy.h> +#include <net.h> +#include <netdev.h> +#include <phy.h> +#include <regmap.h> +#include <reset.h> +#include <syscon.h> +#include <wait_bit.h> +#include <linux/bitfield.h> +#include <linux/delay.h> + +#include "dwc_eth_qos.h" + +/* SYSCFG registers */ +#define SYSCFG_PMCSETR 0x04 +#define SYSCFG_PMCCLRR_MP13 0x08 +#define SYSCFG_PMCCLRR_MP15 0x44 + +#define SYSCFG_PMCSETR_ETH1_MASK GENMASK(23, 16) +#define SYSCFG_PMCSETR_ETH2_MASK GENMASK(31, 24) + +#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16) +#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17) + +/* STM32MP15xx specific bit */ +#define SYSCFG_PMCSETR_ETH_SELMII BIT(20) + +#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21) +#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0x0 +#define SYSCFG_PMCSETR_ETH_SEL_RGMII 0x1 +#define SYSCFG_PMCSETR_ETH_SEL_RMII 0x4 + +static ulong eqos_get_tick_clk_rate_stm32(struct udevice *dev) +{ + struct eqos_priv __maybe_unused *eqos = dev_get_priv(dev); + + if (!CONFIG_IS_ENABLED(CLK)) + return 0; + + return clk_get_rate(&eqos->clk_master_bus); +} + +static int eqos_start_clks_stm32(struct udevice *dev) +{ + struct eqos_priv __maybe_unused *eqos = dev_get_priv(dev); + int ret; + + if (!CONFIG_IS_ENABLED(CLK)) + return 0; + + dev_dbg(dev, "%s:\n", __func__); + + ret = clk_enable(&eqos->clk_master_bus); + if (ret < 0) { + dev_err(dev, "clk_enable(clk_master_bus) failed: %d\n", ret); + goto err; + } + + ret = clk_enable(&eqos->clk_rx); + if (ret < 0) { + dev_err(dev, "clk_enable(clk_rx) failed: %d\n", ret); + goto err_disable_clk_master_bus; + } + + ret = clk_enable(&eqos->clk_tx); + if (ret < 0) { + dev_err(dev, "clk_enable(clk_tx) failed: %d\n", ret); + goto err_disable_clk_rx; + } + + if (clk_valid(&eqos->clk_ck) && !eqos->clk_ck_enabled) { + ret = clk_enable(&eqos->clk_ck); + if (ret < 0) { + dev_err(dev, "clk_enable(clk_ck) failed: %d\n", ret); + goto err_disable_clk_tx; + } + eqos->clk_ck_enabled = true; + } + + dev_dbg(dev, "%s: OK\n", __func__); + return 0; + +err_disable_clk_tx: + clk_disable(&eqos->clk_tx); +err_disable_clk_rx: + clk_disable(&eqos->clk_rx); +err_disable_clk_master_bus: + clk_disable(&eqos->clk_master_bus); +err: + dev_dbg(dev, "%s: FAILED: %d\n", __func__, ret); + + return ret; +} + +static int eqos_stop_clks_stm32(struct udevice *dev) +{ + struct eqos_priv __maybe_unused *eqos = dev_get_priv(dev); + + if (!CONFIG_IS_ENABLED(CLK)) + return 0; + + dev_dbg(dev, "%s:\n", __func__); + + clk_disable(&eqos->clk_tx); + clk_disable(&eqos->clk_rx); + clk_disable(&eqos->clk_master_bus); + + dev_dbg(dev, "%s: OK\n", __func__); + + return 0; +} + +static int eqos_probe_syscfg_stm32(struct udevice *dev, + phy_interface_t interface_type) +{ + /* Ethernet 50MHz RMII clock selection. */ + const bool eth_ref_clk_sel = dev_read_bool(dev, "st,eth-ref-clk-sel"); + /* SoC is STM32MP13xx with two ethernet MACs */ + const bool is_mp13 = device_is_compatible(dev, "st,stm32mp13-dwmac"); + /* Gigabit Ethernet 125MHz clock selection. */ + const bool eth_clk_sel = dev_read_bool(dev, "st,eth-clk-sel"); + /* Ethernet clock source is RCC. */ + const bool ext_phyclk = dev_read_bool(dev, "st,ext-phyclk"); + struct regmap *regmap; + u32 regmap_mask; + u32 value; + + regmap = syscon_regmap_lookup_by_phandle(dev, "st,syscon"); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + regmap_mask = dev_read_u32_index_default(dev, "st,syscon", 2, + SYSCFG_PMCSETR_ETH1_MASK); + + switch (interface_type) { + case PHY_INTERFACE_MODE_MII: + dev_dbg(dev, "PHY_INTERFACE_MODE_MII\n"); + value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK, + SYSCFG_PMCSETR_ETH_SEL_GMII_MII); + /* + * STM32MP15xx supports both MII and GMII, STM32MP13xx MII only. + * SYSCFG_PMCSETR ETH_SELMII is present only on STM32MP15xx and + * acts as a selector between 0:GMII and 1:MII. As STM32MP13xx + * supports only MII, ETH_SELMII is not present. + */ + if (!is_mp13) /* Select MII mode on STM32MP15xx */ + value |= SYSCFG_PMCSETR_ETH_SELMII; + break; + case PHY_INTERFACE_MODE_GMII: /* STM32MP15xx only */ + dev_dbg(dev, "PHY_INTERFACE_MODE_GMII\n"); + value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK, + SYSCFG_PMCSETR_ETH_SEL_GMII_MII); + /* + * If eth_clk_sel is set, use internal ETH_CLKx clock from RCC, + * otherwise use external clock from IO pin (requires matching + * GPIO block AF setting of that pin). + */ + if (eth_clk_sel || ext_phyclk) + value |= SYSCFG_PMCSETR_ETH_CLK_SEL; + break; + case PHY_INTERFACE_MODE_RMII: + dev_dbg(dev, "PHY_INTERFACE_MODE_RMII\n"); + value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK, + SYSCFG_PMCSETR_ETH_SEL_RMII); + /* + * If eth_ref_clk_sel is set, use internal clock from RCC, + * otherwise use external clock from ETHn_RX_CLK/ETHn_REF_CLK + * IO pin (requires matching GPIO block AF setting of that + * pin). + */ + if (eth_ref_clk_sel || ext_phyclk) + value |= SYSCFG_PMCSETR_ETH_REF_CLK_SEL; + break; + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: + dev_dbg(dev, "PHY_INTERFACE_MODE_RGMII\n"); + value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK, + SYSCFG_PMCSETR_ETH_SEL_RGMII); + /* + * If eth_clk_sel is set, use internal ETH_CLKx clock from RCC, + * otherwise use external clock from ETHx_CLK125 pin (requires + * matching GPIO block AF setting of that pin). + */ + if (eth_clk_sel || ext_phyclk) + value |= SYSCFG_PMCSETR_ETH_CLK_SEL; + break; + default: + dev_dbg(dev, "Do not manage %d interface\n", + interface_type); + /* Do not manage others interfaces */ + return -EINVAL; + } + + /* Shift value at correct ethernet MAC offset in SYSCFG_PMCSETR */ + value <<= ffs(regmap_mask) - ffs(SYSCFG_PMCSETR_ETH1_MASK); + + /* Update PMCCLRR (clear register) */ + regmap_write(regmap, is_mp13 ? + SYSCFG_PMCCLRR_MP13 : SYSCFG_PMCCLRR_MP15, + regmap_mask); + + return regmap_update_bits(regmap, SYSCFG_PMCSETR, regmap_mask, value); +} + +static int eqos_probe_resources_stm32(struct udevice *dev) +{ + struct eqos_priv *eqos = dev_get_priv(dev); + phy_interface_t interface; + int ret; + + dev_dbg(dev, "%s:\n", __func__); + + interface = eqos->config->interface(dev); + + if (interface == PHY_INTERFACE_MODE_NA) { + dev_err(dev, "Invalid PHY interface\n"); + return -EINVAL; + } + + ret = eqos_probe_syscfg_stm32(dev, interface); + if (ret) + return -EINVAL; + + ret = clk_get_by_name(dev, "stmmaceth", &eqos->clk_master_bus); + if (ret) { + dev_err(dev, "clk_get_by_name(master_bus) failed: %d\n", ret); + goto err_probe; + } + + ret = clk_get_by_name(dev, "mac-clk-rx", &eqos->clk_rx); + if (ret) { + dev_err(dev, "clk_get_by_name(rx) failed: %d\n", ret); + goto err_probe; + } + + ret = clk_get_by_name(dev, "mac-clk-tx", &eqos->clk_tx); + if (ret) { + dev_err(dev, "clk_get_by_name(tx) failed: %d\n", ret); + goto err_probe; + } + + /* Get ETH_CLK clocks (optional) */ + ret = clk_get_by_name(dev, "eth-ck", &eqos->clk_ck); + if (ret) + dev_warn(dev, "No phy clock provided %d\n", ret); + + dev_dbg(dev, "%s: OK\n", __func__); + + return 0; + +err_probe: + + dev_dbg(dev, "%s: returns %d\n", __func__, ret); + + return ret; +} + +static int eqos_remove_resources_stm32(struct udevice *dev) +{ + dev_dbg(dev, "%s:\n", __func__); + + return 0; +} + +static struct eqos_ops eqos_stm32_ops = { + .eqos_inval_desc = eqos_inval_desc_generic, + .eqos_flush_desc = eqos_flush_desc_generic, + .eqos_inval_buffer = eqos_inval_buffer_generic, + .eqos_flush_buffer = eqos_flush_buffer_generic, + .eqos_probe_resources = eqos_probe_resources_stm32, + .eqos_remove_resources = eqos_remove_resources_stm32, + .eqos_stop_resets = eqos_null_ops, + .eqos_start_resets = eqos_null_ops, + .eqos_stop_clks = eqos_stop_clks_stm32, + .eqos_start_clks = eqos_start_clks_stm32, + .eqos_calibrate_pads = eqos_null_ops, + .eqos_disable_calibration = eqos_null_ops, + .eqos_set_tx_clk_speed = eqos_null_ops, + .eqos_get_enetaddr = eqos_null_ops, + .eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_stm32 +}; + +struct eqos_config __maybe_unused eqos_stm32mp13_config = { + .reg_access_always_ok = false, + .mdio_wait = 10000, + .swr_wait = 50, + .config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB, + .config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300, + .axi_bus_width = EQOS_AXI_WIDTH_32, + .interface = dev_read_phy_mode, + .ops = &eqos_stm32_ops +}; + +struct eqos_config __maybe_unused eqos_stm32mp15_config = { + .reg_access_always_ok = false, + .mdio_wait = 10000, + .swr_wait = 50, + .config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV, + .config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300, + .axi_bus_width = EQOS_AXI_WIDTH_64, + .interface = dev_read_phy_mode, + .ops = &eqos_stm32_ops +}; diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c index c1bae3f68bd..51f835adabc 100644 --- a/drivers/net/gmac_rockchip.c +++ b/drivers/net/gmac_rockchip.c @@ -19,7 +19,7 @@ #include <asm/arch-rockchip/grf_px30.h> #include <asm/arch-rockchip/grf_rk322x.h> #include <asm/arch-rockchip/grf_rk3288.h> -#include <asm/arch-rk3308/grf_rk3308.h> +#include <asm/arch-rockchip/grf_rk3308.h> #include <asm/arch-rockchip/grf_rk3328.h> #include <asm/arch-rockchip/grf_rk3368.h> #include <asm/arch-rockchip/grf_rk3399.h> @@ -739,7 +739,7 @@ static const struct udevice_id rockchip_gmac_ids[] = { .data = (ulong)&rk3228_gmac_ops }, { .compatible = "rockchip,rk3288-gmac", .data = (ulong)&rk3288_gmac_ops }, - { .compatible = "rockchip,rk3308-mac", + { .compatible = "rockchip,rk3308-gmac", .data = (ulong)&rk3308_gmac_ops }, { .compatible = "rockchip,rk3328-gmac", .data = (ulong)&rk3328_gmac_ops }, diff --git a/drivers/pci/pcie_dw_imx.c b/drivers/pci/pcie_dw_imx.c index a2ee228224b..fdb463710ba 100644 --- a/drivers/pci/pcie_dw_imx.c +++ b/drivers/pci/pcie_dw_imx.c @@ -56,6 +56,18 @@ struct pcie_dw_imx { struct udevice *vpcie; }; +struct pcie_chip_info { + const char *gpr; +}; + +static const struct pcie_chip_info imx8mm_chip_info = { + .gpr = "fsl,imx8mm-iomuxc-gpr", +}; + +static const struct pcie_chip_info imx8mp_chip_info = { + .gpr = "fsl,imx8mp-iomuxc-gpr", +}; + static void pcie_dw_configure(struct pcie_dw_imx *priv, u32 cap_speed) { dw_pcie_dbi_write_enable(&priv->dw, true); @@ -242,6 +254,7 @@ static int pcie_dw_imx_remove(struct udevice *dev) static int pcie_dw_imx_of_to_plat(struct udevice *dev) { + struct pcie_chip_info *info = (void *)dev_get_driver_data(dev); struct pcie_dw_imx *priv = dev_get_priv(dev); ofnode gpr; int ret; @@ -287,7 +300,7 @@ static int pcie_dw_imx_of_to_plat(struct udevice *dev) goto err_phy; } - gpr = ofnode_by_compatible(ofnode_null(), "fsl,imx8mp-iomuxc-gpr"); + gpr = ofnode_by_compatible(ofnode_null(), info->gpr); if (ofnode_equal(gpr, ofnode_null())) { dev_err(dev, "unable to find GPR node\n"); ret = -ENODEV; @@ -322,7 +335,8 @@ static const struct dm_pci_ops pcie_dw_imx_ops = { }; static const struct udevice_id pcie_dw_imx_ids[] = { - { .compatible = "fsl,imx8mp-pcie" }, + { .compatible = "fsl,imx8mm-pcie", .data = (ulong)&imx8mm_chip_info, }, + { .compatible = "fsl,imx8mp-pcie", .data = (ulong)&imx8mp_chip_info, }, { } }; diff --git a/drivers/phy/qcom/Kconfig b/drivers/phy/qcom/Kconfig index b9fe608c279..3aae1813352 100644 --- a/drivers/phy/qcom/Kconfig +++ b/drivers/phy/qcom/Kconfig @@ -27,6 +27,14 @@ config PHY_QCOM_USB_SNPS_FEMTO_V2 High-Speed PHY driver. This driver supports the Hi-Speed PHY which is usually paired with Synopsys DWC3 USB IPs on MSM SOCs. +config PHY_QCOM_SNPS_EUSB2 + tristate "Qualcomm Synopsys eUSB2 High-Speed PHY" + depends on PHY && ARCH_SNAPDRAGON + help + Enable this to support the Qualcomm Synopsys DesignWare eUSB2 + High-Speed PHY driver. This driver supports the Hi-Speed PHY which + is usually paired with Synopsys DWC3 USB IPs on MSM SOCs. + config PHY_QCOM_USB_HS_28NM tristate "Qualcomm 28nm High-Speed PHY" depends on PHY && ARCH_SNAPDRAGON diff --git a/drivers/phy/qcom/Makefile b/drivers/phy/qcom/Makefile index 5f4db4a5378..a5153061dfb 100644 --- a/drivers/phy/qcom/Makefile +++ b/drivers/phy/qcom/Makefile @@ -2,5 +2,6 @@ obj-$(CONFIG_PHY_QCOM_IPQ4019_USB) += phy-qcom-ipq4019-usb.o obj-$(CONFIG_MSM8916_USB_PHY) += msm8916-usbh-phy.o obj-$(CONFIG_PHY_QCOM_QUSB2) += phy-qcom-qusb2.o obj-$(CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2) += phy-qcom-snps-femto-v2.o +obj-$(CONFIG_PHY_QCOM_SNPS_EUSB2) += phy-qcom-snps-eusb2.o obj-$(CONFIG_PHY_QCOM_USB_HS_28NM) += phy-qcom-usb-hs-28nm.o obj-$(CONFIG_PHY_QCOM_USB_SS) += phy-qcom-usb-ss.o diff --git a/drivers/phy/qcom/phy-qcom-snps-eusb2.c b/drivers/phy/qcom/phy-qcom-snps-eusb2.c new file mode 100644 index 00000000000..b2655ac007c --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-snps-eusb2.c @@ -0,0 +1,366 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023-2024, Linaro Limited + * + * Based on the Linux phy-qcom-snps-eusb2.c driver + */ + +#include <clk.h> +#include <clk-uclass.h> +#include <dm.h> +#include <dm/device_compat.h> +#include <dm/devres.h> +#include <generic-phy.h> +#include <malloc.h> +#include <reset.h> + +#include <asm/io.h> +#include <linux/bitops.h> +#include <linux/bitfield.h> +#include <linux/clk-provider.h> +#include <linux/delay.h> + +#define USB_PHY_UTMI_CTRL0 (0x3c) +#define SLEEPM BIT(0) +#define OPMODE_MASK GENMASK(4, 3) +#define OPMODE_NONDRIVING BIT(3) + +#define USB_PHY_UTMI_CTRL5 (0x50) +#define POR BIT(1) + +#define USB_PHY_HS_PHY_CTRL_COMMON0 (0x54) +#define PHY_ENABLE BIT(0) +#define SIDDQ_SEL BIT(1) +#define SIDDQ BIT(2) +#define RETENABLEN BIT(3) +#define FSEL_MASK GENMASK(6, 4) +#define FSEL_19_2_MHZ_VAL (0x0) +#define FSEL_38_4_MHZ_VAL (0x4) + +#define USB_PHY_CFG_CTRL_1 (0x58) +#define PHY_CFG_PLL_CPBIAS_CNTRL_MASK GENMASK(7, 1) + +#define USB_PHY_CFG_CTRL_2 (0x5c) +#define PHY_CFG_PLL_FB_DIV_7_0_MASK GENMASK(7, 0) +#define DIV_7_0_19_2_MHZ_VAL (0x90) +#define DIV_7_0_38_4_MHZ_VAL (0xc8) + +#define USB_PHY_CFG_CTRL_3 (0x60) +#define PHY_CFG_PLL_FB_DIV_11_8_MASK GENMASK(3, 0) +#define DIV_11_8_19_2_MHZ_VAL (0x1) +#define DIV_11_8_38_4_MHZ_VAL (0x0) + +#define PHY_CFG_PLL_REF_DIV GENMASK(7, 4) +#define PLL_REF_DIV_VAL (0x0) + +#define USB_PHY_HS_PHY_CTRL2 (0x64) +#define VBUSVLDEXT0 BIT(0) +#define USB2_SUSPEND_N BIT(2) +#define USB2_SUSPEND_N_SEL BIT(3) +#define VBUS_DET_EXT_SEL BIT(4) + +#define USB_PHY_CFG_CTRL_4 (0x68) +#define PHY_CFG_PLL_GMP_CNTRL_MASK GENMASK(1, 0) +#define PHY_CFG_PLL_INT_CNTRL_MASK GENMASK(7, 2) + +#define USB_PHY_CFG_CTRL_5 (0x6c) +#define PHY_CFG_PLL_PROP_CNTRL_MASK GENMASK(4, 0) +#define PHY_CFG_PLL_VREF_TUNE_MASK GENMASK(7, 6) + +#define USB_PHY_CFG_CTRL_6 (0x70) +#define PHY_CFG_PLL_VCO_CNTRL_MASK GENMASK(2, 0) + +#define USB_PHY_CFG_CTRL_7 (0x74) + +#define USB_PHY_CFG_CTRL_8 (0x78) +#define PHY_CFG_TX_FSLS_VREF_TUNE_MASK GENMASK(1, 0) +#define PHY_CFG_TX_FSLS_VREG_BYPASS BIT(2) +#define PHY_CFG_TX_HS_VREF_TUNE_MASK GENMASK(5, 3) +#define PHY_CFG_TX_HS_XV_TUNE_MASK GENMASK(7, 6) + +#define USB_PHY_CFG_CTRL_9 (0x7c) +#define PHY_CFG_TX_PREEMP_TUNE_MASK GENMASK(2, 0) +#define PHY_CFG_TX_RES_TUNE_MASK GENMASK(4, 3) +#define PHY_CFG_TX_RISE_TUNE_MASK GENMASK(6, 5) +#define PHY_CFG_RCAL_BYPASS BIT(7) + +#define USB_PHY_CFG_CTRL_10 (0x80) + +#define USB_PHY_CFG0 (0x94) +#define DATAPATH_CTRL_OVERRIDE_EN BIT(0) +#define CMN_CTRL_OVERRIDE_EN BIT(1) + +#define UTMI_PHY_CMN_CTRL0 (0x98) +#define TESTBURNIN BIT(6) + +#define USB_PHY_FSEL_SEL (0xb8) +#define FSEL_SEL BIT(0) + +#define USB_PHY_APB_ACCESS_CMD (0x130) +#define RW_ACCESS BIT(0) +#define APB_START_CMD BIT(1) +#define APB_LOGIC_RESET BIT(2) + +#define USB_PHY_APB_ACCESS_STATUS (0x134) +#define ACCESS_DONE BIT(0) +#define TIMED_OUT BIT(1) +#define ACCESS_ERROR BIT(2) +#define ACCESS_IN_PROGRESS BIT(3) + +#define USB_PHY_APB_ADDRESS (0x138) +#define APB_REG_ADDR_MASK GENMASK(7, 0) + +#define USB_PHY_APB_WRDATA_LSB (0x13c) +#define APB_REG_WRDATA_7_0_MASK GENMASK(3, 0) + +#define USB_PHY_APB_WRDATA_MSB (0x140) +#define APB_REG_WRDATA_15_8_MASK GENMASK(7, 4) + +#define USB_PHY_APB_RDDATA_LSB (0x144) +#define APB_REG_RDDATA_7_0_MASK GENMASK(3, 0) + +#define USB_PHY_APB_RDDATA_MSB (0x148) +#define APB_REG_RDDATA_15_8_MASK GENMASK(7, 4) + +struct qcom_snps_eusb2_phy_priv { + void __iomem *base; + struct clk *ref_clk; + struct reset_ctl_bulk resets; +}; + +static void qcom_snps_eusb2_hsphy_write_mask(void __iomem *base, u32 offset, + u32 mask, u32 val) +{ + u32 reg; + + reg = readl_relaxed(base + offset); + reg &= ~mask; + reg |= val & mask; + writel_relaxed(reg, base + offset); + + /* Ensure above write is completed */ + readl_relaxed(base + offset); +} + +static void qcom_eusb2_default_parameters(struct qcom_snps_eusb2_phy_priv *qcom_snps_eusb2) +{ + /* default parameters: tx pre-emphasis */ + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_9, + PHY_CFG_TX_PREEMP_TUNE_MASK, + FIELD_PREP(PHY_CFG_TX_PREEMP_TUNE_MASK, 0)); + + /* tx rise/fall time */ + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_9, + PHY_CFG_TX_RISE_TUNE_MASK, + FIELD_PREP(PHY_CFG_TX_RISE_TUNE_MASK, 0x2)); + + /* source impedance adjustment */ + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_9, + PHY_CFG_TX_RES_TUNE_MASK, + FIELD_PREP(PHY_CFG_TX_RES_TUNE_MASK, 0x1)); + + /* dc voltage level adjustement */ + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_8, + PHY_CFG_TX_HS_VREF_TUNE_MASK, + FIELD_PREP(PHY_CFG_TX_HS_VREF_TUNE_MASK, 0x3)); + + /* transmitter HS crossover adjustement */ + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_8, + PHY_CFG_TX_HS_XV_TUNE_MASK, + FIELD_PREP(PHY_CFG_TX_HS_XV_TUNE_MASK, 0x0)); +} + +static int qcom_eusb2_ref_clk_init(struct qcom_snps_eusb2_phy_priv *qcom_snps_eusb2) +{ + unsigned long ref_clk_freq = clk_get_rate(qcom_snps_eusb2->ref_clk); + + switch (ref_clk_freq) { + case 19200000: + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_HS_PHY_CTRL_COMMON0, + FSEL_MASK, + FIELD_PREP(FSEL_MASK, FSEL_19_2_MHZ_VAL)); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_2, + PHY_CFG_PLL_FB_DIV_7_0_MASK, + DIV_7_0_19_2_MHZ_VAL); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_3, + PHY_CFG_PLL_FB_DIV_11_8_MASK, + DIV_11_8_19_2_MHZ_VAL); + break; + + case 38400000: + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_HS_PHY_CTRL_COMMON0, + FSEL_MASK, + FIELD_PREP(FSEL_MASK, FSEL_38_4_MHZ_VAL)); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_2, + PHY_CFG_PLL_FB_DIV_7_0_MASK, + DIV_7_0_38_4_MHZ_VAL); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_3, + PHY_CFG_PLL_FB_DIV_11_8_MASK, + DIV_11_8_38_4_MHZ_VAL); + break; + + default: + printf("%s: unsupported ref_clk_freq:%lu\n", __func__, ref_clk_freq); + return -EINVAL; + } + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_3, + PHY_CFG_PLL_REF_DIV, PLL_REF_DIV_VAL); + + return 0; +} + +static int qcom_snps_eusb2_usb_init(struct phy *phy) +{ + struct qcom_snps_eusb2_phy_priv *qcom_snps_eusb2 = dev_get_priv(phy->dev); + int ret; + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG0, + CMN_CTRL_OVERRIDE_EN, CMN_CTRL_OVERRIDE_EN); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_UTMI_CTRL5, POR, POR); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_HS_PHY_CTRL_COMMON0, + PHY_ENABLE | RETENABLEN, PHY_ENABLE | RETENABLEN); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_APB_ACCESS_CMD, + APB_LOGIC_RESET, APB_LOGIC_RESET); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, UTMI_PHY_CMN_CTRL0, TESTBURNIN, 0); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_FSEL_SEL, + FSEL_SEL, FSEL_SEL); + + /* update ref_clk related registers */ + ret = qcom_eusb2_ref_clk_init(qcom_snps_eusb2); + if (ret) + return ret; + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_1, + PHY_CFG_PLL_CPBIAS_CNTRL_MASK, + FIELD_PREP(PHY_CFG_PLL_CPBIAS_CNTRL_MASK, 0x1)); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_4, + PHY_CFG_PLL_INT_CNTRL_MASK, + FIELD_PREP(PHY_CFG_PLL_INT_CNTRL_MASK, 0x8)); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_4, + PHY_CFG_PLL_GMP_CNTRL_MASK, + FIELD_PREP(PHY_CFG_PLL_GMP_CNTRL_MASK, 0x1)); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_5, + PHY_CFG_PLL_PROP_CNTRL_MASK, + FIELD_PREP(PHY_CFG_PLL_PROP_CNTRL_MASK, 0x10)); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_6, + PHY_CFG_PLL_VCO_CNTRL_MASK, + FIELD_PREP(PHY_CFG_PLL_VCO_CNTRL_MASK, 0x0)); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_5, + PHY_CFG_PLL_VREF_TUNE_MASK, + FIELD_PREP(PHY_CFG_PLL_VREF_TUNE_MASK, 0x1)); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_HS_PHY_CTRL2, + VBUS_DET_EXT_SEL, VBUS_DET_EXT_SEL); + + /* set default parameters */ + qcom_eusb2_default_parameters(qcom_snps_eusb2); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_HS_PHY_CTRL2, + USB2_SUSPEND_N_SEL | USB2_SUSPEND_N, + USB2_SUSPEND_N_SEL | USB2_SUSPEND_N); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_UTMI_CTRL0, SLEEPM, SLEEPM); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_HS_PHY_CTRL_COMMON0, + SIDDQ_SEL, SIDDQ_SEL); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_HS_PHY_CTRL_COMMON0, + SIDDQ, 0); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_UTMI_CTRL5, POR, 0); + + qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_HS_PHY_CTRL2, + USB2_SUSPEND_N_SEL, 0); + + return 0; +} + +static int qcom_snps_eusb2_phy_power_on(struct phy *phy) +{ + struct qcom_snps_eusb2_phy_priv *qcom_snps_eusb2 = dev_get_priv(phy->dev); + int ret; + + /* TODO Repeater */ + + clk_prepare_enable(qcom_snps_eusb2->ref_clk); + + ret = reset_deassert_bulk(&qcom_snps_eusb2->resets); + if (ret) + return ret; + + ret = qcom_snps_eusb2_usb_init(phy); + if (ret) + return ret; + + return 0; +} + +static int qcom_snps_eusb2_phy_power_off(struct phy *phy) +{ + struct qcom_snps_eusb2_phy_priv *qcom_snps_eusb2 = dev_get_priv(phy->dev); + + reset_assert_bulk(&qcom_snps_eusb2->resets); + clk_disable_unprepare(qcom_snps_eusb2->ref_clk); + + return 0; +} + +static int qcom_snps_eusb2_phy_probe(struct udevice *dev) +{ + struct qcom_snps_eusb2_phy_priv *qcom_snps_eusb2 = dev_get_priv(dev); + int ret; + + qcom_snps_eusb2->base = (void __iomem *)dev_read_addr(dev); + if (IS_ERR(qcom_snps_eusb2->base)) + return PTR_ERR(qcom_snps_eusb2->base); + + qcom_snps_eusb2->ref_clk = devm_clk_get(dev, "ref"); + if (IS_ERR(qcom_snps_eusb2->ref_clk)) { + printf("%s: failed to get ref clk %d\n", __func__, ret); + return PTR_ERR(qcom_snps_eusb2->ref_clk); + } + + ret = reset_get_bulk(dev, &qcom_snps_eusb2->resets); + if (ret < 0) { + printf("failed to get resets, ret = %d\n", ret); + return ret; + } + + return 0; +} + +static struct phy_ops qcom_snps_eusb2_phy_ops = { + .power_on = qcom_snps_eusb2_phy_power_on, + .power_off = qcom_snps_eusb2_phy_power_off, +}; + +static const struct udevice_id qcom_snps_eusb2_phy_ids[] = { + { + .compatible = "qcom,sm8550-snps-eusb2-phy", + }, + {} +}; + +U_BOOT_DRIVER(qcom_usb_qcom_snps_eusb2) = { + .name = "qcom-snps-eusb2-hsphy", + .id = UCLASS_PHY, + .of_match = qcom_snps_eusb2_phy_ids, + .ops = &qcom_snps_eusb2_phy_ops, + .probe = qcom_snps_eusb2_phy_probe, + .priv_auto = sizeof(struct qcom_snps_eusb2_phy_priv), +}; diff --git a/drivers/phy/qcom/phy-qcom-snps-femto-v2.c b/drivers/phy/qcom/phy-qcom-snps-femto-v2.c index a1675b664e4..04f0f0e7817 100644 --- a/drivers/phy/qcom/phy-qcom-snps-femto-v2.c +++ b/drivers/phy/qcom/phy-qcom-snps-femto-v2.c @@ -6,8 +6,6 @@ * Based on Linux driver */ -#include <clk.h> -#include <clk-uclass.h> #include <dm.h> #include <dm/device_compat.h> #include <dm/devres.h> @@ -17,7 +15,6 @@ #include <asm/io.h> #include <linux/bitops.h> -#include <linux/clk-provider.h> #include <linux/delay.h> #include <linux/iopoll.h> @@ -62,7 +59,6 @@ struct qcom_snps_hsphy { void __iomem *base; - struct clk_bulk clks; struct reset_ctl_bulk resets; }; @@ -143,8 +139,6 @@ static int qcom_snps_hsphy_power_on(struct phy *phy) struct qcom_snps_hsphy *priv = dev_get_priv(phy->dev); int ret; - clk_enable_bulk(&priv->clks); - ret = reset_deassert_bulk(&priv->resets); if (ret) return ret; @@ -161,7 +155,6 @@ static int qcom_snps_hsphy_power_off(struct phy *phy) struct qcom_snps_hsphy *priv = dev_get_priv(phy->dev); reset_assert_bulk(&priv->resets); - clk_disable_bulk(&priv->clks); return 0; } @@ -175,19 +168,12 @@ static int qcom_snps_hsphy_phy_probe(struct udevice *dev) if (IS_ERR(priv->base)) return PTR_ERR(priv->base); - ret = clk_get_bulk(dev, &priv->clks); - if (ret < 0 && ret != -ENOENT) { - printf("%s: Failed to get clocks %d\n", __func__, ret); - return ret; - } - ret = reset_get_bulk(dev, &priv->resets); if (ret < 0) { printf("failed to get resets, ret = %d\n", ret); return ret; } - clk_enable_bulk(&priv->clks); reset_deassert_bulk(&priv->resets); return 0; diff --git a/drivers/phy/rockchip/Kconfig b/drivers/phy/rockchip/Kconfig index 0247d93ab40..80128335d52 100644 --- a/drivers/phy/rockchip/Kconfig +++ b/drivers/phy/rockchip/Kconfig @@ -12,6 +12,13 @@ config PHY_ROCKCHIP_INNO_DSIDPHY help Support for Rockchip MIPI DPHY with Innosilicon IP block. +config PHY_ROCKCHIP_INNO_HDMI + bool "Rockchip INNO HDMI PHY Driver" + depends on ARCH_ROCKCHIP + select PHY + help + Enable this to support the Rockchip Innosilicon HDMI PHY. + config PHY_ROCKCHIP_INNO_USB2 bool "Rockchip INNO USB2PHY Driver" depends on ARCH_ROCKCHIP diff --git a/drivers/phy/rockchip/Makefile b/drivers/phy/rockchip/Makefile index 7fdbd107976..04200174254 100644 --- a/drivers/phy/rockchip/Makefile +++ b/drivers/phy/rockchip/Makefile @@ -3,6 +3,7 @@ # Copyright (C) 2020 Amarula Solutions(India) # +obj-$(CONFIG_PHY_ROCKCHIP_INNO_HDMI) += phy-rockchip-inno-hdmi.o obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2) += phy-rockchip-inno-usb2.o obj-$(CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY) += phy-rockchip-naneng-combphy.o obj-$(CONFIG_PHY_ROCKCHIP_PCIE) += phy-rockchip-pcie.o diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c new file mode 100644 index 00000000000..3bb1a254ffb --- /dev/null +++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c @@ -0,0 +1,885 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Rockchip Innosilicon HDMI PHY + * + * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd. + * Copyright (c) 2017 Rockchip Electronics Co. Ltd. + */ + +#include <clk-uclass.h> +#include <dm.h> +#include <div64.h> +#include <dm/device_compat.h> +#include <dm/device-internal.h> +#include <dm/lists.h> +#include <generic-phy.h> +#include <asm/io.h> +#include <linux/delay.h> +#include <linux/iopoll.h> + +#define UPDATE(x, h, l) (((x) << (l)) & GENMASK((h), (l))) + +/* REG: 0x01 */ +#define RK3328_BYPASS_RXSENSE_EN BIT(2) +#define RK3328_BYPASS_POWERON_EN BIT(1) +#define RK3328_BYPASS_PLLPD_EN BIT(0) +/* REG: 0x02 */ +#define RK3328_INT_POL_HIGH BIT(7) +#define RK3328_BYPASS_PDATA_EN BIT(4) +#define RK3328_PDATA_EN BIT(0) +/* REG:0x05 */ +#define RK3328_INT_TMDS_CLK(x) UPDATE(x, 7, 4) +#define RK3328_INT_TMDS_D2(x) UPDATE(x, 3, 0) +/* REG:0x07 */ +#define RK3328_INT_TMDS_D1(x) UPDATE(x, 7, 4) +#define RK3328_INT_TMDS_D0(x) UPDATE(x, 3, 0) +/* for all RK3328_INT_TMDS_*, ESD_DET as defined in 0xc8-0xcb */ +#define RK3328_INT_AGND_LOW_PULSE_LOCKED BIT(3) +#define RK3328_INT_RXSENSE_LOW_PULSE_LOCKED BIT(2) +#define RK3328_INT_VSS_AGND_ESD_DET BIT(1) +#define RK3328_INT_AGND_VSS_ESD_DET BIT(0) +/* REG: 0xa0 */ +#define RK3328_PCLK_VCO_DIV_5_MASK BIT(1) +#define RK3328_PCLK_VCO_DIV_5(x) UPDATE(x, 1, 1) +#define RK3328_PRE_PLL_POWER_DOWN BIT(0) +/* REG: 0xa1 */ +#define RK3328_PRE_PLL_PRE_DIV_MASK GENMASK(5, 0) +#define RK3328_PRE_PLL_PRE_DIV(x) UPDATE(x, 5, 0) +/* REG: 0xa2 */ +/* unset means center spread */ +#define RK3328_SPREAD_SPECTRUM_MOD_DOWN BIT(7) +#define RK3328_SPREAD_SPECTRUM_MOD_DISABLE BIT(6) +#define RK3328_PRE_PLL_FRAC_DIV_DISABLE UPDATE(3, 5, 4) +#define RK3328_PRE_PLL_FB_DIV_11_8_MASK GENMASK(3, 0) +#define RK3328_PRE_PLL_FB_DIV_11_8(x) UPDATE((x) >> 8, 3, 0) +/* REG: 0xa3 */ +#define RK3328_PRE_PLL_FB_DIV_7_0(x) UPDATE(x, 7, 0) +/* REG: 0xa4*/ +#define RK3328_PRE_PLL_TMDSCLK_DIV_C_MASK GENMASK(1, 0) +#define RK3328_PRE_PLL_TMDSCLK_DIV_C(x) UPDATE(x, 1, 0) +#define RK3328_PRE_PLL_TMDSCLK_DIV_B_MASK GENMASK(3, 2) +#define RK3328_PRE_PLL_TMDSCLK_DIV_B(x) UPDATE(x, 3, 2) +#define RK3328_PRE_PLL_TMDSCLK_DIV_A_MASK GENMASK(5, 4) +#define RK3328_PRE_PLL_TMDSCLK_DIV_A(x) UPDATE(x, 5, 4) +/* REG: 0xa5 */ +#define RK3328_PRE_PLL_PCLK_DIV_B_SHIFT 5 +#define RK3328_PRE_PLL_PCLK_DIV_B_MASK GENMASK(6, 5) +#define RK3328_PRE_PLL_PCLK_DIV_B(x) UPDATE(x, 6, 5) +#define RK3328_PRE_PLL_PCLK_DIV_A_MASK GENMASK(4, 0) +#define RK3328_PRE_PLL_PCLK_DIV_A(x) UPDATE(x, 4, 0) +/* REG: 0xa6 */ +#define RK3328_PRE_PLL_PCLK_DIV_C_SHIFT 5 +#define RK3328_PRE_PLL_PCLK_DIV_C_MASK GENMASK(6, 5) +#define RK3328_PRE_PLL_PCLK_DIV_C(x) UPDATE(x, 6, 5) +#define RK3328_PRE_PLL_PCLK_DIV_D_MASK GENMASK(4, 0) +#define RK3328_PRE_PLL_PCLK_DIV_D(x) UPDATE(x, 4, 0) +/* REG: 0xa9 */ +#define RK3328_PRE_PLL_LOCK_STATUS BIT(0) +/* REG: 0xaa */ +#define RK3328_POST_PLL_POST_DIV_ENABLE GENMASK(3, 2) +#define RK3328_POST_PLL_REFCLK_SEL_TMDS BIT(1) +#define RK3328_POST_PLL_POWER_DOWN BIT(0) +/* REG:0xab */ +#define RK3328_POST_PLL_FB_DIV_8(x) UPDATE((x) >> 8, 7, 7) +#define RK3328_POST_PLL_PRE_DIV(x) UPDATE(x, 4, 0) +/* REG: 0xac */ +#define RK3328_POST_PLL_FB_DIV_7_0(x) UPDATE(x, 7, 0) +/* REG: 0xad */ +#define RK3328_POST_PLL_POST_DIV_MASK GENMASK(1, 0) +#define RK3328_POST_PLL_POST_DIV_2 0x0 +#define RK3328_POST_PLL_POST_DIV_4 0x1 +#define RK3328_POST_PLL_POST_DIV_8 0x3 +/* REG: 0xaf */ +#define RK3328_POST_PLL_LOCK_STATUS BIT(0) +/* REG: 0xb0 */ +#define RK3328_BANDGAP_ENABLE BIT(2) +/* REG: 0xb2 */ +#define RK3328_TMDS_CLK_DRIVER_EN BIT(3) +#define RK3328_TMDS_D2_DRIVER_EN BIT(2) +#define RK3328_TMDS_D1_DRIVER_EN BIT(1) +#define RK3328_TMDS_D0_DRIVER_EN BIT(0) +#define RK3328_TMDS_DRIVER_ENABLE (RK3328_TMDS_CLK_DRIVER_EN | \ + RK3328_TMDS_D2_DRIVER_EN | \ + RK3328_TMDS_D1_DRIVER_EN | \ + RK3328_TMDS_D0_DRIVER_EN) +/* REG:0xc5 */ +#define RK3328_BYPASS_TERM_RESISTOR_CALIB BIT(7) +#define RK3328_TERM_RESISTOR_CALIB_SPEED_14_8(x) UPDATE((x) >> 8, 6, 0) +/* REG:0xc6 */ +#define RK3328_TERM_RESISTOR_CALIB_SPEED_7_0(x) UPDATE(x, 7, 0) +/* REG:0xc7 */ +#define RK3328_TERM_RESISTOR_50 UPDATE(0, 2, 1) +#define RK3328_TERM_RESISTOR_62_5 UPDATE(1, 2, 1) +#define RK3328_TERM_RESISTOR_75 UPDATE(2, 2, 1) +#define RK3328_TERM_RESISTOR_100 UPDATE(3, 2, 1) +/* REG 0xc8 - 0xcb */ +#define RK3328_ESD_DETECT_MASK GENMASK(7, 6) +#define RK3328_ESD_DETECT_340MV (0x0 << 6) +#define RK3328_ESD_DETECT_280MV (0x1 << 6) +#define RK3328_ESD_DETECT_260MV (0x2 << 6) +#define RK3328_ESD_DETECT_240MV (0x3 << 6) +/* resistors can be used in parallel */ +#define RK3328_TMDS_TERM_RESIST_MASK GENMASK(5, 0) +#define RK3328_TMDS_TERM_RESIST_75 BIT(5) +#define RK3328_TMDS_TERM_RESIST_150 BIT(4) +#define RK3328_TMDS_TERM_RESIST_300 BIT(3) +#define RK3328_TMDS_TERM_RESIST_600 BIT(2) +#define RK3328_TMDS_TERM_RESIST_1000 BIT(1) +#define RK3328_TMDS_TERM_RESIST_2000 BIT(0) +/* REG: 0xd1 */ +#define RK3328_PRE_PLL_FRAC_DIV_23_16(x) UPDATE((x) >> 16, 7, 0) +/* REG: 0xd2 */ +#define RK3328_PRE_PLL_FRAC_DIV_15_8(x) UPDATE((x) >> 8, 7, 0) +/* REG: 0xd3 */ +#define RK3328_PRE_PLL_FRAC_DIV_7_0(x) UPDATE(x, 7, 0) + +struct phy_config { + unsigned long tmdsclock; + u8 regs[14]; +}; + +struct pre_pll_config { + unsigned long pixclock; + unsigned long tmdsclock; + u8 prediv; + u16 fbdiv; + u8 tmds_div_a; + u8 tmds_div_b; + u8 tmds_div_c; + u8 pclk_div_a; + u8 pclk_div_b; + u8 pclk_div_c; + u8 pclk_div_d; + u8 vco_div_5_en; + u32 fracdiv; +}; + +struct post_pll_config { + unsigned long tmdsclock; + u8 prediv; + u16 fbdiv; + u8 postdiv; + u8 version; +}; + +struct inno_hdmi_phy_plat_ops { + void (*init)(struct phy *phy); + int (*power_on)(struct phy *phy, const struct post_pll_config *cfg, + const struct phy_config *phy_cfg); + void (*power_off)(struct phy *phy); + void (*clk_enable)(struct phy *phy); + void (*clk_disable)(struct phy *phy); + unsigned long (*clk_recalc_rate)(struct phy *phy, + unsigned long parent_rate); + long (*clk_round_rate)(struct phy *phy, unsigned long rate); + int (*clk_set_rate)(struct phy *phy, unsigned long rate, + unsigned long parent_rate); +}; + +enum inno_hdmi_phy_type { + INNO_HDMI_PHY_RK3328, +}; + +struct inno_hdmi_phy_data { + enum inno_hdmi_phy_type phy_type; + const struct inno_hdmi_phy_plat_ops *plat_ops; + const struct phy_config *phy_cfg_table; +}; + +struct inno_hdmi_phy { + struct udevice *dev; + ofnode node; + void *regs; + + struct clk refoclk; + struct clk sysclk; + unsigned long tmdsclock; + unsigned long pixclock; + u32 bus_width; + struct phy_config *phy_cfg; + const struct inno_hdmi_phy_data *data; +}; + +static const struct pre_pll_config pre_pll_cfg_table[] = { + { 25175000, 25175000, 3, 125, 3, 1, 1, 1, 3, 3, 4, 0, 0xe00000}, + { 25175000, 31468750, 1, 41, 0, 3, 3, 1, 3, 3, 4, 0, 0xf5554f}, + { 27000000, 27000000, 1, 36, 0, 3, 3, 1, 2, 3, 4, 0, 0x0}, + { 27000000, 33750000, 1, 45, 0, 3, 3, 1, 3, 3, 4, 0, 0x0}, + { 31500000, 31500000, 1, 42, 0, 3, 3, 1, 2, 3, 4, 0, 0x0}, + { 31500000, 39375000, 1, 105, 1, 3, 3, 10, 0, 3, 4, 0, 0x0}, + { 33750000, 33750000, 1, 45, 0, 3, 3, 1, 2, 3, 4, 0, 0x0}, + { 33750000, 42187500, 1, 169, 2, 3, 3, 15, 0, 3, 4, 0, 0x0}, + { 35500000, 35500000, 1, 71, 2, 2, 2, 6, 0, 3, 4, 0, 0x0}, + { 35500000, 44375000, 1, 74, 3, 1, 1, 25, 0, 1, 1, 0, 0x0}, + { 36000000, 36000000, 1, 36, 2, 1, 1, 1, 1, 3, 4, 0, 0x0}, + { 36000000, 45000000, 1, 45, 2, 1, 1, 15, 0, 1, 1, 0, 0x0}, + { 40000000, 40000000, 1, 40, 2, 1, 1, 1, 1, 3, 4, 0, 0x0}, + { 40000000, 50000000, 1, 50, 2, 1, 1, 15, 0, 1, 1, 0, 0x0}, + { 49500000, 49500000, 1, 66, 0, 3, 3, 1, 2, 3, 4, 0, 0x0}, + { 49500000, 61875000, 1, 165, 1, 3, 3, 10, 0, 3, 4, 0, 0x0}, + { 50000000, 50000000, 1, 50, 2, 1, 1, 1, 1, 3, 4, 0, 0x0}, + { 50000000, 62500000, 1, 125, 2, 2, 2, 15, 0, 2, 2, 0, 0x0}, + { 54000000, 54000000, 1, 36, 0, 2, 2, 1, 0, 3, 4, 0, 0x0}, + { 54000000, 67500000, 1, 45, 0, 2, 2, 1, 3, 2, 2, 0, 0x0}, + { 56250000, 56250000, 1, 75, 0, 3, 3, 1, 2, 3, 4, 0, 0x0}, + { 56250000, 70312500, 1, 117, 3, 1, 1, 25, 0, 1, 1, 0, 0x0}, + { 59341000, 59341000, 1, 118, 2, 2, 2, 6, 0, 3, 4, 0, 0xae978d}, + { 59341000, 74176250, 2, 148, 2, 1, 1, 15, 0, 1, 1, 0, 0x5a3d70}, + { 59400000, 59400000, 1, 99, 3, 1, 1, 1, 3, 3, 4, 0, 0x0}, + { 59400000, 74250000, 1, 99, 0, 3, 3, 1, 3, 3, 4, 0, 0x0}, + { 65000000, 65000000, 1, 65, 2, 1, 1, 1, 1, 3, 4, 0, 0x0}, + { 65000000, 81250000, 3, 325, 0, 3, 3, 1, 3, 3, 4, 0, 0x0}, + { 68250000, 68250000, 1, 91, 0, 3, 3, 1, 2, 3, 4, 0, 0x0}, + { 68250000, 85312500, 1, 142, 3, 1, 1, 25, 0, 1, 1, 0, 0x0}, + { 71000000, 71000000, 1, 71, 2, 1, 1, 1, 1, 3, 4, 0, 0x0}, + { 71000000, 88750000, 3, 355, 0, 3, 3, 1, 3, 3, 4, 0, 0x0}, + { 72000000, 72000000, 1, 36, 2, 0, 0, 1, 1, 2, 2, 0, 0x0}, + { 72000000, 90000000, 1, 60, 0, 2, 2, 1, 3, 2, 2, 0, 0x0}, + { 73250000, 73250000, 3, 293, 0, 3, 3, 1, 2, 3, 4, 0, 0x0}, + { 73250000, 91562500, 1, 61, 0, 2, 2, 1, 3, 2, 2, 0, 0x0}, + { 74176000, 74176000, 1, 37, 2, 0, 0, 1, 1, 2, 2, 0, 0x16872b}, + { 74176000, 92720000, 2, 185, 2, 1, 1, 15, 0, 1, 1, 0, 0x70a3d7}, + { 74250000, 74250000, 1, 99, 0, 3, 3, 1, 2, 3, 4, 0, 0x0}, + { 74250000, 92812500, 4, 495, 0, 3, 3, 1, 3, 3, 4, 0, 0x0}, + { 75000000, 75000000, 1, 50, 0, 2, 2, 1, 0, 3, 4, 0, 0x0}, + { 75000000, 93750000, 1, 125, 0, 3, 3, 1, 3, 3, 4, 0, 0x0}, + { 78750000, 78750000, 1, 105, 0, 3, 3, 1, 2, 3, 4, 0, 0x0}, + { 78750000, 98437500, 1, 164, 3, 1, 1, 25, 0, 1, 1, 0, 0x0}, + { 79500000, 79500000, 1, 53, 0, 2, 2, 1, 0, 3, 4, 0, 0x0}, + { 79500000, 99375000, 1, 199, 2, 2, 2, 15, 0, 2, 2, 0, 0x0}, + { 83500000, 83500000, 2, 167, 2, 1, 1, 1, 1, 3, 4, 0, 0x0}, + { 83500000, 104375000, 1, 104, 2, 1, 1, 15, 0, 1, 1, 0, 0x600000}, + { 85500000, 85500000, 1, 57, 0, 2, 2, 1, 0, 3, 4, 0, 0x0}, + { 85500000, 106875000, 1, 178, 3, 1, 1, 25, 0, 1, 1, 0, 0x0}, + { 85750000, 85750000, 3, 343, 0, 3, 3, 1, 2, 3, 4, 0, 0x0}, + { 85750000, 107187500, 1, 143, 0, 3, 3, 1, 3, 3, 4, 0, 0x0}, + { 88750000, 88750000, 3, 355, 0, 3, 3, 1, 2, 3, 4, 0, 0x0}, + { 88750000, 110937500, 1, 110, 2, 1, 1, 15, 0, 1, 1, 0, 0xf00000}, + { 94500000, 94500000, 1, 63, 0, 2, 2, 1, 0, 3, 4, 0, 0x0}, + { 94500000, 118125000, 1, 197, 3, 1, 1, 25, 0, 1, 1, 0, 0x0}, + {101000000, 101000000, 1, 101, 2, 1, 1, 1, 1, 3, 4, 0, 0x0}, + {101000000, 126250000, 1, 42, 0, 1, 1, 1, 3, 1, 1, 0, 0x0}, + {102250000, 102250000, 4, 409, 2, 1, 1, 1, 1, 3, 4, 0, 0x0}, + {102250000, 127812500, 1, 128, 2, 1, 1, 15, 0, 1, 1, 0, 0x0}, + {106500000, 106500000, 1, 71, 0, 2, 2, 1, 0, 3, 4, 0, 0x0}, + {106500000, 133125000, 1, 133, 2, 1, 1, 15, 0, 1, 1, 0, 0x0}, + {108000000, 108000000, 1, 36, 0, 1, 1, 1, 0, 2, 2, 0, 0x0}, + {108000000, 135000000, 1, 45, 0, 1, 1, 1, 3, 1, 1, 0, 0x0}, + {115500000, 115500000, 1, 77, 0, 2, 2, 1, 0, 3, 4, 0, 0x0}, + {115500000, 144375000, 1, 48, 0, 1, 1, 1, 3, 1, 1, 0, 0x0}, + {117500000, 117500000, 2, 235, 2, 1, 1, 1, 1, 3, 4, 0, 0x0}, + {117500000, 146875000, 1, 49, 0, 1, 1, 1, 3, 1, 1, 0, 0x0}, + {119000000, 119000000, 1, 119, 2, 1, 1, 1, 1, 3, 4, 0, 0x0}, + {119000000, 148750000, 3, 148, 0, 1, 1, 1, 3, 1, 1, 0, 0xc00000}, + {121750000, 121750000, 4, 487, 2, 1, 1, 1, 1, 3, 4, 0, 0x0}, + {121750000, 152187500, 1, 203, 0, 3, 3, 1, 3, 3, 4, 0, 0x0}, + {122500000, 122500000, 2, 245, 2, 1, 1, 1, 1, 3, 4, 0, 0x0}, + {122500000, 153125000, 1, 51, 0, 1, 1, 1, 3, 1, 1, 0, 0x0}, + {135000000, 135000000, 1, 45, 0, 1, 1, 1, 0, 2, 2, 0, 0x0}, + {135000000, 168750000, 1, 169, 2, 1, 1, 15, 0, 1, 1, 0, 0x0}, + {136750000, 136750000, 1, 68, 2, 0, 0, 1, 1, 2, 2, 0, 0x600000}, + {136750000, 170937500, 1, 113, 0, 2, 2, 1, 3, 2, 2, 0, 0xf5554f}, + {140250000, 140250000, 2, 187, 0, 2, 2, 1, 0, 3, 4, 0, 0x0}, + {140250000, 175312500, 1, 117, 0, 2, 2, 1, 3, 2, 2, 0, 0x0}, + {146250000, 146250000, 2, 195, 0, 2, 2, 1, 0, 3, 4, 0, 0x0}, + {146250000, 182812500, 1, 61, 0, 1, 1, 1, 3, 1, 1, 0, 0x0}, + {148250000, 148250000, 3, 222, 2, 0, 0, 1, 1, 2, 2, 0, 0x600000}, + {148250000, 185312500, 1, 123, 0, 2, 2, 1, 3, 2, 2, 0, 0x8aaab0}, + {148352000, 148352000, 2, 148, 2, 0, 0, 1, 1, 2, 2, 0, 0x5a1cac}, + {148352000, 185440000, 3, 185, 0, 1, 1, 1, 3, 1, 1, 0, 0x70a3d7}, + {148500000, 148500000, 1, 99, 0, 2, 2, 1, 0, 3, 4, 0, 0x0}, + {148500000, 185625000, 4, 495, 0, 2, 2, 1, 3, 2, 2, 0, 0x0}, + {154000000, 154000000, 1, 77, 2, 0, 0, 1, 1, 2, 2, 0, 0x0}, + {154000000, 192500000, 1, 64, 0, 1, 1, 1, 3, 1, 1, 0, 0x0}, + {156000000, 156000000, 1, 52, 0, 1, 1, 1, 0, 2, 2, 0, 0x0}, + {156000000, 195000000, 1, 65, 0, 1, 1, 1, 3, 1, 1, 0, 0x0}, + {156750000, 156750000, 2, 209, 0, 2, 2, 1, 0, 3, 4, 0, 0x0}, + {156750000, 195937500, 1, 196, 2, 1, 1, 15, 0, 1, 1, 0, 0x0}, + {157000000, 157000000, 2, 157, 2, 0, 0, 1, 1, 2, 2, 0, 0x0}, + {157000000, 196250000, 1, 131, 0, 2, 2, 1, 3, 2, 2, 0, 0x0}, + {157500000, 157500000, 1, 105, 0, 2, 2, 1, 0, 3, 4, 0, 0x0}, + {157500000, 196875000, 1, 197, 2, 1, 1, 15, 0, 1, 1, 0, 0x0}, + {162000000, 162000000, 1, 54, 0, 1, 1, 1, 0, 2, 2, 0, 0x0}, + {162000000, 202500000, 2, 135, 0, 1, 1, 1, 3, 1, 1, 0, 0x0}, + {175500000, 175500000, 1, 117, 0, 2, 2, 1, 0, 3, 4, 0, 0x0}, + {175500000, 219375000, 1, 73, 0, 1, 1, 1, 3, 1, 1, 0, 0x0}, + {179500000, 179500000, 3, 359, 0, 2, 2, 1, 0, 3, 4, 0, 0x0}, + {179500000, 224375000, 1, 75, 0, 1, 1, 1, 3, 1, 1, 0, 0x0}, + {182750000, 182750000, 1, 91, 2, 0, 0, 1, 1, 2, 2, 0, 0x600000}, + {182750000, 228437500, 1, 152, 0, 2, 2, 1, 3, 2, 2, 0, 0x4aaab0}, + {182750000, 228437500, 1, 152, 0, 2, 2, 1, 3, 2, 2, 0, 0x4aaab0}, + {187000000, 187000000, 2, 187, 2, 0, 0, 1, 1, 2, 2, 0, 0x0}, + {187000000, 233750000, 1, 39, 0, 0, 0, 1, 3, 0, 0, 1, 0x0}, + {187250000, 187250000, 3, 280, 2, 0, 0, 1, 1, 2, 2, 0, 0xe00000}, + {187250000, 234062500, 1, 156, 0, 2, 2, 1, 3, 2, 2, 0, 0xaaab0}, + {189000000, 189000000, 1, 63, 0, 1, 1, 1, 0, 2, 2, 0, 0x0}, + {189000000, 236250000, 1, 79, 0, 1, 1, 1, 3, 1, 1, 0, 0x0}, + {193250000, 193250000, 3, 289, 2, 0, 0, 1, 1, 2, 2, 0, 0xe00000}, + {193250000, 241562500, 1, 161, 0, 2, 2, 1, 3, 2, 2, 0, 0xaaab0}, + {202500000, 202500000, 2, 135, 0, 1, 1, 1, 0, 2, 2, 0, 0x0}, + {202500000, 253125000, 1, 169, 0, 2, 2, 1, 3, 2, 2, 0, 0x0}, + {204750000, 204750000, 4, 273, 0, 1, 1, 1, 0, 2, 2, 0, 0x0}, + {204750000, 255937500, 1, 171, 0, 2, 2, 1, 3, 2, 2, 0, 0x0}, + {208000000, 208000000, 1, 104, 2, 0, 0, 1, 1, 2, 2, 0, 0x0}, + {208000000, 260000000, 1, 173, 0, 2, 2, 1, 3, 2, 2, 0, 0x0}, + {214750000, 214750000, 1, 107, 2, 0, 0, 1, 1, 2, 2, 0, 0x600000}, + {214750000, 268437500, 1, 178, 0, 2, 2, 1, 3, 2, 2, 0, 0xf5554f}, + {218250000, 218250000, 4, 291, 0, 1, 1, 1, 0, 2, 2, 0, 0x0}, + {218250000, 272812500, 1, 91, 0, 1, 1, 1, 3, 1, 1, 0, 0x0}, + {229500000, 229500000, 2, 153, 0, 1, 1, 1, 0, 2, 2, 0, 0x0}, + {229500000, 286875000, 1, 191, 0, 2, 2, 1, 3, 2, 2, 0, 0x0}, + {234000000, 234000000, 1, 39, 0, 0, 0, 1, 0, 1, 1, 0, 0x0}, + {234000000, 292500000, 1, 195, 0, 2, 2, 1, 3, 2, 2, 0, 0x0}, + {241500000, 241500000, 2, 161, 0, 1, 1, 1, 0, 2, 2, 0, 0x0}, + {241500000, 301875000, 1, 201, 0, 2, 2, 1, 3, 2, 2, 0, 0x0}, + {245250000, 245250000, 4, 327, 0, 1, 1, 1, 0, 2, 2, 0, 0x0}, + {245250000, 306562500, 1, 51, 0, 0, 0, 1, 3, 0, 0, 1, 0x0}, + {245500000, 245500000, 4, 491, 2, 0, 0, 1, 1, 2, 2, 0, 0x0}, + {245500000, 306875000, 1, 51, 0, 0, 0, 1, 3, 0, 0, 1, 0x0}, + {261000000, 261000000, 1, 87, 0, 1, 1, 1, 0, 2, 2, 0, 0x0}, + {261000000, 326250000, 1, 109, 0, 1, 1, 1, 3, 1, 1, 0, 0x0}, + {268250000, 268250000, 9, 402, 0, 0, 0, 1, 0, 1, 1, 0, 0x600000}, + {268250000, 335312500, 1, 111, 0, 1, 1, 1, 3, 1, 1, 0, 0xc5554f}, + {268500000, 268500000, 2, 179, 0, 1, 1, 1, 0, 2, 2, 0, 0x0}, + {268500000, 335625000, 1, 56, 0, 0, 0, 1, 3, 0, 0, 1, 0x0}, + {281250000, 281250000, 4, 375, 0, 1, 1, 1, 0, 2, 2, 0, 0x0}, + {281250000, 351562500, 1, 117, 0, 3, 1, 1, 3, 1, 1, 0, 0x0}, + {288000000, 288000000, 1, 48, 0, 0, 0, 1, 0, 1, 1, 0, 0x0}, + {288000000, 360000000, 1, 60, 0, 2, 0, 1, 3, 0, 0, 1, 0x0}, + {296703000, 296703000, 1, 49, 0, 0, 0, 1, 0, 1, 1, 0, 0x7353f7}, + {296703000, 370878750, 1, 123, 0, 3, 1, 1, 3, 1, 1, 0, 0xa051eb}, + {297000000, 297000000, 1, 99, 0, 1, 1, 1, 0, 2, 2, 0, 0x0}, + {297000000, 371250000, 4, 495, 0, 3, 1, 1, 3, 1, 1, 0, 0x0}, + {312250000, 312250000, 9, 468, 0, 0, 0, 1, 0, 1, 1, 0, 0x600000}, + {312250000, 390312500, 1, 130, 0, 3, 1, 1, 3, 1, 1, 0, 0x1aaab0}, + {317000000, 317000000, 3, 317, 0, 1, 1, 1, 0, 2, 2, 0, 0x0}, + {317000000, 396250000, 1, 66, 0, 2, 0, 1, 3, 0, 0, 1, 0x0}, + {319750000, 319750000, 3, 159, 0, 0, 0, 1, 0, 1, 1, 0, 0xe00000}, + {319750000, 399687500, 3, 199, 0, 2, 0, 1, 3, 0, 0, 1, 0xd80000}, + {333250000, 333250000, 9, 499, 0, 0, 0, 1, 0, 1, 1, 0, 0xe00000}, + {333250000, 416562500, 1, 138, 0, 3, 1, 1, 3, 1, 1, 0, 0xdaaab0}, + {348500000, 348500000, 9, 522, 0, 2, 0, 1, 0, 1, 1, 0, 0xc00000}, + {348500000, 435625000, 1, 145, 0, 3, 1, 1, 3, 1, 1, 0, 0x35554f}, + {356500000, 356500000, 9, 534, 0, 2, 0, 1, 0, 1, 1, 0, 0xc00000}, + {356500000, 445625000, 1, 148, 0, 3, 1, 1, 3, 1, 1, 0, 0x8aaab0}, + {380500000, 380500000, 9, 570, 0, 2, 0, 1, 0, 1, 1, 0, 0xc00000}, + {380500000, 475625000, 1, 158, 0, 3, 1, 1, 3, 1, 1, 0, 0x8aaab0}, + {443250000, 443250000, 1, 73, 0, 2, 0, 1, 0, 1, 1, 0, 0xe00000}, + {443250000, 554062500, 1, 92, 0, 2, 0, 1, 3, 0, 0, 1, 0x580000}, + {505250000, 505250000, 9, 757, 0, 2, 0, 1, 0, 1, 1, 0, 0xe00000}, + {552750000, 552750000, 3, 276, 0, 2, 0, 1, 0, 1, 1, 0, 0x600000}, + {593407000, 296703500, 3, 296, 0, 1, 1, 1, 0, 1, 1, 0, 0xb41893}, + {593407000, 370879375, 4, 494, 0, 3, 1, 1, 3, 0, 0, 1, 0x817e4a}, + {593407000, 593407000, 3, 296, 0, 2, 0, 1, 0, 1, 1, 0, 0xb41893}, + {594000000, 297000000, 1, 99, 0, 1, 1, 1, 0, 1, 1, 0, 0x0}, + {594000000, 371250000, 4, 495, 0, 3, 1, 1, 3, 0, 0, 1, 0x0}, + {594000000, 594000000, 1, 99, 0, 2, 0, 1, 0, 1, 1, 0, 0x0}, + { /* sentinel */ } +}; + +static const struct post_pll_config post_pll_cfg_table[] = { + {33750000, 1, 40, 8, 1}, + {33750000, 1, 80, 8, 2}, + {74250000, 1, 40, 8, 1}, + {74250000, 18, 80, 8, 2}, + {148500000, 2, 40, 4, 3}, + {297000000, 4, 40, 2, 3}, + {594000000, 8, 40, 1, 3}, + { /* sentinel */ } +}; + +/* phy tuning values for an undocumented set of registers */ +static const struct phy_config rk3328_phy_cfg[] = { + { 165000000, { + 0x07, 0x0a, 0x0a, 0x0a, 0x00, 0x00, 0x08, 0x08, 0x08, + 0x00, 0xac, 0xcc, 0xcc, 0xcc, + }, + }, { + 340000000, { + 0x0b, 0x0d, 0x0d, 0x0d, 0x07, 0x15, 0x08, 0x08, 0x08, + 0x3f, 0xac, 0xcc, 0xcd, 0xdd, + }, + }, { + 594000000, { + 0x10, 0x1a, 0x1a, 0x1a, 0x07, 0x15, 0x08, 0x08, 0x08, + 0x00, 0xac, 0xcc, 0xcc, 0xcc, + }, + }, { /* sentinel */ }, +}; + +static inline void inno_write(struct inno_hdmi_phy *inno, u32 reg, u8 val) +{ + writel(val, inno->regs + (reg * 4)); +} + +static inline u8 inno_read(struct inno_hdmi_phy *inno, u32 reg) +{ + u32 val; + + val = readl(inno->regs + (reg * 4)); + + return val; +} + +static inline void inno_update_bits(struct inno_hdmi_phy *inno, u8 reg, + u8 mask, u8 val) +{ + u32 tmp, orig; + + orig = inno_read(inno, reg); + tmp = orig & ~mask; + tmp |= val & mask; + inno_write(inno, reg, tmp); +} + +#define inno_poll(reg, val, cond, sleep_us, timeout_us) \ + readl_poll_sleep_timeout((reg) * 4, val, cond, sleep_us, timeout_us) + +static unsigned long inno_hdmi_phy_get_tmdsclk(struct inno_hdmi_phy *inno, + unsigned long rate) +{ + int bus_width = inno->bus_width; + + switch (bus_width) { + case 4: + case 5: + case 6: + case 10: + case 12: + case 16: + return (u64)rate * bus_width / 8; + default: + return rate; + } +} + +static +unsigned long inno_hdmi_phy_rk3328_clk_recalc_rate(struct phy *phy, + unsigned long parent_rate) +{ + struct inno_hdmi_phy *inno = dev_get_priv(phy->dev); + unsigned long frac; + u8 nd, no_a, no_b, no_d; + u64 vco; + u16 nf; + + nd = inno_read(inno, 0xa1) & RK3328_PRE_PLL_PRE_DIV_MASK; + nf = ((inno_read(inno, 0xa2) & RK3328_PRE_PLL_FB_DIV_11_8_MASK) << 8); + nf |= inno_read(inno, 0xa3); + vco = parent_rate * nf; + + if (!(inno_read(inno, 0xa2) & RK3328_PRE_PLL_FRAC_DIV_DISABLE)) { + frac = inno_read(inno, 0xd3) | + (inno_read(inno, 0xd2) << 8) | + (inno_read(inno, 0xd1) << 16); + vco += DIV_ROUND_CLOSEST(parent_rate * frac, (1 << 24)); + } + + if (inno_read(inno, 0xa0) & RK3328_PCLK_VCO_DIV_5_MASK) { + do_div(vco, nd * 5); + } else { + no_a = inno_read(inno, 0xa5) & RK3328_PRE_PLL_PCLK_DIV_A_MASK; + no_b = inno_read(inno, 0xa5) & RK3328_PRE_PLL_PCLK_DIV_B_MASK; + no_b >>= RK3328_PRE_PLL_PCLK_DIV_B_SHIFT; + no_b += 2; + no_d = inno_read(inno, 0xa6) & RK3328_PRE_PLL_PCLK_DIV_D_MASK; + + do_div(vco, (nd * (no_a == 1 ? no_b : no_a) * no_d * 2)); + } + + inno->pixclock = DIV_ROUND_CLOSEST((unsigned long)vco, 1000) * 1000; + + dev_info(phy->dev, "rate %lu vco %llu\n", inno->pixclock, vco); + + return inno->pixclock; +} + +static long inno_hdmi_phy_rk3328_clk_round_rate(struct phy *phy, + unsigned long rate) +{ + const struct pre_pll_config *cfg = pre_pll_cfg_table; + + rate = (rate / 1000) * 1000; + + for (; cfg->pixclock != 0; cfg++) + if (cfg->pixclock == rate) + break; + + if (cfg->pixclock == 0) + return -EINVAL; + + return cfg->pixclock; +} + +static const +struct pre_pll_config *inno_hdmi_phy_get_pre_pll_cfg(struct inno_hdmi_phy *inno, + unsigned long rate) +{ + const struct pre_pll_config *cfg = pre_pll_cfg_table; + unsigned long tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, rate); + + for (; cfg->pixclock != 0; cfg++) + if (cfg->pixclock == rate && cfg->tmdsclock == tmdsclock) + break; + + if (cfg->pixclock == 0) + return ERR_PTR(-EINVAL); + + return cfg; +} + +static int +inno_hdmi_phy_rk3328_clk_set_rate(struct phy *phy, + unsigned long rate, + unsigned long parent_rate) +{ + struct inno_hdmi_phy *inno = dev_get_priv(phy->dev); + unsigned long tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, rate); + const struct pre_pll_config *cfg; + u32 val; + int ret; + + dev_info(phy->dev, "rate %lu tmdsclk %lu\n", rate, tmdsclock); + + if (inno->pixclock == rate && inno->tmdsclock == tmdsclock) + return 0; + + cfg = inno_hdmi_phy_get_pre_pll_cfg(inno, rate); + if (IS_ERR(cfg)) + return PTR_ERR(cfg); + + inno_update_bits(inno, 0xa0, RK3328_PRE_PLL_POWER_DOWN, + RK3328_PRE_PLL_POWER_DOWN); + + /* Configure pre-pll */ + inno_update_bits(inno, 0xa0, RK3328_PCLK_VCO_DIV_5_MASK, + RK3328_PCLK_VCO_DIV_5(cfg->vco_div_5_en)); + inno_write(inno, 0xa1, RK3328_PRE_PLL_PRE_DIV(cfg->prediv)); + + val = RK3328_SPREAD_SPECTRUM_MOD_DISABLE; + if (!cfg->fracdiv) + val |= RK3328_PRE_PLL_FRAC_DIV_DISABLE; + inno_write(inno, 0xa2, RK3328_PRE_PLL_FB_DIV_11_8(cfg->fbdiv) | val); + inno_write(inno, 0xa3, RK3328_PRE_PLL_FB_DIV_7_0(cfg->fbdiv)); + inno_write(inno, 0xa5, RK3328_PRE_PLL_PCLK_DIV_A(cfg->pclk_div_a) | + RK3328_PRE_PLL_PCLK_DIV_B(cfg->pclk_div_b)); + inno_write(inno, 0xa6, RK3328_PRE_PLL_PCLK_DIV_C(cfg->pclk_div_c) | + RK3328_PRE_PLL_PCLK_DIV_D(cfg->pclk_div_d)); + inno_write(inno, 0xa4, RK3328_PRE_PLL_TMDSCLK_DIV_C(cfg->tmds_div_c) | + RK3328_PRE_PLL_TMDSCLK_DIV_A(cfg->tmds_div_a) | + RK3328_PRE_PLL_TMDSCLK_DIV_B(cfg->tmds_div_b)); + inno_write(inno, 0xd3, RK3328_PRE_PLL_FRAC_DIV_7_0(cfg->fracdiv)); + inno_write(inno, 0xd2, RK3328_PRE_PLL_FRAC_DIV_15_8(cfg->fracdiv)); + inno_write(inno, 0xd1, RK3328_PRE_PLL_FRAC_DIV_23_16(cfg->fracdiv)); + + inno_update_bits(inno, 0xa0, RK3328_PRE_PLL_POWER_DOWN, 0); + + /* Wait for Pre-PLL lock */ + ret = inno_poll(0xa9, val, val & RK3328_PRE_PLL_LOCK_STATUS, + 1000, 10000); + if (ret) { + dev_err(phy->dev, "Pre-PLL locking failed\n"); + return ret; + } + + inno->pixclock = rate; + inno->tmdsclock = tmdsclock; + + return 0; +} + +static void inno_hdmi_phy_rk3328_clk_enable(struct phy *phy) +{ + struct inno_hdmi_phy *inno = dev_get_priv(phy->dev); + + inno_update_bits(inno, 0xa0, RK3328_PRE_PLL_POWER_DOWN, 0); +} + +static void inno_hdmi_phy_rk3328_clk_disable(struct phy *phy) +{ + struct inno_hdmi_phy *inno = dev_get_priv(phy->dev); + + inno_update_bits(inno, 0xa0, RK3328_PRE_PLL_POWER_DOWN, + RK3328_PRE_PLL_POWER_DOWN); +} + +static int +inno_hdmi_phy_rk3328_power_on(struct phy *phy, + const struct post_pll_config *cfg, + const struct phy_config *phy_cfg) +{ + struct inno_hdmi_phy *inno = dev_get_priv(phy->dev); + int ret; + u32 v; + + inno_update_bits(inno, 0x02, RK3328_PDATA_EN, 0); + inno_update_bits(inno, 0xaa, RK3328_POST_PLL_POWER_DOWN, + RK3328_POST_PLL_POWER_DOWN); + + inno_write(inno, 0xac, RK3328_POST_PLL_FB_DIV_7_0(cfg->fbdiv)); + if (cfg->postdiv == 1) { + inno_write(inno, 0xab, RK3328_POST_PLL_FB_DIV_8(cfg->fbdiv) | + RK3328_POST_PLL_PRE_DIV(cfg->prediv)); + inno_write(inno, 0xaa, RK3328_POST_PLL_REFCLK_SEL_TMDS | + RK3328_POST_PLL_POWER_DOWN); + } else { + v = (cfg->postdiv / 2) - 1; + v &= RK3328_POST_PLL_POST_DIV_MASK; + inno_write(inno, 0xad, v); + inno_write(inno, 0xab, RK3328_POST_PLL_FB_DIV_8(cfg->fbdiv) | + RK3328_POST_PLL_PRE_DIV(cfg->prediv)); + inno_write(inno, 0xaa, RK3328_POST_PLL_POST_DIV_ENABLE | + RK3328_POST_PLL_REFCLK_SEL_TMDS | + RK3328_POST_PLL_POWER_DOWN); + } + + for (v = 0; v < 14; v++) + inno_write(inno, 0xb5 + v, phy_cfg->regs[v]); + + /* set ESD detection threshold for TMDS CLK, D2, D1 and D0 */ + for (v = 0; v < 4; v++) + inno_update_bits(inno, 0xc8 + v, RK3328_ESD_DETECT_MASK, + RK3328_ESD_DETECT_340MV); + + if (phy_cfg->tmdsclock > 340000000) { + /* Set termination resistor to 100ohm */ + v = clk_get_rate(&inno->sysclk) / 100000; + inno_write(inno, 0xc5, RK3328_TERM_RESISTOR_CALIB_SPEED_14_8(v) + | RK3328_BYPASS_TERM_RESISTOR_CALIB); + inno_write(inno, 0xc6, RK3328_TERM_RESISTOR_CALIB_SPEED_7_0(v)); + inno_write(inno, 0xc7, RK3328_TERM_RESISTOR_100); + inno_update_bits(inno, 0xc5, + RK3328_BYPASS_TERM_RESISTOR_CALIB, 0); + } else { + inno_write(inno, 0xc5, RK3328_BYPASS_TERM_RESISTOR_CALIB); + + /* clk termination resistor is 50ohm (parallel resistors) */ + if (phy_cfg->tmdsclock > 165000000) + inno_update_bits(inno, 0xc8, + RK3328_TMDS_TERM_RESIST_MASK, + RK3328_TMDS_TERM_RESIST_75 | + RK3328_TMDS_TERM_RESIST_150); + + /* data termination resistor for D2, D1 and D0 is 150ohm */ + for (v = 0; v < 3; v++) + inno_update_bits(inno, 0xc9 + v, + RK3328_TMDS_TERM_RESIST_MASK, + RK3328_TMDS_TERM_RESIST_150); + } + + inno_update_bits(inno, 0xaa, RK3328_POST_PLL_POWER_DOWN, 0); + inno_update_bits(inno, 0xb0, RK3328_BANDGAP_ENABLE, + RK3328_BANDGAP_ENABLE); + inno_update_bits(inno, 0xb2, RK3328_TMDS_DRIVER_ENABLE, + RK3328_TMDS_DRIVER_ENABLE); + + /* Wait for post PLL lock */ + ret = inno_poll(0xaf, v, v & RK3328_POST_PLL_LOCK_STATUS, + 1000, 10000); + if (ret) { + dev_err(phy->dev, "Post-PLL locking failed\n"); + return ret; + } + + if (phy_cfg->tmdsclock > 340000000) + mdelay(100); + + inno_update_bits(inno, 0x02, RK3328_PDATA_EN, RK3328_PDATA_EN); + + /* Enable PHY IRQ */ + inno_write(inno, 0x05, RK3328_INT_TMDS_CLK(RK3328_INT_VSS_AGND_ESD_DET) + | RK3328_INT_TMDS_D2(RK3328_INT_VSS_AGND_ESD_DET)); + inno_write(inno, 0x07, RK3328_INT_TMDS_D1(RK3328_INT_VSS_AGND_ESD_DET) + | RK3328_INT_TMDS_D0(RK3328_INT_VSS_AGND_ESD_DET)); + + return 0; +} + +static void inno_hdmi_phy_rk3328_power_off(struct phy *phy) +{ + struct inno_hdmi_phy *inno = dev_get_priv(phy->dev); + + inno_update_bits(inno, 0xb2, RK3328_TMDS_DRIVER_ENABLE, 0); + inno_update_bits(inno, 0xb0, RK3328_BANDGAP_ENABLE, 0); + inno_update_bits(inno, 0xaa, RK3328_POST_PLL_POWER_DOWN, + RK3328_POST_PLL_POWER_DOWN); + + /* Disable PHY IRQ */ + inno_write(inno, 0x05, 0); + inno_write(inno, 0x07, 0); +} + +static void inno_hdmi_phy_rk3328_init(struct phy *phy) +{ + struct inno_hdmi_phy *inno = dev_get_priv(phy->dev); + const struct inno_hdmi_phy_plat_ops *plat_ops = inno->data->plat_ops; + + /* + * Use phy internal register control + * rxsense/poweron/pllpd/pdataen signal. + */ + inno_write(inno, 0x01, RK3328_BYPASS_RXSENSE_EN | + RK3328_BYPASS_POWERON_EN | + RK3328_BYPASS_PLLPD_EN); + inno_write(inno, 0x02, RK3328_INT_POL_HIGH | RK3328_BYPASS_PDATA_EN | + RK3328_PDATA_EN); + + /* Disable phy irq */ + inno_write(inno, 0x05, 0); + inno_write(inno, 0x07, 0); + + if (plat_ops->clk_recalc_rate) + plat_ops->clk_recalc_rate(phy, clk_get_rate(&inno->refoclk)); + + if (plat_ops->clk_round_rate) + plat_ops->clk_round_rate(phy, inno->pixclock); +} + +static const struct inno_hdmi_phy_plat_ops rk3328_hdmi_phy_plat_ops = { + .init = inno_hdmi_phy_rk3328_init, + .power_on = inno_hdmi_phy_rk3328_power_on, + .power_off = inno_hdmi_phy_rk3328_power_off, + .clk_enable = inno_hdmi_phy_rk3328_clk_enable, + .clk_disable = inno_hdmi_phy_rk3328_clk_disable, + .clk_recalc_rate = inno_hdmi_phy_rk3328_clk_recalc_rate, + .clk_round_rate = inno_hdmi_phy_rk3328_clk_round_rate, + .clk_set_rate = inno_hdmi_phy_rk3328_clk_set_rate, +}; + +static int inno_hdmi_phy_power_on(struct phy *phy) +{ + struct inno_hdmi_phy *inno = dev_get_priv(phy->dev); + const struct post_pll_config *cfg = post_pll_cfg_table; + const struct phy_config *phy_cfg = inno->data->phy_cfg_table; + u32 tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, inno->pixclock); + const struct inno_hdmi_phy_plat_ops *plat_ops = inno->data->plat_ops; + int ret; + + if (!tmdsclock) { + dev_err(phy->dev, "TMDS clock is zero!\n"); + return -EINVAL; + } + + if (!plat_ops->power_on) + return -EINVAL; + + dev_info(phy->dev, "TMDS clock = %d\n", tmdsclock); + + for (; cfg->tmdsclock != ~0UL; cfg++) + if (tmdsclock <= cfg->tmdsclock) + break; + + for (; phy_cfg->tmdsclock != ~0UL; phy_cfg++) + if (tmdsclock <= phy_cfg->tmdsclock) + break; + + if (cfg->tmdsclock == 0 || phy_cfg->tmdsclock == 0) + return -EINVAL; + + if (plat_ops->clk_set_rate) { + ret = plat_ops->clk_set_rate(phy, inno->pixclock, 24000000); + if (ret) + return ret; + } + + if (plat_ops->clk_enable) + plat_ops->clk_enable(phy); + + if (plat_ops->power_on) { + ret = plat_ops->power_on(phy, cfg, phy_cfg); + if (ret) { + if (plat_ops->clk_disable) + plat_ops->clk_disable(phy); + return ret; + } + } + + return 0; +} + +static int inno_hdmi_phy_power_off(struct phy *phy) +{ + struct inno_hdmi_phy *inno = dev_get_priv(phy->dev); + const struct inno_hdmi_phy_plat_ops *plat_ops = inno->data->plat_ops; + + if (!plat_ops->power_off) + return -EINVAL; + + plat_ops->power_off(phy); + + if (plat_ops->clk_disable) + plat_ops->clk_disable(phy); + + inno->tmdsclock = 0; + + return 0; +} + +static int inno_hdmi_phy_init(struct phy *phy) +{ + struct inno_hdmi_phy *inno = dev_get_priv(phy->dev); + + if (inno->data->plat_ops->init) + inno->data->plat_ops->init(phy); + + return 0; +} + +static struct phy_ops inno_hdmi_phy_ops = { + .init = inno_hdmi_phy_init, + .power_on = inno_hdmi_phy_power_on, + .power_off = inno_hdmi_phy_power_off, +}; + +static int inno_hdmi_phy_probe(struct udevice *dev) +{ + struct inno_hdmi_phy *inno = dev_get_priv(dev); + int ret; + + inno->regs = dev_read_addr_ptr(dev); + if (!inno->regs) + return -ENOMEM; + + inno->data = (const struct inno_hdmi_phy_data *)dev_get_driver_data(dev); + if (!inno->data) + return -EINVAL; + + inno->bus_width = 8; + + ret = clk_get_by_name(dev, "refoclk", &inno->refoclk); + if (ret) { + dev_err(dev, "failed to get the refoclk (ret=%d)\n", ret); + return ret; + } + + ret = clk_get_by_name(dev, "sysclk", &inno->sysclk); + if (ret) { + dev_err(dev, "failed to get the sysclk (ret=%d)\n", ret); + return ret; + } + + return 0; +} + +static const struct inno_hdmi_phy_data rk3328_inno_hdmi_phy_drv_data = { + .phy_type = INNO_HDMI_PHY_RK3328, + .plat_ops = &rk3328_hdmi_phy_plat_ops, + .phy_cfg_table = rk3328_phy_cfg, +}; + +static const struct udevice_id inno_hdmi_phy_ids[] = { + { + .compatible = "rockchip,rk3328-hdmi-phy", + .data = (ulong)&rk3328_inno_hdmi_phy_drv_data, + }, + { /* sentile */ } +}; + +U_BOOT_DRIVER(inno_hdmi_phy) = { + .name = "inno_hdmi_phy", + .id = UCLASS_PHY, + .of_match = inno_hdmi_phy_ids, + .ops = &inno_hdmi_phy_ops, + .probe = inno_hdmi_phy_probe, + .priv_auto = sizeof(struct inno_hdmi_phy), +}; diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c index d392aed2d4d..43f6e020a6a 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c @@ -329,6 +329,22 @@ bind_fail: return ret; } +static const struct rockchip_usb2phy_cfg rk3308_phy_cfgs[] = { + { + .reg = 0x100, + .clkout_ctl = { 0x0108, 4, 4, 1, 0 }, + .port_cfgs = { + [USB2PHY_PORT_OTG] = { + .phy_sus = { 0x0100, 1, 0, 2, 1 }, + }, + [USB2PHY_PORT_HOST] = { + .phy_sus = { 0x0104, 1, 0, 2, 1 }, + } + }, + }, + { /* sentinel */ } +}; + static const struct rockchip_usb2phy_cfg rk3328_usb2phy_cfgs[] = { { .reg = 0x100, @@ -443,6 +459,10 @@ static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = { static const struct udevice_id rockchip_usb2phy_ids[] = { { + .compatible = "rockchip,rk3308-usb2phy", + .data = (ulong)&rk3308_phy_cfgs, + }, + { .compatible = "rockchip,rk3328-usb2phy", .data = (ulong)&rk3328_usb2phy_cfgs, }, diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig index 2fe63981478..b326fa85140 100644 --- a/drivers/pinctrl/qcom/Kconfig +++ b/drivers/pinctrl/qcom/Kconfig @@ -1,4 +1,4 @@ -if ARCH_SNAPDRAGON +if ARCH_SNAPDRAGON || ARCH_IPQ40XX config PINCTRL_QCOM depends on PINCTRL_GENERIC @@ -27,6 +27,13 @@ config PINCTRL_QCOM_IPQ4019 Say Y here to enable support for pinctrl on the IPQ4019 SoC, as well as the associated GPIO driver. +config PINCTRL_QCOM_QCM2290 + bool "Qualcomm QCM2290 GCC" + select PINCTRL_QCOM + help + Say Y here to enable support for pinctrl on the Snapdragon QCM2290 SoC, + as well as the associated GPIO driver. + config PINCTRL_QCOM_QCS404 bool "Qualcomm QCS404 GCC" select PINCTRL_QCOM @@ -41,6 +48,33 @@ config PINCTRL_QCOM_SDM845 Say Y here to enable support for pinctrl on the Snapdragon 845 SoC, as well as the associated GPIO driver. +config PINCTRL_QCOM_SM6115 + bool "Qualcomm SM6115 GCC" + select PINCTRL_QCOM + help + Say Y here to enable support for pinctrl on the Snapdragon SM6115 SoC, + as well as the associated GPIO driver. + +config PINCTRL_QCOM_SM8250 + bool "Qualcomm SM8250 GCC" + select PINCTRL_QCOM + help + Say Y here to enable support for pinctrl on the Snapdragon SM8250 SoC, + as well as the associated GPIO driver. + +config PINCTRL_QCOM_SM8550 + bool "Qualcomm SM8550 GCC" + select PINCTRL_QCOM + help + Say Y here to enable support for pinctrl on the Snapdragon SM8550 SoC, + as well as the associated GPIO driver. + +config PINCTRL_QCOM_SM8650 + bool "Qualcomm SM8650 GCC" + select PINCTRL_QCOM + help + Say Y here to enable support for pinctrl on the Snapdragon SM8650 SoC, + endmenu endif diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile index 6d9aca6d7b7..4f1d96787be 100644 --- a/drivers/pinctrl/qcom/Makefile +++ b/drivers/pinctrl/qcom/Makefile @@ -6,5 +6,10 @@ obj-$(CONFIG_PINCTRL_QCOM) += pinctrl-qcom.o obj-$(CONFIG_PINCTRL_QCOM_APQ8016) += pinctrl-apq8016.o obj-$(CONFIG_PINCTRL_QCOM_IPQ4019) += pinctrl-ipq4019.o obj-$(CONFIG_PINCTRL_QCOM_APQ8096) += pinctrl-apq8096.o +obj-$(CONFIG_PINCTRL_QCOM_QCM2290) += pinctrl-qcm2290.o obj-$(CONFIG_PINCTRL_QCOM_QCS404) += pinctrl-qcs404.o obj-$(CONFIG_PINCTRL_QCOM_SDM845) += pinctrl-sdm845.o +obj-$(CONFIG_PINCTRL_QCOM_SM6115) += pinctrl-sm6115.o +obj-$(CONFIG_PINCTRL_QCOM_SM8250) += pinctrl-sm8250.o +obj-$(CONFIG_PINCTRL_QCOM_SM8550) += pinctrl-sm8550.o +obj-$(CONFIG_PINCTRL_QCOM_SM8650) += pinctrl-sm8650.o diff --git a/drivers/pinctrl/qcom/pinctrl-apq8016.c b/drivers/pinctrl/qcom/pinctrl-apq8016.c index a9a00f4b081..b14a8921af4 100644 --- a/drivers/pinctrl/qcom/pinctrl-apq8016.c +++ b/drivers/pinctrl/qcom/pinctrl-apq8016.c @@ -29,6 +29,8 @@ static const char * const msm_pinctrl_pins[] = { }; static const struct pinctrl_function msm_pinctrl_functions[] = { + {"gpio", 0}, + {"blsp_uart1", 2}, {"blsp_uart2", 2}, }; diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c b/drivers/pinctrl/qcom/pinctrl-ipq4019.c index 44792303133..26ab487857f 100644 --- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c +++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c @@ -14,19 +14,291 @@ #define MAX_PIN_NAME_LEN 32 static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); + +enum ipq4019_functions { + qca_mux_gpio, + qca_mux_aud_pin, + qca_mux_audio_pwm, + qca_mux_blsp_i2c0, + qca_mux_blsp_i2c1, + qca_mux_blsp_spi0, + qca_mux_blsp_spi1, + qca_mux_blsp_uart0, + qca_mux_blsp_uart1, + qca_mux_chip_rst, + qca_mux_i2s_rx, + qca_mux_i2s_spdif_in, + qca_mux_i2s_spdif_out, + qca_mux_i2s_td, + qca_mux_i2s_tx, + qca_mux_jtag, + qca_mux_led0, + qca_mux_led1, + qca_mux_led2, + qca_mux_led3, + qca_mux_led4, + qca_mux_led5, + qca_mux_led6, + qca_mux_led7, + qca_mux_led8, + qca_mux_led9, + qca_mux_led10, + qca_mux_led11, + qca_mux_mdc, + qca_mux_mdio, + qca_mux_pcie, + qca_mux_pmu, + qca_mux_prng_rosc, + qca_mux_qpic, + qca_mux_rgmii, + qca_mux_rmii, + qca_mux_sdio, + qca_mux_smart0, + qca_mux_smart1, + qca_mux_smart2, + qca_mux_smart3, + qca_mux_tm, + qca_mux_wifi0, + qca_mux_wifi1, + qca_mux_NA, +}; + +#define QCA_PIN_FUNCTION(fname) \ + [qca_mux_##fname] = {#fname, qca_mux_##fname} + static const struct pinctrl_function msm_pinctrl_functions[] = { - {"gpio", 0}, - {"blsp_uart0_0", 1}, /* Only for GPIO:16,17 */ - {"blsp_uart0_1", 2}, /* Only for GPIO:60,61 */ - {"blsp_uart1", 1}, - {"blsp_spi0_0", 1}, /* Only for GPIO:12,13,14,15 */ - {"blsp_spi0_1", 2}, /* Only for GPIO:54,55,56,57 */ - {"blsp_spi1", 2}, - {"mdio_0", 1}, /* Only for GPIO6 */ - {"mdio_1", 2}, /* Only for GPIO53 */ - {"mdc_0", 1}, /* Only for GPIO7 */ - {"mdc_1", 2}, /* Only for GPIO52 */ + QCA_PIN_FUNCTION(aud_pin), + QCA_PIN_FUNCTION(audio_pwm), + QCA_PIN_FUNCTION(blsp_i2c0), + QCA_PIN_FUNCTION(blsp_i2c1), + QCA_PIN_FUNCTION(blsp_spi0), + QCA_PIN_FUNCTION(blsp_spi1), + QCA_PIN_FUNCTION(blsp_uart0), + QCA_PIN_FUNCTION(blsp_uart1), + QCA_PIN_FUNCTION(chip_rst), + QCA_PIN_FUNCTION(gpio), + QCA_PIN_FUNCTION(i2s_rx), + QCA_PIN_FUNCTION(i2s_spdif_in), + QCA_PIN_FUNCTION(i2s_spdif_out), + QCA_PIN_FUNCTION(i2s_td), + QCA_PIN_FUNCTION(i2s_tx), + QCA_PIN_FUNCTION(jtag), + QCA_PIN_FUNCTION(led0), + QCA_PIN_FUNCTION(led1), + QCA_PIN_FUNCTION(led2), + QCA_PIN_FUNCTION(led3), + QCA_PIN_FUNCTION(led4), + QCA_PIN_FUNCTION(led5), + QCA_PIN_FUNCTION(led6), + QCA_PIN_FUNCTION(led7), + QCA_PIN_FUNCTION(led8), + QCA_PIN_FUNCTION(led9), + QCA_PIN_FUNCTION(led10), + QCA_PIN_FUNCTION(led11), + QCA_PIN_FUNCTION(mdc), + QCA_PIN_FUNCTION(mdio), + QCA_PIN_FUNCTION(pcie), + QCA_PIN_FUNCTION(pmu), + QCA_PIN_FUNCTION(prng_rosc), + QCA_PIN_FUNCTION(qpic), + QCA_PIN_FUNCTION(rgmii), + QCA_PIN_FUNCTION(rmii), + QCA_PIN_FUNCTION(sdio), + QCA_PIN_FUNCTION(smart0), + QCA_PIN_FUNCTION(smart1), + QCA_PIN_FUNCTION(smart2), + QCA_PIN_FUNCTION(smart3), + QCA_PIN_FUNCTION(tm), + QCA_PIN_FUNCTION(wifi0), + QCA_PIN_FUNCTION(wifi1), }; + +typedef unsigned int msm_pin_function[15]; + +#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14) \ + [id] = { qca_mux_gpio, /* gpio mode */ \ + qca_mux_##f1, \ + qca_mux_##f2, \ + qca_mux_##f3, \ + qca_mux_##f4, \ + qca_mux_##f5, \ + qca_mux_##f6, \ + qca_mux_##f7, \ + qca_mux_##f8, \ + qca_mux_##f9, \ + qca_mux_##f10, \ + qca_mux_##f11, \ + qca_mux_##f12, \ + qca_mux_##f13, \ + qca_mux_##f14 \ + } + +static const msm_pin_function ipq4019_pin_functions[] = { + PINGROUP(0, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA), + PINGROUP(1, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA), + PINGROUP(2, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA), + PINGROUP(3, jtag, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(4, jtag, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(5, jtag, smart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA), + PINGROUP(6, mdio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(7, mdc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(8, blsp_uart1, NA, NA, smart1, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(9, blsp_uart1, NA, NA, smart1, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(10, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(11, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(12, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(13, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(14, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA), + PINGROUP(15, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA), + PINGROUP(16, blsp_uart0, led0, smart1, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(17, blsp_uart0, led1, smart1, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(18, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(19, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(20, blsp_i2c0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA), + PINGROUP(21, blsp_i2c0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA), + PINGROUP(22, rgmii, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA), + PINGROUP(23, sdio, rgmii, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA), + PINGROUP(24, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA), + PINGROUP(25, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA), + PINGROUP(26, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA), + PINGROUP(27, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA), + PINGROUP(28, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA), + PINGROUP(29, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA), + PINGROUP(30, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(31, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(32, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(33, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA), + PINGROUP(34, blsp_i2c1, i2s_spdif_in, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA, NA), + PINGROUP(35, blsp_i2c1, i2s_spdif_out, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA, NA), + PINGROUP(36, rmii, led2, led0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA), + PINGROUP(37, rmii, wifi0, wifi1, led1, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA), + PINGROUP(38, rmii, led2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA), + PINGROUP(39, rmii, pcie, led3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA), + PINGROUP(40, rmii, wifi0, wifi1, smart2, led4, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(41, rmii, wifi0, wifi1, smart2, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(42, rmii, wifi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA), + PINGROUP(43, rmii, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA), + PINGROUP(44, rmii, blsp_spi1, smart0, led5, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(45, rmii, blsp_spi1, blsp_spi0, smart0, led6, NA, NA, NA, NA, + NA, NA, NA, NA, NA), + PINGROUP(46, rmii, blsp_spi1, smart0, led7, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(47, rmii, blsp_spi1, smart0, led8, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(48, rmii, aud_pin, smart2, led9, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(49, rmii, aud_pin, smart2, led10, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(50, rmii, aud_pin, wifi0, wifi1, led11, NA, NA, NA, NA, NA, + NA, NA, NA, NA), + PINGROUP(51, rmii, aud_pin, wifi0, wifi1, NA, NA, NA, NA, NA, NA, NA, + NA, NA, NA), + PINGROUP(52, qpic, mdc, pcie, i2s_tx, NA, NA, NA, tm, wifi0, wifi1, NA, + NA, NA, NA), + PINGROUP(53, qpic, mdio, i2s_tx, prng_rosc, NA, tm, wifi0, wifi1, NA, + NA, NA, NA, NA, NA), + PINGROUP(54, qpic, blsp_spi0, i2s_td, NA, pmu, NA, NA, NA, tm, NA, NA, + NA, NA, NA), + PINGROUP(55, qpic, blsp_spi0, i2s_td, NA, pmu, NA, NA, NA, tm, NA, NA, + NA, NA, NA), + PINGROUP(56, qpic, blsp_spi0, i2s_td, NA, NA, tm, wifi0, wifi1, NA, NA, + NA, NA, NA, NA), + PINGROUP(57, qpic, blsp_spi0, i2s_tx, NA, NA, tm, wifi0, wifi1, NA, NA, + NA, NA, NA, NA), + PINGROUP(58, qpic, led2, blsp_i2c0, smart3, smart1, i2s_rx, NA, NA, tm, + wifi0, wifi1, NA, NA, NA), + PINGROUP(59, qpic, blsp_i2c0, smart3, smart1, i2s_spdif_in, NA, NA, NA, + NA, NA, tm, NA, NA, NA), + PINGROUP(60, qpic, blsp_uart0, smart1, smart3, led0, i2s_tx, i2s_rx, + NA, NA, NA, NA, NA, tm, NA), + PINGROUP(61, qpic, blsp_uart0, smart1, smart3, led1, i2s_tx, i2s_rx, + NA, NA, NA, NA, NA, tm, NA), + PINGROUP(62, qpic, chip_rst, NA, NA, i2s_spdif_out, NA, NA, NA, NA, NA, + tm, NA, NA, NA), + PINGROUP(63, qpic, NA, NA, NA, i2s_td, i2s_rx, i2s_spdif_out, + i2s_spdif_in, NA, NA, NA, NA, tm, NA), + PINGROUP(64, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA), + PINGROUP(65, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA), + PINGROUP(66, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA), + PINGROUP(67, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA, NA), + PINGROUP(68, qpic, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(69, qpic, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(70, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(71, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(72, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(78, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(82, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(83, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(84, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(85, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(88, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(89, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(90, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(91, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(92, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(93, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(94, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(95, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(96, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(97, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(98, wifi0, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, + NA), + PINGROUP(99, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), +}; + static const char *ipq4019_get_function_name(struct udevice *dev, unsigned int selector) { @@ -36,14 +308,22 @@ static const char *ipq4019_get_function_name(struct udevice *dev, static const char *ipq4019_get_pin_name(struct udevice *dev, unsigned int selector) { - snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector); + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); return pin_name; } -static unsigned int ipq4019_get_function_mux(__maybe_unused unsigned int pin, +static unsigned int ipq4019_get_function_mux(unsigned int pin, unsigned int selector) { - return msm_pinctrl_functions[selector].val; + unsigned int i; + const msm_pin_function *func = ipq4019_pin_functions + pin; + + for (i = 0; i < 15; i++) + if ((*func)[i] == selector) + return i; + + pr_err("Can't find requested function for pin %u pin\n", pin); + return -EINVAL; } static const struct msm_pinctrl_data ipq4019_data = { @@ -68,4 +348,5 @@ U_BOOT_DRIVER(pinctrl_ipq4019) = { .of_match = msm_pinctrl_ids, .ops = &msm_pinctrl_ops, .bind = msm_pinctrl_bind, + .flags = DM_FLAG_PRE_RELOC, }; diff --git a/drivers/pinctrl/qcom/pinctrl-qcm2290.c b/drivers/pinctrl/qcom/pinctrl-qcm2290.c new file mode 100644 index 00000000000..af969e177d7 --- /dev/null +++ b/drivers/pinctrl/qcom/pinctrl-qcm2290.c @@ -0,0 +1,70 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm qcm2290 pinctrl + * + * (C) Copyright 2024 Linaro Ltd. + * + */ + +#include <dm.h> + +#include "pinctrl-qcom.h" + +#define MAX_PIN_NAME_LEN 32 +static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); + +static const struct pinctrl_function msm_pinctrl_functions[] = { + { "qup4", 1 }, + { "gpio", 0 }, +}; + +static const char *qcm2290_get_function_name(struct udevice *dev, unsigned int selector) +{ + return msm_pinctrl_functions[selector].name; +} + +static const char *qcm2290_get_pin_name(struct udevice *dev, unsigned int selector) +{ + static const char *const special_pins_names[] = { + "sdc1_rclk", "sdc1_clk", "sdc1_cmd", "sdc1_data", + "sdc2_clk", "sdc2_cmd", "sdc2_data", + }; + + if (selector >= 127 && selector <= 133) + snprintf(pin_name, MAX_PIN_NAME_LEN, special_pins_names[selector - 127]); + else + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); + + return pin_name; +} + +static unsigned int qcm2290_get_function_mux(__maybe_unused unsigned int pin, unsigned int selector) +{ + return msm_pinctrl_functions[selector].val; +} + +struct msm_pinctrl_data qcm2290_data = { + .pin_data = { + .pin_count = 133, + .special_pins_start = 127, + }, + .functions_count = ARRAY_SIZE(msm_pinctrl_functions), + .get_function_name = qcm2290_get_function_name, + .get_function_mux = qcm2290_get_function_mux, + .get_pin_name = qcm2290_get_pin_name, +}; + +static const struct udevice_id msm_pinctrl_ids[] = { + { + .compatible = "qcom,qcm2290-tlmm", + .data = (ulong)&qcm2290_data + }, + { /* Sentinel */ } }; + +U_BOOT_DRIVER(pinctrl_qcm2290) = { + .name = "pinctrl_qcm2290", + .id = UCLASS_NOP, + .of_match = msm_pinctrl_ids, + .ops = &msm_pinctrl_ops, + .bind = msm_pinctrl_bind, +}; diff --git a/drivers/pinctrl/qcom/pinctrl-qcom.c b/drivers/pinctrl/qcom/pinctrl-qcom.c index 909e566acf5..e68971b37ff 100644 --- a/drivers/pinctrl/qcom/pinctrl-qcom.c +++ b/drivers/pinctrl/qcom/pinctrl-qcom.c @@ -29,15 +29,24 @@ struct msm_pinctrl_priv { #define GPIO_CONFIG_REG(priv, x) \ (qcom_pin_offset((priv)->data->pin_data.pin_offsets, x)) -#define TLMM_GPIO_PULL_MASK GENMASK(1, 0) -#define TLMM_FUNC_SEL_MASK GENMASK(5, 2) -#define TLMM_DRV_STRENGTH_MASK GENMASK(8, 6) -#define TLMM_GPIO_DISABLE BIT(9) +#define GPIO_IN_OUT_REG(priv, x) \ + (GPIO_CONFIG_REG(priv, x) + 0x4) + +#define TLMM_GPIO_PULL_MASK GENMASK(1, 0) +#define TLMM_FUNC_SEL_MASK GENMASK(5, 2) +#define TLMM_DRV_STRENGTH_MASK GENMASK(8, 6) +#define TLMM_GPIO_OUTPUT_MASK BIT(1) +#define TLMM_GPIO_OE_MASK BIT(9) + +/* GPIO register shifts. */ +#define GPIO_OUT_SHIFT 1 static const struct pinconf_param msm_conf_params[] = { { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 2 }, { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 }, { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 3 }, + { "output-high", PIN_CONFIG_OUTPUT, 1, }, + { "output-low", PIN_CONFIG_OUTPUT, 0, }, }; static int msm_get_functions_count(struct udevice *dev) @@ -90,7 +99,7 @@ static int msm_pinmux_set(struct udevice *dev, unsigned int pin_selector, return 0; clrsetbits_le32(priv->base + GPIO_CONFIG_REG(priv, pin_selector), - TLMM_FUNC_SEL_MASK | TLMM_GPIO_DISABLE, func << 2); + TLMM_FUNC_SEL_MASK | TLMM_GPIO_OE_MASK, func << 2); return 0; } @@ -117,6 +126,12 @@ static int msm_pinconf_set(struct udevice *dev, unsigned int pin_selector, clrsetbits_le32(priv->base + GPIO_CONFIG_REG(priv, pin_selector), TLMM_GPIO_PULL_MASK, argument); break; + case PIN_CONFIG_OUTPUT: + writel(argument << GPIO_OUT_SHIFT, + priv->base + GPIO_IN_OUT_REG(priv, pin_selector)); + setbits_le32(priv->base + GPIO_CONFIG_REG(priv, pin_selector), + TLMM_GPIO_OE_MASK); + break; default: return 0; } diff --git a/drivers/pinctrl/qcom/pinctrl-sdm845.c b/drivers/pinctrl/qcom/pinctrl-sdm845.c index 459a4329ec8..c1e5cc01fde 100644 --- a/drivers/pinctrl/qcom/pinctrl-sdm845.c +++ b/drivers/pinctrl/qcom/pinctrl-sdm845.c @@ -66,7 +66,18 @@ static const char *sdm845_get_function_name(struct udevice *dev, static const char *sdm845_get_pin_name(struct udevice *dev, unsigned int selector) { - snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); + static const char *special_pins_names[] = { + "ufs_reset", + "sdc2_clk", + "sdc2_cmd", + "sdc2_data", + }; + + if (selector >= 150 && selector <= 154) + snprintf(pin_name, MAX_PIN_NAME_LEN, special_pins_names[selector - 150]); + else + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); + return pin_name; } diff --git a/drivers/pinctrl/qcom/pinctrl-sm6115.c b/drivers/pinctrl/qcom/pinctrl-sm6115.c new file mode 100644 index 00000000000..f07f39f4ac3 --- /dev/null +++ b/drivers/pinctrl/qcom/pinctrl-sm6115.c @@ -0,0 +1,200 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm sm6115 pinctrl + * + * (C) Copyright 2024 Linaro Ltd. + * + */ + +#include <dm.h> + +#include "pinctrl-qcom.h" + +#define WEST 0x00000000 +#define SOUTH 0x00400000 +#define EAST 0x00800000 + +#define MAX_PIN_NAME_LEN 32 +static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); + +static const struct pinctrl_function msm_pinctrl_functions[] = { + { "qup4", 1 }, + { "gpio", 0 }, +}; + +static const unsigned int sm6115_pin_offsets[] = { + [0] = WEST, + [1] = WEST, + [2] = WEST, + [3] = WEST, + [4] = WEST, + [5] = WEST, + [6] = WEST, + [7] = WEST, + [8] = EAST, + [9] = EAST, + [10] = EAST, + [11] = EAST, + [12] = WEST, + [13] = WEST, + [14] = WEST, + [15] = WEST, + [16] = WEST, + [17] = WEST, + [18] = EAST, + [19] = EAST, + [20] = EAST, + [21] = EAST, + [22] = EAST, + [23] = EAST, + [24] = EAST, + [25] = EAST, + [26] = EAST, + [27] = EAST, + [28] = EAST, + [29] = EAST, + [30] = EAST, + [31] = EAST, + [32] = EAST, + [33] = EAST, + [34] = EAST, + [35] = EAST, + [36] = EAST, + [37] = EAST, + [38] = EAST, + [39] = EAST, + [40] = EAST, + [41] = EAST, + [42] = EAST, + [43] = EAST, + [44] = EAST, + [45] = EAST, + [46] = EAST, + [47] = EAST, + [48] = EAST, + [49] = EAST, + [50] = EAST, + [51] = EAST, + [52] = EAST, + [53] = EAST, + [54] = EAST, + [55] = EAST, + [56] = EAST, + [57] = EAST, + [58] = EAST, + [59] = EAST, + [60] = EAST, + [61] = EAST, + [62] = EAST, + [63] = EAST, + [64] = EAST, + [65] = WEST, + [66] = WEST, + [67] = WEST, + [68] = WEST, + [69] = WEST, + [70] = WEST, + [71] = WEST, + [72] = SOUTH, + [73] = SOUTH, + [74] = SOUTH, + [75] = SOUTH, + [76] = SOUTH, + [77] = SOUTH, + [78] = SOUTH, + [79] = SOUTH, + [80] = WEST, + [81] = WEST, + [82] = WEST, + [83] = WEST, + [84] = WEST, + [85] = WEST, + [86] = WEST, + [87] = EAST, + [88] = EAST, + [89] = WEST, + [90] = EAST, + [91] = EAST, + [92] = WEST, + [93] = WEST, + [94] = WEST, + [95] = WEST, + [96] = WEST, + [97] = WEST, + [98] = SOUTH, + [99] = SOUTH, + [100] = SOUTH, + [101] = SOUTH, + [102] = SOUTH, + [103] = SOUTH, + [104] = SOUTH, + [105] = SOUTH, + [106] = SOUTH, + [107] = SOUTH, + [108] = SOUTH, + [109] = SOUTH, + [110] = SOUTH, + [111] = SOUTH, + [112] = SOUTH, + /* Special pins */ + [113] = 0, + [114] = 0, + [115] = 0, + [116] = 0, + [117] = 0, + [118] = 0, + [119] = 0, + [120] = 0, +}; + +static const char *sm6115_get_function_name(struct udevice *dev, unsigned int selector) +{ + return msm_pinctrl_functions[selector].name; +} + +static const char *sm6115_get_pin_name(struct udevice *dev, unsigned int selector) +{ + static const char *special_pins_names[] = { + "ufs_reset", "sdc1_rclk", "sdc1_clk", "sdc1_cmd", + "sdc1_data", "sdc2_clk", "sdc2_cmd", "sdc2_data", + }; + + if (selector >= 113 && selector <= 120) + snprintf(pin_name, MAX_PIN_NAME_LEN, special_pins_names[selector - 113]); + else + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); + + return pin_name; +} + +static unsigned int sm6115_get_function_mux(__maybe_unused unsigned int pin, unsigned int selector) +{ + return msm_pinctrl_functions[selector].val; +} + +struct msm_pinctrl_data sm6115_data = { + .pin_data = { + .pin_offsets = sm6115_pin_offsets, + .pin_count = ARRAY_SIZE(sm6115_pin_offsets), + .special_pins_start = 113, + }, + .functions_count = ARRAY_SIZE(msm_pinctrl_functions), + .get_function_name = sm6115_get_function_name, + .get_function_mux = sm6115_get_function_mux, + .get_pin_name = sm6115_get_pin_name, +}; + +static const struct udevice_id msm_pinctrl_ids[] = { + { + .compatible = "qcom,sm6115-tlmm", + .data = (ulong)&sm6115_data + }, + { /* Sentinel */ } }; + +U_BOOT_DRIVER(pinctrl_sm6115) = { + .name = "pinctrl_sm6115", + .id = UCLASS_NOP, + .of_match = msm_pinctrl_ids, + .ops = &msm_pinctrl_ops, + .bind = msm_pinctrl_bind, +}; diff --git a/drivers/pinctrl/qcom/pinctrl-sm8250.c b/drivers/pinctrl/qcom/pinctrl-sm8250.c new file mode 100644 index 00000000000..dac24f11bc2 --- /dev/null +++ b/drivers/pinctrl/qcom/pinctrl-sm8250.c @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm sm8250 pinctrl + * + * (C) Copyright 2024 Linaro Ltd. + * + */ + +#include <dm.h> + +#include "pinctrl-qcom.h" + +#define WEST 0x00000000 +#define SOUTH 0x00400000 +#define NORTH 0x00800000 + +#define MAX_PIN_NAME_LEN 32 +static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); + +static const struct pinctrl_function msm_pinctrl_functions[] = { { "qup12", 1 }, + { "gpio", 0 }, + { "sdc2_clk", 0 } }; + +static const unsigned int sm8250_pin_offsets[] = { + [0] = SOUTH, [1] = SOUTH, [2] = SOUTH, [3] = SOUTH, [4] = NORTH, [5] = NORTH, + [6] = NORTH, [7] = NORTH, [8] = NORTH, [9] = NORTH, [10] = NORTH, [11] = NORTH, + [12] = NORTH, [13] = NORTH, [14] = NORTH, [15] = NORTH, [16] = NORTH, [17] = NORTH, + [18] = NORTH, [19] = NORTH, [20] = NORTH, [21] = NORTH, [22] = NORTH, [23] = NORTH, + [24] = SOUTH, [25] = SOUTH, [26] = SOUTH, [27] = SOUTH, [28] = NORTH, [29] = NORTH, + [30] = NORTH, [31] = NORTH, [32] = SOUTH, [33] = SOUTH, [34] = SOUTH, [35] = SOUTH, + [36] = SOUTH, [37] = SOUTH, [38] = SOUTH, [39] = SOUTH, [40] = SOUTH, [41] = SOUTH, + [42] = SOUTH, [43] = SOUTH, [44] = SOUTH, [45] = SOUTH, [46] = SOUTH, [47] = SOUTH, + [48] = SOUTH, [49] = SOUTH, [50] = SOUTH, [51] = SOUTH, [52] = SOUTH, [53] = SOUTH, + [54] = SOUTH, [55] = SOUTH, [56] = SOUTH, [57] = SOUTH, [58] = SOUTH, [59] = SOUTH, + [60] = SOUTH, [61] = SOUTH, [62] = SOUTH, [63] = SOUTH, [64] = SOUTH, [65] = SOUTH, + [66] = NORTH, [67] = NORTH, [68] = NORTH, [69] = SOUTH, [70] = SOUTH, [71] = SOUTH, + [72] = SOUTH, [73] = SOUTH, [74] = SOUTH, [75] = SOUTH, [76] = SOUTH, [77] = NORTH, + [78] = NORTH, [79] = NORTH, [80] = NORTH, [81] = NORTH, [82] = NORTH, [83] = NORTH, + [84] = NORTH, [85] = SOUTH, [86] = SOUTH, [87] = SOUTH, [88] = SOUTH, [89] = SOUTH, + [90] = SOUTH, [91] = SOUTH, [92] = NORTH, [93] = NORTH, [94] = NORTH, [95] = NORTH, + [96] = NORTH, [97] = NORTH, [98] = NORTH, [99] = NORTH, [100] = NORTH, [101] = NORTH, + [102] = NORTH, [103] = NORTH, [104] = NORTH, [105] = NORTH, [106] = NORTH, [107] = NORTH, + [108] = NORTH, [109] = NORTH, [110] = NORTH, [111] = NORTH, [112] = NORTH, [113] = NORTH, + [114] = NORTH, [115] = NORTH, [116] = NORTH, [117] = NORTH, [118] = NORTH, [119] = NORTH, + [120] = NORTH, [121] = NORTH, [122] = NORTH, [123] = NORTH, [124] = NORTH, [125] = SOUTH, + [126] = SOUTH, [127] = SOUTH, [128] = SOUTH, [129] = SOUTH, [130] = SOUTH, [131] = SOUTH, + [132] = SOUTH, [133] = WEST, [134] = WEST, [135] = WEST, [136] = WEST, [137] = WEST, + [138] = WEST, [139] = WEST, [140] = WEST, [141] = WEST, [142] = WEST, [143] = WEST, + [144] = WEST, [145] = WEST, [146] = WEST, [147] = WEST, [148] = WEST, [149] = WEST, + [150] = WEST, [151] = WEST, [152] = WEST, [153] = WEST, [154] = WEST, [155] = WEST, + [156] = WEST, [157] = WEST, [158] = WEST, [159] = WEST, [160] = WEST, [161] = WEST, + [162] = WEST, [163] = WEST, [164] = WEST, [165] = WEST, [166] = WEST, [167] = WEST, + [168] = WEST, [169] = WEST, [170] = WEST, [171] = WEST, [172] = WEST, [173] = WEST, + [174] = WEST, [175] = WEST, [176] = WEST, [177] = WEST, [178] = WEST, [179] = WEST, + [180] = 0, [181] = 0, [182] = 0, [183] = 0, +}; + +static const char *sm8250_get_function_name(struct udevice *dev, unsigned int selector) +{ + return msm_pinctrl_functions[selector].name; +} + +static const char *sm8250_get_pin_name(struct udevice *dev, unsigned int selector) +{ + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); + return pin_name; +} + +static unsigned int sm8250_get_function_mux(__maybe_unused unsigned int pin, unsigned int selector) +{ + return msm_pinctrl_functions[selector].val; +} + +static struct msm_pinctrl_data sm8250_data = { + .pin_data = { + .pin_offsets = sm8250_pin_offsets, + .pin_count = ARRAY_SIZE(sm8250_pin_offsets), + .special_pins_start = 180, + }, + .functions_count = ARRAY_SIZE(msm_pinctrl_functions), + .get_function_name = sm8250_get_function_name, + .get_function_mux = sm8250_get_function_mux, + .get_pin_name = sm8250_get_pin_name, +}; + +static const struct udevice_id msm_pinctrl_ids[] = { + { + .compatible = "qcom,sm8250-pinctrl", + .data = (ulong)&sm8250_data + }, + { /* Sentinel */ } }; + +U_BOOT_DRIVER(pinctrl_sm8250) = { + .name = "pinctrl_sm8250", + .id = UCLASS_NOP, + .of_match = msm_pinctrl_ids, + .ops = &msm_pinctrl_ops, + .bind = msm_pinctrl_bind, +}; diff --git a/drivers/pinctrl/qcom/pinctrl-sm8550.c b/drivers/pinctrl/qcom/pinctrl-sm8550.c new file mode 100644 index 00000000000..7265cb73404 --- /dev/null +++ b/drivers/pinctrl/qcom/pinctrl-sm8550.c @@ -0,0 +1,74 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm sm8550 pinctrl + * + * (C) Copyright 2024 Linaro Ltd. + * + */ + +#include <dm.h> + +#include "pinctrl-qcom.h" + +#define MAX_PIN_NAME_LEN 32 +static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); + +static const struct pinctrl_function msm_pinctrl_functions[] = { + {"qup1_se7", 1}, + {"gpio", 0}, +}; + +static const char *sm8550_get_function_name(struct udevice *dev, + unsigned int selector) +{ + return msm_pinctrl_functions[selector].name; +} + +static const char *sm8550_get_pin_name(struct udevice *dev, + unsigned int selector) +{ + static const char *special_pins_names[] = { + "ufs_reset", + "sdc2_clk", + "sdc2_cmd", + "sdc2_data", + }; + + if (selector >= 210 && selector <= 213) + snprintf(pin_name, MAX_PIN_NAME_LEN, special_pins_names[selector - 210]); + else + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); + + return pin_name; +} + +static unsigned int sm8550_get_function_mux(__maybe_unused unsigned int pin, + unsigned int selector) +{ + return msm_pinctrl_functions[selector].val; +} + +static struct msm_pinctrl_data sm8550_data = { + .pin_data = { + .pin_count = 214, + .special_pins_start = 210, + }, + .functions_count = ARRAY_SIZE(msm_pinctrl_functions), + .get_function_name = sm8550_get_function_name, + .get_function_mux = sm8550_get_function_mux, + .get_pin_name = sm8550_get_pin_name, +}; + +static const struct udevice_id msm_pinctrl_ids[] = { + { .compatible = "qcom,sm8550-tlmm", .data = (ulong)&sm8550_data }, + { /* Sentinel */ } +}; + +U_BOOT_DRIVER(pinctrl_sm8550) = { + .name = "pinctrl_sm8550", + .id = UCLASS_NOP, + .of_match = msm_pinctrl_ids, + .ops = &msm_pinctrl_ops, + .bind = msm_pinctrl_bind, +}; + diff --git a/drivers/pinctrl/qcom/pinctrl-sm8650.c b/drivers/pinctrl/qcom/pinctrl-sm8650.c new file mode 100644 index 00000000000..d6cc1bbdda8 --- /dev/null +++ b/drivers/pinctrl/qcom/pinctrl-sm8650.c @@ -0,0 +1,74 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm sm8650 pinctrl + * + * (C) Copyright 2024 Linaro Ltd. + * + */ + +#include <dm.h> + +#include "pinctrl-qcom.h" + +#define MAX_PIN_NAME_LEN 32 +static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); + +static const struct pinctrl_function msm_pinctrl_functions[] = { + {"qup2_se7", 1}, + {"gpio", 0}, +}; + +static const char *sm8650_get_function_name(struct udevice *dev, + unsigned int selector) +{ + return msm_pinctrl_functions[selector].name; +} + +static const char *sm8650_get_pin_name(struct udevice *dev, + unsigned int selector) +{ + static const char *special_pins_names[] = { + "ufs_reset", + "sdc2_clk", + "sdc2_cmd", + "sdc2_data", + }; + + if (selector >= 210 && selector <= 213) + snprintf(pin_name, MAX_PIN_NAME_LEN, special_pins_names[selector - 210]); + else + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); + + return pin_name; +} + +static unsigned int sm8650_get_function_mux(__maybe_unused unsigned int pin, + unsigned int selector) +{ + return msm_pinctrl_functions[selector].val; +} + +static struct msm_pinctrl_data sm8650_data = { + .pin_data = { + .pin_count = 214, + .special_pins_start = 210, + }, + .functions_count = ARRAY_SIZE(msm_pinctrl_functions), + .get_function_name = sm8650_get_function_name, + .get_function_mux = sm8650_get_function_mux, + .get_pin_name = sm8650_get_pin_name, +}; + +static const struct udevice_id msm_pinctrl_ids[] = { + { .compatible = "qcom,sm8650-tlmm", .data = (ulong)&sm8650_data }, + { /* Sentinel */ } +}; + +U_BOOT_DRIVER(pinctrl_sm8650) = { + .name = "pinctrl_sm8650", + .id = UCLASS_NOP, + .of_match = msm_pinctrl_ids, + .ops = &msm_pinctrl_ops, + .bind = msm_pinctrl_bind, +}; + diff --git a/drivers/power/pmic/tps65941.c b/drivers/power/pmic/tps65941.c index 727b42747ab..943d845086c 100644 --- a/drivers/power/pmic/tps65941.c +++ b/drivers/power/pmic/tps65941.c @@ -75,6 +75,10 @@ static const struct udevice_id tps65941_ids[] = { { .compatible = "ti,tps659412", .data = TPS659411 }, { .compatible = "ti,tps659413", .data = TPS659413 }, { .compatible = "ti,lp876441", .data = LP876441 }, + { .compatible = "ti,tps65224", .data = TPS65224 }, + { .compatible = "ti,tps6594-q1", .data = TPS659411 }, + { .compatible = "ti,tps6593-q1", .data = TPS659413 }, + { .compatible = "ti,lp8764-q1", .data = LP876441 }, { } }; diff --git a/drivers/power/regulator/tps65941_regulator.c b/drivers/power/regulator/tps65941_regulator.c index b0411267750..5809a53fa21 100644 --- a/drivers/power/regulator/tps65941_regulator.c +++ b/drivers/power/regulator/tps65941_regulator.c @@ -16,6 +16,38 @@ #include <power/regulator.h> #include <power/tps65941.h> +/* Single Phase Buck IDs */ +#define TPS65941_BUCK_ID_1 1 +#define TPS65941_BUCK_ID_2 2 +#define TPS65941_BUCK_ID_3 3 +#define TPS65941_BUCK_ID_4 4 +#define TPS65941_BUCK_ID_5 5 + +/* Multi Phase Buck IDs */ +#define TPS65941_BUCK_ID_12 12 +#define TPS65941_BUCK_ID_34 34 +#define TPS65941_BUCK_ID_123 123 +#define TPS65941_BUCK_ID_1234 1234 + +/* LDO IDs */ +#define TPS65941_LDO_ID_1 1 +#define TPS65941_LDO_ID_2 2 +#define TPS65941_LDO_ID_3 3 +#define TPS65941_LDO_ID_4 4 + +#define TPS65941_BUCK_CONV_OPS_IDX 0 +#define TPS65941_LDO_CONV_OPS_IDX 0 +#define TPS65224_LDO_CONV_OPS_IDX 1 +#define TPS65224_BUCK_CONV_OPS_IDX 1 + +struct tps65941_reg_conv_ops { + int volt_mask; + int (*volt2val)(int idx, int uV); + int (*val2volt)(int idx, int volt); + int slew_mask; + int (*lookup_slew)(int id); +}; + static const char tps65941_buck_ctrl[TPS65941_BUCK_NUM] = {0x4, 0x6, 0x8, 0xA, 0xC}; static const char tps65941_buck_vout[TPS65941_BUCK_NUM] = {0xE, 0x10, 0x12, @@ -25,6 +57,11 @@ static const char tps65941_ldo_ctrl[TPS65941_BUCK_NUM] = {0x1D, 0x1E, 0x1F, static const char tps65941_ldo_vout[TPS65941_BUCK_NUM] = {0x23, 0x24, 0x25, 0x26}; +static inline int tps65941_get_chip_id(struct udevice *dev) +{ + return dev->parent->driver_data; +} + static int tps65941_buck_enable(struct udevice *dev, int op, bool *enable) { int ret; @@ -60,7 +97,7 @@ static int tps65941_buck_enable(struct udevice *dev, int op, bool *enable) return 0; } -static int tps65941_buck_volt2val(int uV) +static int tps65941_buck_volt2val(__maybe_unused int idx, int uV) { if (uV > TPS65941_BUCK_VOLT_MAX) return -EINVAL; @@ -76,7 +113,7 @@ static int tps65941_buck_volt2val(int uV) return -EINVAL; } -static int tps65941_buck_val2volt(int val) +static int tps65941_buck_val2volt(__maybe_unused int idx, int val) { if (val > TPS65941_BUCK_VOLT_MAX_HEX) return -EINVAL; @@ -116,11 +153,151 @@ int tps65941_lookup_slew(int id) } } +static int tps65224_buck_volt2val(int idx, int uV) +{ + /* This functions maps a value which is in micro Volts to the VSET value. + * The mapping is as per the datasheet of TPS65224. + */ + + if (uV > TPS65224_BUCK_VOLT_MAX) + return -EINVAL; + + if (idx > 0) { + /* Buck2, Buck3 and Buck4 of TPS65224 has a different schema in + * converting b/w micro_volt and VSET hex values + * + * VSET value starts from 0x00 for 0.5V, and for every increment + * in VSET value the output voltage increases by 25mV. This is upto + * 1.15V where VSET is 0x1A. + * + * For 0x1B the output voltage is 1.2V, and for every increment of + * VSET the output voltage increases by 50mV upto the max voltage of + * 3.3V + * + * | Voltage Ranges | VSET Ranges | Voltage Step | + * +-----------------+--------------+--------------+ + * | 0.5V to 1.50V | 0x00 to 0x1A | 25mV | + * | 1.2V to 3.3V | 0x1B to 0x45 | 50mV | + */ + if (uV >= 1200000) + return (uV - 1200000) / 50000 + 0x1B; + else if (uV >= 500000) + return (uV - 500000) / 25000; + else + return -EINVAL; + } + + /* Buck1 and Buck12(dual phase) has a different mapping b/w output + * voltage and VSET value. + * + * | Voltage Ranges | VSET Ranges | Voltage Step | + * +-----------------+--------------+--------------+ + * | 0.5V to 0.58V | 0xA to 0xE | 20mV | + * | 0.6V to 1.095V | 0xF to 0x72 | 5mV | + * | 1.1V to 1.65V | 0x73 to 0xAA | 10mV | + * | 1.6V to 3.3V | 0xAB to 0xFD | 20mV | + * + */ + if (uV >= 1660000) + return (uV - 1660000) / 20000 + 0xAB; + else if (uV >= 1100000) + return (uV - 1100000) / 10000 + 0x73; + else if (uV >= 600000) + return (uV - 600000) / 5000 + 0x0F; + else if (uV >= 500000) + return (uV - 500000) / 20000 + 0x0A; + else + return -EINVAL; +} + +static int tps65224_buck_val2volt(int idx, int val) +{ + /* This function does the opposite to the tps65224_buck_volt2val function + * described above. + * This maps the VSET value to micro volts. Please refer to the ranges + * mentioned the comments of tps65224_buck_volt2val. + */ + + if (idx > 0) { + if (val > TPS65224_BUCK234_VOLT_MAX_HEX) + return -EINVAL; + else if (val >= 0x1B) + return 1200000 + (val - 0x1B) * 50000; + else if (val >= 0x00) + return 500000 + (val - 0x00) * 25000; + else + return -EINVAL; + } + + if (val > TPS65224_BUCK1_VOLT_MAX_HEX) + return -EINVAL; + else if (val >= 0xAB) + return 1660000 + (val - 0xAB) * 20000; + else if (val >= 0x73) + return 1100000 + (val - 0x73) * 10000; + else if (val >= 0xF) + return 600000 + (val - 0xF) * 5000; + else if (val >= 0xA) + return 500000 + (val - 0xA) * 20000; + else + return -EINVAL; +} + +int tps65224_lookup_slew(int id) +{ + switch (id) { + case 0: + return 10000; + case 1: + return 5000; + case 2: + return 2500; + case 3: + return 1250; + default: + return -1; + } +} + +static const struct tps65941_reg_conv_ops buck_conv_ops[] = { + [TPS65941_BUCK_CONV_OPS_IDX] = { + .volt_mask = TPS65941_BUCK_VOLT_MASK, + .volt2val = tps65941_buck_volt2val, + .val2volt = tps65941_buck_val2volt, + .slew_mask = TP65941_BUCK_CONF_SLEW_MASK, + .lookup_slew = tps65941_lookup_slew, + }, + [TPS65224_BUCK_CONV_OPS_IDX] = { + .volt_mask = TPS65941_BUCK_VOLT_MASK, + .volt2val = tps65224_buck_volt2val, + .val2volt = tps65224_buck_val2volt, + .slew_mask = TPS65224_BUCK_CONF_SLEW_MASK, + .lookup_slew = tps65224_lookup_slew, + }, +}; + static int tps65941_buck_val(struct udevice *dev, int op, int *uV) { unsigned int hex, adr; - int ret, delta, uwait, slew; + int ret, delta, uwait, slew, idx; struct dm_regulator_uclass_plat *uc_pdata; + const struct tps65941_reg_conv_ops *conv_ops; + ulong chip_id; + + idx = dev->driver_data; + chip_id = tps65941_get_chip_id(dev); + if (chip_id == TPS65224) { + /* idx is the buck id number as per devicetree node which will be same + * as the regulator name in the datasheet. + * The idx for buck1. buck2, buck3, buck4, buck12 will be 1, 2, 3, 4 + * and 12 respectively. + * In the driver the numbering is from 0. Hence the -1. + */ + idx = (idx == TPS65941_BUCK_ID_12) ? 0 : (idx - 1); + conv_ops = &buck_conv_ops[TPS65224_BUCK_CONV_OPS_IDX]; + } else { + conv_ops = &buck_conv_ops[TPS65941_BUCK_CONV_OPS_IDX]; + } uc_pdata = dev_get_uclass_plat(dev); @@ -133,8 +310,8 @@ static int tps65941_buck_val(struct udevice *dev, int op, int *uV) if (ret < 0) return ret; - ret &= TPS65941_BUCK_VOLT_MASK; - ret = tps65941_buck_val2volt(ret); + ret &= conv_ops->volt_mask; + ret = conv_ops->val2volt(idx, ret); if (ret < 0) return ret; @@ -156,14 +333,14 @@ static int tps65941_buck_val(struct udevice *dev, int op, int *uV) if (slew < 0) return ret; - slew &= TP65941_BUCK_CONF_SLEW_MASK; - slew = tps65941_lookup_slew(slew); + slew &= conv_ops->slew_mask; + slew = conv_ops->lookup_slew(slew); if (slew <= 0) return ret; uwait = delta / slew; - hex = tps65941_buck_volt2val(*uV); + hex = conv_ops->volt2val(idx, *uV); if (hex < 0) return hex; @@ -212,7 +389,7 @@ static int tps65941_ldo_enable(struct udevice *dev, int op, bool *enable) return 0; } -static int tps65941_ldo_val2volt(int val) +static int tps65941_ldo_val2volt(__maybe_unused int idx, int val) { if (val > TPS65941_LDO_VOLT_MAX_HEX || val < TPS65941_LDO_VOLT_MIN_HEX) return -EINVAL; @@ -222,11 +399,98 @@ static int tps65941_ldo_val2volt(int val) return -EINVAL; } +static int tps65224_ldo_volt2val(int idx, int uV) +{ + int base = TPS65224_LDO1_VOLT_MIN; + int max = TPS65224_LDO1_VOLT_MAX; + int offset = TPS65224_LDO1_VOLT_MIN_HEX; + int step = TPS65224_LDO_STEP; + + if (idx > 0) { + base = TPS65224_LDO23_VOLT_MIN; + max = TPS65224_LDO23_VOLT_MAX; + offset = TPS65224_LDO23_VOLT_MIN_HEX; + } + + if (uV > max) + return -EINVAL; + else if (uV >= base) + return (uV - base) / step + offset; + else + return -EINVAL; +} + +static int tps65224_ldo_val2volt(int idx, int val) +{ + int reg_base = TPS65224_LDO1_VOLT_MIN_HEX; + int reg_max = TPS65224_LDO1_VOLT_MAX_HEX; + int base = TPS65224_LDO1_VOLT_MIN; + int max = TPS65224_LDO1_VOLT_MAX; + int step = TPS65224_LDO_STEP; + /* In LDOx_VOUT reg the BIT0 is reserved and the + * vout value is stored from BIT1 to BIT7. + * Hence the below bit shit is done. + */ + int mask = TPS65224_LDO_VOLT_MASK >> 1; + + if (idx > 0) { + base = TPS65224_LDO23_VOLT_MIN; + max = TPS65224_LDO23_VOLT_MAX; + reg_base = TPS65224_LDO23_VOLT_MIN_HEX; + reg_max = TPS65224_LDO23_VOLT_MAX_HEX; + } + + /* The VSET register of LDO has its 0th bit as reserved + * hence shifting the value to right by 1 bit. + */ + val = val >> 1; + + if (val < 0 || val > mask) + return -EINVAL; + + if (val <= reg_base) + return base; + + if (val >= reg_max) + return max; + + return base + (step * (val - reg_base)); +} + +static const struct tps65941_reg_conv_ops ldo_conv_ops[] = { + [TPS65941_LDO_CONV_OPS_IDX] = { + .volt_mask = TPS65941_LDO_VOLT_MASK, + .volt2val = tps65941_buck_volt2val, + .val2volt = tps65941_ldo_val2volt, + }, + [TPS65224_LDO_CONV_OPS_IDX] = { + .volt_mask = TPS65224_LDO_VOLT_MASK, + .volt2val = tps65224_ldo_volt2val, + .val2volt = tps65224_ldo_val2volt, + }, +}; + static int tps65941_ldo_val(struct udevice *dev, int op, int *uV) { unsigned int hex, adr; - int ret; + int ret, ret_volt, idx; struct dm_regulator_uclass_plat *uc_pdata; + const struct tps65941_reg_conv_ops *conv_ops; + ulong chip_id; + + chip_id = tps65941_get_chip_id(dev); + idx = dev->driver_data; + if (chip_id == TPS65224) { + /* idx is the ldo id number as per devicetree node which will be same + * as the regulator name in the datasheet. + * The idx for ldo1, ldo2, ldo3 will be 1, 2 & 3 respectively. + * In the driver the numbering is from 0. Hence the -1. + */ + idx = idx - 1; + conv_ops = &ldo_conv_ops[TPS65224_LDO_CONV_OPS_IDX]; + } else { + conv_ops = &ldo_conv_ops[TPS65941_LDO_CONV_OPS_IDX]; + } uc_pdata = dev_get_uclass_plat(dev); @@ -239,22 +503,37 @@ static int tps65941_ldo_val(struct udevice *dev, int op, int *uV) if (ret < 0) return ret; - ret &= TPS65941_LDO_VOLT_MASK; - ret = tps65941_ldo_val2volt(ret); - if (ret < 0) - return ret; + ret &= conv_ops->volt_mask; + ret_volt = conv_ops->val2volt(idx, ret); + if (ret_volt < 0) + return ret_volt; if (op == PMIC_OP_GET) { - *uV = ret; + *uV = ret_volt; return 0; } - hex = tps65941_buck_volt2val(*uV); + /* TPS65224 LDO1 in BYPASS mode only supports 2.2V min to 3.6V max */ + if (chip_id == TPS65224 && idx == 0 && (ret & BIT(TPS65224_LDO_BYP_CONFIG)) && + *uV < TPS65224_LDO1_VOLT_BYP_MIN) + return -EINVAL; + + /* TPS65224 LDO2 & LDO3 in BYPASS mode supports 1.5V min to 5.5V max */ + if (chip_id == TPS65224 && idx > 0 && (ret & BIT(TPS65224_LDO_BYP_CONFIG)) && + *uV < TPS65224_LDO23_VOLT_BYP_MIN) + return -EINVAL; + + hex = conv_ops->volt2val(idx, *uV); if (hex < 0) return hex; - ret &= 0x0; - ret = hex; + if (chip_id == TPS65224) { + hex = hex << TPS65941_LDO_MODE_MASK; + ret &= ~TPS65224_LDO_VOLT_MASK; + ret |= hex; + } else { + ret = hex; + } ret = pmic_reg_write(dev->parent, adr, ret); @@ -265,15 +544,27 @@ static int tps65941_ldo_probe(struct udevice *dev) { struct dm_regulator_uclass_plat *uc_pdata; int idx; + ulong chip_id; + + chip_id = tps65941_get_chip_id(dev); uc_pdata = dev_get_uclass_plat(dev); uc_pdata->type = REGULATOR_TYPE_LDO; idx = dev->driver_data; - if (idx == 1 || idx == 2 || idx == 3 || idx == 4) { + switch (idx) { + case TPS65941_LDO_ID_1: + case TPS65941_LDO_ID_2: + case TPS65941_LDO_ID_3: debug("Single phase regulator\n"); - } else { - printf("Wrong ID for regulator\n"); + break; + case TPS65941_LDO_ID_4: + if (chip_id != TPS65224) { + debug("Single phase regulator\n"); + break; + } + default: + pr_err("Wrong ID for regulator\n"); return -EINVAL; } @@ -287,23 +578,51 @@ static int tps65941_buck_probe(struct udevice *dev) { struct dm_regulator_uclass_plat *uc_pdata; int idx; + ulong chip_id; + + chip_id = tps65941_get_chip_id(dev); uc_pdata = dev_get_uclass_plat(dev); uc_pdata->type = REGULATOR_TYPE_BUCK; idx = dev->driver_data; - if (idx == 1 || idx == 2 || idx == 3 || idx == 4 || idx == 5) { + switch (idx) { + case TPS65941_BUCK_ID_1: + case TPS65941_BUCK_ID_2: + case TPS65941_BUCK_ID_3: + case TPS65941_BUCK_ID_4: debug("Single phase regulator\n"); - } else if (idx == 12) { - idx = 1; - } else if (idx == 34) { - idx = 3; - } else if (idx == 123) { + break; + case TPS65941_BUCK_ID_5: + if (chip_id != TPS65224) { + debug("Single phase regulator\n"); + } else { + pr_err("Wrong ID for regulator\n"); + return -EINVAL; + } + break; + case TPS65941_BUCK_ID_12: idx = 1; - } else if (idx == 1234) { - idx = 1; - } else { - printf("Wrong ID for regulator\n"); + break; + case TPS65941_BUCK_ID_123: + case TPS65941_BUCK_ID_1234: + if (chip_id != TPS65224) { + idx = 1; + } else { + pr_err("Wrong ID for regulator\n"); + return -EINVAL; + } + break; + case TPS65941_BUCK_ID_34: + if (chip_id != TPS65224) { + idx = 3; + } else { + pr_err("Wrong ID for regulator\n"); + return -EINVAL; + } + break; + default: + pr_err("Wrong ID for regulator\n"); return -EINVAL; } diff --git a/drivers/ram/rockchip/sdram_rk3308.c b/drivers/ram/rockchip/sdram_rk3308.c index 10828e80822..264366291cf 100644 --- a/drivers/ram/rockchip/sdram_rk3308.c +++ b/drivers/ram/rockchip/sdram_rk3308.c @@ -7,8 +7,8 @@ #include <dm.h> #include <ram.h> #include <syscon.h> -#include <asm/arch/grf_rk3308.h> #include <asm/arch-rockchip/clock.h> +#include <asm/arch-rockchip/grf_rk3308.h> #include <asm/arch-rockchip/sdram.h> struct dram_info { diff --git a/drivers/reboot-mode/Kconfig b/drivers/reboot-mode/Kconfig index d57baacc93d..bb518935188 100644 --- a/drivers/reboot-mode/Kconfig +++ b/drivers/reboot-mode/Kconfig @@ -24,6 +24,7 @@ config DM_REBOOT_MODE_GPIO config DM_REBOOT_MODE_RTC bool "Use RTC as reboot mode backend" + depends on DM_RTC depends on DM_REBOOT_MODE help Use RTC non volatile memory to control the reboot mode. This will allow users to boot diff --git a/drivers/rng/stm32_rng.c b/drivers/rng/stm32_rng.c index 61d5ed61582..44e8a460752 100644 --- a/drivers/rng/stm32_rng.c +++ b/drivers/rng/stm32_rng.c @@ -74,7 +74,7 @@ struct stm32_rng_plat { * Extracts from the STM32 RNG specification when RNG supports CONDRST. * * When a noise source (or seed) error occurs, the RNG stops generating - * random numbers and sets to “1” both SEIS and SECS bits to indicate + * random numbers and sets to "1" both SEIS and SECS bits to indicate * that a seed error occurred. (...) * * 1. Software reset by writing CONDRST at 1 and at 0 (see bitfield @@ -127,12 +127,12 @@ static int stm32_rng_conceal_seed_error_cond_reset(struct stm32_rng_plat *pdata) * Extracts from the STM32 RNG specification, when CONDRST is not supported * * When a noise source (or seed) error occurs, the RNG stops generating - * random numbers and sets to “1” both SEIS and SECS bits to indicate + * random numbers and sets to "1" both SEIS and SECS bits to indicate * that a seed error occurred. (...) * * The following sequence shall be used to fully recover from a seed * error after the RNG initialization: - * 1. Clear the SEIS bit by writing it to “0”. + * 1. Clear the SEIS bit by writing it to "0". * 2. Read out 12 words from the RNG_DR register, and discard each of * them in order to clean the pipeline. * 3. Confirm that SEIS is still cleared. Random number generation is diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 8b19e2684e5..1fe4607598e 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -321,7 +321,7 @@ config DEBUG_UART_S5P config DEBUG_UART_MSM bool "Qualcomm QUP UART debug" - depends on ARCH_SNAPDRAGON + depends on ARCH_SNAPDRAGON || ARCH_IPQ40XX help Select this to enable a debug UART using the serial_msm driver. You will need to provide parameters to make this work. The driver will diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c index ac4280c6c4c..a472e0b3683 100644 --- a/drivers/serial/serial_msm.c +++ b/drivers/serial/serial_msm.c @@ -32,6 +32,16 @@ #define UARTDM_RXFS_BUF_MASK 0x7 #define UARTDM_MR1 0x00 #define UARTDM_MR2 0x04 +/* + * This is documented on page 1817 of the apq8016e technical reference manual. + * section 6.2.5.3.26 + * + * The upper nybble contains the bit clock divider for the RX pin, the lower + * nybble defines the TX pin. In almost all cases these should be the same value. + * + * The baud rate is the core clock frequency divided by the fixed divider value + * programmed into this register (defined in calc_csr_bitrate()). + */ #define UARTDM_CSR 0xA0 #define UARTDM_SR 0xA4 /* Status register */ @@ -53,10 +63,10 @@ #define UARTDM_TF 0x100 /* UART Transmit FIFO register */ #define UARTDM_RF 0x140 /* UART Receive FIFO register */ -#define UART_DM_CLK_RX_TX_BIT_RATE 0xCC -#define MSM_BOOT_UART_DM_8_N_1_MODE 0x34 -#define MSM_BOOT_UART_DM_CMD_RESET_RX 0x10 -#define MSM_BOOT_UART_DM_CMD_RESET_TX 0x20 +#define MSM_BOOT_UART_DM_8_N_1_MODE 0x34 +#define MSM_BOOT_UART_DM_CMD_RESET_RX 0x10 +#define MSM_BOOT_UART_DM_CMD_RESET_TX 0x20 +#define MSM_UART_MR1_RX_RDY_CTL BIT(7) DECLARE_GLOBAL_DATA_PTR; @@ -64,7 +74,7 @@ struct msm_serial_data { phys_addr_t base; unsigned chars_cnt; /* number of buffered chars */ uint32_t chars_buf; /* buffered chars */ - uint32_t clk_bit_rate; /* data mover mode bit rate register value */ + uint32_t clk_rate; /* core clock rate */ }; static int msm_serial_fetch(struct udevice *dev) @@ -156,33 +166,63 @@ static const struct dm_serial_ops msm_serial_ops = { .getc = msm_serial_getc, }; -static int msm_uart_clk_init(struct udevice *dev) +static long msm_uart_clk_init(struct udevice *dev) { - uint clk_rate = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), - "clock-frequency", 115200); + struct msm_serial_data *priv = dev_get_priv(dev); struct clk clk; int ret; + long rate; ret = clk_get_by_name(dev, "core", &clk); if (ret < 0) { pr_warn("%s: Failed to get clock: %d\n", __func__, ret); - return ret; + return 0; } - ret = clk_set_rate(&clk, clk_rate); - if (ret < 0) - return ret; + rate = clk_set_rate(&clk, priv->clk_rate); - return 0; + return rate; +} + +static int calc_csr_bitrate(struct msm_serial_data *priv) +{ + /* This table is from the TRE. See the definition of UARTDM_CSR */ + unsigned int csr_div_table[] = {24576, 12288, 6144, 3072, 1536, 768, 512, 384, + 256, 192, 128, 96, 64, 48, 32, 16}; + int i = ARRAY_SIZE(csr_div_table) - 1; + /* Currently we only support one baudrate */ + int baud = 115200; + + for (; i >= 0; i--) { + int x = priv->clk_rate / csr_div_table[i]; + + if (x == baud) + /* Duplicate the configuration for RX + * as the lower nybble only configures TX + */ + return i + (i << 4); + } + + return -EINVAL; } static void uart_dm_init(struct msm_serial_data *priv) { /* Delay initialization for a bit to let pins stabilize if necessary */ mdelay(5); + int bitrate = calc_csr_bitrate(priv); + if (bitrate < 0) { + log_warning("Couldn't calculate bit clock divider! Using default\n"); + /* This happens to be the value used on MSM8916 for the hardcoded clockrate + * in clock-apq8016. It's at least a better guess than a value we *know* + * is wrong... + */ + bitrate = 0xCC; + } - writel(priv->clk_bit_rate, priv->base + UARTDM_CSR); - writel(0x0, priv->base + UARTDM_MR1); + writel(bitrate, priv->base + UARTDM_CSR); + /* Enable RS232 flow control to support RS232 db9 connector */ + writel(MSM_UART_MR1_RX_RDY_CTL, priv->base + UARTDM_MR1); writel(MSM_BOOT_UART_DM_8_N_1_MODE, priv->base + UARTDM_MR2); writel(MSM_BOOT_UART_DM_CMD_RESET_RX, priv->base + UARTDM_CR); writel(MSM_BOOT_UART_DM_CMD_RESET_TX, priv->base + UARTDM_CR); @@ -192,16 +232,25 @@ static void uart_dm_init(struct msm_serial_data *priv) } static int msm_serial_probe(struct udevice *dev) { - int ret; struct msm_serial_data *priv = dev_get_priv(dev); + long rate; /* No need to reinitialize the UART after relocation */ if (gd->flags & GD_FLG_RELOC) return 0; - ret = msm_uart_clk_init(dev); - if (ret) - return ret; + rate = msm_uart_clk_init(dev); + if (rate < 0) + return rate; + if (!rate) { + log_err("Got core clock rate of 0... Please fix your clock driver\n"); + return -EINVAL; + } + + /* Update the clock rate to the actual programmed rate returned by the + * clock driver + */ + priv->clk_rate = rate; uart_dm_init(priv); @@ -211,13 +260,18 @@ static int msm_serial_probe(struct udevice *dev) static int msm_serial_of_to_plat(struct udevice *dev) { struct msm_serial_data *priv = dev_get_priv(dev); + int ret; priv->base = dev_read_addr(dev); if (priv->base == FDT_ADDR_T_NONE) return -EINVAL; - priv->clk_bit_rate = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), - "bit-rate", UART_DM_CLK_RX_TX_BIT_RATE); + ret = dev_read_u32(dev, "clock-frequency", &priv->clk_rate); + if (ret < 0) { + log_debug("No clock frequency specified, using default rate\n"); + /* Default for APQ8016 */ + priv->clk_rate = 7372800; + } return 0; } @@ -242,18 +296,23 @@ U_BOOT_DRIVER(serial_msm) = { static struct msm_serial_data init_serial_data = { .base = CONFIG_VAL(DEBUG_UART_BASE), - .clk_rate = 7372800, + .clk_rate = CONFIG_VAL(DEBUG_UART_CLOCK), }; #include <debug_uart.h> /* Uncomment to turn on UART clocks when debugging U-Boot as aboot on MSM8916 */ -//int apq8016_clk_init_uart(phys_addr_t gcc_base); +//int apq8016_clk_init_uart(phys_addr_t gcc_base, unsigned long id); static inline void _debug_uart_init(void) { - /* Uncomment to turn on UART clocks when debugging U-Boot as aboot on MSM8916 */ - //apq8016_clk_init_uart(0x1800000); + /* + * Uncomment to turn on UART clocks when debugging U-Boot as aboot + * on MSM8916. Supported debug UART clock IDs: + * - db410c: GCC_BLSP1_UART2_APPS_CLK + * - HMIBSC: GCC_BLSP1_UART1_APPS_CLK + */ + //apq8016_clk_init_uart(0x1800000, <uart_clk_id>); uart_dm_init(&init_serial_data); } diff --git a/drivers/soc/ti/k3-navss-ringacc.c b/drivers/soc/ti/k3-navss-ringacc.c index 7a2fbb0db6e..ed39ff2fa4c 100644 --- a/drivers/soc/ti/k3-navss-ringacc.c +++ b/drivers/soc/ti/k3-navss-ringacc.c @@ -418,7 +418,7 @@ void k3_nav_ringacc_ring_reset_dma(struct k3_nav_ring *ring, u32 occ) k3_ringacc_ring_reconfig_qmode_sci( ring, K3_NAV_RINGACC_RING_MODE_RING); /* - * 4. Ring the doorbell 2**22 – ringOcc times. + * 4. Ring the doorbell 2**22 - ringOcc times. * This will wrap the internal UDMAP ring state occupancy * counter (which is 21-bits wide) to 0. */ diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 69b184b0d9e..612434633b3 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -262,7 +262,7 @@ config MESON_SPIFC_A1 config MPC8XX_SPI bool "MPC8XX SPI Driver" - depends on MPC8xx + depends on MPC8xx && DM_GPIO help Enable support for SPI on MPC8XX diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c index 5c8d7609351..e1448cc6196 100644 --- a/drivers/spi/mpc8xx_spi.c +++ b/drivers/spi/mpc8xx_spi.c @@ -18,6 +18,7 @@ #include <common.h> #include <dm.h> +#include <malloc.h> #include <mpc8xx.h> #include <spi.h> #include <linux/delay.h> @@ -29,7 +30,8 @@ #define CPM_SPI_BASE_RX CPM_SPI_BASE #define CPM_SPI_BASE_TX (CPM_SPI_BASE + sizeof(cbd_t)) -#define MAX_BUFFER 0x104 +#define MAX_BUFFER 0x8000 /* Max possible is 0xffff. We want power of 2 */ +#define MIN_HWORD_XFER 64 /* Minimum size for 16 bits transfer */ struct mpc8xx_priv { spi_t __iomem *spi; @@ -37,6 +39,8 @@ struct mpc8xx_priv { int max_cs; }; +static char dummy_buffer[MAX_BUFFER]; + static int mpc8xx_spi_set_mode(struct udevice *dev, uint mod) { return 0; @@ -44,6 +48,21 @@ static int mpc8xx_spi_set_mode(struct udevice *dev, uint mod) static int mpc8xx_spi_set_speed(struct udevice *dev, uint speed) { + immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR; + cpm8xx_t __iomem *cp = &immr->im_cpm; + u8 pm = (gd->arch.brg_clk - 1) / (speed * 16); + + if (pm > 16) { + setbits_be16(&cp->cp_spmode, SPMODE_DIV16); + pm /= 16; + if (pm > 16) + pm = 16; + } else { + clrbits_be16(&cp->cp_spmode, SPMODE_DIV16); + } + + clrsetbits_be16(&cp->cp_spmode, SPMODE_PM(0xf), SPMODE_PM(pm)); + return 0; } @@ -101,10 +120,6 @@ static int mpc8xx_spi_probe(struct udevice *dev) while (in_be16(&cp->cp_cpcr) & CPM_CR_FLG) ; -/* 5 */ - /* Set SDMA configuration register */ - out_be32(&immr->im_siu_conf.sc_sdcr, 0x0001); - /* 6 */ /* Set to big endian. */ out_8(&spi->spi_tfcr, SMC_EB); @@ -145,37 +160,52 @@ static void mpc8xx_spi_cs_deactivate(struct udevice *dev) dm_gpio_set_value(&priv->gpios[platdata->cs], 0); } -static int mpc8xx_spi_xfer(struct udevice *dev, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) +static int mpc8xx_spi_xfer_one(struct udevice *dev, size_t count, + const void *dout, void *din) { immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR; cpm8xx_t __iomem *cp = &immr->im_cpm; cbd_t __iomem *tbdf, *rbdf; + void *bufout, *bufin; + u16 spmode_len; int tm; - size_t count = (bitlen + 7) / 8; - - if (count > MAX_BUFFER) - return -EINVAL; tbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_TX]; rbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_RX]; - /* Set CS for device */ - if (flags & SPI_XFER_BEGIN) - mpc8xx_spi_cs_activate(dev); + if (!(count & 1) && count >= MIN_HWORD_XFER) { + spmode_len = SPMODE_LEN(16); + if (dout) { + int i; + + bufout = malloc(count); + for (i = 0; i < count; i += 2) + *(u16 *)(bufout + i) = swab16(*(u16 *)(dout + i)); + } else { + bufout = NULL; + } + if (din) + bufin = malloc(count); + else + bufin = NULL; + } else { + spmode_len = SPMODE_LEN(8); + bufout = (void *)dout; + bufin = din; + } /* Setting tx bd status and data length */ - out_be32(&tbdf->cbd_bufaddr, (ulong)dout); + out_be32(&tbdf->cbd_bufaddr, bufout ? (ulong)bufout : (ulong)dummy_buffer); out_be16(&tbdf->cbd_sc, BD_SC_READY | BD_SC_LAST | BD_SC_WRAP); out_be16(&tbdf->cbd_datlen, count); /* Setting rx bd status and data length */ - out_be32(&rbdf->cbd_bufaddr, (ulong)din); + out_be32(&rbdf->cbd_bufaddr, bufin ? (ulong)bufin : (ulong)dummy_buffer); out_be16(&rbdf->cbd_sc, BD_SC_EMPTY | BD_SC_WRAP); out_be16(&rbdf->cbd_datlen, 0); /* rx length has no significance */ - clrsetbits_be16(&cp->cp_spmode, ~SPMODE_LOOP, SPMODE_REV | SPMODE_MSTR | - SPMODE_EN | SPMODE_LEN(8) | SPMODE_PM(0x8)); + clrsetbits_be16(&cp->cp_spmode, ~(SPMODE_LOOP | SPMODE_PM(0xf) | SPMODE_DIV16), + SPMODE_REV | SPMODE_MSTR | SPMODE_EN | spmode_len); out_8(&cp->cp_spim, 0); /* Mask all SPI events */ out_8(&cp->cp_spie, SPI_EMASK); /* Clear all SPI events */ @@ -196,13 +226,56 @@ static int mpc8xx_spi_xfer(struct udevice *dev, unsigned int bitlen, } if (tm >= 1000) - printf("*** spi_xfer: Time out while xferring to/from SPI!\n"); + return -ETIMEDOUT; + + if (!(count & 1) && count > MIN_HWORD_XFER) { + if (dout) + free(bufout); + if (din) { + int i; + + bufout = malloc(count); + for (i = 0; i < count; i += 2) + *(u16 *)(din + i) = swab16(*(u16 *)(bufin + i)); + free(bufin); + } + } + + return 0; +} + +static int mpc8xx_spi_xfer(struct udevice *dev, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + size_t count = (bitlen + 7) / 8; + size_t offset = 0; + int ret = 0; + + if (!din && !dout) + return -EINVAL; + + /* Set CS for device */ + if (flags & SPI_XFER_BEGIN) + mpc8xx_spi_cs_activate(dev); + + while (count > 0 && !ret) { + size_t chunk = min(count, (size_t)MAX_BUFFER); + const void *out = dout ? dout + offset : NULL; + void *in = din ? din + offset : NULL; + + ret = mpc8xx_spi_xfer_one(dev, chunk, out, in); + offset += chunk; + count -= chunk; + } /* Clear CS for device */ if (flags & SPI_XFER_END) mpc8xx_spi_cs_deactivate(dev); - return 0; + if (ret) + printf("*** spi_xfer: Time out while xferring to/from SPI!\n"); + + return ret; } static int mpc8xx_spi_ofdata_to_platdata(struct udevice *dev) diff --git a/drivers/spmi/spmi-msm.c b/drivers/spmi/spmi-msm.c index 5fe8a70abca..244de69b359 100644 --- a/drivers/spmi/spmi-msm.c +++ b/drivers/spmi/spmi-msm.c @@ -23,13 +23,19 @@ DECLARE_GLOBAL_DATA_PTR; #define PMIC_ARB_VERSION_V2_MIN 0x20010000 #define PMIC_ARB_VERSION_V3_MIN 0x30000000 #define PMIC_ARB_VERSION_V5_MIN 0x50000000 +#define PMIC_ARB_VERSION_V7_MIN 0x70000000 #define APID_MAP_OFFSET_V1_V2_V3 (0x800) #define APID_MAP_OFFSET_V5 (0x900) +#define APID_MAP_OFFSET_V7 (0x2000) #define ARB_CHANNEL_OFFSET(n) (0x4 * (n)) #define SPMI_CH_OFFSET(chnl) ((chnl) * 0x8000) #define SPMI_V5_OBS_CH_OFFSET(chnl) ((chnl) * 0x80) +#define SPMI_V7_OBS_CH_OFFSET(chnl) ((chnl) * 0x20) #define SPMI_V5_RW_CH_OFFSET(chnl) ((chnl) * 0x10000) +#define SPMI_V7_RW_CH_OFFSET(chnl) ((chnl) * 0x1000) + +#define SPMI_OWNERSHIP_PERIPH2OWNER(x) ((x) & 0x7) #define SPMI_REG_CMD0 0x0 #define SPMI_REG_CONFIG 0x4 @@ -49,14 +55,20 @@ DECLARE_GLOBAL_DATA_PTR; #define SPMI_STATUS_DONE 0x1 #define SPMI_MAX_CHANNELS 128 +#define SPMI_MAX_CHANNELS_V5 512 +#define SPMI_MAX_CHANNELS_V7 1024 #define SPMI_MAX_SLAVES 16 #define SPMI_MAX_PERIPH 256 +#define SPMI_CHANNEL_READ_ONLY BIT(31) +#define SPMI_CHANNEL_MASK 0xffff + enum arb_ver { V1 = 1, V2, V3, - V5 = 5 + V5 = 5, + V7 = 7 }; /* @@ -72,12 +84,25 @@ struct msm_spmi_priv { phys_addr_t arb_chnl; /* ARB channel mapping base */ phys_addr_t spmi_chnls; /* SPMI channels */ phys_addr_t spmi_obs; /* SPMI observer */ + phys_addr_t spmi_cnfg; /* SPMI config */ + u32 owner; /* Current owner */ + unsigned int max_channels; /* Max channels */ /* SPMI channel map */ - uint8_t channel_map[SPMI_MAX_SLAVES][SPMI_MAX_PERIPH]; + uint32_t channel_map[SPMI_MAX_SLAVES][SPMI_MAX_PERIPH]; /* SPMI bus arbiter version */ u32 arb_ver; }; +static u32 pmic_arb_fmt_cmd_v1(u8 opc, u8 sid, u8 pid, u8 off) +{ + return (opc << 27) | (sid << 20) | (pid << 12) | (off << 4) | 1; +} + +static u32 pmic_arb_fmt_cmd_v2(u8 opc, u8 off) +{ + return (opc << 27) | (off << 4) | 1; +} + static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off, uint8_t val) { @@ -90,35 +115,53 @@ static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off, return -EIO; if (pid >= SPMI_MAX_PERIPH) return -EIO; + if (priv->channel_map[usid][pid] & SPMI_CHANNEL_READ_ONLY) + return -EPERM; - channel = priv->channel_map[usid][pid]; + channel = priv->channel_map[usid][pid] & SPMI_CHANNEL_MASK; - /* Disable IRQ mode for the current channel*/ - writel(0x0, - priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_CONFIG); + dev_dbg(dev, "[%d:%d] %s: channel %d\n", usid, pid, __func__, channel); - /* Write single byte */ - writel(val, priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_WDATA); + switch (priv->arb_ver) { + case V1: + ch_offset = SPMI_CH_OFFSET(channel); - /* Prepare write command */ - reg |= SPMI_CMD_EXT_REG_WRITE_LONG << SPMI_CMD_OPCODE_SHIFT; - reg |= (usid << SPMI_CMD_SLAVE_ID_SHIFT); - reg |= (pid << SPMI_CMD_ADDR_SHIFT); - reg |= (off << SPMI_CMD_ADDR_OFFSET_SHIFT); - reg |= 1; /* byte count */ + reg = pmic_arb_fmt_cmd_v1(SPMI_CMD_EXT_REG_WRITE_LONG, + usid, pid, off); + break; - if (priv->arb_ver == V5) - ch_offset = SPMI_V5_RW_CH_OFFSET(channel); - else + case V2: ch_offset = SPMI_CH_OFFSET(channel); + reg = pmic_arb_fmt_cmd_v2(SPMI_CMD_EXT_REG_WRITE_LONG, off); + break; + + case V5: + ch_offset = SPMI_V5_RW_CH_OFFSET(channel); + + reg = pmic_arb_fmt_cmd_v2(SPMI_CMD_EXT_REG_WRITE_LONG, off); + break; + + case V7: + ch_offset = SPMI_V7_RW_CH_OFFSET(channel); + + reg = pmic_arb_fmt_cmd_v2(SPMI_CMD_EXT_REG_WRITE_LONG, off); + break; + } + + /* Disable IRQ mode for the current channel*/ + writel(0x0, priv->spmi_chnls + ch_offset + SPMI_REG_CONFIG); + + /* Write single byte */ + writel(val, priv->spmi_chnls + ch_offset + SPMI_REG_WDATA); + /* Send write command */ - writel(reg, priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_CMD0); + writel(reg, priv->spmi_chnls + ch_offset + SPMI_REG_CMD0); /* Wait till CMD DONE status */ reg = 0; while (!reg) { - reg = readl(priv->spmi_chnls + SPMI_CH_OFFSET(channel) + + reg = readl(priv->spmi_chnls + ch_offset + SPMI_REG_STATUS); } @@ -142,23 +185,44 @@ static int msm_spmi_read(struct udevice *dev, int usid, int pid, int off) if (pid >= SPMI_MAX_PERIPH) return -EIO; - channel = priv->channel_map[usid][pid]; + channel = priv->channel_map[usid][pid] & SPMI_CHANNEL_MASK; - if (priv->arb_ver == V5) - ch_offset = SPMI_V5_OBS_CH_OFFSET(channel); - else + dev_dbg(dev, "[%d:%d] %s: channel %d\n", usid, pid, __func__, channel); + + switch (priv->arb_ver) { + case V1: ch_offset = SPMI_CH_OFFSET(channel); + /* Prepare read command */ + reg = pmic_arb_fmt_cmd_v1(SPMI_CMD_EXT_REG_READ_LONG, + usid, pid, off); + break; + + case V2: + ch_offset = SPMI_CH_OFFSET(channel); + + /* Prepare read command */ + reg = pmic_arb_fmt_cmd_v2(SPMI_CMD_EXT_REG_READ_LONG, off); + break; + + case V5: + ch_offset = SPMI_V5_OBS_CH_OFFSET(channel); + + /* Prepare read command */ + reg = pmic_arb_fmt_cmd_v2(SPMI_CMD_EXT_REG_READ_LONG, off); + break; + + case V7: + ch_offset = SPMI_V7_OBS_CH_OFFSET(channel); + + /* Prepare read command */ + reg = pmic_arb_fmt_cmd_v2(SPMI_CMD_EXT_REG_READ_LONG, off); + break; + } + /* Disable IRQ mode for the current channel*/ writel(0x0, priv->spmi_obs + ch_offset + SPMI_REG_CONFIG); - /* Prepare read command */ - reg |= SPMI_CMD_EXT_REG_READ_LONG << SPMI_CMD_OPCODE_SHIFT; - reg |= (usid << SPMI_CMD_SLAVE_ID_SHIFT); - reg |= (pid << SPMI_CMD_ADDR_SHIFT); - reg |= (off << SPMI_CMD_ADDR_OFFSET_SHIFT); - reg |= 1; /* byte count */ - /* Request read */ writel(reg, priv->spmi_obs + ch_offset + SPMI_REG_CMD0); @@ -193,18 +257,29 @@ static int msm_spmi_probe(struct udevice *dev) core_addr = dev_read_addr_name(dev, "core"); priv->spmi_chnls = dev_read_addr_name(dev, "chnls"); priv->spmi_obs = dev_read_addr_name(dev, "obsrvr"); + dev_read_u32(dev, "qcom,ee", &priv->owner); hw_ver = readl(core_addr + PMIC_ARB_VERSION); if (hw_ver < PMIC_ARB_VERSION_V3_MIN) { priv->arb_ver = V2; priv->arb_chnl = core_addr + APID_MAP_OFFSET_V1_V2_V3; + priv->max_channels = SPMI_MAX_CHANNELS; } else if (hw_ver < PMIC_ARB_VERSION_V5_MIN) { priv->arb_ver = V3; priv->arb_chnl = core_addr + APID_MAP_OFFSET_V1_V2_V3; - } else { + priv->max_channels = SPMI_MAX_CHANNELS; + } else if (hw_ver < PMIC_ARB_VERSION_V7_MIN) { priv->arb_ver = V5; priv->arb_chnl = core_addr + APID_MAP_OFFSET_V5; + priv->max_channels = SPMI_MAX_CHANNELS; + priv->spmi_cnfg = dev_read_addr_name(dev, "cnfg"); + } else { + /* TOFIX: handle second bus */ + priv->arb_ver = V7; + priv->arb_chnl = core_addr + APID_MAP_OFFSET_V7; + priv->max_channels = SPMI_MAX_CHANNELS_V7; + priv->spmi_cnfg = dev_read_addr_name(dev, "cnfg"); } dev_dbg(dev, "PMIC Arb Version-%d (%#x)\n", hw_ver >> 28, hw_ver); @@ -218,12 +293,21 @@ static int msm_spmi_probe(struct udevice *dev) dev_dbg(dev, "priv->spmi_chnls address (%#08llx)\n", priv->spmi_chnls); dev_dbg(dev, "priv->spmi_obs address (%#08llx)\n", priv->spmi_obs); /* Scan peripherals connected to each SPMI channel */ - for (i = 0; i < SPMI_MAX_PERIPH; i++) { + for (i = 0; i < priv->max_channels; i++) { uint32_t periph = readl(priv->arb_chnl + ARB_CHANNEL_OFFSET(i)); uint8_t slave_id = (periph & 0xf0000) >> 16; uint8_t pid = (periph & 0xff00) >> 8; priv->channel_map[slave_id][pid] = i; + + /* Mark channels read-only when from different owner */ + if (priv->arb_ver == V5 || priv->arb_ver == V7) { + uint32_t cnfg = readl(priv->spmi_cnfg + ARB_CHANNEL_OFFSET(i)); + uint8_t owner = SPMI_OWNERSHIP_PERIPH2OWNER(cnfg); + + if (owner != priv->owner) + priv->channel_map[slave_id][pid] |= SPMI_CHANNEL_READ_ONLY; + } } return 0; } diff --git a/drivers/tee/broadcom/chimp_optee.c b/drivers/tee/broadcom/chimp_optee.c index 37f9b094f76..bd146ef2899 100644 --- a/drivers/tee/broadcom/chimp_optee.c +++ b/drivers/tee/broadcom/chimp_optee.c @@ -3,9 +3,10 @@ * Copyright 2020 Broadcom. */ -#include <common.h> #include <tee.h> #include <broadcom/chimp.h> +#include <linux/errno.h> +#include <string.h> #ifdef CONFIG_CHIMP_OPTEE diff --git a/drivers/tee/optee/Kconfig b/drivers/tee/optee/Kconfig index 9dc65b0501e..db0bcfa6f15 100644 --- a/drivers/tee/optee/Kconfig +++ b/drivers/tee/optee/Kconfig @@ -19,7 +19,7 @@ config OPTEE_TA_AVB default y help Enables support for the AVB Trusted Application (TA) in OP-TEE. - The TA can support the "avb" subcommands "read_rb", "write"rb" + The TA can support the "avb" subcommands "read_rb", "write_rb" and "is_unlocked". config OPTEE_TA_RPC_TEST diff --git a/drivers/tee/optee/core.c b/drivers/tee/optee/core.c index 47f845cffe3..5fc0505c788 100644 --- a/drivers/tee/optee/core.c +++ b/drivers/tee/optee/core.c @@ -3,7 +3,6 @@ * Copyright (c) 2018-2020 Linaro Limited */ -#include <common.h> #include <cpu_func.h> #include <dm.h> #include <dm/device_compat.h> diff --git a/drivers/tee/optee/i2c.c b/drivers/tee/optee/i2c.c index ef4e10f9912..e3fb99897c5 100644 --- a/drivers/tee/optee/i2c.c +++ b/drivers/tee/optee/i2c.c @@ -3,7 +3,6 @@ * Copyright (c) 2020 Foundries.io Ltd */ -#include <common.h> #include <dm.h> #include <i2c.h> #include <tee.h> diff --git a/drivers/tee/optee/rpmb.c b/drivers/tee/optee/rpmb.c index 5bc13757ea8..bacced6af6c 100644 --- a/drivers/tee/optee/rpmb.c +++ b/drivers/tee/optee/rpmb.c @@ -3,7 +3,6 @@ * Copyright (c) 2018 Linaro Limited */ -#include <common.h> #include <dm.h> #include <log.h> #include <tee.h> diff --git a/drivers/tee/optee/supplicant.c b/drivers/tee/optee/supplicant.c index f9dd874b594..8a426f53ba8 100644 --- a/drivers/tee/optee/supplicant.c +++ b/drivers/tee/optee/supplicant.c @@ -3,10 +3,10 @@ * Copyright (c) 2018, Linaro Limited */ -#include <common.h> #include <log.h> #include <malloc.h> #include <tee.h> +#include <linux/errno.h> #include <linux/types.h> #include "optee_msg.h" diff --git a/drivers/tee/sandbox.c b/drivers/tee/sandbox.c index ec66401878c..86b16a3bb8d 100644 --- a/drivers/tee/sandbox.c +++ b/drivers/tee/sandbox.c @@ -2,7 +2,7 @@ /* * Copyright (C) 2018 Linaro Limited */ -#include <common.h> + #include <dm.h> #include <sandboxtee.h> #include <tee.h> @@ -174,7 +174,7 @@ static u32 ta_avb_invoke_func(struct udevice *dev, u32 func, uint num_params, uint slot; u64 val; char *value; - u32 value_sz; + u32 value_sz, tmp_sz; switch (func) { case TA_AVB_CMD_READ_ROLLBACK_INDEX: @@ -267,8 +267,12 @@ static u32 ta_avb_invoke_func(struct udevice *dev, u32 func, uint num_params, if (!ep) return TEE_ERROR_ITEM_NOT_FOUND; - value_sz = strlen(ep->data) + 1; - memcpy(value, ep->data, value_sz); + tmp_sz = strlen(ep->data) + 1; + if (value_sz < tmp_sz) + return TEE_ERROR_SHORT_BUFFER; + + memcpy(value, ep->data, tmp_sz); + params[1].u.memref.size = tmp_sz; return TEE_SUCCESS; case TA_AVB_CMD_WRITE_PERSIST_VALUE: diff --git a/drivers/tee/tee-uclass.c b/drivers/tee/tee-uclass.c index 52412a4098e..0194d732193 100644 --- a/drivers/tee/tee-uclass.c +++ b/drivers/tee/tee-uclass.c @@ -5,7 +5,6 @@ #define LOG_CATEGORY UCLASS_TEE -#include <common.h> #include <cpu_func.h> #include <dm.h> #include <log.h> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index 681b621760d..440eb64a566 100644 --- a/drivers/thermal/Kconfig +++ b/drivers/thermal/Kconfig @@ -41,4 +41,10 @@ config TI_DRA7_THERMAL Enable thermal support for for the Texas Instruments DRA752 SoC family. The driver supports reading CPU temperature. +config TI_LM74_THERMAL + bool "Temperature sensor driver for TI LM74 chip" + help + Enable thermal support for the Texas Instruments LM74 chip. + The driver supports reading CPU temperature. + endif # if DM_THERMAL diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile index 8acc7d20cb9..b5ab0fc221f 100644 --- a/drivers/thermal/Makefile +++ b/drivers/thermal/Makefile @@ -9,3 +9,4 @@ obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o obj-$(CONFIG_IMX_SCU_THERMAL) += imx_scu_thermal.o obj-$(CONFIG_TI_DRA7_THERMAL) += ti-bandgap.o obj-$(CONFIG_IMX_TMU) += imx_tmu.o +obj-$(CONFIG_TI_LM74_THERMAL) += ti-lm74.o diff --git a/drivers/thermal/thermal_sandbox.c b/drivers/thermal/thermal_sandbox.c index acc364feb03..7dc0d108b8c 100644 --- a/drivers/thermal/thermal_sandbox.c +++ b/drivers/thermal/thermal_sandbox.c @@ -12,7 +12,7 @@ int sandbox_thermal_get_temp(struct udevice *dev, int *temp) { - /* Simply return 100°C */ + /* Simply return 100 deg C */ *temp = 100; return 0; diff --git a/drivers/thermal/ti-lm74.c b/drivers/thermal/ti-lm74.c new file mode 100644 index 00000000000..7d56f75df06 --- /dev/null +++ b/drivers/thermal/ti-lm74.c @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * TI LM74 temperature sensor driver + * + * Copyright (C) 2024 CS GROUP France + * + */ + +#include <dm.h> +#include <thermal.h> +#include <spi.h> + +static int ti_lm74_get_temp(struct udevice *dev, int *temp) +{ + char buf[2]; + s16 raw; + int ret; + + ret = dm_spi_claim_bus(dev); + if (ret) + return ret; + + ret = dm_spi_xfer(dev, 16, NULL, buf, SPI_XFER_BEGIN | SPI_XFER_END); + + dm_spi_release_bus(dev); + if (ret) + return ret; + + raw = ((buf[0] << 8) + buf[1]) >> 3; + + *temp = (((int)raw * 125) + 1000) / 2000; + + return 0; +} + +static struct dm_thermal_ops ti_lm74_ops = { + .get_temp = ti_lm74_get_temp, +}; + +static const struct udevice_id of_ti_lm74_match[] = { + { + .compatible = "ti,lm74", + }, + {}, +}; + +U_BOOT_DRIVER(ti_bandgap_thermal) = { + .name = "ti_lm74_thermal", + .id = UCLASS_THERMAL, + .ops = &ti_lm74_ops, + .of_match = of_ti_lm74_match, +}; diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index 91f082fe05e..778b01b22ea 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -506,6 +506,16 @@ static int musb_usb_remove(struct udevice *dev) return 0; } +/* + * The Linux driver has a config struct, its fields mapping to this driver + * like this: + * .hdrc_config: + * sunxi_musb_hdrc_config_5eps => musb_config + * sunxi_musb_hdrc_config_4eps => musb_config_h3 + * .has_sram: always enabled, ideally no-op on SoCs not using it + * .has_reset: automatically detected from DT + * .no_configdata: handled via Kconfig's CONFIG_USB_MUSB_FIXED_CONFIGDATA + */ static const struct sunxi_musb_config sun4i_a10_cfg = { .config = &musb_config, }; @@ -518,6 +528,10 @@ static const struct sunxi_musb_config sun8i_h3_cfg = { .config = &musb_config_h3, }; +static const struct sunxi_musb_config suniv_f1c100s_cfg = { + .config = &musb_config, +}; + static const struct udevice_id sunxi_musb_ids[] = { { .compatible = "allwinner,sun4i-a10-musb", .data = (ulong)&sun4i_a10_cfg }, @@ -527,6 +541,8 @@ static const struct udevice_id sunxi_musb_ids[] = { .data = (ulong)&sun6i_a31_cfg }, { .compatible = "allwinner,sun8i-h3-musb", .data = (ulong)&sun8i_h3_cfg }, + { .compatible = "allwinner,suniv-f1c100s-musb", + .data = (ulong)&suniv_f1c100s_cfg }, { } }; diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 39c82521be1..7808ae7919e 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -522,6 +522,14 @@ config VIDEO_LCD_ORISETECH_OTM8009A Say Y here if you want to enable support for Orise Technology otm8009a 480x800 dsi 2dl panel. +config VIDEO_LCD_LG_LD070WX3 + bool "LD070WX3 DSI LCD panel support" + depends on PANEL && BACKLIGHT + select VIDEO_MIPI_DSI + help + Say Y here if you want to enable support for LG LD070WX3 + 800x1280 DSI video mode panel. + config VIDEO_LCD_RAYDIUM_RM68200 bool "RM68200 DSI LCD panel support" select VIDEO_MIPI_DSI @@ -547,6 +555,15 @@ config VIDEO_LCD_RENESAS_R69328 IPS-LCD module with Renesas R69328 IC. The panel has a 720x1280 resolution and uses 24 bit RGB per pixel. +config VIDEO_LCD_SAMSUNG_LTL106HL02 + tristate "Samsung LTL106HL02 1920x1080 DSI video mode panel" + depends on PANEL && BACKLIGHT + select VIDEO_MIPI_DSI + help + Say Y here if you want to enable support for Samsung LTL106HL02 + LCD module found in Microsoft Surface 2. The panel has a FullHD + resolution (1920x1080). + config VIDEO_LCD_SSD2828 bool "SSD2828 bridge chip" ---help--- diff --git a/drivers/video/Makefile b/drivers/video/Makefile index fdc29376324..f3f70cd04a1 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -58,10 +58,12 @@ obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o obj-$(CONFIG_VIDEO_LCD_ENDEAVORU) += endeavoru-panel.o obj-$(CONFIG_VIDEO_LCD_HIMAX_HX8394) += himax-hx8394.o obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o +obj-$(CONFIG_VIDEO_LCD_LG_LD070WX3) += lg-ld070wx3.o obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o obj-$(CONFIG_VIDEO_LCD_RENESAS_R61307) += renesas-r61307.o obj-$(CONFIG_VIDEO_LCD_RENESAS_R69328) += renesas-r69328.o +obj-$(CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02) += samsung-ltl106hl02.o obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o obj-$(CONFIG_VIDEO_LCD_TDO_TL070WSH30) += tdo-tl070wsh30.o obj-$(CONFIG_VIDEO_MCDE_SIMPLE) += mcde_simple.o diff --git a/drivers/video/bridge/Kconfig b/drivers/video/bridge/Kconfig index 2311ca2d1a5..ab917273720 100644 --- a/drivers/video/bridge/Kconfig +++ b/drivers/video/bridge/Kconfig @@ -7,6 +7,16 @@ config VIDEO_BRIDGE requires LVDS, an eDP->LVDS bridge chip can be used to provide the necessary conversion. This option enables support for these devices. +config VIDEO_BRIDGE_PARADE_DP501 + bool "Support Parade DP501 DP & DVI/HDMI dual mode transmitter" + depends on PANEL && DM_GPIO + select DM_I2C + help + The Parade DP501 is a DP & DVI/HDMI dual-mode transmitter. It + enables an RGB/Parallel SOC output to be converted, packed and + serialized into either DP or TMDS output device. Only DisplayPort + functionality of this transmitter has been implemented and tested. + config VIDEO_BRIDGE_PARADE_PS862X bool "Support Parade PS862X DP->LVDS bridge" depends on VIDEO_BRIDGE @@ -40,3 +50,12 @@ config VIDEO_BRIDGE_SOLOMON_SSD2825 select VIDEO_MIPI_DSI help Solomon SSD2824 SPI RGB-DSI bridge driver wrapped into panel uClass. + +config VIDEO_BRIDGE_TOSHIBA_TC358768 + bool "Support Toshiba TC358768 MIPI DSI bridge" + depends on PANEL && DM_GPIO + select VIDEO_MIPI_DSI + select DM_I2C + help + Toshiba TC358768AXBG/TC358778XBG DSI bridge chip driver. + Found in Asus Transformer Infinity TF700T. diff --git a/drivers/video/bridge/Makefile b/drivers/video/bridge/Makefile index 22625c8bc67..58697e3cbe9 100644 --- a/drivers/video/bridge/Makefile +++ b/drivers/video/bridge/Makefile @@ -4,7 +4,9 @@ # Written by Simon Glass <sjg@chromium.org> obj-$(CONFIG_VIDEO_BRIDGE) += video-bridge-uclass.o +obj-$(CONFIG_VIDEO_BRIDGE_PARADE_DP501) += dp501.o obj-$(CONFIG_VIDEO_BRIDGE_PARADE_PS862X) += ps862x.o obj-$(CONFIG_VIDEO_BRIDGE_NXP_PTN3460) += ptn3460.o obj-$(CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345) += anx6345.o obj-$(CONFIG_VIDEO_BRIDGE_SOLOMON_SSD2825) += ssd2825.o +obj-$(CONFIG_VIDEO_BRIDGE_TOSHIBA_TC358768) += tc358768.o diff --git a/drivers/video/bridge/dp501.c b/drivers/video/bridge/dp501.c new file mode 100644 index 00000000000..095e3e71fed --- /dev/null +++ b/drivers/video/bridge/dp501.c @@ -0,0 +1,579 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2024 Jonas Schwöbel <jonasschwoebel@yahoo.de> + * Copyright (C) 2024 Svyatoslav Ryhel <clamor95@gmail.com> + */ + +#include <dm.h> +#include <i2c.h> +#include <log.h> +#include <backlight.h> +#include <panel.h> +#include <linux/delay.h> +#include <linux/err.h> +#include <power/regulator.h> + +#include <asm/gpio.h> + +/* TOP */ +#define TOPCFG0 0x00 +#define ROMI2C_PRESCALE 0x01 +#define HDCPI2C_PRESCALE 0x02 +#define GPIO 0x03 +#define GPIO_OUT_ENB 0x04 +#define TESTI2C_CTL 0x05 +#define I2CMTIMEOUT 0x06 +#define TOPCFG1 0x07 +#define TOPCFG2 0x08 +#define TOPCFG3 0x09 +#define TOPCFG4 0x0A +#define CLKSWRST 0x0B +#define CADETB_CTL 0x0C + +/* Video Attribute */ +#define HTOTAL_L 0x10 +#define HTOTAL_H 0x11 +#define HSTART_L 0x12 +#define HSTART_H 0x13 +#define HWIDTH_L 0x14 +#define HWIDTH_H 0x15 +#define VTOTAL_L 0x16 +#define VTOTAL_H 0x17 +#define VSTART_L 0x18 +#define VSTART_H 0x19 +#define VHEIGHT_L 0x1A +#define VHEIGHT_H 0x1B +#define HSPHSW_L 0x1C +#define HSPHSW_H 0x1D +#define VSPVSW_L 0x1E +#define VSPVSW_H 0x1F +#define MISC0 0x20 +#define MISC1 0x21 + +/* Video Capture */ +#define VCAPCTRL0 0x24 +#define VCAPCTRL1 0x25 +#define VCAPCTRL2 0x26 +#define VCAPCTRL3 0x27 +#define VCAPCTRL4 0x28 +#define VCAP_MEASURE 0x29 + +/* Main Link Control */ +#define NVID_L 0x2C +#define NVID_M 0x2D +#define NVID_H 0x2E +#define LINK_CTRL0 0x2F +#define LINK_CTRL1 0x30 +#define LINK_DEBUG 0x31 +#define ERR_POS 0x32 +#define ERR_PAT 0x33 +#define LINK_DEB_SEL 0x34 +#define IDLE_PATTERN 0x35 +#define TU_SIZE 0x36 +#define CRC_CTRL 0x37 +#define CRC_OUT 0x38 + +/* AVI-2 InfoFrame */ +#define SD_CTRL0 0x3A +#define SD_CTRL1 0x3B +#define SD_HB0 0x3C +#define SD_HB1 0x3D +#define SD_HB2 0x3E +#define SD_HB3 0x3F +#define SD_DB0 0x40 +#define SD_DB1 0x41 +#define SD_DB2 0x42 +#define SD_DB3 0x43 +#define SD_DB4 0x44 +#define SD_DB5 0x45 +#define SD_DB6 0x46 +#define SD_DB7 0x47 +#define SD_DB8 0x48 +#define SD_DB9 0x49 +#define SD_DB10 0x4A +#define SD_DB11 0x4B +#define SD_DB12 0x4C +#define SD_DB13 0x4D +#define SD_DB14 0x4E +#define SD_DB15 0x4F + +/* Aux Channel and PCS */ +#define DPCD_REV 0X50 +#define MAX_LINK_RATE 0x51 +#define MAX_LANE_COUNT 0x52 +#define MAX_DOWNSPREAD 0x53 +#define NORP 0x54 +#define DOWNSTRMPORT_PRE 0x55 +#define MLINK_CH_CODING 0x56 +#define RCV_P0_CAP0 0x58 +#define RCV_P0_CAP1 0x59 +#define RCV_P1_CAP0 0x5A +#define RCV_P1_CAP1 0x5B +#define DOWNSPREAD_CTL 0x5C +#define LINK_BW 0x5D +#define LANE_CNT 0x5E +#define TRAINING_CTL 0x5F +#define QUALTEST_CTL 0x60 +#define SINK_COUNT 0x61 +#define DEV_SERVICE_IRQ 0x62 +#define LANE01_STATUS 0x63 +#define LANE23_STATUS 0x64 +#define LANE_STATUS_UPDATE 0x65 +#define SINK_STATUS 0x66 +#define AUX_NOISE 0x67 +#define TEST_MODE 0x69 +#define TEST_PATTERN0 0x6A +#define TEST_PATTERN1 0x6B +#define TEST_PATTERN2 0x6C +#define SIGNATURE 0x6D +#define PCSCFG 0x6E +#define AUXCTRL0 0x6f +#define AUXCTRL2 0x70 +#define AUXCTRL1 0x71 +#define HPDCTL0 0x72 +#define HPDCTL1 0x73 +#define LINK_STATE_CTRL 0x74 +#define SWRST 0x75 +#define LINK_IRQ 0x76 +#define AUXIRQ_CTRL 0x77 +#define HPD2_IRQ_CTRL 0x78 +#define SW_TRAIN_CTRL 0x79 +#define SW_DRV_SET 0x7A +#define SW_PRE_SET 0x7B +#define DPCD_ADDR_L 0x7D +#define DPCD_ADDR_M 0x7E +#define DPCD_ADDR_H 0x7F +#define DPCD_LENGTH 0x80 +#define DPCD_WDATA 0x81 +#define DPCD_RDATA 0x82 +#define DPCD_CTL 0x83 +#define DPCD_STATUS 0x84 +#define AUX_STATUS 0x85 +#define I2CTOAUX_RELENGTH 0x86 +#define AUX_RETRY_CTRL 0x87 +#define TIMEOUT_CTRL 0x88 +#define I2CCMD_OPT1 0x89 +#define AUXCMD_ERR_IRQ 0x8A +#define AUXCMD_OPT2 0x8B +#define HDCP_Reserved 0x8C + +/* Audio InfoFrame */ +#define TX_MVID0 0x90 +#define TX_MVID1 0x91 +#define TX_MVID2 0x92 +#define TX_MVID_OFF 0x93 +#define TX_MAUD0 0x94 +#define TX_MAUD1 0x95 +#define TX_MAUD2 0x96 +#define TX_MAUD_OFF 0x97 +#define MN_CTRL 0x98 +#define MOUT0 0x99 +#define MOUT1 0x9A +#define MOUT2 0x9B + +/* Audio Control */ +#define NAUD_L 0x9F +#define NAUD_M 0xA0 +#define NAUD_H 0xA1 +#define AUD_CTRL0 0xA2 +#define AUD_CTRL1 0xA3 +#define LANE_POL 0xAA +#define LANE_EN 0xAB +#define LANE_MAP 0xAC +#define SCR_POLY0 0xAD +#define SCR_POLY1 0xAE +#define PRBS7_POLY 0xAF + +/* Video Pre-process */ +#define MISC_SHDOW 0xB0 +#define VCAPCPCTL0 0xB1 +#define VCAPCPCTL1 0xB2 +#define VCAPCPCTL2 0xB3 +#define CSCPAR 0xB4 +#define I2CTODPCDSTATUS2 0xBA +#define AUXCTL_REG 0xBB + +/* Page 2 */ +#define SEL_PIO1 0x24 +#define SEL_PIO2 0x25 +#define SEL_PIO3 0x26 +#define CHIP_VER_L 0x82 + +struct dp501_priv { + struct udevice *panel; + struct display_timing timing; + + struct udevice *chip2; + + struct udevice *vdd; + struct gpio_desc reset_gpio; + struct gpio_desc enable_gpio; +}; + +static int dp501_sw_init(struct udevice *dev) +{ + struct dp501_priv *priv = dev_get_priv(dev); + int i; + u8 val; + + dm_i2c_reg_write(dev, TOPCFG4, 0x30); + udelay(200); + dm_i2c_reg_write(dev, TOPCFG4, 0x0c); + dm_i2c_reg_write(dev, 0x8f, 0x02); + + /* check for connected panel during 1 msec */ + for (i = 0; i < 5; i++) { + val = dm_i2c_reg_read(dev, 0x8d); + val &= BIT(2); + if (val) + break; + + udelay(200); + } + + if (!val) { + log_debug("%s: panel is not connected!\n", __func__); + return -ENODEV; + } + + dm_i2c_reg_write(priv->chip2, SEL_PIO1, 0x02); + dm_i2c_reg_write(priv->chip2, SEL_PIO2, 0x04); + dm_i2c_reg_write(priv->chip2, SEL_PIO3, 0x10); + + dm_i2c_reg_write(dev, LINK_STATE_CTRL, 0xa0); + dm_i2c_reg_write(dev, 0x8f, 0x02); + dm_i2c_reg_write(dev, TOPCFG1, 0x16); + dm_i2c_reg_write(dev, TOPCFG0, 0x24); + dm_i2c_reg_write(dev, HPD2_IRQ_CTRL, 0x30); + dm_i2c_reg_write(dev, AUXIRQ_CTRL, 0xff); + dm_i2c_reg_write(dev, LINK_IRQ, 0xff); + + /* auto detect DVO timing */ + dm_i2c_reg_write(dev, VCAPCTRL3, 0x30); + + /* reset tpfifo at v blank */ + dm_i2c_reg_write(dev, LINK_CTRL0, 0x82); + + dm_i2c_reg_write(dev, VCAPCTRL4, 0x07); + dm_i2c_reg_write(dev, AUX_RETRY_CTRL, 0x7f); + dm_i2c_reg_write(dev, TIMEOUT_CTRL, 0x1e); + dm_i2c_reg_write(dev, AUXCTL_REG, 0x06); + + /* DPCD readable */ + dm_i2c_reg_write(dev, HPDCTL0, 0xa9); + + /* Scramble on */ + dm_i2c_reg_write(dev, QUALTEST_CTL, 0x00); + + dm_i2c_reg_write(dev, 0x8f, 0x02); + + dm_i2c_reg_write(dev, VCAPCTRL0, 0xc4); + + /* set color depth 8bit (0x00: 6bit; 0x20: 8bit; 0x40: 10bit) */ + dm_i2c_reg_write(dev, MISC0, 0x20); + + dm_i2c_reg_write(dev, VCAPCPCTL2, 0x01); + + /* check if bridge returns ready status */ + for (i = 0; i < 5; i++) { + val = dm_i2c_reg_read(dev, LINK_IRQ); + val &= BIT(0); + if (val) + break; + + udelay(200); + } + + if (!val) { + log_debug("%s: bridge is not ready\n", __func__); + return -ENODEV; + } + + return 0; +} + +static void dpcd_configure(struct udevice *dev, u32 config, bool write) +{ + dm_i2c_reg_write(dev, DPCD_ADDR_L, (u8)(config >> 8)); + dm_i2c_reg_write(dev, DPCD_ADDR_M, (u8)(config >> 16)); + dm_i2c_reg_write(dev, DPCD_ADDR_H, (u8)((config >> 24) | BIT(7))); + dm_i2c_reg_write(dev, DPCD_LENGTH, 0x00); + dm_i2c_reg_write(dev, LINK_IRQ, 0x20); + + if (write) + dm_i2c_reg_write(dev, DPCD_WDATA, (u8)(config & 0xff)); + + dm_i2c_reg_write(dev, DPCD_CTL, 0x01); + + udelay(10); +} + +static int dump_dpcd_data(struct udevice *dev, u32 config, u8 *data) +{ + int i; + u8 value; + + dpcd_configure(dev, config, false); + + value = dm_i2c_reg_read(dev, DPCD_CTL); + if (value) + return -ENODATA; + + for (i = 0; i < 5; i++) { + value = dm_i2c_reg_read(dev, LINK_IRQ); + value &= BIT(5); + if (value) + break; + + udelay(100); + } + + if (!value) + return -ENODATA; + + value = dm_i2c_reg_read(dev, DPCD_STATUS); + if (!(value & 0xe0)) + *data = dm_i2c_reg_read(dev, DPCD_RDATA); + else + return -ENODATA; + + return 0; +} + +static int dp501_dpcd_dump(struct udevice *dev, u32 config, u8 *data) +{ + int i, ret; + + for (i = 0; i < 5; i++) { + ret = dump_dpcd_data(dev, config, data); + if (!ret) + break; + + udelay(100); + } + + return ret; +} + +static int dp501_reset_link(struct udevice *dev) +{ + dm_i2c_reg_write(dev, TRAINING_CTL, 0x00); + dm_i2c_reg_write(dev, SWRST, 0xf8); + dm_i2c_reg_write(dev, SWRST, 0x00); + + return -ENODEV; +} + +static int dp501_link_training(struct udevice *dev) +{ + int i, ret; + u8 lane, link, link_out; + u8 lane_cnt, lane01, lane23; + + dpcd_configure(dev, 0x030000, true); + dpcd_configure(dev, 0x03011c, true); + dpcd_configure(dev, 0x0301f8, true); + + ret = dp501_dpcd_dump(dev, 0x90000100, &link); + if (ret) { + log_debug("%s: link dump failed %d\n", __func__, ret); + return dp501_reset_link(dev); + } + + ret = dp501_dpcd_dump(dev, 0x90000200, &lane); + if (ret) { + log_debug("%s: lane dump failed %d\n", __func__, ret); + return dp501_reset_link(dev); + } + + /* Software trainig */ + for (i = 10; i > 0; i--) { + dm_i2c_reg_write(dev, LINK_BW, link); + dm_i2c_reg_write(dev, LANE_CNT, lane | BIT(7)); + + link_out = dm_i2c_reg_read(dev, LINK_BW); + lane_cnt = dm_i2c_reg_read(dev, LANE_CNT); + + if (link_out == link && + (lane_cnt == (lane | BIT(7)))) + break; + + udelay(500); + } + + if (!i) + return dp501_reset_link(dev); + + dm_i2c_reg_write(dev, LINK_STATE_CTRL, 0x00); + dm_i2c_reg_write(dev, TRAINING_CTL, 0x0d); + + /* check if bridge returns link ready status */ + for (i = 0; i < 100; i++) { + link_out = dm_i2c_reg_read(dev, LINK_IRQ); + link_out &= BIT(1); + if (link_out) { + dm_i2c_reg_write(dev, LINK_IRQ, 0xff); + break; + } + + udelay(100); + } + + if (!link_out) { + log_debug("%s: link prepare failed %d\n", + __func__, link_out); + return dp501_reset_link(dev); + } + + lane01 = dm_i2c_reg_read(dev, LANE01_STATUS); + lane23 = dm_i2c_reg_read(dev, LANE23_STATUS); + + switch (lane_cnt & 0xf) { + case 4: + if (lane01 == 0x77 && + lane23 == 0x77) + return 0; + break; + + case 2: + if (lane01 == 0x77) + return 0; + break; + + default: + if ((lane01 & 7) == 7) + return 0; + break; + } + + return dp501_reset_link(dev); +} + +static int dp501_attach(struct udevice *dev) +{ + struct dp501_priv *priv = dev_get_priv(dev); + int ret; + + ret = dp501_sw_init(dev); + if (ret) + return ret; + + mdelay(90); + + ret = dp501_link_training(dev); + if (ret) + return ret; + + /* Perform panel HW setup */ + return panel_enable_backlight(priv->panel); +} + +static int dp501_set_backlight(struct udevice *dev, int percent) +{ + struct dp501_priv *priv = dev_get_priv(dev); + + return panel_set_backlight(priv->panel, percent); +} + +static int dp501_panel_timings(struct udevice *dev, + struct display_timing *timing) +{ + struct dp501_priv *priv = dev_get_priv(dev); + + memcpy(timing, &priv->timing, sizeof(*timing)); + return 0; +} + +static void dp501_hw_init(struct dp501_priv *priv) +{ + dm_gpio_set_value(&priv->reset_gpio, 1); + + regulator_set_enable_if_allowed(priv->vdd, 1); + dm_gpio_set_value(&priv->enable_gpio, 1); + + udelay(100); + + dm_gpio_set_value(&priv->reset_gpio, 0); + mdelay(80); +} + +static int dp501_setup(struct udevice *dev) +{ + struct dm_i2c_chip *chip = dev_get_parent_plat(dev); + struct dp501_priv *priv = dev_get_priv(dev); + struct udevice *bus = dev_get_parent(dev); + int ret; + + /* get panel */ + ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, + "panel", &priv->panel); + if (ret) { + log_debug("%s: Cannot get panel: ret=%d\n", __func__, ret); + return log_ret(ret); + } + + /* get regulators */ + ret = device_get_supply_regulator(dev, "power-supply", &priv->vdd); + if (ret) { + log_debug("%s: vddc regulator error: %d\n", __func__, ret); + if (ret != -ENOENT) + return log_ret(ret); + } + + /* get gpios */ + ret = gpio_request_by_name(dev, "reset-gpios", 0, + &priv->reset_gpio, GPIOD_IS_OUT); + if (ret) { + log_debug("%s: Could not decode reset-gpios (%d)\n", + __func__, ret); + return ret; + } + + ret = gpio_request_by_name(dev, "enable-gpios", 0, + &priv->enable_gpio, GPIOD_IS_OUT); + if (ret) { + log_debug("%s: Could not decode enable-gpios (%d)\n", + __func__, ret); + return ret; + } + + ret = i2c_get_chip(bus, chip->chip_addr + 2, 1, &priv->chip2); + if (ret) { + log_debug("%s: cannot get second PMIC I2C chip (err %d)\n", + __func__, ret); + return ret; + } + + dp501_hw_init(priv); + + /* get EDID */ + return panel_get_display_timing(priv->panel, &priv->timing); +} + +static int dp501_probe(struct udevice *dev) +{ + if (device_get_uclass_id(dev->parent) != UCLASS_I2C) + return -EPROTONOSUPPORT; + + return dp501_setup(dev); +} + +struct panel_ops dp501_ops = { + .enable_backlight = dp501_attach, + .set_backlight = dp501_set_backlight, + .get_display_timing = dp501_panel_timings, +}; + +static const struct udevice_id dp501_ids[] = { + { .compatible = "parade,dp501" }, + { } +}; + +U_BOOT_DRIVER(dp501) = { + .name = "dp501", + .id = UCLASS_PANEL, + .of_match = dp501_ids, + .ops = &dp501_ops, + .probe = dp501_probe, + .priv_auto = sizeof(struct dp501_priv), +}; diff --git a/drivers/video/bridge/ssd2825.c b/drivers/video/bridge/ssd2825.c index cea20dcffa5..f0ef3dafb93 100644 --- a/drivers/video/bridge/ssd2825.c +++ b/drivers/video/bridge/ssd2825.c @@ -349,39 +349,6 @@ static int ssd2825_bridge_enable_panel(struct udevice *dev) struct ssd2825_bridge_priv *priv = dev_get_priv(dev); struct mipi_dsi_device *device = &priv->device; struct display_timing *dt = &priv->timing; - int ret; - - ret = clk_prepare_enable(priv->tx_clk); - if (ret) { - log_err("error enabling tx_clk (%d)\n", ret); - return ret; - } - - ret = dm_gpio_set_value(&priv->power_gpio, 1); - if (ret) { - log_err("error changing power-gpios (%d)\n", ret); - return ret; - } - mdelay(10); - - ret = dm_gpio_set_value(&priv->reset_gpio, 0); - if (ret) { - log_err("error changing reset-gpios (%d)\n", ret); - return ret; - } - mdelay(10); - - ret = dm_gpio_set_value(&priv->reset_gpio, 1); - if (ret) { - log_err("error changing reset-gpios (%d)\n", ret); - return ret; - } - mdelay(10); - - /* Perform panel HW setup */ - ret = panel_enable_backlight(priv->panel); - if (ret) - return ret; /* Perform SW reset */ ssd2825_write_register(dev, SSD2825_OPERATION_CTRL_REG, 0x0100); @@ -417,17 +384,15 @@ static int ssd2825_bridge_enable_panel(struct udevice *dev) SSD2825_CONF_REG_ECD | SSD2825_CONF_REG_EOT); ssd2825_write_register(dev, SSD2825_VC_CTRL_REG, 0x0000); - /* Set up SW panel configuration */ - ret = panel_set_backlight(priv->panel, BACKLIGHT_DEFAULT); - if (ret) - return ret; - - return 0; + /* Perform panel setup */ + return panel_enable_backlight(priv->panel); } static int ssd2825_bridge_set_panel(struct udevice *dev, int percent) { - return 0; + struct ssd2825_bridge_priv *priv = dev_get_priv(dev); + + return panel_set_backlight(priv->panel, percent); } static int ssd2825_bridge_panel_timings(struct udevice *dev, @@ -440,6 +405,45 @@ static int ssd2825_bridge_panel_timings(struct udevice *dev, return 0; } +static int ssd2825_bridge_hw_init(struct udevice *dev) +{ + struct ssd2825_bridge_priv *priv = dev_get_priv(dev); + int ret; + + ret = clk_prepare_enable(priv->tx_clk); + if (ret) { + log_debug("%s: error enabling tx_clk (%d)\n", + __func__, ret); + return ret; + } + + ret = dm_gpio_set_value(&priv->power_gpio, 1); + if (ret) { + log_debug("%s: error changing power-gpios (%d)\n", + __func__, ret); + return ret; + } + mdelay(10); + + ret = dm_gpio_set_value(&priv->reset_gpio, 0); + if (ret) { + log_debug("%s: error changing reset-gpios (%d)\n", + __func__, ret); + return ret; + } + mdelay(10); + + ret = dm_gpio_set_value(&priv->reset_gpio, 1); + if (ret) { + log_debug("%s: error changing reset-gpios (%d)\n", + __func__, ret); + return ret; + } + mdelay(10); + + return 0; +} + static int ssd2825_bridge_probe(struct udevice *dev) { struct ssd2825_bridge_priv *priv = dev_get_priv(dev); @@ -496,7 +500,7 @@ static int ssd2825_bridge_probe(struct udevice *dev) return PTR_ERR(priv->tx_clk); } - return 0; + return ssd2825_bridge_hw_init(dev); } static const struct panel_ops ssd2825_bridge_ops = { diff --git a/drivers/video/bridge/tc358768.c b/drivers/video/bridge/tc358768.c new file mode 100644 index 00000000000..19b6ca29d3e --- /dev/null +++ b/drivers/video/bridge/tc358768.c @@ -0,0 +1,985 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 Texas Instruments Incorporated + * Copyright (C) 2022 Svyatoslav Ryhel <clamor95@gmail.com> + */ + +#include <clk.h> +#include <dm.h> +#include <i2c.h> +#include <log.h> +#include <mipi_display.h> +#include <mipi_dsi.h> +#include <backlight.h> +#include <panel.h> +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/kernel.h> +#include <linux/math64.h> +#include <power/regulator.h> + +#include <asm/gpio.h> + +/* Global (16-bit addressable) */ +#define TC358768_CHIPID 0x0000 +#define TC358768_SYSCTL 0x0002 +#define TC358768_CONFCTL 0x0004 +#define TC358768_VSDLY 0x0006 +#define TC358768_DATAFMT 0x0008 +#define TC358768_GPIOEN 0x000E +#define TC358768_GPIODIR 0x0010 +#define TC358768_GPIOIN 0x0012 +#define TC358768_GPIOOUT 0x0014 +#define TC358768_PLLCTL0 0x0016 +#define TC358768_PLLCTL1 0x0018 +#define TC358768_CMDBYTE 0x0022 +#define TC358768_PP_MISC 0x0032 +#define TC358768_DSITX_DT 0x0050 +#define TC358768_FIFOSTATUS 0x00F8 + +/* Debug (16-bit addressable) */ +#define TC358768_VBUFCTRL 0x00E0 +#define TC358768_DBG_WIDTH 0x00E2 +#define TC358768_DBG_VBLANK 0x00E4 +#define TC358768_DBG_DATA 0x00E8 + +/* TX PHY (32-bit addressable) */ +#define TC358768_CLW_DPHYCONTTX 0x0100 +#define TC358768_D0W_DPHYCONTTX 0x0104 +#define TC358768_D1W_DPHYCONTTX 0x0108 +#define TC358768_D2W_DPHYCONTTX 0x010C +#define TC358768_D3W_DPHYCONTTX 0x0110 +#define TC358768_CLW_CNTRL 0x0140 +#define TC358768_D0W_CNTRL 0x0144 +#define TC358768_D1W_CNTRL 0x0148 +#define TC358768_D2W_CNTRL 0x014C +#define TC358768_D3W_CNTRL 0x0150 + +/* TX PPI (32-bit addressable) */ +#define TC358768_STARTCNTRL 0x0204 +#define TC358768_DSITXSTATUS 0x0208 +#define TC358768_LINEINITCNT 0x0210 +#define TC358768_LPTXTIMECNT 0x0214 +#define TC358768_TCLK_HEADERCNT 0x0218 +#define TC358768_TCLK_TRAILCNT 0x021C +#define TC358768_THS_HEADERCNT 0x0220 +#define TC358768_TWAKEUP 0x0224 +#define TC358768_TCLK_POSTCNT 0x0228 +#define TC358768_THS_TRAILCNT 0x022C +#define TC358768_HSTXVREGCNT 0x0230 +#define TC358768_HSTXVREGEN 0x0234 +#define TC358768_TXOPTIONCNTRL 0x0238 +#define TC358768_BTACNTRL1 0x023C + +/* TX CTRL (32-bit addressable) */ +#define TC358768_DSI_CONTROL 0x040C +#define TC358768_DSI_STATUS 0x0410 +#define TC358768_DSI_INT 0x0414 +#define TC358768_DSI_INT_ENA 0x0418 +#define TC358768_DSICMD_RDFIFO 0x0430 +#define TC358768_DSI_ACKERR 0x0434 +#define TC358768_DSI_ACKERR_INTENA 0x0438 +#define TC358768_DSI_ACKERR_HALT 0x043c +#define TC358768_DSI_RXERR 0x0440 +#define TC358768_DSI_RXERR_INTENA 0x0444 +#define TC358768_DSI_RXERR_HALT 0x0448 +#define TC358768_DSI_ERR 0x044C +#define TC358768_DSI_ERR_INTENA 0x0450 +#define TC358768_DSI_ERR_HALT 0x0454 +#define TC358768_DSI_CONFW 0x0500 +#define TC358768_DSI_LPCMD 0x0500 +#define TC358768_DSI_RESET 0x0504 +#define TC358768_DSI_INT_CLR 0x050C +#define TC358768_DSI_START 0x0518 + +/* DSITX CTRL (16-bit addressable) */ +#define TC358768_DSICMD_TX 0x0600 +#define TC358768_DSICMD_TYPE 0x0602 +#define TC358768_DSICMD_WC 0x0604 +#define TC358768_DSICMD_WD0 0x0610 +#define TC358768_DSICMD_WD1 0x0612 +#define TC358768_DSICMD_WD2 0x0614 +#define TC358768_DSICMD_WD3 0x0616 +#define TC358768_DSI_EVENT 0x0620 +#define TC358768_DSI_VSW 0x0622 +#define TC358768_DSI_VBPR 0x0624 +#define TC358768_DSI_VACT 0x0626 +#define TC358768_DSI_HSW 0x0628 +#define TC358768_DSI_HBPR 0x062A +#define TC358768_DSI_HACT 0x062C + +/* TC358768_DSI_CONTROL (0x040C) register */ +#define TC358768_DSI_CONTROL_DIS_MODE BIT(15) +#define TC358768_DSI_CONTROL_TXMD BIT(7) +#define TC358768_DSI_CONTROL_HSCKMD BIT(5) +#define TC358768_DSI_CONTROL_EOTDIS BIT(0) + +/* TC358768_DSI_CONFW (0x0500) register */ +#define TC358768_DSI_CONFW_MODE_SET (5 << 29) +#define TC358768_DSI_CONFW_MODE_CLR (6 << 29) +#define TC358768_DSI_CONFW_ADDR_DSI_CONTROL (3 << 24) + +#define NANO 1000000000UL +#define PICO 1000000000000ULL + +struct tc358768_priv { + struct mipi_dsi_host host; + struct mipi_dsi_device device; + + struct udevice *panel; + struct display_timing timing; + + struct udevice *vddc; + struct udevice *vddmipi; + struct udevice *vddio; + + struct clk *refclk; + + struct gpio_desc reset_gpio; + + u32 pd_lines; /* number of Parallel Port Input Data Lines */ + u32 dsi_lanes; /* number of DSI Lanes */ + + /* Parameters for PLL programming */ + u32 fbd; /* PLL feedback divider */ + u32 prd; /* PLL input divider */ + u32 frs; /* PLL Freqency range for HSCK (post divider) */ + + u32 dsiclk; /* pll_clk / 2 */ +}; + +static void tc358768_read(struct udevice *dev, u32 reg, u32 *val) +{ + int count; + u8 buf[4] = { 0, 0, 0, 0 }; + + /* 16-bit register? */ + if (reg < 0x100 || reg >= 0x600) + count = 2; + else + count = 4; + + dm_i2c_read(dev, reg, buf, count); + *val = (buf[0] << 8) | (buf[1] & 0xff) | + (buf[2] << 24) | (buf[3] << 16); + + log_debug("%s 0x%04x >> 0x%08x\n", + __func__, reg, *val); +} + +static void tc358768_write(struct udevice *dev, u32 reg, u32 val) +{ + int count; + u8 buf[4]; + + /* 16-bit register? */ + if (reg < 0x100 || reg >= 0x600) + count = 2; + else + count = 4; + + buf[0] = val >> 8; + buf[1] = val & 0xff; + buf[2] = val >> 24; + buf[3] = val >> 16; + + log_debug("%s 0x%04x << 0x%08x\n", + __func__, reg, val); + + dm_i2c_write(dev, reg, buf, count); +} + +static void tc358768_update_bits(struct udevice *dev, u32 reg, u32 mask, + u32 val) +{ + u32 tmp, orig; + + tc358768_read(dev, reg, &orig); + + tmp = orig & ~mask; + tmp |= val & mask; + if (tmp != orig) + tc358768_write(dev, reg, tmp); +} + +static ssize_t tc358768_dsi_host_transfer(struct mipi_dsi_host *host, + const struct mipi_dsi_msg *msg) +{ + struct udevice *dev = (struct udevice *)host->dev; + struct mipi_dsi_packet packet; + int ret; + + if (msg->rx_len) { + log_debug("%s: MIPI rx is not supported\n", __func__); + return -EOPNOTSUPP; + } + + if (msg->tx_len > 8) { + log_debug("%s: Maximum 8 byte MIPI tx is supported\n", __func__); + return -EOPNOTSUPP; + } + + ret = mipi_dsi_create_packet(&packet, msg); + if (ret) + return ret; + + if (mipi_dsi_packet_format_is_short(msg->type)) { + tc358768_write(dev, TC358768_DSICMD_TYPE, + (0x10 << 8) | (packet.header[0] & 0x3f)); + tc358768_write(dev, TC358768_DSICMD_WC, 0); + tc358768_write(dev, TC358768_DSICMD_WD0, + (packet.header[2] << 8) | packet.header[1]); + } else { + int i; + + tc358768_write(dev, TC358768_DSICMD_TYPE, + (0x40 << 8) | (packet.header[0] & 0x3f)); + tc358768_write(dev, TC358768_DSICMD_WC, packet.payload_length); + for (i = 0; i < packet.payload_length; i += 2) { + u16 val = packet.payload[i]; + + if (i + 1 < packet.payload_length) + val |= packet.payload[i + 1] << 8; + + tc358768_write(dev, TC358768_DSICMD_WD0 + i, val); + } + } + + /* start transfer */ + tc358768_write(dev, TC358768_DSICMD_TX, 1); + + return packet.size; +} + +static const struct mipi_dsi_host_ops tc358768_dsi_host_ops = { + .transfer = tc358768_dsi_host_transfer, +}; + +static void tc358768_sw_reset(struct udevice *dev) +{ + /* Assert Reset */ + tc358768_write(dev, TC358768_SYSCTL, 1); + mdelay(5); + + /* Release Reset, Exit Sleep */ + tc358768_write(dev, TC358768_SYSCTL, 0); +} + +static void tc358768_hw_enable(struct tc358768_priv *priv) +{ + int ret; + + ret = clk_prepare_enable(priv->refclk); + if (ret) + log_debug("%s: error enabling refclk (%d)\n", __func__, ret); + + ret = regulator_set_enable_if_allowed(priv->vddc, true); + if (ret) + log_debug("%s: error enabling vddc (%d)\n", __func__, ret); + + ret = regulator_set_enable_if_allowed(priv->vddmipi, true); + if (ret) + log_debug("%s: error enabling vddmipi (%d)\n", __func__, ret); + + mdelay(10); + + ret = regulator_set_enable_if_allowed(priv->vddio, true); + if (ret) + log_debug("%s: error enabling vddio (%d)\n", __func__, ret); + + mdelay(2); + + /* + * The RESX is active low (GPIO_ACTIVE_LOW). + * DEASSERT (value = 0) the reset_gpio to enable the chip + */ + ret = dm_gpio_set_value(&priv->reset_gpio, 0); + if (ret) + log_debug("%s: error changing reset-gpio (%d)\n", __func__, ret); + + /* wait for encoder clocks to stabilize */ + mdelay(2); +} + +static u32 tc358768_pclk_to_pll(struct tc358768_priv *priv, u32 pclk) +{ + return (u32)div_u64((u64)pclk * priv->pd_lines, priv->dsi_lanes); +} + +static int tc358768_calc_pll(struct tc358768_priv *priv, + struct display_timing *dt) +{ + static const u32 frs_limits[] = { + 1000000000, + 500000000, + 250000000, + 125000000, + 62500000 + }; + unsigned long refclk; + u32 prd, target_pll, i, max_pll, min_pll; + u32 frs, best_diff, best_pll, best_prd, best_fbd; + + target_pll = tc358768_pclk_to_pll(priv, dt->pixelclock.typ); + + /* pll_clk = RefClk * FBD / PRD * (1 / (2^FRS)) */ + + for (i = 0; i < ARRAY_SIZE(frs_limits); i++) + if (target_pll >= frs_limits[i]) + break; + + if (i == ARRAY_SIZE(frs_limits) || i == 0) + return -EINVAL; + + frs = i - 1; + max_pll = frs_limits[i - 1]; + min_pll = frs_limits[i]; + + refclk = clk_get_rate(priv->refclk); + + best_diff = UINT_MAX; + best_pll = 0; + best_prd = 0; + best_fbd = 0; + + for (prd = 1; prd <= 16; ++prd) { + u32 divisor = prd * (1 << frs); + u32 fbd; + + for (fbd = 1; fbd <= 512; ++fbd) { + u32 pll, diff, pll_in; + + pll = (u32)div_u64((u64)refclk * fbd, divisor); + + if (pll >= max_pll || pll < min_pll) + continue; + + pll_in = (u32)div_u64((u64)refclk, prd); + if (pll_in < 4000000) + continue; + + diff = max(pll, target_pll) - min(pll, target_pll); + + if (diff < best_diff) { + best_diff = diff; + best_pll = pll; + best_prd = prd; + best_fbd = fbd; + + if (best_diff == 0) + goto found; + } + } + } + + if (best_diff == UINT_MAX) { + log_debug("%s: could not find suitable PLL setup\n", __func__); + return -EINVAL; + } + +found: + priv->fbd = best_fbd; + priv->prd = best_prd; + priv->frs = frs; + priv->dsiclk = best_pll / 2; + + return 0; +} + +static void tc358768_setup_pll(struct udevice *dev) +{ + struct tc358768_priv *priv = dev_get_priv(dev); + u32 fbd, prd, frs; + int ret; + + ret = tc358768_calc_pll(priv, &priv->timing); + if (ret) + log_debug("%s: PLL calculation failed: %d\n", __func__, ret); + + fbd = priv->fbd; + prd = priv->prd; + frs = priv->frs; + + log_debug("%s: PLL: refclk %lu, fbd %u, prd %u, frs %u\n", __func__, + clk_get_rate(priv->refclk), fbd, prd, frs); + log_debug("%s: PLL: pll_clk: %u, DSIClk %u, HSByteClk %u\n", __func__, + priv->dsiclk * 2, priv->dsiclk, priv->dsiclk / 4); + + /* PRD[15:12] FBD[8:0] */ + tc358768_write(dev, TC358768_PLLCTL0, ((prd - 1) << 12) | (fbd - 1)); + + /* FRS[11:10] LBWS[9:8] CKEN[4] RESETB[1] EN[0] */ + tc358768_write(dev, TC358768_PLLCTL1, + (frs << 10) | (0x2 << 8) | BIT(1) | BIT(0)); + + /* wait for lock */ + mdelay(5); + + /* FRS[11:10] LBWS[9:8] CKEN[4] PLL_CKEN[4] RESETB[1] EN[0] */ + tc358768_write(dev, TC358768_PLLCTL1, + (frs << 10) | (0x2 << 8) | BIT(4) | BIT(1) | BIT(0)); +} + +static u32 tc358768_ns_to_cnt(u32 ns, u32 period_ps) +{ + return DIV_ROUND_UP(ns * 1000, period_ps); +} + +static u32 tc358768_ps_to_ns(u32 ps) +{ + return ps / 1000; +} + +static u32 tc358768_dpi_to_ns(u32 val, u32 pclk) +{ + return (u32)div_u64((u64)val * NANO, pclk); +} + +/* Convert value in DPI pixel clock units to DSI byte count */ +static u32 tc358768_dpi_to_dsi_bytes(struct tc358768_priv *priv, u32 val) +{ + u64 m = (u64)val * priv->dsiclk / 4 * priv->dsi_lanes; + u64 n = priv->timing.pixelclock.typ; + + return (u32)div_u64(m + n - 1, n); +} + +static u32 tc358768_dsi_bytes_to_ns(struct tc358768_priv *priv, u32 val) +{ + u64 m = (u64)val * NANO; + u64 n = priv->dsiclk / 4 * priv->dsi_lanes; + + return (u32)div_u64(m, n); +} + +static int tc358768_attach(struct udevice *dev) +{ + struct tc358768_priv *priv = dev_get_priv(dev); + struct mipi_dsi_device *device = &priv->device; + struct display_timing *dt = &priv->timing; + u32 val, val2, lptxcnt, hact, data_type; + s32 raw_val; + u32 hsbyteclk_ps, dsiclk_ps, ui_ps; + u32 dsiclk, hsbyteclk; + int i; + /* In pixelclock units */ + u32 dpi_htot, dpi_data_start; + /* In byte units */ + u32 dsi_dpi_htot, dsi_dpi_data_start; + u32 dsi_hsw, dsi_hbp, dsi_hact, dsi_hfp; + const u32 dsi_hss = 4; /* HSS is a short packet (4 bytes) */ + /* In hsbyteclk units */ + u32 dsi_vsdly; + const u32 internal_dly = 40; + + if (device->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) { + debug("%s: Non-continuous mode unimplemented, falling back to continuous\n", __func__); + device->mode_flags &= ~MIPI_DSI_CLOCK_NON_CONTINUOUS; + } + + tc358768_hw_enable(priv); + tc358768_sw_reset(dev); + + tc358768_setup_pll(dev); + + dsiclk = priv->dsiclk; + hsbyteclk = dsiclk / 4; + + /* Data Format Control Register */ + val = BIT(2) | BIT(1) | BIT(0); /* rdswap_en | dsitx_en | txdt_en */ + switch (device->format) { + case MIPI_DSI_FMT_RGB888: + val |= (0x3 << 4); + hact = dt->hactive.typ * 3; + data_type = MIPI_DSI_PACKED_PIXEL_STREAM_24; + break; + case MIPI_DSI_FMT_RGB666: + val |= (0x4 << 4); + hact = dt->hactive.typ * 3; + data_type = MIPI_DSI_PACKED_PIXEL_STREAM_18; + break; + case MIPI_DSI_FMT_RGB666_PACKED: + val |= (0x4 << 4) | BIT(3); + hact = dt->hactive.typ * 18 / 8; + data_type = MIPI_DSI_PIXEL_STREAM_3BYTE_18; + break; + case MIPI_DSI_FMT_RGB565: + val |= (0x5 << 4); + hact = dt->hactive.typ * 2; + data_type = MIPI_DSI_PACKED_PIXEL_STREAM_16; + break; + default: + log_debug("%s: Invalid data format (%u)\n", + __func__, device->format); + return -EINVAL; + } + + /* + * There are three important things to make TC358768 work correctly, + * which are not trivial to manage: + * + * 1. Keep the DPI line-time and the DSI line-time as close to each + * other as possible. + * 2. TC358768 goes to LP mode after each line's active area. The DSI + * HFP period has to be long enough for entering and exiting LP mode. + * But it is not clear how to calculate this. + * 3. VSDly (video start delay) has to be long enough to ensure that the + * DSI TX does not start transmitting until we have started receiving + * pixel data from the DPI input. It is not clear how to calculate + * this either. + */ + + dpi_htot = dt->hactive.typ + dt->hfront_porch.typ + + dt->hsync_len.typ + dt->hback_porch.typ; + dpi_data_start = dt->hsync_len.typ + dt->hback_porch.typ; + + log_debug("%s: dpi horiz timing (pclk): %u + %u + %u + %u = %u\n", __func__, + dt->hsync_len.typ, dt->hback_porch.typ, dt->hactive.typ, + dt->hfront_porch.typ, dpi_htot); + + log_debug("%s: dpi horiz timing (ns): %u + %u + %u + %u = %u\n", __func__, + tc358768_dpi_to_ns(dt->hsync_len.typ, dt->pixelclock.typ), + tc358768_dpi_to_ns(dt->hback_porch.typ, dt->pixelclock.typ), + tc358768_dpi_to_ns(dt->hactive.typ, dt->pixelclock.typ), + tc358768_dpi_to_ns(dt->hfront_porch.typ, dt->pixelclock.typ), + tc358768_dpi_to_ns(dpi_htot, dt->pixelclock.typ)); + + log_debug("%s: dpi data start (ns): %u + %u = %u\n", __func__, + tc358768_dpi_to_ns(dt->hsync_len.typ, dt->pixelclock.typ), + tc358768_dpi_to_ns(dt->hback_porch.typ, dt->pixelclock.typ), + tc358768_dpi_to_ns(dpi_data_start, dt->pixelclock.typ)); + + dsi_dpi_htot = tc358768_dpi_to_dsi_bytes(priv, dpi_htot); + dsi_dpi_data_start = tc358768_dpi_to_dsi_bytes(priv, dpi_data_start); + + if (device->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) { + dsi_hsw = tc358768_dpi_to_dsi_bytes(priv, dt->hsync_len.typ); + dsi_hbp = tc358768_dpi_to_dsi_bytes(priv, dt->hback_porch.typ); + } else { + /* HBP is included in HSW in event mode */ + dsi_hbp = 0; + dsi_hsw = tc358768_dpi_to_dsi_bytes(priv, + dt->hsync_len.typ + + dt->hback_porch.typ); + + /* + * The pixel packet includes the actual pixel data, and: + * DSI packet header = 4 bytes + * DCS code = 1 byte + * DSI packet footer = 2 bytes + */ + dsi_hact = hact + 4 + 1 + 2; + + dsi_hfp = dsi_dpi_htot - dsi_hact - dsi_hsw - dsi_hss; + + /* + * Here we should check if HFP is long enough for entering LP + * and exiting LP, but it's not clear how to calculate that. + * Instead, this is a naive algorithm that just adjusts the HFP + * and HSW so that HFP is (at least) roughly 2/3 of the total + * blanking time. + */ + if (dsi_hfp < (dsi_hfp + dsi_hsw + dsi_hss) * 2 / 3) { + u32 old_hfp = dsi_hfp; + u32 old_hsw = dsi_hsw; + u32 tot = dsi_hfp + dsi_hsw + dsi_hss; + + dsi_hsw = tot / 3; + + /* + * Seems like sometimes HSW has to be divisible by num-lanes, but + * not always... + */ + dsi_hsw = roundup(dsi_hsw, priv->dsi_lanes); + + dsi_hfp = dsi_dpi_htot - dsi_hact - dsi_hsw - dsi_hss; + + log_debug("%s: hfp too short, adjusting dsi hfp and dsi hsw from %u, %u to %u, %u\n", + __func__, old_hfp, old_hsw, dsi_hfp, dsi_hsw); + } + + log_debug("%s: dsi horiz timing (bytes): %u, %u + %u + %u + %u = %u\n", __func__, + dsi_hss, dsi_hsw, dsi_hbp, dsi_hact, dsi_hfp, + dsi_hss + dsi_hsw + dsi_hbp + dsi_hact + dsi_hfp); + + log_debug("%s: dsi horiz timing (ns): %u + %u + %u + %u + %u = %u\n", __func__, + tc358768_dsi_bytes_to_ns(priv, dsi_hss), + tc358768_dsi_bytes_to_ns(priv, dsi_hsw), + tc358768_dsi_bytes_to_ns(priv, dsi_hbp), + tc358768_dsi_bytes_to_ns(priv, dsi_hact), + tc358768_dsi_bytes_to_ns(priv, dsi_hfp), + tc358768_dsi_bytes_to_ns(priv, dsi_hss + dsi_hsw + + dsi_hbp + dsi_hact + dsi_hfp)); + } + + /* VSDly calculation */ + + /* Start with the HW internal delay */ + dsi_vsdly = internal_dly; + + /* Convert to byte units as the other variables are in byte units */ + dsi_vsdly *= priv->dsi_lanes; + + /* Do we need more delay, in addition to the internal? */ + if (dsi_dpi_data_start > dsi_vsdly + dsi_hss + dsi_hsw + dsi_hbp) { + dsi_vsdly = dsi_dpi_data_start - dsi_hss - dsi_hsw - dsi_hbp; + dsi_vsdly = roundup(dsi_vsdly, priv->dsi_lanes); + } + + log_debug("%s: dsi data start (bytes) %u + %u + %u + %u = %u\n", __func__, + dsi_vsdly, dsi_hss, dsi_hsw, dsi_hbp, + dsi_vsdly + dsi_hss + dsi_hsw + dsi_hbp); + + log_debug("%s: dsi data start (ns) %u + %u + %u + %u = %u\n", __func__, + tc358768_dsi_bytes_to_ns(priv, dsi_vsdly), + tc358768_dsi_bytes_to_ns(priv, dsi_hss), + tc358768_dsi_bytes_to_ns(priv, dsi_hsw), + tc358768_dsi_bytes_to_ns(priv, dsi_hbp), + tc358768_dsi_bytes_to_ns(priv, dsi_vsdly + dsi_hss + dsi_hsw + dsi_hbp)); + + /* Convert back to hsbyteclk */ + dsi_vsdly /= priv->dsi_lanes; + + /* + * The docs say that there is an internal delay of 40 cycles. + * However, we get underflows if we follow that rule. If we + * instead ignore the internal delay, things work. So either + * the docs are wrong or the calculations are wrong. + * + * As a temporary fix, add the internal delay here, to counter + * the subtraction when writing the register. + */ + dsi_vsdly += internal_dly; + + /* Clamp to the register max */ + if (dsi_vsdly - internal_dly > 0x3ff) { + log_warning("%s: VSDly too high, underflows likely\n", __func__); + dsi_vsdly = 0x3ff + internal_dly; + } + + /* VSDly[9:0] */ + tc358768_write(dev, TC358768_VSDLY, dsi_vsdly - internal_dly); + + tc358768_write(dev, TC358768_DATAFMT, val); + tc358768_write(dev, TC358768_DSITX_DT, data_type); + + /* Enable D-PHY (HiZ->LP11) */ + tc358768_write(dev, TC358768_CLW_CNTRL, 0x0000); + /* Enable lanes */ + for (i = 0; i < device->lanes; i++) + tc358768_write(dev, TC358768_D0W_CNTRL + i * 4, 0x0000); + + /* Set up D-PHY CONTTX */ + tc358768_write(dev, TC358768_CLW_DPHYCONTTX, 0x0203); + /* Adjust lanes */ + for (i = 0; i < device->lanes; i++) + tc358768_write(dev, TC358768_D0W_DPHYCONTTX + i * 4, 0x0203); + + /* DSI Timings */ + hsbyteclk_ps = (u32)div_u64(PICO, hsbyteclk); + dsiclk_ps = (u32)div_u64(PICO, dsiclk); + ui_ps = dsiclk_ps / 2; + log_debug("%s: dsiclk: %u ps, ui %u ps, hsbyteclk %u ps\n", + __func__, dsiclk_ps, ui_ps, hsbyteclk_ps); + + /* LP11 > 100us for D-PHY Rx Init */ + val = tc358768_ns_to_cnt(100 * 1000, hsbyteclk_ps) - 1; + log_debug("%s: LINEINITCNT: 0x%x\n", __func__, val); + tc358768_write(dev, TC358768_LINEINITCNT, val); + + /* LPTimeCnt > 50ns */ + val = tc358768_ns_to_cnt(50, hsbyteclk_ps) - 1; + lptxcnt = val; + log_debug("%s: LPTXTIMECNT: 0x%x\n", __func__, val); + tc358768_write(dev, TC358768_LPTXTIMECNT, val); + + /* 38ns < TCLK_PREPARE < 95ns */ + val = tc358768_ns_to_cnt(65, hsbyteclk_ps) - 1; + log_debug("%s: TCLK_PREPARECNT: 0x%x\n", __func__, val); + /* TCLK_PREPARE + TCLK_ZERO > 300ns */ + val2 = tc358768_ns_to_cnt(300 - tc358768_ps_to_ns(2 * ui_ps), + hsbyteclk_ps) - 2; + log_debug("%s: TCLK_ZEROCNT: 0x%x\n", __func__, val2); + val |= val2 << 8; + tc358768_write(dev, TC358768_TCLK_HEADERCNT, val); + + /* TCLK_TRAIL > 60ns AND TEOT <= 105 ns + 12*UI */ + raw_val = tc358768_ns_to_cnt(60 + tc358768_ps_to_ns(2 * ui_ps), + hsbyteclk_ps) - 5; + val = clamp(raw_val, 0, 127); + log_debug("%s: TCLK_TRAILCNT: 0x%x\n", __func__, val); + tc358768_write(dev, TC358768_TCLK_TRAILCNT, val); + + /* 40ns + 4*UI < THS_PREPARE < 85ns + 6*UI */ + val = 50 + tc358768_ps_to_ns(4 * ui_ps); + val = tc358768_ns_to_cnt(val, hsbyteclk_ps) - 1; + log_debug("%s: THS_PREPARECNT: 0x%x\n", __func__, val); + /* THS_PREPARE + THS_ZERO > 145ns + 10*UI */ + raw_val = tc358768_ns_to_cnt(145 - tc358768_ps_to_ns(3 * ui_ps), + hsbyteclk_ps) - 10; + val2 = clamp(raw_val, 0, 127); + log_debug("%s: THS_ZEROCNT: 0x%x\n", __func__, val2); + val |= val2 << 8; + tc358768_write(dev, TC358768_THS_HEADERCNT, val); + + /* TWAKEUP > 1ms in lptxcnt steps */ + val = tc358768_ns_to_cnt(1020000, hsbyteclk_ps); + val = val / (lptxcnt + 1) - 1; + log_debug("%s: TWAKEUP: 0x%x\n", __func__, val); + tc358768_write(dev, TC358768_TWAKEUP, val); + + /* TCLK_POSTCNT > 60ns + 52*UI */ + val = tc358768_ns_to_cnt(60 + tc358768_ps_to_ns(52 * ui_ps), + hsbyteclk_ps) - 3; + log_debug("%s: TCLK_POSTCNT: 0x%x\n", __func__, val); + tc358768_write(dev, TC358768_TCLK_POSTCNT, val); + + /* max(60ns + 4*UI, 8*UI) < THS_TRAILCNT < 105ns + 12*UI */ + raw_val = tc358768_ns_to_cnt(60 + tc358768_ps_to_ns(18 * ui_ps), + hsbyteclk_ps) - 4; + val = clamp(raw_val, 0, 15); + log_debug("%s: THS_TRAILCNT: 0x%x\n", __func__, val); + tc358768_write(dev, TC358768_THS_TRAILCNT, val); + + val = BIT(0); + for (i = 0; i < device->lanes; i++) + val |= BIT(i + 1); + tc358768_write(dev, TC358768_HSTXVREGEN, val); + + tc358768_write(dev, TC358768_TXOPTIONCNTRL, + (device->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) ? 0 : BIT(0)); + + /* TXTAGOCNT[26:16] RXTASURECNT[10:0] */ + val = tc358768_ps_to_ns((lptxcnt + 1) * hsbyteclk_ps * 4); + val = tc358768_ns_to_cnt(val, hsbyteclk_ps) / 4 - 1; + log_debug("%s: TXTAGOCNT: 0x%x\n", __func__, val); + val2 = tc358768_ns_to_cnt(tc358768_ps_to_ns((lptxcnt + 1) * hsbyteclk_ps), + hsbyteclk_ps) - 2; + log_debug("%s: RXTASURECNT: 0x%x\n", __func__, val2); + val = val << 16 | val2; + tc358768_write(dev, TC358768_BTACNTRL1, val); + + /* START[0] */ + tc358768_write(dev, TC358768_STARTCNTRL, 1); + + if (device->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) { + /* Set pulse mode */ + tc358768_write(dev, TC358768_DSI_EVENT, 0); + + /* vact */ + tc358768_write(dev, TC358768_DSI_VACT, dt->vactive.typ); + /* vsw */ + tc358768_write(dev, TC358768_DSI_VSW, dt->vsync_len.typ); + /* vbp */ + tc358768_write(dev, TC358768_DSI_VBPR, dt->vback_porch.typ); + } else { + /* Set event mode */ + tc358768_write(dev, TC358768_DSI_EVENT, 1); + + /* vact */ + tc358768_write(dev, TC358768_DSI_VACT, dt->vactive.typ); + + /* vsw (+ vbp) */ + tc358768_write(dev, TC358768_DSI_VSW, + dt->vsync_len.typ + dt->vback_porch.typ); + /* vbp (not used in event mode) */ + tc358768_write(dev, TC358768_DSI_VBPR, 0); + } + + /* hsw (bytes) */ + tc358768_write(dev, TC358768_DSI_HSW, dsi_hsw); + + /* hbp (bytes) */ + tc358768_write(dev, TC358768_DSI_HBPR, dsi_hbp); + + /* hact (bytes) */ + tc358768_write(dev, TC358768_DSI_HACT, hact); + + /* VSYNC polarity */ + tc358768_update_bits(dev, TC358768_CONFCTL, BIT(5), + (dt->flags & DISPLAY_FLAGS_VSYNC_HIGH) ? BIT(5) : 0); + + /* HSYNC polarity */ + tc358768_update_bits(dev, TC358768_PP_MISC, BIT(0), + (dt->flags & DISPLAY_FLAGS_HSYNC_LOW) ? BIT(0) : 0); + + /* Start DSI Tx */ + tc358768_write(dev, TC358768_DSI_START, 0x1); + + /* Configure DSI_Control register */ + val = TC358768_DSI_CONFW_MODE_CLR | TC358768_DSI_CONFW_ADDR_DSI_CONTROL; + val |= TC358768_DSI_CONTROL_TXMD | TC358768_DSI_CONTROL_HSCKMD | + 0x3 << 1 | TC358768_DSI_CONTROL_EOTDIS; + tc358768_write(dev, TC358768_DSI_CONFW, val); + + val = TC358768_DSI_CONFW_MODE_SET | TC358768_DSI_CONFW_ADDR_DSI_CONTROL; + val |= (device->lanes - 1) << 1; + + val |= TC358768_DSI_CONTROL_TXMD; + + if (!(device->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)) + val |= TC358768_DSI_CONTROL_HSCKMD; + + /* + * TODO: Actually MIPI_DSI_MODE_NO_EOT_PACKET + * + * Many of the DSI flags have names opposite to their + * actual effects, e.g. MIPI_DSI_MODE_EOT_PACKET means + * that EoT packets will actually be disabled. + */ + if (device->mode_flags & MIPI_DSI_MODE_EOT_PACKET) + val |= TC358768_DSI_CONTROL_EOTDIS; + + tc358768_write(dev, TC358768_DSI_CONFW, val); + + val = TC358768_DSI_CONFW_MODE_CLR | + TC358768_DSI_CONFW_ADDR_DSI_CONTROL | + TC358768_DSI_CONTROL_DIS_MODE; /* DSI mode */ + tc358768_write(dev, TC358768_DSI_CONFW, val); + + /* clear FrmStop and RstPtr */ + tc358768_update_bits(dev, TC358768_PP_MISC, 0x3 << 14, 0); + + /* set PP_en */ + tc358768_update_bits(dev, TC358768_CONFCTL, BIT(6), BIT(6)); + + /* Set up panel configuration */ + return panel_enable_backlight(priv->panel); +} + +static int tc358768_set_backlight(struct udevice *dev, int percent) +{ + struct tc358768_priv *priv = dev_get_priv(dev); + + return panel_set_backlight(priv->panel, percent); +} + +static int tc358768_panel_timings(struct udevice *dev, + struct display_timing *timing) +{ + struct tc358768_priv *priv = dev_get_priv(dev); + + /* Default to positive sync */ + + if (!(priv->timing.flags & + (DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_HSYNC_HIGH))) + priv->timing.flags |= DISPLAY_FLAGS_HSYNC_HIGH; + + if (!(priv->timing.flags & + (DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_VSYNC_HIGH))) + priv->timing.flags |= DISPLAY_FLAGS_VSYNC_HIGH; + + memcpy(timing, &priv->timing, sizeof(*timing)); + + return 0; +} + +static int tc358768_setup(struct udevice *dev) +{ + struct tc358768_priv *priv = dev_get_priv(dev); + struct mipi_dsi_device *device = &priv->device; + struct mipi_dsi_panel_plat *mipi_plat; + int ret; + + /* The bridge uses 16 bit registers */ + ret = i2c_set_chip_offset_len(dev, 2); + if (ret) { + log_debug("%s: set_chip_offset_len failed: %d\n", + __func__, ret); + return ret; + } + + ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, + "panel", &priv->panel); + if (ret) { + log_debug("%s: Cannot get panel: ret=%d\n", __func__, ret); + return log_ret(ret); + } + + panel_get_display_timing(priv->panel, &priv->timing); + + mipi_plat = dev_get_plat(priv->panel); + mipi_plat->device = device; + + priv->host.dev = (struct device *)dev; + priv->host.ops = &tc358768_dsi_host_ops; + + device->host = &priv->host; + device->lanes = mipi_plat->lanes; + device->format = mipi_plat->format; + device->mode_flags = mipi_plat->mode_flags; + + priv->pd_lines = mipi_dsi_pixel_format_to_bpp(device->format); + priv->dsi_lanes = device->lanes; + + /* get regulators */ + ret = device_get_supply_regulator(dev, "vddc-supply", &priv->vddc); + if (ret) { + log_debug("%s: vddc regulator error: %d\n", __func__, ret); + if (ret != -ENOENT) + return log_ret(ret); + } + + ret = device_get_supply_regulator(dev, "vddmipi-supply", &priv->vddmipi); + if (ret) { + log_debug("%s: vddmipi regulator error: %d\n", __func__, ret); + if (ret != -ENOENT) + return log_ret(ret); + } + + ret = device_get_supply_regulator(dev, "vddio-supply", &priv->vddio); + if (ret) { + log_debug("%s: vddio regulator error: %d\n", __func__, ret); + if (ret != -ENOENT) + return log_ret(ret); + } + + /* get clk */ + priv->refclk = devm_clk_get(dev, "refclk"); + if (IS_ERR(priv->refclk)) { + log_debug("%s: Could not get refclk: %ld\n", + __func__, PTR_ERR(priv->refclk)); + return PTR_ERR(priv->refclk); + } + + /* get gpios */ + ret = gpio_request_by_name(dev, "reset-gpios", 0, + &priv->reset_gpio, GPIOD_IS_OUT); + if (ret) { + log_debug("%s: Could not decode reset-gpios (%d)\n", __func__, ret); + return ret; + } + + dm_gpio_set_value(&priv->reset_gpio, 1); + + return 0; +} + +static int tc358768_probe(struct udevice *dev) +{ + if (device_get_uclass_id(dev->parent) != UCLASS_I2C) + return -EPROTONOSUPPORT; + + return tc358768_setup(dev); +} + +struct panel_ops tc358768_ops = { + .enable_backlight = tc358768_attach, + .set_backlight = tc358768_set_backlight, + .get_display_timing = tc358768_panel_timings, +}; + +static const struct udevice_id tc358768_ids[] = { + { .compatible = "toshiba,tc358768" }, + { .compatible = "toshiba,tc358778" }, + { } +}; + +U_BOOT_DRIVER(tc358768) = { + .name = "tc358768", + .id = UCLASS_PANEL, + .of_match = tc358768_ids, + .ops = &tc358768_ops, + .probe = tc358768_probe, + .priv_auto = sizeof(struct tc358768_priv), +}; diff --git a/drivers/video/dw_hdmi.c b/drivers/video/dw_hdmi.c index c4fbb182944..c217af97878 100644 --- a/drivers/video/dw_hdmi.c +++ b/drivers/video/dw_hdmi.c @@ -78,10 +78,10 @@ static void dw_hdmi_write(struct dw_hdmi *hdmi, u8 val, int offset) { switch (hdmi->reg_io_width) { case 1: - writeb(val, hdmi->ioaddr + offset); + writeb(val, (void *)(hdmi->ioaddr + offset)); break; case 4: - writel(val, hdmi->ioaddr + (offset << 2)); + writel(val, (void *)(hdmi->ioaddr + (offset << 2))); break; default: debug("reg_io_width has unsupported width!\n"); @@ -93,9 +93,9 @@ static u8 dw_hdmi_read(struct dw_hdmi *hdmi, int offset) { switch (hdmi->reg_io_width) { case 1: - return readb(hdmi->ioaddr + offset); + return readb((void *)(hdmi->ioaddr + offset)); case 4: - return readl(hdmi->ioaddr + (offset << 2)); + return readl((void *)(hdmi->ioaddr + (offset << 2))); default: debug("reg_io_width has unsupported width!\n"); break; @@ -936,6 +936,22 @@ int dw_hdmi_phy_wait_for_hpd(struct dw_hdmi *hdmi) return -1; } +int dw_hdmi_detect_hpd(struct dw_hdmi *hdmi) +{ + int ret; + + ret = dw_hdmi_phy_wait_for_hpd(hdmi); + if (ret < 0) { + debug("hdmi can not get hpd signal\n"); + return -ENODEV; + } + + if (hdmi->ops && hdmi->ops->read_hpd) + hdmi->ops->read_hpd(hdmi, true); + + return 0; +} + void dw_hdmi_phy_init(struct dw_hdmi *hdmi) { /* enable phy i2cm done irq */ @@ -988,7 +1004,7 @@ int dw_hdmi_enable(struct dw_hdmi *hdmi, const struct display_timing *edid) hdmi_av_composer(hdmi, edid); - ret = hdmi->phy_set(hdmi, edid->pixelclock.typ); + ret = hdmi->ops->phy_set(hdmi, edid->pixelclock.typ); if (ret) return ret; @@ -1009,10 +1025,18 @@ int dw_hdmi_enable(struct dw_hdmi *hdmi, const struct display_timing *edid) return 0; } +static const struct dw_hdmi_phy_ops dw_hdmi_synopsys_phy_ops = { + .phy_set = dw_hdmi_phy_cfg, +}; + void dw_hdmi_init(struct dw_hdmi *hdmi) { uint ih_mute; + /* hook Synopsys PHYs ops */ + if (!hdmi->ops) + hdmi->ops = &dw_hdmi_synopsys_phy_ops; + /* * boot up defaults are: * hdmi_ih_mute = 0x03 (disabled) @@ -1037,4 +1061,7 @@ void dw_hdmi_init(struct dw_hdmi *hdmi) /* enable i2c client nack % arbitration error irq */ hdmi_write(hdmi, ~0x44, HDMI_I2CM_CTLINT); + + if (hdmi->ops && hdmi->ops->setup_hpd) + hdmi->ops->setup_hpd(hdmi); } diff --git a/drivers/video/endeavoru-panel.c b/drivers/video/endeavoru-panel.c index 79a272128b8..1bff641434e 100644 --- a/drivers/video/endeavoru-panel.c +++ b/drivers/video/endeavoru-panel.c @@ -57,61 +57,8 @@ static void dcs_write_one(struct mipi_dsi_device *dsi, u8 cmd, u8 data) static int endeavoru_panel_enable_backlight(struct udevice *dev) { - struct endeavoru_panel_priv *priv = dev_get_priv(dev); - int ret; - - ret = dm_gpio_set_value(&priv->reset_gpio, 1); - if (ret) { - log_err("error changing reset-gpios (%d)\n", ret); - return ret; - } - mdelay(5); - - ret = regulator_set_enable_if_allowed(priv->vddio, 1); - if (ret) { - log_err("error enabling iovcc-supply (%d)\n", ret); - return ret; - } - mdelay(1); - - ret = regulator_set_enable_if_allowed(priv->vdd, 1); - if (ret) { - log_err("error enabling vcc-supply (%d)\n", ret); - return ret; - } - mdelay(20); - - ret = dm_gpio_set_value(&priv->reset_gpio, 0); - if (ret) { - log_err("error changing reset-gpios (%d)\n", ret); - return ret; - } - mdelay(2); - - /* Reset panel */ - ret = dm_gpio_set_value(&priv->reset_gpio, 1); - if (ret) { - log_err("error changing reset-gpios (%d)\n", ret); - return ret; - } - mdelay(1); - - ret = dm_gpio_set_value(&priv->reset_gpio, 0); - if (ret) { - log_err("error changing reset-gpios (%d)\n", ret); - return ret; - } - mdelay(25); - - return 0; -} - -static int endeavoru_panel_set_backlight(struct udevice *dev, int percent) -{ - struct endeavoru_panel_priv *priv = dev_get_priv(dev); struct mipi_dsi_panel_plat *plat = dev_get_plat(dev); struct mipi_dsi_device *dsi = plat->device; - int ret; dcs_write_one(dsi, 0xc2, 0x08); @@ -160,18 +107,22 @@ static int endeavoru_panel_set_backlight(struct udevice *dev, int percent) dcs_write_one(dsi, 0x55, 0x80); dcs_write_one(dsi, 0x5e, 0x06); - ret = backlight_enable(priv->backlight); - if (ret) - return ret; - /* Set backlight */ dcs_write_one(dsi, 0x51, 0x96); - ret = backlight_set_brightness(priv->backlight, percent); + return 0; +} + +static int endeavoru_panel_set_backlight(struct udevice *dev, int percent) +{ + struct endeavoru_panel_priv *priv = dev_get_priv(dev); + int ret; + + ret = backlight_enable(priv->backlight); if (ret) return ret; - return 0; + return backlight_set_brightness(priv->backlight, percent); } static int endeavoru_panel_timings(struct udevice *dev, @@ -217,6 +168,63 @@ static int endeavoru_panel_of_to_plat(struct udevice *dev) return 0; } +static int endeavoru_panel_hw_init(struct udevice *dev) +{ + struct endeavoru_panel_priv *priv = dev_get_priv(dev); + int ret; + + ret = dm_gpio_set_value(&priv->reset_gpio, 1); + if (ret) { + log_debug("%s: error changing reset-gpios (%d)\n", + __func__, ret); + return ret; + } + mdelay(5); + + ret = regulator_set_enable_if_allowed(priv->vddio, 1); + if (ret) { + log_debug("%s: error enabling iovcc-supply (%d)\n", + __func__, ret); + return ret; + } + mdelay(1); + + ret = regulator_set_enable_if_allowed(priv->vdd, 1); + if (ret) { + log_debug("%s: error enabling vcc-supply (%d)\n", + __func__, ret); + return ret; + } + mdelay(20); + + ret = dm_gpio_set_value(&priv->reset_gpio, 0); + if (ret) { + log_debug("%s: error changing reset-gpios (%d)\n", + __func__, ret); + return ret; + } + mdelay(2); + + /* Reset panel */ + ret = dm_gpio_set_value(&priv->reset_gpio, 1); + if (ret) { + log_debug("%s: error changing reset-gpios (%d)\n", + __func__, ret); + return ret; + } + mdelay(1); + + ret = dm_gpio_set_value(&priv->reset_gpio, 0); + if (ret) { + log_debug("%s: error changing reset-gpios (%d)\n", + __func__, ret); + return ret; + } + mdelay(25); + + return 0; +} + static int endeavoru_panel_probe(struct udevice *dev) { struct mipi_dsi_panel_plat *plat = dev_get_plat(dev); @@ -226,7 +234,7 @@ static int endeavoru_panel_probe(struct udevice *dev) plat->format = MIPI_DSI_FMT_RGB888; plat->mode_flags = MIPI_DSI_MODE_VIDEO; - return 0; + return endeavoru_panel_hw_init(dev); } static const struct panel_ops endeavoru_panel_ops = { diff --git a/drivers/video/lg-ld070wx3.c b/drivers/video/lg-ld070wx3.c new file mode 100644 index 00000000000..610a06ffe7b --- /dev/null +++ b/drivers/video/lg-ld070wx3.c @@ -0,0 +1,186 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * LG LD070WX3-SL01 DSI panel driver + * + * Copyright (c) 2023 Svyatoslav Ryhel <clamor95@gmail.com> + */ + +#include <backlight.h> +#include <dm.h> +#include <panel.h> +#include <log.h> +#include <mipi_dsi.h> +#include <linux/delay.h> +#include <power/regulator.h> + +struct lg_ld070wx3_priv { + struct udevice *vdd; + struct udevice *vcc; + + struct udevice *backlight; +}; + +static struct display_timing default_timing = { + .pixelclock.typ = 70000000, + .hactive.typ = 800, + .hfront_porch.typ = 32, + .hback_porch.typ = 48, + .hsync_len.typ = 8, + .vactive.typ = 1280, + .vfront_porch.typ = 5, + .vback_porch.typ = 3, + .vsync_len.typ = 1, +}; + +static void dcs_write_one(struct mipi_dsi_device *dsi, u8 cmd, u8 data) +{ + mipi_dsi_dcs_write(dsi, cmd, &data, 1); +} + +static int lg_ld070wx3_enable_backlight(struct udevice *dev) +{ + struct mipi_dsi_panel_plat *plat = dev_get_plat(dev); + struct mipi_dsi_device *dsi = plat->device; + int ret; + + ret = mipi_dsi_dcs_soft_reset(dsi); + if (ret < 0) { + log_debug("%s: failed to soft reset panel: %d\n", + __func__, ret); + return ret; + } + + /* Delay before sending new command after soft reset */ + mdelay(20); + + /* Differential input impedance selection */ + dcs_write_one(dsi, 0xAE, 0x0B); + + /* Enter test mode 1 and 2*/ + dcs_write_one(dsi, 0xEE, 0xEA); + dcs_write_one(dsi, 0xEF, 0x5F); + + /* Increased MIPI CLK driving ability */ + dcs_write_one(dsi, 0xF2, 0x68); + + /* Exit test mode 1 and 2 */ + dcs_write_one(dsi, 0xEE, 0x00); + dcs_write_one(dsi, 0xEF, 0x00); + + return 0; +} + +static int lg_ld070wx3_set_backlight(struct udevice *dev, int percent) +{ + struct lg_ld070wx3_priv *priv = dev_get_priv(dev); + int ret; + + ret = backlight_enable(priv->backlight); + if (ret) + return ret; + + return backlight_set_brightness(priv->backlight, percent); +} + +static int lg_ld070wx3_timings(struct udevice *dev, + struct display_timing *timing) +{ + memcpy(timing, &default_timing, sizeof(*timing)); + return 0; +} + +static int lg_ld070wx3_of_to_plat(struct udevice *dev) +{ + struct lg_ld070wx3_priv *priv = dev_get_priv(dev); + int ret; + + ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev, + "backlight", &priv->backlight); + if (ret) { + log_debug("%s: cannot get backlight: ret = %d\n", + __func__, ret); + return ret; + } + + ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev, + "vdd-supply", &priv->vdd); + if (ret) { + log_debug("%s: cannot get vdd-supply: ret = %d\n", + __func__, ret); + return ret; + } + + ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev, + "vcc-supply", &priv->vcc); + if (ret) { + log_debug("%s: cannot get vcc-supply: ret = %d\n", + __func__, ret); + return ret; + } + + return 0; +} + +static int lg_ld070wx3_hw_init(struct udevice *dev) +{ + struct lg_ld070wx3_priv *priv = dev_get_priv(dev); + int ret; + + ret = regulator_set_enable_if_allowed(priv->vcc, 1); + if (ret) { + log_debug("%s: enabling vcc-supply failed (%d)\n", + __func__, ret); + return ret; + } + + ret = regulator_set_enable_if_allowed(priv->vdd, 1); + if (ret) { + log_debug("%s: enabling vdd-supply failed (%d)\n", + __func__, ret); + return ret; + } + + /* + * According to spec delay between enabling supply is 0, + * for regulators to reach required voltage ~5ms needed. + * MIPI interface signal for setup requires additional + * 110ms which in total results in 115ms. + */ + mdelay(115); + + return 0; +} + +static int lg_ld070wx3_probe(struct udevice *dev) +{ + struct mipi_dsi_panel_plat *plat = dev_get_plat(dev); + + /* fill characteristics of DSI data link */ + plat->lanes = 4; + plat->format = MIPI_DSI_FMT_RGB888; + plat->mode_flags = MIPI_DSI_MODE_VIDEO; + + return lg_ld070wx3_hw_init(dev); +} + +static const struct panel_ops lg_ld070wx3_ops = { + .enable_backlight = lg_ld070wx3_enable_backlight, + .set_backlight = lg_ld070wx3_set_backlight, + .get_display_timing = lg_ld070wx3_timings, +}; + +static const struct udevice_id lg_ld070wx3_ids[] = { + { .compatible = "lg,ld070wx3-sl01" }, + { } +}; + +U_BOOT_DRIVER(lg_ld070wx3) = { + .name = "lg_ld070wx3", + .id = UCLASS_PANEL, + .of_match = lg_ld070wx3_ids, + .ops = &lg_ld070wx3_ops, + .of_to_plat = lg_ld070wx3_of_to_plat, + .probe = lg_ld070wx3_probe, + .plat_auto = sizeof(struct mipi_dsi_panel_plat), + .priv_auto = sizeof(struct lg_ld070wx3_priv), +}; diff --git a/drivers/video/meson/meson_dw_hdmi.c b/drivers/video/meson/meson_dw_hdmi.c index 5db01904b53..259af1b4571 100644 --- a/drivers/video/meson/meson_dw_hdmi.c +++ b/drivers/video/meson/meson_dw_hdmi.c @@ -375,6 +375,10 @@ static int meson_dw_hdmi_wait_hpd(struct dw_hdmi *hdmi) return -ETIMEDOUT; } +static const struct dw_hdmi_phy_ops dw_hdmi_meson_phy_ops = { + .phy_set = meson_dw_hdmi_phy_init, +}; + static int meson_dw_hdmi_probe(struct udevice *dev) { struct meson_dw_hdmi *priv = dev_get_priv(dev); @@ -397,7 +401,7 @@ static int meson_dw_hdmi_probe(struct udevice *dev) priv->hdmi.hdmi_data.enc_out_bus_format = MEDIA_BUS_FMT_RGB888_1X24; priv->hdmi.hdmi_data.enc_in_bus_format = MEDIA_BUS_FMT_YUV8_1X24; - priv->hdmi.phy_set = meson_dw_hdmi_phy_init; + priv->hdmi.ops = &dw_hdmi_meson_phy_ops; if (meson_hdmi_is_compatible(priv, HDMI_COMPATIBLE_G12A)) priv->hdmi.reg_io_width = 1; else { diff --git a/drivers/video/renesas-r61307.c b/drivers/video/renesas-r61307.c index 426fdc6224a..3f5859055c9 100644 --- a/drivers/video/renesas-r61307.c +++ b/drivers/video/renesas-r61307.c @@ -19,7 +19,7 @@ #include <power/regulator.h> /* - * The datasheet is not publicly available, all values are + * The datasheet is not publicly available, all values are * taken from the downstream. If you have access to datasheets, * corrections are welcome. */ @@ -120,42 +120,6 @@ static struct display_timing default_timing = { static int renesas_r61307_enable_backlight(struct udevice *dev) { struct renesas_r61307_priv *priv = dev_get_priv(dev); - int ret; - - ret = regulator_set_enable_if_allowed(priv->vcc, 1); - if (ret) { - log_err("enabling vcc-supply failed (%d)\n", ret); - return ret; - } - mdelay(5); - - ret = regulator_set_enable_if_allowed(priv->iovcc, 1); - if (ret) { - log_err("enabling iovcc-supply failed (%d)\n", ret); - return ret; - } - - ret = dm_gpio_set_value(&priv->reset_gpio, 0); - if (ret) { - log_err("changing reset-gpio failed (%d)\n", ret); - return ret; - } - mdelay(5); - - ret = dm_gpio_set_value(&priv->reset_gpio, 1); - if (ret) { - log_err("changing reset-gpio failed (%d)\n", ret); - return ret; - } - - mdelay(5); - - return 0; -} - -static int renesas_r61307_set_backlight(struct udevice *dev, int percent) -{ - struct renesas_r61307_priv *priv = dev_get_priv(dev); struct mipi_dsi_panel_plat *plat = dev_get_plat(dev); struct mipi_dsi_device *dsi = plat->device; int ret; @@ -205,18 +169,23 @@ static int renesas_r61307_set_backlight(struct udevice *dev, int percent) log_err("failed to set display on: %d\n", ret); return ret; } - mdelay(50); + return 0; +} + +static int renesas_r61307_set_backlight(struct udevice *dev, int percent) +{ + struct renesas_r61307_priv *priv = dev_get_priv(dev); + int ret; + ret = backlight_enable(priv->backlight); if (ret) return ret; - ret = backlight_set_brightness(priv->backlight, percent); - if (ret) - return ret; + mdelay(5); - return 0; + return backlight_set_brightness(priv->backlight, percent); } static int renesas_r61307_timings(struct udevice *dev, @@ -266,6 +235,46 @@ static int renesas_r61307_of_to_plat(struct udevice *dev) return 0; } +static int renesas_r61307_hw_init(struct udevice *dev) +{ + struct renesas_r61307_priv *priv = dev_get_priv(dev); + int ret; + + ret = regulator_set_enable_if_allowed(priv->vcc, 1); + if (ret) { + log_debug("%s: enabling vcc-supply failed (%d)\n", + __func__, ret); + return ret; + } + mdelay(5); + + ret = regulator_set_enable_if_allowed(priv->iovcc, 1); + if (ret) { + log_debug("%s: enabling iovcc-supply failed (%d)\n", + __func__, ret); + return ret; + } + + ret = dm_gpio_set_value(&priv->reset_gpio, 0); + if (ret) { + log_debug("%s: changing reset-gpio failed (%d)\n", + __func__, ret); + return ret; + } + mdelay(5); + + ret = dm_gpio_set_value(&priv->reset_gpio, 1); + if (ret) { + log_debug("%s: changing reset-gpio failed (%d)\n", + __func__, ret); + return ret; + } + + mdelay(5); + + return 0; +} + static int renesas_r61307_probe(struct udevice *dev) { struct mipi_dsi_panel_plat *plat = dev_get_plat(dev); @@ -275,7 +284,7 @@ static int renesas_r61307_probe(struct udevice *dev) plat->format = MIPI_DSI_FMT_RGB888; plat->mode_flags = MIPI_DSI_MODE_VIDEO; - return 0; + return renesas_r61307_hw_init(dev); } static const struct panel_ops renesas_r61307_ops = { diff --git a/drivers/video/renesas-r69328.c b/drivers/video/renesas-r69328.c index d2f71694681..082f5bc3d0a 100644 --- a/drivers/video/renesas-r69328.c +++ b/drivers/video/renesas-r69328.c @@ -19,7 +19,7 @@ #include <power/regulator.h> /* - * The datasheet is not publicly available, all values are + * The datasheet is not publicly available, all values are * taken from the downstream. If you have access to datasheets, * corrections are welcome. */ @@ -65,37 +65,6 @@ static struct display_timing default_timing = { static int renesas_r69328_enable_backlight(struct udevice *dev) { - struct renesas_r69328_priv *priv = dev_get_priv(dev); - int ret; - - ret = dm_gpio_set_value(&priv->enable_gpio, 1); - if (ret) { - log_err("error changing enable-gpios (%d)\n", ret); - return ret; - } - mdelay(5); - - ret = dm_gpio_set_value(&priv->reset_gpio, 0); - if (ret) { - log_err("error changing reset-gpios (%d)\n", ret); - return ret; - } - mdelay(5); - - ret = dm_gpio_set_value(&priv->reset_gpio, 1); - if (ret) { - log_err("error changing reset-gpios (%d)\n", ret); - return ret; - } - - mdelay(5); - - return 0; -} - -static int renesas_r69328_set_backlight(struct udevice *dev, int percent) -{ - struct renesas_r69328_priv *priv = dev_get_priv(dev); struct mipi_dsi_panel_plat *plat = dev_get_plat(dev); struct mipi_dsi_device *dsi = plat->device; int ret; @@ -153,18 +122,23 @@ static int renesas_r69328_set_backlight(struct udevice *dev, int percent) log_err("failed to set display on: %d\n", ret); return ret; } - mdelay(50); + return 0; +} + +static int renesas_r69328_set_backlight(struct udevice *dev, int percent) +{ + struct renesas_r69328_priv *priv = dev_get_priv(dev); + int ret; + ret = backlight_enable(priv->backlight); if (ret) return ret; - ret = backlight_set_brightness(priv->backlight, percent); - if (ret) - return ret; + mdelay(5); - return 0; + return backlight_set_brightness(priv->backlight, percent); } static int renesas_r69328_timings(struct udevice *dev, @@ -203,6 +177,39 @@ static int renesas_r69328_of_to_plat(struct udevice *dev) return 0; } +static int renesas_r69328_hw_init(struct udevice *dev) +{ + struct renesas_r69328_priv *priv = dev_get_priv(dev); + int ret; + + ret = dm_gpio_set_value(&priv->enable_gpio, 1); + if (ret) { + log_debug("%s: error changing enable-gpios (%d)\n", + __func__, ret); + return ret; + } + mdelay(5); + + ret = dm_gpio_set_value(&priv->reset_gpio, 0); + if (ret) { + log_debug("%s: error changing reset-gpios (%d)\n", + __func__, ret); + return ret; + } + mdelay(5); + + ret = dm_gpio_set_value(&priv->reset_gpio, 1); + if (ret) { + log_debug("%s: error changing reset-gpios (%d)\n", + __func__, ret); + return ret; + } + + mdelay(5); + + return 0; +} + static int renesas_r69328_probe(struct udevice *dev) { struct mipi_dsi_panel_plat *plat = dev_get_plat(dev); @@ -212,7 +219,7 @@ static int renesas_r69328_probe(struct udevice *dev) plat->format = MIPI_DSI_FMT_RGB888; plat->mode_flags = MIPI_DSI_MODE_VIDEO; - return 0; + return renesas_r69328_hw_init(dev); } static const struct panel_ops renesas_r69328_ops = { diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile index 8128289cc82..f55beceebf1 100644 --- a/drivers/video/rockchip/Makefile +++ b/drivers/video/rockchip/Makefile @@ -6,10 +6,12 @@ ifdef CONFIG_VIDEO_ROCKCHIP obj-y += rk_vop.o obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288_vop.o +obj-$(CONFIG_ROCKCHIP_RK3328) += rk3328_vop.o obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399_vop.o obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o obj-hdmi-$(CONFIG_ROCKCHIP_RK3288) += rk3288_hdmi.o +obj-hdmi-$(CONFIG_ROCKCHIP_RK3328) += rk3328_hdmi.o obj-hdmi-$(CONFIG_ROCKCHIP_RK3399) += rk3399_hdmi.o obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o $(obj-hdmi-y) obj-mipi-$(CONFIG_ROCKCHIP_RK3288) += rk3288_mipi.o diff --git a/drivers/video/rockchip/rk3328_hdmi.c b/drivers/video/rockchip/rk3328_hdmi.c new file mode 100644 index 00000000000..763669c09be --- /dev/null +++ b/drivers/video/rockchip/rk3328_hdmi.c @@ -0,0 +1,126 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd. + */ + +#include <clk.h> +#include <display.h> +#include <dm.h> +#include <dw_hdmi.h> +#include <asm/io.h> +#include <asm/arch-rockchip/grf_rk3328.h> +#include "rk_hdmi.h" + +#define RK3328_IO_3V_DOMAIN (7 << (9 + 16)) +#define RK3328_IO_5V_DOMAIN ((7 << 9) | (3 << (9 + 16))) +#define RK3328_IO_DDC_IN_MSK ((3 << 10) | (3 << (10 + 16))) +#define RK3328_IO_CTRL_BY_HDMI ((1 << 13) | (1 << (13 + 16))) + +static int rk3328_hdmi_enable(struct udevice *dev, int panel_bpp, + const struct display_timing *edid) +{ + struct rk_hdmi_priv *priv = dev_get_priv(dev); + + return dw_hdmi_enable(&priv->hdmi, edid); +} + +static int rk3328_dw_hdmi_phy_cfg(struct dw_hdmi *hdmi, uint pixclock) +{ + struct rk_hdmi_priv *priv = container_of(hdmi, struct rk_hdmi_priv, hdmi); + int ret; + + ret = generic_phy_init(&priv->phy); + if (ret) { + printf("failed to init phy (ret=%d)\n", ret); + return ret; + } + + ret = generic_phy_power_on(&priv->phy); + if (ret) { + printf("failed to power on phy (ret=%d)\n", ret); + return ret; + } + + return 0; +} + +static void rk3328_dw_hdmi_setup_hpd(struct dw_hdmi *hdmi) +{ + struct rk_hdmi_priv *priv = container_of(hdmi, struct rk_hdmi_priv, hdmi); + struct rk3328_grf_regs *grf = priv->grf; + + writel(RK3328_IO_DDC_IN_MSK, &grf->soc_con[2]); + writel(RK3328_IO_CTRL_BY_HDMI, &grf->soc_con[3]); +} + +static void rk3328_dw_hdmi_read_hpd(struct dw_hdmi *hdmi, bool hpd_status) +{ + struct rk_hdmi_priv *priv = container_of(hdmi, struct rk_hdmi_priv, hdmi); + struct rk3328_grf_regs *grf = priv->grf; + + if (hpd_status) + writel(RK3328_IO_5V_DOMAIN, &grf->soc_con[4]); + else + writel(RK3328_IO_3V_DOMAIN, &grf->soc_con[4]); +} + +static const struct dw_hdmi_phy_ops dw_hdmi_rk3328_phy_ops = { + .phy_set = rk3328_dw_hdmi_phy_cfg, + .setup_hpd = rk3328_dw_hdmi_setup_hpd, + .read_hpd = rk3328_dw_hdmi_read_hpd, +}; + +static int rk3328_hdmi_of_to_plat(struct udevice *dev) +{ + struct rk_hdmi_priv *priv = dev_get_priv(dev); + struct dw_hdmi *hdmi = &priv->hdmi; + + hdmi->i2c_clk_high = 0x71; + hdmi->i2c_clk_low = 0x76; + + rk_hdmi_of_to_plat(dev); + + hdmi->ops = &dw_hdmi_rk3328_phy_ops; + + return 0; +} + +static int rk3328_hdmi_probe(struct udevice *dev) +{ + struct rk_hdmi_priv *priv = dev_get_priv(dev); + int ret; + + ret = generic_phy_get_by_name(dev, "hdmi", &priv->phy); + if (ret) { + printf("failed to get hdmi phy\n"); + return ret; + }; + + ret = rk_hdmi_probe(dev); + if (ret) { + printf("failed to probe rk hdmi\n"); + return ret; + } + + return 0; +} + +static const struct dm_display_ops rk3328_hdmi_ops = { + .read_edid = rk_hdmi_read_edid, + .enable = rk3328_hdmi_enable, +}; + +static const struct udevice_id rk3328_hdmi_ids[] = { + { .compatible = "rockchip,rk3328-dw-hdmi" }, + { } +}; + +U_BOOT_DRIVER(rk3328_hdmi_rockchip) = { + .name = "rk3328_hdmi_rockchip", + .id = UCLASS_DISPLAY, + .of_match = rk3328_hdmi_ids, + .ops = &rk3328_hdmi_ops, + .of_to_plat = rk3328_hdmi_of_to_plat, + .probe = rk3328_hdmi_probe, + .priv_auto = sizeof(struct rk_hdmi_priv), +}; diff --git a/drivers/video/rockchip/rk3328_vop.c b/drivers/video/rockchip/rk3328_vop.c new file mode 100644 index 00000000000..55233f19eeb --- /dev/null +++ b/drivers/video/rockchip/rk3328_vop.c @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd. + */ + +#include <dm.h> +#include <video.h> +#include <asm/io.h> +#include "rk_vop.h" + +DECLARE_GLOBAL_DATA_PTR; + +static void rk3328_set_pin_polarity(struct udevice *dev, + enum vop_modes mode, u32 polarity) +{ + struct rk_vop_priv *priv = dev_get_priv(dev); + struct rk3288_vop *regs = priv->regs; + + switch (mode) { + case VOP_MODE_HDMI: + clrsetbits_le32(®s->dsp_ctrl1, + M_RK3399_DSP_HDMI_POL, + V_RK3399_DSP_HDMI_POL(polarity)); + break; + default: + debug("%s: unsupported output mode %x\n", __func__, mode); + } +} + +static int rk3328_vop_probe(struct udevice *dev) +{ + /* Before relocation we don't need to do anything */ + if (!(gd->flags & GD_FLG_RELOC)) + return 0; + + return rk_vop_probe(dev); +} + +static int rk3328_vop_remove(struct udevice *dev) +{ + struct rk_vop_priv *priv = dev_get_priv(dev); + struct rk3288_vop *regs = priv->regs; + struct rk3288_vop *win_regs = priv->regs + priv->win_offset; + + /* FIXME: Explicit disabling of WIN0 is needed to avoid iommu + * page-fault in Linux, better handling of iommu-address in + * Linux might drop this. + */ + clrbits_le32(&win_regs->win0_ctrl0, M_WIN0_EN); + writel(0x01, ®s->reg_cfg_done); + + return 0; +} + +struct rkvop_driverdata rk3328_driverdata = { + .dsp_offset = 0x490, + .win_offset = 0xd0, + .features = VOP_FEATURE_OUTPUT_10BIT, + .set_pin_polarity = rk3328_set_pin_polarity, +}; + +static const struct udevice_id rk3328_vop_ids[] = { + { + .compatible = "rockchip,rk3328-vop", + .data = (ulong)&rk3328_driverdata + }, + { /* sentile */ } +}; + +static const struct video_ops rk3328_vop_ops = { +}; + +U_BOOT_DRIVER(rk3328_vop) = { + .name = "rk3328_vop", + .id = UCLASS_VIDEO, + .of_match = rk3328_vop_ids, + .ops = &rk3328_vop_ops, + .bind = rk_vop_bind, + .probe = rk3328_vop_probe, + .remove = rk3328_vop_remove, + .priv_auto = sizeof(struct rk_vop_priv), + .flags = DM_FLAG_PRE_RELOC | DM_FLAG_OS_PREPARE, +}; diff --git a/drivers/video/rockchip/rk_hdmi.c b/drivers/video/rockchip/rk_hdmi.c index 044a29ee47a..d31f6a4ff81 100644 --- a/drivers/video/rockchip/rk_hdmi.c +++ b/drivers/video/rockchip/rk_hdmi.c @@ -89,7 +89,6 @@ int rk_hdmi_of_to_plat(struct udevice *dev) /* hdmi->i2c_clk_{high,low} are set up by the SoC driver */ hdmi->reg_io_width = 4; - hdmi->phy_set = dw_hdmi_phy_cfg; priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); @@ -111,14 +110,12 @@ int rk_hdmi_probe(struct udevice *dev) struct dw_hdmi *hdmi = &priv->hdmi; int ret; - ret = dw_hdmi_phy_wait_for_hpd(hdmi); - if (ret < 0) { - debug("hdmi can not get hpd signal\n"); - return -1; - } - dw_hdmi_init(hdmi); dw_hdmi_phy_init(hdmi); + ret = dw_hdmi_detect_hpd(hdmi); + if (ret < 0) + return ret; + return 0; } diff --git a/drivers/video/rockchip/rk_hdmi.h b/drivers/video/rockchip/rk_hdmi.h index 200dbaea740..dcfba3d3d7e 100644 --- a/drivers/video/rockchip/rk_hdmi.h +++ b/drivers/video/rockchip/rk_hdmi.h @@ -6,6 +6,8 @@ #ifndef __RK_HDMI_H__ #define __RK_HDMI_H__ +#include <generic-phy.h> + struct rkhdmi_driverdata { /* configuration */ u8 i2c_clk_high; @@ -19,6 +21,7 @@ struct rkhdmi_driverdata { struct rk_hdmi_priv { struct dw_hdmi hdmi; + struct phy phy; void *grf; }; diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c index c514e2a0e44..acc02e5d7c7 100644 --- a/drivers/video/rockchip/rk_vop.c +++ b/drivers/video/rockchip/rk_vop.c @@ -39,11 +39,14 @@ enum vop_pol { DCLK_INVERT = 3 }; -static void rkvop_enable(struct udevice *dev, struct rk3288_vop *regs, ulong fbbase, +static void rkvop_enable(struct udevice *dev, ulong fbbase, int fb_bits_per_pixel, const struct display_timing *edid, struct reset_ctl *dclk_rst) { + struct rk_vop_priv *priv = dev_get_priv(dev); + struct rk3288_vop *regs = priv->regs; + struct rk3288_vop *win_regs = priv->regs + priv->win_offset; u32 lb_mode; u32 rgb_mode; u32 hactive = edid->hactive.typ; @@ -51,32 +54,32 @@ static void rkvop_enable(struct udevice *dev, struct rk3288_vop *regs, ulong fbb int ret; writel(V_ACT_WIDTH(hactive - 1) | V_ACT_HEIGHT(vactive - 1), - ®s->win0_act_info); + &win_regs->win0_act_info); writel(V_DSP_XST(edid->hsync_len.typ + edid->hback_porch.typ) | V_DSP_YST(edid->vsync_len.typ + edid->vback_porch.typ), - ®s->win0_dsp_st); + &win_regs->win0_dsp_st); writel(V_DSP_WIDTH(hactive - 1) | V_DSP_HEIGHT(vactive - 1), - ®s->win0_dsp_info); + &win_regs->win0_dsp_info); - clrsetbits_le32(®s->win0_color_key, M_WIN0_KEY_EN | M_WIN0_KEY_COLOR, + clrsetbits_le32(&win_regs->win0_color_key, M_WIN0_KEY_EN | M_WIN0_KEY_COLOR, V_WIN0_KEY_EN(0) | V_WIN0_KEY_COLOR(0)); switch (fb_bits_per_pixel) { case 16: rgb_mode = RGB565; - writel(V_RGB565_VIRWIDTH(hactive), ®s->win0_vir); + writel(V_RGB565_VIRWIDTH(hactive), &win_regs->win0_vir); break; case 24: rgb_mode = RGB888; - writel(V_RGB888_VIRWIDTH(hactive), ®s->win0_vir); + writel(V_RGB888_VIRWIDTH(hactive), &win_regs->win0_vir); break; case 32: default: rgb_mode = ARGB8888; - writel(V_ARGB888_VIRWIDTH(hactive), ®s->win0_vir); + writel(V_ARGB888_VIRWIDTH(hactive), &win_regs->win0_vir); break; } @@ -89,12 +92,12 @@ static void rkvop_enable(struct udevice *dev, struct rk3288_vop *regs, ulong fbb else lb_mode = LB_RGB_1280X8; - clrsetbits_le32(®s->win0_ctrl0, + clrsetbits_le32(&win_regs->win0_ctrl0, M_WIN0_LB_MODE | M_WIN0_DATA_FMT | M_WIN0_EN, V_WIN0_LB_MODE(lb_mode) | V_WIN0_DATA_FMT(rgb_mode) | V_WIN0_EN(1)); - writel(fbbase, ®s->win0_yrgb_mst); + writel(fbbase, &win_regs->win0_yrgb_mst); writel(0x01, ®s->reg_cfg_done); /* enable reg config */ ret = reset_assert(dclk_rst); @@ -162,6 +165,7 @@ static void rkvop_mode_set(struct udevice *dev, { struct rk_vop_priv *priv = dev_get_priv(dev); struct rk3288_vop *regs = priv->regs; + struct rk3288_vop *dsp_regs = priv->regs + priv->dsp_offset; struct rkvop_driverdata *data = (struct rkvop_driverdata *)dev_get_driver_data(dev); @@ -195,27 +199,27 @@ static void rkvop_mode_set(struct udevice *dev, writel(V_HSYNC(hsync_len) | V_HORPRD(hsync_len + hback_porch + hactive + hfront_porch), - ®s->dsp_htotal_hs_end); + &dsp_regs->dsp_htotal_hs_end); writel(V_HEAP(hsync_len + hback_porch + hactive) | V_HASP(hsync_len + hback_porch), - ®s->dsp_hact_st_end); + &dsp_regs->dsp_hact_st_end); writel(V_VSYNC(vsync_len) | V_VERPRD(vsync_len + vback_porch + vactive + vfront_porch), - ®s->dsp_vtotal_vs_end); + &dsp_regs->dsp_vtotal_vs_end); writel(V_VAEP(vsync_len + vback_porch + vactive)| V_VASP(vsync_len + vback_porch), - ®s->dsp_vact_st_end); + &dsp_regs->dsp_vact_st_end); writel(V_HEAP(hsync_len + hback_porch + hactive) | V_HASP(hsync_len + hback_porch), - ®s->post_dsp_hact_info); + &dsp_regs->post_dsp_hact_info); writel(V_VAEP(vsync_len + vback_porch + vactive)| V_VASP(vsync_len + vback_porch), - ®s->post_dsp_vact_info); + &dsp_regs->post_dsp_vact_info); writel(0x01, ®s->reg_cfg_done); /* enable reg config */ } @@ -243,9 +247,7 @@ static void rkvop_mode_set(struct udevice *dev, static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) { struct video_priv *uc_priv = dev_get_uclass_priv(dev); - struct rk_vop_priv *priv = dev_get_priv(dev); int vop_id, remote_vop_id; - struct rk3288_vop *regs = priv->regs; struct display_timing timing; struct udevice *disp; int ret; @@ -380,7 +382,7 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) return ret; } - rkvop_enable(dev, regs, fbbase, 1 << l2bpp, &timing, &dclk_rst); + rkvop_enable(dev, fbbase, 1 << l2bpp, &timing, &dclk_rst); ret = display_enable(disp, 1 << l2bpp, &timing); if (ret) @@ -415,6 +417,8 @@ int rk_vop_probe(struct udevice *dev) { struct video_uc_plat *plat = dev_get_uclass_plat(dev); struct rk_vop_priv *priv = dev_get_priv(dev); + struct rkvop_driverdata *ops = + (struct rkvop_driverdata *)dev_get_driver_data(dev); int ret = 0; ofnode port, node; struct reset_ctl ahb_rst; @@ -448,6 +452,8 @@ int rk_vop_probe(struct udevice *dev) #endif priv->regs = dev_read_addr_ptr(dev); + priv->win_offset = ops->win_offset; + priv->dsp_offset = ops->dsp_offset; /* * Try all the ports until we find one that works. In practice this diff --git a/drivers/video/rockchip/rk_vop.h b/drivers/video/rockchip/rk_vop.h index 0528fb23f59..eba68d87c4b 100644 --- a/drivers/video/rockchip/rk_vop.h +++ b/drivers/video/rockchip/rk_vop.h @@ -11,6 +11,8 @@ struct rk_vop_priv { void *grf; void *regs; + int win_offset; + int dsp_offset; }; enum vop_features { @@ -18,6 +20,8 @@ enum vop_features { }; struct rkvop_driverdata { + int win_offset; + int dsp_offset; /* configuration */ u32 features; /* block-specific setters/getters */ diff --git a/drivers/video/samsung-ltl106hl02.c b/drivers/video/samsung-ltl106hl02.c new file mode 100644 index 00000000000..5e6c11c4be3 --- /dev/null +++ b/drivers/video/samsung-ltl106hl02.c @@ -0,0 +1,157 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Samsung LTL106HL02-001 DSI panel driver + * + * Copyright (c) 2020 Anton Bambura <jenneron@protonmail.com> + * Copyright (c) 2023 Svyatoslav Ryhel <clamor95@gmail.com> + * Copyright (c) 2024 Jonas Schwöbel <jonasschwoebel@yahoo.de> + */ + +#include <backlight.h> +#include <dm.h> +#include <panel.h> +#include <log.h> +#include <mipi_dsi.h> +#include <asm/gpio.h> +#include <linux/delay.h> +#include <power/regulator.h> + +struct samsung_ltl106hl02_priv { + struct udevice *vdd; + struct udevice *backlight; + + struct gpio_desc reset_gpio; +}; + +static struct display_timing default_timing = { + .pixelclock.typ = 137000000, + .hactive.typ = 1920, + .hfront_porch.typ = 32, + .hback_porch.typ = 64, + .hsync_len.typ = 32, + .vactive.typ = 1080, + .vfront_porch.typ = 2, + .vback_porch.typ = 26, + .vsync_len.typ = 3, +}; + +static int samsung_ltl106hl02_enable_backlight(struct udevice *dev) +{ + struct mipi_dsi_panel_plat *plat = dev_get_plat(dev); + struct mipi_dsi_device *dsi = plat->device; + int ret; + + ret = mipi_dsi_dcs_exit_sleep_mode(dsi); + if (ret < 0) { + log_debug("%s: failed to exit sleep mode: %d\n", + __func__, ret); + return ret; + } + mdelay(70); + + ret = mipi_dsi_dcs_set_display_on(dsi); + if (ret < 0) { + log_debug("%s: failed to enable display: %d\n", + __func__, ret); + return ret; + } + mdelay(5); + + return 0; +} + +static int samsung_ltl106hl02_set_backlight(struct udevice *dev, int percent) +{ + struct samsung_ltl106hl02_priv *priv = dev_get_priv(dev); + int ret; + + ret = backlight_enable(priv->backlight); + if (ret) + return ret; + + return backlight_set_brightness(priv->backlight, percent); +} + +static int samsung_ltl106hl02_timings(struct udevice *dev, + struct display_timing *timing) +{ + memcpy(timing, &default_timing, sizeof(*timing)); + return 0; +} + +static int samsung_ltl106hl02_of_to_plat(struct udevice *dev) +{ + struct samsung_ltl106hl02_priv *priv = dev_get_priv(dev); + int ret; + + ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev, + "backlight", &priv->backlight); + if (ret) { + log_debug("%s: cannot get backlight: ret = %d\n", + __func__, ret); + return ret; + } + + ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev, + "vdd-supply", &priv->vdd); + if (ret) + log_debug("%s: cannot get vdd-supply: error %d\n", + __func__, ret); + + ret = gpio_request_by_name(dev, "reset-gpios", 0, + &priv->reset_gpio, GPIOD_IS_OUT); + if (ret) + log_debug("%s: cannot get reset-gpios: error %d\n", + __func__, ret); + + return 0; +} + +static int samsung_ltl106hl02_hw_init(struct udevice *dev) +{ + struct samsung_ltl106hl02_priv *priv = dev_get_priv(dev); + + dm_gpio_set_value(&priv->reset_gpio, 1); + regulator_set_enable_if_allowed(priv->vdd, 1); + + /* Dataheets states at least 8.5 msec for vdd stabilization */ + mdelay(10); + + dm_gpio_set_value(&priv->reset_gpio, 0); + + return 0; +} + +static int samsung_ltl106hl02_probe(struct udevice *dev) +{ + struct mipi_dsi_panel_plat *plat = dev_get_plat(dev); + + /* fill characteristics of DSI data link */ + plat->lanes = 4; + plat->format = MIPI_DSI_FMT_RGB888; + plat->mode_flags = MIPI_DSI_MODE_VIDEO; + + return samsung_ltl106hl02_hw_init(dev); +} + +static const struct panel_ops samsung_ltl106hl02_ops = { + .enable_backlight = samsung_ltl106hl02_enable_backlight, + .set_backlight = samsung_ltl106hl02_set_backlight, + .get_display_timing = samsung_ltl106hl02_timings, +}; + +static const struct udevice_id samsung_ltl106hl02_ids[] = { + { .compatible = "samsung,ltl106hl02-001" }, + { } +}; + +U_BOOT_DRIVER(samsung_ltl106hl02) = { + .name = "samsung_ltl106hl02", + .id = UCLASS_PANEL, + .of_match = samsung_ltl106hl02_ids, + .ops = &samsung_ltl106hl02_ops, + .of_to_plat = samsung_ltl106hl02_of_to_plat, + .probe = samsung_ltl106hl02_probe, + .plat_auto = sizeof(struct mipi_dsi_panel_plat), + .priv_auto = sizeof(struct samsung_ltl106hl02_priv), +}; diff --git a/drivers/video/simple_panel.c b/drivers/video/simple_panel.c index efb122b534a..76a30427a59 100644 --- a/drivers/video/simple_panel.c +++ b/drivers/video/simple_panel.c @@ -7,31 +7,22 @@ #include <common.h> #include <backlight.h> #include <dm.h> +#include <edid.h> +#include <i2c.h> #include <log.h> #include <mipi_dsi.h> #include <panel.h> #include <asm/gpio.h> #include <power/regulator.h> +#define EDID_I2C_ADDR 0x50 + struct simple_panel_priv { struct udevice *reg; struct udevice *backlight; struct gpio_desc enable; }; -/* List of supported DSI panels */ -enum { - PANEL_NON_DSI, - PANASONIC_VVX10F004B00, -}; - -static const struct mipi_dsi_panel_plat panasonic_vvx10f004b00 = { - .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | - MIPI_DSI_CLOCK_NON_CONTINUOUS, - .format = MIPI_DSI_FMT_RGB888, - .lanes = 4, -}; - static int simple_panel_enable_backlight(struct udevice *dev) { struct simple_panel_priv *priv = dev_get_priv(dev); @@ -62,13 +53,71 @@ static int simple_panel_set_backlight(struct udevice *dev, int percent) return 0; } +#if CONFIG_IS_ENABLED(I2C_EDID) && CONFIG_IS_ENABLED(DM_I2C) +static int simple_panel_get_edid_timing(struct udevice *dev, + struct display_timing *timings) +{ + struct udevice *panel_ddc, *panel_edid; + struct display_timing edid_timing; + u8 edid_buf[EDID_SIZE] = { 0 }; + int ret, bpc; + /* Check for DDC i2c if no timings are provided */ + ret = uclass_get_device_by_phandle(UCLASS_I2C, dev, + "ddc-i2c-bus", + &panel_ddc); + if (ret) { + log_debug("%s: cannot get DDC i2c bus: error %d\n", + __func__, ret); + return ret; + } + + ret = dm_i2c_probe(panel_ddc, EDID_I2C_ADDR, 0, &panel_edid); + if (ret) { + log_debug("%s: cannot probe EDID: error %d\n", + __func__, ret); + return ret; + } + + ret = dm_i2c_read(panel_edid, 0, edid_buf, sizeof(edid_buf)); + if (ret) { + log_debug("%s: cannot dump EDID buffer: error %d\n", + __func__, ret); + return ret; + } + + ret = edid_get_timing(edid_buf, sizeof(edid_buf), + &edid_timing, &bpc); + if (ret) { + log_debug("%s: cannot decode EDID info: error %d\n", + __func__, ret); + return ret; + } + + memcpy(timings, &edid_timing, sizeof(*timings)); + + return 0; +} +#else +static int simple_panel_get_edid_timing(struct udevice *dev, + struct display_timing *timings) +{ + return -ENOTSUPP; +} +#endif + static int simple_panel_get_display_timing(struct udevice *dev, struct display_timing *timings) { const void *blob = gd->fdt_blob; + int ret; + + /* Check for timing subnode if panel node first */ + ret = fdtdec_decode_display_timing(blob, dev_of_offset(dev), + 0, timings); + if (!ret) + return ret; - return fdtdec_decode_display_timing(blob, dev_of_offset(dev), - 0, timings); + return simple_panel_get_edid_timing(dev, timings); } static int simple_panel_of_to_plat(struct udevice *dev) @@ -111,7 +160,8 @@ static int simple_panel_probe(struct udevice *dev) { struct simple_panel_priv *priv = dev_get_priv(dev); struct mipi_dsi_panel_plat *plat = dev_get_plat(dev); - const u32 dsi_data = dev_get_driver_data(dev); + struct mipi_dsi_panel_plat *dsi_data = + (struct mipi_dsi_panel_plat *)dev_get_driver_data(dev); int ret; ret = regulator_set_enable_if_allowed(priv->reg, true); @@ -121,15 +171,8 @@ static int simple_panel_probe(struct udevice *dev) return ret; } - switch (dsi_data) { - case PANASONIC_VVX10F004B00: - memcpy(plat, &panasonic_vvx10f004b00, - sizeof(panasonic_vvx10f004b00)); - break; - case PANEL_NON_DSI: - default: - break; - } + if (dsi_data) + memcpy(plat, dsi_data, sizeof(struct mipi_dsi_panel_plat)); return 0; } @@ -140,6 +183,13 @@ static const struct panel_ops simple_panel_ops = { .get_display_timing = simple_panel_get_display_timing, }; +static const struct mipi_dsi_panel_plat panasonic_vvx10f004b00 = { + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | + MIPI_DSI_CLOCK_NON_CONTINUOUS, + .format = MIPI_DSI_FMT_RGB888, + .lanes = 4, +}; + static const struct udevice_id simple_panel_ids[] = { { .compatible = "simple-panel" }, { .compatible = "auo,b133xtn01" }, @@ -150,7 +200,7 @@ static const struct udevice_id simple_panel_ids[] = { { .compatible = "sharp,lq123p1jx31" }, { .compatible = "boe,nv101wxmn51" }, { .compatible = "panasonic,vvx10f004b00", - .data = PANASONIC_VVX10F004B00 }, + .data = (ulong)&panasonic_vvx10f004b00 }, { } }; diff --git a/drivers/video/simplefb.c b/drivers/video/simplefb.c index 235ec761f70..33bb78bc3a3 100644 --- a/drivers/video/simplefb.c +++ b/drivers/video/simplefb.c @@ -15,14 +15,14 @@ static int simple_video_probe(struct udevice *dev) { struct video_uc_plat *plat = dev_get_uclass_plat(dev); struct video_priv *uc_priv = dev_get_uclass_priv(dev); - const void *blob = gd->fdt_blob; - const int node = dev_of_offset(dev); + ofnode node = dev_ofnode(dev); const char *format; + int ret; fdt_addr_t base; fdt_size_t size; + u32 width, height, rot; - base = fdtdec_get_addr_size_auto_parent(blob, dev_of_offset(dev->parent), - node, "reg", 0, &size, false); + base = dev_read_addr_size(dev, &size); if (base == FDT_ADDR_T_NONE) { debug("%s: Failed to decode memory region\n", __func__); return -EINVAL; @@ -41,17 +41,25 @@ static int simple_video_probe(struct udevice *dev) debug("%s: Query resolution...\n", __func__); - uc_priv->xsize = fdtdec_get_uint(blob, node, "width", 0); - uc_priv->ysize = fdtdec_get_uint(blob, node, "height", 0); - uc_priv->rot = fdtdec_get_uint(blob, node, "rot", 0); - if (uc_priv->rot > 3) { - log_debug("%s: invalid rot\n", __func__); - return log_msg_ret("rot", -EINVAL); + ret = ofnode_read_u32(node, "width", &width); + ret = ret ?: ofnode_read_u32(node, "height", &height); + if (ret || !width || !height) { + log_err("%s: invalid width or height: %d\n", __func__, ret); + return ret ?: -EINVAL; } + ofnode_read_u32(node, "rot", &rot); + uc_priv->rot = rot; + uc_priv->xsize = width; + uc_priv->ysize = height; - format = fdt_getprop(blob, node, "format", NULL); + format = ofnode_read_string(node, "format"); debug("%s: %dx%d@%s\n", __func__, uc_priv->xsize, uc_priv->ysize, format); + if (!format) { + log_err("%s: please add required property \"format\"\n", __func__); + return -EINVAL; + } + if (strcmp(format, "r5g6b5") == 0) { uc_priv->bpix = VIDEO_BPP16; } else if (strcmp(format, "a8b8g8r8") == 0 || @@ -67,7 +75,7 @@ static int simple_video_probe(struct udevice *dev) uc_priv->bpix = VIDEO_BPP32; uc_priv->format = VIDEO_X2R10G10B10; } else { - printf("%s: invalid format: %s\n", __func__, format); + log_err("%s: invalid format: %s\n", __func__, format); return -EINVAL; } diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c b/drivers/video/sunxi/sunxi_dw_hdmi.c index 0324a050d03..a5e8d39e98f 100644 --- a/drivers/video/sunxi/sunxi_dw_hdmi.c +++ b/drivers/video/sunxi/sunxi_dw_hdmi.c @@ -358,17 +358,19 @@ static int sunxi_dw_hdmi_probe(struct udevice *dev) sunxi_dw_hdmi_phy_init(&priv->hdmi); - ret = dw_hdmi_phy_wait_for_hpd(&priv->hdmi); - if (ret < 0) { - debug("hdmi can not get hpd signal\n"); - return -1; - } + ret = dw_hdmi_detect_hpd(&priv->hdmi); + if (ret < 0) + return ret; dw_hdmi_init(&priv->hdmi); return 0; } +static const struct dw_hdmi_phy_ops dw_hdmi_sunxi_phy_ops = { + .phy_set = sunxi_dw_hdmi_phy_cfg, +}; + static int sunxi_dw_hdmi_of_to_plat(struct udevice *dev) { struct sunxi_dw_hdmi_priv *priv = dev_get_priv(dev); @@ -379,7 +381,7 @@ static int sunxi_dw_hdmi_of_to_plat(struct udevice *dev) hdmi->i2c_clk_high = 0xd8; hdmi->i2c_clk_low = 0xfe; hdmi->reg_io_width = 1; - hdmi->phy_set = sunxi_dw_hdmi_phy_cfg; + hdmi->ops = &dw_hdmi_sunxi_phy_ops; ret = reset_get_bulk(dev, &priv->resets); if (ret) diff --git a/drivers/video/tegra20/Makefile b/drivers/video/tegra20/Makefile index f0b534c5794..a75aea2a875 100644 --- a/drivers/video/tegra20/Makefile +++ b/drivers/video/tegra20/Makefile @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0+ obj-$(CONFIG_VIDEO_TEGRA20) += tegra-dc.o -obj-$(CONFIG_VIDEO_DSI_TEGRA30) += tegra-dsi.o mipi-phy.o +obj-$(CONFIG_VIDEO_DSI_TEGRA30) += tegra-dsi.o tegra-mipi.o mipi-phy.o obj-$(CONFIG_TEGRA_BACKLIGHT_PWM) += tegra-pwm-backlight.o diff --git a/drivers/video/tegra20/tegra-dc.c b/drivers/video/tegra20/tegra-dc.c index f53ad463970..d073da7d7d4 100644 --- a/drivers/video/tegra20/tegra-dc.c +++ b/drivers/video/tegra20/tegra-dc.c @@ -3,8 +3,8 @@ * Copyright (c) 2011 The Chromium OS Authors. */ -#include <common.h> #include <backlight.h> +#include <cpu_func.h> #include <dm.h> #include <fdtdec.h> #include <log.h> @@ -21,12 +21,20 @@ #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> +#include <asm/arch/powergate.h> #include <asm/arch/pwm.h> -#include <asm/arch/display.h> -#include <asm/arch-tegra/timer.h> + +#include "tegra-dc.h" DECLARE_GLOBAL_DATA_PTR; +/* Holder of Tegra per-SOC DC differences */ +struct tegra_dc_soc_info { + bool has_timer; + bool has_rgb; + bool has_pgate; +}; + /* Information about the display controller */ struct tegra_lcd_priv { int width; /* width in pixels */ @@ -35,16 +43,19 @@ struct tegra_lcd_priv { struct display_timing timing; struct udevice *panel; struct dc_ctlr *dc; /* Display controller regmap */ + const struct tegra_dc_soc_info *soc; fdt_addr_t frame_buffer; /* Address of frame buffer */ unsigned pixel_clock; /* Pixel clock in Hz */ int dc_clk[2]; /* Contains clk and its parent */ + ulong scdiv; /* Clock divider used by disp_clk_ctrl */ bool rotation; /* 180 degree panel turn */ + bool pipe; /* DC controller: 0 for A, 1 for B */ }; enum { /* Maximum LCD size we support */ - LCD_MAX_WIDTH = 1920, - LCD_MAX_HEIGHT = 1200, + LCD_MAX_WIDTH = 2560, + LCD_MAX_HEIGHT = 1600, LCD_MAX_LOG2_BPP = VIDEO_BPP16, }; @@ -110,13 +121,11 @@ static void update_window(struct tegra_lcd_priv *priv, writel(val, &dc->cmd.state_ctrl); } -static int update_display_mode(struct dc_disp_reg *disp, - struct tegra_lcd_priv *priv) +static int update_display_mode(struct tegra_lcd_priv *priv) { + struct dc_disp_reg *disp = &priv->dc->disp; struct display_timing *dt = &priv->timing; unsigned long val; - unsigned long rate; - unsigned long div; writel(0x0, &disp->disp_timing_opt); @@ -128,29 +137,22 @@ static int update_display_mode(struct dc_disp_reg *disp, &disp->front_porch); writel(dt->hactive.typ | (dt->vactive.typ << 16), &disp->disp_active); - val = DE_SELECT_ACTIVE << DE_SELECT_SHIFT; - val |= DE_CONTROL_NORMAL << DE_CONTROL_SHIFT; - writel(val, &disp->data_enable_opt); - - val = DATA_FORMAT_DF1P1C << DATA_FORMAT_SHIFT; - val |= DATA_ALIGNMENT_MSB << DATA_ALIGNMENT_SHIFT; - val |= DATA_ORDER_RED_BLUE << DATA_ORDER_SHIFT; - writel(val, &disp->disp_interface_ctrl); + if (priv->soc->has_rgb) { + val = DE_SELECT_ACTIVE << DE_SELECT_SHIFT; + val |= DE_CONTROL_NORMAL << DE_CONTROL_SHIFT; + writel(val, &disp->data_enable_opt); - /* - * The pixel clock divider is in 7.1 format (where the bottom bit - * represents 0.5). Here we calculate the divider needed to get from - * the display clock (typically 600MHz) to the pixel clock. We round - * up or down as requried. - */ - rate = clock_get_periph_rate(priv->dc_clk[0], priv->dc_clk[1]); - div = ((rate * 2 + priv->pixel_clock / 2) / priv->pixel_clock) - 2; - debug("Display clock %lu, divider %lu\n", rate, div); + val = DATA_FORMAT_DF1P1C << DATA_FORMAT_SHIFT; + val |= DATA_ALIGNMENT_MSB << DATA_ALIGNMENT_SHIFT; + val |= DATA_ORDER_RED_BLUE << DATA_ORDER_SHIFT; + writel(val, &disp->disp_interface_ctrl); + } - writel(0x00010001, &disp->shift_clk_opt); + if (priv->soc->has_rgb) + writel(0x00010001, &disp->shift_clk_opt); val = PIXEL_CLK_DIVIDER_PCD1 << PIXEL_CLK_DIVIDER_SHIFT; - val |= div << SHIFT_CLK_DIVIDER_SHIFT; + val |= priv->scdiv << SHIFT_CLK_DIVIDER_SHIFT; writel(val, &disp->disp_clk_ctrl); return 0; @@ -174,6 +176,7 @@ static void basic_init(struct dc_cmd_reg *cmd) writel(val, &cmd->disp_pow_ctrl); val = readl(&cmd->disp_cmd); + val &= ~CTRL_MODE_MASK; val |= CTRL_MODE_C_DISPLAY << CTRL_MODE_SHIFT; writel(val, &cmd->disp_cmd); } @@ -215,8 +218,11 @@ static const u32 rgb_sel_tab[PIN_OUTPUT_SEL_COUNT] = { 0x00020000, }; -static void rgb_enable(struct dc_com_reg *com) +static void rgb_enable(struct tegra_lcd_priv *priv) { + struct dc_com_reg *com = &priv->dc->com; + struct display_timing *dt = &priv->timing; + u32 value; int i; for (i = 0; i < PIN_REG_COUNT; i++) { @@ -225,16 +231,31 @@ static void rgb_enable(struct dc_com_reg *com) writel(rgb_data_tab[i], &com->pin_output_data[i]); } + /* configure H- and V-sync signal polarities */ + value = readl(&com->pin_output_polarity[1]); + + if (dt->flags & DISPLAY_FLAGS_HSYNC_LOW) + value |= LHS_OUTPUT_POLARITY_LOW; + else + value &= ~LHS_OUTPUT_POLARITY_LOW; + + if (dt->flags & DISPLAY_FLAGS_VSYNC_LOW) + value |= LVS_OUTPUT_POLARITY_LOW; + else + value &= ~LVS_OUTPUT_POLARITY_LOW; + + writel(value, &com->pin_output_polarity[1]); + for (i = 0; i < PIN_OUTPUT_SEL_COUNT; i++) writel(rgb_sel_tab[i], &com->pin_output_sel[i]); } -static int setup_window(struct disp_ctl_win *win, - struct tegra_lcd_priv *priv) +static int setup_window(struct tegra_lcd_priv *priv, + struct disp_ctl_win *win) { if (priv->rotation) { - win->x = priv->width * 2; - win->y = priv->height; + win->x = priv->width * 2 - 1; + win->y = priv->height - 1; } else { win->x = 0; win->y = 0; @@ -274,12 +295,11 @@ static int setup_window(struct disp_ctl_win *win, * You should pass in the U-Boot address here, and check the contents of * struct tegra_lcd_priv to see what was actually chosen. * - * @param blob Device tree blob * @param priv Driver's private data * @param default_lcd_base Default address of LCD frame buffer * Return: 0 if ok, -1 on error (unsupported bits per pixel) */ -static int tegra_display_probe(const void *blob, struct tegra_lcd_priv *priv, +static int tegra_display_probe(struct tegra_lcd_priv *priv, void *default_lcd_base) { struct disp_ctl_win window; @@ -288,12 +308,29 @@ static int tegra_display_probe(const void *blob, struct tegra_lcd_priv *priv, priv->frame_buffer = (u32)default_lcd_base; /* - * We halve the rate if DISP1 paret is PLLD, since actual parent + * We halve the rate if DISP1 parent is PLLD, since actual parent * is plld_out0 which is PLLD divided by 2. */ if (priv->dc_clk[1] == CLOCK_ID_DISPLAY) rate /= 2; +#ifndef CONFIG_TEGRA20 + /* PLLD2 obeys same rules as PLLD but it is present only on T30+ */ + if (priv->dc_clk[1] == CLOCK_ID_DISPLAY2) + rate /= 2; +#endif + + /* + * The pixel clock divider is in 7.1 format (where the bottom bit + * represents 0.5). Here we calculate the divider needed to get from + * the display clock (typically 600MHz) to the pixel clock. We round + * up or down as required. + */ + if (!priv->scdiv) + priv->scdiv = ((rate * 2 + priv->pixel_clock / 2) + / priv->pixel_clock) - 2; + debug("Display clock %lu, divider %lu\n", rate, priv->scdiv); + /* * HOST1X is init by default at 150MHz with PLLC as parent */ @@ -303,13 +340,17 @@ static int tegra_display_probe(const void *blob, struct tegra_lcd_priv *priv, rate); basic_init(&priv->dc->cmd); - basic_init_timer(&priv->dc->disp); - rgb_enable(&priv->dc->com); + + if (priv->soc->has_timer) + basic_init_timer(&priv->dc->disp); + + if (priv->soc->has_rgb) + rgb_enable(priv); if (priv->pixel_clock) - update_display_mode(&priv->dc->disp, priv); + update_display_mode(priv); - if (setup_window(&window, priv)) + if (setup_window(priv, &window)) return -1; update_window(priv, &window); @@ -322,7 +363,6 @@ static int tegra_lcd_probe(struct udevice *dev) struct video_uc_plat *plat = dev_get_uclass_plat(dev); struct video_priv *uc_priv = dev_get_uclass_priv(dev); struct tegra_lcd_priv *priv = dev_get_priv(dev); - const void *blob = gd->fdt_blob; int ret; /* Initialize the Tegra display controller */ @@ -330,8 +370,42 @@ static int tegra_lcd_probe(struct udevice *dev) funcmux_select(PERIPH_ID_DISP1, FUNCMUX_DEFAULT); #endif - if (tegra_display_probe(blob, priv, (void *)plat->base)) { - printf("%s: Failed to probe display driver\n", __func__); + if (priv->soc->has_pgate) { + uint powergate; + + if (priv->pipe) + powergate = TEGRA_POWERGATE_DISB; + else + powergate = TEGRA_POWERGATE_DIS; + + ret = tegra_powergate_power_off(powergate); + if (ret < 0) { + log_err("failed to power off DISP gate: %d", ret); + return ret; + } + + ret = tegra_powergate_sequence_power_up(powergate, + priv->dc_clk[0]); + if (ret < 0) { + log_err("failed to power up DISP gate: %d", ret); + return ret; + } + } + + /* Get shift clock divider from Tegra DSI if used */ + if (!strcmp(priv->panel->name, TEGRA_DSI_A) || + !strcmp(priv->panel->name, TEGRA_DSI_B)) { + struct tegra_dc_plat *dc_plat = dev_get_plat(priv->panel); + + priv->scdiv = dc_plat->scdiv; + } + + /* Clean the framebuffer area */ + memset((u8 *)plat->base, 0, plat->size); + flush_dcache_all(); + + if (tegra_display_probe(priv, (void *)plat->base)) { + debug("%s: Failed to probe display driver\n", __func__); return -1; } @@ -346,12 +420,6 @@ static int tegra_lcd_probe(struct udevice *dev) return ret; } - ret = panel_set_backlight(priv->panel, BACKLIGHT_DEFAULT); - if (ret) { - debug("%s: Cannot set backlight to default, ret=%d\n", __func__, ret); - return ret; - } - mmu_set_region_dcache_behaviour(priv->frame_buffer, plat->size, DCACHE_WRITETHROUGH); @@ -361,10 +429,10 @@ static int tegra_lcd_probe(struct udevice *dev) uc_priv->xsize = priv->width; uc_priv->ysize = priv->height; uc_priv->bpix = priv->log2_bpp; - debug("LCD frame buffer at %pa, size %x\n", &priv->frame_buffer, + debug("LCD frame buffer at %08x, size %x\n", priv->frame_buffer, plat->size); - return 0; + return panel_set_backlight(priv->panel, BACKLIGHT_DEFAULT); } static int tegra_lcd_of_to_plat(struct udevice *dev) @@ -383,6 +451,8 @@ static int tegra_lcd_of_to_plat(struct udevice *dev) return -EINVAL; } + priv->soc = (struct tegra_dc_soc_info *)dev_get_driver_data(dev); + ret = clock_decode_pair(dev, priv->dc_clk); if (ret < 0) { debug("%s: Cannot decode clocks for '%s' (ret = %d)\n", @@ -392,6 +462,9 @@ static int tegra_lcd_of_to_plat(struct udevice *dev) priv->rotation = dev_read_bool(dev, "nvidia,180-rotation"); + if (!strcmp(dev->name, TEGRA_DC_B)) + priv->pipe = 1; + rgb = fdt_subnode_offset(blob, node, "rgb"); if (rgb < 0) { debug("%s: Cannot find rgb subnode for '%s' (ret=%d)\n", @@ -417,12 +490,14 @@ static int tegra_lcd_of_to_plat(struct udevice *dev) return ret; } + /* Fill the platform data for internal devices */ if (!strcmp(priv->panel->name, TEGRA_DSI_A) || !strcmp(priv->panel->name, TEGRA_DSI_B)) { struct tegra_dc_plat *dc_plat = dev_get_plat(priv->panel); dc_plat->dev = dev; dc_plat->dc = priv->dc; + dc_plat->pipe = priv->pipe; } ret = panel_get_display_timing(priv->panel, &priv->timing); @@ -464,19 +539,46 @@ static int tegra_lcd_bind(struct udevice *dev) static const struct video_ops tegra_lcd_ops = { }; +static const struct tegra_dc_soc_info tegra20_dc_soc_info = { + .has_timer = true, + .has_rgb = true, + .has_pgate = false, +}; + +static const struct tegra_dc_soc_info tegra30_dc_soc_info = { + .has_timer = false, + .has_rgb = true, + .has_pgate = false, +}; + +static const struct tegra_dc_soc_info tegra114_dc_soc_info = { + .has_timer = false, + .has_rgb = false, + .has_pgate = true, +}; + static const struct udevice_id tegra_lcd_ids[] = { - { .compatible = "nvidia,tegra20-dc" }, - { .compatible = "nvidia,tegra30-dc" }, - { } + { + .compatible = "nvidia,tegra20-dc", + .data = (ulong)&tegra20_dc_soc_info + }, { + .compatible = "nvidia,tegra30-dc", + .data = (ulong)&tegra30_dc_soc_info + }, { + .compatible = "nvidia,tegra114-dc", + .data = (ulong)&tegra114_dc_soc_info + }, { + /* sentinel */ + } }; U_BOOT_DRIVER(tegra_lcd) = { - .name = "tegra_lcd", - .id = UCLASS_VIDEO, - .of_match = tegra_lcd_ids, - .ops = &tegra_lcd_ops, - .bind = tegra_lcd_bind, - .probe = tegra_lcd_probe, + .name = "tegra_lcd", + .id = UCLASS_VIDEO, + .of_match = tegra_lcd_ids, + .ops = &tegra_lcd_ops, + .bind = tegra_lcd_bind, + .probe = tegra_lcd_probe, .of_to_plat = tegra_lcd_of_to_plat, .priv_auto = sizeof(struct tegra_lcd_priv), }; diff --git a/drivers/video/tegra20/tegra-dc.h b/drivers/video/tegra20/tegra-dc.h new file mode 100644 index 00000000000..05042dab1c6 --- /dev/null +++ b/drivers/video/tegra20/tegra-dc.h @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2010 + * NVIDIA Corporation <www.nvidia.com> + */ + +#ifndef _TEGRA_DC_H +#define _TEGRA_DC_H + +#ifndef __ASSEMBLY__ +#include <linux/bitops.h> +#endif + +/* arch-tegra/dc exists only because T124 uses it */ +#include <asm/arch-tegra/dc.h> + +#define TEGRA_DC_A "dc@54200000" +#define TEGRA_DC_B "dc@54240000" +#define TEGRA_DSI_A "dsi@54300000" +#define TEGRA_DSI_B "dsi@54400000" + +struct tegra_dc_plat { + struct udevice *dev; /* Display controller device */ + struct dc_ctlr *dc; /* Display controller regmap */ + bool pipe; /* DC number: 0 for A, 1 for B */ + ulong scdiv; /* Shift clock divider */ +}; + +/* This holds information about a window which can be displayed */ +struct disp_ctl_win { + enum win_color_depth_id fmt; /* Color depth/format */ + unsigned int bpp; /* Bits per pixel */ + phys_addr_t phys_addr; /* Physical address in memory */ + unsigned int x; /* Horizontal address offset (bytes) */ + unsigned int y; /* Veritical address offset (bytes) */ + unsigned int w; /* Width of source window */ + unsigned int h; /* Height of source window */ + unsigned int stride; /* Number of bytes per line */ + unsigned int out_x; /* Left edge of output window (col) */ + unsigned int out_y; /* Top edge of output window (row) */ + unsigned int out_w; /* Width of output window in pixels */ + unsigned int out_h; /* Height of output window in pixels */ +}; + +#endif /* _TEGRA_DC_H */ diff --git a/drivers/video/tegra20/tegra-dsi.c b/drivers/video/tegra20/tegra-dsi.c index a48f9c85d0f..13dae37806f 100644 --- a/drivers/video/tegra20/tegra-dsi.c +++ b/drivers/video/tegra20/tegra-dsi.c @@ -12,6 +12,7 @@ #include <mipi_dsi.h> #include <backlight.h> #include <panel.h> +#include <reset.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/time.h> @@ -20,17 +21,24 @@ #include <asm/gpio.h> #include <asm/io.h> #include <asm/arch/clock.h> -#include <asm/arch/display.h> -#include <asm/arch-tegra30/dsi.h> +#include "tegra-dc.h" +#include "tegra-dsi.h" #include "mipi-phy.h" +/* List of supported DSI bridges */ +enum { + DSI_V0, + DSI_V1, +}; + struct tegra_dsi_priv { struct mipi_dsi_host host; struct mipi_dsi_device device; struct mipi_dphy_timing dphy_timing; struct udevice *panel; + struct udevice *mipi; struct display_timing timing; struct dsi_ctlr *dsi; @@ -41,6 +49,8 @@ struct tegra_dsi_priv { int dsi_clk; int video_fifo_depth; int host_fifo_depth; + + u32 version; }; static void tegra_dc_enable_controller(struct udevice *dev) @@ -501,6 +511,41 @@ static void tegra_dsi_pad_calibrate(struct dsi_pad_ctrl_reg *pad) writel(value, TEGRA_VI_BASE + (CSI_CIL_PAD_CONFIG << 2)); } +static void tegra_dsi_mipi_calibrate(struct tegra_dsi_priv *priv) +{ + struct dsi_pad_ctrl_reg *pad = &priv->dsi->pad; + u32 value; + int ret; + + ret = misc_set_enabled(priv->mipi, true); + if (ret) + log_debug("%s: failed to enable MIPI calibration: %d\n", + __func__, ret); + + writel(0, &pad->pad_ctrl); + writel(0, &pad->pad_ctrl_1); + writel(0, &pad->pad_ctrl_2); + writel(0, &pad->pad_ctrl_3); + writel(0, &pad->pad_ctrl_4); + + /* DSI pad enable */ + value = DSI_PAD_CONTROL_VS1_PULLDN(0) | DSI_PAD_CONTROL_VS1_PDIO(0); + writel(value, &pad->pad_ctrl); + + value = DSI_PAD_SLEW_UP(0x7) | DSI_PAD_SLEW_DN(0x7) | + DSI_PAD_LP_UP(0x1) | DSI_PAD_LP_DN(0x1) | + DSI_PAD_OUT_CLK(0x0); + writel(value, &pad->pad_ctrl_2); + + value = DSI_PAD_PREEMP_PD_CLK(0x3) | DSI_PAD_PREEMP_PU_CLK(0x3) | + DSI_PAD_PREEMP_PD(0x03) | DSI_PAD_PREEMP_PU(0x3); + writel(value, &pad->pad_ctrl_3); + + ret = misc_write(priv->mipi, 0, NULL, 0); + if (ret) + log_debug("%s: MIPI calibration failed %d\n", __func__, ret); +} + static void tegra_dsi_set_timeout(struct dsi_timeout_reg *rtimeout, unsigned long bclk, unsigned int vrefresh) @@ -664,10 +709,25 @@ static int tegra_dsi_encoder_enable(struct udevice *dev) u32 value; int ret; + /* If for some reasone DSI is enabled then it needs to + * be disabled in order for the panel initialization + * commands to be properly sent. + */ + value = readl(&misc->dsi_pwr_ctrl); + + if (value & DSI_POWER_CONTROL_ENABLE) { + value = readl(&misc->dsi_pwr_ctrl); + value &= ~DSI_POWER_CONTROL_ENABLE; + writel(value, &misc->dsi_pwr_ctrl); + } + /* Disable interrupt */ writel(0, &misc->int_enable); - tegra_dsi_pad_calibrate(&priv->dsi->pad); + if (priv->version) + tegra_dsi_mipi_calibrate(priv); + else + tegra_dsi_pad_calibrate(&priv->dsi->pad); tegra_dsi_get_muldiv(device->format, &mul, &div); @@ -706,12 +766,6 @@ static int tegra_dsi_encoder_enable(struct udevice *dev) if (ret) return ret; - tegra_dsi_configure(dev, 0); - - ret = panel_set_backlight(priv->panel, BACKLIGHT_DEFAULT); - if (ret) - return ret; - tegra_dsi_configure(dev, device->mode_flags); tegra_dc_enable_controller(dev); @@ -726,8 +780,10 @@ static int tegra_dsi_encoder_enable(struct udevice *dev) static int tegra_dsi_bridge_set_panel(struct udevice *dev, int percent) { - /* Is not used in tegra dc */ - return 0; + struct tegra_dsi_priv *priv = dev_get_priv(dev); + + /* Turn on/off backlight */ + return panel_set_backlight(priv->panel, percent); } static int tegra_dsi_panel_timings(struct udevice *dev, @@ -743,6 +799,7 @@ static int tegra_dsi_panel_timings(struct udevice *dev, static void tegra_dsi_init_clocks(struct udevice *dev) { struct tegra_dsi_priv *priv = dev_get_priv(dev); + struct tegra_dc_plat *dc_plat = dev_get_plat(dev); struct mipi_dsi_device *device = &priv->device; unsigned int mul, div; unsigned long bclk, plld; @@ -754,6 +811,19 @@ static void tegra_dsi_init_clocks(struct udevice *dev) plld = DIV_ROUND_UP(bclk * 8, USEC_PER_SEC); + dc_plat->scdiv = ((plld * USEC_PER_SEC + + priv->timing.pixelclock.typ / 2) / + priv->timing.pixelclock.typ) - 2; + + /* + * BUG: If DISP1 is a PLLD/D2 child, it cannot go over 370MHz. The + * cause of this is not quite clear. This can be overcomed by + * halving the PLLD/D2 if the target rate is > 800MHz. This way + * DISP1 and DSI clocks will be equal. + */ + if (plld > 800) + plld /= 2; + switch (clock_get_osc_freq()) { case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ case CLOCK_OSC_FREQ_48_0: /* OSC is 48Mhz */ @@ -790,17 +860,27 @@ static int tegra_dsi_bridge_probe(struct udevice *dev) struct tegra_dsi_priv *priv = dev_get_priv(dev); struct mipi_dsi_device *device = &priv->device; struct mipi_dsi_panel_plat *mipi_plat; + struct reset_ctl reset_ctl; int ret; + priv->version = dev_get_driver_data(dev); + priv->dsi = (struct dsi_ctlr *)dev_read_addr_ptr(dev); if (!priv->dsi) { printf("%s: No display controller address\n", __func__); return -EINVAL; } - priv->video_fifo_depth = 480; + priv->video_fifo_depth = 1920; priv->host_fifo_depth = 64; + ret = reset_get_by_name(dev, "dsi", &reset_ctl); + if (ret) { + log_debug("%s: reset_get_by_name() failed: %d\n", + __func__, ret); + return ret; + } + ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev, "avdd-dsi-csi-supply", &priv->avdd); if (ret) @@ -814,6 +894,16 @@ static int tegra_dsi_bridge_probe(struct udevice *dev) return log_ret(ret); } + if (priv->version) { + ret = uclass_get_device_by_phandle(UCLASS_MISC, dev, + "nvidia,mipi-calibrate", + &priv->mipi); + if (ret) { + log_debug("%s: cannot get MIPI: error %d\n", __func__, ret); + return ret; + } + } + panel_get_display_timing(priv->panel, &priv->timing); mipi_plat = dev_get_plat(priv->panel); @@ -829,12 +919,17 @@ static int tegra_dsi_bridge_probe(struct udevice *dev) tegra_dsi_get_format(device->format, &priv->format); + reset_assert(&reset_ctl); + ret = regulator_set_enable_if_allowed(priv->avdd, true); if (ret && ret != -ENOSYS) return ret; tegra_dsi_init_clocks(dev); + mdelay(2); + reset_deassert(&reset_ctl); + return 0; } @@ -845,7 +940,8 @@ static const struct panel_ops tegra_dsi_bridge_ops = { }; static const struct udevice_id tegra_dsi_bridge_ids[] = { - { .compatible = "nvidia,tegra30-dsi" }, + { .compatible = "nvidia,tegra30-dsi", .data = DSI_V0 }, + { .compatible = "nvidia,tegra114-dsi", .data = DSI_V1 }, { } }; diff --git a/arch/arm/include/asm/arch-tegra30/dsi.h b/drivers/video/tegra20/tegra-dsi.h index 7ade132613f..69dac4bd1b8 100644 --- a/arch/arm/include/asm/arch-tegra30/dsi.h +++ b/drivers/video/tegra20/tegra-dsi.h @@ -4,8 +4,8 @@ * NVIDIA Corporation <www.nvidia.com> */ -#ifndef __ASM_ARCH_TEGRA_DSI_H -#define __ASM_ARCH_TEGRA_DSI_H +#ifndef _TEGRA_DSI_H +#define _TEGRA_DSI_H #ifndef __ASSEMBLY__ #include <linux/bitops.h> @@ -105,6 +105,10 @@ struct dsi_pad_ctrl_reg { uint pad_ctrl_cd; /* _PAD_CONTROL_CD_0 */ uint pad_cd_status; /* _PAD_CD_STATUS_0 */ uint dsi_vid_mode_control; /* _DSI_VID_MODE_CONTROL_0 */ + uint pad_ctrl_1; /* _PAD_CONTROL_1 */ + uint pad_ctrl_2; /* _PAD_CONTROL_2 */ + uint pad_ctrl_3; /* _PAD_CONTROL_3 */ + uint pad_ctrl_4; /* _PAD_CONTROL_4 */ }; /* Display Serial Interface (DSI_) regs */ @@ -184,6 +188,20 @@ struct dsi_ctlr { #define DSI_PAD_CONTROL_PAD_LPUPADJ(x) (((x) & 0x3) << 14) #define DSI_PAD_CONTROL_PAD_LPDNADJ(x) (((x) & 0x3) << 12) +#define DSI_PAD_CONTROL_VS1_PDIO(x) (((x) & 0xf) << 0) +#define DSI_PAD_CONTROL_VS1_PULLDN(x) (((x) & 0xf) << 16) + +#define DSI_PAD_OUT_CLK(x) (((x) & 0x7) << 0) +#define DSI_PAD_LP_DN(x) (((x) & 0x7) << 4) +#define DSI_PAD_LP_UP(x) (((x) & 0x7) << 8) +#define DSI_PAD_SLEW_DN(x) (((x) & 0x7) << 12) +#define DSI_PAD_SLEW_UP(x) (((x) & 0x7) << 16) + +#define DSI_PAD_PREEMP_PD_CLK(x) (((x) & 0x3) << 12) +#define DSI_PAD_PREEMP_PU_CLK(x) (((x) & 0x3) << 8) +#define DSI_PAD_PREEMP_PD(x) (((x) & 0x3) << 4) +#define DSI_PAD_PREEMP_PU(x) (((x) & 0x3) << 0) + /* * pixel format as used in the DSI_CONTROL_FORMAT field */ @@ -214,4 +232,4 @@ enum tegra_dsi_format { #define PAD_DRIV_DN_REF(x) (((x) & 0x7) << 16) #define PAD_DRIV_UP_REF(x) (((x) & 0x7) << 8) -#endif /* __ASM_ARCH_TEGRA_DSI_H */ +#endif /* _TEGRA_DSI_H */ diff --git a/drivers/video/tegra20/tegra-mipi.c b/drivers/video/tegra20/tegra-mipi.c new file mode 100644 index 00000000000..2df3c1a9942 --- /dev/null +++ b/drivers/video/tegra20/tegra-mipi.c @@ -0,0 +1,188 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2013 NVIDIA Corporation + * Copyright (c) 2023 Svyatoslav Ryhel <clamor95@gmail.com> + */ + +#include <dm.h> +#include <clk.h> +#include <misc.h> +#include <linux/delay.h> +#include <linux/iopoll.h> + +#include <asm/io.h> + +/* MIPI control registers 0x00 ~ 0x60 */ +struct mipi_ctlr { + uint mipi_cal_ctrl; + uint mipi_cal_autocal_ctrl; + uint mipi_cal_status; + + uint unused1[2]; + + uint mipi_cal_config_csia; + uint mipi_cal_config_csib; + uint mipi_cal_config_csic; + uint mipi_cal_config_csid; + uint mipi_cal_config_csie; + + uint unused2[4]; + + uint mipi_cal_config_dsia; + uint mipi_cal_config_dsib; + uint mipi_cal_config_dsic; + uint mipi_cal_config_dsid; + + uint unused3[4]; + + uint mipi_cal_bias_pad_cfg0; + uint mipi_cal_bias_pad_cfg1; + uint mipi_cal_bias_pad_cfg2; +}; + +#define MIPI_CAL_CTRL_NOISE_FILTER(x) (((x) & 0xf) << 26) +#define MIPI_CAL_CTRL_PRESCALE(x) (((x) & 0x3) << 24) +#define MIPI_CAL_CTRL_CLKEN_OVR BIT(4) +#define MIPI_CAL_CTRL_START BIT(0) + +#define MIPI_CAL_STATUS_DONE BIT(16) +#define MIPI_CAL_STATUS_ACTIVE BIT(0) + +#define MIPI_CAL_OVERIDE(x) (((x) & 0x1) << 30) +#define MIPI_CAL_SEL(x) (((x) & 0x1) << 21) +#define MIPI_CAL_HSPDOS(x) (((x) & 0x1f) << 16) +#define MIPI_CAL_HSPUOS(x) (((x) & 0x1f) << 8) +#define MIPI_CAL_TERMOS(x) (((x) & 0x1f) << 0) + +#define MIPI_CAL_BIAS_PAD_PDVCLAMP BIT(1) +#define MIPI_CAL_BIAS_PAD_E_VCLAMP_REF BIT(0) + +#define MIPI_CAL_BIAS_PAD_DRV_DN_REF(x) (((x) & 0x7) << 16) +#define MIPI_CAL_BIAS_PAD_DRV_UP_REF(x) (((x) & 0x7) << 8) + +#define MIPI_CAL_BIAS_PAD_VCLAMP(x) (((x) & 0x7) << 16) +#define MIPI_CAL_BIAS_PAD_VAUXP(x) (((x) & 0x7) << 4) +#define MIPI_CAL_BIAS_PAD_PDVREG BIT(1) + +struct tegra_mipi_priv { + struct mipi_ctlr *mipi; + struct clk *mipi_cal; +}; + +static int tegra_mipi_calibrate(struct udevice *dev, int offset, const void *buf, + int size) +{ + struct tegra_mipi_priv *priv = dev_get_priv(dev); + u32 value; + + value = MIPI_CAL_BIAS_PAD_DRV_DN_REF(0x2) | + MIPI_CAL_BIAS_PAD_DRV_UP_REF(0x0); + writel(value, &priv->mipi->mipi_cal_bias_pad_cfg1); + + value = readl(&priv->mipi->mipi_cal_bias_pad_cfg2); + value &= ~MIPI_CAL_BIAS_PAD_VCLAMP(0x7); + value &= ~MIPI_CAL_BIAS_PAD_VAUXP(0x7); + writel(value, &priv->mipi->mipi_cal_bias_pad_cfg2); + + value = MIPI_CAL_OVERIDE(0x0) | MIPI_CAL_SEL(0x1) | + MIPI_CAL_HSPDOS(0x0) | MIPI_CAL_HSPUOS(0x4) | + MIPI_CAL_TERMOS(0x5); + writel(value, &priv->mipi->mipi_cal_config_dsia); + writel(value, &priv->mipi->mipi_cal_config_dsib); + + /* Deselect PAD C */ + value = readl(&priv->mipi->mipi_cal_config_dsic); + value &= ~(MIPI_CAL_SEL(0x1)); + writel(value, &priv->mipi->mipi_cal_config_dsic); + + /* Deselect PAD D */ + value = readl(&priv->mipi->mipi_cal_config_dsid); + value &= ~(MIPI_CAL_SEL(0x1)); + writel(value, &priv->mipi->mipi_cal_config_dsid); + + value = readl(&priv->mipi->mipi_cal_ctrl); + value &= ~MIPI_CAL_CTRL_NOISE_FILTER(0xf); + value &= ~MIPI_CAL_CTRL_PRESCALE(0x3); + value |= MIPI_CAL_CTRL_NOISE_FILTER(0xa) | + MIPI_CAL_CTRL_PRESCALE(0x2) | + MIPI_CAL_CTRL_CLKEN_OVR; + writel(value, &priv->mipi->mipi_cal_ctrl); + + /* clear any pending status bits */ + value = readl(&priv->mipi->mipi_cal_status); + writel(value, &priv->mipi->mipi_cal_status); + + value = readl(&priv->mipi->mipi_cal_ctrl); + value |= MIPI_CAL_CTRL_START; + writel(value, &priv->mipi->mipi_cal_ctrl); + + /* + * Wait for min 72uS to let calibration logic finish calibration + * sequence codes before waiting for pads idle state to apply the + * results. + */ + udelay(80); + + return readl_poll_sleep_timeout(&priv->mipi->mipi_cal_status, value, + !(value & MIPI_CAL_STATUS_ACTIVE) && + (value & MIPI_CAL_STATUS_DONE), 100, + 250000); +} + +static int tegra_mipi_enable(struct udevice *dev, bool val) +{ + struct tegra_mipi_priv *priv = dev_get_priv(dev); + u32 value; + + clk_enable(priv->mipi_cal); + + value = readl(&priv->mipi->mipi_cal_bias_pad_cfg0); + value &= ~MIPI_CAL_BIAS_PAD_PDVCLAMP; + value |= MIPI_CAL_BIAS_PAD_E_VCLAMP_REF; + writel(value, &priv->mipi->mipi_cal_bias_pad_cfg0); + + value = readl(&priv->mipi->mipi_cal_bias_pad_cfg2); + value &= ~MIPI_CAL_BIAS_PAD_PDVREG; + writel(value, &priv->mipi->mipi_cal_bias_pad_cfg2); + + return 0; +} + +static const struct misc_ops tegra_mipi_ops = { + .write = tegra_mipi_calibrate, + .set_enabled = tegra_mipi_enable, +}; + +static int tegra_mipi_probe(struct udevice *dev) +{ + struct tegra_mipi_priv *priv = dev_get_priv(dev); + + priv->mipi = (struct mipi_ctlr *)dev_read_addr_ptr(dev); + if (!priv->mipi) { + log_debug("%s: no MIPI controller address\n", __func__); + return -EINVAL; + } + + priv->mipi_cal = devm_clk_get(dev, NULL); + if (IS_ERR(priv->mipi_cal)) { + log_debug("%s: Could not get MIPI clock: %ld\n", + __func__, PTR_ERR(priv->mipi_cal)); + return PTR_ERR(priv->mipi_cal); + } + + return 0; +} + +static const struct udevice_id tegra_mipi_ids[] = { + { .compatible = "nvidia,tegra114-mipi" }, + { } +}; + +U_BOOT_DRIVER(tegra_mipi) = { + .name = "tegra_mipi", + .id = UCLASS_MISC, + .ops = &tegra_mipi_ops, + .of_match = tegra_mipi_ids, + .probe = tegra_mipi_probe, + .priv_auto = sizeof(struct tegra_mipi_priv), +}; diff --git a/drivers/video/tegra20/tegra-pwm-backlight.c b/drivers/video/tegra20/tegra-pwm-backlight.c index bb677daa8a1..5f93f57fe90 100644 --- a/drivers/video/tegra20/tegra-pwm-backlight.c +++ b/drivers/video/tegra20/tegra-pwm-backlight.c @@ -15,7 +15,8 @@ #include <asm/io.h> #include <asm/gpio.h> -#include <asm/arch/display.h> + +#include "tegra-dc.h" #define TEGRA_DISPLAY_A_BASE 0x54200000 #define TEGRA_DISPLAY_B_BASE 0x54240000 diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index 3571e62ba2d..7b5d1dfbb3b 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -404,6 +404,10 @@ bool video_is_active(void) { struct udevice *dev; + /* Assume video to be active if SPL passed video hand-off to U-boot */ + if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && spl_phase() > PHASE_SPL) + return true; + for (uclass_find_first_device(UCLASS_VIDEO, &dev); dev; uclass_find_next_device(&dev)) { diff --git a/drivers/xen/pvblock.c b/drivers/xen/pvblock.c index 1df04e239ad..9fc51d203e5 100644 --- a/drivers/xen/pvblock.c +++ b/drivers/xen/pvblock.c @@ -79,7 +79,7 @@ struct blkfront_plat { }; /** - * struct blkfront_aiocb - AIO сontrol block + * struct blkfront_aiocb - AIO control block * @aio_dev: Blockfront device * @aio_buf: Memory buffer, which must be sector-aligned for * @aio_dev sector diff --git a/env/mmc.c b/env/mmc.c index da84cddd74f..7afb733e890 100644 --- a/env/mmc.c +++ b/env/mmc.c @@ -436,6 +436,7 @@ static int env_mmc_load(void) ret = env_import_redund((char *)tmp_env1, read1_fail, (char *)tmp_env2, read2_fail, H_EXTERNAL); + printf("Reading from %sMMC(%d)... ", gd->env_valid == ENV_REDUND ? "redundant " : "", dev); fini: fini_mmc_for_env(mmc); @@ -475,6 +476,8 @@ static int env_mmc_load(void) goto fini; } + printf("Reading from MMC(%d)... ", dev); + ret = env_import(buf, 1, H_EXTERNAL); if (!ret) { ep = (env_t *)buf; diff --git a/fs/erofs/Kconfig b/fs/erofs/Kconfig index ee4e777c5c8..c8463357ca2 100644 --- a/fs/erofs/Kconfig +++ b/fs/erofs/Kconfig @@ -19,3 +19,18 @@ config FS_EROFS_ZIP help Enable fixed-sized output compression for EROFS. If you don't want to enable compression feature, say N. + +config FS_EROFS_ZIP_DEFLATE + bool "EROFS DEFLATE compressed data support" + depends on FS_EROFS_ZIP + select ZLIB + help + Saying Y here includes support for reading EROFS file systems + containing DEFLATE compressed data. It gives better compression + ratios than the default LZ4 format, while it costs more CPU + overhead. + + DEFLATE support is an experimental feature for now and so most + file systems will be readable without selecting this option. + + If unsure, say N. diff --git a/fs/erofs/decompress.c b/fs/erofs/decompress.c index e04e5c34a8d..ec74816534c 100644 --- a/fs/erofs/decompress.c +++ b/fs/erofs/decompress.c @@ -1,6 +1,85 @@ // SPDX-License-Identifier: GPL-2.0+ #include "decompress.h" +#if IS_ENABLED(CONFIG_ZLIB) +#include <u-boot/zlib.h> + +/* report a zlib or i/o error */ +static int zerr(int ret) +{ + switch (ret) { + case Z_STREAM_ERROR: + return -EINVAL; + case Z_DATA_ERROR: + return -EIO; + case Z_MEM_ERROR: + return -ENOMEM; + case Z_ERRNO: + default: + return -EFAULT; + } +} + +static int z_erofs_decompress_deflate(struct z_erofs_decompress_req *rq) +{ + u8 *dest = (u8 *)rq->out; + u8 *src = (u8 *)rq->in; + u8 *buff = NULL; + unsigned int inputmargin = 0; + z_stream strm; + int ret; + + while (!src[inputmargin & (erofs_blksiz() - 1)]) + if (!(++inputmargin & (erofs_blksiz() - 1))) + break; + + if (inputmargin >= rq->inputsize) + return -EFSCORRUPTED; + + if (rq->decodedskip) { + buff = malloc(rq->decodedlength); + if (!buff) + return -ENOMEM; + dest = buff; + } + + /* allocate inflate state */ + strm.zalloc = Z_NULL; + strm.zfree = Z_NULL; + strm.opaque = Z_NULL; + strm.avail_in = 0; + strm.next_in = Z_NULL; + ret = inflateInit2(&strm, -15); + if (ret != Z_OK) { + free(buff); + return zerr(ret); + } + + strm.next_in = src + inputmargin; + strm.avail_in = rq->inputsize - inputmargin; + strm.next_out = dest; + strm.avail_out = rq->decodedlength; + + ret = inflate(&strm, rq->partial_decoding ? Z_SYNC_FLUSH : Z_FINISH); + if (ret != Z_STREAM_END || strm.total_out != rq->decodedlength) { + if (ret != Z_OK || !rq->partial_decoding) { + ret = zerr(ret); + goto out_inflate_end; + } + } + + if (rq->decodedskip) + memcpy(rq->out, dest + rq->decodedskip, + rq->decodedlength - rq->decodedskip); + +out_inflate_end: + inflateEnd(&strm); + if (buff) + free(buff); + return ret; +} +#endif + #if IS_ENABLED(CONFIG_LZ4) #include <u-boot/lz4.h> static int z_erofs_decompress_lz4(struct z_erofs_decompress_req *rq) @@ -94,5 +173,9 @@ int z_erofs_decompress(struct z_erofs_decompress_req *rq) if (rq->alg == Z_EROFS_COMPRESSION_LZ4) return z_erofs_decompress_lz4(rq); #endif +#if IS_ENABLED(CONFIG_ZLIB) + if (rq->alg == Z_EROFS_COMPRESSION_DEFLATE) + return z_erofs_decompress_deflate(rq); +#endif return -EOPNOTSUPP; } diff --git a/fs/erofs/erofs_fs.h b/fs/erofs/erofs_fs.h index 158e2c68a1a..5bac4fe1a1d 100644 --- a/fs/erofs/erofs_fs.h +++ b/fs/erofs/erofs_fs.h @@ -304,6 +304,7 @@ enum { enum { Z_EROFS_COMPRESSION_LZ4 = 0, Z_EROFS_COMPRESSION_LZMA = 1, + Z_EROFS_COMPRESSION_DEFLATE = 2, Z_EROFS_COMPRESSION_MAX }; diff --git a/include/acpi/acpigen.h b/include/acpi/acpigen.h index 2c269ed6627..3aa94d70b9c 100644 --- a/include/acpi/acpigen.h +++ b/include/acpi/acpigen.h @@ -121,7 +121,7 @@ struct acpi_cstate { * * @percent: Percent of the core CPU operating frequency that will be * available when this throttling state is invoked - * @power: Throttling state’s maximum power dissipation (mw) + * @power: Throttling state's maximum power dissipation (mw) * @latency: Worst-case latency (uS) that the CPU is unavailable during a * transition from any throttling state to this throttling state * @control: Value to be written to the Processor Control Register @@ -920,7 +920,7 @@ void acpigen_write_pss_package(struct acpi_ctx *ctx, uint corefreq, uint power, * @ctx: ACPI context pointer * @domain: Dependency domain number to which this P state entry belongs * @numprocs: Number of processors belonging to the domain for this logical - * processor’s P-states + * processor's P-states * @coordtype: Coordination type */ void acpigen_write_psd_package(struct acpi_ctx *ctx, uint domain, uint numprocs, @@ -972,7 +972,7 @@ void acpigen_write_tss_package(struct acpi_ctx *ctx, * @ctx: ACPI context pointer * @domain: dependency domain number to which this T state entry belongs * @numprocs: Number of processors belonging to the domain for this logical - * processor’s T-states + * processor's T-states * @coordtype: Coordination type */ void acpigen_write_tsd_package(struct acpi_ctx *ctx, uint domain, uint numprocs, diff --git a/include/bootm.h b/include/bootm.h index 6983375ff8b..61160705215 100644 --- a/include/bootm.h +++ b/include/bootm.h @@ -317,7 +317,7 @@ void zimage_dump(struct boot_params *base_ptr, bool show_cmdline); * bootm_boot_start() - Boot an image at the given address * * @addr: Image address - * @cmdline: Command line to set, NULL for default + * @cmdline: Command line to set */ int bootm_boot_start(ulong addr, const char *cmdline); diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index 845705c86db..c8ec034fc97 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -46,8 +46,6 @@ "fdt_board=eval\0" \ "initrd_addr=0x83800000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \ - "consoleblank=0 earlycon\0" \ "update_uboot=askenv confirm Did you load flash.bin resp. u-boot-dtb.imx (y/N)?; " \ "if test \"$confirm\" = \"y\"; then " \ "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 8a9f3ef75a7..0df3917e200 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -64,12 +64,9 @@ #define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ - "boot_file=zImage\0" \ "boot_script_dhcp=boot.scr\0" \ "console=ttymxc0\0" \ - "defargs=enable_wait_mode=off vmalloc=400M\0" \ "fdt_board=eval\0" \ - "fdt_fixup=;\0" \ MEM_LAYOUT_ENV_SETTINGS \ UBOOT_UPDATE \ "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ @@ -80,16 +77,12 @@ "|| setenv drive 2; mmc rescan; load ${interface} ${drive}:1" \ " ${loadaddr} flash_blk.img && " \ "source ${loadaddr}\0" \ - "setup=setenv setupargs fec_mac=${ethaddr} " \ - "consoleblank=0 no_console_suspend=1 console=tty1 " \ - "console=${console},${baudrate}n8\0 " \ "setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \ "setusbupdate=usb start && setenv interface usb; setenv drive 0; " \ "load ${interface} ${drive}:1 ${loadaddr} flash_blk.img && " \ "source ${loadaddr}\0" \ "splashpos=m,m\0" \ - "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "vidargs=mxc_hdmi.only_cea=1 fbmem=32M\0" + "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" /* Miscellaneous configurable options */ diff --git a/include/configs/apple.h b/include/configs/apple.h index 0576bc04c94..1e08b114480 100644 --- a/include/configs/apple.h +++ b/include/configs/apple.h @@ -6,29 +6,13 @@ /* Environment */ #define ENV_DEVICE_SETTINGS \ "stdin=serial,usbkbd,spikbd\0" \ - "stdout=serial,vidconsole\0" \ - "stderr=serial,vidconsole\0" + "stdout=vidconsole,serial\0" \ + "stderr=vidconsole,serial\0" -#if IS_ENABLED(CONFIG_CMD_NVME) - #define BOOT_TARGET_NVME(func) func(NVME, nvme, 0) -#else - #define BOOT_TARGET_NVME(func) -#endif - -#if IS_ENABLED(CONFIG_CMD_USB) - #define BOOT_TARGET_USB(func) func(USB, usb, 0) -#else - #define BOOT_TARGET_USB(func) -#endif - -#define BOOT_TARGET_DEVICES(func) \ - BOOT_TARGET_NVME(func) \ - BOOT_TARGET_USB(func) - -#include <config_distro_bootcmd.h> +#define BOOT_TARGETS "nvme usb" #define CFG_EXTRA_ENV_SETTINGS \ ENV_DEVICE_SETTINGS \ - BOOTENV + "boot_targets=" BOOT_TARGETS "\0" #endif diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 561a61ebc03..8860ceec1a0 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -48,12 +48,12 @@ "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rw rootfstype=ubifs " \ "ubi.fm_autoconvert=1\0" \ "ubiboot=run setup; " \ - "setenv bootargs ${defargs} ${ubiargs} " \ - "${setupargs} ${vidargs} ${tdxargs}; echo Booting from NAND...; " \ + "setenv bootargs ${ubiargs} " \ + "${setupargs} ${tdxargs}; echo Booting from NAND...; " \ "ubi part ubi &&" \ "ubi read ${kernel_addr_r} kernel && " \ "ubi read ${fdt_addr_r} dtb && " \ - "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ + "bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ #if defined(CONFIG_TARGET_COLIBRI_IMX6ULL_NAND) /* Run Distro Boot script if ubiboot fails */ @@ -86,11 +86,7 @@ UBOOT_UPDATE \ "boot_script_dhcp=boot.scr\0" \ "console=ttymxc0\0" \ - "defargs=user_debug=30\0" \ "fdt_board=eval-v3\0" \ - "fdt_fixup=;\0" \ - "ip_dyn=yes\0" \ - "kernel_file=zImage\0" \ "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \ "${board}/flash_eth.img && source ${loadaddr}\0" \ @@ -99,7 +95,7 @@ "${board}/flash_blk.img && source ${loadaddr}\0" \ "setup=setenv setupargs " \ "console=tty1 console=${console}" \ - ",${baudrate}n8 ${memargs} ${mtdparts} consoleblank=0\0" \ + ",${baudrate}n8 ${memargs} ${mtdparts}\0" \ "setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \ "setusbupdate=usb start && setenv interface usb && " \ "fatload ${interface} 0:1 ${loadaddr} " \ diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index 042fcb8757f..2b7fea30116 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -40,8 +40,6 @@ "fdt_board=eval-v3\0" \ "initrd_addr=0x83800000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \ - "consoleblank=0 earlycon\0" \ "update_uboot=askenv confirm Did you load flash.bin resp. u-boot-dtb.imx (y/N)?; " \ "if test \"$confirm\" = \"y\"; then " \ "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 4b2841833b5..79e5b870b81 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -58,12 +58,9 @@ #define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ - "boot_file=zImage\0" \ "boot_script_dhcp=boot.scr\0" \ "console=ttymxc0\0" \ - "defargs=enable_wait_mode=off galcore.contiguousSize=50331648\0" \ "fdt_board=eval-v3\0" \ - "fdt_fixup=;\0" \ MEM_LAYOUT_ENV_SETTINGS \ UBOOT_UPDATE \ "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ @@ -72,16 +69,12 @@ "setsdupdate=setenv interface mmc; setenv drive 1; mmc rescan; load " \ "${interface} ${drive}:1 ${loadaddr} flash_blk.img && " \ "source ${loadaddr}\0" \ - "setup=setenv setupargs fec_mac=${ethaddr} " \ - "consoleblank=0 no_console_suspend=1 console=tty1 " \ - "console=${console},${baudrate}n8\0 " \ "setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \ "setusbupdate=usb start && setenv interface usb; setenv drive 0; " \ "load ${interface} ${drive}:1 ${loadaddr} flash_blk.img && " \ "source ${loadaddr}\0" \ "splashpos=m,m\0" \ - "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "vidargs=fbmem=8M\0" + "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" /* Miscellaneous configurable options */ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 7a9f4afe7d1..33133a0b96e 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -89,12 +89,12 @@ "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \ "ubi.fm_autoconvert=1\0" \ "ubiboot=run setup; " \ - "setenv bootargs ${defargs} ${ubiargs} " \ - "${setupargs} ${vidargs} ${tdxargs}; echo Booting from NAND...; " \ + "setenv bootargs ${ubiargs} " \ + "${setupargs} ${tdxargs}; echo Booting from NAND...; " \ "ubi part ubi && run m4boot && " \ "ubi read ${kernel_addr_r} kernel && " \ "ubi read ${fdt_addr_r} dtb && " \ - "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ + "bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ #if defined(CONFIG_TARGET_COLIBRI_IMX7_NAND) #define MODULE_EXTRA_ENV_SETTINGS \ @@ -123,15 +123,10 @@ MEM_LAYOUT_ENV_SETTINGS \ MODULE_EXTRA_ENV_SETTINGS \ UBOOT_UPDATE \ - "boot_file=zImage\0" \ "boot_script_dhcp=boot.scr\0" \ "console=ttymxc0\0" \ - "defargs=\0" \ "fdt_board=eval-v3\0" \ - "fdt_fixup=;\0" \ "m4boot=;\0" \ - "ip_dyn=yes\0" \ - "kernel_file=zImage\0" \ "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \ "${board}/flash_eth.img && source ${loadaddr}\0" \ @@ -140,7 +135,7 @@ "${board}/flash_blk.img && source ${loadaddr}\0" \ "setup=setenv setupargs " \ "console=tty1 console=${console}" \ - ",${baudrate}n8 ${memargs} ${mtdparts} consoleblank=0\0" \ + ",${baudrate}n8 ${memargs} ${mtdparts}\0" \ "setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \ "setusbupdate=usb start && setenv interface usb && " \ "fatload ${interface} 0:1 ${loadaddr} " \ diff --git a/include/configs/endeavoru.h b/include/configs/endeavoru.h index 46c582e963e..348078f9770 100644 --- a/include/configs/endeavoru.h +++ b/include/configs/endeavoru.h @@ -53,7 +53,8 @@ "boot_block_size_r=0x200000\0" \ "boot_block_size=0x1000\0" \ "bootloader_file=u-boot-dtb-tegra.bin\0" \ - "check_button=gpio input 179; test $? -eq 0\0" \ + "button_cmd_0_name=Volume Down\0" \ + "button_cmd_0=bootmenu\0" \ "partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" \ ENDEAVORU_BOOTMENU diff --git a/include/configs/evb_rk3328.h b/include/configs/evb_rk3328.h index d10e5b1d2e0..c985080f7b3 100644 --- a/include/configs/evb_rk3328.h +++ b/include/configs/evb_rk3328.h @@ -6,6 +6,11 @@ #ifndef __EVB_RK3328_H #define __EVB_RK3328_H +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdin=serial,usbkbd\0" \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + #include <configs/rk3328_common.h> #endif diff --git a/include/configs/grouper.h b/include/configs/grouper.h index 93304ddc6e8..8064b88902e 100644 --- a/include/configs/grouper.h +++ b/include/configs/grouper.h @@ -49,7 +49,10 @@ "boot_block_size_r=0x200000\0" \ "boot_block_size=0x1000\0" \ "bootloader_file=u-boot-dtb-tegra.bin\0" \ - "check_button=gpio input 131; test $? -eq 0;\0" \ + "button_cmd_0_name=Volume Down\0" \ + "button_cmd_0=bootmenu\0" \ + "button_cmd_1_name=Lid\0" \ + "button_cmd_1=poweroff\0" \ "partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" \ GROUPER_BOOTMENU diff --git a/include/configs/hmibsc.h b/include/configs/hmibsc.h new file mode 100644 index 00000000000..27404c80fdf --- /dev/null +++ b/include/configs/hmibsc.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Board configuration file for HMIBSC + * + * (C) Copyright 2024 Sumit Garg <sumit.garg@linaro.org> + */ + +#ifndef __CONFIGS_HMIBSC_H +#define __CONFIGS_HMIBSC_H + +/* PHY needs a longer aneg time */ +#define PHY_ANEG_TIMEOUT 8000 + +#define CFG_ENV_FLAGS_LIST_STATIC "BOOT_A_LEFT:dw,BOOT_B_LEFT:dw,BOOT_ORDER:sw" + +#endif diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index e920ec7e5dd..2c40674b224 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -26,6 +26,7 @@ ENV_MEM_LAYOUT_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "partitions=" PARTS_DEFAULT \ + ROCKCHIP_DEVICE_SETTINGS \ "boot_targets=" BOOT_TARGETS "\0" #endif diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 0d0965ecce2..fc74980f7ca 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -7,33 +7,7 @@ #ifndef __TEGRA_COMMON_POST_H #define __TEGRA_COMMON_POST_H -#if IS_ENABLED(CONFIG_CMD_USB) -#define BOOT_TARGET_USB(func) func(USB, usb, 0) -#else -#define BOOT_TARGET_USB(func) -#endif - -#if CONFIG_IS_ENABLED(CMD_DHCP) && CONFIG_IS_ENABLED(CMD_PXE) -#define BOOT_TARGET_PXE(func) func(PXE, pxe, na) -#else -#define BOOT_TARGET_PXE(func) -#endif - -#if CONFIG_IS_ENABLED(CMD_DHCP) -#define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na) -#else -#define BOOT_TARGET_DHCP(func) -#endif - -#ifndef BOOT_TARGET_DEVICES -#define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 1) \ - func(MMC, mmc, 0) \ - BOOT_TARGET_USB(func) \ - BOOT_TARGET_PXE(func) \ - BOOT_TARGET_DHCP(func) -#endif -#include <config_distro_bootcmd.h> +#define BOOT_TARGETS "mmc1 mmc0 usb pxe dhcp" #ifdef CONFIG_TEGRA_KEYBOARD #define STDIN_KBD_KBC ",tegra-kbc" @@ -88,7 +62,7 @@ MEM_LAYOUT_ENV_SETTINGS \ "fdt_high=" FDT_HIGH "\0" \ "initrd_high=" INITRD_HIGH "\0" \ - BOOTENV \ + "boot_targets=" BOOT_TARGETS "\0" \ BOARD_EXTRA_ENV_SETTINGS #endif /* __TEGRA_COMMON_POST_H */ diff --git a/include/configs/transformer-common.h b/include/configs/transformer-common.h index 3b7db0ab142..bb6817c8d2b 100644 --- a/include/configs/transformer-common.h +++ b/include/configs/transformer-common.h @@ -71,18 +71,20 @@ "bootmenu_1=mount external storage=usb start && ums 0 mmc 1; bootmenu\0" \ "bootmenu_2=fastboot=echo Starting Fastboot protocol ...; fastboot usb 0; bootmenu\0" \ "bootmenu_3=update bootloader=run flash_uboot\0" \ - "bootmenu_4=enter console=usb start; setenv skip_boot 1; exit\0" \ - "bootmenu_5=reboot RCM=enterrcm\0" \ - "bootmenu_6=reboot=reset\0" \ - "bootmenu_7=power off=poweroff\0" \ + "bootmenu_4=reboot RCM=enterrcm\0" \ + "bootmenu_5=reboot=reset\0" \ + "bootmenu_6=power off=poweroff\0" \ "bootmenu_delay=-1\0" #define BOARD_EXTRA_ENV_SETTINGS \ "spi_size=0x400000\0" \ "boot_block_size_r=0x200000\0" \ "boot_block_size=0x1000\0" \ - "check_button=gpio input ${gpio_button}; test $? -eq 0;\0" \ "bootloader_file=u-boot-dtb-tegra.bin\0" \ + "button_cmd_0_name=Volume Down\0" \ + "button_cmd_0=bootmenu\0" \ + "button_cmd_1_name=Lid sensor\0" \ + "button_cmd_1=poweroff\0" \ "partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" \ TRANSFORMER_BOOTMENU diff --git a/include/configs/verdin-am62.h b/include/configs/verdin-am62.h index 9d2e37f2d96..ac44809fdfa 100644 --- a/include/configs/verdin-am62.h +++ b/include/configs/verdin-am62.h @@ -39,12 +39,9 @@ #define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ - "boot_scripts=boot.scr\0" \ "boot_script_dhcp=boot.scr\0" \ "console=ttyS2\0" \ "fdt_board=dev\0" \ - "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \ - "consoleblank=0 earlycon=ns16550a,mmio32,0x02800000\0" \ "update_tiboot3=askenv confirm Did you load tiboot3.bin (y/N)?; " \ "if test \"$confirm\" = \"y\"; then " \ "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index a7ea02807dd..34238d3b505 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -37,14 +37,11 @@ #define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ - "boot_file=Image\0" \ "boot_script_dhcp=boot.scr\0" \ "console=ttymxc0\0" \ "fdt_board=dev\0" \ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \ - "consoleblank=0 earlycon\0" \ "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \ "if test \"$confirm\" = \"y\"; then " \ "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 256bab089ff..0b88e95603d 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -13,7 +13,6 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CFG_MALLOC_F_ADDR 0x184000 @@ -40,15 +39,11 @@ #define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ - "boot_file=Image\0" \ - "boot_scripts=boot.scr\0" \ "boot_script_dhcp=boot.scr\0" \ "console=ttymxc2\0" \ "fdt_board=dev\0" \ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \ - "consoleblank=0 earlycon\0" \ "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \ "if test \"$confirm\" = \"y\"; then " \ "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ diff --git a/include/configs/x3-t30.h b/include/configs/x3-t30.h index 14532542ea6..78a20128611 100644 --- a/include/configs/x3-t30.h +++ b/include/configs/x3-t30.h @@ -54,7 +54,8 @@ "boot_block_size_r=0x200000\0" \ "boot_block_size=0x1000\0" \ "bootloader_file=u-boot-dtb-tegra.bin\0" \ - "check_button=gpio input 116; test $? -eq 0\0" \ + "button_cmd_0_name=Volume Down\0" \ + "button_cmd_0=bootmenu\0" \ "partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" \ X3_BOOTMENU diff --git a/include/dt-bindings/clock/imx93-clock.h b/include/dt-bindings/clock/imx93-clock.h index 35a1f62053a..787c9e74dc9 100644 --- a/include/dt-bindings/clock/imx93-clock.h +++ b/include/dt-bindings/clock/imx93-clock.h @@ -203,6 +203,7 @@ #define IMX93_CLK_ARM_PLL 198 #define IMX93_CLK_A55_SEL 199 #define IMX93_CLK_A55_CORE 200 -#define IMX93_CLK_END 201 +#define IMX93_CLK_PDM_IPG 201 +#define IMX93_CLK_END 202 #endif diff --git a/include/dw_hdmi.h b/include/dw_hdmi.h index 8acae3839fb..f4d66edacee 100644 --- a/include/dw_hdmi.h +++ b/include/dw_hdmi.h @@ -534,6 +534,14 @@ struct hdmi_data_info { struct hdmi_vmode video_mode; }; +struct dw_hdmi; + +struct dw_hdmi_phy_ops { + int (*phy_set)(struct dw_hdmi *hdmi, uint mpixelclock); + void (*read_hpd)(struct dw_hdmi *hdmi, bool hdp_status); + void (*setup_hpd)(struct dw_hdmi *hdmi); +}; + struct dw_hdmi { ulong ioaddr; const struct hdmi_mpll_config *mpll_cfg; @@ -543,8 +551,8 @@ struct dw_hdmi { u8 reg_io_width; struct hdmi_data_info hdmi_data; struct udevice *ddc_bus; + const struct dw_hdmi_phy_ops *ops; - int (*phy_set)(struct dw_hdmi *hdmi, uint mpixelclock); void (*write_reg)(struct dw_hdmi *hdmi, u8 val, int offset); u8 (*read_reg)(struct dw_hdmi *hdmi, int offset); }; @@ -556,5 +564,6 @@ void dw_hdmi_phy_init(struct dw_hdmi *hdmi); int dw_hdmi_enable(struct dw_hdmi *hdmi, const struct display_timing *edid); int dw_hdmi_read_edid(struct dw_hdmi *hdmi, u8 *buf, int buf_size); void dw_hdmi_init(struct dw_hdmi *hdmi); +int dw_hdmi_detect_hpd(struct dw_hdmi *hdmi); #endif diff --git a/include/efi_loader.h b/include/efi_loader.h index bb51c028177..69442f4e58d 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -159,6 +159,10 @@ static inline void efi_set_bootdev(const char *dev, const char *devnr, #define EFICONFIG_AUTO_GENERATED_ENTRY_GUID \ EFI_GUID(0x8108ac4e, 0x9f11, 0x4d59, \ 0x85, 0x0e, 0xe2, 0x1a, 0x52, 0x2c, 0x59, 0xb2) +#define U_BOOT_EFI_RT_VAR_FILE_GUID \ + EFI_GUID(0xb2ac5fc9, 0x92b7, 0x4acd, \ + 0xae, 0xac, 0x11, 0xe8, 0x18, 0xc3, 0x13, 0x0c) + /* Use internal device tree when starting UEFI application */ #define EFI_FDT_USE_INTERNAL NULL diff --git a/include/efi_variable.h b/include/efi_variable.h index 42a2b7c52be..223bb9a4a5b 100644 --- a/include/efi_variable.h +++ b/include/efi_variable.h @@ -271,13 +271,16 @@ const efi_guid_t *efi_auth_var_get_guid(const u16 *name); * * @variable_name_size: size of variable_name buffer in bytes * @variable_name: name of uefi variable's name in u16 + * @mask: bitmask with required attributes of variables to be collected. + * variables are only collected if all of the required + * attributes match. Use 0 to skip matching * @vendor: vendor's guid * * Return: status code */ efi_status_t __efi_runtime efi_get_next_variable_name_mem(efi_uintn_t *variable_name_size, u16 *variable_name, - efi_guid_t *vendor); + efi_guid_t *vendor, u32 mask); /** * efi_get_variable_mem() - Runtime common code across efi variable * implementations for GetVariable() from @@ -289,12 +292,15 @@ efi_get_next_variable_name_mem(efi_uintn_t *variable_name_size, u16 *variable_na * @data_size: size of the buffer to which the variable value is copied * @data: buffer to which the variable value is copied * @timep: authentication time (seconds since start of epoch) + * @mask: bitmask with required attributes of variables to be collected. + * variables are only collected if all of the required + * attributes match. Use 0 to skip matching * Return: status code */ efi_status_t __efi_runtime efi_get_variable_mem(const u16 *variable_name, const efi_guid_t *vendor, u32 *attributes, efi_uintn_t *data_size, void *data, - u64 *timep); + u64 *timep, u32 mask); /** * efi_get_variable_runtime() - runtime implementation of GetVariable() @@ -334,4 +340,10 @@ efi_get_next_variable_name_runtime(efi_uintn_t *variable_name_size, */ void efi_var_buf_update(struct efi_var_file *var_buf); +efi_status_t __efi_runtime efi_var_collect_mem(struct efi_var_file *buf, + efi_uintn_t *lenp, + u32 check_attr_mask); + +u32 efi_var_entry_len(struct efi_var_entry *var); + #endif diff --git a/include/fastboot-internal.h b/include/fastboot-internal.h index e59c187c05c..610d4f91414 100644 --- a/include/fastboot-internal.h +++ b/include/fastboot-internal.h @@ -6,7 +6,7 @@ /** * fastboot_buf_addr - base address of the fastboot download buffer */ -extern ulong fastboot_buf_addr; +extern void *fastboot_buf_addr; /** * fastboot_buf_size - size of the fastboot download buffer diff --git a/include/fastboot.h b/include/fastboot.h index c75184cc912..2ca1b907a54 100644 --- a/include/fastboot.h +++ b/include/fastboot.h @@ -48,6 +48,7 @@ enum { FASTBOOT_COMMAND_OEM_BOOTBUS, FASTBOOT_COMMAND_OEM_RUN, FASTBOOT_COMMAND_OEM_CONSOLE, + FASTBOOT_COMMAND_OEM_BOARD, FASTBOOT_COMMAND_ACMD, FASTBOOT_COMMAND_UCMD, FASTBOOT_COMMAND_COUNT @@ -114,13 +115,13 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason); */ void fastboot_set_progress_callback(void (*progress)(const char *msg)); -/** +/* * fastboot_init() - initialise new fastboot protocol session * - * @buf_addr: Address of download buffer, or 0 for default + * @buf_addr: Pointer to download buffer, or NULL for default * @buf_size: Size of download buffer, or zero for default */ -void fastboot_init(ulong buf_addr, u32 buf_size); +void fastboot_init(void *buf_addr, u32 buf_size); /** * fastboot_boot() - Execute fastboot boot command diff --git a/include/fdt_support.h b/include/fdt_support.h index 25600d62f29..4b71b8948d9 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -423,6 +423,8 @@ int arch_fixup_memory_node(void *blob); int fdt_setup_simplefb_node(void *fdt, int node, u64 base_address, u32 width, u32 height, u32 stride, const char *format); +int fdt_add_fb_mem_rsv(void *blob); + int fdt_overlay_apply_verbose(void *fdt, void *fdto); int fdt_valid(struct fdt_header **blobp); diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 7a66c7af749..ee18a63e460 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -153,7 +153,7 @@ struct mtd_info { uint32_t flags; uint64_t size; // Total size of the MTD - /* "Major" erase size for the device. Naïve users may take this + /* "Major" erase size for the device. Naive users may take this * to be the only erase size available, or may use the more detailed * information below if they desire */ diff --git a/include/power/tps65941.h b/include/power/tps65941.h index a2bc6814bad..cec85333f0b 100644 --- a/include/power/tps65941.h +++ b/include/power/tps65941.h @@ -3,11 +3,14 @@ #define TPS659413 0x2 #define TPS659414 0x3 #define LP876441 0x4 +#define TPS65224 0x5 /* I2C device address for pmic tps65941 */ #define TPS65941_I2C_ADDR (0x12 >> 1) #define TPS65941_LDO_NUM 4 #define TPS65941_BUCK_NUM 5 +#define TPS65224_LDO_NUM 3 +#define TPS65224_BUCK_NUM 4 /* Drivers name */ #define TPS65941_LDO_DRIVER "tps65941_ldo" @@ -25,3 +28,30 @@ #define TPS65941_LDO_MODE_MASK 0x1 #define TPS65941_LDO_BYPASS_EN 0x80 #define TP65941_BUCK_CONF_SLEW_MASK 0x7 + +#define TPS65224_BUCK_VOLT_MAX 3300000 +#define TPS65224_BUCK1_VOLT_MAX_HEX 0xFD +#define TPS65224_BUCK234_VOLT_MAX_HEX 0x45 + +#define TPS65224_BUCK_CONF_SLEW_MASK 0x3 +#define TPS65224_LDO_VOLT_MASK (0x3F << 1) + +#define TPS65224_LDO1_VOLT_MIN_HEX 0x0C +#define TPS65224_LDO23_VOLT_MIN_HEX 0x00 +#define TPS65224_LDO1_VOLT_MAX_HEX 0x36 +#define TPS65224_LDO23_VOLT_MAX_HEX 0x38 + +#define TPS65224_LDO1_VOLT_MAX 3300000 +#define TPS65224_LDO23_VOLT_MAX 3400000 +#define TPS65224_LDO1_VOLT_MIN 1200000 +#define TPS65224_LDO23_VOLT_MIN 600000 + +#define TPS65224_LDO_STEP 50000 + +#define TPS65224_LDO_BYP_CONFIG 7 + +#define TPS65224_LDO1_VOLT_BYP_MIN 2200000 +#define TPS65224_LDO1_VOLT_BYP_MAX 3600000 + +#define TPS65224_LDO23_VOLT_BYP_MIN 1500000 +#define TPS65224_LDO23_VOLT_BYP_MAX 5500000 diff --git a/include/sdhci.h b/include/sdhci.h index a1b74e3bd79..78ef0d1c088 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -11,6 +11,7 @@ #include <linux/bitops.h> #include <linux/types.h> +#include <linux/kernel.h> #include <asm/io.h> #include <mmc.h> #include <asm/gpio.h> @@ -291,16 +292,21 @@ struct sdhci_ops { * Return: 0 if successful, -ve on error */ int (*set_enhanced_strobe)(struct sdhci_host *host); + +#ifdef CONFIG_MMC_SDHCI_ADMA_HELPERS + void (*adma_write_desc)(struct sdhci_host *host, void **desc, + dma_addr_t addr, int len, bool end); +#endif }; #define ADMA_MAX_LEN 65532 -#ifdef CONFIG_DMA_ADDR_T_64BIT +#ifdef CONFIG_MMC_SDHCI_ADMA_64BIT #define ADMA_DESC_LEN 16 #else #define ADMA_DESC_LEN 8 #endif -#define ADMA_TABLE_NO_ENTRIES (CONFIG_SYS_MMC_MAX_BLK_COUNT * \ - MMC_MAX_BLOCK_LEN) / ADMA_MAX_LEN +#define ADMA_TABLE_NO_ENTRIES DIV_ROUND_UP(CONFIG_SYS_MMC_MAX_BLK_COUNT * \ + MMC_MAX_BLOCK_LEN, ADMA_MAX_LEN) #define ADMA_TABLE_SZ (ADMA_TABLE_NO_ENTRIES * ADMA_DESC_LEN) @@ -319,7 +325,7 @@ struct sdhci_adma_desc { u8 reserved; u16 len; u32 addr_lo; -#ifdef CONFIG_DMA_ADDR_T_64BIT +#ifdef CONFIG_MMC_SDHCI_ADMA_64BIT u32 addr_hi; #endif } __packed; @@ -526,8 +532,11 @@ extern const struct dm_mmc_ops sdhci_ops; #else #endif +void sdhci_adma_write_desc(struct sdhci_host *host, void **next_desc, + dma_addr_t addr, int len, bool end); struct sdhci_adma_desc *sdhci_adma_init(void); -void sdhci_prepare_adma_table(struct sdhci_adma_desc *table, - struct mmc_data *data, dma_addr_t addr); +void sdhci_prepare_adma_table(struct sdhci_host *host, + struct sdhci_adma_desc *table, + struct mmc_data *data, dma_addr_t start_addr); #endif /* __SDHCI_HW_H */ diff --git a/include/soc/qcom/geni-se.h b/include/soc/qcom/geni-se.h new file mode 100644 index 00000000000..698a9256d26 --- /dev/null +++ b/include/soc/qcom/geni-se.h @@ -0,0 +1,265 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + */ + +#ifndef _QCOM_GENI_SE +#define _QCOM_GENI_SE + +/* Protocols supported by GENI Serial Engines */ +enum geni_se_protocol_type { + GENI_SE_NONE, + GENI_SE_SPI, + GENI_SE_UART, + GENI_SE_I2C, + GENI_SE_I3C, + GENI_SE_SPI_SLAVE, +}; + +#define QUP_HW_VER_REG 0x4 + +/* Common SE registers */ +#define GENI_INIT_CFG_REVISION 0x0 +#define GENI_S_INIT_CFG_REVISION 0x4 +#define GENI_FORCE_DEFAULT_REG 0x20 +#define GENI_OUTPUT_CTRL 0x24 +#define GENI_CGC_CTRL 0x28 +#define SE_GENI_STATUS 0x40 +#define GENI_SER_M_CLK_CFG 0x48 +#define GENI_SER_S_CLK_CFG 0x4c +#define GENI_IF_DISABLE_RO 0x64 +#define GENI_FW_REVISION_RO 0x68 +#define SE_GENI_CLK_SEL 0x7c +#define SE_GENI_CFG_SEQ_START 0x84 +#define SE_GENI_BYTE_GRAN 0x254 +#define SE_GENI_DMA_MODE_EN 0x258 +#define SE_GENI_TX_PACKING_CFG0 0x260 +#define SE_GENI_TX_PACKING_CFG1 0x264 +#define SE_GENI_RX_PACKING_CFG0 0x284 +#define SE_GENI_RX_PACKING_CFG1 0x288 +#define SE_GENI_M_CMD0 0x600 +#define SE_GENI_M_CMD_CTRL_REG 0x604 +#define SE_GENI_M_IRQ_STATUS 0x610 +#define SE_GENI_M_IRQ_EN 0x614 +#define SE_GENI_M_IRQ_CLEAR 0x618 +#define SE_GENI_S_CMD0 0x630 +#define SE_GENI_S_CMD_CTRL_REG 0x634 +#define SE_GENI_S_IRQ_STATUS 0x640 +#define SE_GENI_S_IRQ_EN 0x644 +#define SE_GENI_S_IRQ_CLEAR 0x648 +#define SE_GENI_TX_FIFOn 0x700 +#define SE_GENI_RX_FIFOn 0x780 +#define SE_GENI_TX_FIFO_STATUS 0x800 +#define SE_GENI_RX_FIFO_STATUS 0x804 +#define SE_GENI_TX_WATERMARK_REG 0x80c +#define SE_GENI_RX_WATERMARK_REG 0x810 +#define SE_GENI_RX_RFR_WATERMARK_REG 0x814 +#define SE_GENI_IOS 0x908 +#define SE_DMA_TX_IRQ_STAT 0xc40 +#define SE_DMA_TX_IRQ_CLR 0xc44 +#define SE_DMA_TX_FSM_RST 0xc58 +#define SE_DMA_RX_IRQ_STAT 0xd40 +#define SE_DMA_RX_IRQ_CLR 0xd44 +#define SE_DMA_RX_LEN_IN 0xd54 +#define SE_DMA_RX_FSM_RST 0xd58 +#define SE_GSI_EVENT_EN 0xe18 +#define SE_IRQ_EN 0xe1c +#define SE_HW_PARAM_0 0xe24 +#define SE_HW_PARAM_1 0xe28 + +/* GENI_FORCE_DEFAULT_REG fields */ +#define FORCE_DEFAULT BIT(0) + +/* GENI_OUTPUT_CTRL fields */ +#define GENI_IO_MUX_0_EN BIT(0) +#define DEFAULT_IO_OUTPUT_CTRL_MSK GENMASK(6, 0) + +/* GENI_CGC_CTRL fields */ +#define CFG_AHB_CLK_CGC_ON BIT(0) +#define CFG_AHB_WR_ACLK_CGC_ON BIT(1) +#define DATA_AHB_CLK_CGC_ON BIT(2) +#define SCLK_CGC_ON BIT(3) +#define TX_CLK_CGC_ON BIT(4) +#define RX_CLK_CGC_ON BIT(5) +#define EXT_CLK_CGC_ON BIT(6) +#define PROG_RAM_HCLK_OFF BIT(8) +#define PROG_RAM_SCLK_OFF BIT(9) +#define DEFAULT_CGC_EN GENMASK(6, 0) + +/* GENI_STATUS fields */ +#define M_GENI_CMD_ACTIVE BIT(0) +#define S_GENI_CMD_ACTIVE BIT(12) + +/* GENI_SER_M_CLK_CFG/GENI_SER_S_CLK_CFG */ +#define SER_CLK_EN BIT(0) +#define CLK_DIV_MSK GENMASK(15, 4) +#define CLK_DIV_SHFT 4 + +/* GENI_IF_DISABLE_RO fields */ +#define FIFO_IF_DISABLE (BIT(0)) + +/* GENI_FW_REVISION_RO fields */ +#define FW_REV_PROTOCOL_MSK GENMASK(15, 8) +#define FW_REV_PROTOCOL_SHFT 8 + +/* GENI_CLK_SEL fields */ +#define CLK_SEL_MSK GENMASK(2, 0) + +/* SE_GENI_CFG_SEQ_START fields */ +#define START_TRIGGER BIT(0) + +/* SE_IRQ_EN fields */ +#define DMA_RX_IRQ_EN BIT(0) +#define DMA_TX_IRQ_EN BIT(1) +#define GENI_M_IRQ_EN BIT(2) +#define GENI_S_IRQ_EN BIT(3) + +/* SE_GENI_DMA_MODE_EN */ +#define GENI_DMA_MODE_EN BIT(0) + +/* GENI_M_CMD0 fields */ +#define M_OPCODE_MSK GENMASK(31, 27) +#define M_OPCODE_SHFT 27 +#define M_PARAMS_MSK GENMASK(26, 0) + +/* GENI_M_CMD_CTRL_REG */ +#define M_GENI_CMD_CANCEL BIT(2) +#define M_GENI_CMD_ABORT BIT(1) +#define M_GENI_DISABLE BIT(0) + +/* GENI_S_CMD0 fields */ +#define S_OPCODE_MSK GENMASK(31, 27) +#define S_OPCODE_SHFT 27 +#define S_PARAMS_MSK GENMASK(26, 0) + +/* GENI_S_CMD_CTRL_REG */ +#define S_GENI_CMD_CANCEL BIT(2) +#define S_GENI_CMD_ABORT BIT(1) +#define S_GENI_DISABLE BIT(0) + +/* GENI_M_IRQ_EN fields */ +#define M_CMD_DONE_EN BIT(0) +#define M_CMD_OVERRUN_EN BIT(1) +#define M_ILLEGAL_CMD_EN BIT(2) +#define M_CMD_FAILURE_EN BIT(3) +#define M_CMD_CANCEL_EN BIT(4) +#define M_CMD_ABORT_EN BIT(5) +#define M_TIMESTAMP_EN BIT(6) +#define M_RX_IRQ_EN BIT(7) +#define M_GP_SYNC_IRQ_0_EN BIT(8) +#define M_GP_IRQ_0_EN BIT(9) +#define M_GP_IRQ_1_EN BIT(10) +#define M_GP_IRQ_2_EN BIT(11) +#define M_GP_IRQ_3_EN BIT(12) +#define M_GP_IRQ_4_EN BIT(13) +#define M_GP_IRQ_5_EN BIT(14) +#define M_TX_FIFO_NOT_EMPTY_EN BIT(21) +#define M_IO_DATA_DEASSERT_EN BIT(22) +#define M_IO_DATA_ASSERT_EN BIT(23) +#define M_RX_FIFO_RD_ERR_EN BIT(24) +#define M_RX_FIFO_WR_ERR_EN BIT(25) +#define M_RX_FIFO_WATERMARK_EN BIT(26) +#define M_RX_FIFO_LAST_EN BIT(27) +#define M_TX_FIFO_RD_ERR_EN BIT(28) +#define M_TX_FIFO_WR_ERR_EN BIT(29) +#define M_TX_FIFO_WATERMARK_EN BIT(30) +#define M_SEC_IRQ_EN BIT(31) +#define M_COMMON_GENI_M_IRQ_EN (GENMASK(6, 1) | \ + M_IO_DATA_DEASSERT_EN | \ + M_IO_DATA_ASSERT_EN | M_RX_FIFO_RD_ERR_EN | \ + M_RX_FIFO_WR_ERR_EN | M_TX_FIFO_RD_ERR_EN | \ + M_TX_FIFO_WR_ERR_EN) + +/* GENI_S_IRQ_EN fields */ +#define S_CMD_DONE_EN BIT(0) +#define S_CMD_OVERRUN_EN BIT(1) +#define S_ILLEGAL_CMD_EN BIT(2) +#define S_CMD_FAILURE_EN BIT(3) +#define S_CMD_CANCEL_EN BIT(4) +#define S_CMD_ABORT_EN BIT(5) +#define S_GP_SYNC_IRQ_0_EN BIT(8) +#define S_GP_IRQ_0_EN BIT(9) +#define S_GP_IRQ_1_EN BIT(10) +#define S_GP_IRQ_2_EN BIT(11) +#define S_GP_IRQ_3_EN BIT(12) +#define S_GP_IRQ_4_EN BIT(13) +#define S_GP_IRQ_5_EN BIT(14) +#define S_IO_DATA_DEASSERT_EN BIT(22) +#define S_IO_DATA_ASSERT_EN BIT(23) +#define S_RX_FIFO_RD_ERR_EN BIT(24) +#define S_RX_FIFO_WR_ERR_EN BIT(25) +#define S_RX_FIFO_WATERMARK_EN BIT(26) +#define S_RX_FIFO_LAST_EN BIT(27) +#define S_COMMON_GENI_S_IRQ_EN (GENMASK(5, 1) | GENMASK(13, 9) | \ + S_RX_FIFO_RD_ERR_EN | S_RX_FIFO_WR_ERR_EN) + +/* GENI_/TX/RX/RX_RFR/_WATERMARK_REG fields */ +#define WATERMARK_MSK GENMASK(5, 0) + +/* GENI_TX_FIFO_STATUS fields */ +#define TX_FIFO_WC GENMASK(27, 0) + +/* GENI_RX_FIFO_STATUS fields */ +#define RX_LAST BIT(31) +#define RX_LAST_BYTE_VALID_MSK GENMASK(30, 28) +#define RX_LAST_BYTE_VALID_SHFT 28 +#define RX_FIFO_WC_MSK GENMASK(24, 0) + +/* SE_GENI_IOS fields */ +#define IO2_DATA_IN BIT(1) +#define RX_DATA_IN BIT(0) + +/* SE_DMA_TX_IRQ_STAT Register fields */ +#define TX_DMA_DONE BIT(0) +#define TX_EOT BIT(1) +#define TX_SBE BIT(2) +#define TX_RESET_DONE BIT(3) + +/* SE_DMA_RX_IRQ_STAT Register fields */ +#define RX_DMA_DONE BIT(0) +#define RX_EOT BIT(1) +#define RX_SBE BIT(2) +#define RX_RESET_DONE BIT(3) +#define RX_FLUSH_DONE BIT(4) +#define RX_DMA_PARITY_ERR BIT(5) +#define RX_DMA_BREAK GENMASK(8, 7) +#define RX_GENI_GP_IRQ GENMASK(10, 5) +#define RX_GENI_CANCEL_IRQ BIT(11) +#define RX_GENI_GP_IRQ_EXT GENMASK(13, 12) + +/* SE_HW_PARAM_0 fields */ +#define TX_FIFO_WIDTH_MSK GENMASK(29, 24) +#define TX_FIFO_WIDTH_SHFT 24 +/* + * For QUP HW Version >= 3.10 Tx fifo depth support is increased + * to 256bytes and corresponding bits are 16 to 23 + */ +#define TX_FIFO_DEPTH_MSK_256_BYTES GENMASK(23, 16) +#define TX_FIFO_DEPTH_MSK GENMASK(21, 16) +#define TX_FIFO_DEPTH_SHFT 16 + +/* SE_HW_PARAM_1 fields */ +#define RX_FIFO_WIDTH_MSK GENMASK(29, 24) +#define RX_FIFO_WIDTH_SHFT 24 +/* + * For QUP HW Version >= 3.10 Rx fifo depth support is increased + * to 256bytes and corresponding bits are 16 to 23 + */ +#define RX_FIFO_DEPTH_MSK_256_BYTES GENMASK(23, 16) +#define RX_FIFO_DEPTH_MSK GENMASK(21, 16) +#define RX_FIFO_DEPTH_SHFT 16 + +#define HW_VER_MAJOR_MASK GENMASK(31, 28) +#define HW_VER_MAJOR_SHFT 28 +#define HW_VER_MINOR_MASK GENMASK(27, 16) +#define HW_VER_MINOR_SHFT 16 +#define HW_VER_STEP_MASK GENMASK(15, 0) + +#define GENI_SE_VERSION_MAJOR(ver) ((ver & HW_VER_MAJOR_MASK) >> HW_VER_MAJOR_SHFT) +#define GENI_SE_VERSION_MINOR(ver) ((ver & HW_VER_MINOR_MASK) >> HW_VER_MINOR_SHFT) +#define GENI_SE_VERSION_STEP(ver) (ver & HW_VER_STEP_MASK) + +/* QUP SE VERSION value for major number 2 and minor number 5 */ +#define QUP_SE_VERSION_2_5 0x20050000 + +#endif diff --git a/lib/Kconfig b/lib/Kconfig index efb77978a65..189e6eb31aa 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -416,7 +416,7 @@ config TRACE_EARLY_ADDR config CIRCBUF bool "Enable circular buffer support" -source lib/dhry/Kconfig +source "lib/dhry/Kconfig" menu "Security support" @@ -429,10 +429,10 @@ config AES supported by the algorithm but only a 128-bit key is supported at present. -source lib/ecdsa/Kconfig -source lib/rsa/Kconfig -source lib/crypto/Kconfig -source lib/crypt/Kconfig +source "lib/ecdsa/Kconfig" +source "lib/rsa/Kconfig" +source "lib/crypto/Kconfig" +source "lib/crypt/Kconfig" config TPM bool "Trusted Platform Module (TPM) Support" @@ -1081,9 +1081,9 @@ config SMBIOS_PARSER help A simple parser for SMBIOS data. -source lib/efi/Kconfig -source lib/efi_loader/Kconfig -source lib/optee/Kconfig +source "lib/efi/Kconfig" +source "lib/efi_loader/Kconfig" +source "lib/optee/Kconfig" config TEST_FDTDEC bool "enable fdtdec test" @@ -1148,4 +1148,4 @@ config PHANDLE_CHECK_SEQ endmenu -source lib/fwu_updates/Kconfig +source "lib/fwu_updates/Kconfig" diff --git a/lib/charset.c b/lib/charset.c index df4f0407485..182c92a50c4 100644 --- a/lib/charset.c +++ b/lib/charset.c @@ -387,7 +387,7 @@ int u16_strcasecmp(const u16 *s1, const u16 *s2) * > 0 if the first different u16 in s1 is greater than the * corresponding u16 in s2 */ -int u16_strncmp(const u16 *s1, const u16 *s2, size_t n) +int __efi_runtime u16_strncmp(const u16 *s1, const u16 *s2, size_t n) { int ret = 0; diff --git a/lib/crypto/x509_cert_parser.c b/lib/crypto/x509_cert_parser.c index a0f0689118f..34de75a3ece 100644 --- a/lib/crypto/x509_cert_parser.c +++ b/lib/crypto/x509_cert_parser.c @@ -535,7 +535,7 @@ int x509_process_extension(void *context, size_t hdrlen, * Decode an ASN.1 universal time or generalised time field into a struct the * kernel can handle and check it for validity. The time is decoded thus: * - * [RFC5280 §4.1.2.5] + * [RFC5280 paragraph 74.1.2.5] * CAs conforming to this profile MUST always encode certificate validity * dates through the year 2049 as UTCTime; certificate validity dates in * 2050 or later MUST be encoded as GeneralizedTime. Conforming diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index e13a6f9f4c3..430bb7f0f7d 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -62,6 +62,22 @@ config EFI_VARIABLE_FILE_STORE Select this option if you want non-volatile UEFI variables to be stored as file /ubootefi.var on the EFI system partition. +config EFI_RT_VOLATILE_STORE + bool "Allow variable runtime services in volatile storage (e.g RAM)" + depends on EFI_VARIABLE_FILE_STORE + help + When EFI variables are stored on file we don't allow SetVariableRT, + since the OS doesn't know how to write that file. At he same time + we copy runtime variables in DRAM and support GetVariableRT + + Enable this option to allow SetVariableRT on the RAM backend of + the EFI variable storage. The OS will be responsible for syncing + the RAM contents to the file, otherwise any changes made during + runtime won't persist reboots. + Authenticated variables are not supported. Note that this will + violate the EFI spec since writing auth variables will return + EFI_INVALID_PARAMETER + config EFI_MM_COMM_TEE bool "UEFI variables storage service via the trusted world" depends on OPTEE @@ -129,7 +145,7 @@ if EFI_VARIABLES_PRESEED config EFI_VAR_SEED_FILE string "File with initial values of non-volatile UEFI variables" - default ubootefi.var + default "ubootefi.var" help File with initial values of non-volatile UEFI variables. The file must be in the same format as the storage in the EFI system partition. The diff --git a/lib/efi_loader/efi_helper.c b/lib/efi_loader/efi_helper.c index 58761fae784..6918fd5e48a 100644 --- a/lib/efi_loader/efi_helper.c +++ b/lib/efi_loader/efi_helper.c @@ -549,11 +549,6 @@ efi_status_t do_bootefi_exec(efi_handle_t handle, void *load_options) out: free(load_options); - if (IS_ENABLED(CONFIG_EFI_LOAD_FILE2_INITRD)) { - if (efi_initrd_deregister() != EFI_SUCCESS) - log_err("Failed to remove loadfile2 for initrd\n"); - } - /* Notify EFI_EVENT_GROUP_RETURN_TO_EFIBOOTMGR event group. */ list_for_each_entry(evt, &efi_events, link) { if (evt->group && diff --git a/lib/efi_loader/efi_load_initrd.c b/lib/efi_loader/efi_load_initrd.c index 2b467b55481..67d1f75d525 100644 --- a/lib/efi_loader/efi_load_initrd.c +++ b/lib/efi_loader/efi_load_initrd.c @@ -184,6 +184,50 @@ out: } /** + * efi_initrd_deregister() - delete the handle for loading initial RAM disk + * + * This will delete the handle containing the Linux specific vendor device + * path and EFI_LOAD_FILE2_PROTOCOL for loading an initrd + * + * Return: status code + */ +efi_status_t efi_initrd_deregister(void) +{ + efi_status_t ret; + + if (!efi_initrd_handle) + return EFI_SUCCESS; + + ret = efi_uninstall_multiple_protocol_interfaces(efi_initrd_handle, + /* initramfs */ + &efi_guid_device_path, + &dp_lf2_handle, + /* LOAD_FILE2 */ + &efi_guid_load_file2_protocol, + &efi_lf2_protocol, + NULL); + efi_initrd_handle = NULL; + + return ret; +} + +/** + * efi_initrd_return_notify() - return to efibootmgr callback + * + * @event: the event for which this notification function is registered + * @context: event context + */ +static void EFIAPI efi_initrd_return_notify(struct efi_event *event, + void *context) +{ + efi_status_t ret; + + EFI_ENTRY("%p, %p", event, context); + ret = efi_initrd_deregister(); + EFI_EXIT(ret); +} + +/** * efi_initrd_register() - create handle for loading initial RAM disk * * This function creates a new handle and installs a Linux specific vendor @@ -196,6 +240,7 @@ out: efi_status_t efi_initrd_register(void) { efi_status_t ret; + struct efi_event *event; /* * Allow the user to continue if Boot#### file path is not set for @@ -214,34 +259,17 @@ efi_status_t efi_initrd_register(void) &efi_guid_load_file2_protocol, &efi_lf2_protocol, NULL); + if (ret != EFI_SUCCESS) { + log_err("installing EFI_LOAD_FILE2_PROTOCOL failed\n"); + return ret; + } - return ret; -} - -/** - * efi_initrd_deregister() - delete the handle for loading initial RAM disk - * - * This will delete the handle containing the Linux specific vendor device - * path and EFI_LOAD_FILE2_PROTOCOL for loading an initrd - * - * Return: status code - */ -efi_status_t efi_initrd_deregister(void) -{ - efi_status_t ret; - - if (!efi_initrd_handle) - return EFI_SUCCESS; - - ret = efi_uninstall_multiple_protocol_interfaces(efi_initrd_handle, - /* initramfs */ - &efi_guid_device_path, - &dp_lf2_handle, - /* LOAD_FILE2 */ - &efi_guid_load_file2_protocol, - &efi_lf2_protocol, - NULL); - efi_initrd_handle = NULL; + ret = efi_create_event(EVT_NOTIFY_SIGNAL, TPL_CALLBACK, + efi_initrd_return_notify, NULL, + &efi_guid_event_group_return_to_efibootmgr, + &event); + if (ret != EFI_SUCCESS) + log_err("Creating event failed\n"); return ret; } diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c index a61c9a77b13..73831c527e0 100644 --- a/lib/efi_loader/efi_runtime.c +++ b/lib/efi_loader/efi_runtime.c @@ -10,6 +10,7 @@ #include <dm.h> #include <elf.h> #include <efi_loader.h> +#include <efi_variable.h> #include <log.h> #include <malloc.h> #include <rtc.h> @@ -110,6 +111,7 @@ static __efi_runtime_data efi_uintn_t efi_descriptor_size; */ efi_status_t efi_init_runtime_supported(void) { + const efi_guid_t efi_guid_efi_rt_var_file = U_BOOT_EFI_RT_VAR_FILE_GUID; efi_status_t ret; struct efi_rt_properties_table *rt_table; @@ -127,6 +129,46 @@ efi_status_t efi_init_runtime_supported(void) EFI_RT_SUPPORTED_SET_VIRTUAL_ADDRESS_MAP | EFI_RT_SUPPORTED_CONVERT_POINTER; + if (IS_ENABLED(CONFIG_EFI_RT_VOLATILE_STORE)) { + u8 s = 0; + + ret = efi_set_variable_int(u"RTStorageVolatile", + &efi_guid_efi_rt_var_file, + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS | + EFI_VARIABLE_READ_ONLY, + sizeof(EFI_VAR_FILE_NAME), + EFI_VAR_FILE_NAME, false); + if (ret != EFI_SUCCESS) { + log_err("Failed to set RTStorageVolatile\n"); + return ret; + } + /* + * This variable needs to be visible so users can read it, + * but the real contents are going to be filled during + * GetVariable + */ + ret = efi_set_variable_int(u"VarToFile", + &efi_guid_efi_rt_var_file, + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS | + EFI_VARIABLE_READ_ONLY, + sizeof(s), + &s, false); + if (ret != EFI_SUCCESS) { + log_err("Failed to set VarToFile\n"); + efi_set_variable_int(u"RTStorageVolatile", + &efi_guid_efi_rt_var_file, + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS | + EFI_VARIABLE_READ_ONLY, + 0, NULL, false); + + return ret; + } + rt_table->runtime_services_supported |= EFI_RT_SUPPORTED_SET_VARIABLE; + } + /* * This value must be synced with efi_runtime_detach_list * as well as efi_runtime_services. diff --git a/lib/efi_loader/efi_var_common.c b/lib/efi_loader/efi_var_common.c index aa8feffd3ec..961139f005a 100644 --- a/lib/efi_loader/efi_var_common.c +++ b/lib/efi_loader/efi_var_common.c @@ -182,7 +182,8 @@ efi_get_variable_runtime(u16 *variable_name, const efi_guid_t *guid, { efi_status_t ret; - ret = efi_get_variable_mem(variable_name, guid, attributes, data_size, data, NULL); + ret = efi_get_variable_mem(variable_name, guid, attributes, data_size, + data, NULL, EFI_VARIABLE_RUNTIME_ACCESS); /* Remove EFI_VARIABLE_READ_ONLY flag */ if (attributes) @@ -195,7 +196,8 @@ efi_status_t __efi_runtime EFIAPI efi_get_next_variable_name_runtime(efi_uintn_t *variable_name_size, u16 *variable_name, efi_guid_t *guid) { - return efi_get_next_variable_name_mem(variable_name_size, variable_name, guid); + return efi_get_next_variable_name_mem(variable_name_size, variable_name, + guid, EFI_VARIABLE_RUNTIME_ACCESS); } /** @@ -419,7 +421,7 @@ void *efi_get_var(const u16 *name, const efi_guid_t *vendor, efi_uintn_t *size) } /** - * efi_var_collect() - Copy EFI variables mstching attributes mask + * efi_var_collect() - Copy EFI variables matching attributes mask * * @bufp: buffer containing variable collection * @lenp: buffer length diff --git a/lib/efi_loader/efi_var_mem.c b/lib/efi_loader/efi_var_mem.c index 6c21cec5d45..940ab663882 100644 --- a/lib/efi_loader/efi_var_mem.c +++ b/lib/efi_loader/efi_var_mem.c @@ -61,6 +61,23 @@ efi_var_mem_compare(struct efi_var_entry *var, const efi_guid_t *guid, return match; } +/** + * efi_var_entry_len() - Get the entry len including headers & name + * + * @var: pointer to variable start + * + * Return: 8-byte aligned variable entry length + */ + +u32 __efi_runtime efi_var_entry_len(struct efi_var_entry *var) +{ + if (!var) + return 0; + + return ALIGN((sizeof(u16) * (u16_strlen(var->name) + 1)) + + var->length + sizeof(*var), 8); +} + struct efi_var_entry __efi_runtime *efi_var_mem_find(const efi_guid_t *guid, const u16 *name, struct efi_var_entry **next) @@ -185,53 +202,6 @@ u64 __efi_runtime efi_var_mem_free(void) } /** - * efi_var_mem_bs_del() - delete boot service only variables - */ -static void efi_var_mem_bs_del(void) -{ - struct efi_var_entry *var = efi_var_buf->var; - - for (;;) { - struct efi_var_entry *last; - - last = (struct efi_var_entry *) - ((uintptr_t)efi_var_buf + efi_var_buf->length); - if (var >= last) - break; - if (var->attr & EFI_VARIABLE_RUNTIME_ACCESS) { - u16 *data; - - /* skip variable */ - for (data = var->name; *data; ++data) - ; - ++data; - var = (struct efi_var_entry *) - ALIGN((uintptr_t)data + var->length, 8); - } else { - /* delete variable */ - efi_var_mem_del(var); - } - } -} - -/** - * efi_var_mem_notify_exit_boot_services() - ExitBootService callback - * - * @event: callback event - * @context: callback context - */ -static void EFIAPI -efi_var_mem_notify_exit_boot_services(struct efi_event *event, void *context) -{ - EFI_ENTRY("%p, %p", event, context); - - /* Delete boot service only variables */ - efi_var_mem_bs_del(); - - EFI_EXIT(EFI_SUCCESS); -} - -/** * efi_var_mem_notify_exit_boot_services() - SetVirtualMemoryMap callback * * @event: callback event @@ -261,11 +231,7 @@ efi_status_t efi_var_mem_init(void) efi_var_buf->magic = EFI_VAR_FILE_MAGIC; efi_var_buf->length = (uintptr_t)efi_var_buf->var - (uintptr_t)efi_var_buf; - /* crc32 for 0 bytes = 0 */ - ret = efi_create_event(EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_CALLBACK, - efi_var_mem_notify_exit_boot_services, NULL, - NULL, &event); if (ret != EFI_SUCCESS) return ret; ret = efi_create_event(EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE, TPL_CALLBACK, @@ -276,10 +242,71 @@ efi_status_t efi_var_mem_init(void) return ret; } +/** + * efi_var_collect_mem() - Copy EFI variables matching attributes mask from + * efi_var_buf + * + * @buf: buffer containing variable collection + * @lenp: buffer length + * @mask: mask of matched attributes + * + * Return: Status code + */ +efi_status_t __efi_runtime +efi_var_collect_mem(struct efi_var_file *buf, efi_uintn_t *lenp, u32 mask) +{ + static struct efi_var_file __efi_runtime_data hdr = { + .magic = EFI_VAR_FILE_MAGIC, + }; + struct efi_var_entry *last, *var, *var_to; + + hdr.length = sizeof(struct efi_var_file); + + var = efi_var_buf->var; + last = (struct efi_var_entry *) + ((uintptr_t)efi_var_buf + efi_var_buf->length); + if (buf) + var_to = buf->var; + + while (var < last) { + u32 len = efi_var_entry_len(var); + + if ((var->attr & mask) != mask) { + var = (void *)((uintptr_t)var + len); + continue; + } + + hdr.length += len; + + if (buf && hdr.length <= *lenp) { + efi_memcpy_runtime(var_to, var, len); + var_to = (void *)var_to + len; + } + var = (void *)var + len; + } + + if (!buf && hdr.length <= *lenp) { + *lenp = hdr.length; + return EFI_INVALID_PARAMETER; + } + + if (!buf || hdr.length > *lenp) { + *lenp = hdr.length; + return EFI_BUFFER_TOO_SMALL; + } + hdr.crc32 = crc32(0, (u8 *)buf->var, + hdr.length - sizeof(struct efi_var_file)); + + efi_memcpy_runtime(buf, &hdr, sizeof(hdr)); + *lenp = hdr.length; + + return EFI_SUCCESS; +} + efi_status_t __efi_runtime efi_get_variable_mem(const u16 *variable_name, const efi_guid_t *vendor, u32 *attributes, efi_uintn_t *data_size, void *data, - u64 *timep) + u64 *timep, u32 mask) { efi_uintn_t old_size; struct efi_var_entry *var; @@ -291,11 +318,22 @@ efi_get_variable_mem(const u16 *variable_name, const efi_guid_t *vendor, if (!var) return EFI_NOT_FOUND; + /* + * This function is used at runtime to dump EFI variables. + * The memory backend we keep around has BS-only variables as + * well. At runtime we filter them here + */ + if (mask && !((var->attr & mask) == mask)) + return EFI_NOT_FOUND; + if (attributes) *attributes = var->attr; if (timep) *timep = var->time; + if (!u16_strcmp(variable_name, u"VarToFile")) + return efi_var_collect_mem(data, data_size, EFI_VARIABLE_NON_VOLATILE); + old_size = *data_size; *data_size = var->length; if (old_size < var->length) @@ -315,7 +353,8 @@ efi_get_variable_mem(const u16 *variable_name, const efi_guid_t *vendor, efi_status_t __efi_runtime efi_get_next_variable_name_mem(efi_uintn_t *variable_name_size, - u16 *variable_name, efi_guid_t *vendor) + u16 *variable_name, efi_guid_t *vendor, + u32 mask) { struct efi_var_entry *var; efi_uintn_t len, old_size; @@ -324,6 +363,7 @@ efi_get_next_variable_name_mem(efi_uintn_t *variable_name_size, if (!variable_name_size || !variable_name || !vendor) return EFI_INVALID_PARAMETER; +skip: len = *variable_name_size >> 1; if (u16_strnlen(variable_name, len) == len) return EFI_INVALID_PARAMETER; @@ -347,6 +387,11 @@ efi_get_next_variable_name_mem(efi_uintn_t *variable_name_size, efi_memcpy_runtime(variable_name, var->name, *variable_name_size); efi_memcpy_runtime(vendor, &var->guid, sizeof(efi_guid_t)); + if (mask && !((var->attr & mask) == mask)) { + *variable_name_size = old_size; + goto skip; + } + return EFI_SUCCESS; } diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c index e6c1219a11c..0cbed53d1db 100644 --- a/lib/efi_loader/efi_variable.c +++ b/lib/efi_loader/efi_variable.c @@ -209,27 +209,32 @@ efi_get_variable_int(const u16 *variable_name, const efi_guid_t *vendor, u32 *attributes, efi_uintn_t *data_size, void *data, u64 *timep) { - return efi_get_variable_mem(variable_name, vendor, attributes, data_size, data, timep); + return efi_get_variable_mem(variable_name, vendor, attributes, data_size, + data, timep, 0); } efi_status_t __efi_runtime efi_get_next_variable_name_int(efi_uintn_t *variable_name_size, u16 *variable_name, efi_guid_t *vendor) { - return efi_get_next_variable_name_mem(variable_name_size, variable_name, vendor); + return efi_get_next_variable_name_mem(variable_name_size, variable_name, + vendor, 0); } -efi_status_t efi_set_variable_int(const u16 *variable_name, - const efi_guid_t *vendor, - u32 attributes, efi_uintn_t data_size, - const void *data, bool ro_check) +/** + * setvariable_allowed() - checks defined by the UEFI spec for setvariable + * + * @variable_name: name of the variable + * @vendor: vendor GUID + * @attributes: attributes of the variable + * @data_size: size of the buffer with the variable value + * @data: buffer with the variable value + * Return: status code + */ +static efi_status_t __efi_runtime +setvariable_allowed(const u16 *variable_name, const efi_guid_t *vendor, + u32 attributes, efi_uintn_t data_size, const void *data) { - struct efi_var_entry *var; - efi_uintn_t ret; - bool append, delete; - u64 time = 0; - enum efi_auth_var_type var_type; - if (!variable_name || !*variable_name || !vendor) return EFI_INVALID_PARAMETER; @@ -261,6 +266,25 @@ efi_status_t efi_set_variable_int(const u16 *variable_name, !(attributes & EFI_VARIABLE_BOOTSERVICE_ACCESS))) return EFI_INVALID_PARAMETER; + return EFI_SUCCESS; +} + +efi_status_t efi_set_variable_int(const u16 *variable_name, + const efi_guid_t *vendor, + u32 attributes, efi_uintn_t data_size, + const void *data, bool ro_check) +{ + struct efi_var_entry *var; + efi_uintn_t ret; + bool append, delete; + u64 time = 0; + enum efi_auth_var_type var_type; + + ret = setvariable_allowed(variable_name, vendor, attributes, data_size, + data); + if (ret != EFI_SUCCESS) + return ret; + /* check if a variable exists */ var = efi_var_mem_find(vendor, variable_name, NULL); append = !!(attributes & EFI_VARIABLE_APPEND_WRITE); @@ -454,7 +478,79 @@ efi_set_variable_runtime(u16 *variable_name, const efi_guid_t *vendor, u32 attributes, efi_uintn_t data_size, const void *data) { - return EFI_UNSUPPORTED; + struct efi_var_entry *var; + efi_uintn_t ret; + bool append, delete; + u64 time = 0; + + if (!IS_ENABLED(CONFIG_EFI_RT_VOLATILE_STORE)) + return EFI_UNSUPPORTED; + + /* + * Authenticated variables are not supported. The EFI spec + * in §32.3.6 requires keys to be stored in non-volatile storage which + * is tamper and delete resistant. + * The rest of the checks are in setvariable_allowed() + */ + if (attributes & EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS) + return EFI_INVALID_PARAMETER; + + ret = setvariable_allowed(variable_name, vendor, attributes, data_size, + data); + if (ret != EFI_SUCCESS) + return ret; + + /* check if a variable exists */ + var = efi_var_mem_find(vendor, variable_name, NULL); + append = !!(attributes & EFI_VARIABLE_APPEND_WRITE); + attributes &= ~EFI_VARIABLE_APPEND_WRITE; + delete = !append && (!data_size || !attributes); + + /* BS only variables are hidden deny writing them */ + if (!delete && !(attributes & EFI_VARIABLE_RUNTIME_ACCESS)) + return EFI_INVALID_PARAMETER; + + if (var) { + if (var->attr & EFI_VARIABLE_READ_ONLY || + !(var->attr & EFI_VARIABLE_NON_VOLATILE)) + return EFI_WRITE_PROTECTED; + + /* attributes won't be changed */ + if (!delete && (((var->attr & ~EFI_VARIABLE_READ_ONLY) != + (attributes & ~EFI_VARIABLE_READ_ONLY)))) + return EFI_INVALID_PARAMETER; + time = var->time; + } else { + if (!(attributes & EFI_VARIABLE_NON_VOLATILE)) + return EFI_INVALID_PARAMETER; + if (append && !data_size) + return EFI_SUCCESS; + if (delete) + return EFI_NOT_FOUND; + } + + if (delete) { + /* EFI_NOT_FOUND has been handled before */ + attributes = var->attr; + ret = EFI_SUCCESS; + } else if (append && var) { + u16 *old_data = (void *)((uintptr_t)var->name + + sizeof(u16) * (u16_strlen(var->name) + 1)); + + ret = efi_var_mem_ins(variable_name, vendor, attributes, + var->length, old_data, data_size, data, + time); + } else { + ret = efi_var_mem_ins(variable_name, vendor, attributes, + data_size, data, 0, NULL, time); + } + + if (ret != EFI_SUCCESS) + return ret; + /* We are always inserting new variables, get rid of the old copy */ + efi_var_mem_del(var); + + return EFI_SUCCESS; } /** diff --git a/lib/efi_loader/efi_variable_tee.c b/lib/efi_loader/efi_variable_tee.c index dde135fd9f8..4f1aa298da1 100644 --- a/lib/efi_loader/efi_variable_tee.c +++ b/lib/efi_loader/efi_variable_tee.c @@ -959,11 +959,6 @@ void efi_variables_boot_exit_notify(void) log_err("Unable to notify the MM partition for ExitBootServices\n"); free(comm_buf); - /* - * Populate the list for runtime variables. - * asking EFI_VARIABLE_RUNTIME_ACCESS is redundant, since - * efi_var_mem_notify_exit_boot_services will clean those, but that's fine - */ ret = efi_var_collect(&var_buf, &len, EFI_VARIABLE_RUNTIME_ACCESS); if (ret != EFI_SUCCESS) log_err("Can't populate EFI variables. No runtime variables will be available\n"); diff --git a/lib/efi_selftest/efi_selftest_variables_runtime.c b/lib/efi_selftest/efi_selftest_variables_runtime.c index 4700d942410..afa91be62c8 100644 --- a/lib/efi_selftest/efi_selftest_variables_runtime.c +++ b/lib/efi_selftest/efi_selftest_variables_runtime.c @@ -10,6 +10,8 @@ */ #include <efi_selftest.h> +#include <efi_variable.h> +#include <u-boot/crc.h> #define EFI_ST_MAX_DATA_SIZE 16 #define EFI_ST_MAX_VARNAME_SIZE 40 @@ -17,6 +19,8 @@ static struct efi_boot_services *boottime; static struct efi_runtime_services *runtime; static const efi_guid_t guid_vendor0 = EFI_GLOBAL_VARIABLE_GUID; +static const efi_guid_t __efi_runtime_data efi_rt_var_guid = + U_BOOT_EFI_RT_VAR_FILE_GUID; /* * Setup unit test. @@ -41,15 +45,18 @@ static int setup(const efi_handle_t img_handle, static int execute(void) { efi_status_t ret; - efi_uintn_t len; + efi_uintn_t len, avail, append_len = 17; u32 attr; u8 v[16] = {0x5d, 0xd1, 0x5e, 0x51, 0x5a, 0x05, 0xc7, 0x0c, 0x35, 0x4a, 0xae, 0x87, 0xa5, 0xdf, 0x0f, 0x65,}; + u8 v2[CONFIG_EFI_VAR_BUF_SIZE]; u8 data[EFI_ST_MAX_DATA_SIZE]; + u8 data2[CONFIG_EFI_VAR_BUF_SIZE]; u16 varname[EFI_ST_MAX_VARNAME_SIZE]; efi_guid_t guid; u64 max_storage, rem_storage, max_size; + memset(v2, 0x1, sizeof(v2)); ret = runtime->query_variable_info(EFI_VARIABLE_BOOTSERVICE_ACCESS, &max_storage, &rem_storage, &max_size); @@ -62,9 +69,216 @@ static int execute(void) EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, 3, v + 4); - if (ret != EFI_UNSUPPORTED) { - efi_st_error("SetVariable failed\n"); - return EFI_ST_FAILURE; + if (IS_ENABLED(CONFIG_EFI_RT_VOLATILE_STORE)) { + efi_uintn_t prev_len, delta; + struct efi_var_entry *var; + struct efi_var_file *hdr; + + /* At runtime only non-volatile variables may be set. */ + if (ret != EFI_INVALID_PARAMETER) { + efi_st_error("SetVariable failed\n"); + return EFI_ST_FAILURE; + } + + /* runtime atttribute must be set */ + ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0, + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_NON_VOLATILE, + 3, v + 4); + if (ret != EFI_INVALID_PARAMETER) { + efi_st_error("SetVariable failed\n"); + return EFI_ST_FAILURE; + } + + len = sizeof(data); + ret = runtime->get_variable(u"RTStorageVolatile", + &efi_rt_var_guid, + &attr, &len, data); + if (ret != EFI_SUCCESS) { + efi_st_error("GetVariable failed\n"); + return EFI_ST_FAILURE; + } + + if (len != sizeof(EFI_VAR_FILE_NAME) || + memcmp(data, EFI_VAR_FILE_NAME, sizeof(EFI_VAR_FILE_NAME))) { + data[len - 1] = 0; + efi_st_error("RTStorageVolatile = %s\n", data); + return EFI_ST_FAILURE; + } + + len = sizeof(data2); + ret = runtime->get_variable(u"VarToFile", &efi_rt_var_guid, + &attr, &len, data2); + if (ret != EFI_SUCCESS) { + efi_st_error("GetVariable failed\n"); + return EFI_ST_FAILURE; + } + /* + * VarToFile size must change once a variable is inserted + * Store it now, we'll use it later + */ + prev_len = len; + ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0, + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS | + EFI_VARIABLE_NON_VOLATILE, + sizeof(v2), + v2); + /* + * This will try to update VarToFile as well and must fail, + * without changing or deleting VarToFile + */ + if (ret != EFI_OUT_OF_RESOURCES) { + efi_st_error("SetVariable failed\n"); + return EFI_ST_FAILURE; + } + len = sizeof(data2); + ret = runtime->get_variable(u"VarToFile", &efi_rt_var_guid, + &attr, &len, data2); + if (ret != EFI_SUCCESS || prev_len != len) { + efi_st_error("Get/SetVariable failed\n"); + return EFI_ST_FAILURE; + } + + /* Add an 8byte aligned variable */ + ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0, + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS | + EFI_VARIABLE_NON_VOLATILE, + sizeof(v), v); + if (ret != EFI_SUCCESS) { + efi_st_error("SetVariable failed\n"); + return EFI_ST_FAILURE; + } + + /* Delete it by setting the attrs to 0 */ + ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0, + 0, sizeof(v), v); + if (ret != EFI_SUCCESS) { + efi_st_error("SetVariable failed\n"); + return EFI_ST_FAILURE; + } + + /* Add it back */ + ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0, + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS | + EFI_VARIABLE_NON_VOLATILE, + sizeof(v), v); + if (ret != EFI_SUCCESS) { + efi_st_error("SetVariable failed\n"); + return EFI_ST_FAILURE; + } + + /* Delete it again by setting the size to 0 */ + ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0, + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS | + EFI_VARIABLE_NON_VOLATILE, + 0, NULL); + if (ret != EFI_SUCCESS) { + efi_st_error("SetVariable failed\n"); + return EFI_ST_FAILURE; + } + + /* Delete it again and make sure it's not there */ + ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0, + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS | + EFI_VARIABLE_NON_VOLATILE, + 0, NULL); + if (ret != EFI_NOT_FOUND) { + efi_st_error("SetVariable failed\n"); + return EFI_ST_FAILURE; + } + + /* + * Add a non-aligned variable + * VarToFile updates must include efi_st_var0 + */ + ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0, + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS | + EFI_VARIABLE_NON_VOLATILE, + 9, v + 4); + if (ret != EFI_SUCCESS) { + efi_st_error("SetVariable failed\n"); + return EFI_ST_FAILURE; + } + var = efi_var_mem_find(&guid_vendor0, u"efi_st_var0", NULL); + if (!var) { + efi_st_error("GetVariable failed\n"); + return EFI_ST_FAILURE; + } + delta = efi_var_entry_len(var); + len = sizeof(data2); + ret = runtime->get_variable(u"VarToFile", &efi_rt_var_guid, + &attr, &len, data2); + if (ret != EFI_SUCCESS || prev_len + delta != len) { + efi_st_error("Get/SetVariable failed\n"); + return EFI_ST_FAILURE; + } + + /* + * Append on an existing variable must update VarToFile + * Our variable entries are 8-byte aligned. + * Adding a single byte will fit on the existing space + */ + prev_len = len; + avail = efi_var_entry_len(var) - + (sizeof(u16) * (u16_strlen(var->name) + 1) + sizeof(*var)) - + var->length; + if (avail >= append_len) + delta = 0; + else + delta = ALIGN(append_len - avail, 8); + ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0, + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS | + EFI_VARIABLE_APPEND_WRITE | + EFI_VARIABLE_NON_VOLATILE, + append_len, v2); + if (ret != EFI_SUCCESS) { + efi_st_error("SetVariable failed\n"); + return EFI_ST_FAILURE; + } + len = sizeof(data2); + ret = runtime->get_variable(u"VarToFile", &efi_rt_var_guid, + &attr, &len, data2); + if (ret != EFI_SUCCESS) { + efi_st_error("GetVariable failed\n"); + return EFI_ST_FAILURE; + } + if (prev_len + delta != len) { + efi_st_error("Unexpected VarToFile size"); + return EFI_ST_FAILURE; + } + + /* Make sure that variable contains a valid file */ + hdr = (struct efi_var_file *)data2; + if (hdr->magic != EFI_VAR_FILE_MAGIC || + len != hdr->length || + hdr->crc32 != crc32(0, (u8 *)((uintptr_t)data2 + sizeof(struct efi_var_file)), + len - sizeof(struct efi_var_file))) { + efi_st_error("VarToFile invalid header\n"); + return EFI_ST_FAILURE; + } + + /* Variables that are BS, RT and volatile are RO after EBS */ + ret = runtime->set_variable(u"VarToFile", &efi_rt_var_guid, + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS | + EFI_VARIABLE_NON_VOLATILE, + sizeof(v), v); + if (ret != EFI_WRITE_PROTECTED) { + efi_st_error("Get/SetVariable failed\n"); + return EFI_ST_FAILURE; + } + } else { + if (ret != EFI_UNSUPPORTED) { + efi_st_error("SetVariable failed\n"); + return EFI_ST_FAILURE; + } } len = EFI_ST_MAX_DATA_SIZE; ret = runtime->get_variable(u"PlatformLangCodes", &guid_vendor0, diff --git a/net/bootp.c b/net/bootp.c index 68002909634..c15472f5d37 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -883,6 +883,14 @@ static void dhcp_process_options(uchar *popt, uchar *end) break; case 28: /* Ignore Broadcast Address Option */ break; + case 40: /* NIS Domain name */ + if (net_nis_domain[0] == 0) { + size = truncate_sz("NIS Domain Name", + sizeof(net_nis_domain), size); + memcpy(&net_nis_domain, popt + 2, size); + net_nis_domain[size] = 0; + } + break; #if defined(CONFIG_CMD_SNTP) && defined(CONFIG_BOOTP_NTPSERVER) case 42: /* NTP server IP */ net_copy_ip(&net_ntp_server, (popt + 2)); diff --git a/test/py/tests/test_optee_rpmb.py b/test/py/tests/test_optee_rpmb.py new file mode 100644 index 00000000000..8a081b5c494 --- /dev/null +++ b/test/py/tests/test_optee_rpmb.py @@ -0,0 +1,20 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Tests for OP-TEE RPMB read/write support + +""" +This tests optee_rpmb cmd in U-Boot +""" + +import pytest +import u_boot_utils as util + +@pytest.mark.buildconfigspec('cmd_optee_rpmb') +def test_optee_rpmb_read_write(u_boot_console): + """Test OP-TEE RPMB cmd read/write + """ + response = u_boot_console.run_command('optee_rpmb write_pvalue test_variable test_value') + assert response == 'Wrote 11 bytes' + + response = u_boot_console.run_command('optee_rpmb read_pvalue test_variable 11') + assert response == 'Read 11 bytes, value = test_value'
\ No newline at end of file diff --git a/tools/binman/etype/nxp_imx8mimage.py b/tools/binman/etype/nxp_imx8mimage.py new file mode 100644 index 00000000000..3585120b79b --- /dev/null +++ b/tools/binman/etype/nxp_imx8mimage.py @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright 2023-2024 Marek Vasut <marex@denx.de> +# Written with much help from Simon Glass <sjg@chromium.org> +# +# Entry-type module for generating the i.MX8M mkimage -T imx8mimage +# configuration file and invocation of mkimage -T imx8mimage on the +# configuration file and input data. +# + +from collections import OrderedDict + +from binman.entry import Entry +from binman.etype.mkimage import Entry_mkimage +from binman.etype.section import Entry_section +from binman import elf +from dtoc import fdt_util +from u_boot_pylib import tools + +class Entry_nxp_imx8mimage(Entry_mkimage): + """NXP i.MX8M imx8mimage .cfg file generator and mkimage invoker + + Properties / Entry arguments: + - nxp,boot-from - device to boot from (e.g. 'sd') + - nxp,loader-address - loader address (SPL text base) + - nxp,rom-version - BootROM version ('2' for i.MX8M Nano and Plus) + """ + + def __init__(self, section, etype, node): + super().__init__(section, etype, node) + self.required_props = ['nxp,boot-from', 'nxp,rom-version', 'nxp,loader-address'] + + def ReadNode(self): + super().ReadNode() + self.boot_from = fdt_util.GetString(self._node, 'nxp,boot-from') + self.loader_address = fdt_util.GetInt(self._node, 'nxp,loader-address') + self.rom_version = fdt_util.GetInt(self._node, 'nxp,rom-version') + self.ReadEntries() + + def BuildSectionData(self, required): + data, input_fname, uniq = self.collect_contents_to_file( + self._entries.values(), 'input') + # Generate mkimage configuration file similar to imx8mimage.cfg + # and pass it to mkimage to generate SPL image for us here. + cfg_fname = tools.get_output_filename('nxp.imx8mimage.cfg.%s' % uniq) + with open(cfg_fname, 'w') as outf: + print('ROM_VERSION v%d' % self.rom_version, file=outf) + print('BOOT_FROM %s' % self.boot_from, file=outf) + print('LOADER %s %#x' % (input_fname, self.loader_address), file=outf) + + output_fname = tools.get_output_filename(f'cfg-out.{uniq}') + args = ['-d', input_fname, '-n', cfg_fname, '-T', 'imx8mimage', + output_fname] + if self.mkimage.run_cmd(*args) is not None: + return tools.read_file(output_fname) + else: + # Bintool is missing; just use the input data as the output + self.record_missing_bintool(self.mkimage) + return data + + def SetImagePos(self, image_pos): + # Customized SoC specific SetImagePos which skips the mkimage etype + # implementation and removes the 0x48 offset introduced there. That + # offset is only used for uImage/fitImage, which is not the case in + # here. + upto = 0x00 + for entry in super().GetEntries().values(): + entry.SetOffsetSize(upto, None) + + # Give up if any entries lack a size + if entry.size is None: + return + upto += entry.size + + Entry_section.SetImagePos(self, image_pos) |